gEDA-user: gnetlist segmentation fault

2010-09-28 Thread Thomas Dean
I have an application which causes a seg fault in gnetlist.  I think
this can be fixed by changing the schematic.  But, Segmentation fault
is NEVER the proper response.

# gnetlist -g geda ulf-ant.sch
Loading schematic [/usr/home/tomdean/Electronics/Spice/ulf-ant/ulf-ant.sch]
Segmentation fault (core dumped)

tomdean

ulf-ant.sch=
v 20100214 2
C 19500 47500 1 0 0 lf353-1.sym
{
T 19500 48600 5 10 1 1 0 0 1
refdes=U101A
T 19500 48400 5 10 1 1 0 0 1
device=AD797
T 19500 47500 5 10 0 0 0 0 1
slot=1
}
C 19500 42700 1 180 1 lf353-1.sym
{
T 19600 41700 5 10 1 1 180 6 1
refdes=U102A
T 19600 41400 5 10 1 1 0 0 1
device=AD797
T 19500 42700 5 10 0 0 0 0 1
slot=1
}
C 28500 45400 1 0 0 lf353-1.sym
{
T 28500 46700 5 10 1 1 0 0 1
refdes=U103A
T 28500 46500 5 10 1 1 0 0 1
device=AD797
T 28500 45400 5 10 0 0 0 0 1
slot=1
}
C 18500 47200 1 90 0 resistor-1.sym
{
T 18200 47400 5 10 1 1 90 0 1
refdes=R101
T 17700 46900 5 10 1 1 0 0 1
value=100Meg
}
C 27300 49100 1 270 1 capacitor-1.sym
{
T 27100 49200 5 10 1 1 90 2 1
refdes=C101
T 28200 49300 5 10 0 0 90 2 1
symversion=0.1
T 26800 49800 5 10 1 1 0 0 1
value=1000uf
}
C 15200 39800 1 0 0 title-B.sym
C 18500 42100 1 90 0 resistor-1.sym
{
T 18200 42300 5 10 1 1 90 0 1
refdes=R102
T 17700 43100 5 10 1 1 0 0 1
value=100Meg
}
C 26000 49100 1 270 1 resistor-1.sym
{
T 26300 49300 5 10 1 1 90 2 1
refdes=R103
T 26700 49300 5 10 1 1 90 0 1
value=10k
}
C 26000 48100 1 270 1 resistor-1.sym
{
T 26300 48300 5 10 1 1 90 2 1
refdes=R104
T 26700 48300 5 10 1 1 90 0 1
value=10k
}
C 28100 49100 1 270 1 capacitor-1.sym
{
T 27900 49200 5 10 1 1 90 2 1
refdes=C102
T 29000 49300 5 10 0 0 90 2 1
symversion=0.1
T 27800 49800 5 10 1 1 0 0 1
value=100uf
}
N 30700 5 26100 5 4
{
T 30300 50100 5 10 1 1 0 0 1
netname=Vcc
}
N 26100 49100 26100 49000 4
C 25700 48800 1 0 1 gnd-1.sym
N 26100 48100 26100 48000 4
N 27500 48000 27500 49100 4
N 29100 49100 27500 49100 4
C 20400 47200 1 180 0 resistor-1.sym
{
T 20200 46900 5 10 1 1 180 0 1
refdes=R105
T 19700 46600 5 10 1 1 0 0 1
value=27k
}
C 19400 45400 1 90 0 resistor-1.sym
{
T 19100 45600 5 10 1 1 90 0 1
refdes=R106
T 19500 45800 5 10 1 1 0 0 1
value=1k
}
C 20400 43300 1 180 0 resistor-1.sym
{
T 20100 43500 5 10 1 1 180 0 1
refdes=R107
T 19600 43600 5 10 1 1 0 0 1
value=27k
}
N 19500 47700 19300 47700 4
N 19300 47700 19300 46300 4
{
T 18900 47400 5 10 1 1 0 0 1
netname=fb1
}
N 19500 42500 19300 42500 4
N 19300 42500 19300 44200 4
{
T 18900 43100 5 10 1 1 0 0 1
netname=fb2
}
N 19300 47100 19500 47100 4
N 19300 43200 19500 43200 4
N 20500 47900 20500 47100 4
N 20500 47100 20400 47100 4
N 20400 43200 20500 43200 4
N 20500 43200 20500 42300 4
C 21600 42400 1 180 0 resistor-1.sym
{
T 21400 42100 5 10 1 1 180 0 1
refdes=R108
T 20900 41800 5 10 1 1 0 0 1
value=27k
}
C 21600 48000 1 180 0 resistor-1.sym
{
T 21400 47700 5 10 1 1 180 0 1
refdes=R109
T 20900 47400 5 10 1 1 0 0 1
value=27k
}
N 20500 47900 20700 47900 4
{
T 20400 48200 5 10 1 1 0 0 1
netname=3
}
N 20500 42300 20700 42300 4
{
T 20600 42600 5 10 1 1 0 0 1
netname=4
}
N 18400 47200 18400 43000 4
N 2 42700 2 42800 4
{
T 19700 42900 5 10 1 1 0 0 1
netname=Vdd
}
N 2 41800 2 41900 4
{
T 20200 41700 5 10 1 1 0 0 1
netname=Vcc
}
N 2 47400 2 47500 4
{
T 20200 47300 5 10 1 1 0 0 1
netname=Vdd
}
N 2 48300 2 48400 4
{
T 20100 48500 5 10 1 1 0 0 1
netname=Vcc
}
C 29400 45100 1 180 0 resistor-1.sym
{
T 29200 44800 5 10 1 1 180 0 1
refdes=R115
T 28800 44500 5 10 1 1 0 0 1
value=27k
}
N 28300 45000 28500 45000 4
N 29600 45800 29600 45000 4
N 28300 45600 28300 44700 4
N 29000 45300 29000 45400 4
{
T 29100 45200 5 10 1 1 0 0 1
netname=Vdd
}
N 29000 46200 29000 46300 4
{
T 29100 46400 5 10 1 1 0 0 1
netname=Vcc
}
N 28300 43200 28300 43800 4
{
T 28500 43200 5 10 1 1 0 0 1
netname=GND
}
C 28900 49100 1 270 1 capacitor-1.sym
{
T 28700 49200 5 10 1 1 90 2 1
refdes=C103
T 29800 49300 5 10 0 0 90 2 1
symversion=0.1
T 28800 49800 5 10 1 1 0 0 1
value=1uf
}
C 31200 45900 1 180 0 resistor-1.sym
{
T 31000 45600 5 10 1 1 180 0 1
refdes=R117
T 30500 45300 5 10 1 1 0 0 1
value=47
}
N 31200 45800 31400 45800 4
{
T 31300 45900 5 10 1 1 0 0 1
netname=Vout
}
C 29600 48800 1 0 0 vdc-1.sym
{
T 30300 49450 5 10 1 1 0 0 1
refdes=V101
T 30300 49250 5 10 1 1 0 0 1
value=DC 6V
}
C 15700 46800 1 0 0 vsin-1.sym
{
T 16400 47450 5 10 1 1 0 0 1
refdes=V102
T 16400 47250 5 10 1 1 0 0 1
value=sin 0 1e-5 1khz
}
C 15700 42300 1 0 0 vsin-1.sym
{
T 16500 42850 5 10 1 1 0 0 1
refdes=V103
T 16300 42550 5 10 1 1 0 0 1
value=sin 0 1e-5 1khz
}
N 16000 48100 19500 48100 4
{
T 16300 48200 5 10 1 1 0 0 1
netname=1
}
N 16000 48100 16000 48000 4
N 16000 42100 19500 42100 4
{
T 16400 41800 5 10 1 1 0 0 1
netname=2
}
N 16000 42100 16000 42300 4
N 16000 46800 16000 43500 4
N 16000 45600 18400 45600 4
{
T 16100 45700 5 10 1 1 0 0 1
netname=GND
}
N 29600 45000 29400 45000 4
N 29500 45800 30300 45800 4
{
T 29600 46000 5 10 1 1 0 0 1
netname=9
}
T 24300 45700 9 10 1 0 0 0 1
100 ft. Twisted Pair (CAT-5)
C 

Re: gEDA-user: Zero length pins

2010-09-28 Thread Ineiev
On 9/28/10, kai-martin knaak k...@familieknaak.de wrote:

 So flexible, that it can't deal properly with µ and ?, let alone
 right to left scripting, or Chinese.

What do you mean? gschem renders both Arabic and Chinese texts
without visible problems.


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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
Kai-Martin Knaak:
 Karl Hammar wrote:
  Shall we update the distributed sym files so they pass gsymcheck ?
 Yes, please.
..
  Should a missing numslots=0 really be a warning?
...
 ack. It has been quite some time that numslots=0 is not necessary 
 anymore.

Ok, a first step would then be:

 1, add/correct pintype to the sym files
  1a, which programs use pintype
  1b, identify the correct meaning of pintype values as used today
  1c, add missing pintypes (eg. should we have one for nc)
 2, remove numslots=0 warning from gsymcheck

Anything else?

Regards,
/Karl




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
Karl:
 Kai-Martin Knaak:
  Karl Hammar wrote:
   Shall we update the distributed sym files so they pass gsymcheck ?
  Yes, please.
 ..
   Should a missing numslots=0 really be a warning?
 ...
  ack. It has been quite some time that numslots=0 is not necessary 
  anymore.
 
 Ok, a first step would then be:
 
  1, add/correct pintype to the sym files
   1a, which programs use pintype
...

  By doing:

$ find . -type f | grep -v '\.sym$' | grep -v '\.o$' | grep -v '^./docs/' | 
xargs grep pintype | grep -v ^Binary | cut -f1 -d: | sort -u | cut -f2 -d/ | 
sort -u
gnetlist
gschem
gsymcheck
symbols
utils

I see that the word pintype is used somewhere in the directories 
above.

gnetlist:
 drc2 seems to be the only user here
gchem:
 gschem/lib/system-gschemrc.in, can be ignored for this discussion
gsymcheck:
 gsymcheck/src/s_check.c only checks valid values, but don't use them
symbols:
 just a changelog
utils:
 in utils I find pintype in:

 ./utils/scripts/gsymfix.pl
just sets pintype=io if none exists, which is in conflict
with system-sschemrc.in which says that the default pintype
is unknown

 ./utils/scripts/gsymupdate
just converts from pre 2002 file format

 ./utils/scripts/sarlacc_sym
is an orcad text lib to sym converter

 ./utils/scripts/tragesym
makes sym files, not a user

 ./utils/src/convert_sym.c
viewlogic to sym converter

 ./utils/src/geda_sym_format.h
used by olib.c

 ./utils/src/gmk_sym.c
sym file creator

 ./utils/src/olib.c
 ./utils/src/olib.l
orcad to sym converter

***

Soo, from what I can see,
 drc2 is the only user of the pintype
 gsymcheck checks for valid pintype values

and that means that drc2 defines the semantic of the values.

Regards,
/Karl Hammar

-
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57




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Re: gEDA-user: improved footprint for MSOP10

2010-09-28 Thread Armin Faltl

Currently this may be too much of an honor - I have about no time
to maintain that space. Furthermore I'm satisfied with my name
as author, if a footprint makes it into the general library.

Kai-Martin Knaak wrote:

Armin Faltl wrote:

  

since the library version footprint MSOP10.fp seems to be
very unprecise, I made my own, which is included below.



How about an Armin_Faltl section in http://www.gedasymbols.org/ ?

---)kaimartin(---
  



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Re: gEDA-user: gschem sym files

2010-09-28 Thread Andrew Miner


-Original Message-
 Karl Hammar wrote 
 Ok, a first step would then be:

 1, add/correct pintype to the sym files
  1a, which programs use pintype
  1b, identify the correct meaning of pintype values as used today
  1c, add missing pintypes (eg. should we have one for nc)
 2, remove numslots=0 warning from gsymcheck

 Anything else?

+1 for nc since ICs have pins that are labeled that way.  Would the DRC just
ignore it, or would the DRC complain if it was connected to anything?  I
could see people still wanting to connect a nc pin to a test point or a
header because they want to check for shorts, or if there is a chip rev that
adds extra functionality to that pin in a package.   

I would also like to see a pwr_src pin type which would be the output of the
voltage regulator (or source).  That way the DRC would warn you if you
shorted two power sources together or if you forgot to hook one of your
power input pins to the power plane (and only connected it to a capacitor
instead).

Andy Miner




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
 Kai-Martin Knaak:
  Karl Hammar wrote:
   Shall we update the distributed sym files so they pass gsymcheck ?
  Yes, please.
 ..
   Should a missing numslots=0 really be a warning?
 ...
  ack. It has been quite some time that numslots=0 is not necessary 
  anymore.
 
 Ok, a first step would then be:
 
  1, add/correct pintype to the sym files
   1a, which programs use pintype
   1b, identify the correct meaning of pintype values as used today

Since drc2 is the only user of the pintype value, I looked into it.
There is no semantic definitions there, only what can be connected to
what and that is defined by

 pintype-can-drive: which pintypes can drive a net
 drc-matrix: which pintypes that can connect to each other

Note A,
 since drc-matrix is symmetric (connection a - b is the
 same as connection b - a) and it is not directly referenced by 
 anything else than get-drc-matrixelement, I suggest we do it lower 
 triangular and let get-drc-matrix-element swap row/column if
 row  column. As a side effect the drc2:is_simetric-drc-matrix
 check could be elimated.

Note B,
 unknown, in and pas rows/columns has the same content.
 out and tp has the same content.
 Do we really need multiple pintypes to say the same thing?

Note C, since pintype is only used to test for allowed connections
 then maybe pintype is the wrong name for it.

Note D, since unconnected seems to be for internal use only,
 drc2 should reject it on input.

Regards,
/Karl Hammar

-
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
Andrew Miner:
  Karl Hammar wrote 
...
   1c, add missing pintypes (eg. should we have one for nc)
...
 +1 for nc since ICs have pins that are labeled that way.  Would the DRC just
 ignore it, or would the DRC complain if it was connected to anything?
...
Since nc is just a piece of copper attached to the (plastic/ceramic) 
package, why should drc complain?

A nc pin would be like pas, but gives no error if unconnected.

 I would also like to see a pwr_src pin type which would be the output of the
 voltage regulator (or source).  That way the DRC would warn you if you
 shorted two power sources together or if you forgot to hook one of your
 power input pins to the power plane (and only connected it to a capacitor
 instead).

+1

That would translate to:
 max one pwr_src per net

Regards,
/Karl Hammar

-
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
Karl:
1b, identify the correct meaning of pintype values as used today
 
 Since drc2 is the only user of the pintype value, I looked into it.
...
 Note A,
  since drc-matrix is symmetric (connection a - b is the
  same as connection b - a) and it is not directly referenced by 
  anything else than get-drc-matrixelement, I suggest we do it lower 
  triangular and let get-drc-matrix-element swap row/column if
  row  column. As a side effect the drc2:is_simetric-drc-matrix
  check could be elimated.
...

Patch attached.

Regards,
/Karl Hammar

-
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57

diff --git a/gnetlist/scheme/gnet-drc2.scm b/gnetlist/scheme/gnet-drc2.scm
index a72f2a4..62e9fdc 100644
--- a/gnetlist/scheme/gnet-drc2.scm
+++ b/gnetlist/scheme/gnet-drc2.scm
@@ -219,27 +219,27 @@
 ;  Order is important !
 ; unknown inout   ioocoepas   tptri   clk   pwr unconnected
 ;unknown
-  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\e )
+  '(#\c )
 ;in
-  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\e )
+  '(#\c   #\c   )
 ;out
-  '(#\c   #\c   #\e   #\w   #\e   #\e   #\c   #\e   #\e   #\c   #\e   #\e )
+  '(#\c   #\c   #\e   )
 ;io
-  '(#\c   #\c   #\w   #\c   #\w   #\w   #\c   #\w   #\c   #\c   #\w   #\e )
+  '(#\c   #\c   #\w   #\c   )
 ;oc
-  '(#\c   #\c   #\e   #\w   #\e   #\c   #\c   #\e   #\c   #\c   #\e   #\e )
+  '(#\c   #\c   #\e   #\w   #\e   )
 ;oe
-  '(#\c   #\c   #\e   #\w   #\c   #\e   #\c   #\e   #\c   #\c   #\e   #\e )
+  '(#\c   #\c   #\e   #\w   #\c   #\e   )
 ;pas
-  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\e )
+  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   )
 ;tp
-  '(#\c   #\c   #\e   #\w   #\e   #\e   #\c   #\e   #\e   #\c   #\e   #\e )
+  '(#\c   #\c   #\e   #\w   #\e   #\e   #\c   #\e   )
 ;tri
-  '(#\c   #\c   #\e   #\c   #\c   #\c   #\c   #\e   #\c   #\c   #\e   #\e )
+  '(#\c   #\c   #\e   #\c   #\c   #\c   #\c   #\e   #\c   )
 ;clk
-  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\e   #\e )
+  '(#\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   #\c   )
 ;pwr
-  '(#\c   #\c   #\e   #\w   #\e   #\e   #\c   #\e   #\e   #\e   #\c   #\e )
+  '(#\c   #\c   #\e   #\w   #\e   #\e   #\c   #\e   #\e   #\e   #\c  )
 ;unconnected
   '(#\e   #\e   #\e   #\e   #\e   #\e   #\e   #\e   #\e   #\e   #\e   #\e )
 )))
@@ -284,7 +284,9 @@
 ; Get value x y from matrix
 (define drc2:get-drc-matrix-element
   (lambda (row column)
-	  (list-ref (list-ref drc-matrix row) column)))
+(if ( row column)
+	(list-ref (list-ref drc-matrix column) row)
+	(list-ref (list-ref drc-matrix row) column
   
 ; Check if all elements of the DRC matrix are characters
 (define drc2:drc-matrix-elements-are-correct?
@@ -306,27 +308,6 @@
   
 ))
 
-; Check if the DRC matrix is simetric.
-(define drc2:is-simetric-drc-matrix
-  (lambda ()
-(let check-row ((row 1))
-  (if (let check-column ((column 0))
-	(if (not (eqv? (drc2:get-drc-matrix-element row column)
-			   (drc2:get-drc-matrix-element column row)))
-		#f
-		(if ( column (- row 1))
-		(check-column (+ column 1)) 		
-		#t)
-		)
-	)
-	  (if ( row (- (length pintype-names) 1))
-	  (check-row (+ row 1)) 
-	  #t)	  
-	 #f)
-  )
-  
-))
-	  
 ;
 ; End of DRC matrix functions
 ;---
@@ -924,12 +905,6 @@
  (begin
 		
 	;; Perform DRC-matrix sanity checks.
-	; See if the matrix is simetric.
-	(if (not (drc2:is-simetric-drc-matrix))
-		(begin (display INTERNAL ERROR: DRC matrix is NOT simetric. port)
-		   (newline port)
-		   (newline port)
-		   (error INTERNAL ERROR. DRC matrix is NOT simetric)))
 	; See if all elements of the matrix are chars
 	(if (not (drc2:drc-matrix-elements-are-correct?))
 		(begin (display INTERNAL ERROR: DRC matrix elements are NOT all chars. port)

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Re: gEDA-user: improved footprint for MSOP10

2010-09-28 Thread Kai-Martin Knaak
Armin Faltl wrote:

 Furthermore I'm satisfied with my name
 as author, if a footprint makes it into the general library.

Currently, no footprint makes it to the default lib ...

---)kaimartin(--- 
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get



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Re: gEDA-user: gschem sym files

2010-09-28 Thread Kai-Martin Knaak
Karl Hammar wrote:

  1, add/correct pintype to the sym files
   1a, which programs use pintype
   1b, identify the correct meaning of pintype values as used today
   1c, add missing pintypes (eg. should we have one for nc)
  2, remove numslots=0 warning from gsymcheck
 
 Anything else?

3, remove numslots=0 from all symbols in the default library

4, add explicit documentation on the rules in the wiki

5, add a tutorial on how to adapt the DRC rules to the local needs

6, add some kind of GUI control to activate/deactivate rules

7, add a way to ignore to ignore specific violations

You asked for it :-)

---)kaimrtin(---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get



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Re: gEDA-user: (hierarchy-uref-mangle disabled) doesn't seem to work when generting a bom

2010-09-28 Thread Patrick Bernaud
Hi Mike,

Mike Crowe writes:
  [...]
  The separator appears to be important even if it is disabled by 
  (hierarchy-uref-mangle disabled)

Indeed, the hierarchy-uref-separator is ignored when it comes to
separating base uref from full uref with hierarchy. 

The patch below fixes that problem.

Regards,


Patrick



gnetlist-use-uref-with-hierarchy-separator
Description: Binary data


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gEDA-user: CVS server of gedasymbols down?

2010-09-28 Thread Kai-Martin Knaak
Just tried to update my repository at gedasymbols.org. Turns out, the server 
does not respond. No ping either.
The www page is working, though. 

Any idea whats going on?

---)kaimartin(--- 
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
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Re: gEDA-user: gEDA and PCB at DVClub UK - thanks, Chitlesh

2010-09-28 Thread Chitlesh GOORAH
On Mon, Sep 20, 2010 at 2:27 PM, Gareth Edwards
gar...@edwardsfamily.org.uk wrote:
 I'm sitting listening to the UK DVClub meeting and Chitlesh Goorah is
 doing an excellent job of talking about Free Electronics Lab,
 including gEDA and PCB.

 Well done, Chitlesh and thanks for helping to promote FOSS to the
 professional community.


Thank you.

You can find the slides on http://www.tandvsolns.co.uk/downloads/

regards,
Chitlesh


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Re: gEDA-user: CVS server of gedasymbols down?

2010-09-28 Thread DJ Delorie

 Just tried to update my repository at gedasymbols.org. Turns out,
 the server does not respond. No ping either.  The www page is
 working, though.

ISP problems.  There are *two* WWW servers, but only one of everything
else.


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Re: gEDA-user: very backward time step?

2010-09-28 Thread Chitlesh GOORAH
On Thu, Sep 23, 2010 at 2:52 PM, al davis   wrote:
 It is important to developers that the unstable distros DO
 package the development branch, to test it and provide feedback.
 Hamish and Chitlesh, how about it?


Ok, I'll try to update Fedora's gnucap this weekend.
I've taken over the ownership from the previous fedora packager.

Chitlesh


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Re: gEDA-user: gschem sym files

2010-09-28 Thread John Doty

On Sep 28, 2010, at 12:39 PM, Karl Hammar wrote:

 In gnet-drc2.scm:
 
 ;; Example:
 ;; (define dont-check-non-numbered-parts 1)
 ;; (define dont-check-duplicated-references 1)
 ;; (define dont-check-one-connection-nets 1)
 ;; (define dont-report-unknown-pintypes 1)
 ;; (define dont-check-pintypes-of-nets 1)
 ;; (define dont-check-not-driven-nets 1)
 ;; (define dont-check-unconnected-pins 1)
 ;; (define dont-check-duplicated-slots 1)
 ;; (define dont-check-unused-slots 1)
 ;; (define action-unused-slots #\w)
 ;; (define case_insensitive 1)
 
 and there is also descriptions how to alter what is allowed to
 connect to what in the file. The problem seems to get that inside
 
 gnetlist -g drc2 ... 
 
 unless you edit the /usr/share/gEDA/scheme/gnet-drc2.scm (or similar) 
 file.

You can put the definitions you need into a file in your project, and load it 
with the -l flag to gnetlist. See the gnetlist man page.

John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Karl Hammar
 Kai-Martin Knaak:
  Karl Hammar wrote:
...
   Should a missing numslots=0 really be a warning?
  ack. It has been quite some time that numslots=0 is not necessary 
  anymore.
...
  2, remove numslots=0 warning from gsymcheck

Attached patch does that.

Regards,
/Karl Hammar

-
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57

diff --git a/gsymcheck/src/s_check.c b/gsymcheck/src/s_check.c
index d66106f..fd78ca7 100644
--- a/gsymcheck/src/s_check.c
+++ b/gsymcheck/src/s_check.c
@@ -793,10 +793,12 @@ s_check_slotdef (const GList *obj_list, SYMCHECK *s_current)
   value = o_attrib_search_floating_attribs_by_name (obj_list, numslots, 0);
 
   if (!value) {
+/*
 message = g_strdup (Did not find numslots= attribute, not checking slotting\n);
 s_current-warning_messages = g_list_append(s_current-warning_messages,
 message);
 s_current-warning_count++;
+*/
 message = g_strdup (If this symbol does not need slotting, set numslots to zero (numslots=0)\n);
 s_current-info_messages = g_list_append(s_current-info_messages,
  message);

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Re: gEDA-user: gEDA and PCB at DVClub UK - thanks, Chitlesh

2010-09-28 Thread Gareth Edwards
Hi Chitlesh

On 28 September 2010 19:03, Chitlesh GOORAH chitlesh.goo...@gmail.com wrote:
 You can find the slides on http://www.tandvsolns.co.uk/downloads/

Would you mind if I re-presented your slideset to our Hackerspace
(below in .sig)? I'm sure most of the members don't know that half of
these tools even exist.

Cheers
Gareth

--
Edinburgh Hacklab
http://wiki.edinburghhacklab.com/


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Re: gEDA-user: CVS server of gedasymbols down?

2010-09-28 Thread Kai-Martin Knaak
DJ Delorie wrote:

 ISP problems.  There are *two* WWW servers, but only one of everything
 else.

It is working again. :-)

---)kaiamrtin(---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get



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Re: gEDA-user: gschem sym files

2010-09-28 Thread Steven Michalske

On Sep 28, 2010, at 6:00 AM, Andrew Miner wrote:

  would also like to see a pwr_src pin type which would be the output of the
 voltage regulator (or source).  That way the DRC would warn you if you
 shorted two power sources together or if you forgot to hook one of your
 power input pins to the power plane (and only connected it to a capacitor
 instead).


This might be made more general

if a pin type has _src appended then it is a source
and if _load is appended it is a consumer.


it might be good to have some other attributes concerining power pins

Side note:
A capabilities attribute that might get a string like 'Current_RMS_supply=1A; 
current_peak_supply=1...@0.5s'




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Re: gEDA-user: gschem sym files

2010-09-28 Thread Steven Michalske

On Sep 28, 2010, at 6:32 AM, Karl Hammar wrote:

 Since nc is just a piece of copper attached to the (plastic/ceramic) 
 package, why should drc complain?
 
 A nc pin would be like pas, but gives no error if unconnected.

This is not a true statement, some packages there are Do not connect,  some 
packages these are not internally connected.

Big difference.  (the NC pins that are do not connect are sometimes programming 
or fuse blowing pins that only the chip manufacture uses.

Steve


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gEDA-user: PCB: Change default file-filter in open-dialog

2010-09-28 Thread Felix Ruoff

 Hello,

I wondered, why the file-filter at the open-dialogs of pcb is not 
selected by default. For me, it is more comfortable if there are just 
the files shown, which can be loaded by this programm/function. I have 
also looked at other software and most of them do this this way (the 
only one I found which shows all files by default is OpenOffice.org).


I appended a patch which changes this behaviour.

Any comments are welcome!

Felix

@The main developers: I do not send this patch to the 
sourceforge-patch-tracker now because I think, this Patch is not really 
essential. If it is easier for you if I send all my patches to the 
tracker, please send me a message and I will add this one (and all later 
patches)!
diff --git a/src/hid/gtk/gui-dialog.c b/src/hid/gtk/gui-dialog.c
index ec91233..6671758 100644
--- a/src/hid/gtk/gui-dialog.c
+++ b/src/hid/gtk/gui-dialog.c
@@ -280,13 +280,6 @@ ghid_dialog_file_select_open (gchar * title, gchar ** path, gchar * shortcuts)
 
   gtk_dialog_set_default_response (GTK_DIALOG (dialog), GTK_RESPONSE_OK);
 
-  /* add a default filter for not filtering files */
-  no_filter = gtk_file_filter_new ();
-  gtk_file_filter_set_name (no_filter, all);
-  gtk_file_filter_add_pattern (no_filter, *.*);
-  gtk_file_filter_add_pattern (no_filter, *);
-  gtk_file_chooser_add_filter (GTK_FILE_CHOOSER (dialog), no_filter);
-
   /* in case we have a dialog for loading a footprint file */
   if (strcmp (title, _(Load element to buffer)) == 0)
   {
@@ -326,6 +319,13 @@ ghid_dialog_file_select_open (gchar * title, gchar ** path, gchar * shortcuts)
 gtk_file_filter_add_pattern (net_filter, *.NET);
 gtk_file_chooser_add_filter (GTK_FILE_CHOOSER (dialog), net_filter);
   }
+  
+  /* add a default filter for not filtering files */
+  no_filter = gtk_file_filter_new ();
+  gtk_file_filter_set_name (no_filter, all);
+  gtk_file_filter_add_pattern (no_filter, *.*);
+  gtk_file_filter_add_pattern (no_filter, *);
+  gtk_file_chooser_add_filter (GTK_FILE_CHOOSER (dialog), no_filter);
 
   if (path  *path)
 gtk_file_chooser_set_current_folder (GTK_FILE_CHOOSER (dialog), *path);


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gEDA-user: pcb opengl: ps export malformed

2010-09-28 Thread Krzysztof Kościuszkiewicz
Hello,

It seems in Peter's pcb branch ps export does not work as intended.

For a 2-layer board both front and back copper layers are exported
twice, as indicated by console output during export.  When using
multifile export the *.front.ps and *.back.ps files look like the
assembly drawings, and *assembly.ps files contain image of an empty
board.

If using a single-file output two additional pages are printed with same
effect (empty assembly drawings).

In the original pcb (git HEAD) the problem is not present.

Best regards,
-- 
Krzysztof Kościuszkiewicz
Simplicity is the ultimate sophistication -- Leonardo da Vinci


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Re: gEDA-user: PCB: Change default file-filter in open-dialog

2010-09-28 Thread DJ Delorie

Please send all patches to the tracker even if you post them online,
so that there's less chance of them getting lost and forgotten.


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Re: gEDA-user: new footprint guidelines

2010-09-28 Thread Armin Faltl
For all those, that follow the discussion from here or vaguely remember 
some other rotations:


Rick Collins wrote:
I had to go through all this some time ago and recently I wanted to 
iron out all the difficulties so that the assembly house could use my 
XYRS file (location and rotation data) directly without alteration.  
That ended up being a fool's errand, but I did learn a few things.  
IPC has a standard for this which everyone seems to use.  For two 
pin symmetrical parts, pin one is to the left.  For IC type parts, pin 
one is in the upper left quadrant for parts with pin one in a corner 
or for parts where pin one is in the center of a side pin one is on 
the upper most side.  This is the zero degree rotation point for the 
part.  All rotations are counter-clockwise from this position.
on 2010-08-15 Rick wrote in thread 'Specification of Rotations for Auto 
Assembly':
I just found something that changes what I thought I knew.  I have a 
PDF of an IPC magazine from 2005 where they are touting a leap forward 
in land pattern generation.  An illustration showing pin 1 in the upper 
left for SOT components is what I used as my reference.  That and the 
post in the FreePCB forum of a normally very reliable source.  But I 
found a copy of IPC-7351 and it clearly says that for SOT and most other 
IC parts, the original rotation is with pin 1 in the LOWER left.  That 
is what FreePCB does in the library editor by default. 


This isn't Ricks fault: reading the 2005 IPC-7351 I can confirm this, 
while the 2009 IPC-7351B says,

that pin 1 is in the upper left corner ;-)
Shall I comment on this ? I'll just use upper left...



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Re: gEDA-user: PCB: Change default file-filter in open-dialog

2010-09-28 Thread Felix Ruoff

 Done.
Thanks for the message!

Am 28.09.2010 22:43, schrieb DJ Delorie:

Please send all patches to the tracker even if you post them online,
so that there's less chance of them getting lost and forgotten.


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Re: gEDA-user: gschem sym files

2010-09-28 Thread Edward Hennessy
On Sep 28, 2010, at 12:59 PM, Steven Michalske smichal...@gmail.com wrote:

 
 On Sep 28, 2010, at 6:00 AM, Andrew Miner wrote:
 
 would also like to see a pwr_src pin type which would be the output of the
 voltage regulator (or source).  That way the DRC would warn you if you
 shorted two power sources together or if you forgot to hook one of your
 power input pins to the power plane (and only connected it to a capacitor
 instead).
 
 
 This might be made more general
 
 if a pin type has _src appended then it is a source
 and if _load is appended it is a consumer.
 
 
 it might be good to have some other attributes concerining power pins
 
 Side note:
 A capabilities attribute that might get a string like 'Current_RMS_supply=1A; 
 current_peak_supply=1...@0.5s'

It would be nice to have an attribute to check if a power pin is connected to 
the proper supply voltage.

Ed


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Re: gEDA-user: gschem sym files

2010-09-28 Thread Steven Michalske

On Sep 28, 2010, at 2:30 PM, Edward Hennessy wrote:

 Side note:
 A capabilities attribute that might get a string like 
 'Current_RMS_supply=1A; current_peak_supply=1...@0.5s'
 
 It would be nice to have an attribute to check if a power pin is connected to 
 the proper supply voltage.


The intent was that capabilities would be a set of key value pairs that could 
be processed, and that almost anything would go there.

The symbol would be a good place to put the tolerance of inputs,  like a 3.3 
volt part with 5 Volt tolerant inputs, default on the logic levels of the 
symbol, but overrides could exist on pins,  some parts have pins that are 5 
volt tolerant and others that are isolated for 1000's of volts.

Steve


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Re: gEDA-user: gnetlist segmentation fault

2010-09-28 Thread kai-martin knaak
Thomas Dean wrote:

 I have an application which causes a seg fault in gnetlist.  I think
 this can be fixed by changing the schematic. 

The offending symbol is A103 which refers to spice-include-1.sym
The symbol  contains a spurious attribute netname= with no value.


 But, Segmentation fault is NEVER the proper response.

The gsch2pcb back-end does not segfault but fails with:
 At least gnetlist 20030901 is required for m4-xxx options.
Looks like this is another incarnation of the infamous m4 parsing 
failure, that has been haunting geda users for years now.

 ulf-ant.sch=
 v 20100214 2
 C 19500 47500 1 0 0 lf353-1.sym
 {
(...)

 T 24300 45700 9 10 1 0 0 0 1
 100 ft. Twisted Pair (CAT-5)
 C 20500 49700 1 0 0 spice-include-1.sym
 {
 T 20600 50100 5 10 1 1 0 0 1
 refdes=A102
 T 21000 49800 5 10 1 1 0 0 1
 file=ad797.cir
 T 20500 49700 5 10 1 0 0 0 1
 netname=
 }
(...) 

I guess, the = at the end of the string is the trigger. If the 
attribute contains just a single letter, gnetlist is happy with the 
file. How did you manage to add the empty netlist attribute? IMHO, the 
attribute editor in the GUI ties to prevent empty string values.

Bottom line: The gnetlist really needs to be more fussy on the syntax. 
Currently it seems to assume m4 where there isn't. In addition, m4 
should fail gracefully rather than returning broken strings. 

---)kaimartin(---
-- 
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
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Re: gEDA-user: new footprint guidelines

2010-09-28 Thread Rick Collins

At 04:53 PM 9/28/2010, you wrote:
For all those, that follow the discussion from here or vaguely 
remember some other rotations:


Rick Collins wrote:
I had to go through all this some time ago and recently I wanted to 
iron out all the difficulties so that the assembly house could use 
my XYRS file (location and rotation data) directly without alteration.

That ended up being a fool's errand, but I did learn a few things.
IPC has a standard for this which everyone seems to use.  For two 
pin symmetrical parts, pin one is to the left.  For IC type parts, 
pin one is in the upper left quadrant for parts with pin one in a 
corner or for parts where pin one is in the center of a side pin 
one is on the upper most side.  This is the zero degree rotation 
point for the part.  All rotations are counter-clockwise from this position.
on 2010-08-15 Rick wrote in thread 'Specification of Rotations for 
Auto Assembly':
I just found something that changes what I thought I knew.  I have 
a PDF of an IPC magazine from 2005 where they are touting a leap 
forward in land pattern generation.  An illustration showing pin 1 
in the upper left for SOT components is what I used as my 
reference.  That and the post in the FreePCB forum of a normally 
very reliable source.  But I found a copy of IPC-7351 and it clearly 
says that for SOT and most other IC parts, the original rotation is 
with pin 1 in the LOWER left.  That is what FreePCB does in the 
library editor by default. 


This isn't Ricks fault: reading the 2005 IPC-7351 I can confirm 
this, while the 2009 IPC-7351B says,

that pin 1 is in the upper left corner ;-)
Shall I comment on this ? I'll just use upper left...


I'm not sure what you are saying.  Did you have a point you wanted to make?

I went through a very lengthy search for a rational basis for picking 
a standard.  Virtually no one seemed to actually know the source of 
the standard they used or what anyone else was using.  It seems like 
the board fab and assembly business is full of cowboys who just want 
to make the current project work rather than to figure out a system 
that would help everyone.  In the end I found that the incorrect 
IPC-7351 that I found was an initial short form version from 2003, 
limited to naming conventions and a brief listing of pin 1 
orientations, not a full spec.  I had also found some other materials 
that had wrong information attributed to IPC-7351, but not official 
(dated in 2003).  The officially released standard came out after, in 
February 2005, with the pin 1 orientation of all ICs either in the 
top left or the top.  Without knowing the whys, I can see that 
IPC-7351 seems to be what is more supported than anything else.  IPC 
claims that IPC-7351 matches EIAJ/ANSI 481C.  I have not found an 
official copy of IPC-7351 that shows any other orientation than what 
was stated.  If you have an official copy of the released IPC-7351 
spec that says pin 1 of ICs is anywhere other than top or top left, I 
would like to see it.


Rick 




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Re: gEDA-user: gnetlist segmentation fault

2010-09-28 Thread Thomas D. Dean
On Wed, 2010-09-29 at 01:19 +0200, kai-martin knaak wrote:
I believe this started with gschem.

However, I repeat, seg fault is NEVER a proper response.

tomdean



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Re: gEDA-user: gnetlist segmentation fault

2010-09-28 Thread John Doty

On Sep 28, 2010, at 5:19 PM, kai-martin knaak wrote:

 Bottom line: The gnetlist really needs to be more fussy on the syntax. 
 Currently it seems to assume m4 where there isn't. In addition, m4 
 should fail gracefully rather than returning broken strings. 

Huh? Gnetlist has nothing to do with m4. M4's tricky relationship with pcb 
causes trouble, but that's pcb's problem.

This is a coding error somewhere. There should be nothing wrong with an empty 
string as an attribute: it's a perfectly good string.

John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com




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Re: gEDA-user: Zero length pins

2010-09-28 Thread kai-martin knaak
John Doty wrote:

 Unattached, it looks like a little red flag, while with a net
 attached it disappears. Gnetlist has no trouble treating it as
 a pin.

By the way, on start-up, gschem complains about zero size pins in the 
log window. IMHO, this check should be removed.


 You have my permission, although I am queasy about how the
 documentation is evolving.

The part of the wiki I added the note to, i Same with the chinese 
characters.
s not the documentation. It is meant to complement the documentation. 
The FAQ works more like a knowledge base than like a manual. 


 One of the things that attracted me to gEDA years ago was how
 clean and concise the documentation was.

Coincidently, some of the my most frustrating experiences with geda/pcb 
were due to a lack of readily available documentation ;-)
 

 Works fine with UTF-8 characters, although I don't know how to
 make it work right to left or top to bottom.

Well, Hebrew left to right is like Latin script written backwards. 
Also, try to make auto number use Japanese digits...


 Multi line text cannot be 
 centered or flushed to the right.
 
 Fancy word processing features should not be included in a
 schematic drawing program. They are a distraction.

Text alignment is hardly fancy word processing. Decent looking comments 
are a requirement when it comes to incorporate a schematic in public 
documents. Think PHD thesis, presentations, manuals, proposals...


 Support for unusual graphics does not belong in gschem. They
 can be imported in the rare cases they are needed.

A company logo is not exactly a rare case. Also, publication quality 
symbols are more like fonts than like stick drawings.

 
 Well, I just drew the following, which would claim is impossible:

Well, an imported pixel format does not exactly fit to the workflow of 
an otherwise completely vectorized suite. For example, printing to PDF 
via cups-pdf barfs on PNGs. 

Real flexibility would allow to include vector graphics and/or a way to 
do formulas. The way xfig incorporates LaTeX may be worth a closer 
look.

---)kaimartin(---
-- 
Kai-Martin Knaak
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Re: gEDA-user: gschem sym files

2010-09-28 Thread kai-martin knaak
Karl Hammar wrote:

 4, add explicit documentation on the rules in the wiki
 
 I'm not the wiki man. I could read the code (I assume you mean drc2)
 and try to describe it in text, but someone else has to enter it 
 into the wiki.

Ok, if you describe the rules here on the list, I'd volunteer to infuse 
it at an appropriate place in the wiki. 

 
 5, add a tutorial on how to adapt the DRC rules to the local needs
 
 From what I can see you have to learn scheme for that.

Well documented examples would take me a long way.


 Can you give exaples of local needs?

Some people like consider any not connected pin an error, others would 
only expect a warning. Some might find not connected pins completely 
acceptable and consequently find errors and warnings annoying. Digital 
enthusiasts may add special pin types for different signal levels. 
Analog designers might find it perfectly acceptable to connect pwr to 
in pins.

 
 6, add some kind of GUI control to activate/deactivate rules
 
 Gui things are for others to contribute with, but maybe if we could 
 make drc2 react on some attributes?

How about an attribute to the connecting net to silence drc2 at this 
specific place?


 7, add a way to ignore to ignore specific violations
 
 In gnet-drc2.scm:
 
 ;; Example:
 ;; (define dont-check-non-numbered-parts 1)

I meant, specific instances within the circuit. Sometimes I 
deliberately connect power nets to input pins. There should 
be a way to tell drc2 that this it should not complain in 
this special instance. But it should still alert me about
power-input violations everywhere else. 


 BTW, your job could be to test the patches and see to that they gets 
 applied!

I'll put them to a test on friday. (No much free cycles until then)

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Re: gEDA-user: gschem sym files

2010-09-28 Thread kai-martin knaak
Karl Hammar wrote:

 That way the DRC would warn you if you
 shorted two power sources together or if you forgot to hook one of 
your
 power input pins to the power plane (and only connected it to a 
capacitor
 instead).
 
 +1
 
+1 
Just today I had a student stumble on an accidental connection of two 
power nets while doing the layout. Had he been less alert or just fired 
the auto router, there would have been an incidence of magic smoke...

---)kaimartin(---
-- 
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53



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Re: gEDA-user: PCB: Change default file-filter in open-dialog

2010-09-28 Thread Bert Timmerman
Hi Felix, 

 -Original Message-
 From: geda-user-boun...@moria.seul.org 
 [mailto:geda-user-boun...@moria.seul.org] On Behalf Of Felix Ruoff
 Sent: Tuesday, September 28, 2010 10:35 PM
 To: gEDA user mailing list
 Subject: gEDA-user: PCB: Change default file-filter in open-dialog
 
   Hello,
 
 I wondered, why the file-filter at the open-dialogs of pcb is 
 not selected by default. For me, it is more comfortable if 
 there are just the files shown, which can be loaded by this 
 programm/function. I have also looked at other software and 
 most of them do this this way (the only one I found which 
 shows all files by default is OpenOffice.org).
 
 I appended a patch which changes this behaviour.
 
 Any comments are welcome!
 
 Felix
 
 @The main developers: I do not send this patch to the 
 sourceforge-patch-tracker now because I think, this Patch is 
 not really essential. If it is easier for you if I send all 
 my patches to the tracker, please send me a message and I 
 will add this one (and all later patches)!
 

Commit message says it all:

Author: Bert Timmerman bert.timmer...@xs4all.nl  2009-03-31 22:33:02
Committer: Peter TB Brett pe...@peter-b.co.uk  2009-08-05 08:06:21
Parent: 3b2a77744f50a33bb1507aa8062c51e0934a5b89 (Replace 'README.cvs' with
'README.git'. [2810417])
Child:  e2c5002166158dab7cf43d4745b594e510056071 (Correction of the pcb
homepage url in the about dialog window.)
Branches: master, remotes/origin/master, remotes/origin/pcb-20091103,
remotes/origin/sdb-playpen
Follows: pcb-20081128-base
Precedes: pcb-20091103-RELEASE

Apply filters to load filechooser dialogs. [1988982] [2686963]

Applies filters to the filechooser dialogs when loading layouts,
layouts (to buffer), elements (to buffer) and netlists.

Default behaviour is to not filter in the filechooser dialog.
Choosing a predefined filefilter in the filechooser dialog filters
on registered mime types, lowercase and uppercase file extensions.
Predefined filters are selected upon the action chosen in the File
pulldown menu.


IMHO, being able to see *all* available files in a directory listed at
startup of the dialog, and not have been restricted in my view by the GUI,
still is a good thing.

In making GUI design decisions it is difficult to please all possible users.

Maybe make this configurable ?

Kind regards,

Bert Timmerman



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