Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Anthony Blake
Cool.. yeah I've always thought the future is in sketching topology
and defining constraints.. sounds awesome! I remember talking about
basically the same thing a couple of times over the last few years.. I
was referring to it as semi-automatic routing where you sketch the
topology of a net with the mouse (or some other input device).

Regards,
Anthony


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Rick Collins
I don't know.  I've been told it is the Eudora email program that I 
still use.  But it only happens with a few emails, always from one of 
two mailing lists.  Someone in this list once tried to get to the 
bottom of it and found there were some things he could do to prevent 
it, but he doesn't always do whatever it was and I still get some of 
his without line breaks.  I don't recall if I've seen yours that way 
before or not.


I would switch to T'bird, but I'm just very leery of changing 
*anything* to do with email because I am so dependent on not just 
getting the mail, but retrieving old messages and even using it as a 
reminder and many other things.  I've just got a lot invested in how 
I work with Eudora to try to switch until I have an extended 
downtime.  As a first step, I am using T'bird as my calendar program, 
replacing the old Palm desktop.  The last time I upgraded the Palm 
desktop lost all color, so it was time for it to go.  :^(


Rick


At 04:06 PM 12/2/2010, you wrote:

On Thu, 2010-12-02 at 15:46 -0500, Rick Collins wrote:
> Was it just me that got a copy with no paragraph
> breaks?  Looking at the ascii art I assume it was
> sent with line breaks somewhere.
>
> Rick

I got it back with line-breaks!

I've just re-installed, so it is possible some setting is off in my mail
client though. It is auto-wrapping paragraphs here, but the ascii art
did indeed have newlines.

Looks like something (your mail reader?) has decided it knows better
about the line-breaking and re-flowed the text?

Are you on Windows / Linux / ...? Could it be a line-ending issue?

--
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: reference on good design practices for footprints

2010-12-02 Thread DJ Delorie

In order...

1. Do what the part's spec says to do

2. Do what your pcb fab says to do

3. Do whatever makes your life easy

:-)


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gEDA-user: reference on good design practices for footprints

2010-12-02 Thread Oliver King-Smith
   I am coming from the Eagle world, and I am trying the gEDA world for
   the first time.  In Eagle you don't need to think solder masks vs pad
   sizes, or other such details.  They were pretty much hardwired in the
   program.  Is there a good tutorial / reference documentation for
   conservative guidelines for these items.
   Oliver


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Bob Paddock
On Thu, Dec 2, 2010 at 4:27 PM, Peter TB Brett  wrote:
> On Thursday 02 December 2010 21:13:47 Bob Paddock wrote:

>> Peter, while all of this sounds great, could we fix the collective
>> problems that we have now first?
>
> Like what, specifically?

The 446 bugs in the tracker are a good start.

> Does Peter C's OpenGL renderer help ship products?  Not that I see, but it
> make PCB a hell of a lot of a more pleasant experience to use.

Pleasant Experience means you get the board done sooner, which is a Good Thing.


-- 
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http://www.designer-iii.com/
http://www.wearablesmartsensors.com/


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Peter Clifton
On Thu, 2010-12-02 at 16:13 -0500, Bob Paddock wrote:

> > Scrap straight line rats in favour of using the topological auto-router?
> 
> Do different rat lines help ship products?  Not that I see.

I imagined (although I've not coded to verify), that more intelligent
AUTO-routing of rats against existing board geometry / routed nets would
be a huge time-saver (especially if combined with more powerful features
to rubber-band existing nets).

I forget the name used elsewhere, but the idea is akin to user-guided
auto-routing, net by net. The rat-lines would show the routes each net
would take (if chosen to be routed next).

I was just throwing some ideas out there as food for thought (and so I
don't forget them). I've got too many little .txt files lying around
with one or two little ideas / design fragments, and I rarely come back
to them!

As I see it, PCB priorities (for me at least) are approximately:

Release?
Merge 2D parts of PCB+GL drawing
Release?
Merge 3D parts of PCB+GL drawing
GUI to control PCB+GL rendering styles
Release?

Gather design details of file-format changes required for:
3D model support
Package instantiation as offset + rotation,
NOT duplication and in place modification
(Also buys better rotation support)
Arbitrary layer types
Pad stacks
Polygon pours
Negative objects?
Better polygon data-structures?
Storage of layer colours / stack definitions

Implement file-format changes (possible totally new file format?)
Arbitrary layer types / stacks
Arbitrary pad types / stacks
Release?

Pours support
Release?

3D model support
Release?




-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: Toporouter VERY slow?

2010-12-02 Thread Anthony Blake
On Fri, Dec 3, 2010 at 10:42 AM, Stefan Dröge  wrote:
> Is my design just too complicated, or are there some dubious settings
> that prevent the toporouter from beeing faster?

It was probably an impossible problem to solve without vias, and vias
aren't implemented yet.

Regards,
Anthony


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Andrew Poelstra
On Thu, Dec 02, 2010 at 03:46:55PM -0500, Rick Collins wrote:
> Was it just me that got a copy with no paragraph breaks?  Looking at
> the ascii art I assume it was sent with line breaks somewhere.
>

I got a copy with correct line-breaks. I think it's just you. 

-- 
Andrew Poelstra
Email: asp11 at sfu.ca OR apoelstra at wpsoftware.net
Web:   http://www.wpsoftware.net/andrew/



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gEDA-user: Toporouter VERY slow?

2010-12-02 Thread Stefan Dröge
Hi, I'm doing a layout using the toporouter of pcb. It really gives
very nice results, but it takes really very long to run (about an
hour).
Is this "normal"? If I look at the run times on Anthony Blake's page
(http://anthonix.resnet.scms.waikato.ac.nz/toporouter/), they are in
the magnitude of seconds or  a few minutes.

Is my design just too complicated, or are there some dubious settings
that prevent the toporouter from beeing faster?

Here is a nice photorealistic picture of the pcb (I love this feature
:-) ) http://img94.imageshack.us/img94/3411/dotmatrixboard2topandbo.png

Regards, Stefan


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Peter TB Brett
On Thursday 02 December 2010 21:13:47 Bob Paddock wrote:

> Peter, while all of this sounds great, could we fix the collective
> problems that we have now first?

Like what, specifically?

> > Scrap straight line rats in favour of using the topological auto-router?
> 
> Do different rat lines help ship products?  Not that I see. To me that
> is the criteria for any feature.

Does Peter C's OpenGL renderer help ship products?  Not that I see, but it 
make PCB a hell of a lot of a more pleasant experience to use.

   Peter (B)

-- 
Peter Brett 
Remote Sensing Research Group
Surrey Space Centre


signature.asc
Description: This is a digitally signed message part.


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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Levente Kovacs
On Thu, 02 Dec 2010 15:44:34 -0500
Rick Collins  wrote:

> I'm not asking about the pick point.  I'm asking about the 
> centroid.  They are completely different things.  As I think I said, 
> the centroid is to tell the assembly house where to put the 
> part.  The pick point is a point on the part where the machine will 
> attach the nozzle and has nothing to do with the position where the 
> part is to be placed.  Further, regardless of how you set your files, 
> the pick point is selected by the assembly house to optimize how they 
> pick the part.  You have no way of knowing where this will be.

That is good news.
 
> The centroid needs to be a spot on the part that everyone knows 
> without requiring it to be explained.  Unfortunately for oddly shaped 
> parts, it does not seem to be well understood how to select the 
> centroid.  One document I have from "Screaming Circuits" says it is 
> the center of the part including the pins and the body.  I have yet 
> to be able to find this info in an IPC document.  The IPC document 
> seems to leave out some other important info about rotations.  You 
> would think they would figure out this is a problem and fix it...
> 
> I can't say if your centroids will give you trouble, but from what 
> you are telling me, you are not defining them correctly.  From what I 
> have read, I'm not sure PCB does it correctly either.  I found some 
> references on the web that says they use the geometric center of the 
> pins not including the package.  I don't think that is right.
> 
> Screaming circuits is not the ultimate reference for defining how 
> this is to be done, but they have a document that covers all the 
> bases and is easy to understand.  In fact, when I pointed out that 
> they had a discrpancy with the IPC docs, they immediately fixed it 
> and put the updated doc on their web site.  www.screamingcircuits.com

Okay. Thank you for pointing out all that. I think I'll be fine with the
centroids. It states that the centroid must be the center of the entire
footprint.

It gave me some information about the rotating angle.

I go and tweak my script.

Thank you again,
Levente

-- 
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http://levente.logonex.eu




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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Bob Paddock
Rick, I got line breaks.
.

On Thu, Dec 2, 2010 at 3:02 PM, Peter Clifton  wrote:

> Just thought I'd write some of this down and put it out there. I've
> spent some time recently thinking way into the future about the GUI /
> usability for an advanced PCB editing program.

Peter, while all of this sounds great, could we fix the collective
problems that we have now first?
To many of us PCB is used to ship products, preferably today.
The Creeping Feature Creacher is a powerful task master.

What we really need is good documentation for the Meta Data that
contains what a pcb really is.
Once MD is documented and abstracted then it should become easy to add
any kind of new GUI, Router, Scripting,
or just scrap the whole thing and start over.

> PCB design is a real hybrid of art, precision engineering and black
> magic.

It is only magic for those without documentation, or initiation.

> Scrap straight line rats in favour of using the topological auto-router?

Do different rat lines help ship products?  Not that I see. To me that
is the criteria for any feature.


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Peter Clifton
On Thu, 2010-12-02 at 15:46 -0500, Rick Collins wrote:
> Was it just me that got a copy with no paragraph 
> breaks?  Looking at the ascii art I assume it was 
> sent with line breaks somewhere.
> 
> Rick

I got it back with line-breaks!

I've just re-installed, so it is possible some setting is off in my mail
client though. It is auto-wrapping paragraphs here, but the ascii art
did indeed have newlines.

Looks like something (your mail reader?) has decided it knows better
about the line-breaking and re-flowed the text?

Are you on Windows / Linux / ...? Could it be a line-ending issue?

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Rick Collins
   At 02:36 PM 12/2/2010, you wrote:

 On Thu, 02 Dec 2010 12:21:00 -0500
 Rick Collins  wrote:
 > If the XYRS file output does not output proper centroids, I see
 this
 > as a major issue.  If they are not outputting the correct value
 for
 > asymmetric parts, how do you see the centroid being defined
 exactly?
 Most of my footprints are generated, and the zero point is the
 center of the
 package. I think they are OK for pick point.
 There are other footprints, which I made manually. In that case, I
 imagine the
 best pick point and I put the zero point there.

   I'm not asking about the pick point.  I'm asking about the centroid.
   They are completely different things.  As I think I said, the centroid
   is to tell the assembly house where to put the part.  The pick point is
   a point on the part where the machine will attach the nozzle and has
   nothing to do with the position where the part is to be placed.
   Further, regardless of how you set your files, the pick point is
   selected by the assembly house to optimize how they pick the part.  You
   have no way of knowing where this will be.
   The centroid needs to be a spot on the part that everyone knows without
   requiring it to be explained.  Unfortunately for oddly shaped parts, it
   does not seem to be well understood how to select the centroid.  One
   document I have from "Screaming Circuits" says it is the center of the
   part including the pins and the body.  I have yet to be able to find
   this info in an IPC document.  The IPC document seems to leave out some
   other important info about rotations.  You would think they would
   figure out this is a problem and fix it...
   I can't say if your centroids will give you trouble, but from what you
   are telling me, you are not defining them correctly.  From what I have
   read, I'm not sure PCB does it correctly either.  I found some
   references on the web that says they use the geometric center of the
   pins not including the package.  I don't think that is right.
   Screaming circuits is not the ultimate reference for defining how this
   is to be done, but they have a document that covers all the bases and
   is easy to understand.  In fact, when I pointed out that they had a
   discrpancy with the IPC docs, they immediately fixed it and put the
   updated doc on their web site.  [1]www.screamingcircuits.com
   Rick

References

   1. http://www.screamingcircuits.com/


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Re: gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Rick Collins
Was it just me that got a copy with no paragraph 
breaks?  Looking at the ascii art I assume it was 
sent with line breaks somewhere.


Rick


At 03:02 PM 12/2/2010, you wrote:
Hi guys, Just thought I'd write some of this 
down and put it out there. I've spent some time 
recently thinking way into the future about the 
GUI / usability for an advanced PCB editing 
program. I started along the lines of... how 
would PCB design work if my input device was a 
graphics tablet (something akin to the Wacom 
Cintiq would be awesome). PCB design is a real 
hybrid of art, precision engineering and black 
magic. For laying tracks, some gestural actions, 
fluid drawing and possibly even multi-touch 
interfaces might provide user interface 
opportunities never before seen in this kind of 
CAD application. Some randomly sorted ideas: 
Scrap straight line rats in favour of using the 
topological auto-router?   This is not quite the 
same as auto-routing a single net. Each 
rat   would only avoid existing laid down 
geometry, and would be allowed to   cross other 
rat lines. Also, I'd imagine flattening any 
route   generated to be in the rats plane. (The 
rat would not jump between   layers as an 
auto-routed trace might, even if the route taken 
could   only be made effectively through 
multiple layers).   Obviously this is nice, as 
the user can pick rat-lines which have   routed 
well and request PCB turns the rats into solid 
tracking. Manually placed, rubber-banded 
topological tracking?   How about guiding a 
track routing by drawing the topology you 
desire,   weaving in and out of other 
components?   The topology between obstacles 
could easily be extracted from a   hand-stroked 
line drawn with a pen, mouse, or perhaps 
some   high-resolution touch-screen 
interface.   Dynamic zooming about the current 
touch-point / mouse cursor when   drawing in 
amongst detailed objects, or the user is forced 
to slow   down would aid lower resolution input 
devices. Rendering would have to   be FAST and 
slick to pull this off without disorienting the 
user.   Following topological drawing, tracks 
could be allowed to evolve as if   they were 
sprung-loaded (Ã  la liquid-pcb), or processed 
through some   routine to solidify them.   For 
"sprung loaded" tracking, I'd imagine having a 
virtual obstacle   object the user can place on 
the board to constrain the tracking.   Sprung 
loaded / pushed tracking would be updated if the 
user were to   place and drag an obstacle:   | | 
| | | ->   | | | | | ->  | | | | |   | | 
| | |  | | | | | | | |  \ \   | 
| | | |  | | |.\ | | | |->.| 
|   | | | | |  | | | / | | | 
|  / /   | | | | |  | | | | | | 
| | | |   I also imagined a stroked gesture 
where the user draws a ring around   a bunch of 
tracks, as if to tie a rubber-band around them. 
This action   would group them for operations 
such as re-routing.   I wonder if this requires 
the notion of treating 
individualtrack-segments as a topology. This 
would be handy anyway, to aid   manual 
rubber-banding. Drawing could potentially be 
made quicker if we   had higher-level data than 
individual line-segments (it would reduce   the 
number of round capped sections requiring 
drawing). Magnetic component placement   An 
augmentation to the grid really - make 
components resist being   pushed past favourable 
alignment points with other components?   This 
wouldn't STOP  components being placed off these 
points, just   give some "resistance".   This 
feature would also be quite neat for component 
placement, where   some future addition of a 
courtyard / mechanical interference 
spec.   within the package definition would 
constrain placement to resist   motion closer to 
other packages than desirable.   This could be 
absolutely enforced when placing a component, or 
act to   PUSH the component being run into. 
(Obviously dependant on a good   algorithm to 
re-track the pushed part).   I was imagining 
this feature being useful for placing an array 
of   parts such as resistors / capacitors. We 
would need the ability to semi-lock tracks I 
think...   Obviously some tracks won't be up for 
auto-pushing, and their geometry   will be set 
in copper (to adapt a metaphor). Obviously it 
should be   possible to edit such tracks, but we 
might want the to be un-pushable. How about more 
novel ways to define planes?   Full "pours" 
support goes without saying ;)   I've looked at 
various commercial boards recently, and it would 
appear   that many use negative layers to draw 
tracking. High power stuff,   where practically 
everything is copper, just with some 
isolation   between regions. The complexity of 
the polygons which make up these   traces would 
be too prohibitive to use PCB's normal polygon 
tool.   They _look_ as if someone has drawn 
negagtive traces to split up a   plane. should 
we support that?   Alternatively, what about 
defining traces / topolo

Re: gEDA-user: PCB vs. cursor position

2010-12-02 Thread Levente Kovacs
On Thu, 2 Dec 2010 14:41:01 -0500
DJ Delorie  wrote:

> src/file.c
> WritePCBDataHeader()

Thanks

-- 
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http://levente.logonex.eu




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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Levente Kovacs
On Thu, 2 Dec 2010 12:40:39 -0500
DJ Delorie  wrote:

> So change it :-)

I rather write scripts than modify the source...

Please note that my script now calculates placement angles as well! :-)

-- 
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http://levente.logonex.eu




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gEDA-user: Random thoughts on the future interface of PCB

2010-12-02 Thread Peter Clifton
Hi guys,

Just thought I'd write some of this down and put it out there. I've
spent some time recently thinking way into the future about the GUI /
usability for an advanced PCB editing program.

I started along the lines of... how would PCB design work if my input
device was a graphics tablet (something akin to the Wacom Cintiq would
be awesome).

PCB design is a real hybrid of art, precision engineering and black
magic. For laying tracks, some gestural actions, fluid drawing and
possibly even multi-touch interfaces might provide user interface
opportunities never before seen in this kind of CAD application.

Some randomly sorted ideas:

Scrap straight line rats in favour of using the topological auto-router?

  This is not quite the same as auto-routing a single net. Each rat 
  would only avoid existing laid down geometry, and would be allowed to
  cross other rat lines. Also, I'd imagine flattening any route 
  generated to be in the rats plane. (The rat would not jump between 
  layers as an auto-routed trace might, even if the route taken could
  only be made effectively through multiple layers).

  Obviously this is nice, as the user can pick rat-lines which have 
  routed well and request PCB turns the rats into solid tracking.

Manually placed, rubber-banded topological tracking?

  How about guiding a track routing by drawing the topology you desire, 
  weaving in and out of other components?

  The topology between obstacles could easily be extracted from a
  hand-stroked line drawn with a pen, mouse, or perhaps some
  high-resolution touch-screen interface.

  Dynamic zooming about the current touch-point / mouse cursor when 
  drawing in amongst detailed objects, or the user is forced to slow
  down would aid lower resolution input devices. Rendering would have to
  be FAST and slick to pull this off without disorienting the user.

  Following topological drawing, tracks could be allowed to evolve as if
  they were sprung-loaded (à la liquid-pcb), or processed through some
  routine to solidify them.

  For "sprung loaded" tracking, I'd imagine having a virtual obstacle
  object the user can place on the board to constrain the tracking.

  Sprung loaded / pushed tracking would be updated if the user were to 
  place and drag an obstacle:

  | | | | | ->   | | | | | ->  | | | | |
  | | | | |  | | | | | | | |  \ \
  | | | | |  | | |.\ | | | |->.| |
  | | | | |  | | | / | | | |  / /
  | | | | |  | | | | | | | | | |


  I also imagined a stroked gesture where the user draws a ring around 
  a bunch of tracks, as if to tie a rubber-band around them. This action
  would group them for operations such as re-routing. 


  I wonder if this requires the notion of treating individual  
  track-segments as a topology. This would be handy anyway, to aid
  manual rubber-banding. Drawing could potentially be made quicker if we
  had higher-level data than individual line-segments (it would reduce
  the number of round capped sections requiring drawing).


Magnetic component placement

  An augmentation to the grid really - make components resist being 
  pushed past favourable alignment points with other components? 
  This wouldn't STOP  components being placed off these points, just 
  give some "resistance".

  This feature would also be quite neat for component placement, where
  some future addition of a courtyard / mechanical interference spec. 
  within the package definition would constrain placement to resist 
  motion closer to other packages than desirable.

  This could be absolutely enforced when placing a component, or act to 
  PUSH the component being run into. (Obviously dependant on a good
  algorithm to re-track the pushed part).

  I was imagining this feature being useful for placing an array of 
  parts such as resistors / capacitors.


We would need the ability to semi-lock tracks I think...

  Obviously some tracks won't be up for auto-pushing, and their geometry
  will be set in copper (to adapt a metaphor). Obviously it should be 
  possible to edit such tracks, but we might want the to be un-pushable.


How about more novel ways to define planes?

  Full "pours" support goes without saying ;)

  I've looked at various commercial boards recently, and it would appear
  that many use negative layers to draw tracking. High power stuff,
  where practically everything is copper, just with some isolation 
  between regions. The complexity of the polygons which make up these
  traces would be too prohibitive to use PCB's normal polygon tool.

  They _look_ as if someone has drawn negagtive traces to split up a 
  plane. should we support that?

  Alternatively, what about defining traces / topology for connected 
  copper, then having a "bloat until clearance hit" mode, which 
  fattens / fills everything?

  I'm still tempted to think that negative lines gives greater editing 
  potential once the tracks are placed.


Re: gEDA-user: PCB vs. cursor position

2010-12-02 Thread DJ Delorie

src/file.c
WritePCBDataHeader()


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Re: gEDA-user: PCB vs. cursor position

2010-12-02 Thread Levente Kovacs
On Thu, 2 Dec 2010 12:40:53 -0500
DJ Delorie  wrote:

> Aside from editing the sources?  No :-P

Okay... :-) Cold you tell me any point where to look?

Thanks...
Levente

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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Levente Kovacs
On Thu, 02 Dec 2010 12:21:00 -0500
Rick Collins  wrote:

> If the XYRS file output does not output proper centroids, I see this 
> as a major issue.  If they are not outputting the correct value for 
> asymmetric parts, how do you see the centroid being defined exactly?

Most of my footprints are generated, and the zero point is the center of the
package. I think they are OK for pick point.

There are other footprints, which I made manually. In that case, I imagine the
best pick point and I put the zero point there.

Levente

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Re: gEDA-user: PCB vs. cursor position

2010-12-02 Thread DJ Delorie

> Is there any way to get PCB *NOT* to save cursor position?

Aside from editing the sources?  No :-P


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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread DJ Delorie

> Yes, but as I pointed out earlier, it doesn't do what I want. It averages the
> coordinates of the pins/pads, and it is not good when you working with
> asymmetric element such as SOT223.

So change it :-)


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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Rick Collins

At 05:20 AM 12/2/2010, you wrote:

On Wed, 01 Dec 2010 19:38:32 -0500
Ethan Swint  wrote:

> Sorry for my late reply - but have you tried the BOM export (File ->
> Export Layout->BOM).  One of the output files from that is an XYRS
> (X, Y, Rotation, Side) text file.
>
> http://archives.seul.org/geda/user/Feb-2009/msg00351.html

Yes, but as I pointed out earlier, it doesn't do what I want. It averages the
coordinates of the pins/pads, and it is not good when you working with
asymmetric element such as SOT223.


My experience is that there are two points on a pick and place 
package.  There is the centroid, which I understood to be the center 
of the outline of the part and is used to define the orientation 
point on the part for positioning.  There is also a pick point which 
has to be in a spot where the vacuum nozzle can lift the 
component.  This are mostly the same spot, but on unusual parts, not 
always.  I can't imagine the XYRS file generator is not capable of 
outputting the appropriate centroid position.  Is it possible that 
you are seeing the pick point thinking it is the centroid?


The feedback from my assemblers is that I should give the X and Y 
coordiates of the centroid of the part for placing it on the 
board.  The rotation is nice for them to have, but they mostly don't 
trust them and so always go through a process of verifying both 
placement and rotation of each part as it is placed on the board for 
the first item.  It may actually be a virtual dry run using the 
machine display.  But they have told me they ignore all other info 
such as glue spots and pick points.  They know where they want the 
glue spots and pick points and have no reason to trust your data for that.


If the XYRS file output does not output proper centroids, I see this 
as a major issue.  If they are not outputting the correct value for 
asymmetric parts, how do you see the centroid being defined exactly?


Rick 




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Re: gEDA-user: comments on gcode generation (was: Re: exporting single pcb layers)

2010-12-02 Thread chrysn
On Wed, Dec 01, 2010 at 10:05:48AM +0100, Alberto Maccioni wrote:
> > * no voronoi mode: all the "other tools" (see below) support a mode
> >  where they fill the unused area of the board with the closest net.
> >  this cuts the machining time down to less than 50%.
> Can you explain more?

an image probably explains this best: [1]. all the implementations i
know do this by exposing the gerber files to a bitmap and doing
something like a simultaneous flood fill on all the connected
components; then they trace the resulting edges.

this is, of course, not an option for circuits where signals are slowed
down by having meandering lines, or even on circuits where small
capacities added between adjacent nets, but for many boards that are not
that sophisticated, it makes the manufacturing faster and the soldering
easier

[1] http://www.mit.edu/~vona/Visolate/ATM0PCB0-three-ways-med.jpg

On Wed, Dec 01, 2010 at 12:48:17PM +0100, Markus Hitter wrote:
> Yes, this would be a very welcome addition. Is there a pure C
> library with this stuff available somewhere? Java or C++ isn't an
> option for inclusion with gEDA.

none at the moment, but there is some consolidation work ongoing, which
might even result in a library being split off.

personally, i'd rather prefer a solution where the complete program is
called. for matters of integration, it could even be shipped and built
together with geda.

i understand why java is not an option, but would a complete c++ program
be acceptable as a dependency (that is, as a standalone program instead
of something linked to)?

> Without code patches, lines on the outline layer are handled just
> like any other traces. This is improved with some of these patches:
> 
> http://sourceforge.net/tracker/?
> func=detail&aid=3100354&group_id=73743&atid=538813
> 
> You can apply them all without loosing anything. Outline milling is
> still limited to rectangular boards without holes, though.

ok, that explains a lot.

i'm still using the last release, but given the number of patches
available, i should probably have a look at the vcs. that way i can also
have a look at how things work here.

regards
chrysn

-- 
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  -- Bene Gesserit axiom


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Re: gEDA-user: comments on gcode generation (was: Re: exportingsingle pcb layers)

2010-12-02 Thread Markus Hitter


Am 01.12.2010 um 21:47 schrieb Bert Timmerman:


* no voronoi mode: all the "other tools" (see below) support a mode
  where they fill the unused area of the board with the closest net.
  this cuts the machining time down to less than 50%.


Yes, this would be a very welcome addition. Is there a pure C
library with this stuff available somewhere? Java or C++
isn't an option for inclusion with gEDA.



http://www.qhull.org

There happens to live a git repo here:

git://gitorious.org/qhull/qhull.git


Thanks for the link, Bert. I fear this is a bit too complex for me to  
justify putting it in the next few days.



Markus

- - - - - - - - - - - - - - - - - - -
Dipl. Ing. (FH) Markus Hitter
http://www.jump-ing.de/







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gEDA-user: PCB vs. cursor position

2010-12-02 Thread Kovacs Levente
Hi,


Is there any way to get PCB *NOT* to save cursor position?

Thanks,
Levente

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Re: gEDA-user: PCB: coordinates and angles of the components

2010-12-02 Thread Kovacs Levente
On Wed, 01 Dec 2010 19:38:32 -0500
Ethan Swint  wrote:

> Sorry for my late reply - but have you tried the BOM export (File -> 
> Export Layout->BOM).  One of the output files from that is an XYRS
> (X, Y, Rotation, Side) text file.
> 
> http://archives.seul.org/geda/user/Feb-2009/msg00351.html

Yes, but as I pointed out earlier, it doesn't do what I want. It averages the
coordinates of the pins/pads, and it is not good when you working with
asymmetric element such as SOT223.

cheers,
Levente

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Voice: +36705071002




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