gEDA-user: PCB captures 'Mod4/Windows' key

2008-10-13 Thread [EMAIL PROTECTED]
I'm new to gEDA PCB etc. I use archlinux + awesome window manager which I have 
configured to rely heavily on the Mod4, 
also known as 'Windows' key, but regardless I think this is an annoyance no 
matter the WM environment.

Whenever I press a modifier + key combination _not_ used by PCB, it opens the 
'PCB Log' window, and switches focus to 
it. For a tiling WM this means it rearranges everything else on the desktop im 
working in and is otherwise a real PITA.

I've looked into code and have a hackish solution, which is to simply ignore 
unknown keysyms.

--- a/src/hid/gtk/gui-output-events.c   2008-10-13 10:40:20.0 -0700
+++ b/src/hid/gtk/gui-output-events.c   2008-10-13 10:39:47.0 -0700
@@ -506,9 +506,6 @@
  }


-  if (handled == FALSE)
-gui-log (keysym %d (0x%x) has not been defined\n, ksym, ksym);
-
return handled;
  }


but this is very lame, Id rather have it log without triggering an event. I 
assume there is already a function to append 
a string to the pcb log without causing a popup? anyone can shed light on this 
I'd very much appreciate it. Maybe there 
is a way to solve this with a pcbrc or something?

ty, perry


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gEDA-user: Re: Installing in Debain. Nothing (at all) works

2007-05-04 Thread [EMAIL PROTECTED]

Stuart Brorson wrote:
On Fri, 4 May 2007, 
[EMAIL PROTECTED] wrote:


No matter how I install gEDA on Debian 4 (Etch), the only things that 
work are the schematic editor and a viewer for gerber files.


Please be a little more specific.  How do you run the tools?  From the
command line?  And what do you mean only things that work?  Which
programs fail, and how do they fail?  Do they say anything when they fail?


I have used aptitude, and the iso and still just have these tools.




Which version of the ISO?  What did it say when you ran it?


I am using the tools menu to switch applications.


What tools menu in which program?  How did you start it up?  From teh
command line?  Some icon?


Is there a terminal method which can diagnose what has gone wrong?




Stuart


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Stuart, what was the point in that response? Everything you asked was 
alredy covered


1) Launched from the tools menu in the gEDA project manager
2) Aptitude is a way of installing programs (on Debian based OS)
3) The latest stable from the website (the gEDA website)
4) It didn't say anything, it just ran, otherwise I would have said I 
get this error: xxx
5) No, if I started the individual aps from the command line I wouldn't 
be asking what commands were needed to do that.


To clarify, can someone please tell me the commands to start the 
individual aps of the gEDA suite so I can find out what the errors are 
(which I also said in the original post)




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gEDA-user: Re: Installing in Debain. Nothing (at all) works

2007-05-04 Thread [EMAIL PROTECTED]

[EMAIL PROTECTED] wrote:
No matter how I install gEDA on Debian 4 (Etch), the only things that 
work are the schematic editor and a viewer for gerber files.


My problem EXACTLY

http://ubuntuforums.org/showthread.php?t=43419



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gEDA-user: Re: Installing in Debain. Nothing (at all) works

2007-05-04 Thread [EMAIL PROTECTED]

Stuart Brorson wrote:



Again, which one?  Did you install the RPMs?  Or the CD (OK, you said
the CD).  And as for Debian, there are a bazillion different revisions
which you can get from teh Debain site:

http://packages.debian.org/cgi-bin/search_packages.pl?keywords=gedasearchon=namessubword=1version=allrelease=all 



No RPMs. I just type aptitude install geda and Debian does everything. 
 The version installed would be that in the stable repository for Etch. 
I don't know which that is until I get back to my machine.


I've also installed from the CD (current stable).



Schematic capture - gschem
netlisting - gnetlist
forward annotate to layout - gsch2pcb
PCB layout - pcb



Excellent, thanks very much.

I'll find out as much as I can now and see what's up



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Re: gEDA-user: freedog pictures

2007-03-08 Thread [EMAIL PROTECTED]


Yo DJ,

The furnace controller board looks nice.  Appears that the rj45 is in 
the wrong spot ??


Also, there is this intriguing board with a db-9, to-220 and some 
totally elegant T-shaped trace ... what is it?  Cool!


Phil

DJ Delorie wrote:

Just a couple of photos from tonight's meeting...

http://www.delorie.com/photos/20070308-freedog/


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Re: gEDA-user: new boards!

2007-02-26 Thread [EMAIL PROTECTED]

DJ Delorie wrote:

Just showed up today...


The teardrops look nice, DJ.

What are the 3 long pads that appear next to some of the 20 pin and 32 
pin footprints (on the top)?




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Re: gEDA-user: Making gsch2pcb prefer files vs m4?

2007-02-24 Thread [EMAIL PROTECTED]

Ben Jackson wrote:

I have jcl's library installed.


You can also install jcl's sch2pcb, specifying the directory and _file_ 
footprints.


Save a text file as sch2pcb in your project directory and just

./sch2pcb project

 to get it to run.  It should be something like what's below, changing 
for your specified footprint directory.


Also deleting your M4 footprints directory is a favorite PCB past time. 
 But try this thing below first.


Phil

_sch2pcb_

#!/bin/bash
#this script was written by John Luciani
gsch2pcb --elements-dir /home/phil/pcb/footprints --use-files $@




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Re: gEDA-user: Next step questions

2007-02-16 Thread [EMAIL PROTECTED]



Harry Eaton wrote:

DJ's optimizer might
be able to automatically remove the nubbins.


The optimizer as its included with the stock PCB version 20060822 is 
pretty good at removing these nubs.  I autorouted a board the other day 
and there was only one nubbin that wouldn't go away with the optimizers.


Apart from three hi current traces I routed by hand using polygons, 
correcting this nubbin that the autorouter failed to remove was the only 
manual routing I had to do on this particular board (80 thru hole 
components).


Phil


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Re: gEDA-user: DRC/rat quirks

2007-02-13 Thread [EMAIL PROTECTED]



Ben Jackson wrote:

There's another thread going on where someone is concerned about trusting
a new feature in PCB when fabbing a board.  Well, it's all new to me, and
I don't know if I trust it yet.  Maybe it has fabulous internals and a
quirky interface, or maybe the internals are just as quirky...


The output from PCB is very predictable.  I've always gotten accurate 
results from either my laser printer or the fab house.  Never a problem.


If you feel like the interface is odd, it is.  It is raw.  Because of 
this maybe there's a case for trusting it _more_?


Phil Taylor



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gEDA-user: [pcb] embedding raster image size in png exports

2007-02-12 Thread [EMAIL PROTECTED]


Can PCB export raster files like the png with an embedded image size so 
that print software can recognize a 1:1 scale?


I can get images exported at the right raw pixel dimensions I want, but 
when I open them in other applications, they come up as 72 dpi, making 
them way out of scale, and usually auto-scaled to fit either the paper 
of the screen ... blah.  Any advice on getting raw prints out of this 
beast at 1:1 would be great.


Also, out of curiosity, what does xy-max that appears in the png 
export dialog in PCB do?


Phil Taylor


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Re: gEDA-user: Re: dxf?

2007-02-06 Thread [EMAIL PROTECTED]

Dave N6NZ wrote:
If other people would 
find that functionality useful, I will look into it.


It would seem handy to be able to import dxf files for certain hardware 
modules, assemblies that mount onto a pcb and for some connectors.


Phil



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gEDA-user: Polygons in footprints

2007-02-06 Thread [EMAIL PROTECTED]


How hard would it be to get PCB to accept polygons in footprints?  We'd 
need polygons on both copper and silk layers, and both with and without 
soldermask.


Phil




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Re: gEDA-user: PCB multiple footprint selection

2007-01-29 Thread [EMAIL PROTECTED]



John Luciani wrote:

In my PCB version there is a button labeled far side. Clicking far
side makes
the components on the opposite side of the board invisible and 
unselectable.


Version 20060822 has this feature.  Also this version incorporates a lot 
of user interface refinements over 20050127.


best, phil


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gEDA-user: PCB Autorouter is awesome.

2007-01-03 Thread [EMAIL PROTECTED]


I just routed a small thru-hole board in less than 1 minute.

After putting my footprints where I thought they should go, I sequenced 
 through several of the optimized routed tracks routines.  I used the 
following in the following order:


debumpify
unjaggy
miter

I now have a board that is better routed than any I could have done 
manually.


It is totally mindblowing!

Phil


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gEDA-user: footprint naming convention for MODULES?

2007-01-02 Thread [EMAIL PROTECTED]


Is there a footprint naming prefix for hardware modules or daughter 
cards?  These are devices which have both electrical and hardware 
aspects ... for instance a discrete opamp board or an rf module?


Phil


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Re: gEDA-user: Symbol submission

2006-12-14 Thread [EMAIL PROTECTED]

John Griessen wrote:
Should we create some standard category names, a style guideline of 
naming,  to sort symbols with on gedasymbols .org?


John G


Not that I've been good about getting my symbols up on gedasymbols.org, 
but I've been using the IPC 7351 naming conventions that John Luciani 
organized.


Since John's footprint directory is so big, I see a lot of value in 
sticking with his system.


http://luciani.org/geda/pcb/footprint-name-spec.pdf

Phil


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Re: gEDA-user: gerber to .dxf converter

2006-12-09 Thread [EMAIL PROTECTED]

John Griessen wrote:



[EMAIL PROTECTED] wrote:

PCB is free, and it'll export .eps.  It's not a dxf but perhaps your 
cad application can import it.  You'll have to give it a scale


So, did this keep the stroked vectors nature of the data, or rasterize 
it finely?


Keep it vector, and either import at a scale if you know what it should 
be (say for the second or third iteration of the exact same PCB output) 
 or import it, and scale it.


I remember measurements being off on the order of 0.001 ... which could 
just as much be a result of the limitations of the scale tool (in cad) 
as my computation of the scale coefficient (in the HP).


Phil


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Re: gEDA-user: PCB fab supplies -- drills

2006-12-08 Thread [EMAIL PROTECTED]

John McCaskill wrote:

We have been happy with:

http://www.drillbitcity.com/


Amazing!


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Re: gEDA-user: gerber to .dxf converter

2006-12-08 Thread [EMAIL PROTECTED]

Dave N6NZ wrote:

Is there any free (as in speech) software that will convert gerber to .dxf?


PCB is free, and it'll export .eps.  It's not a dxf but perhaps your cad 
application can import it.  You'll have to give it a scale, but if 
you're clever here, you'll never known the difference.


I've used this as a path to autocad with good results.

Phil


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Re: gEDA-user: gerber to .dxf converter

2006-12-08 Thread [EMAIL PROTECTED]


Has there ever been a discussion about exporting hard cad files from PCB 
... such as dxf or even a closed proprietary format?


It's common to want to move PCB layouts into cad for chassis layout 
work.  What would be involved in giving PCB this feature?  As I 
understand it, dxf is open.  I don't really know if there are gnu or 
open code modules for creating and working with them--I'm clearly over 
my head here, but gosh it would be handy.


phil



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Re: gEDA-user: Tomorrow! December Free Dog meeting announcement -- reminder!

2006-12-06 Thread [EMAIL PROTECTED]


Has the freeedaug group discussed ways for geda/gaf to accept monetary 
contributions from those users who wish to contribute?  If no, can you 
add this item to the meeting agenda?  If yes, what has been done to put 
a working avenue of contribution into service?


Thanks, Phil Taylor
seattle, wa
206-571-8135




Stuart Brorson wrote:

--   Free Dog Gathering Announcement 

The Free EDA Users Group will meet this coming *Wednesday*, December
6th.  As usual, let's meet at the Starbucks across the street from
Quantum Books on Ames St, between Main St and Broadway.  It's about 1
block away from the Kendall Sq T stop.  (In Cambridge, MA, USA, of 
course.)


The meeting will be an open and informal working session.  Some
time has elapsed since our last gathering and a lot has happened, so
there is much to discuss!   Bring your laptop!  Some items on
the agenda are:

*  All those branches in CVS!  How to merge them?
*  What's going on with DBUS?
*  Guile 1.8 bug -- Oh no!  Another link library bug!
*  DJ's challange board: How can people even see those components?
*  Next code sprint: When shall we hold it?
*  PCB's teardrop plug-in.  Let's try it out!
*  QUCS -- Let's take it out for another spin.
*  Whatever you've been up to...

Free Dog is an association of like-minded hackers and engineers
interested in free and open EDA tools. We hold monthly meetings near
MIT (and other locations) featuring informal networking, speakers, and
camaraderie. Our goals are to learn more about CAD, engineering and
scientific software, share ideas about our current projects, and --
most importantly -- have fun with like-minded people. We welcome new
members and participants of all ages.  Students are particularly
welcome!

Date: Wednesday, December 6th, 2006.  (*** Note day ***)
Time: 7:00pm
Location: Starbucks Coffee, 6 Cambridge Center, Cambridge,
MA, USA.(*** The usual location ***)

For more details, please contact me privately at sdb (AT) cloud9 (DOT)
net.


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Re: gEDA-user: stupid newbie question

2006-11-27 Thread [EMAIL PROTECTED]

Giorgenes Gelatti wrote:

Could it be a printing problem?


Paper changes sizes too.  If you're confronted with a humid weather the 
paper may go into your laser bigger than it comes out.  The length and 
width may change size differently as I believe there is some orientation 
to the fibers in most paper as a result of mfg. process.


I've gone back to printouts from delayed work to discover 2% change in 
size.  Time, humidity temperature and storage seem to affect paper in 
mysterious ways.  An architect friend told me that they only trust 
they're scaled paper plots to 5% -- astonishing.


Phil


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Re: gEDA-user: Board fabrication

2006-11-25 Thread [EMAIL PROTECTED]

John Griessen wrote:
What if we made a via shape for ease of non-automated drilling, (for 
prototyping)?   I think a concentric circle of copper to aim the drill 
bit in and keep it from walking away from the center of the larger via 
or mounting hole would be helpful.


I've used small vias w/ blown-up pads to center drill holes.  you have 
to drill some copper, but using hs drills it doesn't seems to be a problem.


Luciani has an approach to this and a lot of his parts have a cross for 
drill alignment of bigger holes.  I have worked on some old electronics 
that were hand-built and it's clear that they center punched on crosses 
to get drills lined up.


Nice as it sounds, I don't think pcb will let you put a via inside a via 
and still generate output.


phil



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Re: gEDA-user: Hello list

2006-11-17 Thread [EMAIL PROTECTED]

Darryl Gibson wrote:
But, I would really, really like my resistors, and diodes standing up, 
not laying down. 


Darryl here are three vertical footprints.  I've used them before.  I 
just cleaned them up a little.  Let the list know if they work for you.


These foots are named withing the Element tag.  --phil


Element[0x R-0W25-vertical.fp R?  172500 127500 -5500 4550 
0 100 0x]

(
Pin[-3900 0 7000 2000 8200 2900  1 0x01]
Pin[3900 0 7000 2000 8200 2900  2 0x01]
ElementLine [-3900 -4050 3700 -4050 1000]   
ElementLine [-3900 4050 3700 4050 1000] 
ElementArc [3900 0 4050 4050 90 180 1000]
ElementArc [-3900 0 4050 4050 270 180 1000]
)

Element[0x R-0W5-vertical.fp R?  143000 84000 -7500 5100 0 
100 0x]

(
Pin [-5200 0 7800 2000 9000 3600  1 0x001]
Pin [5200 0 7800 2000 9000 3600  2 0x001]
ElementLine [-5200 -4400 5200 -4400 1000]
ElementLine [-5200 4400 5200 4400 1000]
ElementArc [-5200 0 4400 4400 270 180 1000]
ElementArc [5200 0 4400 4400 90 180 1000]
)


Element[0x DIO__DO-41-vertical.fp D?  172500 127500 -9900 
6050 0 100 0x]

(
Pin[-6200 0 9500 2000 10700 4200  1 0x0101]
Pin[6200 0 9500 2000 10700 4200  2 0x01]
ElementLine [-11450 -5300 6200 -5300 1000]  
ElementLine [-11450 5300 6200 5300 1000]
ElementLine [-11450 -5300 -11450 5300 1000]
ElementArc [6200 0 5300 5300 90 180 1000]
)



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Re: gEDA-user: Hello list

2006-11-17 Thread [EMAIL PROTECTED]

Darryl Gibson wrote:
I'm under time constraints to get this project done. So I'm cheating, 
and using RCY100 for the resistors.


uh ... what's rcy100?

Phil



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Re: gEDA-user: Increment drill size on 344 vias

2006-11-15 Thread [EMAIL PROTECTED]

David Carr wrote:

Quick question:

I have a board with 344 vias that I'd like to increase in size from 20 
mils to 24 mils.  Is there a way to do this semi-automatically in PCB?  
There are other vias of different sizes on the board.


Maybe 'find and replace' over the section of your pcb with the vias. 
I've done this before and it's pretty painless.


You could paste that section into another file and 'replace all'.  or 
something.


Phil


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Re: gEDA-user: Trace fill?

2006-11-10 Thread [EMAIL PROTECTED]

Lares Moreau wrote:

I noticed that the pcBoard was 'filled' with the PCB traces so that only the 
required clearance is not copper.


Lares,

When you say 'filled with traces' do you mean 'filled with polygon'?  If 
so I think PCB will already do what you're asking.  It may be as simple 
as drawing a rectangle or polygon over your entire board and toggling 
the s key on the filled copper area.  Setting up your clearances and 
design rules should make the polygon clear by a safe amount.


Let me know if this helps.

Phil


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Re: gEDA-user: Trouble with CONN_USB

2006-10-21 Thread [EMAIL PROTECTED]

Olof,

you'll generally want symbols that match your footprints.  the symbols 
may be very specific, or very generic.  In any event, you want the pins 
on the symbol to coincide with the pins on the footprints.  pin 1 needs 
to match up with pin 1.


The symbols only need two attributes to go from gschem to pcb using 
gsch2pcb:  refdes= and footprint=.


you can use gattrib to quickly add footprints to the elements in your 
layout before running gsch2pcb.


you can see the script on Luciani's website to see how to force gsch2pcb 
to find a specific directory of footprints.


As for symbols, you can probably get what you need from the geda library 
included with the program.  you WILL have to check the pin-numbering 
though.  As a default each pin in a symbol should have:


pinnumber=#
pinseq=#
pinlabel=#  
pintype=value

usually pinnumber, pinseq, and pinlabel can all be the same, i.e. 1 
for pin one on a chip or capacitor.


hope this helps.  there is file called the 'master attribute document' 
that's easy to find.


the gsch2pcb system seems really slow at first, but it will save you 
TONS of time down the road.


Phil


Olof Tångrot wrote:
Thanks John, but how do I make these land patterns integrate with 
symbols I create in gschem? And how do I make gsch2pcb recognize them 
when I want to create a netlist?


Olof

- Original Message - From: John Luciani [EMAIL PROTECTED]
To: gEDA user mailing list geda-user@moria.seul.org
Cc: geda-user@seul.org
Sent: Saturday, October 21, 2006 5:42 PM
Subject: Re: gEDA-user: Trouble with CONN_USB


On 10/21/06, Olof Tångrot [EMAIL PROTECTED] wrote:



HI there.




Where do I find the solution?

Regards Olof


I have a USB Type B connector at

http://www.luciani.org/geda/pcb/pcb-footprint-list.html#Connector

(* jcl *)





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Re: gEDA-user: Re: gEDA-dev: gsch2pcb is not finding local footprint dirs

2006-10-19 Thread [EMAIL PROTECTED]

John Griessen wrote:

I don't have old examples


There's always the sch2pcb script w/ a project file ...

./sch2pcb project

where sch2pcb is:

#!/bin/bash
#this script was written by John Luciani
gsch2pcb --elements-dir /path/to/footprints --use-files $@

and project is a file containing:

schematics schematicA.sch schematicB.sch
output-name out

if you're systems not finding this stuff, you can just put the sch2pcb 
script in the project directory.  some path shenanigans will let you put 
in in a central location though.


pt




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Re: gEDA-user: gsch2pcb project file syntax

2006-10-19 Thread [EMAIL PROTECTED]


Yeah, sorry if that was redundant.  There is stuff about this on the 
wiki and in Bill Wilsons Gsch2pcb tutorial.  I don't know what the 
strategy for the manual has been.  It tends to involve more theoretical 
aspects of the coding, usage to a lesser degree.


It would be good to get a consensus on the matter, though.

phil


John Griessen wrote:



[EMAIL PROTECTED] wrote:


There's alwayssch2pcb :

#!/bin/bash
#this script was written by John Luciani
gsch2pcb --elements-dir /path/to/footprints --use-files $@



Thanks Phil,

I just found a email reference and tested that this works too:

edit project file to include lines like:

elements-dir /home/john/EEProjects/now/circuitboards/footprints_pcb

John G

PS  Im slated to write some docs for PCB, and I'll keep track of this 
and get it into the manual if it belongs there...



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Re: gEDA-user: PCB: See 'Problems' in the manual

2006-10-12 Thread [EMAIL PROTECTED]

Karel Kulhavy wrote:

pcb-200601414


Karel,

Is this a real version number?

phil


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Re: gEDA-user: Board fabrication -- outline

2006-10-10 Thread [EMAIL PROTECTED]

Stefan,

A quick way to get results is to manually draw the board outline on an 
empty layer you rename outline:


This is inelegant, but quick error-free.  It requires absolutely no 
programming.  If outline doesn't sound like a good name to your 
vendor, you can easily change it.


Layer(7 outline)
(
Line[10 30 10 10 1000 2000 0x0004]
Line[40 10 40 30 1000 2000 0x0004]
Line[40 30 10 30 1000 2000 0x0004]
Line[10 10 40 10 1000 2000 0x0004]
)

In Gerbv, you'll be able to load a layer with just these four lines. 
It's probably good if the corners hit exactly the same point so as not 
to confuse your board-house's software.



phil


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gEDA-user: IPC 7351 name for wire terminal?

2006-10-10 Thread [EMAIL PROTECTED]


Hi,

I've reviewed the naming conventions sheet, and other sources, but 
haven't figured out what to call a single-wire terminal.


I've been calling them something like:

TERM__wire_awg22.fp

Is there a more common name being used?  What is it?

Phil


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Re: gEDA-user: IPC 7351 name for wire terminal?

2006-10-10 Thread [EMAIL PROTECTED]

John Luciani wrote:


TP + pad size in metric + hole size in metric + height in metric.


TP it is.

How about a single-wire connector such as a .25 faston blade soldered to 
the pcb?  E.G. Keystone 4966.  Thanks.


Pt



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