Re: gEDA-user: zview/ngscope

2011-04-17 Thread A.Burinskiy

Rick,

I wrote ngscope to suit analog designer need, including update of plots 
on fly. So far it is possible to do through menu. If you have any 
interface in mind I may easy include it into my code.
Additional features includes - choose any X-axis, equation driven 
interface, support for user defined functions library. I'm working on it 
adding new features. If you have some particular in mind - let me know 
please.


Thanks,
Alex.

On 04/17/2011 01:15 PM, rickman wrote:

On 4/4/2011 11:44 PM, Kai-Martin Knaak wrote:

A.Burinskiy wrote:


I did not saw satisfactory analog viewer for ngspice. Could you please
send me a link or project name?

Over the years several waveform projects have been tossed around
on this list:

gwavehttp://gwave.sourceforge.net/
gtkwave  http://gtkwave.sourceforge.net/
KJWaves  http://sourceforge.net/projects/kjwaves/
dataplot http://www.h-renrew.de/h/dataplot/dataplot.html

When I had the need for an interactive waveform viewer that could
also be driven by an application, I had good success with
xmgrace http://plasma-gate.weizmann.ac.il/Grace/
It is fully scriptable and can produce publication quality plots,
too.


Would any of these be suitable for a real time update of an o'scope 
display?  I'm just batting around some ideas and would like to find 
some software to base an o'scope UI on.


Rick


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Re: gEDA-user: zview/ngscope

2011-04-04 Thread A.Burinskiy

Hi Kaimartin,

I did not saw satisfactory analog viewer for ngspice. Could you please 
send me a link or project name? My goal was to have viewer for ngspice, 
which I use for IC design, with all the specific requirements for this 
field. Thus I suit ngsope for this - analyzes ngspice waveforms, noise 
plots, biasing observation, stability analyzes (Bode plots), transients 
etc. I do not know any viewer with such capabilities in OSS.


Integration of simulator and gschem - that is gschem developers 
business, but I do not think it will ever happened due to obvious reason 
- there is no in OSS standard simulator which everyone uses. I prefer 
ngspice - the most powerful simulator in OSS. Second reason - 
integration by itself useless, to make it powerful models should be 
developed for every component used. Another reason - UNIX is terminal 
driven thing, with all the consequences. From my practice - GUI is just 
a candy - too much sugar and no health, it significantly limits tool 
capability By the way, I remember sourceforge has at list one GUI 
with interface to simulator. I try this long time ago. Useless.


Thanks,
Alex.

On 04/04/2011 03:04 AM, Kai-Martin Knaak wrote:

A.Burinskiy wrote:


Due to name conflict I rename program zview to ngscope, did minor
corrections and submit it to sourceforge again.

Just curious: Why are there so many projects for viewers of simulation
data? I'd personally see the more immediate need in a better integration
of simulation with the gschem GUI.

---)kaimartin(---





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Re: gEDA-user: zview/ngscope

2011-04-04 Thread A.Burinskiy

Hi Andrzej,

Thank you very much for the warm words.
If you do not mind, could you please send me result of
ngscope -v
It should tell wxWidget version against which it was compiled. Also, 
could you please send me what exactly exception was generated and what 
file you did use as a test.


Thanks a lot,
Alex.

On 04/04/2011 10:19 PM, Andrzej wrote:

Alex,

I just wanted to say that I'm watching your project with interest and
that I don't consider ngscope yet another waveform viewer. If you
could bring it to a usable state it would be very useful tool for my
own work. I've tried it but it throws an exception when loading
simulation results (using your own sample data) and then fails to do
anything as the signal list is empty. Tested on Ubuntu 11.4 beta.

I'm also following the development of oscopy, although it seems to
focus more on data post-processing rather than interactive work with
simulation results (still, it is pretty good, if it only supported
more input formats). On these rare occasions when I tried OS
simulators I was usually viewing the results in a spice3 built-in
viewer or gwave. Neither of them really had features I'd expect from a
good waveform viewer.

IMHO writing a good waveform viewer is a great thing to do, as it is
an easiest way of getting a foothold in the real-world workflows.
Schematic/PCB/layout editors suffer from severe vendor lock-in,
professional grade simulators or verification tools are niche and
difficult to implement. In comparison, waveform viewers are relatively
easy and are being used all the time by almost every engineer working
in the field.

Thanks,

Andrzej

On Mon, Apr 4, 2011 at 8:45 PM, A.Burinskiyalexb...@gmail.com  wrote:

Hi Kaimartin,

I did not saw satisfactory analog viewer for ngspice. Could you please send
me a link or project name? My goal was to have viewer for ngspice, which I
use for IC design, with all the specific requirements for this field. Thus I
suit ngsope for this - analyzes ngspice waveforms, noise plots, biasing
observation, stability analyzes (Bode plots), transients etc. I do not know
any viewer with such capabilities in OSS.

Integration of simulator and gschem - that is gschem developers business,
but I do not think it will ever happened due to obvious reason - there is no
in OSS standard simulator which everyone uses. I prefer ngspice - the most
powerful simulator in OSS. Second reason - integration by itself useless, to
make it powerful models should be developed for every component used.
Another reason - UNIX is terminal driven thing, with all the consequences.
 From my practice - GUI is just a candy - too much sugar and no health, it
significantly limits tool capability By the way, I remember sourceforge
has at list one GUI with interface to simulator. I try this long time ago.
Useless.

Thanks,
Alex.


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gEDA-user: zview/ngscope

2011-04-03 Thread A.Burinskiy

Hello,

Due to name conflict I rename program zview to ngscope, did minor 
corrections and submit it to sourceforge again.


Thanks,
Alex.


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Re: gEDA-user: zview

2011-03-30 Thread A.Burinskiy

Hello,

Sorry for inconvenience, for some reason file was uploaded partially. 
Please try again. md5sum in the readme. Will place screenshots soon.


Thanks,
Alex.



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gEDA-user: zview

2011-03-29 Thread A.Burinskiy

Dear gEDA community,

I publish program on sourceforge.org that displays ngspice raw files. 
Project name is zview. Appreciate any feedback.


Thanks,
Alex.


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Re: gEDA-user: gnucap development snapshot 2009-09-28

2009-09-28 Thread A.Burinskiy
Hi Al,

I have difficulty getting raw file as an output of simulation using 
version that is shipped with Fedora 11. Does something changed since 
that time? Or how I could get raw file out of simulation? (I'm going to 
try big simulation that produces a lot of data)

Thanks,
Alex.

On 09/28/2009 05:04 PM, al davis wrote:
 There is a new development snapshot available ...
 http://gnucap.org/devel/gnucap-2009-09-28.tar.gz

 Optional plugin files:
 http://gnucap.org/devel/gnucap-2009-09-28-models-bsim.tar.gz
 http://gnucap.org/devel/gnucap-2009-09-28-models-jspice3-2.5.tar.gz
 http://gnucap.org/devel/gnucap-2009-09-28-models-ngspice17.tar.gz
 http://gnucap.org/devel/gnucap-2009-09-28-models-spice3f5.tar.gz
 http://gnucap.org/devel/gnucap-2009-09-28-tools.tar.gz

 This file contains the md5sum of the other files, so you can
 check for a proper download:
 http://gnucap.org/devel/gnucap-2009-09-28.md5sum

 This release has changes to the elaboration phase of simulation.
 There are three differences you will see ..

 1. (Important!)
 It fixes a bug that sometimes caused incorrect parameter values
 in some cases.  The bug would manifest with a certain combination
 of subcircuits, models, and parameters.

 In particular, something like this would give bad results:

 .subckt foo (a k)
 .model dio d (is={isat})
 dfoo (a k) dio
 .ends

 ...
 x1 (1 2) foo isat=1u
 x2 (2 3) foo isat=2u
 ...

 ..  would have the wrong value of isat.

 Circuits that did not have this combination of models, subckt, and params
 did not have this problem.


 2. (cosmetic)
 Taming of redundant warnings that would be printed in the
 elaboration phase.  Also, bad parameter warnings from
 spice models using plugins are now printed, only once,
 on readin, instead of multiple times on elaboration.

 3. (new models)
 The tarball models-bsim includes new models, including
 the new BSIM4SOI, released Sep 22 and the new BSIM465,
 release Sep 9.

 ===

 As usual, to get started you need only the main package
 gnucap-2009-xx-xx.tar.gz .



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Re: gEDA-user: Yet another netlister

2009-08-10 Thread A.Burinskiy
On 08/10/2009 06:03 AM, John Doty wrote:
 On Aug 9, 2009, at 9:59 PM, A.Burinskiy wrote:


 John,

 Do you mean that one day source= attribute is reference to schematic,
 another day it is something else?
  

 No, I mean that many back ends need to see a flat netlist, while in
 the future others will need to see the hierarchy. The ones that need
 to see the hierarchy will need to see the source= attributes. All of
 them.


If I'm correct source= has the same meaning regardless flat or 
hierarchical netlist.
 We have to stick to some reasonable
 meaning of all attributes, at list to be able to exchange libraries
 and
 collect our work over the years, isn't it?
  

 Yes. That's one reason I recommended you master the documentation for
 spice-sdb before writing another SPICE netlister.

I think I'm getting closer to what you mean, but not yet there. I think 
about expanding routin for some back end, but still thinking what lang. 
I should use for that. May be simpliest would be something like
printf %refdes %net %attr ? Rather then full blown language? Guile too 
complex for this simple task. Any way the most critical for me now is 
waveform viewer. I found that existing few do not fit the purpose, and 
I'm dealing with that. If you convince me I will do two tasks in || - 
and will write backend.

 Talking about ynetlist: it has exactly front, inner, and backend. I
 call
 it component/net collection, symbol elaboration, output netlist. By
 modifying only output I may create any netlist. But yet I do not see a
 reason why user should mangle with programming It is programmer
 responsibility to cover all needs.
  

 I absolutely and emphatically disagree. Users cannot count on
 programmers to solve the right problems. Programmers are masters of
 technique, but the most important knowledge needed to make a
 successful program is understanding of the *application*. Users need
 to take that responsibility.

 It's similar to writing a scientific paper: a scientist must be the
 main author. A technical writer is very useful in the process, but
 not central. Programming is an essential enabling skill, similar to
 technical writing. Everybody should have a reasonable level of
 competence here. Specialist programmers are there to help produce the
 highest quality product, not to choose how to address the problem to


In commercial world it is absolutely true, and I 100% agree with you. 
But we are in Open source domain. Main difference? Right! In Open Source 
World the programs are written by end users!
 be solved.

 John Doty  Noqsi Aerospace, Ltd.
 http://www.noqsi.com/
 j...@noqsi.com




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Re: gEDA-user: Yet another netlister

2009-08-10 Thread A.Burinskiy
John,

It is not a big deal to write a parser. The big deal is creating 
meaningful language. Flexible enough, yet not overloaded with features, 
transparent and logical, understandable not only for designer, but to 
end user too. My problem is that I'm newbee for the PCB. Just started 
using commercial tool. And already very happy with that
Over years I was busy with IC design and IC layouts. My last PCB design 
was shortly after graduation. So, I do have little knowledge of PCB 
community needs. I wrote netlister for IC community (or beeing precise  
- for me). If you could give me a hint on lang. semantic that would be 
usefull, I will gladly write parser. I think that gnetlist 
implementation is too heavy and not flexible enough. It depends too much 
on device= attr. For example, to determine whether something is 
netlistable or not it is enough to see whether it has isDef(refdes)  
(device!=none). /*In reality I do some more checks*/, rather then 
writing semantic for each individual device. Special case - in/out 
terminals of subcircuit, that should parse there names to subcircuit 
nets... etc (One of the reason I decided to hardcode backend). 
Attributes could be filtered out, rather then verified against valid 
list one by one, as its done on gnetlist. All this little things allows 
to avoid extensive backend programming, when introducing new very simple 
device cause Guile/Schem study

  Lets work on some universal netlister that will be accepted by both IC 
and PCB communities?

Alex.

On 08/10/2009 07:57 AM, John Doty wrote:

 I agree. But how it's to be *processed* depends on the needs of the
 netlist back end. It'd be nice, for example, to have a gnetlist back
 end that can extract the dependency graph for a hierarchical design.
 In the past, my tool for doing that has been a Japanese grad
 student. ;-)




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Re: gEDA-user: Yet another netlister

2009-08-09 Thread A.Burinskiy
John,

Do you mean that one day source= attribute is reference to schematic, 
another day it is something else? We have to stick to some reasonable 
meaning of all attributes, at list to be able to exchange libraries and 
collect our work over the years, isn't it?
Talking about ynetlist: it has exactly front, inner, and backend. I call 
it component/net collection, symbol elaboration, output netlist. By 
modifying only output I may create any netlist. But yet I do not see a 
reason why user should mangle with programming It is programmer 
responsibility to cover all needs.

Alex.


On 08/09/2009 04:43 PM, John Doty wrote:
 On Aug 9, 2009, at 3:19 PM, Kai-Martin Knaak wrote:


  
 For me that's not the issue: the issue is that you're putting yet
 another gnetlist behavior out of reach of back end control.

 You mean, the behavior of a netlister should depend on the order of
 components in the *.sch file?  Please give an example if you seriously
 think so.
  

 No. The order isn't the issue. The issue is that the front end should
 not arbitrarily restrict which attributes the back end gets to see.
 In this case the arbitrary selection is based on order, but it's the
 arbitrariness that's the problem. not the order.

 A back end that processes hierarchy on its own should see all of the
 source= attributes. A more sophisticated BOM than we have might
 usefully choose from multiple manufacturers' part numbers.

 But remember that neither you nor I can anticipate what information a
 future back end might need. Don't focus narrowly on specific
 scenarios. Let the back ends decide what they need to see. Don't hard
 wire decisions in the front end code. In this case, remove the
 arbitrary selection from the hard wired code and put it in the middle
 layer, where the back end can bypass it as needed.

 This kind of flexibility is gEDA's greatest strength. DO NOT DAMAGE
 IT. Don't hard wire anything new. Instead, let's improve it, move the
 decisions to the middle layer and back ends.

 John Doty  Noqsi Aerospace, Ltd.
 http://www.noqsi.com/
 j...@noqsi.com




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Re: gEDA-user: Yet another netlister

2009-08-01 Thread A.Burinskiy
Hi R,

I thought about implementing some language for netlist and after all I 
decided to go with plain C++ and get rid of using device attribute 
unless it is absolutely necessary (such as input/output pin) and give 
more strength to user symbol definition relying on the fact that end 
user knows what [s]he does. After all, each symbol translated into very 
fixed semantic (Refdes node1 node2 name attributes ...).

Major problem - if syntax of gschem files will be changed, then gschem 
may loose compatibility with all previously collected works! Thus, if 
gschem will change format of output files it will change it in 
compatible way or being more strict - only on incremental way. In this 
case it would not be hard to make incremental adds to the code, if 
algorithm itself is flexible and transparent enough (C++, pcb/spice 
output formats, flattening/hierarchical some keys in config file). If 
you think of adding more flexibility I will be more than glad to change 
the code.

Speaking more about netlisters. Scriptising netlister - adding language 
inside language (you translate from .sch lang. to .net lang. using 
script) will force netlister to be more hardcoded (that is what 
happened with gnetlist, is not it?) instead of expectations to make more 
flexible semantic.

And, finally, me, as a user, will not be happy to change the script each 
time I add new symbol!

In one word - I made my life easier choosing C++ without Perl or 
whatever. I think that definite advantage of using script will have tool 
that involves highly interactive tasks, for example analyzing result of 
simulation using waveform viewer, layout creation tool, PR Even for 
schematic entry - I doubt that scriptising schematic capture tool will help!

Regards,
Alex.

On 08/01/2009 03:17 AM, r wrote:
 On Fri, Jul 31, 2009 at 8:49 PM, A.Burinskiyalexb...@gmail.com  wrote:

 Dear gEDA community members,

 I created yet another netlister for gschem. Netlister supports flattened
 or hierarchical netlist, handles slotting and global net names. Will be
 glad to hear any feedback. The source located in:
 http://sourceforge.net/projects/ynetlist/files/
  

 I will have a closer look at it later. Thanks.

 I'm a bit puzzled that all of you tend to choose C/C++ for
 implementing your tools. Netlisters are expected to be extendable by
 their end users but such a low level implementation language together
 with a build environment is a significant obstacle to it. It is not a
 theoretical dispute - I've been trying to extend Anthony's spnet and I
 soon got tired of doing text processing in C.

 Please treat this as my private suggestion only: would you or Anthony
 consider rewriting your tool in Perl, Python or some other major
 scripting language?

 So far only gnetlist tries to employ some higher level language
 (guile) for processing the netlist but it suffers form other problems
 (guile itself is not very mature and gnetlist architecture is
 hardcoded in C, which is why it is so hard to add the hierarchy
 support to it).

 Regards,
 -r.


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gEDA-user: Yet another netlister

2009-07-31 Thread A.Burinskiy
Dear gEDA community members,

I created yet another netlister for gschem. Netlister supports flattened 
or hierarchical netlist, handles slotting and global net names. Will be 
glad to hear any feedback. The source located in:
http://sourceforge.net/projects/ynetlist/files/

Thanks,
Alex.


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Re: gEDA-user: Yet another netlister

2009-07-31 Thread A.Burinskiy
Actually there is option for ynetlist -g{pcb,spice}. I do output for 
PCB, but it is a very first cut. I do not know output format that I have 
to use. Try this option, type

ynetlist -gpcb filename.sch

Then send me comments and I will correct output to be the right one.

Please let me know tool that you are going to use with pcb format, may 
be I will be able to dig from that side to find what I have to put into 
output file.

Alex.

On 07/31/2009 02:46 PM, Kai-Martin Knaak wrote:
 On Fri, 31 Jul 2009 12:49:57 -0700, A.Burinskiy wrote:


 I created yet another netlister for gschem. Netlister supports flattened
 or hierarchical netlist, handles slotting and global net names. Will be
 glad to hear any feedback. The source located in:
 http://sourceforge.net/projects/ynetlist/files/
  

 The README seems to imply, that this netlisters primary use is to provide
 input for gnucap. Are there plans to output pcb format, too?

 ---(kaimartin)---




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Re: gEDA-user: Yet another netlister

2009-07-31 Thread A.Burinskiy
Actually only one: gnetlist could be found from gEDA site. All others 
have to be tested and if it suits purpose offered for download from gEDA 
site.

On 07/31/2009 03:45 PM, Anthony Shanks wrote:
 Wow another netlister, that makes 4 now?

 gnetlist
 spnet
 gnetman
 ynetlist

 At least gEDA users have plenty of choices now.

 On Fri, Jul 31, 2009 at 12:49 PM, A.Burinskiyalexb...@gmail.com  wrote:

 Dear gEDA community members,

 I created yet another netlister for gschem. Netlister supports flattened
 or hierarchical netlist, handles slotting and global net names. Will be
 glad to hear any feedback. The source located in:
 http://sourceforge.net/projects/ynetlist/files/

 Thanks,
 Alex.


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Re: gEDA-user: Yet another netlister

2009-07-31 Thread A.Burinskiy
Dan,

No doubt, we need someone to identify week and strong parts of various 
netlisters and choose one-two for support. As to me, I was trying 
gnetlist and spnet (I was unaware of gnetman). Non of them did worked 
fine for me. That was a reason I wrote netlister for myself, then 
consider that it will be good to offer it for community. Yes, it will be 
pain if gschem format will be changed. And one good change is adding 
reference to library for instantiated symbols. It will stick each 
project to a particular list of libraries, as it is done in commercial 
CAD tools.

Thanks,
Alex.

On 07/31/2009 04:42 PM, Dan McMahill wrote:
 A.Burinskiy wrote:

 Dear gEDA community members,

 I created yet another netlister for gschem. Netlister supports flattened
 or hierarchical netlist, handles slotting and global net names. Will be
 glad to hear any feedback. The source located in:
 http://sourceforge.net/projects/ynetlist/files/
  

 I hate to complain when someone is contributing something which may be
 useful, but I have to wonder if netlister efforts could be better spent
 in fixing the various issues people have with gnetlist instead of
 inventing many more netlisters  Here is my concern.  The gEDA
 community isn't all that large and there are fairly limited resources
 for it.  Having multiple netlisters seems to just produce the problem of
 too many places for identical bugs to creep in and spreading people too
 thin.

 Is there anyone who has tried all 4 netlisters and would be in a
 position to maybe make a table that somehow gives a sane comparison
 between the 4?  That might be a useful way to help identify areas in
 each that need work.

 Oh, lets not even think about how much work is caused if gschem needs to
 update its file format and there are N different parsers out there.

 -Dan



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Re: gEDA-user: spNet v0.9.2 released

2009-06-30 Thread A.Burinskiy
John,

Could you please explain in detail, what does your comment mean?

/* Note that there was never any serious difficulty doing this with gnetlist -g 
spice-sdb and a makefile.
*/

Thanks,
Alex.

On 06/30/2009 11:48 AM, John P. Doty wrote:
 Anthony Shanks wrote:

 http://spnet.code-fusion.net

 More of a beta/trial release, but I've done considerable testing with
 both my symbol libraries and the default gEDA libraries and everything
 for the most part seems smooth. For those of you who aren't familar
 with spNet, it's a spice netlister for gEDA that can netlist
 hierarchical schematics using the spice .subckt directive (which are
 easier to read and simulate faster).
  
 Note that there was never any serious difficulty doing this with
 gnetlist -g spice-sdb and a makefile.

   It also has many more features
 detailed in the documentation (up to date now on the homepage). If
 anybody has any questions or any issues with spNet let me know.


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Re: gEDA-user: hierarchy and refdes_renum

2009-06-24 Thread A.Burinskiy
 error will come up
  with there is a symbol in your schematic without a valid device
  attribute. Here is a list of devices that are current supported
  (device=)



  RESISTOR

  CAPACITOR

  INDUCTOR

  NPN_TRANSISTOR

  PNP_TRANSISTOR
  NMOS3T

  NMOS4T

  PMOS3T

  PMOS3T

  SUBCKT
  VOLTAGE_SOURCE
  CURRENT_SOURCE

  PIN



  As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
  release as a 4 terminal mosfet device. Besides this, do you have any
  components in your schematic that is not on the above list?



  BTW, thanks for all your help in debugging.



  -Anthony

  On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
  wrote:

Hi Anthony,
Yes, the cause of segfault are empty strings at the end of file. 
 Do
you
support comment out in .spnetlibs? I will go ahead and try your 
 new
code.
Thanks,
Alex

  On 06/23/2009 03:03 AM, Anthony Shanks wrote:
Wow. I guess I have a lot to learn as far as releasing code 
 and
compiling versions go because it works fine on my end with 
 gcc 4.3.
Sorry this is the first time I've released code (this big), 
 please
bare with me.
  
I tried one lib in spnetlibs with your line exactly and it 
 works
  fine
without a segfault. Can you attach your spnetlibs to ensure 
 I'm 100%
using exactly? One thing I did notice though is that if the 
 file
exists but is empty it does segfault. I just fixed this 
 error and
reuploaded it but I think it may go back to giving you the 
 invalid
  lib
error (you can redownload it from the same link). Are you 
 sure there
are not blank lines or anything in your file?
  
Also about number 1 and number 2 thoughts. That plan was 
 already in
the works for the official release. Most of the symbols from 
 gschem
work with spnet except the mosfets since geda does not have 
 a 3
terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work 
 for 4
terminal devices. Also I plan for spnet to read the libraries
  already
defined in the gEDA rc files. This will also be done in the 
 next
release. I'll try to get a version that does this by the end 
 of the
week however.
  
Let me know how it goes after you try the newest update.
  
-Anthony
  
  

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Re: gEDA-user: hierarchy and refdes_renum

2009-06-24 Thread A.Burinskiy
 that are current supported
 (device=)



 RESISTOR

 CAPACITOR

 INDUCTOR

 NPN_TRANSISTOR

 PNP_TRANSISTOR
 NMOS3T

 NMOS4T

 PMOS3T

 PMOS3T

 SUBCKT
 VOLTAGE_SOURCE
 CURRENT_SOURCE

 PIN



 As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
 release as a 4 terminal mosfet device. Besides this, do you have any
 components in your schematic that is not on the above list?



 BTW, thanks for all your help in debugging.



 -Anthony

 On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
 wrote:

   Hi Anthony,
   Yes, the cause of segfault are empty strings at the end of file. Do
   you
   support comment out in .spnetlibs? I will go ahead and try your new
   code.
   Thanks,
   Alex

 On 06/23/2009 03:03 AM, Anthony Shanks wrote:
   Wow. I guess I have a lot to learn as far as releasing code and
   compiling versions go because it works fine on my end with gcc 4.3.
   Sorry this is the first time I've released code (this big), please
   bare with me.
 
   I tried one lib in spnetlibs with your line exactly and it works
 fine
   without a segfault. Can you attach your spnetlibs to ensure I'm 100%
   using exactly? One thing I did notice though is that if the file
   exists but is empty it does segfault. I just fixed this error and
   reuploaded it but I think it may go back to giving you the invalid
 lib
   error (you can redownload it from the same link). Are you sure there
   are not blank lines or anything in your file?
 
   Also about number 1 and number 2 thoughts. That plan was already in
   the works for the official release. Most of the symbols from gschem
   work with spnet except the mosfets since geda does not have a 3
   terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work for 4
   terminal devices. Also I plan for spnet to read the libraries
 already
   defined in the gEDA rc files. This will also be done in the next
   release. I'll try to get a version that does this by the end of the
   week however.
 
   Let me know how it goes after you try the newest update.
 
   -Anthony
 
 

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Re: gEDA-user: hierarchy and refdes_renum

2009-06-24 Thread A.Burinskiy
 are not supported yet, it's on the todo list.



  Is the new code working yet? the invalid compoent error will come up
  with there is a symbol in your schematic without a valid device
  attribute. Here is a list of devices that are current supported
  (device=)



  RESISTOR

  CAPACITOR

  INDUCTOR

  NPN_TRANSISTOR

  PNP_TRANSISTOR
  NMOS3T

  NMOS4T

  PMOS3T

  PMOS3T

  SUBCKT
  VOLTAGE_SOURCE
  CURRENT_SOURCE

  PIN



  As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
  release as a 4 terminal mosfet device. Besides this, do you have any
  components in your schematic that is not on the above list?



  BTW, thanks for all your help in debugging.



  -Anthony

  On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
  wrote:

Hi Anthony,
Yes, the cause of segfault are empty strings at the end of file. 
 Do
you
support comment out in .spnetlibs? I will go ahead and try your 
 new
code.
Thanks,
Alex

  On 06/23/2009 03:03 AM, Anthony Shanks wrote:
Wow. I guess I have a lot to learn as far as releasing code 
 and
compiling versions go because it works fine on my end with 
 gcc 4.3.
Sorry this is the first time I've released code (this big), 
 please
bare with me.
  
I tried one lib in spnetlibs with your line exactly and it 
 works
  fine
without a segfault. Can you attach your spnetlibs to ensure 
 I'm 100%
using exactly? One thing I did notice though is that if the 
 file
exists but is empty it does segfault. I just fixed this 
 error and
reuploaded it but I think it may go back to giving you the 
 invalid
  lib
error (you can redownload it from the same link). Are you 
 sure there
are not blank lines or anything in your file?
  
Also about number 1 and number 2 thoughts. That plan was 
 already in
the works for the official release. Most of the symbols from 
 gschem
work with spnet except the mosfets since geda does not have 
 a 3
terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work 
 for 4
terminal devices. Also I plan for spnet to read the libraries
  already
defined in the gEDA rc files. This will also be done in the 
 next
release. I'll try to get a version that does this by the end 
 of the
week however.
  
Let me know how it goes after you try the newest update.
  
-Anthony
  
  

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Re: gEDA-user: hierarchy and refdes_renum

2009-06-24 Thread A.Burinskiy
  NMOS3T

  NMOS4T

  PMOS3T

  PMOS3T

  SUBCKT
  VOLTAGE_SOURCE
  CURRENT_SOURCE

  PIN



  As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
  release as a 4 terminal mosfet device. Besides this, do you have any
  components in your schematic that is not on the above list?



  BTW, thanks for all your help in debugging.



  -Anthony

  On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
  wrote:

Hi Anthony,
Yes, the cause of segfault are empty strings at the end of file. 
 Do
you
support comment out in .spnetlibs? I will go ahead and try your 
 new
code.
Thanks,
Alex

  On 06/23/2009 03:03 AM, Anthony Shanks wrote:
Wow. I guess I have a lot to learn as far as releasing code 
 and
compiling versions go because it works fine on my end with 
 gcc 4.3.
Sorry this is the first time I've released code (this big), 
 please
bare with me.
  
I tried one lib in spnetlibs with your line exactly and it 
 works
  fine
without a segfault. Can you attach your spnetlibs to ensure 
 I'm 100%
using exactly? One thing I did notice though is that if the 
 file
exists but is empty it does segfault. I just fixed this 
 error and
reuploaded it but I think it may go back to giving you the 
 invalid
  lib
error (you can redownload it from the same link). Are you 
 sure there
are not blank lines or anything in your file?
  
Also about number 1 and number 2 thoughts. That plan was 
 already in
the works for the official release. Most of the symbols from 
 gschem
work with spnet except the mosfets since geda does not have 
 a 3
terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work 
 for 4
terminal devices. Also I plan for spnet to read the libraries
  already
defined in the gEDA rc files. This will also be done in the 
 next
release. I'll try to get a version that does this by the end 
 of the
week however.
  
Let me know how it goes after you try the newest update.
  
-Anthony
  
  

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Re: gEDA-user: hierarchy and refdes_renum

2009-06-23 Thread A.Burinskiy
Anthony,

The problem is that if empty strings exists at the end of file it cause 
segmentation fault. When I delete all empty strings, I've got:

$ ./spnet ~/geda/if.sch

spNet v0.9.1.2
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks

-I- Starting Build of Cell: if
-I- Adding Library: sym
-I- Adding Library: 4000
-I- Adding Library: altera
-I- Adding Library: apex
-I- Adding Library: bus
-I- Adding Library: dec
-I- Adding Library: font
-I- Adding Library: IEC417
-I- Adding Library: lattice
-I- Adding Library: maxim
-I- Adding Library: minicircuits
-I- Adding Library: opto
-I- Adding Library: power
-I- Adding Library: rf
-I- Adding Library: supervisor
-I- Adding Library: titleblock
-I- Adding Library: verilog
-I- Adding Library: 74
-I- Adding Library: amphenol
-I- Adding Library: asic
-I- Adding Library: cascade
-I- Adding Library: diod
-I- Adding Library: gnetman
-I- Adding Library: io
-I- Adding Library: linear
-I- Adding Library: memory
-I- Adding Library: misc
-I- Adding Library: philips
-I- Adding Library: radio
-I- Adding Library: spice
-I- Adding Library: switcap
-I- Adding Library: transistor
-I- Adding Library: vhdl
-I- Adding Library: allegro
-I- Adding Library: analog
-I- Adding Library: asicpads
-I- Adding Library: connector
-I- Adding Library: ecl
-I- Adding Library: idt
-I- Adding Library: irf
-I- Adding Library: local
-I- Adding Library: micro
-I- Adding Library: national
-I- Adding Library: pla
-I- Adding Library: relay
-I- Adding Library: st
-I- Adding Library: switch
-I- Adding Library: tube
-I- Adding Library: xilinx
-I- Combining Cells

-E- Fatal Error: Invalid Component.

Thanks,
Alex.

On 06/23/2009 01:10 AM, Anthony Shanks wrote:
 Thats really odd, I copied your line directly in my spnetlibs file and
 it worked fine. Maybe it's a gcc 4.4 issue? I really need to switch to
 gcc4.4 since is is catching stuff that gcc4.3 isn't (if this infact is
 the case).

 I updated spNet with some different code to retrieve the libs which is
 a little cleaner (I worte this function a long time ago and haven't
 looked at it since) and uploaded it to the site (same version). Please
 re-download it and recompile it and let me know if it still give you
 this error.

 -Anthony

 On Mon, Jun 22, 2009 at 9:05 PM, A.Burinskiyalexb...@gmail.com  wrote:

 Hi Anthony,

 Thanks a lot, now spNet compiles well.
 When I run it I have following error:

 $ spnet if.sch

 spNet v0.9.1
 gEDA/gschem Netlister
 Copyright 2009 Anthony Shanks

 -E- Invalid lib file. Syntax: library: PATH LibName

 [al...@bazilik buck1]$ more ~/.spnetlibs
 library: /home/username/tsmc sym





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-- 

Alexander Burinskiy
IC design
San Jose, CA, 95129
(408)230-3458 (cell)



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Re: gEDA-user: hierarchy and refdes_renum

2009-06-23 Thread A.Burinskiy
Hi Anthony,

Yes, the cause of segfault are empty strings at the end of file. Do you 
support comment out in .spnetlibs? I will go ahead and try your new code.

Thanks,
Alex

On 06/23/2009 03:03 AM, Anthony Shanks wrote:
 Wow. I guess I have a lot to learn as far as releasing code and
 compiling versions go because it works fine on my end with gcc 4.3.
 Sorry this is the first time I've released code (this big), please
 bare with me.

 I tried one lib in spnetlibs with your line exactly and it works fine
 without a segfault. Can you attach your spnetlibs to ensure I'm 100%
 using exactly? One thing I did notice though is that if the file
 exists but is empty it does segfault. I just fixed this error and
 reuploaded it but I think it may go back to giving you the invalid lib
 error (you can redownload it from the same link). Are you sure there
 are not blank lines or anything in your file?

 Also about number 1 and number 2 thoughts. That plan was already in
 the works for the official release. Most of the symbols from gschem
 work with spnet except the mosfets since geda does not have a 3
 terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work for 4
 terminal devices. Also I plan for spnet to read the libraries already
 defined in the gEDA rc files. This will also be done in the next
 release. I'll try to get a version that does this by the end of the
 week however.

 Let me know how it goes after you try the newest update.

 -Anthony





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Re: gEDA-user: hierarchy and refdes_renum

2009-06-23 Thread A.Burinskiy

Hi Anthony,

Yes, there is device that is not in the list and this is ground symbol. 
Please find diff file and test_v2i.sch attached. That is what I have 
(Please note, that your search for '=' sign, while there is no any '=' 
sign in the string...)


$ spnet test_v2i.sch

spNet v0.9.1.2
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks

-I- Starting Build of Cell: test_v2i
-I- Adding Library: sym
-I- Adding Library: power
-I- Combining Cells

-E- Fatal Error: Invalid Component attr C 42200 44200 1 0 0 gnd-1.sym.

$ more ~/.spnetlibs
library: /home/username/tsmc sym
library: /usr/local/share/gEDA/sym power



On 06/23/2009 09:39 AM, Anthony Shanks wrote:

Comments are not supported yet, it's on the todo list.



Is the new code working yet? the invalid compoent error will come up
with there is a symbol in your schematic without a valid device
attribute. Here is a list of devices that are current supported
(device=)



RESISTOR

CAPACITOR

INDUCTOR

NPN_TRANSISTOR

PNP_TRANSISTOR
NMOS3T

NMOS4T

PMOS3T

PMOS3T

SUBCKT
VOLTAGE_SOURCE
CURRENT_SOURCE

PIN



As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
release as a 4 terminal mosfet device. Besides this, do you have any
components in your schematic that is not on the above list?



BTW, thanks for all your help in debugging.



-Anthony

On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
wrote:

  Hi Anthony,
  Yes, the cause of segfault are empty strings at the end of file. Do
  you
  support comment out in .spnetlibs? I will go ahead and try your new
  code.
  Thanks,
  Alex

On 06/23/2009 03:03 AM, Anthony Shanks wrote:
  Wow. I guess I have a lot to learn as far as releasing code and
  compiling versions go because it works fine on my end with gcc 4.3.
  Sorry this is the first time I've released code (this big), please
  bare with me.

  I tried one lib in spnetlibs with your line exactly and it works
fine
  without a segfault. Can you attach your spnetlibs to ensure I'm 100%
  using exactly? One thing I did notice though is that if the file
  exists but is empty it does segfault. I just fixed this error and
  reuploaded it but I think it may go back to giving you the invalid
lib
  error (you can redownload it from the same link). Are you sure there
  are not blank lines or anything in your file?

  Also about number 1 and number 2 thoughts. That plan was already in
  the works for the official release. Most of the symbols from gschem
  work with spnet except the mosfets since geda does not have a 3
  terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work for 4
  terminal devices. Also I plan for spnet to read the libraries
already
  defined in the gEDA rc files. This will also be done in the next
  release. I'll try to get a version that does this by the end of the
  week however.

  Let me know how it goes after you try the newest update.

  -Anthony



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2. mailto:geda-user@moria.seul.org
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--- ../spnet-0.9.1.2/src/netlist.c  2009-06-23 02:59:13.0 -0700
+++ src/netlist.c   2009-06-23 09:25:45.140068435 -0700
@@ -307,7 +307,7 @@
}

// Mosfet
-   else if(strcmp(devices-device,NMOS3T) == 0 || 
strcmp(devices-device,PMOS3T) == 0 || strcmp(devices-device,NMOS4T) == 0 
|| strcmp(devices-device,PMOS4T) == 0)
+   else if(strcmp(devices-device,NMOS3T) == 0 || 
strcmp(devices-device,PMOS3T) == 0 || strcmp(devices-device,NMOS4T) == 0 
|| strcmp(devices-device,PMOS4T) == 0 || 
strcmp(devices-device,PMOS_TRANSISTOR) == 0 || 
strcmp(devices-device,NMOS_TRANSISTOR) == 0  )
{
// Get pininfo
pininfo = 
GrabPins(devices-filename,devices-rotate,devices-x,devices-y,devices-inverted,libs);
@@ -644,13 +644,13 @@
explist = explode(str,' ');
if(explist == NULL)
{
-   printf(\n-E- Fatal Error: Invalid Component.\n\n);
+   printf(\n-E- Fatal Error: Invalid Component. Empty 
explist\n\n);
exit(1);
}
explist = explist-next;
if(explist == NULL)
{
-   printf(\n-E- Fatal Error: Invalid Component.\n\n);
+   printf(\n

Re: gEDA-user: hierarchy and refdes_renum

2009-06-23 Thread A.Burinskiy
Hi Anthony,

The reason for the message

-E- Fatal Error: Invalid Component attr C 42200 44200 1 0 0 gnd-1.sym

Was that first component, that is title-B block listed in the 
test_v2i_2.sch without pair of { } !

Symbol spice-lib.sym is a special symbol. I did it. I think netlister 
should support custom symbols.
v 20090328 2
B 0 400 1900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 100 300 9 10 0 1 0 0 1
device=library
T 100 500 9 10 1 1 0 0 1
refdes=A?
T 600 500 9 10 1 0 0 0 1
SPICE LIBR
T 500 200 8 10 1 1 0 0 1
file=?
T 100 200 9 10 1 0 0 0 1
File:
T 0 -5 8 10 1 0 0 0 1
corner=TYP

And  v2i_2v.sym is real subcircuit.

After artificially adding this braces I've got (please note, that 
(42300;44500) corresponds to connection point of gnd symbol pin)

$ spnet test_v2i.sch

spNet v0.9.1.2
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks

-I- Starting Build of Cell: test_v2i
-I- Adding Library: sym
-I- Adding Library: power
-I- Combining Cells
-W- Device in cell test_v2i does not have a refdes, ignoring.
-W- Device in cell test_v2i does not have a refdes, ignoring.
-E- Net stitch failure in cell test_v2i near point 42300,44500.

Thanks,
Alex.



On 06/23/2009 10:54 AM, Anthony Shanks wrote:
 Hmm, a few things.

 Is that ground symbol the default that comes with gschem (device=none,
 netname=0)? Can't look right now, at work.

 I also noticed a few things in your schematic that is definitely not
 supported (right now):

 C 47000 49500 1 0 0 spice-lib.sym
 C 5 44900 1 0 0 v2i_2v.sym

 What are these? I assume the spice-lib.sym is a subckt netlist but I
 don't know what the other is.

 A quick fix in your case with the ground symbol is just to add the
 attribute device=globalnode and net=0.

 -Anthony

 On Tue, Jun 23, 2009 at 10:00 AM, A.Burinskiyalexb...@gmail.com  wrote:

 Hi Anthony,

 Yes, there is device that is not in the list and this is ground symbol.
 Please find diff file and test_v2i.sch attached. That is what I have (Please
 note, that your search for '=' sign, while there is no any '=' sign in the
 string...)

 $ spnet test_v2i.sch

 spNet v0.9.1.2
 gEDA/gschem Netlister
 Copyright 2009 Anthony Shanks

 -I- Starting Build of Cell: test_v2i
 -I- Adding Library: sym
 -I- Adding Library: power
 -I- Combining Cells

 -E- Fatal Error: Invalid Component attr C 42200 44200 1 0 0 gnd-1.sym.

 $ more ~/.spnetlibs
 library: /home/username/tsmc sym
 library: /usr/local/share/gEDA/sym power



 On 06/23/2009 09:39 AM, Anthony Shanks wrote:
  
 Comments are not supported yet, it's on the todo list.



 Is the new code working yet? the invalid compoent error will come up
 with there is a symbol in your schematic without a valid device
 attribute. Here is a list of devices that are current supported
 (device=)



 RESISTOR

 CAPACITOR

 INDUCTOR

 NPN_TRANSISTOR

 PNP_TRANSISTOR
 NMOS3T

 NMOS4T

 PMOS3T

 PMOS3T

 SUBCKT
 VOLTAGE_SOURCE
 CURRENT_SOURCE

 PIN



 As stated I will add suport for [N|P]MOS_TRANSISTOR in the next
 release as a 4 terminal mosfet device. Besides this, do you have any
 components in your schematic that is not on the above list?



 BTW, thanks for all your help in debugging.



 -Anthony

 On Tue, Jun 23, 2009 at 3:12 AM, A.Burinskiy[1]alexb...@gmail.com
 wrote:

   Hi Anthony,
   Yes, the cause of segfault are empty strings at the end of file. Do
   you
   support comment out in .spnetlibs? I will go ahead and try your new
   code.
   Thanks,
   Alex

 On 06/23/2009 03:03 AM, Anthony Shanks wrote:
 Wow. I guess I have a lot to learn as far as releasing code and
 compiling versions go because it works fine on my end with gcc 4.3.
 Sorry this is the first time I've released code (this big), please
 bare with me.
 
 I tried one lib in spnetlibs with your line exactly and it works
 fine
 without a segfault. Can you attach your spnetlibs to ensure I'm 
 100%
 using exactly? One thing I did notice though is that if the file
 exists but is empty it does segfault. I just fixed this error and
 reuploaded it but I think it may go back to giving you the invalid
 lib
 error (you can redownload it from the same link). Are you sure 
 there
 are not blank lines or anything in your file?
 
 Also about number 1 and number 2 thoughts. That plan was already in
 the works for the official release. Most of the symbols from gschem
 work with spnet except the mosfets since geda does not have a 3
 terminal symbol. I plan on making [N,P]MOS_TRANSISTOR work for 4
 terminal devices. Also I plan for spnet to read the libraries
 already
 defined in the gEDA rc files. This will also be done in the next
 release. I'll try to get a version that does this by the end of the
 week however.
 
 Let me

gEDA-user: gnetlist: netlister doesn't extract subcircuits as a subcircuit but correct refdes

2009-06-22 Thread A.Burinskiy
Hi,

I'm using gnetlist -g spice-sdb ...

1. Netlister doesn't exctract subcircuits as a subcircuits, but correct 
refdes instead.
It puts, for example MX1/M23 instead of
.subckt ...
M23
.ends
X1 

2. netlister also doesn't correct Resistors. It is supposed that refdes 
will be corrected as RX1/R3, but gnetlist produces X1/R3

3. ngspice doesn't recognise MX1/M23  - it get confused with model 
name and treat it as a node. MX1_M23 fixes the problem, but keeping 
subckt sounds more reasonable against flattening netlist.

Is any way to correct gnet_spice-sdb to get list subckt as a subckt? I 
try CVS version and 1.5.2 with the same bad results.

Thanks,
Alex.



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Re: gEDA-user: hierarchy and refdes_renum

2009-06-22 Thread A.Burinskiy
Hi Anthony,

Thank you very much for the spNet. I'm trying to compile your tool. The 
result is below:

$ make
Making all in src
make[1]: Entering directory 
`/home/alexb/Download/geda/spnet/spnet-0.9.1/src'
gcc -DPACKAGE_NAME=\\ -DPACKAGE_TARNAME=\\ -DPACKAGE_VERSION=\\ 
-DPACKAGE_STRING=\\ -DPACKAGE_BUGREPORT=\\ -DPACKAGE=\spnet\ 
-DVERSION=\0.8\ -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 
-DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 
-DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 
-DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 
-DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_STDLIB_H=1 -DHAVE_REALLOC=1 
-DHAVE_STRFTIME=1 -DHAVE_STRCHR=1 -DHAVE_STRDUP=1 -DHAVE_STRRCHR=1 
-DHAVE_STRSTR=1 -I. -I../include -Wall -g -O2 -MT io.o -MD -MP -MF 
.deps/io.Tpo -c -o io.o io.c
In file included from io.c:15:
../include/str.h:14: error: conflicting types for ‘getline’
/usr/include/stdio.h:653: note: previous declaration of ‘getline’ was here
make[1]: *** [io.o] Error 1
make[1]: Leaving directory `/home/alexb/Download/geda/spnet/spnet-0.9.1/src'
make: *** [all-recursive] Error 1

Could you please give a hint what is wrong? I'm using F11, x86_64.

Thanks,
Alex.


On 06/22/2009 03:33 PM, Anthony Shanks wrote:
 What is your end goal here? Just to have hierarchical schematics or do
 be able to produce a hierarchical netlist? IMHO hierarchical
 schematics in gschem work perfectly fine, it's netlisting them that as
 of right now is very hackery/broken which is why I started a new
 netlister spNet. You can download the latest version here
 http://spnet.code-fusion.net but be warned the documentation is very
 shotty/inaccurate since I haven't officially released it yet. Refer to
 my last post on this list for more details.

 On Sat, Jun 20, 2009 at 2:39 AM, Christoph Lechnercl0...@l-mx.de  wrote:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1

 Hi all,

 I'm just trying around with hierarchy. This is my first hierarchy
 design, and some questions remained open. I used the gTAG example as a
 starting point.

 What symbols do you use to 'declare' the pins in the subcircuit? I used
 the in-1.sym and out-1.sym, but using the refdes for the pin identifier
 looks like a hack to me. Is the used of these two symbols still state of
 the art or are there better ways to follow?
 So when renumbering the parts in the file, refdes_renum attaches a 1
 suffix to all the refdes attributes of the in-1 and out-1 symbols on the
 sheet, which is just a mess. Some Perl warnings pop up on the command
 line, BTW.

 What can I do to fix it?

 I run the outdated gEDA suite 1.4.0, but I md5-verified that in-1.sym,
 out-1.sym and refdes_renum are the same in the newest 1.4.3 release.

 CU
 - - Christoph
 -BEGIN PGP SIGNATURE-
 Version: GnuPG v1.4.7 (GNU/Linux)
 Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

 iD8DBQFKPK5TWo2QgtqY4K8RAti1AJ0RMEC0h2rsUvEKnXhVL+ebRrZtMgCggxiP
 OZN6KKI5RRXeZz9sXfMpPKM=
 =4tCj
 -END PGP SIGNATURE-


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Re: gEDA-user: hierarchy and refdes_renum

2009-06-22 Thread A.Burinskiy

Hi Anthony,

Please find config.log attached.

Thanks,
Alex.


On 06/22/2009 04:03 PM, Anthony Shanks wrote:

Odd, I thought I did a configure/make/make install before I released
to to make sure it compiles platform independent.

What did you configure line look like and can you email me your
config.log? I'll get back to you in a few hours since I'm still at
work.

On Mon, Jun 22, 2009 at 3:47 PM, A.Burinskiyalexb...@gmail.com  wrote:
   

Hi Anthony,

Thank you very much for the spNet. I'm trying to compile your tool. The
result is below:

$ make
Making all in src
make[1]: Entering directory
`/home/alexb/Download/geda/spnet/spnet-0.9.1/src'
gcc -DPACKAGE_NAME=\\ -DPACKAGE_TARNAME=\\ -DPACKAGE_VERSION=\\
-DPACKAGE_STRING=\\ -DPACKAGE_BUGREPORT=\\ -DPACKAGE=\spnet\
-DVERSION=\0.8\ -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1
-DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1
-DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1
-DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1
-DHAVE_STDLIB_H=1 -DHAVE_MALLOC=1 -DHAVE_STDLIB_H=1 -DHAVE_REALLOC=1
-DHAVE_STRFTIME=1 -DHAVE_STRCHR=1 -DHAVE_STRDUP=1 -DHAVE_STRRCHR=1
-DHAVE_STRSTR=1 -I. -I../include -Wall -g -O2 -MT io.o -MD -MP -MF
.deps/io.Tpo -c -o io.o io.c
In file included from io.c:15:
../include/str.h:14: error: conflicting types for ‘getline’
/usr/include/stdio.h:653: note: previous declaration of ‘getline’ was here
make[1]: *** [io.o] Error 1
make[1]: Leaving directory `/home/alexb/Download/geda/spnet/spnet-0.9.1/src'
make: *** [all-recursive] Error 1

Could you please give a hint what is wrong? I'm using F11, x86_64.

Thanks,
Alex.


On 06/22/2009 03:33 PM, Anthony Shanks wrote:
 

What is your end goal here? Just to have hierarchical schematics or do
be able to produce a hierarchical netlist? IMHO hierarchical
schematics in gschem work perfectly fine, it's netlisting them that as
of right now is very hackery/broken which is why I started a new
netlister spNet. You can download the latest version here
http://spnet.code-fusion.net but be warned the documentation is very
shotty/inaccurate since I haven't officially released it yet. Refer to
my last post on this list for more details.

On Sat, Jun 20, 2009 at 2:39 AM, Christoph Lechnercl0...@l-mx.dewrote:

   

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Hi all,

I'm just trying around with hierarchy. This is my first hierarchy
design, and some questions remained open. I used the gTAG example as a
starting point.

What symbols do you use to 'declare' the pins in the subcircuit? I used
the in-1.sym and out-1.sym, but using the refdes for the pin identifier
looks like a hack to me. Is the used of these two symbols still state of
the art or are there better ways to follow?
So when renumbering the parts in the file, refdes_renum attaches a 1
suffix to all the refdes attributes of the in-1 and out-1 symbols on the
sheet, which is just a mess. Some Perl warnings pop up on the command
line, BTW.

What can I do to fix it?

I run the outdated gEDA suite 1.4.0, but I md5-verified that in-1.sym,
out-1.sym and refdes_renum are the same in the newest 1.4.3 release.

CU
- - Christoph
-BEGIN PGP SIGNATURE-
Version: GnuPG v1.4.7 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iD8DBQFKPK5TWo2QgtqY4K8RAti1AJ0RMEC0h2rsUvEKnXhVL+ebRrZtMgCggxiP
OZN6KKI5RRXeZz9sXfMpPKM=
=4tCj
-END PGP SIGNATURE-


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This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.

It was created by configure, which was
generated by GNU Autoconf 2.61.  Invocation command line was

  $ ./configure 

## - ##
## Platform. ##
## - ##

hostname = bazilik
uname -m = x86_64
uname -r = 2.6.29.4-167.fc11.x86_64
uname -s = Linux
uname -v = #1 SMP Wed May 27 17:27:08 EDT 2009

/usr/bin/uname -p = unknown
/bin/uname -X = unknown

/bin/arch  = x86_64
/usr/bin/arch -k   = unknown
/usr/convex/getsysinfo = unknown
/usr/bin/hostinfo  = unknown
/bin/machine   = unknown
/usr/bin/oslevel   = unknown
/bin/universe  = unknown

PATH: /usr/lib64/qt-3.3/bin
PATH: /usr/kerberos/bin
PATH: /usr/lib64/ccache
PATH: /usr/local/bin
PATH: /usr/bin
PATH: /bin
PATH: /usr/local/sbin
PATH: /usr/sbin
PATH: /sbin
PATH: /home/username/bin
PATH: 

Re: gEDA-user: hierarchy and refdes_renum

2009-06-22 Thread A.Burinskiy
Hi Anthony,

Thanks a lot, now spNet compiles well.
When I run it I have following error:

$ spnet if.sch

spNet v0.9.1
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks

-E- Invalid lib file. Syntax: library: PATH LibName

[al...@bazilik buck1]$ more ~/.spnetlibs
library: /home/username/tsmc sym





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Re: gEDA-user: Try to add component

2009-06-19 Thread A.Burinskiy
Hi Stuart,

Thank you very much for the instructions. Following your instruction I 
produced next patch and new symbol.

Thanks,
Alex.


--- geda-gnetlist-1.5.2/scheme/gnet-spice-sdb.scm2009-06-11 
04:42:06.063911837 -0700
+++ geda-gnetlist/scheme/gnet-spice-sdb.scm2009-06-17 
17:28:10.236009806 -0700
@@ -1425,6 +1425,38 @@
  )))

  ;;--
+;; Include a file using an .LIB directive
+;;--
+(define spice-sdb:write-library
+  (lambda (package port)
+(debug-spew (string-append Found SPICE .LIB box.  Refdes =  
package \n))
+(let ((corner (gnetlist:get-package-attribute package corner))
+  (file (gnetlist:get-package-attribute package file))
+  )   ;; end of local assignments
+  (debug-spew (string-appendcorner =  corner \n))
+  (debug-spew (string-appendfile =  file \n))
+  (display (string-append .LIB  file   corner \n) port)
+  (debug-spew placing .lib directive string into netlist.\n))
+
+   )
+)
+
+;;--
+;; Include a simulation directive
+;;--
+(define spice-sdb:write-simulation
+  (lambda (package port)
+(debug-spew (string-append Found SPICE Simulation box.  Refdes =  
package \n))
+(let ((value (gnetlist:get-package-attribute package value))
+  )   ;; end of local assignments
+  (debug-spew (string-append value= value \n))
+  (display (string-append value \n) port)
+  (debug-spew placing simulation directive string into netlist.\n))
+
+   )
+)
+
+;;--
  ;; Include an option using an .OPTIONS directive
  ;;--
  (define spice-sdb:write-options
@@ -1617,6 +1649,10 @@
(spice-sdb:write-directive package port))
( (string=? device include)
(spice-sdb:write-include package port))
+  ( (string=? device library)
+  (spice-sdb:write-library package port))
+  ( (string=? device simulation)
+  (spice-sdb:write-simulation package port))
( else
(spice-sdb:write-default-component package file-info-list port))
  ) ;; end of cond


*8
v 20090328 2
B 0 400 1900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 100 300 9 10 0 1 0 0 1
device=library
T 100 500 9 10 1 1 0 0 1
refdes=A?
T 600 500 9 10 1 0 0 0 1
SPICE LIBR
T 500 200 8 10 1 1 0 0 1
file=?
T 100 200 9 10 1 0 0 0 1
File:
T 0 -5 8 10 1 0 0 0 1
corner=?



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gEDA-user: ngspice:try to add vc1, vc2 to res model.

2009-06-19 Thread A.Burinskiy
Please find patch file attached. I'm trying to add vc1,2 to res model. 
Notation

R1 2 1 w=10u l=100u vc1=7e-5 vc2=1e-3

But
.model rmod (
+ VC1=7e-5
+ VC2=1e-3
+ )
R1 2 1 rmod w=10u l=100u vc1=7e-5 vc2=1e-3
Doesn't work. What I'm doing wrong?

Thanks,
Alex.

Common subdirectories: 
ngspice-original/ng-spice-rework/src/spicelib/devices/res/CVS and 
ngspice/ng-spice-rework/src/spicelib/devices/res/CVS
Only in ngspice/ng-spice-rework/src/spicelib/devices/res/: .deps
Only in ngspice/ng-spice-rework/src/spicelib/devices/res/: Makefile
Only in ngspice/ng-spice-rework/src/spicelib/devices/res/: Makefile.in
diff -u ngspice-original/ng-spice-rework/src/spicelib/devices/res/resask.c 
ngspice/ng-spice-rework/src/spicelib/devices/res/resask.c
--- ngspice-original/ng-spice-rework/src/spicelib/devices/res/resask.c  
2009-06-14 12:37:52.578562944 -0700
+++ ngspice/ng-spice-rework/src/spicelib/devices/res/resask.c   2009-06-14 
12:49:48.653551529 -0700
@@ -64,12 +64,18 @@
case RES_M:
value-rValue = fast-RESm;
return(OK);
-   case RES_TC1:
-   value-rValue = fast-REStc1;
-   return(OK);
-   case RES_TC2:
-   value-rValue = fast-REStc2;
-   return(OK);
+   case RES_TC1:
+   value-rValue = fast-REStc1;
+   return(OK);
+   case RES_TC2:
+   value-rValue = fast-REStc2;
+   return(OK);
+   case RES_VC1:
+   value-rValue = fast-RESvc1;
+   return(OK);
+   case RES_VC2:
+   value-rValue = fast-RESvc2;
+   return(OK);
case RES_NOISY:
value-iValue = fast-RESnoisy;
return(OK);
diff -u ngspice-original/ng-spice-rework/src/spicelib/devices/res/res.c 
ngspice/ng-spice-rework/src/spicelib/devices/res/res.c
--- ngspice-original/ng-spice-rework/src/spicelib/devices/res/res.c 
2009-06-14 12:37:52.559563322 -0700
+++ ngspice/ng-spice-rework/src/spicelib/devices/res/res.c  2009-06-14 
14:54:01.025553126 -0700
@@ -22,6 +22,9 @@
  IOPU(  tc,  RES_TC1, IF_REAL,First order temp. 
coefficient),
  IOPU(  tc1, RES_TC1, IF_REAL,First order temp. 
coefficient),
  IOPU(  tc2, RES_TC2, IF_REAL,Second order temp. 
coefficient),
+ IOPU(  vc,  RES_VC1, IF_REAL,First order volt. 
coefficient),
+ IOPU(  vc1, RES_VC1, IF_REAL,First order volt. 
coefficient),
+ IOPU(  vc2, RES_VC2, IF_REAL,Second order volt. 
coefficient),
  IOPU(  scale,   RES_SCALE,   IF_REAL,Scale factor),
  IOP(   noisy,RES_NOISY,   IF_INTEGER, Resistor generate 
noise), 
  IP(sens_resist,  RES_RESIST_SENS, IF_FLAG,   
@@ -46,6 +49,8 @@
  IOPR(  dlr,RES_MOD_SHORT,IF_REAL,Shortening of resistor),
  IOPQ(  tc1,RES_MOD_TC1,  IF_REAL,First order temp. coefficient),
  IOPQO( tc2,RES_MOD_TC2,  IF_REAL,Second order temp. coefficient),
+ IOPQ(  vc1,RES_MOD_VC1,  IF_REAL,First order volt. coefficient),
+ IOPQO( vc2,RES_MOD_VC2,  IF_REAL,Second order volt. coefficient),
  IOPX(  defw,   RES_MOD_DEFWIDTH, IF_REAL,Default device width),
  IOPR(  w,  RES_MOD_DEFWIDTH, IF_REAL,Default device width),
  IOPQ(  kf, RES_MOD_KF,   IF_REAL,Flicker noise coefficient),
diff -u ngspice-original/ng-spice-rework/src/spicelib/devices/res/resdefs.h 
ngspice/ng-spice-rework/src/spicelib/devices/res/resdefs.h
--- ngspice-original/ng-spice-rework/src/spicelib/devices/res/resdefs.h 
2009-06-14 12:37:52.579552456 -0700
+++ ngspice/ng-spice-rework/src/spicelib/devices/res/resdefs.h  2009-06-14 
15:12:25.114801141 -0700
@@ -43,6 +43,10 @@
 double RESm;/* Multiplicity factor for this instance */
 double REStc1;  /* first temperature coefficient of 
resistors */
 double REStc2;  /* second temperature coefficient of 
resistors */
+/* alx begin */
+double RESvc1;  /* first voltage coefficient of resistors 
*/
+double RESvc2;  /* second voltage coefficient of resistors 
*/
+/* alx end */
 intRESnoisy;/* Set if the resistor generates noise */
 double *RESposPosptr;   /* pointer to sparse matrix diagonal at 
  * (positive,positive) */
@@ -63,6 +67,10 @@
 unsigned RESmGiven  : 1;/* indicates M parameter specified */
 unsigned REStc1Given: 1;/* indicates tc1 parameter specified */
 unsigned REStc2Given: 1;/* indicates tc2 parameter specified */
+/* alx begin */
+unsigned RESvc1Given: 1;/* indicates vc1 parameter specified */
+unsigned RESvc2Given: 1;/* indicates vc2 parameter specified */
+/* alx end */
 unsigned RESnoisyGiven  : 1;/* indicates if noisy is specified */
 intRESsenParmNo;/* parameter # for sensitivity use;
  

gEDA-user: ngspice: command file cause run out of memory

2009-06-19 Thread A.Burinskiy
I wrote simple command file:
$more com
source rtest3.cir
run
plot v(1,2)/i(v1)
save
$ ngspice -b com
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes

Circuit: source rtest3.cir

^C
$

when I run command file, ngspice quickly eat all memory and become 
uncontrollable!



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gEDA-user: ngspice: res model parameter RSH

2009-06-19 Thread A.Burinskiy
Hi,
In the manual parameter RSH declared, but in reality doesn't work.

$ more rtest2.cir
* Spice netlister for gnetlist

V2 1 0 DC 1.5V
V1 2 0 DC 0.5V
R1 2 1 rsh=1K w=100u l=10u tc1=3e-3 tc2=5e-7 narrow=0.05u

.dc temp -40 125 1
.print dc i(v1)

.END
[al...@bazilik geda]$ ngspice rtest2.cir
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
**
** ngspice-19 : Circuit level simulation program
** The U. C. Berkeley CAD Group
** Copyright 1985-1994, Regents of the University of California.
** Please submit bug-reports to: ngspice-b...@lists.sourceforge.net
** Creation Date: Sun Jun 14 14:58:10 PDT 2009
**

Circuit: * spice netlister for gnetlist

Error on line 5 : r1 2 1 rsh=1k w=100u l=10u tc1=3e-3 tc2=5e-7 narrow=0.05u
  unknown parameter (rsh)
ngspice 1 -



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gEDA-user: ngspice: potantialy memory problem

2009-06-19 Thread A.Burinskiy
Whatever I'm doing in ngspice, I've get warnings about memory

$ more rtest2.cir
* Spice netlister for gnetlist

V2 1 0 DC 1.5V
V1 2 0 DC 0.5V
R1 2 1 rsh=1K w=100u l=10u tc1=3e-3 tc2=5e-7 narrow=0.05u

.dc temp -40 125 1
.print dc i(v1)

.END
[al...@bazilik geda]$ ngspice rtest2.cir
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
Warning - approaching max data size: current size = 15.960 kB, limit = 0 
bytes
**
** ngspice-19 : Circuit level simulation program
** The U. C. Berkeley CAD Group
** Copyright 1985-1994, Regents of the University of California.
** Please submit bug-reports to: ngspice-b...@lists.sourceforge.net
** Creation Date: Sun Jun 14 14:58:10 PDT 2009
**

Circuit: * spice netlister for gnetlist

Error on line 5 : r1 2 1 rsh=1k w=100u l=10u tc1=3e-3 tc2=5e-7 narrow=0.05u
  unknown parameter (rsh)
ngspice 1 -



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gEDA-user: Try to add component

2009-06-17 Thread A.Burinskiy
Hi, I'm trying to make library include symbol, somewhat similar to 
spice-include-1.sym. I created symbol:

v 20090328 2
B 0 400 1900 300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 100 300 9 10 0 1 0 0 1
device=library
T 100 500 9 10 1 1 0 0 1
refdes=A?
T 600 500 9 10 1 0 0 0 1
SPICE LIBR
T 500 200 8 10 1 1 0 0 1
file=?
T 100 200 9 10 1 0 0 0 1
File:
T 0 -5 8 10 1 0 0 0 1
Corner=Typ

And add a strings into gnet-spice-sdb.scm:
;;--
;; Include a file using an .LIB directive
;;--
(define spice-sdb:write-library
   (lambda (package port)
 (debug-spew (string-append Found SPICE .LIB box.  Refdes =  package 
\n))
 (let ((value (gnetlist:get-package-attribute package value))
  (file (gnetlist:get-package-attribute package file))
  )   ;; end of local assignments
   (debug-spew (string-appendvalue =  value \n))
   (debug-spew (string-appendfile =  file \n))
   (display (string-append .LIB  value \n) port)
   (debug-spew placing .lib directive string into netlist.\n))

)
)

When I run gnetlist -v -g spice-gdb ., i've got:

Now process the items in model file list -- stick appropriate references to 
models in output SPICE file.
Handling spice model file modelcard.pmos
Done processing items in model file list.
Make second pass through design and write out a SPICE card for each component 
found.
--- checking package = A5
 device = library
Found unknown component.  Refdes = A5

What I'm doing wrong.

Thanks,
AB.



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