Re: gEDA-user: best ways to do SMT assembly
http://www.sparkfun.com/commerce/tutorials.php Look under Surface Mount Soldering Tutorials. Some good stuff in there. From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Robert Butts Sent: Thursday, August 14, 2008 18:33 To: gEDA user mailing list Subject: gEDA-user: best ways to do SMT assembly I'm sorry to start a new thread on this, I can't find saved mail I've seen before. I got pcbs back and now want to assemble them. What is the best way, i.e. solder paste to use, heating method, solder bridge removal...? Most of the components are small SMT parts. The through hole parts I'm fine with. Thanks ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk
Ah... CircuitCAM is also what I used. CircuitCAM defines what is known as rub-out areas. Google it to learn more. Basically it is a layer drawn during the CAM process that controls the generation of the milling layers. All unconnected residual copper will be rubbed out, but only if it's in an area covered by rubout rectangle. Otherwise it just does isolation milling with the 8 mil bit: which is a little cheaper to produce but has some of the pains I previously outlined and isn't an accurate reproduction of the board design anyway. If you aren't defining rubout areas in your CAM file then I don't see why your school would have a problem with an existing design. For using copper fills for ground planes, well I asked the same question awhile back, see: http://archives.seul.org/geda/user/Jun-2008/msg00218.html In PCB it can easily become a royal pain but it can be done. This stems from the fact that a polygon cannot be assigned to a net. E.g. you can't name the polygon "GND" and have GND traces connected to it and all others isolated. IIRC each trace has an attribute that determines if it's isolated or not from any polygon. See previous link. If you want your vias/thru-holes to connect to that polygon on a layer, you create "thermals" on that layer. Connecting SMT pads to a polygon isn't well supported now but can be done. But I've only done this process once in PCB, so I'm not an expert by any stretch of the imagination. Top layer is "component side" and bottom layer is "solder side." Board outlines are created by dedicating one of the other (unused) signal layers to a board outline and then using the resulting Gerber file for the layer to do your board routing. Keep persisting; to me I think there's value in storing your designs in a package that is (1) completely free, (2) stores all files in a textual format. Your designs are not locked into a binary, proprietary data format like with the other CAD design packages. (vendor lock-in = sucks). Think about the designs you are making now with the school's Altium package. If you want to continue working on them after school you'll have to buy an Altium license, which is probably overkill for most of your needs. --James -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Kevin Bortis Sent: Wednesday, July 30, 2008 15:52 To: gEDA user mailing list Subject: Re: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk On Wed, Jul 30, 2008 at 5:41 PM, James Johnston <[EMAIL PROTECTED]> wrote: > What milling machine / software are you using? We use the Windows only CircuitCAM software at school. In Altium I had to add a new polygon with a 30mil clearance. This is only a school rule and the pcb's are not going into production if this rule is not met :) > Of course, I routinely keep copper on many of my PCBs for things like ground > / power planes. Usually I put ground on the bottom and keep signals on the > top as much as possible; it's worked for me so far for the relatively simple > PCBs I've done so far. How you connect a polygon to the GND layer? A polygon connected to GND would also needing a clearance to signal layers. I think this would be the same problem. On which layer do you draw the top-layer routes? In the Altium software and OrCAD there were always a TopLayer, BottomLayer, TopOutline etc. , but in PCB I don't fully understand the naming schema. Regards > > --James > > -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Kevin Bortis > Sent: Wednesday, July 30, 2008 15:22 > To: geda-user@moria.seul.org > Subject: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk > > Hi, > > I try to draw my first PCB with the gEDA Tools. So far everything has > worked and the Layout is almost finished. > > For the last stage it is required for me to add a massive cooper > polygon over the pcb, because our milling machine would not be happy > to mil all the copper away. > > The tool makes a perfect clearance around the pad's, but not arround the > routes. > > Has anyone an idea what i could change? Eventually I have done > something wrong with the layer because I don't really understand the > palette from solder over component, ... , silk, ..., to solder mask. I > have drawn the routes on the component layer. > > The next problem is, how can I add pcb-outlines, fiducial marks and > add the (0,0) coordinate? > > If someone has some general tips that are related to pcb and milling > machines I would be happy also. > > Regards > > > ___ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailm
Re: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk
What milling machine / software are you using? I have used an LPKF milling machine; no special considerations are needed re. copper fills for the CAD design process. Choosing whether to remove excess copper or keep it is determined during the CAM process where the standard PCB layout / drill files are converted into milling machine directions. Removing the excess copper is not as bad as you might think. Use e.g. 1 mm and 3 mm end-mills for this job keeps the process relatively inexpensive. The LPKF software does isolation milling with the 8 mil bit, then switches to the 1 mm end-mill and then the 3 mm end-mill, so that clean and precise trace edges are maintained. The small added cost is worth it to me, because I don't put a solder mask on my milled boards. Which means that isolation milling only, increases the chance of solder bridges, never fun. Especially when dealing with surface-mount parts, if you get a solder bridge from a surface-mount part's pin to a large copper fill underneath the part, it's not fun - I often have to remove the entire part with hot air, clean things up, and try again. So I just remove that copper to save myself the trouble later. With a good milling machine, you can solder most any part. I've done small leadless packages like QFNs, and fine-pitch parts like TSSOP, etc. without any solder mask. It's not a problem. Of course, I routinely keep copper on many of my PCBs for things like ground / power planes. Usually I put ground on the bottom and keep signals on the top as much as possible; it's worked for me so far for the relatively simple PCBs I've done so far. --James -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Kevin Bortis Sent: Wednesday, July 30, 2008 15:22 To: geda-user@moria.seul.org Subject: gEDA-user: PCB: rectangular polygons and route clearance in pcb-gtk Hi, I try to draw my first PCB with the gEDA Tools. So far everything has worked and the Layout is almost finished. For the last stage it is required for me to add a massive cooper polygon over the pcb, because our milling machine would not be happy to mil all the copper away. The tool makes a perfect clearance around the pad's, but not arround the routes. Has anyone an idea what i could change? Eventually I have done something wrong with the layer because I don't really understand the palette from solder over component, ... , silk, ..., to solder mask. I have drawn the routes on the component layer. The next problem is, how can I add pcb-outlines, fiducial marks and add the (0,0) coordinate? If someone has some general tips that are related to pcb and milling machines I would be happy also. Regards ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Success with gEDA tools...
Anyone figured out the best way to ungunk the tweezers? Although, in my frustration I discovered a new way of implementing flying capacitors... -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Ben Jackson Sent: Friday, July 18, 2008 23:36 To: gEDA user mailing list Subject: Re: gEDA-user: Success with gEDA tools... On Fri, Jul 18, 2008 at 04:14:19PM -0700, Steve Meier wrote: > > Another example of the fifty fifty rule. Given two choices I will pick > the wrong one 80 percent of the time. You know, I actually rely on that when assembling SMT resistors. After I dump them on the board near where I'm working, I just pick up the upside-down ones and drop them until they land right-side up. Unless my tweezers have gotten gunked to the point where they just stick... -- Ben Jackson AD7GD <[EMAIL PROTECTED]> http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Frontpast
So you cover the entire surface of brass with toner except for the areas where you want holes to penetrate (e.g. SMT pads)? Then just let it float, face-down in the FeCl? I would think it's tricky to make sure the bottom side is immersed and etches successfully while providing the top side from completely eroding (unless you toner-transferred both sides, carefully lining up?) -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie Sent: Thursday, July 03, 2008 19:07 To: geda-user@moria.seul.org Subject: Re: gEDA-user: Frontpast > That's really slick... I love the stencil pictures. How exactly did > you etch all the way through? I wait ;-) > I assume your raw material was a sheet of brass? Yes. 2-3 mil seems to be best for the size parts I use. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Frontpast
That's really slick... I love the stencil pictures. How exactly did you etch all the way through? I assume your raw material was a sheet of brass? -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie Sent: Thursday, July 03, 2008 14:25 To: [EMAIL PROTECTED]; geda-user@moria.seul.org Cc: [EMAIL PROTECTED] Subject: Re: gEDA-user: Frontpast > Hi all, do you use a surface mount frontpast layer? What does fab > do with it and is it recommended for a hand solder job? I've used it to make home-made brass paste stencils[1] for some bigger boards with high-density parts. Not really useful for hand-soldering, better with toaster oven or hotplate. The fab will ignore it unless you ask for a stencil. [1] http://www.delorie.com/pcb/brass/ http://geda.seul.org/projects/djs_pcbs/ also, but you don't see them ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Using SMT
SparkFun has some good material for learning some basic SMT techniques: http://www.sparkfun.com/commerce/hdr.php?p=tutorials See about 1/2 down, "Surface mount soldering tutorials." Personally I go one of two routes: (1) reasonably fine-tipped temperature-regulated soldering iron, the smallest diameter solder I could find on Mouser, and solder wick. Good part removal is virtually impossible with this setup. (2) hot air rework station, solder paste for initial part placing and part removal. Fine-tipped temperature-regulated soldering iron, small diameter solder, and solder wick as well for touch-up. There's lots of other inexpensive techniques as well but that's what I've used so far with decent results. The nice thing about #2 vs. other reflow techniques (i.e. oven, hot plate) is that you can slowly build and test parts of the board without having to reheat the entire board. Oven/hot plate is better though once you have finished testing initial prototype and want to build a larger number of boards - I just haven't done that yet. It's not that hard once you get the technique down. --James From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Robert Butts Sent: Tuesday, June 24, 2008 17:13 To: [EMAIL PROTECTED] Subject: gEDA-user: Using SMT I'm about to start bread boarding a desin. I have a few surface mount chips that I got SMT-to-DIP adapters for. I also purchased SMT paste. I have never worked with surface mount devices. How do you paste the chip to its footprint? How do you get the excess, if any, paste out? I have a feeling it's got something to do with heating it. Thanks, Rob ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Assign polygon/rectangle to a net in PCB
Doh... problem solved... figured it out... My minimum touching copper overlap was 10 mils when I was running 8 mil traces. That's a new DRC setting I'm not used to, but good to know it's there. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie Sent: Tuesday, June 17, 2008 13:24 To: geda-user@moria.seul.org Subject: Re: gEDA-user: Assign polygon/rectangle to a net in PCB Try shutting off pins and seeing if there are tiny traces under the pins or pads that might be causing this. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Assign polygon/rectangle to a net in PCB
Thanks! I think I understand the rectangle/polygon feature better now. It still seems awkward to use sometimes, but it works. But, when following the advice, it triggers a bunch of "potential for broken trace" DRC errors... what gives? I *think* my layout is ok, at least it looks ok... But the DRC errors are annoying... I wonder if I'm doing something wrong or if the DRC errors are unavoidable in this scenario and can be ignored. -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie Sent: Tuesday, June 17, 2008 00:21 To: geda-user@moria.seul.org Subject: Re: gEDA-user: Assign polygon/rectangle to a net in PCB > Using the technique in the message, I created a line starting from the > center of the thermal pad, and then continued to draw a rectangle using > lines to cover up the clearances created by the thermal pad in the > footprint. It works but it seems awfully cludgy... is this the best way to > handle that scenario? At the moment, yes. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Assign polygon/rectangle to a net in PCB
The particularly problematic issue I was having is a TSSOP footprint that has a thermal pad to be hooked to GND node. Obviously I want to use a rectangle for more heat dissipation, but pcb was creating clearance around it. Using the technique in the message, I created a line starting from the center of the thermal pad, and then continued to draw a rectangle using lines to cover up the clearances created by the thermal pad in the footprint. It works but it seems awfully cludgy... is this the best way to handle that scenario? --James -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of DJ Delorie Sent: Monday, June 16, 2008 22:56 To: geda-user@moria.seul.org Subject: Re: gEDA-user: Assign polygon/rectangle to a net in PCB http://www.delorie.com/pcb/docs/gs/gs.html#SMT-Blinker (unfinished) Planes are not "assigned" to nets, they're connected to them. Connect one pad (using the thermal tool or traces (make sure "settings->new lines clear polygons" is NOT selected)) and press "o" to optimize rats. Then PCB knows which pins go to the plane instead of to other pins. You still have to connect them all manually, but at least it indicates them correctly. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Assign polygon/rectangle to a net in PCB
I'm sure this is a horribly obvious question/answer to some, but the documentation is simply not helpful to me in this regard. I'm using the rectangle/polygon tool to create ground planes. But I cannot figure out how to assign that plane to the "GND" net or the "VCC" net or whatever! So of course PCB creates clearances for the polygon with every pad it comes in contact with, including GND pads. Not helpful. The copper pad is floating, not connected to any net, and I can't figure out how to unfloat it even after reading pcb-tips and the main pcb documentation page... It is very descriptive on how to create a polygon, just not how to use it! In EAGLE it is easy, you just create the polygon, click "Name" and click the polygon, and type the name of the net to assign the plane to, and clearances/connections are handled automatically. I do not see an equivalent command here, so I'm more than a little confused. Best regards, James Johnston ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
