Re: gEDA-user: mirrored footprint
I am missing the reason you must mirror the footprints, however. Aren't the pins still in the same orientation they would be with the standard footprint? Since your DIP packages are mounted in the normal-side-up orientation, it seems the pins should be in the right order, unless you have placed the IC on the component side of the board in pcb... ? Yes, the component is at the same position, but traces are on the opposite side of board so something must be mirrored. SMD traces are at component layer. Through hole components have traces on solder layer. Or both of them? Well, you confused me now :-) Maybe I did not have to mirror the footprints. regards, Jan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: New autorouter high effort mode
On 11/24/2010 12:11 AM, Stephen Ecob wrote: Hi all, I've just pushed an update to my branch of PCB which provides a new autorouter high effort mode. What does it achieve? It wrings a few extra drops of goodness out of the autorouters. Typically it will route a few extra tracks. Useful if the autorouter is almost doing the job, but leaving a handful of tracks unrouted. Very useful if you're finishing work for the day and your computer has nothing better to do all night. Hi, I am really happy to hear about it, thank you! I successfuly compiled your branch: $ ./pcb --version PCB version 1.99see but the Settings menu is still the same as in the official version. What's the work flow ? 0. Back up your PCB. WARNING: At the end of this work flow you will manually kill PCB (ctrl-C) without an opportunity to save. 1. Start PCB from a command shell, you'll need it to read status information 2. Set Settings - Autorouter high effort 3. Select at least one autorouter with Settings - Disable 2008 autorouter and Settings - Disable default autorouter I cannot find these settings. Did I miss some compile-time options? regards, Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: mirrored footprint
On 11/23/2010 03:52 PM, Kai-Martin Knaak wrote: Hi. I just hit a legitimate use case for mirrored footprints: A layout sketch for dead-bug-prototyping. That is, glue the component with its back to the board and do the wires manually. However, there seems to be no way to mirror a footprint. Hi, I recently made something similar - I did not want do drill holes so I made SMD's out of common DIP package by bending legs. So I also needed mirrored footprints. In this directory http://fyzika.fce.vutbr.cz/pub/ there are photos as well as a python script which generates the footprints. But it is workaround only. It would be fine to have such option for all footprints. Regards, Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: mirrored footprint
On 11/24/2010 05:13 PM, Jan Martinek wrote: On 11/23/2010 03:52 PM, Kai-Martin Knaak wrote: Hi. I just hit a legitimate use case for mirrored footprints: A layout sketch for dead-bug-prototyping. That is, glue the component with its back to the board and do the wires manually. However, there seems to be no way to mirror a footprint. Hi, I recently made something similar - I did not want do drill holes so I made SMD's out of common DIP package by bending legs. So I also needed mirrored footprints. In this directory http://fyzika.fce.vutbr.cz/pub/ Oh, sorry, wrong link. This one is correct: http://fyzika.fce.vutbr.cz/pub/bentlegs/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: New autorouter high effort mode
On 11/24/2010 09:29 PM, Stephen Ecob wrote: On Thu, Nov 25, 2010 at 2:59 AM, DJ Deloried...@delorie.com wrote: The menus are defined by a resource file, you might have one in ~/.pcb that overrides the freshly-installed version. Oh, my mistake: I forgot to commit my changes to the resource file src/gpcb-menu.res I've now done a git push that adds this file. Jan - if you do a git pull you'll get this file. A recompile shouldn't be necessary, but as DJ said do watch out if you have multiple copies of gpcb-menu.res on your computer - PCB may end up looking at the wrong one. Stephen Yes, now it works :-) I tried to run the autorouter, but it ate all my memory after several minutes. Moreover, it uses layers which are disabled. And one thing - even if I select thicker traces (for example Power), it still uses default thickness (Signal). But it looks very promising, though. For my circuit it found solutions I have never seen before. Jan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Inkscape text-pstoedit-pcb and importing PostScript/PDF/EPS vector graphics with holes
On 11/22/2010 11:47 PM, Colin D Bennett wrote: On Mon, 22 Nov 2010 23:21:17 +0100 Jan Martinekho...@dp.fce.vutbr.cz wrote: I really wanted to create a logo/description label in Inkscape and put it on a board I recently made, but after trying for an hour or two to get pstoedit to import text elements properly (holes in letters like 'B' or 'o' were getting filled in when exported to the 'pcb' file format), I gave up. I tried the '-ssp' option to pstoedit but it crashed every time an assertion failure. Have you had better luck with converting text or graphics to pcb format? I am not sure if this can help you, but I usualy do the other way. Export PCB board into ps, then open in inkscape. In inkscape you can do whatever you like - mirror the PCB, do some post-processing (try ungroup before), add text, logos, cutting guidelines, place several PCBs on one page etc. Ah, thinking outside the box. Sounds like a very manual process, though. I have tried using Inkscape to panelize PCBs before in this manner and I found it tedious, and in particular you lose the ability to have the assembly drawing, drill files, etc. to be synchronized with the layout... at least the way I was doing it. I mean that if you modify the board layout in pcb at all, you'll have to re-export and re-modify the postscript output. Also, how would you make gerbers using this process? I guess it would work best for quick-and-dirty one-off boards made at home rather than sent out for fab? Also, if you are editing the silkscreen layer in Inkscape, wouldn't it be hard to make sure you put the graphics/text/etc. in a place that doesn't conflict with elements on other layers? Unless you load each PCB layer into an Inkscape layer... that would help. Regards, Colin Yes, you are right, it is quick and dirty and lots of information is lost. I was thinking about home-made boards. regards, Jan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Inkscape text-pstoedit-pcb and importing PostScript/PDF/EPS vector graphics with holes
I really wanted to create a logo/description label in Inkscape and put it on a board I recently made, but after trying for an hour or two to get pstoedit to import text elements properly (holes in letters like 'B' or 'o' were getting filled in when exported to the 'pcb' file format), I gave up. I tried the '-ssp' option to pstoedit but it crashed every time an assertion failure. Have you had better luck with converting text or graphics to pcb format? I am not sure if this can help you, but I usualy do the other way. Export PCB board into ps, then open in inkscape. In inkscape you can do whatever you like - mirror the PCB, do some post-processing (try ungroup before), add text, logos, cutting guidelines, place several PCBs on one page etc. Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: New branch of PCB
On 11/15/2010 09:24 PM, Stephen Ecob wrote: On Tue, Nov 16, 2010 at 12:47 AM, Kai-Martin Knaak kn...@iqo.uni-hannover.de wrote: Stephen Ecob wrote: Motivation Having laid out a couple of boards with PCB 20091103 I became aware of some bugs in the autorouter that made the job difficult: Are you talking about the default auto router. Or is this about the shiny, new toporouter? I'm talking about the default auto router. Oh, that's a pity. But are there any common parts of source code which both routers share? I mean - if you fix some bug in default auto router, will that fix the same bug in toporouter? I suppose that if Anthony Blake finishes his toporouter someday, all effort for improvement the default autorouter may be pointless. Toporouter's algorithm is really better, but there are failed asserts sometimes. Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Unresolved rat lines, zero-ohm resistor, wire bridge
Hello, I am trying to design a single-sided board with SMD components only (no drilling). The toporouter (which is absolutely awesome, btw.) routes almost all rat lines with only several left unresolved. But, what now? I can do several things: 1) Make the PCB and connect suitable places with wire. disadvantage: The PCB cannot be published without further explanation. And, it is not beautiful. 2) Insert dummy components like zero-ohm resistors or jumper wire in schematics with the hope, that some traces can be routed below the components. disadvantage: The schematics looks crazy. Moreover, surprisingly, it does not help. The autorouter sees different circuit and magically designs different traces. Often, number of unresolved rat lines increases. And, it is totally unpredictable where exactly to insert the dummy components and how many of them. 3) Make double sided PCB and the other side realize with wire bridges only. Disadvantage: This is a bad idea as number of vias is much higher that number of unresolved rat lines. 4) Use #1 but do some manual post-processing. disadvantage: At any change in the schematics the manual work must be done again. The best solution (for me) would be #3 if: - the number of vias would be as small as possible - vias should be in pairs so that the wire connects exactly two. Or this: - if some rat lines cannot be solved, make a pair of pads (or pins) for them. Does anyone have an idea? Thank you very much, Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Unresolved rat lines, zero-ohm resistor, wire bridge
Hi, no, it really does not work. I think you are suggesting #2. The autorouter is unpredictable. If I change anything in the schematics, the autorouter comes with different design, often worse than before with more unresolved rat lines. Adding a jumper in schematics does not result into reducing rat lines. One example: I had six unresolved rat lines. I added six resistors into appropriate places in schematics. And, voila, I ended up with _nine_ unresolved rat lines and almost no traces went underneath the resistors. The autorouter did not find the solution. Jan Martinek On 10/16/2010 06:53 PM, Rick Collins wrote: I'm not sure I understand the problem with #1. Can't you take the mostly routed design and back annotate the jumpers so that they are parts in the original schematic? Then you get what you are looking for in #3 which you think is the best approach. Rick At 12:17 PM 10/16/2010, you wrote: Hello, I am trying to design a single-sided board with SMD components only (no drilling). The toporouter (which is absolutely awesome, btw.) routes almost all rat lines with only several left unresolved. But, what now? I can do several things: 1) Make the PCB and connect suitable places with wire. disadvantage: The PCB cannot be published without further explanation. And, it is not beautiful. 2) Insert dummy components like zero-ohm resistors or jumper wire in schematics with the hope, that some traces can be routed below the components. disadvantage: The schematics looks crazy. Moreover, surprisingly, it does not help. The autorouter sees different circuit and magically designs different traces. Often, number of unresolved rat lines increases. And, it is totally unpredictable where exactly to insert the dummy components and how many of them. 3) Make double sided PCB and the other side realize with wire bridges only. Disadvantage: This is a bad idea as number of vias is much higher that number of unresolved rat lines. 4) Use #1 but do some manual post-processing. disadvantage: At any change in the schematics the manual work must be done again. The best solution (for me) would be #3 if: - the number of vias would be as small as possible - vias should be in pairs so that the wire connects exactly two. Or this: - if some rat lines cannot be solved, make a pair of pads (or pins) for them. Does anyone have an idea? Thank you very much, Jan Martinek ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
