Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
Hello, thanks for looking into it! I'll try the newest git head later today. Please note that I have constructed some tast cases too and attached them to the bug tickets. On Tue, 17 Feb 2009 20:02:42 + Peter Clifton pc...@cam.ac.uk wrote: On Mon, 2009-02-16 at 14:58 +0100, Denis Grelich wrote: Sorry, forgot to actually attach the screenshot and the example ;) That's pretty broken looking.. I think the first hint of trouble is exemplified by PCB's failure to clear this the 360 degree arc from the polygon. I've distilled a test-case from your example (attached). I wonder if (as a workaround) you'd get better results from two half-arcs, rather than one arc which touches its-self. When I get chance I'll try to fix the case for the self-intersecting arc. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 2009-02-18 at 09:32 +0100, Denis Grelich wrote: Hello, thanks for looking into it! I'll try the newest git head later today. Please note that I have constructed some tast cases too and attached them to the bug tickets. Ok, thanks.. I've taken a look. Some are fixed, some remain. I'm noticing really crappy grid-snap behaviour in the PCB+GL branch at the moment, especially on your test-case design. Did you test if any of that grief happen in the non PCB+GL code? The PCB+GL branch also contains some grid-snap improvements which weren't perfect, so never yet got pushed to git HEAD. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 2009-02-18 at 09:32 +0100, Denis Grelich wrote: Hello, thanks for looking into it! I'll try the newest git head later today. Please note that I have constructed some tast cases too and attached them to the bug tickets. Btw.. how did the fullpoly flag get set on some polygons in your design? That flag breaks connectivity checking, and makes the PCB+GL branch hit slow rendering paths. (Could speed it up, just haven't yet). There is a GUI option Settings-New polygons are full ones, but it doesn't seem to be hooked up - certainly not on the PCB+GL build, and I don't remember disabling it. I've attached a small example of how the connectivity scanning is broken with fullpoly. Press f to highlight connections from each via in turn, and see the damage. Also, note that PCB ignores the resurrected piece of the polygon in many cases, such as pressing f on it. The code I was writing to allow full polygon pours is intended to allow the equivalent of fullpoly whilst allowing proper connectivity scanning. You'd just have to switch off island removal, and you get the same behaviour. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) full_poly_connectivity.pcb Description: application/pcb-layout ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
I have set the fullpoly flag manually, which wasn't a big deal since I had to do a lot of manual work in the file (especially when it comes to arcs -- I was even thinking about writing a patch to be able to work with arcs sensibly with the GUI, maybe I'll still look into it even though the board is finished.) Without fullpoly, I wouldn't get the plane filled with GND, but only some small isle. On Wed, 18 Feb 2009 12:55:32 + Peter Clifton pc...@cam.ac.uk wrote: On Wed, 2009-02-18 at 09:32 +0100, Denis Grelich wrote: Hello, thanks for looking into it! I'll try the newest git head later today. Please note that I have constructed some tast cases too and attached them to the bug tickets. Btw.. how did the fullpoly flag get set on some polygons in your design? That flag breaks connectivity checking, and makes the PCB+GL branch hit slow rendering paths. (Could speed it up, just haven't yet). There is a GUI option Settings-New polygons are full ones, but it doesn't seem to be hooked up - certainly not on the PCB+GL build, and I don't remember disabling it. I've attached a small example of how the connectivity scanning is broken with fullpoly. Press f to highlight connections from each via in turn, and see the damage. Also, note that PCB ignores the resurrected piece of the polygon in many cases, such as pressing f on it. The code I was writing to allow full polygon pours is intended to allow the equivalent of fullpoly whilst allowing proper connectivity scanning. You'd just have to switch off island removal, and you get the same behaviour. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 18 Feb 2009 12:50:11 + Peter Clifton pc...@cam.ac.uk wrote: I'm noticing really crappy grid-snap behaviour in the PCB+GL branch at the moment, especially on your test-case design. Did you test if any of that grief happen in the non PCB+GL code? The PCB+GL branch also contains some grid-snap improvements which weren't perfect, so never yet got pushed to git HEAD. Yes, I worked with both an older pcb version and the PCB+GL branch, and they both seemed to show pretty much the same behaviour. I didn't really notice the grid-snap deficiencies, since I was working without grid snapping (or with a grid of 0.01mm) most of the time anyway, because of the many arcs. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 2009-02-18 at 15:18 +0100, Denis Grelich wrote: I have set the fullpoly flag manually, which wasn't a big deal since I had to do a lot of manual work in the file (especially when it comes to arcs -- I was even thinking about writing a patch to be able to work with arcs sensibly with the GUI, maybe I'll still look into it even though the board is finished.) Without fullpoly, I wouldn't get the plane filled with GND, but only some small isle. Seemed to work for me just now when I tried it. You just loose some islanded sections. The code is supposed to keep the largest piece of the polygon. Sometimes this works fine. other times.. you want to re-connect the islanded pieces, so it becomes a pain to have to redraw them. You'll just have to beware of the connectivity checking failures with fullpoly for now. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 18 Feb 2009 00:21:08 + Peter Clifton pc...@cam.ac.uk wrote: On Tue, 2009-02-17 at 11:29 +0100, Denis Grelich wrote: On Mon, 16 Feb 2009 12:34:15 -0800 Ben Jackson b...@ben.com wrote: On Mon, Feb 16, 2009 at 02:56:44PM +0100, Denis Grelich wrote: First there's a problem with polygon clearance. I think that might be a GL display bug. There was a thread about that recently. Try exporting your layout to PostScript and view that (you can convert with ps2pdf and use acroread if you want). If the planes look fine there, they will look fine in the gerbers. I've tried it with an older version of PCB (20081128) and there I have pretty much the same behaviour. The exported gerber files yield those artifacts as well, so I guess it's an issue with the polygon clearance code, not just a rendering issue. Try again now.(with git HEAD, or the GL branch if you re-fetch it) I've just commited what I believe to be a fix for the problem. The artifacts seem to be gone, the crashes too. I still get the disappearing polygon, though. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Wed, 2009-02-18 at 21:11 +0100, Denis Grelich wrote: On Wed, 18 Feb 2009 00:21:08 + The artifacts seem to be gone, the crashes too. I still get the disappearing polygon, though. Yes, that is slightly odd. See the last test-case I posted for a simpler example of the breakage. I've not had chance to figure out what is wrong though. Possibly something in the contour intersection routine*. * /me makes locating that bug sound far simpler than it is likely to be. Best regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Mon, 16 Feb 2009 12:34:15 -0800 Ben Jackson b...@ben.com wrote: On Mon, Feb 16, 2009 at 02:56:44PM +0100, Denis Grelich wrote: First there's a problem with polygon clearance. I think that might be a GL display bug. There was a thread about that recently. Try exporting your layout to PostScript and view that (you can convert with ps2pdf and use acroread if you want). If the planes look fine there, they will look fine in the gerbers. I've tried it with an older version of PCB (20081128) and there I have pretty much the same behaviour. The exported gerber files yield those artifacts as well, so I guess it's an issue with the polygon clearance code, not just a rendering issue. core dump file (it always has a size of zero bytes), but I've pasted a backtrace into the bug description. Make sure your coredump size isn't limited (check ulimit). I did set it to unlimited. [de...@3e ~]$ ulimit unlimited Where are you submitting these bugs? Are we still using sourceforge's tracker? (the latter isn't really a question for Denis...) https://sourceforge.net/tracker/index.php?func=detailaid=2605532group_id=73743atid=538811 https://sourceforge.net/tracker/index.php?func=detailaid=2605365group_id=73743atid=538811 https://sourceforge.net/tracker/index.php?func=detailaid=2605316group_id=73743atid=538811 https://sourceforge.net/tracker/index.php?func=detailaid=2605301group_id=73743atid=538811 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Mon, 2009-02-16 at 14:58 +0100, Denis Grelich wrote: Sorry, forgot to actually attach the screenshot and the example ;) That's pretty broken looking.. I think the first hint of trouble is exemplified by PCB's failure to clear this the 360 degree arc from the polygon. I've distilled a test-case from your example (attached). I wonder if (as a workaround) you'd get better results from two half-arcs, rather than one arc which touches its-self. When I get chance I'll try to fix the case for the self-intersecting arc. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) broken-arc-poly-intersect.pcb Description: application/pcb-layout ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, Feb 17, 2009 at 08:02:42PM +, Peter Clifton wrote: I think the first hint of trouble is exemplified by PCB's failure to clear this the 360 degree arc from the polygon. I've distilled a test-case from your example (attached). Yes, as soon as he said it I figured that the self-intersecting arc would blow up. I wonder if (as a workaround) you'd get better results from two half-arcs, rather than one arc which touches its-self. If it were a line PCB would meld it, but it might work for an arc. On the other hand, coincident lines (which normally would have been merged but were not for some reason) have caused other clearing problems. I think the only straightforward way to fix the self-intersecting arc is to build it internally from two parts and union them. Might be slow on teardrop'd boards. -- Ben Jackson AD7GD b...@ben.com http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, 2009-02-17 at 12:58 -0800, Ben Jackson wrote: On Tue, Feb 17, 2009 at 08:02:42PM +, Peter Clifton wrote: I think the first hint of trouble is exemplified by PCB's failure to clear this the 360 degree arc from the polygon. I've distilled a test-case from your example (attached). Yes, as soon as he said it I figured that the self-intersecting arc would blow up. I wonder if (as a workaround) you'd get better results from two half-arcs, rather than one arc which touches its-self. If it were a line PCB would meld it, but it might work for an arc. On the other hand, coincident lines (which normally would have been merged but were not for some reason) have caused other clearing problems. I think the only straightforward way to fix the self-intersecting arc is to build it internally from two parts and union them. Might be slow on teardrop'd boards. Probably just need some simple geometry to work out if it would self-intersect or not fn(radius, width, angle), and do something different with those cases which do. Unfortunately, there is (of course), a whole family of potential intersections, so its not quite as simple as just specifying an outer circle poly, with a circular hole. Since this probably isn't a common case, I'd not have a problem in requiring the performance hit for it. Ben, did you figure out what specifically causes co-incident lines to cause grief? My understanding of the code was that they shouldn't cause problems. (I'd love to see any simple test-cases you have where they do). As you may have noticed, I've done a bit of hacking on the polygon code recently. Not specifically in the contour intersection routines (yet), rather in the contour gathering. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, Feb 17, 2009 at 09:08:33PM +, Peter Clifton wrote: I think the only straightforward way to fix the self-intersecting arc is to build it internally from two parts and union them. Might be slow on teardrop'd boards. Probably just need some simple geometry to work out if it would self-intersect or not fn(radius, width, angle), and do something different with those cases which do. Unfortunately, there is (of course), a whole family of potential intersections, so its not quite as simple as just specifying an outer circle poly, with a circular hole. You just build it as two halves and use the polygon code to union it. The math to make the self-intersecting arc by hand is going to end up being a special case of exactly what the polygon code will do. Your fn() shouldn't be too bad, I think it's just find the coordinates of the arc endpoints and see if they're thickness apart. Ben, did you figure out what specifically causes co-incident lines to cause grief? My understanding of the code was that they shouldn't cause problems. (I'd love to see any simple test-cases you have where they do). It usually boils down to numerical instability in the polygon code. I may have an example. I save all the strange boards people send in with bug reports to use as regression tests. -- Ben Jackson AD7GD b...@ben.com http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, 2009-02-17 at 13:29 -0800, Ben Jackson wrote: On Tue, Feb 17, 2009 at 09:08:33PM +, Peter Clifton wrote: It usually boils down to numerical instability in the polygon code. I may have an example. I save all the strange boards people send in with bug reports to use as regression tests. If that is due to the snap rounding problem, then the code _ought_ to avoid it. If it is real instability, then presumably we'd end up having trouble with cases other than coincident lines. (The line caps on the end of two lines have a higher order of symmetry than the line its-self). I always have difficulty distilling simple test-cases on polygon problems. Once some combination of geometry conspires to break one of the invariants PCB's polygon code expects to hold true, all hell breaks loose, and it can be hard to track down which piece of geometry was the first aggressor. I probably have some of my own boards saved which cause various printf / failures, but it is very hard to bisect the board to get a single failing case. Self-intersecting contours probably aren't a well-tested case, I'd guess. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, 2009-02-17 at 13:29 -0800, Ben Jackson wrote: On Tue, Feb 17, 2009 at 09:08:33PM +, Peter Clifton wrote: I think the only straightforward way to fix the self-intersecting arc is to build it internally from two parts and union them. Might be slow on teardrop'd boards. Probably just need some simple geometry to work out if it would self-intersect or not fn(radius, width, angle), and do something different with those cases which do. Unfortunately, there is (of course), a whole family of potential intersections, so its not quite as simple as just specifying an outer circle poly, with a circular hole. You just build it as two halves and use the polygon code to union it. The math to make the self-intersecting arc by hand is going to end up being a special case of exactly what the polygon code will do. Your fn() shouldn't be too bad, I think it's just find the coordinates of the arc endpoints and see if they're thickness apart. Plus some tolerance I'd guess, to account for potential errors in whatever \_/ approximation gets used for the caps. I agree we ought to use the polygon code rather than trying to special case it directly, I just hoped we could avoid the cost of bisecting each arc we cleared. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Tue, 2009-02-17 at 11:29 +0100, Denis Grelich wrote: On Mon, 16 Feb 2009 12:34:15 -0800 Ben Jackson b...@ben.com wrote: On Mon, Feb 16, 2009 at 02:56:44PM +0100, Denis Grelich wrote: First there's a problem with polygon clearance. I think that might be a GL display bug. There was a thread about that recently. Try exporting your layout to PostScript and view that (you can convert with ps2pdf and use acroread if you want). If the planes look fine there, they will look fine in the gerbers. I've tried it with an older version of PCB (20081128) and there I have pretty much the same behaviour. The exported gerber files yield those artifacts as well, so I guess it's an issue with the polygon clearance code, not just a rendering issue. Try again now.(with git HEAD, or the GL branch if you re-fetch it) I've just commited what I believe to be a fix for the problem. Best regards, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
Hello there! I found a few bugs in pcb, some of them are stopping me from sending the layout to the manufacturer :( The bugs are there in pcb 20081128 and in the GL + pcb branch. I've filed tickets for them with minimal working examples and screenshots. First there's a problem with polygon clearance. It is rather buggy for large polygons with many holes in them and produces awkward results. Screenshot attached for your convenience. Second, there is a bug in the polygon code causing pcb to crash when zooming. I couldn't obtain a core dump file (it always has a size of zero bytes), but I've pasted a backtrace into the bug description. Last but not least there's a usability bug where the mouse cursor does not change into that little rectangle when the cursor is over a line end so it becomes hard sometimes to pull a line end around. The questions I have are rather simple: How do I stop the log window and the library from opening every time I start pcb? I don't need them 90% of the time and they start to annoy me ... Then, the gerber files contain text describing holes. I'm not sure how the pcb pool manufacturer will cope with that, so is there an option to turn that off? many thanks and greetings Denis ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
On Mon, Feb 16, 2009 at 02:56:44PM +0100, Denis Grelich wrote: First there's a problem with polygon clearance. I think that might be a GL display bug. There was a thread about that recently. Try exporting your layout to PostScript and view that (you can convert with ps2pdf and use acroread if you want). If the planes look fine there, they will look fine in the gerbers. core dump file (it always has a size of zero bytes), but I've pasted a backtrace into the bug description. Make sure your coredump size isn't limited (check ulimit). Where are you submitting these bugs? Are we still using sourceforge's tracker? (the latter isn't really a question for Denis...) -- Ben Jackson AD7GD b...@ben.com http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: GL pcb bugs and a question re the log/library window, gerber outline output
Where are you submitting these bugs? Are we still using sourceforge's tracker? I believe that hasn't changed, we're still using sf for bug tracking. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
