[gem5-dev] Change in public/gem5[master]: mem: Replace EventWrapper in PacketQueue with EventFunctionW...
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3744 )
Change subject: mem: Replace EventWrapper in PacketQueue with
EventFunctionWrapper
..
mem: Replace EventWrapper in PacketQueue with EventFunctionWrapper
In order to replicate the same `name()` output with `PacketQueue`,
subclasses
using EventFunctionWrapper must initialize PacketQueue with their own name
so
the sendEvent holds the name of the subclass.
Change-Id: Ib091e118bab8858192e1d1370d61def42958ec29
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3744
Reviewed-by: Nikos Nikoleris
Reviewed-by: Jason Lowe-Power
Maintainer: Nikos Nikoleris
---
M src/mem/packet_queue.cc
M src/mem/packet_queue.hh
2 files changed, 32 insertions(+), 8 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index f7df331..7649fe5 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -50,8 +50,10 @@
using namespace std;
PacketQueue::PacketQueue(EventManager& _em, const std::string& _label,
+ const std::string& _sendEventName,
bool disable_sanity_check)
-: em(_em), sendEvent(this), _disableSanityCheck(disable_sanity_check),
+: em(_em), sendEvent([this]{ processSendEvent(); }, _sendEventName),
+ _disableSanityCheck(disable_sanity_check),
label(_label), waitingOnRetry(false)
{
}
@@ -237,7 +239,8 @@
ReqPacketQueue::ReqPacketQueue(EventManager& _em, MasterPort& _masterPort,
const std::string _label)
-: PacketQueue(_em, _label), masterPort(_masterPort)
+: PacketQueue(_em, _label, name(_masterPort, _label)),
+ masterPort(_masterPort)
{
}
@@ -250,7 +253,8 @@
SnoopRespPacketQueue::SnoopRespPacketQueue(EventManager& _em,
MasterPort& _masterPort,
const std::string _label)
-: PacketQueue(_em, _label), masterPort(_masterPort)
+: PacketQueue(_em, _label, name(_masterPort, _label)),
+ masterPort(_masterPort)
{
}
@@ -262,7 +266,8 @@
RespPacketQueue::RespPacketQueue(EventManager& _em, SlavePort& _slavePort,
const std::string _label)
-: PacketQueue(_em, _label), slavePort(_slavePort)
+: PacketQueue(_em, _label, name(_slavePort, _label)),
+ slavePort(_slavePort)
{
}
diff --git a/src/mem/packet_queue.hh b/src/mem/packet_queue.hh
index b1001e7..f7379c9 100644
--- a/src/mem/packet_queue.hh
+++ b/src/mem/packet_queue.hh
@@ -87,7 +87,7 @@
void processSendEvent();
/** Event used to call processSendEvent. */
-EventWrapper sendEvent;
+EventFunctionWrapper sendEvent;
/*
* Optionally disable the sanity check
@@ -134,6 +134,7 @@
*on the size of the transmitList. The check is enabled by
default.
*/
PacketQueue(EventManager& _em, const std::string& _label,
+const std::string& _sendEventName,
bool disable_sanity_check = false);
/**
@@ -215,6 +216,12 @@
MasterPort& masterPort;
+// Static definition so it can be called when constructing the parent
+// without us being completely initialized.
+static const std::string name(const MasterPort& masterPort,
+ const std::string& label)
+{ return masterPort.name() + "-" + label; }
+
public:
/**
@@ -232,7 +239,7 @@
virtual ~ReqPacketQueue() { }
const std::string name() const
-{ return masterPort.name() + "-" + label; }
+{ return name(masterPort, label); }
bool sendTiming(PacketPtr pkt);
@@ -245,6 +252,12 @@
MasterPort& masterPort;
+// Static definition so it can be called when constructing the parent
+// without us being completely initialized.
+static const std::string name(const MasterPort& masterPort,
+ const std::string& label)
+{ return masterPort.name() + "-" + label; }
+
public:
/**
@@ -262,7 +275,7 @@
virtual ~SnoopRespPacketQueue() { }
const std::string name() const
-{ return masterPort.name() + "-" + label; }
+{ return name(masterPort, label); }
bool sendTiming(PacketPtr pkt);
@@ -275,6 +288,12 @@
SlavePort& slavePort;
+// Static definition so it can be called when constructing the parent
+// without us being completely initialized.
+static const std::string name(const SlavePort& slavePort,
+ const std::string& label)
+{ return slavePort.name() + "-" + label; }
+
public:
/**
@@ -292,7 +311,7 @@
virtual ~RespPacketQueue() { }
const std::string name() const
-{ return slavePort.name() + "-" + label
[gem5-dev] Change in public/gem5[master]: sim: Remove DelayFunction
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3741 )
Change subject: sim: Remove DelayFunction
..
sim: Remove DelayFunction
`DelayFunction` is unused.
Change-Id: I28aa756054c9b121fe4cfa65c393366f26ccb128
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3741
Reviewed-by: Andreas Sandberg
Reviewed-by: Jason Lowe-Power
Maintainer: Andreas Sandberg
---
M src/sim/eventq.hh
1 file changed, 0 insertions(+), 20 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index b138f56..9d3c5c3 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -769,26 +769,6 @@
};
template
-void
-DelayFunction(EventQueue *eventq, Tick when, T *object)
-{
-class DelayEvent : public Event
-{
- private:
-T *object;
-
- public:
-DelayEvent(T *o)
-: Event(Default_Pri, AutoDelete), object(o)
-{ }
-void process() { (object->*F)(); }
-const char *description() const { return "delay"; }
-};
-
-eventq->schedule(new DelayEvent(object), when);
-}
-
-template
class EventWrapper : public Event
{
private:
--
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To unsubscribe, visit https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: I28aa756054c9b121fe4cfa65c393366f26ccb128
Gerrit-Change-Number: 3741
Gerrit-PatchSet: 3
Gerrit-Owner: Sean Wilson
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Sean Wilson
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[gem5-dev] Change in public/gem5[master]: dev: Replace EventWrapper use with EventFunctionWrapper
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3748 )
Change subject: dev: Replace EventWrapper use with EventFunctionWrapper
..
dev: Replace EventWrapper use with EventFunctionWrapper
Change-Id: I6b03cc6f67e76dffb79940431711ae6171901c6a
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3748
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
---
M src/dev/arm/ufs_device.cc
M src/dev/arm/ufs_device.hh
M src/dev/dma_device.cc
M src/dev/dma_device.hh
M src/dev/net/dist_etherlink.hh
M src/dev/net/etherlink.cc
M src/dev/net/etherlink.hh
M src/dev/net/etherswitch.cc
M src/dev/net/etherswitch.hh
M src/dev/net/i8254xGBe.cc
M src/dev/net/i8254xGBe.hh
M src/dev/net/ns_gige.cc
M src/dev/net/ns_gige.hh
M src/dev/net/sinic.cc
M src/dev/net/sinic.hh
M src/dev/pci/copy_engine.cc
M src/dev/pci/copy_engine.hh
M src/dev/storage/ide_disk.cc
M src/dev/storage/ide_disk.hh
19 files changed, 123 insertions(+), 135 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc
index 5a5a132..cd1bbca 100644
--- a/src/dev/arm/ufs_device.cc
+++ b/src/dev/arm/ufs_device.cc
@@ -733,8 +733,8 @@
transferTrack(0),
taskCommandTrack(0),
idlePhaseStart(0),
-SCSIResumeEvent(this),
-UTPEvent(this)
+SCSIResumeEvent([this]{ SCSIStart(); }, name()),
+UTPEvent([this]{ finalUTP(); }, name())
{
DPRINTF(UFSHostDevice, "The hostcontroller hosts %d Logic units\n",
lunAvail);
@@ -1280,7 +1280,8 @@
task_info.size = size;
task_info.done = UFSHCIMem.TMUTMRLDBR;
taskInfo.push_back(task_info);
-taskEventQueue.push_back(this);
+taskEventQueue.push_back(
+EventFunctionWrapper([this]{ taskStart(); }, name()));
writeDevice(&taskEventQueue.back(), false, address, size,
reinterpret_cast
(&taskInfo.back().destination), 0, 0);
@@ -1328,7 +1329,8 @@
UTPTransferReqDesc;
DPRINTF(UFSHostDevice, "Initial transfer start: 0x%8x\n",
transferstart_info.done);
-transferEventQueue.push_back(this);
+transferEventQueue.push_back(
+EventFunctionWrapper([this]{ transferStart(); }, name()));
if (transferEventQueue.size() < 2) {
writeDevice(&transferEventQueue.front(), false,
@@ -2260,7 +2262,8 @@
UFSDevice[this_lun]->clearReadSignal();
SSDReadPending.push_back(UFSDevice[this_lun]->SSDReadInfo.front());
UFSDevice[this_lun]->SSDReadInfo.pop_front();
-readGarbageEventQueue.push_back(this);
+readGarbageEventQueue.push_back(
+EventFunctionWrapper([this]{ readGarbage(); }, name()));
//make sure the queue is popped a the end of the dma transaction
readDevice(false, SSDReadPending.front().offset,
diff --git a/src/dev/arm/ufs_device.hh b/src/dev/arm/ufs_device.hh
index 24a05b0..69abc27 100644
--- a/src/dev/arm/ufs_device.hh
+++ b/src/dev/arm/ufs_device.hh
@@ -1150,28 +1150,25 @@
/**
* Wait for the SCSI specific data to arive
*/
-EventWrapper SCSIResumeEvent;
+EventFunctionWrapper SCSIResumeEvent;
/**
* Wait for the moment where we can send the last frame
*/
-EventWrapper UTPEvent;
+EventFunctionWrapper UTPEvent;
/**
* Event after a read to clean up the UTP data structures
*/
-std::deque >
-readGarbageEventQueue;
+std::deque readGarbageEventQueue;
/**
* Multiple tasks transfers can be scheduled at once for the device,
the
* only thing we know for sure about them is that they will happen in a
* first come first serve order; hence we need to queue.
*/
-std::deque >
-taskEventQueue;
-std::deque >
-transferEventQueue;
+std::deque taskEventQueue;
+std::deque transferEventQueue;
/**
* Bits of interest within UFS data packages
diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc
index f84b4c3..a78819a 100644
--- a/src/dev/dma_device.cc
+++ b/src/dev/dma_device.cc
@@ -56,7 +56,8 @@
DmaPort::DmaPort(MemObject *dev, System *s)
: MasterPort(dev->name() + ".dma", dev),
device(dev), sys(s), masterId(s->getMasterId(dev->name())),
- sendEvent(this), pendingCount(0), inRetry(false)
+ sendEvent([this]{ sendDma(); }, dev->name()),
+ pendingCount(0), inRetry(false)
{ }
void
diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh
index 4a1946a..f354d38 100644
--- a/src/dev/dma_device.hh
+++ b/src/dev/dma_device.hh
@@ -123,7 +123,7 @@
std::deque transmitList;
/** Event used to schedule a future sending from the transmit list. */
-EventWrapper sendEvent;
+EventFun
[gem5-dev] Change in public/gem5[master]: mem: Replace EventWrapper use with EventFunctionWrapper
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3745 )
Change subject: mem: Replace EventWrapper use with EventFunctionWrapper
..
mem: Replace EventWrapper use with EventFunctionWrapper
NOTE: With this change there is a possibility for `DRAMCtrl::Rank`s
event names to not properly match the rank they were generated by. This
could occur if the public rank member is modified after the Rank's
construction. A patch would mean refactoring Rank and `DRAMCtrl`b to
privatize many of the members of Rank behind getters.
Change-Id: I7b8bd15086f4ffdfd3f40be4aeddac5e786fd78e
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3745
Reviewed-by: Jason Lowe-Power
Reviewed-by: Anthony Gutierrez
Reviewed-by: Nikos Nikoleris
Maintainer: Nikos Nikoleris
---
M src/mem/bridge.cc
M src/mem/bridge.hh
M src/mem/cache/base.cc
M src/mem/cache/base.hh
M src/mem/cache/cache.cc
M src/mem/cache/cache.hh
M src/mem/comm_monitor.cc
M src/mem/comm_monitor.hh
M src/mem/dram_ctrl.cc
M src/mem/dram_ctrl.hh
M src/mem/dramsim2.cc
M src/mem/dramsim2.hh
M src/mem/serial_link.cc
M src/mem/serial_link.hh
M src/mem/simple_mem.cc
M src/mem/simple_mem.hh
M src/mem/xbar.cc
M src/mem/xbar.hh
18 files changed, 45 insertions(+), 46 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index a7adcba..0c9e2c1 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -61,8 +61,8 @@
std::vector _ranges)
: SlavePort(_name, &_bridge), bridge(_bridge), masterPort(_masterPort),
delay(_delay), ranges(_ranges.begin(), _ranges.end()),
- outstandingResponses(0), retryReq(false),
- respQueueLimit(_resp_limit), sendEvent(*this)
+ outstandingResponses(0), retryReq(false),
respQueueLimit(_resp_limit),
+ sendEvent([this]{ trySendTiming(); }, _name)
{
}
@@ -71,7 +71,8 @@
BridgeSlavePort& _slavePort,
Cycles _delay, int _req_limit)
: MasterPort(_name, &_bridge), bridge(_bridge), slavePort(_slavePort),
- delay(_delay), reqQueueLimit(_req_limit), sendEvent(*this)
+ delay(_delay), reqQueueLimit(_req_limit),
+ sendEvent([this]{ trySendTiming(); }, _name)
{
}
diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh
index ad35859..f2cc445 100644
--- a/src/mem/bridge.hh
+++ b/src/mem/bridge.hh
@@ -156,8 +156,7 @@
void trySendTiming();
/** Send event for the response queue. */
-EventWrapper sendEvent;
+EventFunctionWrapper sendEvent;
public:
@@ -255,8 +254,7 @@
void trySendTiming();
/** Send event for the request queue. */
-EventWrapper sendEvent;
+EventFunctionWrapper sendEvent;
public:
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index 7f08d17..6f25323 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -62,7 +62,8 @@
BaseCache *_cache,
const std::string &_label)
: QueuedSlavePort(_name, _cache, queue), queue(*_cache, *this, _label),
- blocked(false), mustSendRetry(false), sendRetryEvent(this)
+ blocked(false), mustSendRetry(false),
+ sendRetryEvent([this]{ processSendRetry(); }, _name)
{
}
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 2787eea..2f4b934 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -177,8 +177,7 @@
void processSendRetry();
-EventWrapper sendRetryEvent;
+EventFunctionWrapper sendRetryEvent;
};
diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc
index 0914810..fdc14a7 100644
--- a/src/mem/cache/cache.cc
+++ b/src/mem/cache/cache.cc
@@ -73,7 +73,8 @@
clusivity(p->clusivity),
writebackClean(p->writeback_clean),
tempBlockWriteback(nullptr),
- writebackTempBlockAtomicEvent(this, false,
+ writebackTempBlockAtomicEvent([this]{ writebackTempBlockAtomic(); },
+name(), false,
EventBase::Delayed_Writeback_Pri)
{
tempBlock = new CacheBlk();
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index e5c8ab6..9d135c6 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -257,8 +257,7 @@
* finishes. To avoid other calls to recvAtomic getting in
* between, we create this event with a higher priority.
*/
-EventWrapper \
-writebackTempBlockAtomicEvent;
+EventFunctionWrapper writebackTempBlockAtomicEvent;
/**
* Store the outstanding requests that we are expecting snoop
diff --git a/src/me
[gem5-dev] Change in public/gem5[master]: sim: Add generic EventFunctionWrapper
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3743 )
Change subject: sim: Add generic EventFunctionWrapper
..
sim: Add generic EventFunctionWrapper
Add EventFunctionWrapper, an event wrapper which takes any callable
object to use as its callback. (This includes c++ lambdas, function
pointers, bound functions, and std::functions.)
Change-Id: Iab140df47bd0f7e4b3fe3b568f9dd122a43cee1c
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3743
Reviewed-by: Anthony Gutierrez
Reviewed-by: Jason Lowe-Power
Maintainer: Anthony Gutierrez
---
M src/sim/eventq.hh
1 file changed, 28 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved; Looks good to me, approved
diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh
index 9d3c5c3..6d68b4e 100644
--- a/src/sim/eventq.hh
+++ b/src/sim/eventq.hh
@@ -800,4 +800,32 @@
const char *description() const { return "EventWrapped"; }
};
+class EventFunctionWrapper : public Event
+{
+ private:
+ std::function callback;
+ std::string _name;
+
+ public:
+EventFunctionWrapper(const std::function &callback,
+ const std::string &name,
+ bool del = false,
+ Priority p = Default_Pri)
+: Event(p), callback(callback), _name(name)
+{
+if (del)
+setFlags(AutoDelete);
+}
+
+void process() { callback(); }
+
+const std::string
+name() const
+{
+return _name + ".wrapped_function_event";
+}
+
+const char *description() const { return "EventFunctionWrapped"; }
+};
+
#endif // __SIM_EVENTQ_HH__
--
To view, visit https://gem5-review.googlesource.com/3743
To unsubscribe, visit https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Iab140df47bd0f7e4b3fe3b568f9dd122a43cee1c
Gerrit-Change-Number: 3743
Gerrit-PatchSet: 3
Gerrit-Owner: Sean Wilson
Gerrit-Reviewer: Anthony Gutierrez
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Sean Wilson
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[gem5-dev] Change in public/gem5[master]: arm: Replace EventWrapper use with EventFunctionWrapper
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3747 )
Change subject: arm: Replace EventWrapper use with EventFunctionWrapper
..
arm: Replace EventWrapper use with EventFunctionWrapper
Change-Id: I08de5f72513645d1fe92bde99fa205dde897e951
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3747
Reviewed-by: Jason Lowe-Power
Reviewed-by: Anthony Gutierrez
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
---
M src/arch/arm/table_walker.cc
M src/arch/arm/table_walker.hh
M src/dev/arm/energy_ctrl.cc
M src/dev/arm/energy_ctrl.hh
M src/dev/arm/flash_device.cc
M src/dev/arm/flash_device.hh
M src/dev/arm/generic_timer.cc
M src/dev/arm/generic_timer.hh
M src/dev/arm/hdlcd.cc
M src/dev/arm/hdlcd.hh
M src/dev/arm/kmi.cc
M src/dev/arm/kmi.hh
M src/dev/arm/pl011.cc
M src/dev/arm/pl011.hh
M src/dev/arm/pl111.cc
M src/dev/arm/pl111.hh
M src/dev/arm/rtc_pl031.cc
M src/dev/arm/rtc_pl031.hh
M src/dev/arm/timer_cpulocal.cc
M src/dev/arm/timer_cpulocal.hh
M src/dev/arm/timer_sp804.cc
M src/dev/arm/timer_sp804.hh
M src/dev/arm/ufs_device.cc
M src/dev/arm/ufs_device.hh
24 files changed, 54 insertions(+), 48 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved
diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index 8783d0a..2d66642 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -64,12 +64,15 @@
numSquashable(p->num_squash_per_cycle),
pendingReqs(0),
pendingChangeTick(curTick()),
- doL1DescEvent(this), doL2DescEvent(this),
- doL0LongDescEvent(this), doL1LongDescEvent(this),
- doL2LongDescEvent(this), doL3LongDescEvent(this),
+ doL1DescEvent([this]{ doL1DescriptorWrapper(); }, name()),
+ doL2DescEvent([this]{ doL2DescriptorWrapper(); }, name()),
+ doL0LongDescEvent([this]{ doL0LongDescriptorWrapper(); }, name()),
+ doL1LongDescEvent([this]{ doL1LongDescriptorWrapper(); }, name()),
+ doL2LongDescEvent([this]{ doL2LongDescriptorWrapper(); }, name()),
+ doL3LongDescEvent([this]{ doL3LongDescriptorWrapper(); }, name()),
LongDescEventByLevel { &doL0LongDescEvent, &doL1LongDescEvent,
&doL2LongDescEvent, &doL3LongDescEvent },
- doProcessEvent(this)
+ doProcessEvent([this]{ processWalkWrapper(); }, name())
{
sctlr = 0;
diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh
index c52cfcb..b322c50 100644
--- a/src/arch/arm/table_walker.hh
+++ b/src/arch/arm/table_walker.hh
@@ -920,28 +920,22 @@
void doL1Descriptor();
void doL1DescriptorWrapper();
-EventWrapper doL1DescEvent;
+EventFunctionWrapper doL1DescEvent;
void doL2Descriptor();
void doL2DescriptorWrapper();
-EventWrapper doL2DescEvent;
+EventFunctionWrapper doL2DescEvent;
void doLongDescriptor();
void doL0LongDescriptorWrapper();
-EventWrapper- &TableWalker::doL0LongDescriptorWrapper>
doL0LongDescEvent;
+EventFunctionWrapper doL0LongDescEvent;
void doL1LongDescriptorWrapper();
-EventWrapper- &TableWalker::doL1LongDescriptorWrapper>
doL1LongDescEvent;
+EventFunctionWrapper doL1LongDescEvent;
void doL2LongDescriptorWrapper();
-EventWrapper- &TableWalker::doL2LongDescriptorWrapper>
doL2LongDescEvent;
+EventFunctionWrapper doL2LongDescEvent;
void doL3LongDescriptorWrapper();
-EventWrapper- &TableWalker::doL3LongDescriptorWrapper>
doL3LongDescEvent;
+EventFunctionWrapper doL3LongDescEvent;
void doLongDescriptorWrapper(LookupLevel curr_lookup_level);
Event* LongDescEventByLevel[4];
@@ -960,7 +954,7 @@
static bool checkAddrSizeFaultAArch64(Addr addr, int
currPhysAddrRange);
Fault processWalkAArch64();
void processWalkWrapper();
-EventWrapper
doProcessEvent;
+EventFunctionWrapper doProcessEvent;
void nextWalk(ThreadContext *tc);
diff --git a/src/dev/arm/energy_ctrl.cc b/src/dev/arm/energy_ctrl.cc
index 9efdeb1..9cfce3a 100644
--- a/src/dev/arm/energy_ctrl.cc
+++ b/src/dev/arm/energy_ctrl.cc
@@ -54,7 +54,7 @@
domainIDIndexToRead(0),
perfLevelAck(0),
perfLevelToRead(0),
- updateAckEvent(this)
+ updateAckEvent([this]{ updatePLAck(); }, name())
{
fatal_if(!p->dvfs_handler, "EnergyCtrl: Needs a DVFSHandler for a "
"functioning system.\n");
diff --git a/src/dev/arm/energy_ctrl.hh b/src/dev/arm/energy_ctrl.hh
index ddfd8d7..2c7eb85 100644
--- a/src/dev/arm/energy_ctrl.hh
+++ b/src/dev/arm/energy_ctrl.hh
@@ -182,6 +182,6 @@
perfLevelAck = 1;
}
-EventWrapper updateAckEvent;
+EventFunctionWrapper updateAckEvent;
};
#endi
[gem5-dev] Change in public/gem5[master]: mem: Move the Rank construction logic to the Rank constructor
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3742 )
Change subject: mem: Move the Rank construction logic to the Rank
constructor
..
mem: Move the Rank construction logic to the Rank constructor
This change was made so Rank objects have their name assigned
when they are instantiated. Therefore, they can initialize their
member objects with their name and it is less likely to change during
runtime.
(NOTE: I would recommend hiding the fields which would cause the name to
change behind getters. Since modification of `Rank.rank` during runtime
will cause the `name()` to change.)
Change-Id: Id51c3553b40e489792c57950e18b8ce927e43173
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3742
Reviewed-by: Nikos Nikoleris
Reviewed-by: Jason Lowe-Power
Maintainer: Nikos Nikoleris
---
M src/mem/dram_ctrl.cc
M src/mem/dram_ctrl.hh
2 files changed, 27 insertions(+), 30 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Nikos Nikoleris: Looks good to me, approved; Looks good to me, approved
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 4398611..9e5c00b 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -104,32 +104,8 @@
"must be a power of two\n", burstSize);
for (int i = 0; i < ranksPerChannel; i++) {
-Rank* rank = new Rank(*this, p);
+Rank* rank = new Rank(*this, p, i);
ranks.push_back(rank);
-
-rank->actTicks.resize(activationLimit, 0);
-rank->banks.resize(banksPerRank);
-rank->rank = i;
-
-for (int b = 0; b < banksPerRank; b++) {
-rank->banks[b].bank = b;
-// GDDR addressing of banks to BG is linear.
-// Here we assume that all DRAM generations address bank
groups as
-// follows:
-if (bankGroupArch) {
-// Simply assign lower bits to bank group in order to
-// rotate across bank groups as banks are incremented
-// e.g. with 4 banks per bank group and 16 banks total:
-//banks 0,4,8,12 are in bank group 0
-//banks 1,5,9,13 are in bank group 1
-//banks 2,6,10,14 are in bank group 2
-//banks 3,7,11,15 are in bank group 3
-rank->banks[b].bankgr = b % bankGroupsPerRank;
-} else {
-// No bank groups; simply assign to bank number
-rank->banks[b].bankgr = b;
-}
-}
}
// perform a basic check of the write thresholds
@@ -1626,16 +1602,37 @@
return make_pair(bank_mask, hidden_bank_prep);
}
-DRAMCtrl::Rank::Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p)
+DRAMCtrl::Rank::Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p, int rank)
: EventManager(&_memory), memory(_memory),
pwrStateTrans(PWR_IDLE), pwrStatePostRefresh(PWR_IDLE),
pwrStateTick(0), refreshDueAt(0), pwrState(PWR_IDLE),
- refreshState(REF_IDLE), inLowPowerState(false), rank(0),
+ refreshState(REF_IDLE), inLowPowerState(false), rank(rank),
readEntries(0), writeEntries(0), outstandingEvents(0),
- wakeUpAllowedAt(0), power(_p, false), numBanksActive(0),
+ wakeUpAllowedAt(0), power(_p, false), banks(_p->banks_per_rank),
+ numBanksActive(0), actTicks(_p->activation_limit, 0),
writeDoneEvent(*this), activateEvent(*this), prechargeEvent(*this),
refreshEvent(*this), powerEvent(*this), wakeUpEvent(*this)
-{ }
+{
+for (int b = 0; b < _p->banks_per_rank; b++) {
+banks[b].bank = b;
+// GDDR addressing of banks to BG is linear.
+// Here we assume that all DRAM generations address bank groups as
+// follows:
+if (_p->bank_groups_per_rank > 0) {
+// Simply assign lower bits to bank group in order to
+// rotate across bank groups as banks are incremented
+// e.g. with 4 banks per bank group and 16 banks total:
+//banks 0,4,8,12 are in bank group 0
+//banks 1,5,9,13 are in bank group 1
+//banks 2,6,10,14 are in bank group 2
+//banks 3,7,11,15 are in bank group 3
+banks[b].bankgr = b % _p->bank_groups_per_rank;
+} else {
+// No bank groups; simply assign to bank number
+banks[b].bankgr = b;
+}
+}
+}
void
DRAMCtrl::Rank::startup(Tick ref_tick)
diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
index 12cb0e9..1883041 100644
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -451,7 +451,7 @@
/** List to keep track of activate ticks */
std::deque actTicks;
-Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p);
+Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p, int rank);
const std::string name() const
[gem5-dev] Change in public/gem5[master]: cpu, gpu-compute: Replace EventWrapper use with EventFunctio...
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3746 )
Change subject: cpu, gpu-compute: Replace EventWrapper use with
EventFunctionWrapper
..
cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper
Change-Id: Idd5992463bcf9154f823b82461070d1f1842cea3
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3746
Reviewed-by: Anthony Gutierrez
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
---
M src/cpu/base.cc
M src/cpu/kvm/base.cc
M src/cpu/o3/probe/elastic_trace.cc
M src/cpu/o3/probe/elastic_trace.hh
M src/cpu/simple/timing.cc
M src/cpu/simple/timing.hh
M src/cpu/testers/memtest/memtest.cc
M src/cpu/testers/memtest/memtest.hh
M src/cpu/testers/traffic_gen/traffic_gen.cc
M src/cpu/testers/traffic_gen/traffic_gen.hh
M src/cpu/trace/trace_cpu.cc
M src/cpu/trace/trace_cpu.hh
M src/gpu-compute/gpu_tlb.cc
M src/gpu-compute/gpu_tlb.hh
14 files changed, 29 insertions(+), 29 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 08f95ea..6f460d3 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -229,8 +229,8 @@
if (p->function_trace_start == 0) {
functionTracingEnabled = true;
} else {
-typedef EventWrapper
wrap;
-Event *event = new wrap(this, true);
+Event *event = new EventFunctionWrapper(
+[this]{ enableFunctionTrace(); }, name(), true);
schedule(event, p->function_trace_start);
}
}
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 6ae3c7d..23a4080 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -164,8 +164,7 @@
thread->startup();
Event *startupEvent(
-new EventWrapper(this, true));
+new EventFunctionWrapper([this]{ startupThread(); }, name(),
true));
schedule(startupEvent, curTick());
}
diff --git a/src/cpu/o3/probe/elastic_trace.cc
b/src/cpu/o3/probe/elastic_trace.cc
index bf6b6f0..c97bf78 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -50,7 +50,7 @@
ElasticTrace::ElasticTrace(const ElasticTraceParams* params)
: ProbeListenerObject(params),
- regEtraceListenersEvent(this),
+ regEtraceListenersEvent([this]{ regEtraceListeners(); }, name()),
firstWin(true),
lastClearedSeqNum(0),
depWindowSize(params->depWindowSize),
diff --git a/src/cpu/o3/probe/elastic_trace.hh
b/src/cpu/o3/probe/elastic_trace.hh
index 584cdf1..08e02da 100644
--- a/src/cpu/o3/probe/elastic_trace.hh
+++ b/src/cpu/o3/probe/elastic_trace.hh
@@ -182,8 +182,7 @@
void regStats();
/** Event to trigger registering this listener for all probe points. */
-EventWrapper- &ElasticTrace::regEtraceListeners>
regEtraceListenersEvent;
+EventFunctionWrapper regEtraceListenersEvent;
private:
/**
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 1c468dc..d2cb6ee 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -80,7 +80,7 @@
TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p)
: BaseSimpleCPU(p), fetchTranslation(this), icachePort(this),
dcachePort(this), ifetch_pkt(NULL), dcache_pkt(NULL),
previousCycle(0),
- fetchEvent(this)
+ fetchEvent([this]{ fetch(); }, name())
{
_status = Idle;
}
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index eebf884..8498630 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -159,7 +159,8 @@
public:
TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu)
-: MasterPort(_name, _cpu), cpu(_cpu), retryRespEvent(this)
+: MasterPort(_name, _cpu), cpu(_cpu),
+ retryRespEvent([this]{ sendRetryResp(); }, name())
{ }
protected:
@@ -176,7 +177,7 @@
void schedule(PacketPtr _pkt, Tick t);
};
-EventWrapper
retryRespEvent;
+EventFunctionWrapper retryRespEvent;
};
class IcachePort : public TimingCPUPort
@@ -315,8 +316,7 @@
private:
-typedef EventWrapper
FetchEvent;
-FetchEvent fetchEvent;
+EventFunctionWrapper fetchEvent;
struct IprEvent : Event {
Packet *pkt;
diff --git a/src/cpu/testers/memtest/memtest.cc
b/src/cpu/testers/memtest/memtest.cc
index 46387fa..6f3f9b3 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -86,9 +86,9 @@
MemTest::MemTest(const Params *p)
: MemObject(p),
- tickEvent(this),
- noRequestEvent(this),
- noResponseEvent(this),
+ tickEvent([this]{ tick(); }, name()),
+ noRequestEvent([this]{ noRequest(); }, name()),
+ noResponseEvent([th
[gem5-dev] Change in public/gem5[master]: sim, x86: Replace EventWrapper use with EventFunctionWrapper
Sean Wilson has submitted this change and it was merged. (
https://gem5-review.googlesource.com/3749 )
Change subject: sim, x86: Replace EventWrapper use with EventFunctionWrapper
..
sim, x86: Replace EventWrapper use with EventFunctionWrapper
Change-Id: Ie1df07b70776208fc3631a73d403024636fc05a9
Signed-off-by: Sean Wilson
Reviewed-on: https://gem5-review.googlesource.com/3749
Reviewed-by: Jason Lowe-Power
Reviewed-by: Anthony Gutierrez
Maintainer: Anthony Gutierrez
---
M src/arch/x86/pagetable_walker.hh
M src/sim/power/thermal_model.cc
M src/sim/power/thermal_model.hh
M src/sim/root.cc
M src/sim/root.hh
5 files changed, 8 insertions(+), 8 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Anthony Gutierrez: Looks good to me, approved; Looks good to me, approved
diff --git a/src/arch/x86/pagetable_walker.hh
b/src/arch/x86/pagetable_walker.hh
index 9be35e6..d71db7e 100644
--- a/src/arch/x86/pagetable_walker.hh
+++ b/src/arch/x86/pagetable_walker.hh
@@ -178,7 +178,7 @@
/**
* Event used to call startWalkWrapper.
**/
-EventWrapper
startWalkWrapperEvent;
+EventFunctionWrapper startWalkWrapperEvent;
// Functions for dealing with packets.
bool recvTimingResp(PacketPtr pkt);
@@ -205,7 +205,7 @@
funcState(this, NULL, NULL, true), tlb(NULL),
sys(params->system),
masterId(sys->getMasterId(name())),
numSquashable(params->num_squash_per_cycle),
-startWalkWrapperEvent(this)
+startWalkWrapperEvent([this]{ startWalkWrapper(); }, name())
{
}
};
diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc
index 05ce42b..d362da6 100644
--- a/src/sim/power/thermal_model.cc
+++ b/src/sim/power/thermal_model.cc
@@ -194,7 +194,7 @@
* ThermalModel
*/
ThermalModel::ThermalModel(const Params *p)
-: ClockedObject(p), stepEvent(this), _step(p->step)
+: ClockedObject(p), stepEvent([this]{ doStep(); }, name()),
_step(p->step)
{
}
diff --git a/src/sim/power/thermal_model.hh b/src/sim/power/thermal_model.hh
index 7ee4ffd..b47061d 100644
--- a/src/sim/power/thermal_model.hh
+++ b/src/sim/power/thermal_model.hh
@@ -179,7 +179,7 @@
std::vector eq_nodes;
/** Stepping event to update the model values */
-EventWrapper stepEvent;
+EventFunctionWrapper stepEvent;
/** Step in seconds for thermal updates */
double _step;
diff --git a/src/sim/root.cc b/src/sim/root.cc
index 752632b..f4aabad 100644
--- a/src/sim/root.cc
+++ b/src/sim/root.cc
@@ -104,8 +104,9 @@
timeSyncEnable(en);
}
-Root::Root(RootParams *p) : SimObject(p), _enabled(false),
-_periodTick(p->time_sync_period), syncEvent(this)
+Root::Root(RootParams *p)
+: SimObject(p), _enabled(false), _periodTick(p->time_sync_period),
+ syncEvent([this]{ timeSync(); }, name())
{
_period.setTick(p->time_sync_period);
_spinThreshold.setTick(p->time_sync_spin_threshold);
diff --git a/src/sim/root.hh b/src/sim/root.hh
index 7273a07..db207a7 100644
--- a/src/sim/root.hh
+++ b/src/sim/root.hh
@@ -60,8 +60,7 @@
Time lastTime;
void timeSync();
-EventWrapper syncEvent;
-friend class EventWrapper;
+EventFunctionWrapper syncEvent;
public:
/**
--
To view, visit https://gem5-review.googlesource.com/3749
To unsubscribe, visit https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: merged
Gerrit-Change-Id: Ie1df07b70776208fc3631a73d403024636fc05a9
Gerrit-Change-Number: 3749
Gerrit-PatchSet: 5
Gerrit-Owner: Sean Wilson
Gerrit-Reviewer: Anthony Gutierrez
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Sean Wilson
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[gem5-dev] Change in public/gem5[master]: mem: Replace EventWrapper in PacketQueue with EventFunctionW...
Hello Anthony Gutierrez, Jason Lowe-Power, Nikos Nikoleris, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/3744 to look at the new patch set (#3). Change subject: mem: Replace EventWrapper in PacketQueue with EventFunctionWrapper .. mem: Replace EventWrapper in PacketQueue with EventFunctionWrapper In order to replicate the same `name()` output with `PacketQueue`, subclasses using EventFunctionWrapper must initialize PacketQueue with their own name so the sendEvent holds the name of the subclass. Change-Id: Ib091e118bab8858192e1d1370d61def42958ec29 Signed-off-by: Sean Wilson --- M src/mem/packet_queue.cc M src/mem/packet_queue.hh 2 files changed, 32 insertions(+), 8 deletions(-) -- To view, visit https://gem5-review.googlesource.com/3744 To unsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ib091e118bab8858192e1d1370d61def42958ec29 Gerrit-Change-Number: 3744 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Wilson Gerrit-Reviewer: Anthony Gutierrez Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: Sean Wilson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in public/gem5[master]: sim: Updated ClockedObject power state warning
Jason Lowe-Power has uploaded this change for review. (
https://gem5-review.googlesource.com/3840
Change subject: sim: Updated ClockedObject power state warning
..
sim: Updated ClockedObject power state warning
To prevent this warning from printing for *every* simulation, this patch
adds a check to only print the warning if we are not at the beginning of
simulation.
Change-Id: I7f6154f0ca26bef6280f909f799aa1c7936b624a
Signed-off-by: Jason Lowe-Power
---
M src/sim/clocked_object.cc
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/sim/clocked_object.cc b/src/sim/clocked_object.cc
index f0b1765..ddf9e0f 100644
--- a/src/sim/clocked_object.cc
+++ b/src/sim/clocked_object.cc
@@ -90,7 +90,7 @@
// same tick if other conditions are not met elsewhere.
// Any state change related stats would have been recorded on previous
call
// to the pwrState() function.
-if (prvEvalTick == curTick()) {
+if (prvEvalTick == curTick() && curTick() != 0) {
warn("ClockedObject: More than one power state change request "\
"encountered within the same simulation tick");
_currPwrState = p;
--
To view, visit https://gem5-review.googlesource.com/3840
To unsubscribe, visit https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I7f6154f0ca26bef6280f909f799aa1c7936b624a
Gerrit-Change-Number: 3840
Gerrit-PatchSet: 1
Gerrit-Owner: Jason Lowe-Power
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[gem5-dev] Change in public/gem5[master]: dev: Replace EventWrapper use with EventFunctionWrapper
Hello Anthony Gutierrez, Jason Lowe-Power, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/3748 to look at the new patch set (#3). Change subject: dev: Replace EventWrapper use with EventFunctionWrapper .. dev: Replace EventWrapper use with EventFunctionWrapper Change-Id: I6b03cc6f67e76dffb79940431711ae6171901c6a Signed-off-by: Sean Wilson --- M src/dev/arm/ufs_device.cc M src/dev/arm/ufs_device.hh M src/dev/dma_device.cc M src/dev/dma_device.hh M src/dev/net/dist_etherlink.hh M src/dev/net/etherlink.cc M src/dev/net/etherlink.hh M src/dev/net/etherswitch.cc M src/dev/net/etherswitch.hh M src/dev/net/i8254xGBe.cc M src/dev/net/i8254xGBe.hh M src/dev/net/ns_gige.cc M src/dev/net/ns_gige.hh M src/dev/net/sinic.cc M src/dev/net/sinic.hh M src/dev/pci/copy_engine.cc M src/dev/pci/copy_engine.hh M src/dev/storage/ide_disk.cc M src/dev/storage/ide_disk.hh 19 files changed, 123 insertions(+), 135 deletions(-) -- To view, visit https://gem5-review.googlesource.com/3748 To unsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6b03cc6f67e76dffb79940431711ae6171901c6a Gerrit-Change-Number: 3748 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Wilson Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Anthony Gutierrez Gerrit-Reviewer: Jason Lowe-Power ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] GEM5-to-TLM Memory/Accelerator Access
Hi Christian, Thank you for the reply. I have configured the address ranges accordingly in my configuration script for both the external memory and SimpleMemory model. But I am unable to find a way to define a new address mapping. In SE mode, only SimpleMemory model (the one I am using for GEM5 memory) is being recognized as physical memory and it is the only one mapped (virtual to physical). An excerpt from my config.ini looks as follows (modified to include both memories) [system] type=System children=clk_domain cpu cpu_clk_domain cpu_voltage_domain dvfs_handler physmem external_memory membus voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain default_p_state=UNDEFINED eventq_index=0 exit_on_work_items=false init_param=0 kernel= kernel_addr_check=false load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem mmap_using_noreserve=false multi_thread=false . . . [system.physmem] type=SimpleMemory bandwidth=73.00 clk_domain=system.clk_domain conf_table_reported=true default_p_state=UNDEFINED eventq_index=0 in_addr_map=true kvm_map=true latency=3 latency_var=0 null=false p_state_clk_gate_bins=20 p_state_clk_gate_max=1 p_state_clk_gate_min=1000 power_model=Null range=0:134217727:0:0:0:0 port=system.membus.master[0] [system.external_memory] type=ExternalSlave addr_ranges=134217728:671088639:0:0:0:0 clk_domain=system.clk_domain default_p_state=UNDEFINED eventq_index=0 p_state_clk_gate_bins=20 p_state_clk_gate_max=1 p_state_clk_gate_min=1000 port_data=transactor port_type=tlm_slave power_model=Null port=system.membus.master[1] . . . I will have a look at FS mode as well. The motivation to use the TLM-Bridge is because we will have more accelerators in SystemC, and we will like to plug them directly with the GEM5 world. Regards Yasir -Original Message- From: Christian Menard [mailto:christian.men...@tu-dresden.de] Sent: 19 June 2017 16:58 To: gem5-dev@gem5.org Cc: Qureshi Yasir Mahmood Subject: Re: [gem5-dev] GEM5-to-TLM Memory/Accelerator Access Hi Yasir, The short answer: You need to configure your gem5 simulation properly. You can configure address ranges in the ExternalSlave object (see src/mem/ ExternalSlave.py). You will also need to configure your MMU to implement the right address mappings. I am not sure how this works in SE mode, but there should be a way of defining new address mappings. You probably want to look at se.py and the files it imports and understand how the memory map is set up. Maybe you should also consider to switch to FS mode. While I appreciate your interest, I don't understand your motivation for using the TLM-Bridge. If you implement an accelerator from scratch, why don't you do so in gem5 directly? Why do you need the TLM bridge? I saw your e-mails on 'SystemC and GEM5 SE Mode' and will look into this issue when I find the time. Best regards, Christian Menard On Monday, 19 June 2017 16:14:27 CEST Qureshi Yasir Mahmood wrote: > Hi All, > > I am trying to setup a GEM5-to-TLM simulation with GEM5 in ARM SE mode > and SimpleMemory as the physical memory. I intend to model an > accelerator in SystemC in the TLM world. I want my accelerator to > start when I signal it through some memory mapped register > (effectively addressing a memory location in C). To get started, I > setup the GEM5 in SE with util/tlm, in which 512MB memory is modelled > in TLM. I am trying to access the memory location in the TLM through > GEM5, but I don't know how as it is not being treated as physical memory by > GEM5. > > Can someone help or has any idea, as how to have some > accelerator/memory in TLM and access it via a C program in GEM5 ? > > Regards > Yasir > ESL, EPFL > > > > > > ___ > gem5-dev mailing list > gem5-dev@gem5.org > http://m5sim.org/mailman/listinfo/gem5-dev -- Dipl.-Ing. Christian Menard Research Assistant TU Dresden Faculty of Computer Science Chair for Compiler Construction 01062 Dresden Phone: +49 351 463-42441 e-Mail: christian.men...@tu-dresden.de ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Cron /z/m5/regression/do-regression quick
* build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/00.hello/riscv/linux/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-timing-ruby: FAILED!*** gem5 stderr *** * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64a/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64d/minor-timing: FAILED! *** gem5: ERROR: gem5 exited with non-zero status: 1* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64d/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64d/simple-timing-ruby: FAILED! gem5 exited with non-zero status: 1* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64d/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/simple-atomic: FAILED!* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64i/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/o3-timing: FAILED!*** gem5: ERROR: gem5 exited with non-zero status: 1 * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64m/simple-timing-ruby: FAILED! * build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing: CHANGED! * build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual: CHANGED! scons: *** [build/ALPHA/encumbered/eio/libexo.do] Error 1 scons: *** [build/ALPHA/encumbered/eio/eio.do] Error 1 scons: *** [build/ALPHA/encumbered/eio/libexo.fo] Error 1 scons: *** [build/ALPHA/encumbered/eio/eio.fo] Error 1 scons: *** [build/ALPHA/encumbered/eio/libexo.o] Error 1 scons: *** [build/ALPHA/encumbered/eio/eio.o] Error 1 * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: passed. * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic: passed. * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: passed. * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: passed. * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple: passed. * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level: passed. * build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest: passed. * build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter: passed. * build/NULL/tests/opt/quick/se/51.memcheck/null/none/memcheck: passed. * build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: passed. * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: passed. * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem: passed. * build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer: passed. * build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level: passed. * build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory: passed. * build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token: passed. * build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic: passed. * build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: passed. * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic: passed. * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: passed. * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: passed. * build/SPARC/test
