[gem5-dev] Cron /z/m5/regression/do-regression quick

[Cron Daemon]

* 
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FAILED!
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 FAILED!
* 
build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-atomic:
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* 
build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing: 
FAILED!* 
build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing-dual:
 FAILED!
* 
build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-switcheroo-timing:
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* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic: 
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* build/X86/tests/opt/quick/se/00.hello/x86/li

[gem5-dev] Change in gem5/gem5[master]: tests: fix arm regression due to kernel not found

[Ciro Santilli (Gerrit)]

Hello Andreas Sandberg,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15957

to review the following change.


Change subject: tests: fix arm regression due to kernel not found
..

tests: fix arm regression due to kernel not found

At Ia49298304f658701ea0800bd79e08db404a655c3 we removed the default
kernel and DTB filenames from FSConfig.py.

However, the regression tests rely on that to find those blobs.

This commit restores those default filenames just for the config of the
regression tests.

Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Reviewed-by: Andreas Sandberg 
---
M tests/configs/arm_generic.py
1 file changed, 17 insertions(+), 1 deletion(-)



diff --git a/tests/configs/arm_generic.py b/tests/configs/arm_generic.py
index 722749c..7ffa141 100644
--- a/tests/configs/arm_generic.py
+++ b/tests/configs/arm_generic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012, 2017 ARM Limited
+# Copyright (c) 2012, 2017, 2019 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -46,6 +46,8 @@
 from common.cores.arm.O3_ARM_v7a import *
 from common.Benchmarks import SysConfig

+from common import SysPaths
+
 class ArmSESystemUniprocessor(BaseSESystemUniprocessor):
 """Syscall-emulation builder for ARM uniprocessor systems.

@@ -95,6 +97,20 @@
 system.panic_on_panic = True
 system.panic_on_oops = True

+default_kernels = {
+"RealViewPBX": "vmlinux.arm.smp.fb.2.6.38.8",
+"VExpress_EMM": "vmlinux.aarch32.ll_20131205.0-gem5",
+"VExpress_EMM64": "vmlinux.aarch64.20140821",
+}
+system.kernel = SysPaths.binary(default_kernels[self.machine_type])
+default_dtbs = {
+   "RealViewPBX": None,
+   "VExpress_EMM": "vexpress.aarch32.ll_20131205.0-gem5.{}cpu.dtb"  
\

+ .format(self.num_cpus),
+   "VExpress_EMM64": "vexpress.aarch64.20140821.dtb",
+}
+system.dtb_filename =  
SysPaths.binary(default_dtbs[self.machine_type])

+
 self.init_system(system)
 return system


--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Gerrit-Change-Number: 15957
Gerrit-PatchSet: 1
Gerrit-Owner: Ciro Santilli 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: arch-arm, configs: Create single instance of DTB autogeneration

[Giacomo Travaglini (Gerrit)]

Hello Andreas Sandberg,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15958

to review the following change.


Change subject: arch-arm, configs: Create single instance of DTB  
autogeneration

..

arch-arm, configs: Create single instance of DTB autogeneration

This patch is rewriting the DTB autogeneration functions available in
fs_bigLITTLE.py and fs.py as a single method in the GenericArmSystem
so that other configuration scripts can make use of it.

Change-Id: I492bbf77e6b0ac5c5fbdbc75c0eecba29bd63bda
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Andreas Sandberg 
---
M configs/example/arm/fs_bigLITTLE.py
M configs/example/fs.py
M src/arch/arm/ArmSystem.py
3 files changed, 16 insertions(+), 20 deletions(-)



diff --git a/configs/example/arm/fs_bigLITTLE.py  
b/configs/example/arm/fs_bigLITTLE.py

index 8cf89e3..f363872 100644
--- a/configs/example/arm/fs_bigLITTLE.py
+++ b/configs/example/arm/fs_bigLITTLE.py
@@ -261,16 +261,7 @@
 if options.dtb is not None:
 system.dtb_filename = SysPaths.binary(options.dtb)
 else:
-def create_dtb_for_system(system, filename):
-state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
-rootNode = system.generateDeviceTree(state)
-
-fdt = Fdt()
-fdt.add_rootnode(rootNode)
-dtb_filename = os.path.join(m5.options.outdir, filename)
-return fdt.writeDtbFile(dtb_filename)
-
-system.dtb_filename = create_dtb_for_system(system, 'system.dtb')
+system.generateDtb(m5.options.outdir, 'system.dtb')

 return root

diff --git a/configs/example/fs.py b/configs/example/fs.py
index 4d21658..05eca87 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -360,19 +360,10 @@
  "with generation functionality.")

 # Generate a Device Tree
-def create_dtb_for_system(system, filename):
-state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
-rootNode = system.generateDeviceTree(state)
-
-fdt = Fdt()
-fdt.add_rootnode(rootNode)
-dtb_filename = os.path.join(m5.options.outdir, filename)
-return fdt.writeDtbFile(dtb_filename)
-
 for sysname in ('system', 'testsys', 'drivesys'):
 if hasattr(root, sysname):
 sys = getattr(root, sysname)
-sys.dtb_filename = create_dtb_for_system(sys, '%s.dtb' %  
sysname)

+sys.generateDtb(m5.options.outdir, '%s.dtb' % sysname)

 Simulation.setWorkCountOptions(test_sys, options)
 Simulation.run(options, root, test_sys, FutureClass)
diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py
index bee38a4..98ff959 100644
--- a/src/arch/arm/ArmSystem.py
+++ b/src/arch/arm/ArmSystem.py
@@ -37,6 +37,7 @@
 #  Glenn Bergmans

 from m5.params import *
+from m5.options import *
 from m5.SimObject import *
 from m5.util.fdthelper import *

@@ -138,6 +139,19 @@
 panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
"guest kernel oopses")

+def generateDtb(self, outdir, filename):
+"""
+Autogenerate DTB. Arguments are the folder where the DTB
+will be stored, and the name of the DTB file.
+"""
+state = FdtState(addr_cells=2, size_cells=2, cpu_cells=1)
+rootNode = self.generateDeviceTree(state)
+
+fdt = Fdt()
+fdt.add_rootnode(rootNode)
+dtb_filename = os.path.join(outdir, filename)
+self.dtb_filename = fdt.writeDtbFile(dtb_filename)
+
 class LinuxArmSystem(GenericArmSystem):
 type = 'LinuxArmSystem'
 cxx_header = "arch/arm/linux/system.hh"

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I492bbf77e6b0ac5c5fbdbc75c0eecba29bd63bda
Gerrit-Change-Number: 15958
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: configs: Enable DTB autogeneration in starter_fs.py

[Giacomo Travaglini (Gerrit)]

Hello Andreas Sandberg,

I'd like you to do a code review. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15959

to review the following change.


Change subject: configs: Enable DTB autogeneration in starter_fs.py
..

configs: Enable DTB autogeneration in starter_fs.py

This patch is removing hardcoded default DTBs in favour of common DTB
autogeneration.

Change-Id: I68fdc2a169bfa8e8657c9ed4e4e127957a08cca1
Signed-off-by: Giacomo Travaglini 
Reviewed-by: Andreas Sandberg 
---
M configs/example/arm/starter_fs.py
1 file changed, 7 insertions(+), 7 deletions(-)



diff --git a/configs/example/arm/starter_fs.py  
b/configs/example/arm/starter_fs.py

index a199768..6e53d7b 100644
--- a/configs/example/arm/starter_fs.py
+++ b/configs/example/arm/starter_fs.py
@@ -49,6 +49,7 @@
 import m5
 from m5.util import addToPath
 from m5.objects import *
+from m5.options import *
 import argparse

 m5.util.addToPath('../..')
@@ -92,12 +93,6 @@
 def create(args):
 ''' Create and configure the system object. '''

-if not args.dtb:
-dtb_file = SysPaths.binary("armv8_gem5_v1_%icpu.%s.dtb" %
-   (args.num_cores, default_dist_version))
-else:
-dtb_file = args.dtb
-
 if args.script and not os.path.isfile(args.script):
 print("Error: Bootscript %s does not exist" % args.script)
 sys.exit(1)
@@ -110,7 +105,6 @@
 system = devices.SimpleSystem(want_caches,
   args.mem_size,
   mem_mode=mem_mode,
-  dtb_filename=dtb_file,
   kernel=SysPaths.binary(args.kernel),
   readfile=args.script)

@@ -153,6 +147,12 @@
 # Setup gem5's minimal Linux boot loader.
 system.realview.setupBootLoader(system.membus, system, SysPaths.binary)

+if args.dtb:
+system.dtb_filename = args.dtb
+else:
+# No DTB specified: autogenerate DTB
+system.generateDtb(m5.options.outdir, 'system.dtb')
+
 # Linux boot command flags
 kernel_cmd = [
 # Tell Linux to use the simulated serial port as a console

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I68fdc2a169bfa8e8657c9ed4e4e127957a08cca1
Gerrit-Change-Number: 15959
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: tests: fix arm regression due to kernel not found

[Giacomo Travaglini (Gerrit)]

Giacomo Travaglini has uploaded a new patch set (#2) to the change  
originally created by Ciro Santilli. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15957 )


Change subject: tests: fix arm regression due to kernel not found
..

tests: fix arm regression due to kernel not found

At Ia49298304f658701ea0800bd79e08db404a655c3 we removed the default
kernel and DTB filenames from FSConfig.py.

However, the regression tests rely on that to find those blobs.

This commit restores those default filenames just for the config of the
regression tests.

Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Reviewed-by: Andreas Sandberg 
---
M tests/configs/arm_generic.py
1 file changed, 17 insertions(+), 1 deletion(-)


--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Gerrit-Change-Number: 15957
Gerrit-PatchSet: 2
Gerrit-Owner: Ciro Santilli 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Ciro Santilli 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-MessageType: newpatchset
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[gem5-dev] Change in gem5/gem5[master]: tests: fix arm regression due to kernel not found

[Ciro Santilli (Gerrit)]

Ciro Santilli has submitted this change and it was merged. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15957 )


Change subject: tests: fix arm regression due to kernel not found
..

tests: fix arm regression due to kernel not found

At Ia49298304f658701ea0800bd79e08db404a655c3 we removed the default
kernel and DTB filenames from FSConfig.py.

However, the regression tests rely on that to find those blobs.

This commit restores those default filenames just for the config of the
regression tests.

Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Reviewed-by: Andreas Sandberg 
Reviewed-on: https://gem5-review.googlesource.com/c/15957
Maintainer: Andreas Sandberg 
---
M tests/configs/arm_generic.py
1 file changed, 17 insertions(+), 1 deletion(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved



diff --git a/tests/configs/arm_generic.py b/tests/configs/arm_generic.py
index 722749c..7ffa141 100644
--- a/tests/configs/arm_generic.py
+++ b/tests/configs/arm_generic.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2012, 2017 ARM Limited
+# Copyright (c) 2012, 2017, 2019 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -46,6 +46,8 @@
 from common.cores.arm.O3_ARM_v7a import *
 from common.Benchmarks import SysConfig

+from common import SysPaths
+
 class ArmSESystemUniprocessor(BaseSESystemUniprocessor):
 """Syscall-emulation builder for ARM uniprocessor systems.

@@ -95,6 +97,20 @@
 system.panic_on_panic = True
 system.panic_on_oops = True

+default_kernels = {
+"RealViewPBX": "vmlinux.arm.smp.fb.2.6.38.8",
+"VExpress_EMM": "vmlinux.aarch32.ll_20131205.0-gem5",
+"VExpress_EMM64": "vmlinux.aarch64.20140821",
+}
+system.kernel = SysPaths.binary(default_kernels[self.machine_type])
+default_dtbs = {
+   "RealViewPBX": None,
+   "VExpress_EMM": "vexpress.aarch32.ll_20131205.0-gem5.{}cpu.dtb"  
\

+ .format(self.num_cpus),
+   "VExpress_EMM64": "vexpress.aarch64.20140821.dtb",
+}
+system.dtb_filename =  
SysPaths.binary(default_dtbs[self.machine_type])

+
 self.init_system(system)
 return system


--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I9d7d869b0087ee8a3b63088693f753a703ead5d6
Gerrit-Change-Number: 15957
Gerrit-PatchSet: 3
Gerrit-Owner: Ciro Santilli 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Ciro Santilli 
Gerrit-Reviewer: Ciro Santilli 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: python: Fix native module initialisation on Python 3

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15979



Change subject: python: Fix native module initialisation on Python 3
..

python: Fix native module initialisation on Python 3

The approach we currently use to register our native modules doesn't
work on Python 3. Convert the code to use the Python inittab instead
of the old ad-hoc method.

Change-Id: I961f8a33993c621473732faeaab955a882769a4b
Signed-off-by: Andreas Sandberg 
---
M src/sim/init.cc
M src/sim/init.hh
M src/sim/main.cc
3 files changed, 24 insertions(+), 14 deletions(-)



diff --git a/src/sim/init.cc b/src/sim/init.cc
index 66ec408..5a49f36 100644
--- a/src/sim/init.cc
+++ b/src/sim/init.cc
@@ -191,7 +191,11 @@
 return objs;
 }

+#if PY_MAJOR_VERSION >= 3
+PyObject *
+#else
 void
+#endif
 EmbeddedPyBind::initAll()
 {
 std::list pending;
@@ -226,13 +230,18 @@
 }
 }
 }
+
+#if PY_MAJOR_VERSION >= 3
+return m_m5.ptr();
+#endif
 }

-int
-initM5Python()
+void
+registerNativeModules()
 {
-EmbeddedPyBind::initAll();
-return EmbeddedPython::initAll();
+auto result = PyImport_AppendInittab("_m5", EmbeddedPyBind::initAll);
+if (result == -1)
+panic("Failed to add _m5 to Python's inittab\n");
 }

 /*
@@ -307,10 +316,3 @@

 return 0;
 }
-
-PyMODINIT_FUNC
-initm5(void)
-{
-initM5Python();
-PyImport_ImportModule(PyCC("m5"));
-}
diff --git a/src/sim/init.hh b/src/sim/init.hh
index de6b44d..40ff9ae 100644
--- a/src/sim/init.hh
+++ b/src/sim/init.hh
@@ -90,7 +90,11 @@
 EmbeddedPyBind(const char *_name,
void (*init_func)(pybind11::module &));

+#if PY_MAJOR_VERSION >= 3
+static PyObject *initAll();
+#else
 static void initAll();
+#endif

   private:
 void (*initFunc)(pybind11::module &);
@@ -105,8 +109,8 @@
 static std::map &getMap();
 };

-int initM5Python();
+void registerNativeModules();
+
 int m5Main(int argc, char **argv);
-PyMODINIT_FUNC initm5(void);

 #endif // __SIM_INIT_HH__
diff --git a/src/sim/main.cc b/src/sim/main.cc
index a77c5f5..168e439 100644
--- a/src/sim/main.cc
+++ b/src/sim/main.cc
@@ -54,11 +54,15 @@
 Py_SetProgramName(argv[0]);
 #endif

+// Register native modules with Python's init system before
+// initializing the interpreter.
+registerNativeModules();
+
 // initialize embedded Python interpreter
 Py_Initialize();

 // Initialize the embedded m5 python library
-ret = initM5Python();
+ret = EmbeddedPython::initAll();

 if (ret == 0) {
 // start m5

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I961f8a33993c621473732faeaab955a882769a4b
Gerrit-Change-Number: 15979
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: python: Add Python 3 workarounds for long

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15988



Change subject: python: Add Python 3 workarounds for long
..

python: Add Python 3 workarounds for long

Python 3 doesn't have a separate long type. Make long an alias for int
where needed to maintain compatibility.

Change-Id: I4c0861302bc3a2fa5226b3041803ef975d29b2fd
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/SimObject.py
M src/python/m5/params.py
M src/python/m5/proxy.py
M src/python/m5/ticks.py
M src/python/m5/util/convert.py
M src/python/m5/util/fdthelper.py
M src/python/m5/util/smartdict.py
7 files changed, 23 insertions(+), 2 deletions(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 722b665..099927f 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -45,8 +45,10 @@

 from __future__ import print_function
 from __future__ import absolute_import
-
 from six import add_metaclass
+import six
+if six.PY3:
+long = int

 import sys
 from types import FunctionType, MethodType, ModuleType
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 742fb6b..d6641bd 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -60,8 +60,10 @@
 #

 from __future__ import print_function
-
 from six import add_metaclass
+import six
+if six.PY3:
+long = int

 import copy
 import datetime
diff --git a/src/python/m5/proxy.py b/src/python/m5/proxy.py
index 346ed92..b7a509b 100644
--- a/src/python/m5/proxy.py
+++ b/src/python/m5/proxy.py
@@ -47,6 +47,9 @@

 from __future__ import print_function
 from __future__ import absolute_import
+import six
+if six.PY3:
+long = int

 import copy

diff --git a/src/python/m5/ticks.py b/src/python/m5/ticks.py
index 22a5738..7a740a8 100644
--- a/src/python/m5/ticks.py
+++ b/src/python/m5/ticks.py
@@ -27,6 +27,9 @@
 # Authors: Nathan Binkert

 from __future__ import print_function
+import six
+if six.PY3:
+long = int

 import sys
 from m5.util import warn
diff --git a/src/python/m5/util/convert.py b/src/python/m5/util/convert.py
index 7b9cb38..601211e 100644
--- a/src/python/m5/util/convert.py
+++ b/src/python/m5/util/convert.py
@@ -28,6 +28,10 @@
 # Authors: Nathan Binkert
 #  Gabe Black

+import six
+if six.PY3:
+long = int
+
 # metric prefixes
 atto  = 1.0e-18
 femto = 1.0e-15
diff --git a/src/python/m5/util/fdthelper.py  
b/src/python/m5/util/fdthelper.py

index bd04b41..c876050 100644
--- a/src/python/m5/util/fdthelper.py
+++ b/src/python/m5/util/fdthelper.py
@@ -35,6 +35,10 @@
 #
 # Author: Glenn Bergmans

+import six
+if six.PY3:
+long = int
+
 from m5.ext.pyfdt import pyfdt
 import re
 import os
diff --git a/src/python/m5/util/smartdict.py  
b/src/python/m5/util/smartdict.py

index 0e058a6..e17011a 100644
--- a/src/python/m5/util/smartdict.py
+++ b/src/python/m5/util/smartdict.py
@@ -43,6 +43,9 @@

 from __future__ import print_function
 from __future__ import absolute_import
+import six
+if six.PY3:
+long = int

 from .convert import *
 from .attrdict import attrdict

--
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Gerrit-Branch: master
Gerrit-Change-Id: I4c0861302bc3a2fa5226b3041803ef975d29b2fd
Gerrit-Change-Number: 15988
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: python: Enforce absolute imports for Python 3 compatibility

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15983



Change subject: python: Enforce absolute imports for Python 3 compatibility
..

python: Enforce absolute imports for Python 3 compatibility

Change-Id: Ia88d7fd472f7aed9b97df81468211384981bf6c6
Signed-off-by: Andreas Sandberg 
---
M src/python/importer.py
M src/python/m5/SimObject.py
M src/python/m5/__init__.py
M src/python/m5/core.py
M src/python/m5/ext/__init__.py
M src/python/m5/ext/pyfdt/pyfdt.py
M src/python/m5/internal/params.py
M src/python/m5/main.py
M src/python/m5/objects/__init__.py
M src/python/m5/options.py
M src/python/m5/params.py
M src/python/m5/proxy.py
M src/python/m5/simulate.py
M src/python/m5/trace.py
M src/python/m5/util/__init__.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/dot_writer.py
M src/python/m5/util/jobfile.py
M src/python/m5/util/orderdict.py
M src/python/m5/util/pybind.py
M src/python/m5/util/smartdict.py
M src/python/m5/util/sorteddict.py
M src/python/m5/util/terminal.py
23 files changed, 86 insertions(+), 42 deletions(-)



diff --git a/src/python/importer.py b/src/python/importer.py
index 60b9b35..a5135d3 100644
--- a/src/python/importer.py
+++ b/src/python/importer.py
@@ -26,6 +26,9 @@
 #
 # Authors: Nathan Binkert

+from __future__ import print_function
+from __future__ import absolute_import
+
 # Simple importer that allows python to import data from a dict of
 # code objects.  The keys are the module path, and the items are the
 # filename and bytecode of the file.
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 03d5d3a..1aa8dbe 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -44,6 +44,7 @@
 #  Andreas Sandberg

 from __future__ import print_function
+from __future__ import absolute_import

 from six import add_metaclass

diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py
index 2730ea1..d97727c 100644
--- a/src/python/m5/__init__.py
+++ b/src/python/m5/__init__.py
@@ -26,6 +26,9 @@
 #
 # Authors: Nathan Binkert

+from __future__ import print_function
+from __future__ import absolute_import
+
 # Import useful subpackages of M5, but *only* when run as an m5
 # script.  This is mostly to keep backward compatibility with existing
 # scripts while allowing new SCons code to operate properly.
@@ -42,14 +45,14 @@
 in_gem5 = False

 if in_gem5:
-import SimObject
-import core
-import objects
-import params
-import stats
-import util
+from . import SimObject
+from . import core
+from . import objects
+from . import params
+from . import stats
+from . import util

-from event import *
-from main import main
-from simulate import *
+from .event import *
+from .main import main
+from .simulate import *

diff --git a/src/python/m5/core.py b/src/python/m5/core.py
index ab0ea57..4c94353 100644
--- a/src/python/m5/core.py
+++ b/src/python/m5/core.py
@@ -26,4 +26,7 @@
 #
 # Authors: Nathan Binkert

+from __future__ import print_function
+from __future__ import absolute_import
+
 from _m5.core import setOutputDir
diff --git a/src/python/m5/ext/__init__.py b/src/python/m5/ext/__init__.py
index a5bc8ef..f566a34 100644
--- a/src/python/m5/ext/__init__.py
+++ b/src/python/m5/ext/__init__.py
@@ -36,3 +36,6 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 # Authors: Glenn Bergmans
+
+from __future__ import print_function
+from __future__ import absolute_import
diff --git a/src/python/m5/ext/pyfdt/pyfdt.py  
b/src/python/m5/ext/pyfdt/pyfdt.py

index 3b3238e..3c78b03 100644
--- a/src/python/m5/ext/pyfdt/pyfdt.py
+++ b/src/python/m5/ext/pyfdt/pyfdt.py
@@ -19,6 +19,9 @@
 @author: Neil 'superna' Armstrong 
 """

+from __future__ import print_function
+from __future__ import absolute_import
+
 import string
 import os
 import json
diff --git a/src/python/m5/internal/params.py  
b/src/python/m5/internal/params.py

index ef94ad4..bbf86ce 100644
--- a/src/python/m5/internal/params.py
+++ b/src/python/m5/internal/params.py
@@ -38,6 +38,9 @@
 #
 # Authors: Nathan Binkert

+from __future__ import print_function
+from __future__ import absolute_import
+
 import inspect
 import _m5

diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index d8c0d92..8884c9e 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -54,8 +54,8 @@
 "gem5 is copyrighted software; use the --copyright option for details."

 def parse_options():
-import config
-from options import OptionParser
+from . import config
+from .options import OptionParser

 options = OptionParser(usage=usage, version=version,
description=brief_copyright)
@@ -194,15 +194,15 @@
 def main(*args):
 import m5

-import core
-import debug
-import defines
-import event
-import info
-   

[gem5-dev] Change in gem5/gem5[master]: python: Make exception handling Python 3 safe

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15980



Change subject: python: Make exception handling Python 3 safe
..

python: Make exception handling Python 3 safe

Change-Id: I9c2cdfad20deb1ddfa224320cf93f2105d126652
---
M src/python/importer.py
M src/python/m5/SimObject.py
M src/python/m5/main.py
M src/python/m5/params.py
M src/python/m5/proxy.py
M src/python/m5/simulate.py
M src/python/m5/ticks.py
M src/python/m5/util/__init__.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/convert.py
M src/python/m5/util/grammar.py
M src/python/m5/util/jobfile.py
M src/python/m5/util/multidict.py
13 files changed, 177 insertions(+), 182 deletions(-)



diff --git a/src/python/importer.py b/src/python/importer.py
index fa26080..60b9b35 100644
--- a/src/python/importer.py
+++ b/src/python/importer.py
@@ -35,7 +35,7 @@

 def add_module(self, filename, abspath, modpath, code):
 if modpath in self.modules:
-raise AttributeError, "%s already found in importer" % modpath
+raise AttributeError("%s already found in importer" % modpath)

 self.modules[modpath] = (filename, abspath, code)

diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 44f26ea..97cf6d0 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -483,8 +483,8 @@
 if isinstance(c, MetaSimObject):
 bTotal += 1
 if bTotal > 1:
-raise TypeError, \
-  "SimObjects do not support multiple inheritance"
+raise TypeError(
+  "SimObjects do not support multiple inheritance")

 base = bases[0]

@@ -543,8 +543,8 @@

 def _set_keyword(cls, keyword, val, kwtype):
 if not isinstance(val, kwtype):
-raise TypeError, 'keyword %s has bad type %s (expecting %s)' %  
\

-  (keyword, type(val), kwtype)
+raise TypeError('keyword %s has bad type %s (expecting %s)' % \
+  (keyword, type(val), kwtype))
 if isinstance(val, FunctionType):
 val = classmethod(val)
 type.__setattr__(cls, keyword, val)
@@ -562,7 +562,7 @@
 try:
 hr_value = value
 value = param.convert(value)
-except Exception, e:
+except Exception as e:
 msg = "%s\nError setting param %s.%s to %s\n" % \
   (e, cls.__name__, name, value)
 e.args = (msg, )
@@ -622,10 +622,10 @@
 return

 if isSimObjectOrSequence(value) and cls._instantiated:
-raise RuntimeError, \
+raise RuntimeError(
   "cannot set SimObject parameter '%s' after\n" \
   "class %s has been instantiated or subclassed" \
-  % (attr, cls.__name__)
+  % (attr, cls.__name__))

 # check for param
 param = cls._params.get(attr)
@@ -639,8 +639,8 @@
 return

 # no valid assignment... raise exception
-raise AttributeError, \
-  "Class %s has no parameter \'%s\'" % (cls.__name__, attr)
+raise AttributeError(
+  "Class %s has no parameter \'%s\'" % (cls.__name__, attr))

 def __getattr__(cls, attr):
 if attr == 'cxx_class_path':
@@ -658,8 +658,8 @@
 if cls._children.has_key(attr):
 return cls._children[attr]

-raise AttributeError, \
-  "object '%s' has no attribute '%s'" % (cls.__name__, attr)
+raise AttributeError(
+  "object '%s' has no attribute '%s'" % (cls.__name__, attr))

 def __str__(cls):
 return cls.__name__
@@ -1152,9 +1152,9 @@
 # no memo_dict: must be top-level clone operation.
 # this is only allowed at the root of a hierarchy
 if self._parent:
-raise RuntimeError, "attempt to clone object %s " \
+raise RuntimeError("attempt to clone object %s " \
   "not at the root of a tree (parent = %s)" \
-  % (self, self._parent)
+  % (self, self._parent))
 # create a new dict and use that.
 memo_dict = {}
 kwargs['_memo'] = memo_dict
@@ -1196,7 +1196,7 @@
 err_string += "\n  (C++ object is not yet constructed," \
   " so wrapped C++ methods are unavailable.)"

-raise AttributeError, err_string
+raise AttributeError(err_string)

 # Set attribute (called on foo.attr = value when foo is an
 # instance of class cls).
@@ -1216,7 +1216,7 @@
 try:
 hr_value = value
 value = param.convert(value)
-except Exception, e:
+except Exception as e:
 msg = "%s\nError setting param %s.%s 

[gem5-dev] Change in gem5/gem5[master]: sim: Prepare C++ side for Python 3

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15977



Change subject: sim: Prepare C++ side for Python 3
..

sim: Prepare C++ side for Python 3

Python 3 uses wide strings instead of ordinary strings for many
APIs. Add the necessary conversions to comply with the new API.

Change-Id: I6f45c9c532537d50d54b542f34eb8fd8cb375874
Signed-off-by: Andreas Sandberg 
---
M src/sim/init.cc
M src/sim/main.cc
2 files changed, 26 insertions(+), 1 deletion(-)



diff --git a/src/sim/init.cc b/src/sim/init.cc
index 5061289..66ec408 100644
--- a/src/sim/init.cc
+++ b/src/sim/init.cc
@@ -51,6 +51,7 @@
 #include 
 #include 
 #include 
+#include 

 #include "base/cprintf.hh"
 #include "base/logging.hh"
@@ -249,7 +250,7 @@
  * main function.
  */
 int
-m5Main(int argc, char **argv)
+m5Main(int argc, char **_argv)
 {
 #if HAVE_PROTOBUF
 // Verify that the version of the protobuf library that we linked
@@ -258,6 +259,23 @@
 GOOGLE_PROTOBUF_VERIFY_VERSION;
 #endif

+
+#if PY_MAJOR_VERSION >= 3
+typedef std::unique_ptr WArgUPtr;
+std::vector v_argv;
+std::vector vp_argv;
+v_argv.reserve(argc);
+vp_argv.reserve(argc);
+for (int i = 0; i < argc; i++) {
+v_argv.emplace_back(Py_DecodeLocale(_argv[i], NULL),  
&PyMem_RawFree);

+vp_argv.emplace_back(v_argv.back().get());
+}
+
+wchar_t **argv = vp_argv.data();
+#else
+char **argv = _argv;
+#endif
+
 PySys_SetArgv(argc, argv);

 // We have to set things up in the special __main__ module
diff --git a/src/sim/main.cc b/src/sim/main.cc
index 48b1592..a77c5f5 100644
--- a/src/sim/main.cc
+++ b/src/sim/main.cc
@@ -45,7 +45,14 @@
 // Initialize m5 special signal handling.
 initSignals();

+#if PY_MAJOR_VERSION >= 3
+std::unique_ptr program(
+Py_DecodeLocale(argv[0], NULL),
+&PyMem_RawFree);
+Py_SetProgramName(program.get());
+#else
 Py_SetProgramName(argv[0]);
+#endif

 // initialize embedded Python interpreter
 Py_Initialize();

--
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Gerrit-Branch: master
Gerrit-Change-Id: I6f45c9c532537d50d54b542f34eb8fd8cb375874
Gerrit-Change-Number: 15977
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: tests: Don't override tick rate in Ruby tests

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15975



Change subject: tests: Don't override tick rate in Ruby tests
..

tests: Don't override tick rate in Ruby tests

Most Ruby tests assume that the highest frequency in the system under
test is 1GHz and limits the global tick rate to this frequency. This
assumption is broken since the default Ruby configuration scripts
clock the CPU at 2Ghz, which results in warnings and sometimes
incorrect behaviour.

Change-Id: I4b204660862ce3b0ea4a13df42caacd4398fef8c
Signed-off-by: Andreas Sandberg 
---
M tests/configs/gpu-randomtest-ruby.py
M tests/configs/memtest-ruby.py
M tests/configs/rubytest-ruby.py
M tests/configs/simple-timing-mp-ruby.py
M tests/configs/simple-timing-ruby.py
5 files changed, 0 insertions(+), 15 deletions(-)



diff --git a/tests/configs/gpu-randomtest-ruby.py  
b/tests/configs/gpu-randomtest-ruby.py

index d0a8918..3d088f4 100644
--- a/tests/configs/gpu-randomtest-ruby.py
+++ b/tests/configs/gpu-randomtest-ruby.py
@@ -140,6 +140,3 @@

 root = Root(full_system = False, system = system )
 root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')
diff --git a/tests/configs/memtest-ruby.py b/tests/configs/memtest-ruby.py
index 8b92af4..9cf92af 100644
--- a/tests/configs/memtest-ruby.py
+++ b/tests/configs/memtest-ruby.py
@@ -116,6 +116,3 @@

 root = Root(full_system = False, system = system)
 root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')
diff --git a/tests/configs/rubytest-ruby.py b/tests/configs/rubytest-ruby.py
index 27dc0f2..207f28c 100644
--- a/tests/configs/rubytest-ruby.py
+++ b/tests/configs/rubytest-ruby.py
@@ -125,6 +125,3 @@

 root = Root(full_system = False, system = system )
 root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')
diff --git a/tests/configs/simple-timing-mp-ruby.py  
b/tests/configs/simple-timing-mp-ruby.py

index 897e053..248d046 100644
--- a/tests/configs/simple-timing-mp-ruby.py
+++ b/tests/configs/simple-timing-mp-ruby.py
@@ -93,6 +93,3 @@

 root = Root( full_system=False, system = system )
 root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')
diff --git a/tests/configs/simple-timing-ruby.py  
b/tests/configs/simple-timing-ruby.py

index e76cd39..26ca3e9 100644
--- a/tests/configs/simple-timing-ruby.py
+++ b/tests/configs/simple-timing-ruby.py
@@ -97,6 +97,3 @@

 root = Root(full_system = False, system = system)
 root.system.mem_mode = 'timing'
-
-# Not much point in this being higher than the L1 latency
-m5.ticks.setGlobalFrequency('1ns')

--
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Gerrit-Change-Id: I4b204660862ce3b0ea4a13df42caacd4398fef8c
Gerrit-Change-Number: 15975
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[gem5-dev] Change in gem5/gem5[master]: RFC: python: Make metaclass declarations Python 3 safe

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15982



Change subject: RFC: python: Make metaclass declarations Python 3 safe
..

RFC: python: Make metaclass declarations Python 3 safe

NB: This change turns a couple of assertions into warnings since the
six compatibility code for metaclasses exhibits weird behavior.

Change-Id: I5dea08bf0558cfca57897a124cb131c78114e59e
---
M src/python/m5/SimObject.py
M src/python/m5/params.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/pybind.py
4 files changed, 21 insertions(+), 16 deletions(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 97cf6d0..03d5d3a 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -45,6 +45,8 @@

 from __future__ import print_function

+from six import add_metaclass
+
 import sys
 from types import FunctionType, MethodType, ModuleType
 from functools import wraps
@@ -981,23 +983,23 @@
 out.extend(self[t]._sim_objects)
 else:
 if isinstance(idx, int):
-_range = range(idx, idx + 1)
+_range = list(range(idx, idx + 1))
 elif not isinstance(idx, slice):
 raise SimObjectCliWrapperException( \
 'invalid index type: ' + repr(idx))
 for sim_object in self._sim_objects:
 if isinstance(idx, slice):
-_range = range(*idx.indices(len(sim_object)))
+_range = list(range(*idx.indices(len(sim_object
 out.extend(sim_object[i] for i in _range)
 return SimObjectCliWrapper(out)

 # The SimObject class is the root of the special hierarchy.  Most of
 # the code in this class deals with the configuration hierarchy itself
 # (parent/child node relationships).
+@add_metaclass(MetaSimObject)
 class SimObject(object):
 # Specify metaclass.  Any class inheriting from SimObject will
 # get this metaclass.
-__metaclass__ = MetaSimObject
 type = 'SimObject'
 abstract = True

diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 0a563b8..f8ba076 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -61,6 +61,8 @@

 from __future__ import print_function

+from six import add_metaclass
+
 import copy
 import datetime
 import re
@@ -86,15 +88,17 @@
 class MetaParamValue(type):
 def __new__(mcls, name, bases, dct):
 cls = super(MetaParamValue, mcls).__new__(mcls, name, bases, dct)
-assert name not in allParams
+if name in allParams:
+warn("%s already exists in allParams. This may be caused by  
the " \

+ "Python 2.7 compatibility layer." % (name, ))
 allParams[name] = cls
 return cls


 # Dummy base class to identify types that are legitimate for SimObject
 # parameters.
+@add_metaclass(MetaParamValue)
 class ParamValue(object):
-__metaclass__ = MetaParamValue
 cmd_line_settable = False

 # Generate the code needed as a prerequisite for declaring a C++
@@ -231,8 +235,8 @@
 # that the value is a vector (list) of the specified type instead of a
 # single value.

+@add_metaclass(MetaParamValue)
 class VectorParamValue(list):
-__metaclass__ = MetaParamValue
 def __setattr__(self, attr, value):
 raise AttributeError("Not allowed to set %s on '%s'" % \
  (attr, type(self).__name__))
@@ -533,8 +537,8 @@
 # class is subclassed to generate parameter classes with specific
 # bounds.  Initialization of the min and max bounds is done in the
 # metaclass CheckedIntType.__init__.
+@add_metaclass(CheckedIntType)
 class CheckedInt(NumericParamValue):
-__metaclass__ = CheckedIntType
 cmd_line_settable = True

 def _check(self):
@@ -1367,8 +1371,8 @@


 # Base class for enum types.
+@add_metaclass(MetaEnum)
 class Enum(ParamValue):
-__metaclass__ = MetaEnum
 vals = []
 cmd_line_settable = True

@@ -1707,8 +1711,8 @@
 # make_param_value() above that lets these be assigned where a
 # SimObject is required.
 # only one copy of a particular node
+@add_metaclass(Singleton)
 class NullSimObject(object):
-__metaclass__ = Singleton
 _name = 'Null'

 def __call__(cls):
@@ -2071,9 +2075,8 @@
 # 'Fake' ParamDesc for Port references to assign to the _pdesc slot of
 # proxy objects (via set_param_desc()) so that proxy error messages
 # make sense.
+@add_metaclass(Singleton)
 class PortParamDesc(object):
-__metaclass__ = Singleton
-
 ptype_str = 'Port'
 ptype = Port

diff --git a/src/python/m5/util/code_formatter.py  
b/src/python/m5/util/code_formatter.py

index d48c59b..f47b964 100644
--- a/src/python/m5/util/code_formatter.py
+++ b/src/python/m5/util/code_formatter.py
@@ -25,6 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 from __future_

[gem5-dev] Change in gem5/gem5[master]: python: Replace deprecated repr syntax

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15989



Change subject: python: Replace deprecated repr syntax
..

python: Replace deprecated repr syntax

Change-Id: I5f9538cf2ca5ee17c51e7c5388d3aef363fcfa54
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/util/multidict.py
M src/python/m5/util/sorteddict.py
2 files changed, 3 insertions(+), 3 deletions(-)



diff --git a/src/python/m5/util/multidict.py  
b/src/python/m5/util/multidict.py

index 58898a5..5cc13ee 100644
--- a/src/python/m5/util/multidict.py
+++ b/src/python/m5/util/multidict.py
@@ -40,7 +40,7 @@
 return str(dict(self.items()))

 def __repr__(self):
-return `dict(self.items())`
+return repr(dict(list(self.items(

 def __contains__(self, key):
 return key in self.local or key in self.parent
@@ -175,7 +175,7 @@
 test2.setdefault('b', 'blah')
 print(test1)
 print(test2)
-print(`test2`)
+print(repr(test2))

 print(len(test2))

diff --git a/src/python/m5/util/sorteddict.py  
b/src/python/m5/util/sorteddict.py

index de144a7..d85bef0 100644
--- a/src/python/m5/util/sorteddict.py
+++ b/src/python/m5/util/sorteddict.py
@@ -215,7 +215,7 @@
 d['y'] = 26
 display(d)

-print(`d`)
+print(repr(d))

 print(d.copy())


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[gem5-dev] Change in gem5/gem5[master]: python: Replace DictMixin with Mapping / MutableMapping

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15984



Change subject: python: Replace DictMixin with Mapping / MutableMapping
..

python: Replace DictMixin with Mapping / MutableMapping

Python 3 has removed support for DictMixin, so switch to Mapping /
MutableMapping in collections which provides the same functionality.

Change-Id: I61fbe366d2c9fc6e01b470f82f49cc02b99dec32
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/debug.py
M src/python/m5/util/orderdict.py
2 files changed, 12 insertions(+), 16 deletions(-)



diff --git a/src/python/m5/debug.py b/src/python/m5/debug.py
index f7e34a7..d2892f7 100644
--- a/src/python/m5/debug.py
+++ b/src/python/m5/debug.py
@@ -28,7 +28,7 @@

 from __future__ import print_function

-from UserDict import DictMixin
+from collections import Mapping

 import _m5.debug
 from _m5.debug import SimpleFlag, CompoundFlag
@@ -56,7 +56,7 @@
 printList([ c.name() for c in children ], indent=8)
 print()

-class AllFlags(DictMixin):
+class AllFlags(Mapping):
 def __init__(self):
 self._version = -1
 self._dict = {}
@@ -79,6 +79,14 @@
 self._update()
 return self._dict[item]

+def __iter__(self):
+self._update()
+return iter(self._dict)
+
+def __len__(self):
+self._update()
+return len(self._dict)
+
 def keys(self):
 self._update()
 return self._dict.keys()
@@ -91,16 +99,4 @@
 self._update()
 return self._dict.items()

-def iterkeys(self):
-self._update()
-return self._dict.iterkeys()
-
-def itervalues(self):
-self._update()
-return self._dict.itervalues()
-
-def iteritems(self):
-self._update()
-return self._dict.iteritems()
-
 flags = AllFlags()
diff --git a/src/python/m5/util/orderdict.py  
b/src/python/m5/util/orderdict.py

index 26bc9be..5a32151 100644
--- a/src/python/m5/util/orderdict.py
+++ b/src/python/m5/util/orderdict.py
@@ -31,9 +31,9 @@

 __all__ = [ 'orderdict' ]

-from UserDict import DictMixin
+from collections import MutableMapping

-class orderdict(dict, DictMixin):
+class orderdict(dict, MutableMapping):
 def __init__(self, *args, **kwargs):
 if len(args) > 1:
 raise TypeError("expected at most one argument, got %d" % \

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[gem5-dev] Change in gem5/gem5[master]: python: Switch to using open instead of file

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15985



Change subject: python: Switch to using open instead of file
..

python: Switch to using open instead of file

Python 3 doesn't support the file(name, mode) syntax which has been
deprecated in favour of open.

Change-Id: I35ef8690d97a5243860a64ff985fd22fa86253f1
Signed-off-by: Andreas Sandberg 
---
M src/python/importer.py
M src/python/m5/main.py
M src/python/m5/simulate.py
M src/python/m5/util/code_formatter.py
4 files changed, 6 insertions(+), 5 deletions(-)



diff --git a/src/python/importer.py b/src/python/importer.py
index a5135d3..33ec267 100644
--- a/src/python/importer.py
+++ b/src/python/importer.py
@@ -70,7 +70,7 @@

 override =  
os.environ.get('M5_OVERRIDE_PY_SOURCE', 'false').lower()

 if override in ('true', 'yes') and  os.path.exists(abspath):
-src = file(abspath, 'r').read()
+src = open(abspath, 'rb').read()
 code = compile(src, abspath, 'exec')

 if os.path.basename(srcfile) == '__init__.py':
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index 8884c9e..89a319b 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -407,7 +407,7 @@
 sys.path = [ os.path.dirname(sys.argv[0]) ] + sys.path

 filename = sys.argv[0]
-filedata = file(filename, 'r').read()
+filedata = open(filename, 'r').read()
 filecode = compile(filedata, filename, 'exec')
 scope = { '__file__' : filename,
   '__name__' : '__m5_main__' }
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index dccd774..6f02327 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -92,7 +92,7 @@
 for obj in root.descendants(): obj.unproxyParams()

 if options.dump_config:
-ini_file = file(os.path.join(options.outdir,  
options.dump_config), 'w')
+ini_file = open(os.path.join(options.outdir,  
options.dump_config), 'w')

 # Print ini sections in sorted order for easier diffing
 for obj in sorted(root.descendants(), key=lambda o: o.path()):
 obj.print_ini(ini_file)
@@ -101,7 +101,8 @@
 if options.json_config:
 try:
 import json
-json_file = file(os.path.join(options.outdir,  
options.json_config), 'w')

+json_file = open(
+os.path.join(options.outdir, options.json_config), 'w')
 d = root.get_config_as_dict()
 json.dump(d, json_file, indent=4)
 json_file.close()
diff --git a/src/python/m5/util/code_formatter.py  
b/src/python/m5/util/code_formatter.py

index 5ffc0e0..f556e26 100644
--- a/src/python/m5/util/code_formatter.py
+++ b/src/python/m5/util/code_formatter.py
@@ -154,7 +154,7 @@
 self._data = []

 def write(self, *args):
-f = file(os.path.join(*args), "w")
+f = open(os.path.join(*args), "w")
 for data in self._data:
 f.write(data)
 f.close()

--
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[gem5-dev] Change in gem5/gem5[master]: tests: Add a helper to run external scripts

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15976



Change subject: tests: Add a helper to run external scripts
..

tests: Add a helper to run external scripts

Some tests are really just a wrapper around a test script in
configs/. Add a helper method to wrap these scripts to make sure they
are executed in a consistent environment. This wrapper sets up a
global environment that is identical to that created by main() when it
executes the script. Unlike the old wrappers, it updates the module
search path to make relative imports work correctly in Python 3.

Change-Id: Ie9f81ec4e2689aa8cf5ecb9fc8025d3534b5c9ca
Signed-off-by: Andreas Sandberg 
---
M tests/configs/dram-lowp.py
M tests/configs/learning-gem5-p1-simple.py
M tests/configs/learning-gem5-p1-two-level.py
M tests/configs/memcheck.py
M tests/run.py
5 files changed, 41 insertions(+), 57 deletions(-)



diff --git a/tests/configs/dram-lowp.py b/tests/configs/dram-lowp.py
index 20c774e..5fded83 100644
--- a/tests/configs/dram-lowp.py
+++ b/tests/configs/dram-lowp.py
@@ -50,19 +50,13 @@
 def run_test(root):
 # Called from tests/run.py

-# Set the working directory in case we are executing from
-# outside gem5's source tree
-import os
-os.chdir(os.path.join(os.path.dirname(__file__), "../"))
-
-# The path to this script is the only parameter. Delete it so
-# we can execute the script that we want to execute.
 import sys
-del sys.argv[1:]
-
-# Add a specific page policy and specify the number of ranks
-sys.argv.append('-p%s' % page_policy)
-sys.argv.append('-r 2')
+argv = [
+sys.argv[0],
+# Add a specific page policy and specify the number of  
ranks

+'-p%s' % page_policy,
+'-r 2',
+]

 # Execute the script we are wrapping
-execfile(srcpath('configs/dram/low_power_sweep.py'), globals())
+run_config('dram/low_power_sweep.py', argv=argv)
diff --git a/tests/configs/learning-gem5-p1-simple.py  
b/tests/configs/learning-gem5-p1-simple.py

index 9ad7085..6b76337 100644
--- a/tests/configs/learning-gem5-p1-simple.py
+++ b/tests/configs/learning-gem5-p1-simple.py
@@ -33,12 +33,4 @@
 root = None

 def run_test(root):
-# Called from tests/run.py
-
-# Set the working directory in case we are executing from
-# outside gem5's source tree
-import os
-os.chdir(os.path.join(os.path.dirname(__file__), "../"))
-
-# Execute the script we are wrapping
-execfile(srcpath('configs/learning_gem5/part1/simple.py'))
+run_config('learning_gem5/part1/simple.py')
diff --git a/tests/configs/learning-gem5-p1-two-level.py  
b/tests/configs/learning-gem5-p1-two-level.py

index c0a1e46..5ac85a9 100644
--- a/tests/configs/learning-gem5-p1-two-level.py
+++ b/tests/configs/learning-gem5-p1-two-level.py
@@ -32,27 +32,5 @@
 # For some reason, this is implicitly needed by run.py
 root = None

-import m5
-
 def run_test(root):
-# Called from tests/run.py
-
-
-# Set the working directory in case we are executing from
-# outside gem5's source tree
-import os
-os.chdir(os.path.join(os.path.dirname(__file__), "../"))
-
-# Add paths that we need
-m5.util.addToPath('../configs/learning_gem5/part1')
-m5.util.addToPath('../configs/')
-
-# The path to this script is the only parameter. Delete it so we  
can

-# execute the script that we want to execute.
-import sys
-del sys.argv[1:]
-# Note: at this point, we could add options we want to test.
-# For instance, sys.argv.append('--l2_size=512kB')
-
-# Execute the script we are wrapping
-execfile(srcpath('configs/learning_gem5/part1/two_level.py'))
+run_config('learning_gem5/part1/two_level.py')
diff --git a/tests/configs/memcheck.py b/tests/configs/memcheck.py
index 97f8d13..371af5c 100644
--- a/tests/configs/memcheck.py
+++ b/tests/configs/memcheck.py
@@ -54,18 +54,11 @@
 def run_test(root):
 # Called from tests/run.py

-# Set the working directory in case we are executing from
-# outside gem5's source tree
-import os
-os.chdir(os.path.join(os.path.dirname(__file__), "../"))
-
-# The path to this script is the only parameter. Delete it so
-# we can execute the script that we want to execute.
 import sys
-del sys.argv[1:]
-
-# Add a specific max tick
-sys.argv.append('-m %d' % maxtick)
+argv = [
+sys.argv[0],
+'-m %d' % maxtick,
+]

 # Execute the script we are wrapping
-execfile(srcpath('configs/example/memcheck.py'), globals())
+run_config('example/memcheck.py', argv=argv)

[gem5-dev] Change in gem5/gem5[master]: python: Replace dict.has_key with 'key in dict'

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15987



Change subject: python: Replace dict.has_key with 'key in dict'
..

python: Replace dict.has_key with 'key in dict'

Change-Id: I9852a5f57d672bea815308eb647a0ce45624fad5
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/SimObject.py
M src/python/m5/params.py
M src/python/m5/util/multidict.py
3 files changed, 18 insertions(+), 18 deletions(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 1aa8dbe..722b665 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -537,7 +537,7 @@
 cls._new_port(key, val)

 # init-time-only keywords
-elif cls.init_keywords.has_key(key):
+elif key in cls.init_keywords:
 cls._set_keyword(key, val, cls.init_keywords[key])

 # default: use normal path (ends up in __setattr__)
@@ -616,11 +616,11 @@
 type.__setattr__(cls, attr, value)
 return

-if cls.keywords.has_key(attr):
+if attr in cls.keywords:
 cls._set_keyword(attr, value, cls.keywords[attr])
 return

-if cls._ports.has_key(attr):
+if attr in cls._ports:
 cls._cls_get_port_ref(attr).connect(value)
 return

@@ -655,10 +655,10 @@
 if attr == 'cxx_namespaces':
 return cls.cxx_class_path[:-1]

-if cls._values.has_key(attr):
+if attr in cls._values:
 return cls._values[attr]

-if cls._children.has_key(attr):
+if attr in cls._children:
 return cls._children[attr]

 raise AttributeError(
@@ -1161,7 +1161,7 @@
 # create a new dict and use that.
 memo_dict = {}
 kwargs['_memo'] = memo_dict
-elif memo_dict.has_key(self):
+elif self in memo_dict:
 # clone already done & memoized
 return memo_dict[self]
 return self.__class__(_ancestor = self, **kwargs)
@@ -1177,13 +1177,13 @@
 return ref

 def __getattr__(self, attr):
-if self._ports.has_key(attr):
+if attr in self._ports:
 return self._get_port_ref(attr)

-if self._values.has_key(attr):
+if attr in self._values:
 return self._values[attr]

-if self._children.has_key(attr):
+if attr in self._children:
 return self._children[attr]

 # If the attribute exists on the C++ object, transparently
@@ -1209,7 +1209,7 @@
 object.__setattr__(self, attr, value)
 return

-if self._ports.has_key(attr):
+if attr in self._ports:
 # set up port connection
 self._get_port_ref(attr).connect(value)
 return
@@ -1297,7 +1297,7 @@
 if child.has_parent():
 warn("add_child('%s'): child '%s' already has parent", name,
 child.get_name())
-if self._children.has_key(name):
+if name in self._children:
 # This code path had an undiscovered bug that would make it  
fail

 # at runtime. It had been here for a long time and was only
 # exposed by a buggy script. Changes here will probably not be
diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index f76d7ae..742fb6b 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -161,12 +161,12 @@
 else:
 raise TypeError('too many arguments')

-if kwargs.has_key('desc'):
+if 'desc' in kwargs:
 assert(not hasattr(self, 'desc'))
 self.desc = kwargs['desc']
 del kwargs['desc']

-if kwargs.has_key('default'):
+if 'default' in kwargs:
 assert(not hasattr(self, 'default'))
 self.default = kwargs['default']
 del kwargs['default']
@@ -1228,14 +1228,14 @@
 return cls

 def __init__(cls, name, bases, init_dict):
-if init_dict.has_key('map'):
+if 'map' in init_dict:
 if not isinstance(cls.map, dict):
 raise TypeError("Enum-derived class attribute 'map' " \
   "must be of type dict")
 # build list of value strings from map
 cls.vals = cls.map.keys()
 cls.vals.sort()
-elif init_dict.has_key('vals'):
+elif 'vals' in init_dict:
 if not isinstance(cls.vals, list):
 raise TypeError("Enum-derived class attribute 'vals' " \
   "must be of type list")
@@ -1859,7 +1859,7 @@
   "cannot splice in new peers\n", self)

 def clone(self, simobj, memo):
-if memo.has_key(self):
+if self in memo:
 return memo[self]
 newRef = copy.copy(self)
 memo[self] = newRef
@@ -1982

[gem5-dev] Change in gem5/gem5[master]: python: Remove getCode() type workaround

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15978



Change subject: python: Remove getCode() type workaround
..

python: Remove getCode() type workaround

Python 2.7 requires a workaround when wrapping exit objects to
explicitly convert the return of getCode() to int to not confuse
sys.exit. This workaround isn't needed and doesn't work on Python 3
since it doesn't have a separate long integer type.

Change-Id: I57bc3fd8f4699676c046ece8a52baa2796959ffd
Signed-off-by: Andreas Sandberg 
---
M src/python/pybind11/event.cc
1 file changed, 8 insertions(+), 0 deletions(-)



diff --git a/src/python/pybind11/event.cc b/src/python/pybind11/event.cc
index d2d78fe..a65ddc6 100644
--- a/src/python/pybind11/event.cc
+++ b/src/python/pybind11/event.cc
@@ -135,10 +135,18 @@
std::unique_ptr>(
m, "GlobalSimLoopExitEvent")
 .def("getCause", &GlobalSimLoopExitEvent::getCause)
+#if PY_MAJOR_VERSION >= 3
+.def("getCode", &GlobalSimLoopExitEvent::getCode)
+#else
+// Workaround for an issue where PyBind11 converts the exit
+// code to a long. This is normally fine, but sys.exit treats
+// any non-int type as an error and exits with status 1 if it
+// is passed a long.
 .def("getCode", [](GlobalSimLoopExitEvent *e) {
 return py::reinterpret_steal(
 PyInt_FromLong(e->getCode()));
 })
+#endif
 ;

 // Event base class. These should never be returned directly to

--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I57bc3fd8f4699676c046ece8a52baa2796959ffd
Gerrit-Change-Number: 15978
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[master]: python: Add __bool__ helpers in addition to __nonzero__

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15996



Change subject: python: Add __bool__ helpers in addition to __nonzero__
..

python: Add __bool__ helpers in addition to __nonzero__

Python 3 uses __bool__ instead of __nonzero__ when performing a
Boolean comparison.

Change-Id: I85185bbe136ecae67346fa23569e24edd7329222
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/params.py
M src/python/m5/util/smartdict.py
2 files changed, 7 insertions(+), 0 deletions(-)



diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 9176967..9613994 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -842,6 +842,9 @@
 def __nonzero__(self):
 return bool(self.value)

+def __bool__(self):
+return bool(self.value)
+
 def ini_str(self):
 if self.value:
 return 'true'
diff --git a/src/python/m5/util/smartdict.py  
b/src/python/m5/util/smartdict.py

index 59271af..a5ab08a 100644
--- a/src/python/m5/util/smartdict.py
+++ b/src/python/m5/util/smartdict.py
@@ -62,6 +62,8 @@
 return toFloat(str(self))
 def __nonzero__(self):
 return toBool(str(self))
+def __bool__(self):
+return toBool(str(self))
 def convert(self, other):
 t = type(other)
 if t == bool:
@@ -114,6 +116,8 @@
 zero for boolean truth testing such as in an if statement"""
 def __nonzero__(self):
 return False
+def __bool__(self):
+return False

 class SmartDict(attrdict):
 """Dictionary class that holds strings, but intelligently converts

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Gerrit-Branch: master
Gerrit-Change-Id: I85185bbe136ecae67346fa23569e24edd7329222
Gerrit-Change-Number: 15996
Gerrit-PatchSet: 1
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[gem5-dev] Change in gem5/gem5[master]: python: Remove uses of tuple unpacking in function params

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15991



Change subject: python: Remove uses of tuple unpacking in function params
..

python: Remove uses of tuple unpacking in function params

Python 3 doesn't support tuple unpacking in function parameters and
lambdas.

Change-Id: I36c72962e33a9ad37145089687834be76adb
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/SimObject.py
1 file changed, 2 insertions(+), 2 deletions(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index 099927f..cac74f2 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -686,7 +686,7 @@
 # the object itself, not including inherited params (which
 # will also be inherited from the base class's param struct
 # here). Sort the params based on their key
-params = map(lambda (k, v): v, sorted(cls._params.local.items()))
+params = map(lambda k_v: k_v[1], sorted(cls._params.local.items()))
 ports = cls._ports.local

 code('''#include "pybind11/pybind11.h"
@@ -782,7 +782,7 @@
 # the object itself, not including inherited params (which
 # will also be inherited from the base class's param struct
 # here). Sort the params based on their key
-params = map(lambda (k, v): v, sorted(cls._params.local.items()))
+params = map(lambda k_v: k_v[1], sorted(cls._params.local.items()))
 ports = cls._ports.local
 try:
 ptypes = [p.ptype for p in params]

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Gerrit-Branch: master
Gerrit-Change-Id: I36c72962e33a9ad37145089687834be76adb
Gerrit-Change-Number: 15991
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
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[gem5-dev] Change in gem5/gem5[master]: python: Update use of exec to work with Python 3

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15986



Change subject: python: Update use of exec to work with Python 3
..

python: Update use of exec to work with Python 3

Python 3 uses 'exec(code, globals)' instead of 'exec code in
globals'. Switch to the newer syntax since it is supported by Python
2.7. Also, move check_tracing out of main to work around a bug in
Python 2.7.

Change-Id: I6d390160f58783e1b038a572b64cdf3ff09535fa
Signed-off-by: Andreas Sandberg 
---
M src/python/importer.py
M src/python/m5/internal/params.py
M src/python/m5/main.py
M src/python/m5/objects/__init__.py
M src/python/m5/util/jobfile.py
5 files changed, 18 insertions(+), 17 deletions(-)



diff --git a/src/python/importer.py b/src/python/importer.py
index 33ec267..d7ccda4 100644
--- a/src/python/importer.py
+++ b/src/python/importer.py
@@ -80,7 +80,7 @@
 mod.__package__ = fullname.rpartition('.')[0]
 mod.__file__ = srcfile

-exec code in mod.__dict__
+exec(code, mod.__dict__)
 except Exception:
 del sys.modules[fullname]
 raise
diff --git a/src/python/m5/internal/params.py  
b/src/python/m5/internal/params.py

index bbf86ce..d06851a 100644
--- a/src/python/m5/internal/params.py
+++ b/src/python/m5/internal/params.py
@@ -46,4 +46,4 @@

 for name, module in inspect.getmembers(_m5):
 if name.startswith('param_') or name.startswith('enum_'):
-exec "from _m5.%s import *" % name
+exec("from _m5.%s import *" % name)
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
index 89a319b..0937823 100644
--- a/src/python/m5/main.py
+++ b/src/python/m5/main.py
@@ -148,7 +148,7 @@
 options_file = config.get('options.py')
 if options_file:
 scope = { 'options' : options }
-execfile(options_file, scope)
+exec(compile(open(options_file).read(), options_file, 'exec'),  
scope)


 arguments = options.parse_args()
 return options,arguments
@@ -191,6 +191,13 @@
 # isn't available.
 code.InteractiveConsole(scope).interact(banner)

+
+def _check_tracing():
+if defines.TRACING_ON:
+return
+
+fatal("Tracing is not enabled.  Compile with TRACING_ON")
+
 def main(*args):
 import m5

@@ -213,12 +220,6 @@

 m5.options = options

-def check_tracing():
-if defines.TRACING_ON:
-return
-
-fatal("Tracing is not enabled.  Compile with TRACING_ON")
-
 # Set the main event queue for the main thread.
 event.mainq = event.getEventQueue(0)
 event.setEventQueue(event.mainq)
@@ -279,7 +280,7 @@

 if options.debug_help:
 done = True
-check_tracing()
+_check_tracing()
 debug.help()

 if options.list_sim_objects:
@@ -366,7 +367,7 @@
 debug.schedBreak(int(when))

 if options.debug_flags:
-check_tracing()
+_check_tracing()

 on_flags = []
 off_flags = []
@@ -386,21 +387,21 @@
 debug.flags[flag].enable()

 if options.debug_start:
-check_tracing()
+_check_tracing()
 e = event.create(trace.enable, event.Event.Debug_Enable_Pri)
 event.mainq.schedule(e, options.debug_start)
 else:
 trace.enable()

 if options.debug_end:
-check_tracing()
+_check_tracing()
 e = event.create(trace.disable, event.Event.Debug_Enable_Pri)
 event.mainq.schedule(e, options.debug_end)

 trace.output(options.debug_file)

 for ignore in options.debug_ignore:
-check_tracing()
+_check_tracing()
 trace.ignore(ignore)

 sys.argv = arguments
@@ -432,7 +433,7 @@
 t = t.tb_next
 pdb.interaction(t.tb_frame,t)
 else:
-exec filecode in scope
+exec(filecode, scope)

 # once the script is done
 if options.interactive:
diff --git a/src/python/m5/objects/__init__.py  
b/src/python/m5/objects/__init__.py

index c1b9f1c..b106c6c 100644
--- a/src/python/m5/objects/__init__.py
+++ b/src/python/m5/objects/__init__.py
@@ -39,4 +39,4 @@

 for module in modules.iterkeys():
 if module.startswith('m5.objects.'):
-exec "from %s import *" % module
+exec("from %s import *" % module)
diff --git a/src/python/m5/util/jobfile.py b/src/python/m5/util/jobfile.py
index 492062c..22b7175 100644
--- a/src/python/m5/util/jobfile.py
+++ b/src/python/m5/util/jobfile.py
@@ -418,7 +418,7 @@
 raise AttributeError("Could not find file '%s'" % jobfile)

 data = {}
-execfile(filename, data)
+exec(compile(open(filename).read(), filename, 'exec'), data)
 if 'conf' not in data:
 raise ImportError('cannot import name conf from %s' % jobfile)
 return data['conf']

--
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[gem5-dev] Change in gem5/gem5[master]: python: Stop using basestring to test for strings

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15998



Change subject: python: Stop using basestring to test for strings
..

python: Stop using basestring to test for strings

The base class basestring doesn't exist in Python 3. Use string_types
from six instead.

Change-Id: I7e84903fb7dd4a0af7ae4e9f4ec2e54338f212bb
Signed-off-by: Andreas Sandberg 
---
M src/mem/qos/QoSPolicy.py
M src/mem/slicc/util.py
M src/python/m5/util/grammar.py
3 files changed, 9 insertions(+), 5 deletions(-)



diff --git a/src/mem/qos/QoSPolicy.py b/src/mem/qos/QoSPolicy.py
index 6db04ac..be18cd6 100644
--- a/src/mem/qos/QoSPolicy.py
+++ b/src/mem/qos/QoSPolicy.py
@@ -35,6 +35,8 @@
 #
 # Authors: Giacomo Travaglini

+from six import string_types
+
 from m5.SimObject import *
 from m5.params import *

@@ -71,7 +73,7 @@
 for mprio in self._mpriorities:
 master = mprio[0]
 priority = mprio[1]
-if isinstance(master, basestring):
+if isinstance(master, string_types):
 self.getCCObject().initMasterName(
 master, int(priority))
 else:
@@ -108,7 +110,7 @@
 for mprio in self._mscores:
 master = mprio[0]
 score = mprio[1]
-if isinstance(master, basestring):
+if isinstance(master, string_types):
 self.getCCObject().initMasterName(
 master, float(score))
 else:
diff --git a/src/mem/slicc/util.py b/src/mem/slicc/util.py
index 3a0cf5f..dcb780d 100644
--- a/src/mem/slicc/util.py
+++ b/src/mem/slicc/util.py
@@ -25,6 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 from __future__ import print_function
+from six import string_types

 import os
 import sys
@@ -49,7 +50,7 @@

 class Location(object):
 def __init__(self, filename, lineno, no_warning=False):
-if not isinstance(filename, basestring):
+if not isinstance(filename, string_types):
 raise AttributeError, \
 "filename must be a string, found '%s'" % (type(filename),  
)

 if not isinstance(lineno, (int, long)):
diff --git a/src/python/m5/util/grammar.py b/src/python/m5/util/grammar.py
index bb34298..15902d7 100644
--- a/src/python/m5/util/grammar.py
+++ b/src/python/m5/util/grammar.py
@@ -25,6 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 import os
+from six import string_types

 import ply.lex
 import ply.yacc
@@ -93,7 +94,7 @@
 "'%s' object has no attribute '%s'" % (type(self), attr))

 def parse_string(self, data, source='', debug=None,  
tracking=0):

-if not isinstance(data, basestring):
+if not isinstance(data, string_types):
 raise AttributeError(
 "argument must be a string, was '%s'" % type(f))

@@ -113,7 +114,7 @@
 return result

 def parse_file(self, f, **kwargs):
-if isinstance(f, basestring):
+if isinstance(f, string_types):
 source = f
 f = file(f, 'r')
 elif isinstance(f, file):

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Gerrit-Branch: master
Gerrit-Change-Id: I7e84903fb7dd4a0af7ae4e9f4ec2e54338f212bb
Gerrit-Change-Number: 15998
Gerrit-PatchSet: 1
Gerrit-Owner: Andreas Sandberg 
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[gem5-dev] Change in gem5/gem5[master]: python: Don't assume SimObjects live in the global namespace

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15981



Change subject: python: Don't assume SimObjects live in the global namespace
..

python: Don't assume SimObjects live in the global namespace

The importer in Python 3 doesn't like the way we import SimObjects
from the global namespace. Convert the existing SimObject declarations
to import from m5.objects. As a side-effect, this makes these files
consistent with configuration files.

Change-Id: I11153502b430822130722839e1fa767b82a027aa
Signed-off-by: Andreas Sandberg 
---
M src/arch/alpha/AlphaSystem.py
M src/arch/alpha/AlphaTLB.py
M src/arch/arm/ArmISA.py
M src/arch/arm/ArmNativeTrace.py
M src/arch/arm/ArmPMU.py
M src/arch/arm/ArmSemihosting.py
M src/arch/arm/ArmSystem.py
M src/arch/arm/ArmTLB.py
M src/arch/arm/tracers/TarmacTrace.py
M src/arch/mips/MipsSystem.py
M src/arch/mips/MipsTLB.py
M src/arch/power/PowerTLB.py
M src/arch/riscv/RiscvSystem.py
M src/arch/riscv/RiscvTLB.py
M src/arch/sparc/SparcNativeTrace.py
M src/arch/sparc/SparcSystem.py
M src/arch/sparc/SparcTLB.py
M src/arch/x86/X86LocalApic.py
M src/arch/x86/X86NativeTrace.py
M src/arch/x86/X86System.py
M src/arch/x86/X86TLB.py
M src/base/vnc/Vnc.py
M src/cpu/BaseCPU.py
M src/cpu/CPUTracers.py
M src/cpu/CheckerCPU.py
M src/cpu/DummyChecker.py
M src/cpu/InstPBTrace.py
M src/cpu/kvm/BaseKvmCPU.py
M src/cpu/kvm/X86KvmCPU.py
M src/cpu/minor/MinorCPU.py
M src/cpu/o3/FUPool.py
M src/cpu/o3/FuncUnitConfig.py
M src/cpu/o3/O3CPU.py
M src/cpu/o3/O3Checker.py
M src/cpu/o3/probe/ElasticTrace.py
M src/cpu/o3/probe/SimpleTrace.py
M src/cpu/simple/AtomicSimpleCPU.py
M src/cpu/simple/BaseSimpleCPU.py
M src/cpu/simple/NonCachingSimpleCPU.py
M src/cpu/simple/TimingSimpleCPU.py
M src/cpu/simple/probes/SimPoint.py
M src/cpu/testers/directedtest/RubyDirectedTester.py
M src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.py
M src/cpu/testers/memtest/MemTest.py
M src/cpu/testers/rubytest/RubyTester.py
M src/cpu/testers/traffic_gen/BaseTrafficGen.py
M src/cpu/testers/traffic_gen/PyTrafficGen.py
M src/cpu/testers/traffic_gen/TrafficGen.py
M src/cpu/trace/TraceCPU.py
M src/dev/BadDevice.py
M src/dev/Device.py
M src/dev/Platform.py
M src/dev/alpha/AlphaBackdoor.py
M src/dev/alpha/Tsunami.py
M src/dev/arm/EnergyCtrl.py
M src/dev/arm/FlashDevice.py
M src/dev/arm/Gic.py
M src/dev/arm/NoMali.py
M src/dev/arm/RealView.py
M src/dev/arm/UFSHostDevice.py
M src/dev/arm/VirtIOMMIO.py
M src/dev/i2c/I2C.py
M src/dev/mips/Malta.py
M src/dev/net/Ethernet.py
M src/dev/pci/CopyEngine.py
M src/dev/pci/PciDevice.py
M src/dev/pci/PciHost.py
M src/dev/serial/Terminal.py
M src/dev/serial/Uart.py
M src/dev/sparc/T1000.py
M src/dev/storage/Ide.py
M src/dev/virtio/VirtIO.py
M src/dev/virtio/VirtIO9P.py
M src/dev/virtio/VirtIOBlock.py
M src/dev/virtio/VirtIOConsole.py
M src/dev/x86/Cmos.py
M src/dev/x86/I8042.py
M src/dev/x86/I82094AA.py
M src/dev/x86/I8237.py
M src/dev/x86/I8254.py
M src/dev/x86/I8259.py
M src/dev/x86/Pc.py
M src/dev/x86/PcSpeaker.py
M src/dev/x86/SouthBridge.py
M src/gpu-compute/GPU.py
M src/gpu-compute/LdsState.py
M src/learning_gem5/part2/SimpleCache.py
M src/learning_gem5/part2/SimpleMemobj.py
M src/mem/AbstractMemory.py
M src/mem/AddrMapper.py
M src/mem/Bridge.py
M src/mem/CommMonitor.py
M src/mem/DRAMCtrl.py
M src/mem/ExternalMaster.py
M src/mem/ExternalSlave.py
M src/mem/HMCController.py
M src/mem/MemChecker.py
M src/mem/MemDelay.py
M src/mem/MemObject.py
M src/mem/SerialLink.py
M src/mem/SimpleMemory.py
M src/mem/XBar.py
M src/mem/cache/Cache.py
M src/mem/cache/prefetch/Prefetcher.py
M src/mem/cache/tags/Tags.py
M src/mem/probes/MemFootprintProbe.py
M src/mem/probes/MemTraceProbe.py
M src/mem/probes/StackDistProbe.py
M src/mem/qos/QoSMemCtrl.py
M src/mem/qos/QoSMemSinkCtrl.py
M src/mem/ruby/network/BasicRouter.py
M src/mem/ruby/network/Network.py
M src/mem/ruby/network/garnet2.0/GarnetLink.py
M src/mem/ruby/network/garnet2.0/GarnetNetwork.py
M src/mem/ruby/network/simple/SimpleLink.py
M src/mem/ruby/network/simple/SimpleNetwork.py
M src/mem/ruby/slicc_interface/Controller.py
M src/mem/ruby/structures/LRUReplacementPolicy.py
M src/mem/ruby/structures/PseudoLRUReplacementPolicy.py
M src/mem/ruby/structures/RubyCache.py
M src/mem/ruby/structures/RubyPrefetcher.py
M src/mem/ruby/system/GPUCoalescer.py
M src/mem/ruby/system/RubySystem.py
M src/mem/ruby/system/Sequencer.py
M src/mem/ruby/system/VIPERCoalescer.py
M src/mem/ruby/system/WeightedLRUReplacementPolicy.py
M src/mem/slicc/symbols/StateMachine.py
M src/sim/System.py
M src/sim/TickedObject.py
M src/sim/power/MathExprPowerModel.py
M src/sim/power/ThermalModel.py
131 files changed, 300 insertions(+), 267 deletions(-)



diff --git a/src/arch/alpha/AlphaSystem.py b/src/arch/alpha/AlphaSystem.py
index 1bf3b19..0d76447 100644
--- a/src/arch/alpha/AlphaSystem.py
+++ b/src/arch/alpha/AlphaSystem.py
@@ -28,7 +28,8 @@

 from m5.par

[gem5-dev] Change in gem5/gem5[master]: python: Use __name__ instead of func_name for Py3 compat

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15997



Change subject: python: Use __name__ instead of func_name for Py3 compat
..

python: Use __name__ instead of func_name for Py3 compat

Change-Id: I62a9685b4bce7e9012bc65309fcafe26135fde6d
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/SimObject.py
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index bafa28a..53fb091 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -880,7 +880,7 @@
 """Decorator to export C++ functions to Python"""

 def decorate(func):
-name = func.func_name
+name = func.__name__
 override = kwargs.get("override", False)
 cxx_name = kwargs.get("cxx_name", name)


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Gerrit-Change-Id: I62a9685b4bce7e9012bc65309fcafe26135fde6d
Gerrit-Change-Number: 15997
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[gem5-dev] Change in gem5/gem5[master]: python: Switch from using compare to key in list sort

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15995



Change subject: python: Switch from using compare to key in list sort
..

python: Switch from using compare to key in list sort

Python 3 has deprecated the use of a comparison function in favour of
a key extraction function.

Change-Id: I4b7eab791ecbdfbf7147f57fdbc7cbe8f1de20dd
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/stats/__init__.py
1 file changed, 1 insertion(+), 6 deletions(-)



diff --git a/src/python/m5/stats/__init__.py  
b/src/python/m5/stats/__init__.py

index 10184c2..019c7eb 100644
--- a/src/python/m5/stats/__init__.py
+++ b/src/python/m5/stats/__init__.py
@@ -177,12 +177,7 @@
 if not (stat.flags & flags.display):
 stat.name = "__Stat%06d" % stat.id

-def less(stat1, stat2):
-v1 = stat1.name.split('.')
-v2 = stat2.name.split('.')
-return v1 < v2
-
-stats_list.sort(less)
+stats_list.sort(key=lambda s: s.name.split('.'))
 for stat in stats_list:
 stats_dict[stat.name] = stat
 stat.enable()

--
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[gem5-dev] Change in gem5/gem5[master]: python: Make iterator handling Python 3 compatible

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15992



Change subject: python: Make iterator handling Python 3 compatible
..

python: Make iterator handling Python 3 compatible

Many functions that used to return lists (e.g., dict.items()) now
return iterators and their iterator counterparts (e.g.,
dict.iteritems()) have been removed. Switch calls to the Python 2.7
iterator methods to use the Python 3 equivalent and add explicit list
conversions where necessary.

Change-Id: I0c18114955af8f4932d81fb689a0adb939dafaba
Signed-off-by: Andreas Sandberg 
---
M src/SConscript
M src/cpu/BaseCPU.py
M src/cpu/minor/MinorCPU.py
M src/mem/ruby/network/simple/SimpleNetwork.py
M src/mem/slicc/symbols/Type.py
M src/python/m5/SimObject.py
M src/python/m5/main.py
M src/python/m5/objects/__init__.py
M src/python/m5/options.py
M src/python/m5/params.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/dot_writer.py
M src/python/m5/util/jobfile.py
M src/python/m5/util/multidict.py
M src/python/m5/util/orderdict.py
M src/python/m5/util/smartdict.py
M src/python/m5/util/sorteddict.py
M src/python/m5/util/terminal.py
M src/systemc/tests/tlm/endian_conv/testall.py
19 files changed, 77 insertions(+), 109 deletions(-)



diff --git a/src/SConscript b/src/SConscript
index 74adf3c..987cc37 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -821,7 +821,7 @@

 compileDate = _m5.core.compileDate
 _globals = globals()
-for key,val in _m5.core.__dict__.iteritems():
+for key,val in _m5.core.__dict__.items():
 if key.startswith('flag_'):
 flag = key[5:]
 _globals[flag] = val
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 007c869..60c86a4 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -241,26 +241,26 @@

 def createInterruptController(self):
 if buildEnv['TARGET_ISA'] == 'sparc':
-self.interrupts = [SparcInterrupts() for i in  
xrange(self.numThreads)]
+self.interrupts = [SparcInterrupts() for i in  
range(self.numThreads)]

 elif buildEnv['TARGET_ISA'] == 'alpha':
-self.interrupts = [AlphaInterrupts() for i in  
xrange(self.numThreads)]
+self.interrupts = [AlphaInterrupts() for i in  
range(self.numThreads)]

 elif buildEnv['TARGET_ISA'] == 'x86':
 self.apic_clk_domain = DerivedClockDomain(clk_domain =
   Parent.clk_domain,
   clk_divider = 16)
 self.interrupts = [X86LocalApic(clk_domain =  
self.apic_clk_domain,

pio_addr=0x2000)
-   for i in xrange(self.numThreads)]
+   for i in range(self.numThreads)]
 _localApic = self.interrupts
 elif buildEnv['TARGET_ISA'] == 'mips':
-self.interrupts = [MipsInterrupts() for i in  
xrange(self.numThreads)]
+self.interrupts = [MipsInterrupts() for i in  
range(self.numThreads)]

 elif buildEnv['TARGET_ISA'] == 'arm':
-self.interrupts = [ArmInterrupts() for i in  
xrange(self.numThreads)]
+self.interrupts = [ArmInterrupts() for i in  
range(self.numThreads)]

 elif buildEnv['TARGET_ISA'] == 'power':
-self.interrupts = [PowerInterrupts() for i in  
xrange(self.numThreads)]
+self.interrupts = [PowerInterrupts() for i in  
range(self.numThreads)]

 elif buildEnv['TARGET_ISA'] == 'riscv':
 self.interrupts = \
-[RiscvInterrupts() for i in xrange(self.numThreads)]
+[RiscvInterrupts() for i in range(self.numThreads)]
 else:
 print("Don't know what Interrupt Controller to use for  
ISA %s" %

   buildEnv['TARGET_ISA'])
@@ -318,7 +318,7 @@
 # If no ISAs have been created, assume that the user wants the
 # default ISA.
 if len(self.isa) == 0:
-self.isa = [ default_isa_class() for i in  
xrange(self.numThreads) ]
+self.isa = [ default_isa_class() for i in  
range(self.numThreads) ]

 else:
 if len(self.isa) != int(self.numThreads):
 raise RuntimeError("Number of ISA instances doesn't "
diff --git a/src/cpu/minor/MinorCPU.py b/src/cpu/minor/MinorCPU.py
index bb4df82..ae97f6c 100644
--- a/src/cpu/minor/MinorCPU.py
+++ b/src/cpu/minor/MinorCPU.py
@@ -102,7 +102,7 @@
 def boxOpClass(op_class):
 return MinorOpClass(opClass=op_class)

-return MinorOpClassSet(opClasses=map(boxOpClass, op_classes))
+return MinorOpClassSet(opClasses=[ boxOpClass(o) for o in op_classes ])

 class MinorFU(SimObject):
 type = 'MinorFU'
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.py  
b/src/mem/ruby/network/simple/SimpleNetwork.py

index e7a

[gem5-dev] Change in gem5/gem5[master]: python: Fix Param initialization issue in Python 3

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15990



Change subject: python: Fix Param initialization issue in Python 3
..

python: Fix Param initialization issue in Python 3

When initializing a param with a SimObject NULL pointer, convert()
checks if the 'ptype' attribute has been created and whether the value
is NULL. In that case, it assumes that the object is being
initizalized as a part of SimObject initialization and defers the
conversion. This check is implemented using hasattr() which in turn is
implemented using the __getattr__ implementation that asserts because
all SimObjects haven't been initialized yet.

Implement the check using a lookup in the object's dictionary instead
to prevent the SimObject lookup.

Change-Id: I7367563c4fb71f6d2be541ebdc0be418e9f73d48
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/params.py
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index d6641bd..f1ac344 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -206,7 +206,7 @@
 if isinstance(value, proxy.BaseProxy):
 value.set_param_desc(self)
 return value
-if not hasattr(self, 'ptype') and isNullPointer(value):
+if 'ptype' not in self.__dict__ and isNullPointer(value):
 # deferred evaluation of SimObject; continue to defer if
 # we're just assigning a null pointer
 return value

--
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[gem5-dev] Change in gem5/gem5[master]: python: Fix params/proxy import loop

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15993



Change subject: python: Fix params/proxy import loop
..

python: Fix params/proxy import loop

There is a circular dependency between params and proxy at import
time. This causes issues for Python 3. Add the imports to the specific
methods with the dependencies to make the import happen when the
method is executed instead.

Change-Id: I770112fd3c07c395459e204976942bda3dc7236f
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/params.py
M src/python/m5/proxy.py
2 files changed, 5 insertions(+), 6 deletions(-)



diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index cdc0f9e..9176967 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -77,12 +77,15 @@
 from .util import *

 def isSimObject(*args, **kwargs):
+from . import SimObject
 return SimObject.isSimObject(*args, **kwargs)

 def isSimObjectSequence(*args, **kwargs):
+from . import SimObject
 return SimObject.isSimObjectSequence(*args, **kwargs)

 def isSimObjectClass(*args, **kwargs):
+from . import SimObject
 return SimObject.isSimObjectClass(*args, **kwargs)

 allParams = {}
@@ -181,6 +184,7 @@

 def __getattr__(self, attr):
 if attr == 'ptype':
+from . import SimObject
 ptype = SimObject.allClasses[self.ptype_str]
 assert isSimObjectClass(ptype)
 self.ptype = ptype
@@ -2107,5 +2111,3 @@
'NextEthernetAddr', 'NULL',
'MasterPort', 'SlavePort',
'VectorMasterPort', 'VectorSlavePort']
-
-from . import SimObject
diff --git a/src/python/m5/proxy.py b/src/python/m5/proxy.py
index b7a509b..5128156 100644
--- a/src/python/m5/proxy.py
+++ b/src/python/m5/proxy.py
@@ -53,7 +53,6 @@

 import copy

-from . import params

 class BaseProxy(object):
 def __init__(self, search_self, search_up):
@@ -238,6 +237,7 @@
 return 'all'

 def isproxy(obj):
+from . import params
 if isinstance(obj, (BaseProxy, params.EthernetAddr)):
 return True
 elif isinstance(obj, (list, tuple)):
@@ -267,6 +267,3 @@

 # limit exports on 'from proxy import *'
 __all__ = ['Parent', 'Self']
-
-# see comment on imports at end of __init__.py.
-import params # for EthernetAddr

--
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[gem5-dev] Change in gem5/gem5[master]: python: Add fallbacks for packages that have been renamed

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15994



Change subject: python: Add fallbacks for packages that have been renamed
..

python: Add fallbacks for packages that have been renamed

Python 3 has restructured some packages. Specifically, __builtin__ has
been renamed to builtins and urlparse has been included in urllib.

Change-Id: I81f8f3942471db1043006a36abbad6e5a49e0a43
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/stats/__init__.py
M src/python/m5/util/code_formatter.py
2 files changed, 17 insertions(+), 5 deletions(-)



diff --git a/src/python/m5/stats/__init__.py  
b/src/python/m5/stats/__init__.py

index ba91f22..10184c2 100644
--- a/src/python/m5/stats/__init__.py
+++ b/src/python/m5/stats/__init__.py
@@ -71,7 +71,11 @@

 @wraps(func)
 def wrapper(url):
-from urlparse import parse_qs
+try:
+from urllib.parse import parse_qs
+except ImportError:
+# Python 2 fallback
+from urlparse import parse_qs
 from ast import literal_eval

 qs = parse_qs(url.query, keep_blank_values=True)
@@ -135,7 +139,11 @@

 """

-from urlparse import urlsplit
+try:
+from urllib.parse import urlsplit
+except ImportError:
+# Python 2 fallback
+from urlparse import urlsplit

 parsed = urlsplit(url)

diff --git a/src/python/m5/util/code_formatter.py  
b/src/python/m5/util/code_formatter.py

index 6769adc..9870430 100644
--- a/src/python/m5/util/code_formatter.py
+++ b/src/python/m5/util/code_formatter.py
@@ -27,7 +27,11 @@
 from __future__ import print_function
 from six import add_metaclass

-import __builtin__
+try:
+import builtins
+except ImportError:
+# Python 2 fallback
+import __builtin__ as builtins
 import inspect
 import os
 import re
@@ -67,8 +71,8 @@
 if self.formatter.globals and item in self.frame.f_globals:
 return self.frame.f_globals[item]

-if item in __builtin__.__dict__:
-return __builtin__.__dict__[item]
+if item in builtins.__dict__:
+return builtins.__dict__[item]

 try:
 item = int(item)

--
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[gem5-dev] Change in gem5/gem5[master]: python: Add missing operators to NumericParamValue

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16001



Change subject: python: Add missing operators to NumericParamValue
..

python: Add missing operators to NumericParamValue

Add missing operators to NumericParamValue and ensure that they are
able to work on the underlying value if the right hand side is a
param.

Change-Id: I2bd86662aee9891bbd89aed7ebe20b827b5528bd
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/params.py
1 file changed, 45 insertions(+), 4 deletions(-)



diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 9613994..0899890 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -464,6 +464,10 @@
 # operations in a type-safe way.  e.g., a Latency times an int returns
 # a new Latency object.
 class NumericParamValue(ParamValue):
+@staticmethod
+def unwrap(v):
+return v.value if isinstance(v, NumericParamValue) else v
+
 def __str__(self):
 return str(self.value)

@@ -482,7 +486,7 @@

 def __mul__(self, other):
 newobj = self.__class__(self)
-newobj.value *= other
+newobj.value *= NumericParamValue.unwrap(other)
 newobj._check()
 return newobj

@@ -490,16 +494,53 @@

 def __div__(self, other):
 newobj = self.__class__(self)
-newobj.value /= other
+newobj.value /= NumericParamValue.unwrap(other)
 newobj._check()
 return newobj

-def __sub__(self, other):
+__truediv__ = __div__
+
+def __floordiv__(self, other):
 newobj = self.__class__(self)
-newobj.value -= other
+newobj.value //= NumericParamValue.unwrap(other)
 newobj._check()
 return newobj

+
+def __sub__(self, other):
+newobj = self.__class__(self)
+newobj.value -= NumericParamValue.unwrap(other)
+newobj._check()
+return newobj
+
+def __iadd__(self, other):
+self.value += NumericParamValue.unwrap(other)
+self._check()
+return self
+
+def __isub__(self, other):
+self.value += NumericParamValue.unwrap(other)
+self._check()
+return self
+
+def __imul__(self, other):
+self.value *= NumericParamValue.unwrap(other)
+self._check()
+return self
+
+def __itruediv__(self, other):
+self.value /= NumericParamValue.unwrap(other)
+self._check()
+return self
+
+def __ifloordiv__(self, other):
+self.value //= NumericParamValue.unwrap(other)
+self._check()
+return self
+
+def __lt__(self, other):
+return self.value < NumericParamValue.unwrap(other)
+
 def config_value(self):
 return self.value


--
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[gem5-dev] Change in gem5/gem5[master]: tests: Update test scripts to work with Python 3

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15999



Change subject: tests: Update test scripts to work with Python 3
..

tests: Update test scripts to work with Python 3

Change-Id: I71b1e595765fed9e9f234c9722c33ac5348d4f11
Signed-off-by: Andreas Sandberg 
---
M tests/configs/base_config.py
M tests/configs/gpu-ruby.py
M tests/configs/memtest-filter.py
M tests/configs/memtest-ruby.py
M tests/configs/memtest.py
M tests/configs/o3-timing-mp-ruby.py
M tests/configs/pc-simple-timing-ruby.py
M tests/configs/simple-atomic-mp-ruby.py
M tests/configs/simple-timing-mp-ruby.py
M tests/configs/t1000-simple-atomic.py
M tests/legacy-configs/run.py
M tests/run.py
12 files changed, 22 insertions(+), 18 deletions(-)



diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py
index e099633..2bed5f6 100644
--- a/tests/configs/base_config.py
+++ b/tests/configs/base_config.py
@@ -288,7 +288,7 @@
response_latency = 20,
tgts_per_mshr = 8)
   for r in system.mem_ranges]
-for i in xrange(len(system.physmem)):
+for i in range(len(system.physmem)):
 system.physmem[i].port = system.llc[i].mem_side
 system.llc[i].cpu_side = system.membus.master

diff --git a/tests/configs/gpu-ruby.py b/tests/configs/gpu-ruby.py
index e846dba..155775a 100644
--- a/tests/configs/gpu-ruby.py
+++ b/tests/configs/gpu-ruby.py
@@ -197,7 +197,7 @@

 # List of compute units; one GPU can have multiple compute units
 compute_units = []
-for i in xrange(n_cu):
+for i in range(n_cu):
 compute_units.append(ComputeUnit(cu_id = i, perLaneTLB = per_lane,
  num_SIMDs = options.simds_per_cu,
  wfSize = options.wf_size,
@@ -227,8 +227,8 @@

options.ldsBankConflictPenalty)))

 wavefronts = []
 vrfs = []
-for j in xrange(options.simds_per_cu):
-for k in xrange(shader.n_wf):
+for j in range(options.simds_per_cu):
+for k in range(int(shader.n_wf)):
 wavefronts.append(Wavefront(simdId = j, wf_slot_id = k))
 vrfs.append(VectorRegisterFile(simd_id=j,
   num_regs_per_simd=options.vreg_file_size))
@@ -308,15 +308,15 @@
 gpu_port_idx = gpu_port_idx - options.num_cp * 2

 wavefront_size = options.wf_size
-for i in xrange(n_cu):
+for i in range(n_cu):
 # The pipeline issues wavefront_size number of uncoalesced requests
 # in one GPU issue cycle. Hence wavefront_size mem ports.
-for j in xrange(wavefront_size):
+for j in range(wavefront_size):
 system.cpu[shader_idx].CUs[i].memory_port[j] = \
   system.ruby._cpu_ports[gpu_port_idx].slave[j]
 gpu_port_idx += 1

-for i in xrange(n_cu):
+for i in range(n_cu):
 if i > 0 and not i % options.cu_per_sqc:
 gpu_port_idx += 1
 system.cpu[shader_idx].CUs[i].sqc_port = \
diff --git a/tests/configs/memtest-filter.py  
b/tests/configs/memtest-filter.py

index 90ad042..56297d2 100644
--- a/tests/configs/memtest-filter.py
+++ b/tests/configs/memtest-filter.py
@@ -33,7 +33,7 @@

 #MAX CORES IS 8 with the fals sharing method
 nb_cores = 8
-cpus = [ MemTest() for i in xrange(nb_cores) ]
+cpus = [ MemTest() for i in range(nb_cores) ]

 # system simulated
 system = System(cpu = cpus,
diff --git a/tests/configs/memtest-ruby.py b/tests/configs/memtest-ruby.py
index 9cf92af..5947c80 100644
--- a/tests/configs/memtest-ruby.py
+++ b/tests/configs/memtest-ruby.py
@@ -66,7 +66,7 @@
 # ruby does not support atomic, functional, or uncacheable accesses
 cpus = [ MemTest(percent_functional=50,
  percent_uncacheable=0, suppress_func_warnings=True) \
- for i in xrange(nb_cores) ]
+ for i in range(nb_cores) ]

 # overwrite options.num_cpus with the nb_cores value
 options.num_cpus = nb_cores
diff --git a/tests/configs/memtest.py b/tests/configs/memtest.py
index db7a5ef..959ec4e 100644
--- a/tests/configs/memtest.py
+++ b/tests/configs/memtest.py
@@ -33,7 +33,7 @@

 #MAX CORES IS 8 with the fals sharing method
 nb_cores = 8
-cpus = [ MemTest() for i in xrange(nb_cores) ]
+cpus = [ MemTest() for i in range(nb_cores) ]

 # system simulated
 system = System(cpu = cpus,
diff --git a/tests/configs/o3-timing-mp-ruby.py  
b/tests/configs/o3-timing-mp-ruby.py

index 9248b08..90319d1 100644
--- a/tests/configs/o3-timing-mp-ruby.py
+++ b/tests/configs/o3-timing-mp-ruby.py
@@ -30,7 +30,7 @@
 from m5.objects import *

 nb_cores = 4
-cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ]
+cpus = [ DerivO3CPU(cpu_id=i) for i in range(nb_cores) ]

 import ruby_config
 ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb",  
nb_cores)
diff --git a/tests/configs/pc-

[gem5-dev] Change in gem5/gem5[master]: python: Fix param -> int conversion issues

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16000



Change subject: python: Fix param -> int conversion issues
..

python: Fix param -> int conversion issues

Python 3 doesn't convert params to integers automatically. Add
explicit conversions where necessary.

Change-Id: I2de6c9906d3bb7616f12ada6728b9e4b1928511c
Signed-off-by: Andreas Sandberg 
---
M src/cpu/BaseCPU.py
1 file changed, 12 insertions(+), 10 deletions(-)



diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index 60c86a4..d34a033 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -240,27 +240,28 @@
 _uncached_master_ports += ["interrupts[0].int_master"]

 def createInterruptController(self):
+nthreads = int(self.numThreads)
 if buildEnv['TARGET_ISA'] == 'sparc':
-self.interrupts = [SparcInterrupts() for i in  
range(self.numThreads)]

+self.interrupts = [SparcInterrupts() for i in range(nthreads)]
 elif buildEnv['TARGET_ISA'] == 'alpha':
-self.interrupts = [AlphaInterrupts() for i in  
range(self.numThreads)]

+self.interrupts = [AlphaInterrupts() for i in range(nthreads)]
 elif buildEnv['TARGET_ISA'] == 'x86':
 self.apic_clk_domain = DerivedClockDomain(clk_domain =
   Parent.clk_domain,
   clk_divider = 16)
 self.interrupts = [X86LocalApic(clk_domain =  
self.apic_clk_domain,

pio_addr=0x2000)
-   for i in range(self.numThreads)]
+   for i in range(nthreads)]
 _localApic = self.interrupts
 elif buildEnv['TARGET_ISA'] == 'mips':
-self.interrupts = [MipsInterrupts() for i in  
range(self.numThreads)]

+self.interrupts = [MipsInterrupts() for i in range(nthreads)]
 elif buildEnv['TARGET_ISA'] == 'arm':
-self.interrupts = [ArmInterrupts() for i in  
range(self.numThreads)]

+self.interrupts = [ArmInterrupts() for i in range(nthreads)]
 elif buildEnv['TARGET_ISA'] == 'power':
-self.interrupts = [PowerInterrupts() for i in  
range(self.numThreads)]

+self.interrupts = [PowerInterrupts() for i in range(nthreads)]
 elif buildEnv['TARGET_ISA'] == 'riscv':
 self.interrupts = \
-[RiscvInterrupts() for i in range(self.numThreads)]
+[RiscvInterrupts() for i in range(nthreads)]
 else:
 print("Don't know what Interrupt Controller to use for  
ISA %s" %

   buildEnv['TARGET_ISA'])
@@ -315,12 +316,13 @@
 self._cached_ports = ['l2cache.mem_side']

 def createThreads(self):
+nthreads = int(self.numThreads)
 # If no ISAs have been created, assume that the user wants the
 # default ISA.
 if len(self.isa) == 0:
-self.isa = [ default_isa_class() for i in  
range(self.numThreads) ]

+self.isa = [ default_isa_class() for i in range(nthreads) ]
 else:
-if len(self.isa) != int(self.numThreads):
+if len(self.isa) != nthreads:
 raise RuntimeError("Number of ISA instances doesn't "
"match thread count")
 if self.checker != NULL:
@@ -365,7 +367,7 @@
 warn("Platform not found for device tree generation; " \
  "system or multiple CPUs may not start")

-freq = round(self.clk_domain.unproxy(self).clock[0].frequency)
+freq = int(self.clk_domain.unproxy(self).clock[0].frequency)
 node.append(FdtPropertyWords("clock-frequency", freq))

 # Unique key for this CPU

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[gem5-dev] Change in gem5/gem5[master]: python: Enforce absolute imports for Python 3 compatibility

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded a new patch set (#2). (  
https://gem5-review.googlesource.com/c/public/gem5/+/15983 )


Change subject: python: Enforce absolute imports for Python 3 compatibility
..

python: Enforce absolute imports for Python 3 compatibility

Change-Id: Ia88d7fd472f7aed9b97df81468211384981bf6c6
Signed-off-by: Andreas Sandberg 
---
M src/python/importer.py
M src/python/m5/SimObject.py
M src/python/m5/__init__.py
M src/python/m5/core.py
M src/python/m5/ext/__init__.py
M src/python/m5/ext/pyfdt/pyfdt.py
M src/python/m5/internal/params.py
M src/python/m5/main.py
M src/python/m5/objects/__init__.py
M src/python/m5/options.py
M src/python/m5/params.py
M src/python/m5/proxy.py
M src/python/m5/simulate.py
M src/python/m5/trace.py
M src/python/m5/util/__init__.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/dot_writer.py
M src/python/m5/util/jobfile.py
M src/python/m5/util/orderdict.py
M src/python/m5/util/pybind.py
M src/python/m5/util/smartdict.py
M src/python/m5/util/sorteddict.py
M src/python/m5/util/terminal.py
23 files changed, 87 insertions(+), 42 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: RFC: scons: Add hackish support for Python 3.5

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16003



Change subject: RFC: scons: Add hackish support for Python 3.5
..

RFC: scons: Add hackish support for Python 3.5

Build gem5 with Python 3.5. This requires that code is marshalled
using a custom script that is executed using Python 3.5 rather than
Python 2.7 (as used by scons).

Proper support for Python 3.x would require:

  * A build-time switch to build gem5 with Python 3 instead of
Python 2. Python 2 should be the default for the time being.

  * Proper auto-detection of the Python 3 config to use. We should
probably use python3-config instead of python3.5-config. We also
need to ensure that we are using at least version 3.5 since we
depend on the wide char conversion routines introduced in 3.5.

  * A custom binary to marshal code. This hack uses a Python script
that uses python3.5 as the interpreter. We need to make sure that
we use the same version as the gem5 binary. The best way to
accomplish this is to build a separate helper that links with the
right Python library.

Change-Id: I1f4c00d66f85a9c99f50fe4d746b69dd82b60b4b
Signed-off-by: Andreas Sandberg 
---
M SConstruct
M src/SConscript
A src/marshall.py
3 files changed, 18 insertions(+), 5 deletions(-)



diff --git a/SConstruct b/SConstruct
index 5c8f649..5836d08 100755
--- a/SConstruct
+++ b/SConstruct
@@ -704,7 +704,7 @@
 # scons with the appropriate PATH set.
 #
 # First we check if python2-config exists, else we use python-config
-python_config = readCommand(['which', 'python2-config'],
+python_config = readCommand(['which', 'python3.5-config'],
 exception='').strip()
 if not os.path.exists(python_config):
 python_config = readCommand(['which', 'python-config'],
diff --git a/src/SConscript b/src/SConscript
index 987cc37..7cf6ccb 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -1136,15 +1136,14 @@
 return "0"
 return '"%s"' % string

+from m5.util import compareVersions, readCommand
+
 '''Action function to compile a .py into a code object, marshal
 it, compress it, and stick it into an asm file so the code appears
 as just bytes with a label in the data section'''

-src = file(str(source[0]), 'r').read()
-
 pysource = PySource.tnodes[source[0]]
-compiled = compile(src, pysource.abspath, 'exec')
-marshalled = marshal.dumps(compiled)
+marshalled = readCommand(['./src/marshall.py', str(source[0])])
 compressed = zlib.compress(marshalled)
 data = compressed
 sym = pysource.symname
diff --git a/src/marshall.py b/src/marshall.py
new file mode 100755
index 000..dae4430
--- /dev/null
+++ b/src/marshall.py
@@ -0,0 +1,14 @@
+#!/usr/bin/env python3.5
+
+import marshal
+import sys
+
+source = sys.argv[1]
+
+with open(source, 'r') as f:
+src = f.read()
+
+compiled = compile(src, source, 'exec')
+marshalled = marshal.dumps(compiled)
+
+sys.stdout.buffer.write(marshal.dumps(compiled))

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[gem5-dev] Change in gem5/gem5[master]: RFC: python: Fix unproxying issues

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16004



Change subject: RFC: python: Fix unproxying issues
..

RFC: python: Fix unproxying issues

There are cases where the proxies get confused by certain constructs
where a proxy resolves to a proxy. In particular this seems to be
triggered when a Self proxy resolves to a proxy in the same object
(e.g., in the GIC). It seems like this bug depends on the graph
traversal order and it seems like it is only exposed in Python 3.

I have no idea if this change actually makes any sense, but it seems
to solve the issue for now.

Change-Id: Iea12cc138765e70bfd6bb776b1efa012364db066
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/proxy.py
1 file changed, 5 insertions(+), 3 deletions(-)



diff --git a/src/python/m5/proxy.py b/src/python/m5/proxy.py
index 5128156..d289545 100644
--- a/src/python/m5/proxy.py
+++ b/src/python/m5/proxy.py
@@ -187,13 +187,15 @@
 if hasattr(val, '_visited'):
 visited = getattr(val, '_visited')

-if not visited:
+if visited:
+return None, False
+
+if not isproxy(val):
 # for any additional unproxying to be done, pass the
 # current, rather than the original object so that proxy
 # has the right context
 obj = val
-else:
-return None, False
+
 except:
 return None, False
 while isproxy(val):

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[gem5-dev] Change in gem5/gem5[master]: tests: Add a helper to run external scripts

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded a new patch set (#2). (  
https://gem5-review.googlesource.com/c/public/gem5/+/15976 )


Change subject: tests: Add a helper to run external scripts
..

tests: Add a helper to run external scripts

Some tests are really just a wrapper around a test script in
configs/. Add a helper method to wrap these scripts to make sure they
are executed in a consistent environment. This wrapper sets up a
global environment that is identical to that created by main() when it
executes the script. Unlike the old wrappers, it updates the module
search path to make relative imports work correctly in Python 3.

Change-Id: Ie9f81ec4e2689aa8cf5ecb9fc8025d3534b5c9ca
Signed-off-by: Andreas Sandberg 
---
M tests/configs/dram-lowp.py
M tests/configs/learning-gem5-p1-simple.py
M tests/configs/learning-gem5-p1-two-level.py
M tests/configs/memcheck.py
M tests/run.py
5 files changed, 40 insertions(+), 57 deletions(-)


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Gerrit-Change-Number: 15976
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Gerrit-Owner: Andreas Sandberg 
Gerrit-CC: Jason Lowe-Power 
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[gem5-dev] Change in gem5/gem5[master]: python: Add Python 3 workarounds for long

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded a new patch set (#2). (  
https://gem5-review.googlesource.com/c/public/gem5/+/15988 )


Change subject: python: Add Python 3 workarounds for long
..

python: Add Python 3 workarounds for long

Python 3 doesn't have a separate long type. Make long an alias for int
where needed to maintain compatibility.

Change-Id: I4c0861302bc3a2fa5226b3041803ef975d29b2fd
Signed-off-by: Andreas Sandberg 
---
M src/python/m5/SimObject.py
M src/python/m5/params.py
M src/python/m5/proxy.py
M src/python/m5/ticks.py
M src/python/m5/util/convert.py
M src/python/m5/util/fdthelper.py
M src/python/m5/util/smartdict.py
7 files changed, 23 insertions(+), 0 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: RFC: python: Make metaclass declarations Python 3 safe

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded a new patch set (#2). (  
https://gem5-review.googlesource.com/c/public/gem5/+/15982 )


Change subject: RFC: python: Make metaclass declarations Python 3 safe
..

RFC: python: Make metaclass declarations Python 3 safe

NB: This change turns a couple of assertions into warnings since the
six compatibility code for metaclasses exhibits weird behavior.

Change-Id: I5dea08bf0558cfca57897a124cb131c78114e59e
---
M src/python/m5/SimObject.py
M src/python/m5/params.py
M src/python/m5/util/code_formatter.py
M src/python/m5/util/pybind.py
4 files changed, 16 insertions(+), 13 deletions(-)


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[gem5-dev] Change in gem5/gem5[master]: WIP: configs: Make example configs to Python 3 compliant

[Andreas Sandberg (Gerrit)]

Andreas Sandberg has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/16002



Change subject: WIP: configs: Make example configs to Python 3 compliant
..

WIP: configs: Make example configs to Python 3 compliant

This change currently introduces issues for Python 2.7. Only use it if
you want to test gem5 with Python 3.

Change-Id: Idcea8482b286779fc98b4e144ca8f54069c08024
Signed-off-by: Andreas Sandberg 
---
M configs/common/BPConfig.py
M configs/common/Benchmarks.py
M configs/common/CacheConfig.py
M configs/common/Caches.py
M configs/common/CpuConfig.py
M configs/common/FSConfig.py
M configs/common/GPUTLBConfig.py
M configs/common/GPUTLBOptions.py
M configs/common/HMC.py
M configs/common/MemConfig.py
M configs/common/Options.py
M configs/common/PlatformConfig.py
M configs/common/SimpleOpts.py
M configs/common/Simulation.py
M configs/common/SysPaths.py
M configs/common/__init__.py
M configs/common/cores/__init__.py
M configs/common/cores/arm/HPI.py
M configs/common/cores/arm/O3_ARM_v7a.py
M configs/common/cores/arm/__init__.py
M configs/common/cores/arm/ex5_LITTLE.py
M configs/common/cores/arm/ex5_big.py
M configs/common/cpu2000.py
M configs/dist/sw.py
M configs/dram/lat_mem_rd.py
M configs/dram/low_power_sweep.py
M configs/dram/sweep.py
M configs/example/apu_se.py
M configs/example/arm/devices.py
M configs/example/arm/dist_bigLITTLE.py
M configs/example/arm/fs_bigLITTLE.py
M configs/example/arm/fs_power.py
M configs/example/arm/starter_fs.py
M configs/example/arm/starter_se.py
M configs/example/etrace_replay.py
M configs/example/fs.py
M configs/example/garnet_synth_traffic.py
M configs/example/hmc_hello.py
M configs/example/hmctest.py
M configs/example/memcheck.py
M configs/example/memtest.py
M configs/example/read_config.py
M configs/example/ruby_direct_test.py
M configs/example/ruby_gpu_random_test.py
M configs/example/ruby_mem_test.py
M configs/example/ruby_random_test.py
M configs/example/se.py
M configs/learning_gem5/part1/caches.py
M configs/learning_gem5/part1/simple.py
M configs/learning_gem5/part1/two_level.py
M configs/learning_gem5/part2/hello_goodbye.py
M configs/learning_gem5/part2/run_simple.py
M configs/learning_gem5/part2/simple_cache.py
M configs/learning_gem5/part2/simple_memobj.py
M configs/learning_gem5/part3/msi_caches.py
M configs/learning_gem5/part3/ruby_caches_MI_example.py
M configs/learning_gem5/part3/ruby_test.py
M configs/learning_gem5/part3/simple_ruby.py
M configs/learning_gem5/part3/test_caches.py
M configs/network/Network.py
M configs/network/__init__.py
M configs/ruby/AMD_Base_Constructor.py
M configs/ruby/GPU_RfO.py
M configs/ruby/GPU_VIPER.py
M configs/ruby/GPU_VIPER_Baseline.py
M configs/ruby/GPU_VIPER_Region.py
M configs/ruby/Garnet_standalone.py
M configs/ruby/MESI_Three_Level.py
M configs/ruby/MESI_Two_Level.py
M configs/ruby/MI_example.py
M configs/ruby/MOESI_AMD_Base.py
M configs/ruby/MOESI_CMP_directory.py
M configs/ruby/MOESI_CMP_token.py
M configs/ruby/MOESI_hammer.py
M configs/ruby/Ruby.py
M configs/splash2/cluster.py
M configs/splash2/run.py
M configs/topologies/BaseTopology.py
M configs/topologies/Cluster.py
M configs/topologies/Crossbar.py
M configs/topologies/CrossbarGarnet.py
M configs/topologies/MeshDirCorners_XY.py
M configs/topologies/Mesh_XY.py
M configs/topologies/Mesh_westfirst.py
M configs/topologies/Pt2Pt.py
M configs/topologies/__init__.py
86 files changed, 349 insertions(+), 196 deletions(-)



diff --git a/configs/common/BPConfig.py b/configs/common/BPConfig.py
index 5e5b92f..65e6d65 100644
--- a/configs/common/BPConfig.py
+++ b/configs/common/BPConfig.py
@@ -30,6 +30,7 @@
 # hanle branch predictors instead of memory controllers / CPUs

 from __future__ import print_function
+from __future__ import absolute_import

 from m5 import fatal
 import m5.objects
@@ -79,7 +80,7 @@

 def bp_names():
 """Return a list of valid Branch Predictor names."""
-return _bp_classes.keys()
+return list(_bp_classes.keys())

 # Add all BPs in the object hierarchy.
 for name, cls in inspect.getmembers(m5.objects, is_bp_class):
diff --git a/configs/common/Benchmarks.py b/configs/common/Benchmarks.py
index b7d10b5..3cf963b 100644
--- a/configs/common/Benchmarks.py
+++ b/configs/common/Benchmarks.py
@@ -27,8 +27,9 @@
 # Authors: Ali Saidi

 from __future__ import print_function
+from __future__ import absolute_import

-from SysPaths import script, disk, binary
+from .SysPaths import script, disk, binary
 from os import environ as env
 from m5.defines import buildEnv

@@ -141,6 +142,6 @@
 None, 'android-ics')]
 }

-benchs = Benchmarks.keys()
+benchs = list(Benchmarks.keys())
 benchs.sort()
 DefinedBenchmarks = ", ".join(benchs)
diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py
index 3fa3676..ab9d267 100644
--- a/configs/common/CacheConfig.py
+++ b/configs/common/CacheConfig.py
@@ -42,10 +42,11 @@
 #

Re: [gem5-dev] Running AMD GPU

[Gutierrez, Anthony]

That benchmark was for HSAIL ISA, and therefore doesn't run with the GCN3 ISA.

I removed that test from our repo 
(https://gem5.googlesource.com/amd/gem5/+/b021dd69fef50a0ccd8883d65225af9ff8bb6682).
 Currently we provide no benchmarks that run out of the box on the APU model.

Tony

-Original Message-
From: gem5-dev  On Behalf Of Krishna Subramanian
Sent: Friday, January 25, 2019 1:41 PM
To: gem5-dev@gem5.org
Subject: [gem5-dev] Running AMD GPU

Hi

I am trying to run the GCN3 in gem5 as mentioned in the gem5 webpage. I have 
built it successfully. However when i try to run a program *GPU-Hello* using 
the command

./build/GCN3_X86/gem5.opt configs/example/apu_se.py -c 
tests/test-progs/gpu-hello/bin/x86/lnux/gpu-hello

It starts the execution and then shows an error *Failed to open /dev/hsa. * No 
traceback , nothing.

Your help is appreciated.
Best
Krishna Subramanian
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[gem5-dev] Experimental Python 3 support

[Andreas Sandberg]

Hi Everyone,

I managed to find some time to do some gem5 hacking recently and decided
it would be interesting to see what it would take to get gem5 to work
with Python 3. It turns out it doesn't take that much work to get most
things to work. I got to a point where thins seem to work, at least the
quick regressions.

The tip of the WIP patch set is change 16004 [1]. After applying the
whole patch set, gem5 works with Python 3.5, but no longer with Python
2.7 due to issues with the example configurations (this change has been
marked as WIP). There are some known issues outlined in the RFC/WIP
changes, but the other changes work with both Python 2 and 3.

Cheers,
Andreas

[1] https://gem5-review.googlesource.com/c/public/gem5/+/16004


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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Enable support for riscv 32-bit in SE mode.

[Austin Harris (Gerrit)]

Hello Gabe Black, Jason Lowe-Power, Alec Roelke, Brandon Potter,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15355

to look at the new patch set (#3).

Change subject: arch-riscv: Enable support for riscv 32-bit in SE mode.
..

arch-riscv: Enable support for riscv 32-bit in SE mode.

This patch splits up the riscv SE mode support for 32 and 64-bit.
A future patch will add support for decoding rv32 instructions.

Change-Id: Ia79ae19f753caf94dc7e5830a6630efb94b419d7
---
M src/arch/riscv/linux/linux.cc
M src/arch/riscv/linux/linux.hh
M src/arch/riscv/linux/process.cc
M src/arch/riscv/linux/process.hh
M src/arch/riscv/process.cc
M src/arch/riscv/process.hh
M src/arch/riscv/types.hh
M src/base/loader/elf_object.cc
M src/base/loader/object_file.hh
M src/sim/process.cc
10 files changed, 685 insertions(+), 84 deletions(-)


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Gerrit-Change-Number: 15355
Gerrit-PatchSet: 3
Gerrit-Owner: Austin Harris 
Gerrit-Reviewer: Alec Roelke 
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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Enable support for riscv 32-bit in SE mode.

[Austin Harris (Gerrit)]

Hello Gabe Black, Jason Lowe-Power, Alec Roelke, Brandon Potter,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15355

to look at the new patch set (#4).

Change subject: arch-riscv: Enable support for riscv 32-bit in SE mode.
..

arch-riscv: Enable support for riscv 32-bit in SE mode.

This patch splits up the riscv SE mode support for 32 and 64-bit.
A future patch will add support for decoding rv32 instructions.

Change-Id: Ia79ae19f753caf94dc7e5830a6630efb94b419d7
---
M src/arch/riscv/linux/linux.cc
M src/arch/riscv/linux/linux.hh
M src/arch/riscv/linux/process.cc
M src/arch/riscv/linux/process.hh
M src/arch/riscv/process.cc
M src/arch/riscv/process.hh
M src/arch/riscv/types.hh
M src/base/loader/elf_object.cc
M src/base/loader/object_file.hh
M src/sim/process.cc
10 files changed, 684 insertions(+), 84 deletions(-)


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Gerrit-Change-Number: 15355
Gerrit-PatchSet: 4
Gerrit-Owner: Austin Harris 
Gerrit-Reviewer: Alec Roelke 
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Re: [gem5-dev] Running AMD GPU

[Krishna Subramanian]

Hi Mr.Gutierrez

Thank you for your time. If suppose i wanted to implement the same *gpu-hello
*in the HSAIL ISA , the command would simply be :
*./build/HSAIL_X86/gem5.opt configs/example/apu_se.py -c
tests/test-progs/gpu-hello/bin**/x86/linux/gpu-hello*

This should work right ? However i get the following error :




























































*$:/scratch/gems/gem5$ ./build/HSAIL_X86/gem5.opt configs/example/apu_se.py
-c tests/test-progs/gpu-hello/bin/x86/linux/gpu-hellogem5 Simulator
System.  http://gem5.org gem5 is copyrighted software; use
the --copyright option for details.gem5 compiled Jan 28 2019 15:33:10gem5
started Jan 28 2019 16:08:11gem5 executing on eelnx221, pid 29093command
line: ./build/HSAIL_X86/gem5.opt configs/example/apu_se.py -c
tests/test-progs/gpu-hello/bin/x86/linux/gpu-helloUsing GPU kernel code
file(s)
./tests/test-progs/gpu-hello/bin/x86/linux/gpu-hello-kernel.asmGlobal
frequency set at 1 ticks per secondwarn: system.ruby.network
adopting orphan SimObject param 'int_links'warn: system.ruby.network
adopting orphan SimObject param 'ext_links'warn: DRAM device capacity (8192
Mbytes) does not match the address range assigned (512 Mbytes)Forcing
maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB
assoc.) Forcing maxCoalescedReqs to 32 (TLB assoc.) Forcing
maxCoalescedReqs to 32 (TLB assoc.) Forcing maxCoalescedReqs to 32 (TLB
assoc.) 0: system.remote_gdb: listening for remote gdb on port 7000info:
Entering event queue @ 0.  Starting simulation...warn: Replacement policy
updates recently became the responsibility of SLICC state machines. Make
sure to setMRU() near callbacks in .sm files!keys = 0x7b2bc0, &keys =
0x798998, keys[0] = 23gem5.opt:
build/HSAIL_X86/gpu-compute/gpu_tlb.cc:1547: virtual void
X86ISA::GpuTLB::CpuSidePort::recvFunctional(PacketPtr): Assertion `success'
failed.Program aborted at tick 589981000--- BEGIN LIBC BACKTRACE
---./build/HSAIL_X86/gem5.opt(_Z15print_backtracev+0x28)[0xd921d8]./build/HSAIL_X86/gem5.opt(_Z12abortHandleri+0x46)[0xda4d26]/lib/x86_64-linux-gnu/libpthread.so.0(+0x11390)[0x7f4495430390]/lib/x86_64-linux-gnu/libc.so.6(gsignal+0x38)[0x7f4493f31428]/lib/x86_64-linux-gnu/libc.so.6(abort+0x16a)[0x7f4493f3302a]/lib/x86_64-linux-gnu/libc.so.6(+0x2dbd7)[0x7f4493f29bd7]/lib/x86_64-linux-gnu/libc.so.6(+0x2dc82)[0x7f4493f29c82]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x2e4)[0xecd6f4]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x4fa)[0xecd90a]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6X86ISA6GpuTLB11CpuSidePort14recvFunctionalEP6Packet+0x4fa)[0xecd90a]./build/HSAIL_X86/gem5.opt(_ZN12TLBCoalescer11CpuSidePort14recvFunctionalEP6Packet+0xda)[0xedd21a]./build/HSAIL_X86/gem5.opt(_ZN6Shader19functionalTLBAccessEP6PacketiN7BaseTLB4ModeE+0xbe)[0xed72be]./build/HSAIL_X86/gem5.opt(_ZN6Shader18doFunctionalAccessEP7Request6MemCmdPvbi+0x9a7)[0xed7d97]./build/HSAIL_X86/gem5.opt(_ZN6Shader9AccessMemEmPvji6MemCmdb+0x188)[0xed8368]./build/HSAIL_X86/gem5.opt(_ZN6Shader7ReadMemEmPvji+0x11)[0xed8401]./build/HSAIL_X86/gem5.opt(_ZN13GpuDispatcher5writeEP6Packet+0xda1)[0xeb5351]./build/HSAIL_X86/gem5.opt(_ZN7PioPort10recvAtomicEP6Packet+0x6e)[0x1acd39e]./build/HSAIL_X86/gem5.opt(_ZN16SimpleTimingPort13recvTimingReqEP6Packet+0x48)[0x1a58be8]./build/HSAIL_X86/gem5.opt(_ZN15NoncoherentXBar13recvTimingReqEP6Packets+0x38a)[0x1a3a3aa]./build/HSAIL_X86/gem5.opt[0x1a49232]./build/HSAIL_X86/gem5.opt(_ZN10EventQueue10serviceOneEv+0xc5)[0xd989c5]./build/HSAIL_X86/gem5.opt(_Z9doSimLoopP10EventQueue+0x50)[0xdb0a20]./build/HSAIL_X86/gem5.opt(_Z8simulatem+0xd1b)[0xdb1b0b]./build/HSAIL_X86/gem5.opt[0x1c1532a]./build/HSAIL_X86/gem5.opt[0xdf4a55]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x7852)[0x7f44956ed7b2]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x85c)[0x7f449582411c]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalFrameEx+0x6ffd)[0x7f44956ecf5d]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCodeEx+0x85c)[0x7f449582411c]/usr/lib/x86_64-linux-gnu/libpython2.7.so.1.0(PyEval_EvalCode+0x19)[0x7f44956e5de9]---
END LIBC BACKTRACE ---Aborted (core dumped)*

Is there anything i am missing or doing wrong?

Also if i understand correctly , you're saying we can compile for GCN3_X86
but no "example application is provided with gem5" ? Can i try out the
example applications (
https://github.com/ROCm-Developer-Tools/HCC-Example-Application ) linked on
gem5.org Main Page to use *HCC and compile to GCN3_X86 *? Would they work
on gem5 ?

Thank you for your time
Best,
Krishna Subramanian

On Mon, Jan 28, 2019 at 12:53 PM Gutierrez, Anthony <
anthony.gutier...@amd.com> wrote:

> That benchmark was for HSAIL ISA, an

[gem5-dev] Change in gem5/gem5[master]: cpu: move TAGE predictor code to a base class not inheriting from BPr...

[Javier Bueno Hedo (Gerrit)]

Javier Bueno Hedo has uploaded a new patch set (#2) to the change  
originally created by Jairo Balart. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15317 )


Change subject: cpu: move TAGE predictor code to a base class not  
inheriting from BPredUnit.

..

cpu: move TAGE predictor code to a base class not inheriting from BPredUnit.

This base code can be used for TAGE-based indirect base predictors.

Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e
---
M src/cpu/pred/2bit_local.cc
M src/cpu/pred/2bit_local.hh
M src/cpu/pred/BranchPredictor.py
M src/cpu/pred/SConscript
M src/cpu/pred/bi_mode.cc
M src/cpu/pred/bi_mode.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/pred/bpred_unit.hh
M src/cpu/pred/ltage.cc
M src/cpu/pred/ltage.hh
M src/cpu/pred/tage.cc
M src/cpu/pred/tage.hh
A src/cpu/pred/tage_base.cc
A src/cpu/pred/tage_base.hh
M src/cpu/pred/tournament.cc
M src/cpu/pred/tournament.hh
16 files changed, 1,505 insertions(+), 1,062 deletions(-)


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Gerrit-Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e
Gerrit-Change-Number: 15317
Gerrit-PatchSet: 2
Gerrit-Owner: Jairo Balart 
Gerrit-Assignee: Giacomo Travaglini 
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[gem5-dev] Change in gem5/gem5[master]: cpu: move TAGE predictor code to a base class not inheriting from BPr...

[Javier Bueno Hedo (Gerrit)]

Javier Bueno Hedo has uploaded a new patch set (#3) to the change  
originally created by Jairo Balart. (  
https://gem5-review.googlesource.com/c/public/gem5/+/15317 )


Change subject: cpu: move TAGE predictor code to a base class not  
inheriting from BPredUnit.

..

cpu: move TAGE predictor code to a base class not inheriting from BPredUnit.

This base code can be used for TAGE-based indirect base predictors.

Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e
---
M src/cpu/pred/2bit_local.cc
M src/cpu/pred/2bit_local.hh
M src/cpu/pred/BranchPredictor.py
M src/cpu/pred/SConscript
M src/cpu/pred/bi_mode.cc
M src/cpu/pred/bi_mode.hh
M src/cpu/pred/bpred_unit.cc
M src/cpu/pred/bpred_unit.hh
M src/cpu/pred/ltage.cc
M src/cpu/pred/ltage.hh
M src/cpu/pred/tage.cc
M src/cpu/pred/tage.hh
A src/cpu/pred/tage_base.cc
A src/cpu/pred/tage_base.hh
M src/cpu/pred/tournament.cc
M src/cpu/pred/tournament.hh
16 files changed, 1,504 insertions(+), 1,062 deletions(-)


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Gerrit-Owner: Jairo Balart 
Gerrit-Assignee: Giacomo Travaglini 
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[gem5-dev] Change in gem5/gem5[master]: cpu: Move the Loop Predictor from LTAGE to an external class

[Javier Bueno Hedo (Gerrit)]

Hello Giacomo Travaglini, Andreas Sandberg,

I'd like you to reexamine a change. Please visit

https://gem5-review.googlesource.com/c/public/gem5/+/15775

to look at the new patch set (#6).

Change subject: cpu: Move the Loop Predictor from LTAGE to an external class
..

cpu: Move the Loop Predictor from LTAGE to an external class

This code could be reused by other predictors requiring a loop predictor.

Change-Id: I60ad079a2c49b00a1f84d5cfd3611631883a4b57
---
M src/cpu/pred/BranchPredictor.py
M src/cpu/pred/SConscript
A src/cpu/pred/loop_predictor.cc
A src/cpu/pred/loop_predictor.hh
M src/cpu/pred/ltage.cc
M src/cpu/pred/ltage.hh
6 files changed, 705 insertions(+), 383 deletions(-)


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Gerrit-Change-Number: 15775
Gerrit-PatchSet: 6
Gerrit-Owner: Javier Bueno Hedo 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Giacomo Travaglini 
Gerrit-Reviewer: Javier Bueno Hedo 
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