date:20220324

[gem5-dev] Change in gem5/gem5[develop]: configs: Update memory port name in Ruby

2022-03-24 Thread Srikant Bharadwaj (Gerrit) via gem5-dev

Srikant Bharadwaj has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58189 )



Change subject: configs: Update memory port name in Ruby
..

configs: Update memory port name in Ruby

Memory port for controllers is now called memory_out_port.
'memory' is a depracated param according to this change:
https://gem5-review.googlesource.com/c/public/gem5/+/34417

Change-Id: I6a561f5603c7597a3974af1766ab642acb3e59de
---
M configs/ruby/Ruby.py
1 file changed, 15 insertions(+), 2 deletions(-)



diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 631c65c..ba94c15 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -130,7 +130,7 @@
 if len(system.mem_ranges) > 1:
 crossbar = IOXBar()
 crossbars.append(crossbar)
-dir_cntrl.memory = crossbar.cpu_side_ports
+dir_cntrl.memory_out_port = crossbar.cpu_side_ports

 dir_ranges = []
 for r in system.mem_ranges:
@@ -152,7 +152,7 @@
 if crossbar != None:
 mem_ctrl.port = crossbar.mem_side_ports
 else:
-mem_ctrl.port = dir_cntrl.memory
+mem_ctrl.port = dir_cntrl.memory_out_port

 # Enable low-power DRAM states if option is set
 if issubclass(mem_type, DRAMInterface):

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I6a561f5603c7597a3974af1766ab642acb3e59de
Gerrit-Change-Number: 58189
Gerrit-PatchSet: 1
Gerrit-Owner: Srikant Bharadwaj 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: configs: Python 3.2+ requires additional flag for makedirs

2022-03-24 Thread Srikant Bharadwaj (Gerrit) via gem5-dev

Srikant Bharadwaj has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58190 )



Change subject: configs: Python 3.2+ requires additional flag for makedirs
..

configs: Python 3.2+ requires additional flag for makedirs

makedirs requires and additional flag for makedirs to ignore
error when the directory exists. This change enables overwriting
on existing output directories for a simulation.
https://docs.python.org/3/library/os.html

Change-Id: I1c7329ded1f5eef2c882e3224457e1d991d074fd
---
M configs/common/FileSystemConfig.py
1 file changed, 15 insertions(+), 1 deletion(-)



diff --git a/configs/common/FileSystemConfig.py  
b/configs/common/FileSystemConfig.py

index 66a6315..d33389c 100644
--- a/configs/common/FileSystemConfig.py
+++ b/configs/common/FileSystemConfig.py
@@ -168,7 +168,7 @@
'system', 'node')

 nodedir = joinpath(nodebasedir,'node%d' % node_number)
-makedirs(nodedir)
+makedirs(nodedir, exist_ok=True)

 file_append((nodedir, 'cpumap'), hex_mask(cpu_list))
 file_append((nodedir, 'meminfo'),

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I1c7329ded1f5eef2c882e3224457e1d991d074fd
Gerrit-Change-Number: 58190
Gerrit-PatchSet: 1
Gerrit-Owner: Srikant Bharadwaj 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: scons: Remove the default-default build target.

2022-03-24 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58171 )



Change subject: scons: Remove the default-default build target.
..

scons: Remove the default-default build target.

In gem5, there are many equally valid and equally useful top level
targets which the user might want. It no longer makes sense to
arbitrarily pick one to be the default target. It makes sense to force
the user to actually specify what they want, instead of assuming it
must be the ARM debug binary.

There is currently an M5_DEFAULT_BINARY environment variable which
will change what the default binary is, if set. This change leaves
that in place, but removes the default-default, or in other words the
default that is used if M5_DEFAULT_BINARY is not set.

This way if the user knows what default they want, they can specify it
locally in their environment and avoid having to type it over and over
again, but we're not making an arbitrary choice at a more global level
without the context to know what actually makes sense.

Change-Id: I886adb1289b9879d53387250f950909a4809ed8b
---
M SConstruct
1 file changed, 28 insertions(+), 1 deletion(-)



diff --git a/SConstruct b/SConstruct
index a15c304..bba3c98 100755
--- a/SConstruct
+++ b/SConstruct
@@ -172,7 +172,9 @@
 error("No C++ compiler installed (package g++ on Ubuntu and RedHat)")

 # Find default configuration & binary.
-Default(environ.get('M5_DEFAULT_BINARY', 'build/ARM/gem5.debug'))
+default_target = environ.get('M5_DEFAULT_BINARY', None)
+if default_target:
+Default(default_target)

 defconfig_dir = Dir('#defconfig')
 defconfigs = list([f for f in os.listdir(defconfig_dir.abspath) if

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I886adb1289b9879d53387250f950909a4809ed8b
Gerrit-Change-Number: 58171
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
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[gem5-dev] Change in gem5/gem5[develop]: scons: Flesh out the help text for "magic" targets.

2022-03-24 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58170 )



Change subject: scons: Flesh out the help text for "magic" targets.
..

scons: Flesh out the help text for "magic" targets.

These targets are not necessarily obvious, and tell SCons to do useful
things, like build a particular version of the gem5 binary with a
particular configuration, or run the unit tests.

Add descriptions of these targets to the help so that they are much
more discoverable.

Change-Id: If84399be1a7155ff5f66f511efe1f1c241089c84
---
M SConstruct
1 file changed, 70 insertions(+), 10 deletions(-)



diff --git a/SConstruct b/SConstruct
index e331054..ce4f1e6 100755
--- a/SConstruct
+++ b/SConstruct
@@ -44,15 +44,6 @@
 #
 # SCons top-level build description (SConstruct) file.
 #
-# While in this directory ('gem5'), just type 'scons' to build the default
-# configuration (see below), or type 'scons build//'
-# to build some other configuration (e.g., 'build/X86/gem5.opt' for
-# the optimized X86 version).
-#
-# You can build gem5 in a different directory as long as there is a
-# 'build/' somewhere along the target path.  The build system
-# expects that all configs under the same build directory are being
-# built for the same host system.
 #
 # Examples:
 #
@@ -81,7 +72,7 @@
 import os
 import sys

-from os import mkdir, remove, environ
+from os import mkdir, remove, environ, listdir
 from os.path import abspath, dirname, expanduser
 from os.path import isdir, isfile
 from os.path import join, split
@@ -183,6 +174,59 @@
 # Find default configuration & binary.
 Default(environ.get('M5_DEFAULT_BINARY', 'build/ARM/gem5.debug'))

+defconfig_dir = Dir('#defconfig')
+defconfigs = list([f for f in os.listdir(defconfig_dir.abspath) if
+isfile(os.path.join(defconfig_dir.abspath, f))])
+defconfigs.sort()
+
+defconfig_list = '\n'.join(' ' * 10 + defconfig for defconfig in  
defconfigs)

+
+Help(f"""
+Targets:
+To build gem5 using a predefined configuration, use a target with
+a directory called "build" in the path, followed by a directory  
named
+after a predefined configuration, and then the actual target,  
likely

+a gem5 binary. For example:
+
+scons build/X86/gem5.opt
+
+The "build" component tells SCons that the next part names an  
initial

+configuration, and the part after that is the actual target.
+The predefined targets currently available are:
+
+{defconfig_list}
+
+The extension on the gem5 binary specifies what type of binary to
+build. Options are:
+
+debug: A debug binary with optimizations turned off and debug info
+turned on.
+opt: An optimized binary with debugging still turned on.
+fast: An optimized binary with debugging, asserts, and tracing
+disabled.
+
+gem5 can also be built as a static or dynamic library. In that  
case,

+the extension is fixed by the operating system, so the binary type
+is part of the target file name. For example:
+
+scons build/ARM/libgem5_opt.so
+
+To build unit tests, you can use a target like this:
+
+scons build/RISCV/unittests.debug
+
+The unittests.debug part of the target is actual a directory which
+holds the results for all the unit tests built with the "debug"
+settings. When that's used as the target, SCons will build all the
+files under that directory, which will run all the tests.
+
+To build and run an individual test, you can built it's binary
+specifically and then run it manually:
+
+scons build/SPARC/base/bitunion.test.opt
+build/SPARC/base/bitunion.test.opt
+""", append=True)
+

 
 #

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: If84399be1a7155ff5f66f511efe1f1c241089c84
Gerrit-Change-Number: 58170
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black 
Gerrit-MessageType: newchange
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[gem5-dev] Re: Build failed in Jenkins: nightly #172

2022-03-24 Thread Bobby Bruce via gem5-dev

I'm frustrated that I don't know why this error is occurring and Google is
of little help. This appears to be nothing to do with the actual tests but
some fault with Docker.

My only guess is the Docker container, in this case, is running out of
memory, so I've increased it via this patch:
https://gem5-review.googlesource.com/c/public/gem5/+/58169. Let's see if
this fixes the problem.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Thu, Mar 24, 2022 at 4:58 AM jenkins-no-reply--- via gem5-dev <
gem5-dev@gem5.org> wrote:

> See <
> https://jenkins.gem5.org/job/nightly/172/display/redirect?page=changes>
>
> Changes:
>
> [mattdsinclair] tests,configs,mem-ruby: Handle num DMAs in GPU Ruby tester
>
> [gabe.black] arch-arm,base: Use SourceLib() in a few simple spots.
>
>
> --
> [...truncated 2.62 MB...]
>  [SO Param] m5.objects.Ethernet, NSGigE -> POWER/python/_m5/param_NSGigE.cc
>  [SO Param] m5.objects.Ethernet, Sinic -> POWER/python/_m5/param_Sinic.cc
>  [SO Param] m5.objects.Ethernet, NSGigE -> POWER/params/NSGigE.hh
>  [SO Param] m5.objects.Ethernet, Sinic -> POWER/params/Sinic.hh
>  [ CXX] POWER/python/_m5/param_NSGigE.cc -> .o
>  [ CXX] POWER/python/_m5/param_Sinic.cc -> .o
>  [SO Param] m5.objects.Ethernet, EtherTap ->
> POWER/python/_m5/param_EtherTap.cc
>  [ CXX] POWER/dev/net/etherbus.cc -> .o
>  [ CXX] POWER/dev/net/etherswitch.cc -> .o
>  [ CXX] POWER/python/_m5/param_EtherTap.cc -> .o
>  [ CXX] POWER/dev/net/etherdevice.cc -> .o
>  [ CXX] POWER/dev/net/etherdump.cc -> .o
>  [ CXX] POWER/dev/net/etherint.cc -> .o
>  [ CXX] POWER/dev/net/etherlink.cc -> .o
>  [ CXX] POWER/dev/net/etherpkt.cc -> .o
>  [ CXX] POWER/dev/net/ethertap.cc -> .o
>  [ CXX] POWER/dev/net/pktfifo.cc -> .o
>  [ CXX] POWER/debug/Ethernet.cc -> .o
>  [ CXX] POWER/debug/EthernetCksum.cc -> .o
>  [ CXX] POWER/debug/EthernetDMA.cc -> .o
>  [ CXX] POWER/debug/EthernetData.cc -> .o
>  [ CXX] POWER/debug/EthernetDesc.cc -> .o
>  [ CXX] POWER/debug/EthernetEEPROM.cc -> .o
>  [ CXX] POWER/debug/EthernetIntr.cc -> .o
>  [ CXX] POWER/debug/EthernetPIO.cc -> .o
>  [ CXX] POWER/debug/EthernetSM.cc -> .o
>  [ CXX] POWER/dev/net/dist_iface.cc -> .o
>  [ CXX] POWER/dev/net/dist_etherlink.cc -> .o
>  [ CXX] POWER/dev/net/tcp_iface.cc -> .o
>  [ CXX] POWER/debug/DistEthernet.cc -> .o
>  [ CXX] POWER/debug/DistEthernetPkt.cc -> .o
>  [ CXX] POWER/debug/DistEthernetCmd.cc -> .o
>  [ CXX] POWER/dev/net/i8254xGBe.cc -> .o
>  [ CXX] POWER/dev/net/ns_gige.cc -> .o
>  [ CXX] POWER/dev/net/sinic.cc -> .o
>  [ CXX] POWER/debug/EthernetAll.cc -> .o
>  [ CXX] POWER/debug/EthernetNoData.cc -> .o
>  [ CXX] POWER/dev/ps2/PS2.py.cc -> .o
>  [SO Param] m5.objects.PS2, PS2Device ->
> POWER/python/_m5/param_PS2Device.cc
>  [SO Param] m5.objects.PS2, PS2Device -> POWER/params/PS2Device.hh
>  [SO Param] m5.objects.PS2, PS2Keyboard ->
> POWER/python/_m5/param_PS2Keyboard.cc
>  [ CXX] POWER/python/_m5/param_PS2Device.cc -> .o
>  [SO Param] m5.objects.PS2, PS2Mouse -> POWER/python/_m5/param_PS2Mouse.cc
>  [SO Param] m5.objects.PS2, PS2Keyboard -> POWER/params/PS2Keyboard.hh
>  [SO Param] m5.objects.PS2, PS2Mouse -> POWER/params/PS2Mouse.hh
>  [ CXX] POWER/python/_m5/param_PS2Keyboard.cc -> .o
>  [ CXX] POWER/python/_m5/param_PS2Mouse.cc -> .o
>  [SO Param] m5.objects.PS2, PS2TouchKit ->
> POWER/python/_m5/param_PS2TouchKit.cc
>  [ CXX] POWER/dev/ps2/device.cc -> .o
>  [SO Param] m5.objects.PS2, PS2TouchKit -> POWER/params/PS2TouchKit.hh
>  [ CXX] POWER/dev/ps2/keyboard.cc -> .o
>  [ CXX] POWER/dev/ps2/mouse.cc -> .o
>  [ CXX] POWER/python/_m5/param_PS2TouchKit.cc -> .o
>  [ CXX] POWER/dev/ps2/touchkit.cc -> .o
>  [ CXX] POWER/dev/ps2/types.cc -> .o
>  [ CXX] POWER/debug/PS2.cc -> .o
>  [ CXX] POWER/dev/qemu/QemuFwCfg.py.cc -> .o
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItem ->
> POWER/python/_m5/param_QemuFwCfgItem.cc
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemBytes ->
> POWER/python/_m5/param_QemuFwCfgItemBytes.cc
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemFile ->
> POWER/python/_m5/param_QemuFwCfgItemFile.cc
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItem ->
> POWER/params/QemuFwCfgItem.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemBytes ->
> POWER/params/QemuFwCfgItemBytes.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemFile ->
> POWER/params/QemuFwCfgItemFile.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfg -> POWER/params/QemuFwCfg.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgIo ->
> POWER/params/QemuFwCfgIo.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemString ->
> POWER/params/QemuFwCfgItemString.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgMmio ->
> POWER/params/QemuFwCfgMmio.hh
>  [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemString ->
>

[gem5-dev] Change in gem5/gem5[develop]: tests: Increase test Dockers' memory limit to 18GB

2022-03-24 Thread Bobby Bruce (Gerrit) via gem5-dev

Bobby Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58169 )



Change subject: tests: Increase test Dockers' memory limit to 18GB
..

tests: Increase test Dockers' memory limit to 18GB

The following error is being returned by the Jenkins,
https://jenkins.gem5.org, on a regular basis:

```
error waiting for container: unexpected EOF
```

An example can be found here:
https://jenkins.gem5.org/job/nightly/172/console

It is not known exactly what the cause of this error is, but increasing
the memory available to each container may help the issue. This patch
may be reverted if it does not fix the problem.

Change-Id: Ide341774439820def91b0373b03801396705cd62
---
M tests/compiler-tests.sh
M tests/nightly.sh
M tests/weekly.sh
3 files changed, 100 insertions(+), 45 deletions(-)



diff --git a/tests/compiler-tests.sh b/tests/compiler-tests.sh
index 292d661..a6a7f99 100755
--- a/tests/compiler-tests.sh
+++ b/tests/compiler-tests.sh
@@ -9,6 +9,9 @@
 gem5_root="${dir}/.."
 build_dir="${gem5_root}/build"

+# The per-container Docker memory limit.
+docker_mem_limit="18g"
+
 # All Docker images in the gem5 testing GCR which we want to compile with.
 images=("gcc-version-11"
 "gcc-version-10"
@@ -125,7 +128,8 @@
 # Build with container
 {
 docker run --rm -v "${gem5_root}":"/gem5" -u $UID:$GID \
--w /gem5 $repo_name /usr/bin/env python3  
/usr/bin/scons \

+-w /gem5 --memory="${docker_mem_limit}" $repo_name \
+/usr/bin/env python3 /usr/bin/scons \
 "${build_out}" "${build_args}"
 }>"${build_stdout}" 2>"${build_stderr}"
 result=$?
diff --git a/tests/nightly.sh b/tests/nightly.sh
index 9c63bff..b02f05b 100755
--- a/tests/nightly.sh
+++ b/tests/nightly.sh
@@ -32,6 +32,9 @@
 dir="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
 gem5_root="${dir}/.."

+# The per-container Docker memory limit.
+docker_mem_limit="18g"
+
 # The first argument is the number of threads to be used for compilation.  
If no

 # argument is given we default to one.
 compile_threads=1
@@ -65,7 +68,7 @@
 # SCons is not perfect, and occasionally does not catch a necessary
 # compilation: https://gem5.atlassian.net/browse/GEM5-753
 docker run -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}" --rm \
+"${gem5_root}" --memory="${docker_mem_limit}" --rm \
 gcr.io/gem5-test/ubuntu-20.04_all-dependencies:latest \
 bash -c "scons build/${isa}/gem5.opt -j${compile_threads} \
 || (rm -rf build && scons build/${isa}/gem5.opt  
-j${compile_threads})"

@@ -75,7 +78,7 @@
 build=$1

 docker run -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}" --rm \
+"${gem5_root}" --memory="${docker_mem_limit}" --rm \
 gcr.io/gem5-test/ubuntu-20.04_all-dependencies:latest \
 scons build/NULL/unittests.${build} -j${compile_threads}
 }
@@ -85,6 +88,7 @@

 # Try to build the ISA targets.
 build_target NULL
+exit 0
 build_target RISCV
 build_target X86
 build_target ARM
@@ -98,7 +102,7 @@

 # Run the gem5 long tests.
 docker run -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}"/tests --rm \
+"${gem5_root}"/tests --memory="${docker_mem_limit}" --rm \
 gcr.io/gem5-test/ubuntu-20.04_all-dependencies:latest \
 ./main.py run --length long -j${compile_threads} -t${run_threads}  
-vv


@@ -116,7 +120,8 @@
 # For the GPU tests we compile and run the GPU ISA inside a gcn-gpu  
container.

 docker pull gcr.io/gem5-test/gcn-gpu:latest
 docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest  bash -c \
+"${gem5_root}" --memory="${docker_mem_limit}" \
+gcr.io/gem5-test/gcn-gpu:latest  bash -c \
 "scons build/${gpu_isa}/gem5.opt -j${compile_threads} \
 || (rm -rf build && scons build/${gpu_isa}/gem5.opt  
-j${compile_threads})"


@@ -129,7 +134,8 @@
 # Thus, we always want to run this in the nightly regressions to make sure
 # basic GPU functionality is working.
 docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest   
build/${gpu_isa}/gem5.opt \

+"${gem5_root}" --memory="${docker_mem_limit}" \
+gcr.io/gem5-test/gcn-gpu:latest  build/${gpu_isa}/gem5.opt \
 configs/example/apu_se.py --reg-alloc-policy=dynamic -n3 -c square

 # get HeteroSync
@@ -140,7 +146,8 @@
 # moderate contention case for the default 4 CU GPU config and help ensure  
GPU

 # atomics are tested.
 docker run --rm -u $UID:$GID --volume "${gem5_root}":"${gem5_root}" -w \
-"${gem5_root}" gcr.io/gem5-test/gcn-gpu:latest  
build/${gpu_isa}/gem5.opt \

+"${gem5_root}"

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Remove unused variables in src/dev/amdgpu

2022-03-24 Thread Bobby Bruce (Gerrit) via gem5-dev

Bobby Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58149 )



Change subject: dev-amdgpu: Remove unused variables in src/dev/amdgpu
..

dev-amdgpu: Remove unused variables in src/dev/amdgpu

These were causing errors to be thrown when compiling in clang-12.

Change-Id: I8bd2d7e7e1d4423a54766ed906c864bb91e884f0
---
M src/dev/amdgpu/amdgpu_device.hh
M src/dev/amdgpu/system_hub.cc
M src/dev/amdgpu/system_hub.hh
3 files changed, 15 insertions(+), 15 deletions(-)



diff --git a/src/dev/amdgpu/amdgpu_device.hh  
b/src/dev/amdgpu/amdgpu_device.hh

index 09c13c9..6697d82 100644
--- a/src/dev/amdgpu/amdgpu_device.hh
+++ b/src/dev/amdgpu/amdgpu_device.hh
@@ -121,16 +121,6 @@
 bool checkpoint_before_mmios;
 int init_interrupt_count;

-// GART aperture. This is the initial 1-level privledged page table  
that

-// resides in framebuffer memory.
-uint32_t gartBase = 0x0;
-uint32_t gartSize = 0x0;
-
-// MMHUB aperture. These addresses are set by the GPU. For now we wait
-// until the driver reads them before setting them.
-uint64_t mmhubBase = 0x0;
-uint64_t mmhubTop = 0x0;
-
 // VMIDs data structures
 // map of pasids to vmids
 std::unordered_map idMap;
diff --git a/src/dev/amdgpu/system_hub.cc b/src/dev/amdgpu/system_hub.cc
index b55cc52..90dcb7f 100644
--- a/src/dev/amdgpu/system_hub.cc
+++ b/src/dev/amdgpu/system_hub.cc
@@ -39,7 +39,7 @@
 void
 AMDGPUSystemHub::sendRequest(PacketPtr pkt, Event *callback)
 {
-ResponseEvent *dmaRespEvent = new ResponseEvent(pkt, callback);
+ResponseEvent *dmaRespEvent = new ResponseEvent(callback);
 Tick delay = 0;

 // Assuming read XOR write (i.e., not an atomic).
@@ -59,8 +59,8 @@
 {
 }

-AMDGPUSystemHub::ResponseEvent::ResponseEvent(PacketPtr pkt, Event  
*_callback)

-: reqPkt(pkt), callback(_callback)
+AMDGPUSystemHub::ResponseEvent::ResponseEvent(Event *_callback)
+: callback(_callback)
 {
 // Delete this event after process is called
 setFlags(Event::AutoDelete);
diff --git a/src/dev/amdgpu/system_hub.hh b/src/dev/amdgpu/system_hub.hh
index 2de627f..0b48c3b 100644
--- a/src/dev/amdgpu/system_hub.hh
+++ b/src/dev/amdgpu/system_hub.hh
@@ -66,11 +66,10 @@

 class ResponseEvent : public Event
 {
-   PacketPtr reqPkt;
Event *callback;

public:
-ResponseEvent(PacketPtr pkt, Event *_callback);
+ResponseEvent(Event *_callback);

 void process();


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8bd2d7e7e1d4423a54766ed906c864bb91e884f0
Gerrit-Change-Number: 58149
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby Bruce 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add braces to stop clang compilation braces error

2022-03-24 Thread Bobby Bruce (Gerrit) via gem5-dev

Bobby Bruce has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58150 )



Change subject: dev-amdgpu: Add braces to stop clang compilation braces  
error

..

dev-amdgpu: Add braces to stop clang compilation braces error

Additional braces are needed due to a clang compilation bug that falsely
throws a "suggest braces around initialization of subject" error. More
info on this bug is available here:
https://stackoverflow.com/questions/3184

Change-Id: Ide5cdd260716ba06f6da4663732e39d18e00af97
---
M src/dev/amdgpu/pm4_packet_processor.cc
1 file changed, 20 insertions(+), 1 deletion(-)



diff --git a/src/dev/amdgpu/pm4_packet_processor.cc  
b/src/dev/amdgpu/pm4_packet_processor.cc

index d076944..cfd031b 100644
--- a/src/dev/amdgpu/pm4_packet_processor.cc
+++ b/src/dev/amdgpu/pm4_packet_processor.cc
@@ -166,7 +166,12 @@
 q->id(), q->rptr(), q->wptr());

 if (q->rptr() < q->wptr()) {
-PM4Header h{0, 0, 0, 0, 0, 0};
+/* Additional braces here are needed due to a clang compilation bug
+   falsely throwing a "suggest braces around initialization of
+   subject" error. More info on this bug is available here:
+   https://stackoverflow.com/questions/3184
+ */
+PM4Header h{{{0, 0, 0, 0, 0, 0}}};
 auto cb = new DmaVirtCallback(
 [ = ] (PM4Header header)
 { decodeHeader(q, header); }, h);

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Gerrit-Branch: develop
Gerrit-Change-Id: Ide5cdd260716ba06f6da4663732e39d18e00af97
Gerrit-Change-Number: 58150
Gerrit-PatchSet: 1
Gerrit-Owner: Bobby Bruce 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: scons: Don't accumulate SLICC_INCLUDES.

2022-03-24 Thread Gabe Black (Gerrit) via gem5-dev

Gabe Black has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/56754 )


Change subject: scons: Don't accumulate SLICC_INCLUDES.
..

scons: Don't accumulate SLICC_INCLUDES.

Presumably, these are fixed for whatever protocol that gets selected. We
don't need to accumulate includes, we need to set includes to something
in particular. If there is a common include which always needs to be
used, we can handle that in the SConscript separately from
SLICC_INCLUDES.

Change-Id: I996d08566944e38e388dc287f644c40366ebba0d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56754
Tested-by: kokoro 
Maintainer: Gabe Black 
Reviewed-by: Yu-hsin Wang 
---
M src/mem/ruby/protocol/SConscript
M src/mem/ruby/protocol/SConsopts
2 files changed, 23 insertions(+), 4 deletions(-)

Approvals:
  Yu-hsin Wang: Looks good to me, approved
  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass

Objections:
  Jason Lowe-Power: I would prefer this is not merged as is




diff --git a/src/mem/ruby/protocol/SConscript  
b/src/mem/ruby/protocol/SConscript

index f137021..a71a8b2 100644
--- a/src/mem/ruby/protocol/SConscript
+++ b/src/mem/ruby/protocol/SConscript
@@ -60,13 +60,15 @@
 r'''include[ \t]["'](.*)["'];''')
 env.Append(SCANNERS=slicc_scanner)

+slicc_includes = ['mem/ruby/slicc_interface/RubySlicc_includes.hh'] + \
+env['SLICC_INCLUDES']
 def slicc_emitter(target, source, env):
 assert len(source) == 1
 filepath = source[0].srcnode().abspath

 slicc = SLICC(filepath, protocol_base.abspath, verbose=False)
 slicc.process()
-slicc.writeCodeFiles(output_dir.abspath, env['SLICC_INCLUDES'])
+slicc.writeCodeFiles(output_dir.abspath, slicc_includes)
 if env['SLICC_HTML']:
 slicc.writeHTMLFiles(html_dir.abspath)

@@ -79,7 +81,7 @@

 slicc = SLICC(filepath, protocol_base.abspath, verbose=True)
 slicc.process()
-slicc.writeCodeFiles(output_dir.abspath, env['SLICC_INCLUDES'])
+slicc.writeCodeFiles(output_dir.abspath, slicc_includes)
 if env['SLICC_HTML']:
 slicc.writeHTMLFiles(html_dir.abspath)

diff --git a/src/mem/ruby/protocol/SConsopts  
b/src/mem/ruby/protocol/SConsopts

index 03b87b4..2fcc57a 100644
--- a/src/mem/ruby/protocol/SConsopts
+++ b/src/mem/ruby/protocol/SConsopts
@@ -51,5 +51,3 @@

 protocol_base = Dir('.')
 Export('protocol_base')
-
-main.Append(SLICC_INCLUDES=['mem/ruby/slicc_interface/RubySlicc_includes.hh'])

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I996d08566944e38e388dc287f644c40366ebba0d
Gerrit-Change-Number: 56754
Gerrit-PatchSet: 10
Gerrit-Owner: Gabe Black 
Gerrit-Reviewer: Andreas Sandberg 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jui-min Lee 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Yu-hsin Wang 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Rename GenericTimer interrupts

2022-03-24 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58109 )


Change subject: dev-arm: Rename GenericTimer interrupts
..

dev-arm: Rename GenericTimer interrupts

The Arm Architecture Reference Manual has moved from
"Armv7-oriented" names for generic timer interrupts to
names more consistent with Armv8 (Exception Levels based).

We are therefore renaming those interrupts as follows:

int_phys_s -> int_el3_phys
int_phys_ns -> int_el1_phys
int_virt -> int_el1_virt
int_hyp -> int_el2_ns_phys

Change-Id: Id6e34a0e4311953938b25bca168a34357e3c8643
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58109
Reviewed-by: Andreas Sandberg 
Maintainer: Andreas Sandberg 
Tested-by: kokoro 
---
M src/dev/arm/GenericTimer.py
M src/dev/arm/RealView.py
M src/dev/arm/generic_timer.cc
M src/dev/arm/generic_timer.hh
4 files changed, 133 insertions(+), 108 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/arm/GenericTimer.py b/src/dev/arm/GenericTimer.py
index da686c1..256b830 100644
--- a/src/dev/arm/GenericTimer.py
+++ b/src/dev/arm/GenericTimer.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009-2020 ARM Limited
+# Copyright (c) 2009-2020, 2022 Arm Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -86,10 +86,10 @@

 counter = Param.SystemCounter(Parent.any, "Global system counter")

-int_phys_s = Param.ArmPPI("Physical (S) timer interrupt")
-int_phys_ns = Param.ArmPPI("Physical (NS) timer interrupt")
-int_virt = Param.ArmPPI("Virtual timer interrupt")
-int_hyp = Param.ArmPPI("Hypervisor timer interrupt")
+int_el1_phys = Param.ArmPPI("EL1 physical timer interrupt")
+int_el1_virt = Param.ArmPPI("EL1 virtual timer interrupt")
+int_el2_ns_phys = Param.ArmPPI("EL2 Non-secure physical timer  
interrupt")

+int_el3_phys = Param.ArmPPI("EL3 physical timer interrupt")

 # This value should be in theory initialized by the highest
 # priviledged software. We do this in gem5 to avoid KVM
@@ -109,10 +109,10 @@

 gic = self._parent.unproxy(self).gic
 node.append(FdtPropertyWords("interrupts",
-self.int_phys_s.generateFdtProperty(gic) +
-self.int_phys_ns.generateFdtProperty(gic) +
-self.int_virt.generateFdtProperty(gic) +
-self.int_hyp.generateFdtProperty(gic)))
+self.int_el3_phys.generateFdtProperty(gic) +
+self.int_el1_phys.generateFdtProperty(gic) +
+self.int_el1_virt.generateFdtProperty(gic) +
+self.int_el2_ns_phys.generateFdtProperty(gic)))

 if self._freq_in_dtb:
 node.append(self.counter.unproxy(self).generateDtb())
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 8d6837e..4f6d7da 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2009-2021 ARM Limited
+# Copyright (c) 2009-2022 Arm Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -832,10 +832,10 @@

 sys_counter = SystemCounter()
 generic_timer = GenericTimer(
-int_phys_s=ArmPPI(num=29, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_phys_ns=ArmPPI(num=30, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_virt=ArmPPI(num=27, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_hyp=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'))
+int_el3_phys=ArmPPI(num=29, int_type='IRQ_TYPE_LEVEL_LOW'),
+int_el1_phys=ArmPPI(num=30, int_type='IRQ_TYPE_LEVEL_LOW'),
+int_el1_virt=ArmPPI(num=27, int_type='IRQ_TYPE_LEVEL_LOW'),
+int_el2_ns_phys=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'))

 timer0 = Sp804(int0=ArmSPI(num=34), int1=ArmSPI(num=34),
pio_addr=0x1C11, clock0='1MHz', clock1='1MHz')
@@ -1045,11 +1045,11 @@
   0- 15: Software generated interrupts (SGIs)
  16- 31: On-chip private peripherals (PPIs)
 25   : vgic
-26   : generic_timer (hyp)
-27   : generic_timer (virt)
+26   : generic_timer (phys non-sec EL2)
+27   : generic_timer (virt EL1)
 28   : Reserved (Legacy FIQ)
-29   : generic_timer (phys, sec)
-30   : generic_timer (phys, non-sec)
+29   : generic_timer (phys EL3)
+30   : generic_timer (phys EL1)
 31   : Reserved (Legacy IRQ)
 32- 95: Mother board peripherals (SPIs)
 32   : Watchdog (SP805)
@@ -1125,10 +1125,10 @@

 sys_counter = SystemCounter()
 generic_timer = GenericTimer(
-int_phys_s=ArmPPI(num=29, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_phys_ns=ArmPPI(num=30, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_virt=ArmPPI(num=27, int_type='IRQ_TYPE_LEVEL_LOW'),
-

[gem5-dev] Change in gem5/gem5[develop]: arch-arm, dev-arm: Implement EL2 Non-secure Virtual Timer

2022-03-24 Thread Giacomo Travaglini (Gerrit) via gem5-dev

Giacomo Travaglini has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/58110 )


Change subject: arch-arm, dev-arm: Implement EL2 Non-secure Virtual Timer
..

arch-arm, dev-arm: Implement EL2 Non-secure Virtual Timer

Change-Id: I0cc499e1309c35d946c5b9231846263f97bfa2b0
Signed-off-by: Giacomo Travaglini 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58110
Reviewed-by: Andreas Sandberg 
Maintainer: Andreas Sandberg 
Tested-by: kokoro 
---
M src/arch/arm/regs/misc.cc
M src/dev/arm/GenericTimer.py
M src/dev/arm/RealView.py
M src/dev/arm/generic_timer.cc
M src/dev/arm/generic_timer.hh
5 files changed, 68 insertions(+), 12 deletions(-)

Approvals:
  Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/arm/regs/misc.cc b/src/arch/arm/regs/misc.cc
index 5486bbc..e8533e4 100644
--- a/src/arch/arm/regs/misc.cc
+++ b/src/arch/arm/regs/misc.cc
@@ -1349,6 +1349,7 @@
 bool EnIA = true; // using APIAKey_EL1 key of instr addrs in ELs 0,1
 bool EnIB = true; // using APIBKey_EL1 key of instr addrs in ELs 0,1

+const bool vhe_implemented = release->has(ArmExtension::FEAT_VHE);
 /**
  * Some registers alias with others, and therefore need to be  
translated.

  * When two mapping registers are given, they are the 32b lower and
@@ -3313,14 +3314,17 @@
 InitReg(MISCREG_CNTHV_CTL_EL2)
   .mon()
   .hyp()
-  .res0(0xfff8);
+  .res0(0xfff8)
+  .implemented(vhe_implemented);
 InitReg(MISCREG_CNTHV_CVAL_EL2)
   .mon()
-  .hyp();
+  .hyp()
+  .implemented(vhe_implemented);
 InitReg(MISCREG_CNTHV_TVAL_EL2)
   .mon()
   .hyp()
-  .res0(0x);
+  .res0(0x)
+  .implemented(vhe_implemented);
 InitReg(MISCREG_CNTHVS_CTL_EL2)
   .mon()
   .hyp()
diff --git a/src/dev/arm/GenericTimer.py b/src/dev/arm/GenericTimer.py
index 256b830..25be04e 100644
--- a/src/dev/arm/GenericTimer.py
+++ b/src/dev/arm/GenericTimer.py
@@ -89,6 +89,7 @@
 int_el1_phys = Param.ArmPPI("EL1 physical timer interrupt")
 int_el1_virt = Param.ArmPPI("EL1 virtual timer interrupt")
 int_el2_ns_phys = Param.ArmPPI("EL2 Non-secure physical timer  
interrupt")
+int_el2_ns_virt = Param.ArmPPI("EL2 Non-secure virtual timer  
interrupt")

 int_el3_phys = Param.ArmPPI("EL3 physical timer interrupt")

 # This value should be in theory initialized by the highest
@@ -112,7 +113,8 @@
 self.int_el3_phys.generateFdtProperty(gic) +
 self.int_el1_phys.generateFdtProperty(gic) +
 self.int_el1_virt.generateFdtProperty(gic) +
-self.int_el2_ns_phys.generateFdtProperty(gic)))
+self.int_el2_ns_phys.generateFdtProperty(gic) +
+self.int_el2_ns_virt.generateFdtProperty(gic)))

 if self._freq_in_dtb:
 node.append(self.counter.unproxy(self).generateDtb())
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 4f6d7da..91ade57 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -835,7 +835,8 @@
 int_el3_phys=ArmPPI(num=29, int_type='IRQ_TYPE_LEVEL_LOW'),
 int_el1_phys=ArmPPI(num=30, int_type='IRQ_TYPE_LEVEL_LOW'),
 int_el1_virt=ArmPPI(num=27, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_el2_ns_phys=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'))
+int_el2_ns_phys=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'),
+int_el2_ns_virt=ArmPPI(num=28, int_type='IRQ_TYPE_LEVEL_LOW'))

 timer0 = Sp804(int0=ArmSPI(num=34), int1=ArmSPI(num=34),
pio_addr=0x1C11, clock0='1MHz', clock1='1MHz')
@@ -975,8 +976,8 @@
 memory map

 Interrupts:
-Arm CoreTile Express A15x2 (V2P-CA15) - ARM DUI 0604E
-Section 2.8.2 - Test chip interrupts
+Armv8-A Foundation Platform - User Guide - Version 11.8
+Document ID: 100961_1180_00_en

 Memory map:
0x-0x03ff: Boot memory (CS0)
@@ -1047,7 +1048,7 @@
 25   : vgic
 26   : generic_timer (phys non-sec EL2)
 27   : generic_timer (virt EL1)
-28   : Reserved (Legacy FIQ)
+28   : generic_timer (virt non-sec EL2)
 29   : generic_timer (phys EL3)
 30   : generic_timer (phys EL1)
 31   : Reserved (Legacy IRQ)
@@ -1128,7 +1129,8 @@
 int_el3_phys=ArmPPI(num=29, int_type='IRQ_TYPE_LEVEL_LOW'),
 int_el1_phys=ArmPPI(num=30, int_type='IRQ_TYPE_LEVEL_LOW'),
 int_el1_virt=ArmPPI(num=27, int_type='IRQ_TYPE_LEVEL_LOW'),
-int_el2_ns_phys=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'))
+int_el2_ns_phys=ArmPPI(num=26, int_type='IRQ_TYPE_LEVEL_LOW'),
+int_el2_ns_virt=ArmPPI(num=28, int_type='IRQ_TYPE_LEVEL_LOW'))
 generic_timer_mem =

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add VM class for apertures, TranslationGens

2022-03-24 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53066 )


Change subject: dev-amdgpu: Add VM class for apertures, TranslationGens
..

dev-amdgpu: Add VM class for apertures, TranslationGens

Create a VM class to reduce clutter in the amdgpu_device.* files. This
new file is in charge of reading/writting MMIOs related to VM contexts
and apertures. It also provides ranges checks for various apertures and
breaks out the MMIO interface so that there are not overloaded macro
definitions in the device MMIO methods.

The new translation generator classes for the various apertures are also
added to this class.

Change-Id: Ic224c1aa485685685b1136a46eed50bcf99d2350
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53066
Reviewed-by: Matt Sinclair 
Maintainer: Matt Sinclair 
Tested-by: kokoro 
---
M src/arch/amdgpu/vega/tlb.cc
M src/dev/amdgpu/SConscript
M src/dev/amdgpu/amdgpu_defines.hh
M src/dev/amdgpu/amdgpu_device.cc
M src/dev/amdgpu/amdgpu_device.hh
A src/dev/amdgpu/amdgpu_vm.cc
A src/dev/amdgpu/amdgpu_vm.hh
7 files changed, 755 insertions(+), 99 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/amdgpu/vega/tlb.cc b/src/arch/amdgpu/vega/tlb.cc
index ef7a465..4e6c7b5 100644
--- a/src/arch/amdgpu/vega/tlb.cc
+++ b/src/arch/amdgpu/vega/tlb.cc
@@ -620,7 +620,7 @@
 DPRINTF(GPUTLB, "Doing a page walk for address %#x\n",
 virtPageAddr);

-Addr base = gpuDevice->getPageTableBase(1);
+Addr base = gpuDevice->getVM().getPageTableBase(1);
 Addr vaddr = pkt->req->getVaddr();
 walker->setDevRequestor(gpuDevice->vramRequestorId());

@@ -821,7 +821,7 @@
 PageTableEntry pte;

 // Initialize walker state for VMID
-Addr base = tlb->gpuDevice->getPageTableBase(1);
+Addr base = tlb->gpuDevice->getVM().getPageTableBase(1);
  
tlb->walker->setDevRequestor(tlb->gpuDevice->vramRequestorId());


 // Do page table walk
diff --git a/src/dev/amdgpu/SConscript b/src/dev/amdgpu/SConscript
index dd80bd2..faae85a 100644
--- a/src/dev/amdgpu/SConscript
+++ b/src/dev/amdgpu/SConscript
@@ -38,6 +38,7 @@
 tags='x86 isa')

 Source('amdgpu_device.cc', tags='x86 isa')
+Source('amdgpu_vm.cc', tags='x86 isa')
 Source('interrupt_handler.cc', tags='x86 isa')
 Source('memory_manager.cc', tags='x86 isa')
 Source('mmio_reader.cc', tags='x86 isa')
diff --git a/src/dev/amdgpu/amdgpu_defines.hh  
b/src/dev/amdgpu/amdgpu_defines.hh

index 9407a68..641218b 100644
--- a/src/dev/amdgpu/amdgpu_defines.hh
+++ b/src/dev/amdgpu/amdgpu_defines.hh
@@ -32,6 +32,8 @@
 #ifndef __DEV_AMDGPU_AMDGPU_DEFINES_HH__
 #define __DEV_AMDGPU_AMDGPU_DEFINES_HH__

+#include "base/types.hh"
+
 namespace gem5
 {

@@ -47,6 +49,9 @@
 RLC
 };

+// AMD GPUs support 16 different virtual address spaces
+static constexpr int AMDGPU_VM_COUNT = 16;
+
 /* Names of BARs used by the device. */
 constexpr int FRAMEBUFFER_BAR = 0;
 constexpr int DOORBELL_BAR = 2;
diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc

index 7551938..7aaf74c 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -34,6 +34,7 @@
 #include 

 #include "debug/AMDGPUDevice.hh"
+#include "dev/amdgpu/amdgpu_vm.hh"
 #include "dev/amdgpu/interrupt_handler.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
@@ -63,6 +64,8 @@
 if (p.trace_file != "") {
 mmioReader.readMMIOTrace(p.trace_file);
 }
+
+deviceIH->setGPUDevice(this);
 }

 void
@@ -176,15 +179,41 @@
 void
 AMDGPUDevice::readMMIO(PacketPtr pkt, Addr offset)
 {
+Addr aperture = gpuvm.getMmioAperture(offset);
+Addr aperture_offset = offset - aperture;
+
+// By default read from MMIO trace. Overwrite the packet for a select
+// few more dynamic MMIOs.
 DPRINTF(AMDGPUDevice, "Read MMIO %#lx\n", offset);
 mmioReader.readFromTrace(pkt, MMIO_BAR, offset);
+
+switch (aperture) {
+  case GRBM_BASE:
+gpuvm.readMMIO(pkt, aperture_offset >> GRBM_OFFSET_SHIFT);
+break;
+  case MMHUB_BASE:
+gpuvm.readMMIO(pkt, aperture_offset >> MMHUB_OFFSET_SHIFT);
+break;
+  default:
+break;
+}
 }

 void
 AMDGPUDevice::writeFrame(PacketPtr pkt, Addr offset)
 {
 DPRINTF(AMDGPUDevice, "Wrote framebuffer address %#lx\n", offset);
-mmioReader.writeFromTrace(pkt, FRAMEBUFFER_BAR, offset);
+
+Addr aperture = gpuvm.getFrameAperture(offset);
+Addr aperture_offset = offset - aperture;
+
+// Record the value
+frame_regs[aperture_offset] = pkt->getLE();
+if (aperture == gpuvm.gartBase()) {
+DPRINTF(AMDGPUDevice, "GART translation %p -> %p\n",  
aperture_offset,

+bits(frame_regs[aperture_offset],

[gem5-dev] Change in gem5/gem5[develop]: configs: Allow for second disk in GPUFS

2022-03-24 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53071 )


 (

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: configs: Allow for second disk in GPUFS
..

configs: Allow for second disk in GPUFS

Connect the --second-disk option in GPUFS. Typically this is used as a
benchmarks disk image. If the disk is unmounted at the time of
checkpoint, a new disk image can be mounted after restoring the
checkpoint for a simple way to add new benchmarks without recreating a
checkpoint.

Change-Id: I57b31bdf8ec628006d774feacff3fde6f533cd4b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53071
Reviewed-by: Matt Sinclair 
Reviewed-by: Jason Lowe-Power 
Maintainer: Matt Sinclair 
Tested-by: kokoro 
---
M configs/example/gpufs/system/system.py
1 file changed, 24 insertions(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/configs/example/gpufs/system/system.py  
b/configs/example/gpufs/system/system.py

index 2e35373..8ea2cd5 100644
--- a/configs/example/gpufs/system/system.py
+++ b/configs/example/gpufs/system/system.py
@@ -54,7 +54,10 @@

 # Use the common FSConfig to setup a Linux X86 System
 (TestCPUClass, test_mem_mode, FutureClass) =  
Simulation.setCPUClass(args)

-bm = SysConfig(disks=[args.disk_image], mem=args.mem_size)
+disks = [args.disk_image]
+if args.second_disk is not None:
+disks.extend([args.second_disk])
+bm = SysConfig(disks=disks, mem=args.mem_size)
 system = makeLinuxX86System(test_mem_mode, args.num_cpus, bm, True,
   cmdline=cmdline)
 system.workload.object_file = binary(args.kernel)

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I57b31bdf8ec628006d774feacff3fde6f533cd4b
Gerrit-Change-Number: 53071
Gerrit-PatchSet: 18
Gerrit-Owner: Alexandru Duțu 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: configs: Set CPU vendor for GPUFS config

2022-03-24 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53070 )


 (

13 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: configs: Set CPU vendor for GPUFS config
..

configs: Set CPU vendor for GPUFS config

A valid CPU vendor string (i.e., not "M5 Simulator") needs to be passed
to CPUID in order for Linux to create the sysfs files needed for ROCm's
Thunk interface to initialize properly. If these are no created
hipDeviceProperties and other basic GPU code APIs will error out.

Change-Id: I6e3f459162e4673860a8f0a88473e38d5d7be237
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53070
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/example/gpufs/system/system.py
1 file changed, 22 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/configs/example/gpufs/system/system.py  
b/configs/example/gpufs/system/system.py

index 7714f91..2e35373 100644
--- a/configs/example/gpufs/system/system.py
+++ b/configs/example/gpufs/system/system.py
@@ -157,6 +157,10 @@

 system.ruby._cpu_ports[i].connectCpuPorts(cpu)

+for i in range(len(system.cpu)):
+for j in range(len(system.cpu[i].isa)):
+system.cpu[i].isa[j].vendor_string = "AuthenticAMD"
+
 # The shader core will be whatever is after the CPU cores are  
accounted for

 shader_idx = args.num_cpus
 system.cpu.append(shader)

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I6e3f459162e4673860a8f0a88473e38d5d7be237
Gerrit-Change-Number: 53070
Gerrit-PatchSet: 18
Gerrit-Owner: Alexandru Duțu 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Matt Sinclair 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: configs: Connect SDMA, IH, and memory manager in GPUFS

2022-03-24 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53065 )


Change subject: configs: Connect SDMA, IH, and memory manager in GPUFS
..

configs: Connect SDMA, IH, and memory manager in GPUFS

Add the devices that have been added in previous changesets to the
config file. Forward MMIO writes to the appropriate device based
on the MMIO address. Connect doorbells and forward rings to the
appropriate device based on queue type.

Change-Id: I44110c9a24559936102a246c9658abb84a8ce07e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53065
Maintainer: Jason Lowe-Power 
Reviewed-by: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/example/gpufs/system/system.py
M src/dev/amdgpu/amdgpu_device.cc
2 files changed, 74 insertions(+), 0 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/configs/example/gpufs/system/system.py  
b/configs/example/gpufs/system/system.py

index d06cd2c..5b26ce6 100644
--- a/configs/example/gpufs/system/system.py
+++ b/configs/example/gpufs/system/system.py
@@ -98,14 +98,38 @@
 shader.dispatcher = dispatcher
 shader.gpu_cmd_proc = gpu_cmd_proc

+# GPU Interrupt Handler
+device_ih = AMDGPUInterruptHandler()
+system.pc.south_bridge.gpu.device_ih = device_ih
+
+# Setup the SDMA engines
+sdma0_pt_walker = VegaPagetableWalker()
+sdma1_pt_walker = VegaPagetableWalker()
+
+sdma0 = SDMAEngine(walker=sdma0_pt_walker)
+sdma1 = SDMAEngine(walker=sdma1_pt_walker)
+
+system.pc.south_bridge.gpu.sdma0 = sdma0
+system.pc.south_bridge.gpu.sdma1 = sdma1
+
+# GPU data path
+gpu_mem_mgr = AMDGPUMemoryManager()
+system.pc.south_bridge.gpu.memory_manager = gpu_mem_mgr
+
 # GPU, HSAPP, and GPUCommandProc are DMA devices
 system._dma_ports.append(gpu_hsapp)
 system._dma_ports.append(gpu_cmd_proc)
 system._dma_ports.append(system.pc.south_bridge.gpu)
+system._dma_ports.append(sdma0)
+system._dma_ports.append(sdma1)
+system._dma_ports.append(device_ih)

 gpu_hsapp.pio = system.iobus.mem_side_ports
 gpu_cmd_proc.pio = system.iobus.mem_side_ports
 system.pc.south_bridge.gpu.pio = system.iobus.mem_side_ports
+sdma0.pio = system.iobus.mem_side_ports
+sdma1.pio = system.iobus.mem_side_ports
+device_ih.pio = system.iobus.mem_side_ports

 # Create Ruby system using Ruby.py for now
 Ruby.create_system(args, True, system, system.iobus,
diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc

index 40c314d..5265f51 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -227,6 +227,29 @@
 AMDGPUDevice::writeDoorbell(PacketPtr pkt, Addr offset)
 {
 DPRINTF(AMDGPUDevice, "Wrote doorbell %#lx\n", offset);
+
+if (doorbells.find(offset) != doorbells.end()) {
+QueueType q_type = doorbells[offset];
+DPRINTF(AMDGPUDevice, "Doorbell offset %p queue: %d\n",
+  offset, q_type);
+switch (q_type) {
+  case SDMAGfx: {
+SDMAEngine *sdmaEng = getSDMAEngine(offset);
+sdmaEng->processGfx(pkt->getLE());
+  } break;
+  case SDMAPage: {
+SDMAEngine *sdmaEng = getSDMAEngine(offset);
+sdmaEng->processPage(pkt->getLE());
+  } break;
+  case InterruptHandler:
+deviceIH->updateRptr(pkt->getLE());
+break;
+  default:
+panic("Write to unkown queue type!");
+}
+} else {
+warn("Unknown doorbell offset: %lx\n", offset);
+}
 }

 void
@@ -238,6 +261,15 @@
 DPRINTF(AMDGPUDevice, "Wrote MMIO %#lx\n", offset);

 switch (aperture) {
+  /* Write a register to the first System DMA. */
+  case SDMA0_BASE:
+sdma0->writeMMIO(pkt, aperture_offset >> SDMA_OFFSET_SHIFT);
+break;
+  /* Write a register to the second System DMA. */
+  case SDMA1_BASE:
+sdma1->writeMMIO(pkt, aperture_offset >> SDMA_OFFSET_SHIFT);
+break;
+  /* Write a register to the interrupt handler. */
   case IH_BASE:
 deviceIH->writeMMIO(pkt, aperture_offset >> IH_OFFSET_SHIFT);
 break;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I44110c9a24559936102a246c9658abb84a8ce07e
Gerrit-Change-Number: 53065
Gerrit-PatchSet: 19
Gerrit-Owner: Alexandru Duțu 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add checkpoint support to AMDGPUDevice

2022-03-24 Thread Matthew Poremba (Gerrit) via gem5-dev

Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/53069 )


 (

6 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

 )Change subject: dev-amdgpu: Add checkpoint support to AMDGPUDevice
..

dev-amdgpu: Add checkpoint support to AMDGPUDevice

These will be needed for the second checkpoint.

Change-Id: I85ee2cbc0df130868d19376c4d98dbe4d424698e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53069
Reviewed-by: Matt Sinclair 
Maintainer: Matt Sinclair 
Tested-by: kokoro 
---
M src/dev/amdgpu/amdgpu_device.cc
1 file changed, 117 insertions(+), 0 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/amdgpu_device.cc  
b/src/dev/amdgpu/amdgpu_device.cc

index 81fe9f4..7ba4f91 100644
--- a/src/dev/amdgpu/amdgpu_device.cc
+++ b/src/dev/amdgpu/amdgpu_device.cc
@@ -437,6 +437,55 @@
 {
 // Serialize the PciDevice base class
 PciDevice::serialize(cp);
+
+uint64_t regs_size = regs.size();
+uint64_t doorbells_size = doorbells.size();
+uint64_t sdma_engs_size = sdmaEngs.size();
+
+SERIALIZE_SCALAR(regs_size);
+SERIALIZE_SCALAR(doorbells_size);
+SERIALIZE_SCALAR(sdma_engs_size);
+
+// Make a c-style array of the regs to serialize
+uint32_t reg_addrs[regs_size];
+uint64_t reg_values[regs_size];
+uint32_t doorbells_offset[doorbells_size];
+QueueType doorbells_queues[doorbells_size];
+uint32_t sdma_engs_offset[sdma_engs_size];
+int sdma_engs[sdma_engs_size];
+
+int idx = 0;
+for (auto & it : regs) {
+reg_addrs[idx] = it.first;
+reg_values[idx] = it.second;
+++idx;
+}
+
+idx = 0;
+for (auto & it : doorbells) {
+doorbells_offset[idx] = it.first;
+doorbells_queues[idx] = it.second;
+++idx;
+}
+
+idx = 0;
+for (auto & it : sdmaEngs) {
+sdma_engs_offset[idx] = it.first;
+sdma_engs[idx] = it.second == sdma0 ? 0 : 1;
+++idx;
+}
+
+SERIALIZE_ARRAY(reg_addrs, sizeof(reg_addrs)/sizeof(reg_addrs[0]));
+SERIALIZE_ARRAY(reg_values, sizeof(reg_values)/sizeof(reg_values[0]));
+SERIALIZE_ARRAY(doorbells_offset, sizeof(doorbells_offset)/
+sizeof(doorbells_offset[0]));
+SERIALIZE_ARRAY(doorbells_queues, sizeof(doorbells_queues)/
+sizeof(doorbells_queues[0]));
+SERIALIZE_ARRAY(sdma_engs_offset, sizeof(sdma_engs_offset)/
+sizeof(sdma_engs_offset[0]));
+SERIALIZE_ARRAY(sdma_engs, sizeof(sdma_engs)/sizeof(sdma_engs[0]));
+
+// Serialize the device memory
 }

 void
@@ -444,6 +493,59 @@
 {
 // Unserialize the PciDevice base class
 PciDevice::unserialize(cp);
+
+uint64_t regs_size = 0;
+uint64_t doorbells_size = 0;
+uint64_t sdma_engs_size = 0;
+
+UNSERIALIZE_SCALAR(regs_size);
+UNSERIALIZE_SCALAR(doorbells_size);
+UNSERIALIZE_SCALAR(sdma_engs_size);
+
+if (regs_size > 0) {
+uint32_t reg_addrs[regs_size];
+uint64_t reg_values[regs_size];
+
+UNSERIALIZE_ARRAY(reg_addrs,  
sizeof(reg_addrs)/sizeof(reg_addrs[0]));

+UNSERIALIZE_ARRAY(reg_values,
+  sizeof(reg_values)/sizeof(reg_values[0]));
+
+for (int idx = 0; idx < regs_size; ++idx) {
+regs.insert(std::make_pair(reg_addrs[idx], reg_values[idx]));
+}
+}
+
+if (doorbells_size > 0) {
+uint32_t doorbells_offset[doorbells_size];
+QueueType doorbells_queues[doorbells_size];
+
+UNSERIALIZE_ARRAY(doorbells_offset, sizeof(doorbells_offset)/
+sizeof(doorbells_offset[0]));
+UNSERIALIZE_ARRAY(doorbells_queues, sizeof(doorbells_queues)/
+sizeof(doorbells_queues[0]));
+
+for (int idx = 0; idx < doorbells_size; ++idx) {
+regs.insert(std::make_pair(doorbells_offset[idx],
+  doorbells_queues[idx]));
+doorbells[doorbells_offset[idx]] = doorbells_queues[idx];
+}
+}
+
+if (sdma_engs_size > 0) {
+uint32_t sdma_engs_offset[sdma_engs_size];
+int sdma_engs[sdma_engs_size];
+
+UNSERIALIZE_ARRAY(sdma_engs_offset, sizeof(sdma_engs_offset)/
+sizeof(sdma_engs_offset[0]));
+UNSERIALIZE_ARRAY(sdma_engs,  
sizeof(sdma_engs)/sizeof(sdma_engs[0]));

+
+for (int idx = 0; idx < sdma_engs_size; ++idx) {
+SDMAEngine *sdma = sdma_engs[idx] == 0 ? sdma0 : sdma1;
+sdmaEngs.insert(std::make_pair(sdma_engs_offset[idx], sdma));
+}
+}
+
+// Unserialize the device memory
 }

 uint16_t

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[gem5-dev] Build failed in Jenkins: nightly #172

2022-03-24 Thread jenkins-no-reply--- via gem5-dev

See 

Changes:

[mattdsinclair] tests,configs,mem-ruby: Handle num DMAs in GPU Ruby tester

[gabe.black] arch-arm,base: Use SourceLib() in a few simple spots.


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POWER/params/QemuFwCfgItemBytes.hh
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POWER/params/QemuFwCfgItemFile.hh
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfg -> POWER/params/QemuFwCfg.hh
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgIo -> POWER/params/QemuFwCfgIo.hh
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemString -> 
POWER/params/QemuFwCfgItemString.hh
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgMmio -> POWER/params/QemuFwCfgMmio.hh
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgItemString -> 
POWER/python/_m5/param_QemuFwCfgItemString.cc
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfg -> 
POWER/python/_m5/param_QemuFwCfg.cc
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgIo -> 
POWER/python/_m5/param_QemuFwCfgIo.cc
 [ CXX] POWER/python/_m5/param_QemuFwCfgItemFile.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfgItemString.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfg.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfgIo.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfgItem.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfgItemBytes.cc -> .o
 [SO Param] m5.objects.QemuFwCfg, QemuFwCfgMmio -> 
POWER/python/_m5/param_QemuFwCfgMmio.cc
 [ CXX] POWER/dev/qemu/fw_cfg.cc -> .o
 [ CXX] POWER/python/_m5/param_QemuFwCfgMmio.cc -> .o
 [

[gem5-dev] Change in gem5/gem5[develop]: util-m5: Fix Scons exports when building the m5 utility

2022-03-24 Thread Richard Cooper (Gerrit) via gem5-dev

Richard Cooper has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/57909 )


Change subject: util-m5: Fix Scons exports when building the m5 utility
..

util-m5: Fix Scons exports when building the m5 utility

The name of the imported environment in ext/googletest/SConscript was
changed from `main` to `env` in [1].

Updated the `exports` when building the `m5` utility to export the
correct name.

[1] https://gem5-review.googlesource.com/c/public/gem5/+/56750

Change-Id: I195b760e9092fbe63e5de1316403e090c1fa4e1f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57909
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Reviewed-by: Gabe Black 
Tested-by: kokoro 
---
M util/m5/SConstruct
1 file changed, 24 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Gabe Black: Looks good to me, approved
  kokoro: Regressions pass




diff --git a/util/m5/SConstruct b/util/m5/SConstruct
index 941b9fe..62be63c 100644
--- a/util/m5/SConstruct
+++ b/util/m5/SConstruct
@@ -179,7 +179,7 @@

 # Bring in the googletest sources.
 native.SConscript(googletest_dir.File('SConscript'),
-variant_dir=native_dir.Dir('googletest'), exports={ 'main': native  
})
+variant_dir=native_dir.Dir('googletest'), exports={ 'env': native  
})


 native.SConscript(src_dir.File('SConscript.native'),
 variant_dir=native_dir, exports={ 'env': native })
@@ -268,6 +268,6 @@
 # Bring in the googletest sources.
 env.SConscript(googletest_dir.File('SConscript'),
 variant_dir=abi_dir.Dir('googletest'),
-exports={ 'main': env })
+exports='env')
 env.SConscript(src_dir.File('SConscript'),
variant_dir=abi_dir, exports='env')

--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/57909
To unsubscribe, or for help writing mail filters, visit  
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I195b760e9092fbe63e5de1316403e090c1fa4e1f
Gerrit-Change-Number: 57909
Gerrit-PatchSet: 2
Gerrit-Owner: Richard Cooper 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Richard Cooper 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Build failed in Jenkins: nightly #171

2022-03-24 Thread jenkins-no-reply--- via gem5-dev

See 

Changes:

[gabe.black] scons: Add a SourceLib method for adding libs to gem5.

[matthew.poremba] dev-amdgpu: Add aperture base definitions file

[matthew.poremba] dev-amdgpu: Add GPU interrupt handler object

[matthew.poremba] dev-amdgpu: Add memory manager for GPU VRAM

[matthew.poremba] dev-amdgpu: Add SystemHub for GPU load/store to host

[Bobby R. Bruce] stdlib: Add file lock to the resources.json download

[yuhsingw] base: change bitunion default constructor to default

[richard.cooper] cpu: Fix build for MacOS.


--
[...truncated 2.66 MB...]
Starting Test Case: 
test-sparc-insttest-atomic-SPARC-x86_64-opt-MatchStdoutNoPerf
Logging call to command: diff /tmp/gem5out9fmt3z2m/simout 
/nobackup/jenkins/workspace/nightly/tests/gem5/insttest_se/ref/simout
Test: test-sparc-insttest-atomic-SPARC-x86_64-opt-MatchStdoutNoPerf Passed
Logging call to command: 
/nobackup/jenkins/workspace/nightly/build/SPARC/gem5.opt -d 
/tmp/gem5outi7ucihjh -re --silent-redirect 
/nobackup/jenkins/workspace/nightly/tests/gem5/configs/simple_binary_run.py 
sparc-insttest timing --resource-directory 
/nobackup/jenkins/workspace/nightly/tests/gem5/resources
Starting Test Suite: test-sparc-insttest-timing-SPARC-x86_64-opt 
Starting Test Case: test-sparc-insttest-timing-SPARC-x86_64-opt
Test: test-sparc-insttest-timing-SPARC-x86_64-opt Passed
Starting Test Case: 
test-sparc-insttest-timing-SPARC-x86_64-opt-MatchStdoutNoPerf
Logging call to command: diff /tmp/gem5out9fmt3z2m/simout 
/nobackup/jenkins/workspace/nightly/tests/gem5/insttest_se/ref/simout
Test: test-sparc-insttest-timing-SPARC-x86_64-opt-MatchStdoutNoPerf Passed
Logging call to command: 
/nobackup/jenkins/workspace/nightly/build/GCN3_X86_MSI/gem5.opt -d 
/tmp/gem5outjctlavnw -re --silent-redirect 
/nobackup/jenkins/workspace/nightly/configs/learning_gem5/part3/simple_ruby.py
Starting Test Suite: simple_ruby_test-GCN3_X86-x86_64-opt-MSI 
Starting Test Case: simple_ruby_test-GCN3_X86-x86_64-opt-MSI
Test: simple_ruby_test-GCN3_X86-x86_64-opt-MSI Passed
Starting Test Case: simple_ruby_test-GCN3_X86-x86_64-opt-MSI-MatchStdoutNoPerf
Logging call to command: diff /tmp/gem5outjctlavnw/simout 
/nobackup/jenkins/workspace/nightly/tests/gem5/learning_gem5/ref/threads
Test: simple_ruby_test-GCN3_X86-x86_64-opt-MSI-MatchStdoutNoPerf Passed
Logging call to command: 
/nobackup/jenkins/workspace/nightly/build/GCN3_X86_MSI/gem5.opt -d 
/tmp/gem5outydusgmiv -re --silent-redirect 
/nobackup/jenkins/workspace/nightly/configs/learning_gem5/part3/ruby_test.py
Starting Test Suite: ruby_test_test-GCN3_X86-x86_64-opt-MSI 
Starting Test Case: ruby_test_test-GCN3_X86-x86_64-opt-MSI
Test: ruby_test_test-GCN3_X86-x86_64-opt-MSI Passed
Starting Test Case: ruby_test_test-GCN3_X86-x86_64-opt-MSI-MatchStdout
Logging call to command: diff /tmp/gem5outydusgmiv/simout 
/nobackup/jenkins/workspace/nightly/tests/gem5/learning_gem5/ref/test
Test: ruby_test_test-GCN3_X86-x86_64-opt-MSI-MatchStdout Passed
Test: build-X86-opt Passed
Test: build-SPARC-opt Passed
Test: build-MIPS-opt Passed
Test: build-POWER-opt Passed
Logging call to command: 
/nobackup/jenkins/workspace/nightly/build/NULL_MESI_Two_Level/gem5.opt -d 
/tmp/gem5out_kgzo_56 -re --silent-redirect 
/nobackup/jenkins/workspace/nightly/tests/gem5/traffic_gen/simple_traffic_run.py
 LinearGenerator 1 MESITwoLevel gem5.components.memory SingleChannelDDR3_1600 
512MiB
Starting Test Suite: build-X86-opt 
Starting Test Case: build-X86-opt
Starting Test Suite: build-SPARC-opt 
Starting Test Case: build-SPARC-opt
Starting Test Suite: build-MIPS-opt 
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Starting Test Suite: build-POWER-opt 
Starting Test Case: build-POWER-opt
Starting Test Suite: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_1600-512MiB-NULL-x86_64-opt-MESI_Two_Level
 
Starting Test Case: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_1600-512MiB-NULL-x86_64-opt-MESI_Two_Level
Test: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_1600-512MiB-NULL-x86_64-opt-MESI_Two_Level
 Passed
Logging call to command: 
/nobackup/jenkins/workspace/nightly/build/NULL_MESI_Two_Level/gem5.opt -d 
/tmp/gem5outxppqxrlo -re --silent-redirect 
/nobackup/jenkins/workspace/nightly/tests/gem5/traffic_gen/simple_traffic_run.py
 LinearGenerator 1 MESITwoLevel gem5.components.memory SingleChannelDDR3_2133 
512MiB
Starting Test Suite: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_2133-512MiB-NULL-x86_64-opt-MESI_Two_Level
 
Starting Test Case: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_2133-512MiB-NULL-x86_64-opt-MESI_Two_Level
Test: 
test-memory-LinearGenerator-1-MESITwoLevel-gem5.components.memory-SingleChannelDDR3_2133-512MiB-NULL-x86_64-opt-MESI_Two_Level
 Passed
Logging call to

[gem5-dev] Build failed in Jenkins: compiler-checks #182

2022-03-24 Thread jenkins-no-reply--- via gem5-dev

See 


Changes:

[mattdsinclair] tests,configs,mem-ruby: Handle num DMAs in GPU Ruby tester

[gabe.black] arch-arm,base: Use SourceLib() in a few simple spots.


--
Started by timer
Running as SYSTEM
Building in workspace 
The recommended git tool is: NONE
No credentials specified
 > git rev-parse --resolve-git-dir 
 >  # timeout=10
Fetching changes from the remote Git repository
 > git config remote.origin.url https://gem5.googlesource.com/public/gem5 # 
 > timeout=10
Fetching upstream changes from https://gem5.googlesource.com/public/gem5
 > git --version # timeout=10
 > git --version # 'git version 2.25.1'
 > git fetch --tags --force --progress -- 
 > https://gem5.googlesource.com/public/gem5 
 > +refs/heads/*:refs/remotes/origin/* # timeout=10
 > git rev-parse refs/remotes/origin/develop^{commit} # timeout=10
Checking out Revision c11dc40f069004d7c9ee046ab1ee37e0ca630564 
(refs/remotes/origin/develop)
 > git config core.sparsecheckout # timeout=10
 > git checkout -f c11dc40f069004d7c9ee046ab1ee37e0ca630564 # timeout=10
Commit message: "arch-arm,base: Use SourceLib() in a few simple spots."
 > git rev-list --no-walk 48ed8407c90f8aa93b6720b6b7bc1bc030dbeaed # timeout=10
[Checks API] No suitable checks publisher found.
[compiler-checks] $ /bin/sh -xe /tmp/jenkins8053358665556104525.sh
+ ./tests/compiler-tests.sh -j 16
Starting build tests with 'gcc-version-11'...
'gcc-version-11' was found in the comprehensive tests. All ISAs will be built.
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  * Building target 'X86_MI_example.opt' with 'gcc-version-11'...
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  * Building target 'ARM.opt' with 'gcc-version-11'...
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  * Building target 'ARM.fast' with 'gcc-version-11'...
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  * Building target 'GCN3_X86.opt' with 'gcc-version-11'...
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  * Building target 'SPARC.opt' with 'gcc-version-10'...
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  * Building target 'SPARC.fast' with 'gcc-version-10'...
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Starting build tests with 'gcc-version-8'...
  * Building target 'ARM.opt' with 'gcc-version-8'...
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  * Building target 'ARM.fast' with 'gcc-version-8'...
Done.
Starting build tests with 'gcc-version-7'...
  *

[gem5-dev] Build failed in Jenkins: weekly #36

2022-03-24 Thread jenkins-no-reply--- via gem5-dev

See 

Changes:

[Bobby R. Bruce] tests: Add 'kvm' tag to tests

[Bobby R. Bruce] tests,ext: Fix so ex/include regex are applied after defaults

[Bobby R. Bruce] tests: Add KVM Tests to the nightly run

[gabe.black] arch-vega: Replace deprecated Stats namespace recently 
reintroduced.

[matthew.poremba] arch-vega: Mark global instructions executed as global

[mattdsinclair] configs, gpu-compute: change default GPU reg allocator to 
dynamic

[gabe.black] arch-x86: Implement IntCSCheck for legacy mode.

[gabe.black] arch-x86: Use push_state in the microcode assembler.

[gabe.black] arch: Switch to a new state to process macrocoop headers.

[gabe.black] arch-x86: Remove __init__ from the X86MicrocodeRom class.

[gabe.black] arch,arch-x86: Consolidate the add_microop method.

[gabe.black] arch:arch-x86: Fix style of some classes in the ucode assembler.

[gabe.black] arch-x86: Add some missing checks to STI and CLI.

[Giacomo Travaglini] util: Remove python3-six package from dockerfiles

[wlm199558] sim-se: add getrandom() syscall support

[gabe.black] scons: Add a SourceLib method for adding libs to gem5.

[matthew.poremba] dev-amdgpu: Add aperture base definitions file

[matthew.poremba] dev-amdgpu: Add GPU interrupt handler object

[matthew.poremba] dev-amdgpu: Add memory manager for GPU VRAM

[matthew.poremba] dev-amdgpu: Add SystemHub for GPU load/store to host

[Bobby R. Bruce] stdlib: Add file lock to the resources.json download

[yuhsingw] base: change bitunion default constructor to default

[richard.cooper] cpu: Fix build for MacOS.


--
[...truncated 597.63 KB...]
 [SO Param] m5.objects.TrafficGen, TrafficGen -> GCN3_X86/params/TrafficGen.hh
 [SO Param] m5.objects.SimObject, SimObject -> 
GCN3_X86/python/_m5/param_SimObject.cc
 [ENUMDECL] m5.objects.FuncUnit, OpClass -> GCN3_X86/enums/OpClass.hh
 [SO Param] m5.objects.ClockedObject, ClockedObject -> 
GCN3_X86/python/_m5/param_ClockedObject.cc
 [SO Param] m5.objects.RubySystem, RubySystem -> GCN3_X86/params/RubySystem.hh
 [SO Param] m5.objects.MemCtrl, MemCtrl -> GCN3_X86/python/_m5/param_MemCtrl.cc
 [SO Param] m5.objects.BasicRouter, BasicRouter -> 
GCN3_X86/params/BasicRouter.hh
 [SO Param] m5.objects.SimObject, SimObject -> GCN3_X86/params/SimObject.hh
 [SO Param] m5.objects.HelloObject, GoodbyeObject -> 
GCN3_X86/params/GoodbyeObject.hh
 [SO Param] m5.objects.MemTraceProbe, MemTraceProbe -> 
GCN3_X86/params/MemTraceProbe.hh
 [SO Param] m5.objects.GPU, DynPoolManager -> GCN3_X86/params/DynPoolManager.hh
 [SO Param] m5.objects.TesterThread, TesterThread -> 
GCN3_X86/python/_m5/param_TesterThread.cc
 [SO Param] m5.objects.Prefetcher, StridePrefetcherHashedSetAssociative -> 
GCN3_X86/params/StridePrefetcherHashedSetAssociative.hh
 [SO Param] m5.objects.GPU, GPUCommandProcessor -> 
GCN3_X86/python/_m5/param_GPUCommandProcessor.cc
 [SO Param] m5.objects.Ethernet, EtherSwitch -> GCN3_X86/params/EtherSwitch.hh
 [SO Param] m5.objects.Compressors, Base32Delta16 -> 
GCN3_X86/params/Base32Delta16.hh
 [SO Param] m5.objects.RubyDirectedTester, InvalidateGenerator -> 
GCN3_X86/params/InvalidateGenerator.hh
 [SO Param] m5.objects.BranchPredictor, MPP_LoopPredictor_8KB -> 
GCN3_X86/python/_m5/param_MPP_LoopPredictor_8KB.cc
 [SO Param] m5.objects.PowerState, PowerState -> 
GCN3_X86/python/_m5/param_PowerState.cc
 [SO Param] m5.objects.GPUCoalescer, RubyGPUCoalescer -> 
GCN3_X86/python/_m5/param_RubyGPUCoalescer.cc
 [ENUM STR] m5.objects.IntelMP, X86IntelMPRangeList -> 
GCN3_X86/enums/X86IntelMPRangeList.cc
 [ENUM STR] m5.objects.Graphics, ImageFormat -> GCN3_X86/enums/ImageFormat.cc
 [SO Param] m5.objects.IntelMP, X86IntelMPBusHierarchy -> 
GCN3_X86/params/X86IntelMPBusHierarchy.hh
 [SO Param] m5.objects.VegaGPUTLB, VegaGPUTLB -> 
GCN3_X86/python/_m5/param_VegaGPUTLB.cc
 [SO Param] m5.objects.DiskImage, CowDiskImage -> 
GCN3_X86/params/CowDiskImage.hh
 [SO Param] m5.objects.HelloObject, HelloObject -> 
GCN3_X86/python/_m5/param_HelloObject.cc
 [SO Param] m5.objects.BasicLink, BasicLink -> GCN3_X86/params/BasicLink.hh
 [SO Param] m5.objects.AddrMapper, RangeAddrMapper -> 
GCN3_X86/params/RangeAddrMapper.hh
 [SO Param] m5.objects.SouthBridge, SouthBridge -> 
GCN3_X86/params/SouthBridge.hh
 [SO Param] m5.objects.SMBios, X86SMBiosSMBiosTable -> 
GCN3_X86/params/X86SMBiosSMBiosTable.hh
 [SO Param] m5.objects.QoSMemCtrl, QoSMemCtrl -> GCN3_X86/params/QoSMemCtrl.hh
 [SO Param] m5.objects.ReplacementPolicies, TreePLRURP -> 
GCN3_X86/params/TreePLRURP.hh
 [SO Param] m5.objects.VegaGPUTLB, VegaGPUTLB -> GCN3_X86/params/VegaGPUTLB.hh
 [SO Param] m5.objects.PyTrafficGen, PyTrafficGen -> 
GCN3_X86/python/_m5/param_PyTrafficGen.cc
 [SO Param] m5.objects.GPUCoalescer, RubyGPUCoalescer -> 
GCN3_X86/params/RubyGPUCoalescer.hh
 [SO Param] m5.objects.ReplacementPolicies, LFURP -> GCN3_X86/params/LFURP.hh
 [SO Param] m5.objects.DiskImage, RawDiskImage ->

[gem5-dev] Change in gem5/gem5[develop]: configs: Update memory port name in Ruby

[gem5-dev] Change in gem5/gem5[develop]: configs: Python 3.2+ requires additional flag for makedirs

[gem5-dev] Change in gem5/gem5[develop]: scons: Remove the default-default build target.

[gem5-dev] Change in gem5/gem5[develop]: scons: Flesh out the help text for "magic" targets.

[gem5-dev] Re: Build failed in Jenkins: nightly #172

[gem5-dev] Change in gem5/gem5[develop]: tests: Increase test Dockers' memory limit to 18GB

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Remove unused variables in src/dev/amdgpu

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add braces to stop clang compilation braces error

[gem5-dev] Change in gem5/gem5[develop]: scons: Don't accumulate SLICC_INCLUDES.

[gem5-dev] Change in gem5/gem5[develop]: dev-arm: Rename GenericTimer interrupts

[gem5-dev] Change in gem5/gem5[develop]: arch-arm, dev-arm: Implement EL2 Non-secure Virtual Timer

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add VM class for apertures, TranslationGens

[gem5-dev] Change in gem5/gem5[develop]: configs: Allow for second disk in GPUFS

[gem5-dev] Change in gem5/gem5[develop]: configs: Set CPU vendor for GPUFS config

[gem5-dev] Change in gem5/gem5[develop]: configs: Connect SDMA, IH, and memory manager in GPUFS

[gem5-dev] Change in gem5/gem5[develop]: dev-amdgpu: Add checkpoint support to AMDGPUDevice

[gem5-dev] Build failed in Jenkins: nightly #172

[gem5-dev] Change in gem5/gem5[develop]: util-m5: Fix Scons exports when building the m5 utility

[gem5-dev] Build failed in Jenkins: nightly #171

[gem5-dev] Build failed in Jenkins: compiler-checks #182

[gem5-dev] Build failed in Jenkins: weekly #36

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