[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Rename WriteMask::cmpMask to containsMask
Gabriel Busnot has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/46560 )
Change subject: mem-ruby: Rename WriteMask::cmpMask to containsMask
..
mem-ruby: Rename WriteMask::cmpMask to containsMask
Avoids confusion as the function tests for inclusions and not for equality.
Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46560
Reviewed-by: Jason Lowe-Power
Reviewed-by: Tiago Mück
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/mem/ruby/common/WriteMask.hh
M src/mem/ruby/protocol/GPU_VIPER-TCP.sm
M src/mem/ruby/protocol/RubySlicc_Exports.sm
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
5 files changed, 5 insertions(+), 5 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve; Looks
good to me, approved
Tiago Mück: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/ruby/common/WriteMask.hh
b/src/mem/ruby/common/WriteMask.hh
index 895584a..1cb3f46 100644
--- a/src/mem/ruby/common/WriteMask.hh
+++ b/src/mem/ruby/common/WriteMask.hh
@@ -126,7 +126,7 @@
}
bool
-cmpMask(const WriteMask ) const
+containsMask(const WriteMask ) const
{
bool tmp = true;
assert(mSize == readMask.mSize);
diff --git a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
index 5e987c8..a231da4 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
@@ -362,7 +362,7 @@
action(norl_issueRdBlkOrloadDone, "norl", desc="local load done") {
peek(mandatoryQueue_in, RubyRequest){
- if (cache_entry.writeMask.cmpMask(in_msg.writeMask)) {
+ if (cache_entry.writeMask.containsMask(in_msg.writeMask)) {
if (use_seq_not_coal) {
sequencer.readCallback(address, cache_entry.DataBlk, false,
MachineType:L1Cache);
} else {
diff --git a/src/mem/ruby/protocol/RubySlicc_Exports.sm
b/src/mem/ruby/protocol/RubySlicc_Exports.sm
index 7706f57..cea6c04 100644
--- a/src/mem/ruby/protocol/RubySlicc_Exports.sm
+++ b/src/mem/ruby/protocol/RubySlicc_Exports.sm
@@ -54,7 +54,7 @@
structure(WriteMask, external="yes", desc="...") {
void clear();
- bool cmpMask(WriteMask);
+ bool containsMask(WriteMask);
bool isEmpty();
bool isFull();
bool isOverlap(WriteMask);
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
index 40f33ce..adf4e1c 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@
WriteMask test_mask := mask;
test_mask.orMask(read_mask);
- if ((mask.cmpMask(test_mask) == false) || dirty) {
+ if ((mask.containsMask(test_mask) == false) || dirty) {
if (from_tbe) {
if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm
b/src/mem/ruby/protocol/chi/CHI-msg.sm
index 22fc508..19cf343 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
assert(bitMask.isEmpty() == false);
WriteMask test_mask := mask;
test_mask.orMask(bitMask);
-if ((mask.cmpMask(test_mask) == false) || is_dirty) {
+if ((mask.containsMask(test_mask) == false) || is_dirty) {
if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
mask.orMask(bitMask);
return true;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/46560
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Gerrit-Change-Number: 46560
Gerrit-PatchSet: 2
Gerrit-Owner: Gabriel Busnot
Gerrit-Reviewer: Gabriel Busnot
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Tiago Mück
Gerrit-Reviewer: kokoro
Gerrit-CC: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix wrong test in CHI functional reads
Gabriel Busnot has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/46559 )
Change subject: mem-ruby: Fix wrong test in CHI functional reads
..
mem-ruby: Fix wrong test in CHI functional reads
A bad write mask inclusion test in CHI cache functionalRead and CHI data
message
functionalRead was causing clean data not to be read in some cases. The
issue is
detailed in issue GEM5-1002.
Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46559
Reviewed-by: Jason Lowe-Power
Reviewed-by: Tiago Mück
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
2 files changed, 2 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve; Looks
good to me, approved
Tiago Mück: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
index db008b0..40f33ce 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@
WriteMask test_mask := mask;
test_mask.orMask(read_mask);
- if ((test_mask.cmpMask(mask) == false) || dirty) {
+ if ((mask.cmpMask(test_mask) == false) || dirty) {
if (from_tbe) {
if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm
b/src/mem/ruby/protocol/chi/CHI-msg.sm
index d51fb76..22fc508 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
assert(bitMask.isEmpty() == false);
WriteMask test_mask := mask;
test_mask.orMask(bitMask);
-if ((test_mask.cmpMask(mask) == false) || is_dirty) {
+if ((mask.cmpMask(test_mask) == false) || is_dirty) {
if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
mask.orMask(bitMask);
return true;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/46559
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Gerrit-Change-Number: 46559
Gerrit-PatchSet: 2
Gerrit-Owner: Gabriel Busnot
Gerrit-Reviewer: Gabriel Busnot
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Tiago Mück
Gerrit-Reviewer: kokoro
Gerrit-CC: Giacomo Travaglini
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix RubySystem::functionalRead with partial data
Gabriel Busnot has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/46561 )
Change subject: mem-ruby: Fix RubySystem::functionalRead with partial data
..
mem-ruby: Fix RubySystem::functionalRead with partial data
Some protocol other than CHI require the read-write and/or read-only and/or
backing-store controller's buffers to be checked if the system is busy.
More details in issue GEM5-1000
Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46561
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/mem/ruby/system/RubySystem.cc
1 file changed, 10 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/ruby/system/RubySystem.cc
b/src/mem/ruby/system/RubySystem.cc
index 239b652..caee770 100644
--- a/src/mem/ruby/system/RubySystem.cc
+++ b/src/mem/ruby/system/RubySystem.cc
@@ -651,13 +651,21 @@
for (auto ctrl : ctrl_ro)
ctrl->functionalRead(line_address, pkt, bytes);
-ctrl_bs->functionalRead(line_address, pkt, bytes);
+if (ctrl_bs)
+ctrl_bs->functionalRead(line_address, pkt, bytes);
// if there is any busy controller or bytes still not set, then a
partial
// and/or dirty copy of the line might be in a message buffer or the
// network
if (!ctrl_busy.empty() || !bytes.isFull()) {
-DPRINTF(RubySystem, "Reading from busy controllers and network\n");
+DPRINTF(RubySystem, "Reading from remaining controllers, "
+"buffers and networks\n");
+if (ctrl_rw != nullptr)
+ctrl_rw->functionalReadBuffers(pkt, bytes);
+for (auto ctrl : ctrl_ro)
+ctrl->functionalReadBuffers(pkt, bytes);
+if (ctrl_bs != nullptr)
+ctrl_bs->functionalReadBuffers(pkt, bytes);
for (auto ctrl : ctrl_busy) {
ctrl->functionalRead(line_address, pkt, bytes);
ctrl->functionalReadBuffers(pkt, bytes);
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/46561
To unsubscribe, or for help writing mail filters, visit
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Gerrit-Change-Number: 46561
Gerrit-PatchSet: 4
Gerrit-Owner: Gabriel Busnot
Gerrit-Reviewer: Gabriel Busnot
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix RubySystem::functionalRead with partial data
Gabriel Busnot has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/46561 )
Change subject: mem-ruby: Fix RubySystem::functionalRead with partial data
..
mem-ruby: Fix RubySystem::functionalRead with partial data
Some protocol other than CHI require the read-write and/or read-only and/or
backing-store controller's buffers to be checked if the system is busy.
More details in issue GEM5-1000
Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
---
M src/mem/ruby/system/RubySystem.cc
1 file changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/mem/ruby/system/RubySystem.cc
b/src/mem/ruby/system/RubySystem.cc
index 239b652..2129e53 100644
--- a/src/mem/ruby/system/RubySystem.cc
+++ b/src/mem/ruby/system/RubySystem.cc
@@ -657,6 +657,12 @@
// and/or dirty copy of the line might be in a message buffer or the
// network
if (!ctrl_busy.empty() || !bytes.isFull()) {
+if (ctrl_rw != nullptr)
+ctrl_rw->functionalReadBuffers(pkt, bytes);
+for (auto ctrl : ctrl_ro)
+ctrl->functionalReadBuffers(pkt, bytes);
+if (ctrl_bs != nullptr)
+ctrl_bs->functionalReadBuffers(pkt, bytes);
DPRINTF(RubySystem, "Reading from busy controllers and network\n");
for (auto ctrl : ctrl_busy) {
ctrl->functionalRead(line_address, pkt, bytes);
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/46561
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Gerrit-Change-Number: 46561
Gerrit-PatchSet: 1
Gerrit-Owner: Gabriel Busnot
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Rename WriteMask::cmpMask to containsMask
Gabriel Busnot has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/46560 )
Change subject: mem-ruby: Rename WriteMask::cmpMask to containsMask
..
mem-ruby: Rename WriteMask::cmpMask to containsMask
Avoids confusion as the function tests for inclusions and not for equality.
Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
---
M src/mem/ruby/common/WriteMask.hh
M src/mem/ruby/protocol/GPU_VIPER-TCP.sm
M src/mem/ruby/protocol/RubySlicc_Exports.sm
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mem/ruby/common/WriteMask.hh
b/src/mem/ruby/common/WriteMask.hh
index 895584a..1cb3f46 100644
--- a/src/mem/ruby/common/WriteMask.hh
+++ b/src/mem/ruby/common/WriteMask.hh
@@ -126,7 +126,7 @@
}
bool
-cmpMask(const WriteMask ) const
+containsMask(const WriteMask ) const
{
bool tmp = true;
assert(mSize == readMask.mSize);
diff --git a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
index 5e987c8..a231da4 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
@@ -362,7 +362,7 @@
action(norl_issueRdBlkOrloadDone, "norl", desc="local load done") {
peek(mandatoryQueue_in, RubyRequest){
- if (cache_entry.writeMask.cmpMask(in_msg.writeMask)) {
+ if (cache_entry.writeMask.containsMask(in_msg.writeMask)) {
if (use_seq_not_coal) {
sequencer.readCallback(address, cache_entry.DataBlk, false,
MachineType:L1Cache);
} else {
diff --git a/src/mem/ruby/protocol/RubySlicc_Exports.sm
b/src/mem/ruby/protocol/RubySlicc_Exports.sm
index 7706f57..cea6c04 100644
--- a/src/mem/ruby/protocol/RubySlicc_Exports.sm
+++ b/src/mem/ruby/protocol/RubySlicc_Exports.sm
@@ -54,7 +54,7 @@
structure(WriteMask, external="yes", desc="...") {
void clear();
- bool cmpMask(WriteMask);
+ bool containsMask(WriteMask);
bool isEmpty();
bool isFull();
bool isOverlap(WriteMask);
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
index 40f33ce..adf4e1c 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@
WriteMask test_mask := mask;
test_mask.orMask(read_mask);
- if ((mask.cmpMask(test_mask) == false) || dirty) {
+ if ((mask.containsMask(test_mask) == false) || dirty) {
if (from_tbe) {
if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm
b/src/mem/ruby/protocol/chi/CHI-msg.sm
index 22fc508..19cf343 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
assert(bitMask.isEmpty() == false);
WriteMask test_mask := mask;
test_mask.orMask(bitMask);
-if ((mask.cmpMask(test_mask) == false) || is_dirty) {
+if ((mask.containsMask(test_mask) == false) || is_dirty) {
if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
mask.orMask(bitMask);
return true;
--
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Gerrit-Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Gerrit-Change-Number: 46560
Gerrit-PatchSet: 1
Gerrit-Owner: Gabriel Busnot
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix wrong test in CHI functional reads
Gabriel Busnot has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/46559 )
Change subject: mem-ruby: Fix wrong test in CHI functional reads
..
mem-ruby: Fix wrong test in CHI functional reads
A bad write mask inclusion test in CHI cache functionalRead and CHI data
message
functionalRead was causing clean data not to be read in some cases. The
issue is
detailed in issue GEM5-1002.
Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
---
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
index db008b0..40f33ce 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@
WriteMask test_mask := mask;
test_mask.orMask(read_mask);
- if ((test_mask.cmpMask(mask) == false) || dirty) {
+ if ((mask.cmpMask(test_mask) == false) || dirty) {
if (from_tbe) {
if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm
b/src/mem/ruby/protocol/chi/CHI-msg.sm
index d51fb76..22fc508 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
assert(bitMask.isEmpty() == false);
WriteMask test_mask := mask;
test_mask.orMask(bitMask);
-if ((test_mask.cmpMask(mask) == false) || is_dirty) {
+if ((mask.cmpMask(test_mask) == false) || is_dirty) {
if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
mask.orMask(bitMask);
return true;
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/46559
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Gerrit-Change-Number: 46559
Gerrit-PatchSet: 1
Gerrit-Owner: Gabriel Busnot
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: misc: Replace assert with gem5_assert
Gabriel Busnot has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/45028 ) Change subject: misc: Replace assert with gem5_assert .. misc: Replace assert with gem5_assert Replacement performed with a basic sed plus some filtering not affect the use of the verb assert in comments. cassert is no longer included when gem5_assert only is used. Change-Id: Ide2718de8c987f6ab2bed084efc68f8aa75f17de --- M src/arch/amdgpu/gcn3/gpu_mem_helpers.hh M src/arch/amdgpu/gcn3/insts/inst_util.hh M src/arch/amdgpu/gcn3/insts/instructions.cc M src/arch/amdgpu/gcn3/insts/instructions.hh M src/arch/amdgpu/gcn3/insts/op_encodings.cc M src/arch/amdgpu/gcn3/operand.hh M src/arch/amdgpu/vega/gpu_mem_helpers.hh M src/arch/amdgpu/vega/insts/inst_util.hh M src/arch/amdgpu/vega/insts/instructions.cc M src/arch/amdgpu/vega/insts/instructions.hh M src/arch/amdgpu/vega/insts/op_encodings.cc M src/arch/amdgpu/vega/operand.hh M src/arch/arm/decoder.cc M src/arch/arm/fastmodel/CortexR52/cortex_r52.cc M src/arch/arm/fastmodel/iris/thread_context.cc M src/arch/arm/fastmodel/iris/tlb.cc M src/arch/arm/faults.cc M src/arch/arm/htm.cc M src/arch/arm/insts/fplib.cc M src/arch/arm/insts/macromem.cc M src/arch/arm/insts/mem.hh M src/arch/arm/insts/mem64.hh M src/arch/arm/insts/misc64.hh M src/arch/arm/insts/neon64_mem.hh M src/arch/arm/insts/pred_inst.hh M src/arch/arm/insts/static_inst.cc M src/arch/arm/insts/sve.cc M src/arch/arm/insts/sve_macromem.hh M src/arch/arm/insts/tme64ruby.cc M src/arch/arm/insts/vfp.cc M src/arch/arm/interrupts.hh M src/arch/arm/isa.cc M src/arch/arm/isa.hh M src/arch/arm/isa_device.cc M src/arch/arm/kvm/arm_cpu.cc M src/arch/arm/kvm/gic.cc M src/arch/arm/linux/fs_workload.cc M src/arch/arm/linux/se_workload.cc M src/arch/arm/locked_mem.hh M src/arch/arm/mmu.hh M src/arch/arm/nativetrace.cc M src/arch/arm/pauth_helpers.cc M src/arch/arm/pmu.cc M src/arch/arm/pmu.hh M src/arch/arm/regs/int.hh M src/arch/arm/regs/misc.cc M src/arch/arm/semihosting.cc M src/arch/arm/stage2_lookup.cc M src/arch/arm/stage2_mmu.cc M src/arch/arm/system.hh M src/arch/arm/table_walker.cc M src/arch/arm/table_walker.hh M src/arch/arm/tlb.cc M src/arch/arm/tracers/tarmac_parser.cc M src/arch/arm/tracers/tarmac_parser.hh M src/arch/arm/utility.cc M src/arch/generic/memhelpers.hh M src/arch/generic/vec_pred_reg.hh M src/arch/mips/interrupts.cc M src/arch/mips/tlb.cc M src/arch/power/interrupts.hh M src/arch/power/tlb.cc M src/arch/riscv/decoder.cc M src/arch/riscv/interrupts.hh M src/arch/riscv/isa.cc M src/arch/riscv/pagetable_walker.cc M src/arch/riscv/tlb.cc M src/arch/sparc/faults.cc M src/arch/sparc/insts/micro.hh M src/arch/sparc/interrupts.hh M src/arch/sparc/isa.cc M src/arch/sparc/isa.hh M src/arch/sparc/nativetrace.cc M src/arch/sparc/pagetable.hh M src/arch/sparc/process.cc M src/arch/sparc/tlb.cc M src/arch/sparc/ua2005.cc M src/arch/x86/bios/acpi.cc M src/arch/x86/bios/e820.cc M src/arch/x86/bios/smbios.cc M src/arch/x86/cpuid.cc M src/arch/x86/decoder.cc M src/arch/x86/decoder.hh M src/arch/x86/emulenv.cc M src/arch/x86/faults.cc M src/arch/x86/fs_workload.cc M src/arch/x86/insts/macroop.hh M src/arch/x86/insts/microldstop.hh M src/arch/x86/insts/static_inst.cc M src/arch/x86/interrupts.cc M src/arch/x86/isa.cc M src/arch/x86/linux/syscalls.cc M src/arch/x86/pagetable_walker.cc M src/arch/x86/process.cc M src/arch/x86/regs/misc.hh M src/arch/x86/tlb.cc M src/arch/x86/x86_traits.hh M src/base/SConscript M src/base/bitfield.hh M src/base/cast.hh M src/base/chunk_generator.hh M src/base/circular_queue.hh M src/base/debug.test.cc M src/base/filters/base.hh M src/base/filters/block_bloom_filter.cc M src/base/filters/bulk_bloom_filter.cc M src/base/filters/multi_bloom_filter.cc M src/base/framebuffer.hh M src/base/gtest/logging_mock.cc M src/base/inet.cc M src/base/intmath.hh M src/base/loader/elf_object.cc M src/base/loader/image_file_data.cc M src/base/pixel.cc M src/base/sat_counter.hh M src/base/sat_counter.test.cc M src/base/socket.test.cc M src/base/statistics.cc M src/base/statistics.hh M src/base/stats/hdf5.cc M src/base/stats/storage.cc M src/base/stats/storage.hh M src/base/stats/storage.test.cc M src/base/stats/text.cc M src/base/trie.hh M src/base/types.hh M src/base/vnc/vncinput.cc M src/base/vnc/vncserver.cc M src/cpu/activity.cc M src/cpu/base.cc M src/cpu/base.hh M src/cpu/checker/cpu.cc M src/cpu/checker/cpu.hh M src/cpu/inst_res.hh M src/cpu/kvm/base.cc M src/cpu/kvm/device.cc M src/cpu/kvm/perfevent.cc M src/cpu/kvm/timer.cc M src/cpu/kvm/vm.cc M src/cpu/kvm/x86_cpu.cc M src/cpu/minor/buffers.hh M src/cpu/minor/cpu.cc M src/cpu/minor/decode.cc M src/cpu/minor/dyn_inst.cc M src/cpu/minor/dyn_inst.hh M src/cpu/minor/exec_context.hh M src/cpu/minor/execute.cc M src/cpu/minor/fetch1.cc M src/cpu/minor/fetch2.cc M src/cpu/minor/lsq.cc M src/cpu/minor/pipe_data.cc M src/cpu/o3/commit_impl.hh M
[gem5-dev] Change in gem5/gem5[develop]: base: Define the gem5_assert macro
Gabriel Busnot has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/45027 )
Change subject: base: Define the gem5_assert macro
..
base: Define the gem5_assert macro
gem5_assert is a drop-in replacement for regular assert.
Change-Id: Icad1719c0e6fbb066471d1fecfb12eedd65aa690
---
M src/base/logging.hh
M src/base/logging.test.cc
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/src/base/logging.hh b/src/base/logging.hh
index 650aecd..20d7ecb 100644
--- a/src/base/logging.hh
+++ b/src/base/logging.hh
@@ -299,4 +299,27 @@
} while (0)
#endif // NDEBUG
/** @} */ // end of api_logger
+
+/**
+ * The assert macro will function like a normal assert, but will use panic
+ * instead of straight abort(). This allows to perform some cleaning up in
+ * ExitLogger::exit() before calling abort(). This macro is not active in
fast
+ * builds.
+ *
+ * @param cond Condition that is checked; if false -> panic
+ *
+ * \def gem5_assert(cond)
+ *
+ * @ingroup api_logger
+ */
+#ifdef NDEBUG
+// Fallback to regular gem5_assert behavior (normally, do nothing)
+#define gem5_assert(cond) assert(cond)
+#else //!NDEBUG
+#define gem5_assert(cond) \
+(static_cast(cond) ? \
+void (0) : \
+[]{panic(std::string("(") + #cond + ") failed");}())
+#endif // NDEBUG
+/** @} */ // end of api_logger
#endif // __BASE_LOGGING_HH__
diff --git a/src/base/logging.test.cc b/src/base/logging.test.cc
index 3f16070..13b1ee6 100644
--- a/src/base/logging.test.cc
+++ b/src/base/logging.test.cc
@@ -552,3 +552,16 @@
ASSERT_DEATH(chatty_assert(false, "message\n"), ::testing::HasSubstr(
"panic: assert(false) failed: message\nMemory Usage:"));
}
+
+/** Test macro gem5_assert. */
+TEST(LoggingDeathTest, GEM5Assert)
+{
+#ifdef NDEBUG
+GTEST_SKIP() << "Skipping as assertions are "
+"stripped out of fast builds";
+#endif
+gem5_assert(true);
+ASSERT_DEATH(gem5_assert(true), ::testing::HasSubstr(
+"panic: (false) failed: message\nMemory Usage:"));
+}
+
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/45027
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Icad1719c0e6fbb066471d1fecfb12eedd65aa690
Gerrit-Change-Number: 45027
Gerrit-PatchSet: 1
Gerrit-Owner: Gabriel Busnot
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: base: Fix truncated compressed output upon panic()
Gabriel Busnot has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/45025 )
Change subject: base: Fix truncated compressed output upon panic()
..
base: Fix truncated compressed output upon panic()
When panic was called, the non-flushed debug log was truncated if a
compressed
output file was used. This is fixed by manually destructing the `simout`
global
variable before calling abort().
Debug output has also been speedup by removing all explicit stream flushes
involved in the debug printing (some might ). Using stdout as the debug
output
is now as fast as file redirection and prevents log truncation in all cases
thanks to cout being tied to cerr.
Change-Id: Id01397eca608b5dc9e4bfe3fbdd864b6f07e4ad9
---
M src/base/cprintf.cc
M src/base/logging.cc
M src/base/stats/text.cc
M src/base/trace.cc
4 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/base/cprintf.cc b/src/base/cprintf.cc
index 7a3e958..9b2b576 100644
--- a/src/base/cprintf.cc
+++ b/src/base/cprintf.cc
@@ -78,13 +78,13 @@
break;
case '\n':
-stream << std::endl;
+stream << '\n';
++ptr;
break;
case '\r':
++ptr;
if (*ptr != '\n')
-stream << std::endl;
+stream << '\n';
break;
default:
@@ -289,13 +289,13 @@
break;
case '\n':
-stream << std::endl;
+stream << '\n';
++ptr;
break;
case '\r':
++ptr;
if (*ptr != '\n')
-stream << std::endl;
+stream << '\n';
break;
default:
diff --git a/src/base/logging.cc b/src/base/logging.cc
index 1290455..7021a65 100644
--- a/src/base/logging.cc
+++ b/src/base/logging.cc
@@ -43,6 +43,7 @@
#include
#include "base/hostinfo.hh"
+#include "base/output.hh"
namespace {
@@ -59,6 +60,9 @@
ccprintf(ss, "Memory Usage: %ld KBytes\n", memUsage());
Logger::log(loc, s + ss.str());
}
+
+void
+exit() override {simout.~OutputDirectory();}
};
class FatalLogger : public ExitLogger
diff --git a/src/base/stats/text.cc b/src/base/stats/text.cc
index 26f1622..0d08889 100644
--- a/src/base/stats/text.cc
+++ b/src/base/stats/text.cc
@@ -297,7 +297,7 @@
if (units && !unitStr.empty()) {
ccprintf(stream, " (%s)", unitStr);
}
-stream << std::endl;
+stream << '\n';
}
}
@@ -394,7 +394,7 @@
if (units && !unitStr.empty()) {
ccprintf(stream, " (%s)", unitStr);
}
-stream << std::endl;
+stream << '\n';
}
}
@@ -572,7 +572,7 @@
if (units && !unitStr.empty()) {
ccprintf(stream, " (%s)", unitStr);
}
-stream << std::endl;
+stream << '\n';
}
if (data.type == Dist && data.overflow != NAN) {
diff --git a/src/base/trace.cc b/src/base/trace.cc
index eee6a4d..a80b39a 100644
--- a/src/base/trace.cc
+++ b/src/base/trace.cc
@@ -158,7 +158,6 @@
stream << name << ": ";
stream << message;
-stream.flush();
if (DTRACE(FmtStackTrace)) {
print_backtrace();
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Id01397eca608b5dc9e4bfe3fbdd864b6f07e4ad9
Gerrit-Change-Number: 45025
Gerrit-PatchSet: 1
Gerrit-Owner: Gabriel Busnot
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: base: Define m5_assert macro and replace assert with it
Gabriel Busnot has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/45026 ) Change subject: base: Define m5_assert macro and replace assert with it .. base: Define m5_assert macro and replace assert with it The m5_assert macro relies on panic to trigger abort(). It allows to perform some clean-up using ExitLogger::exit() before ending the program. It solves the incomplete log issue in case of assert failure for instance. Change-Id: I3e2e8d636ac880fc12b8557ccbe3325ab1896345 --- M src/arch/amdgpu/gcn3/gpu_mem_helpers.hh M src/arch/amdgpu/gcn3/insts/inst_util.hh M src/arch/amdgpu/gcn3/insts/instructions.cc M src/arch/amdgpu/gcn3/insts/instructions.hh M src/arch/amdgpu/gcn3/insts/op_encodings.cc M src/arch/amdgpu/gcn3/operand.hh M src/arch/amdgpu/vega/gpu_mem_helpers.hh M src/arch/amdgpu/vega/insts/inst_util.hh M src/arch/amdgpu/vega/insts/instructions.cc M src/arch/amdgpu/vega/insts/instructions.hh M src/arch/amdgpu/vega/insts/op_encodings.cc M src/arch/amdgpu/vega/operand.hh M src/arch/arm/decoder.cc M src/arch/arm/fastmodel/CortexR52/cortex_r52.cc M src/arch/arm/fastmodel/iris/thread_context.cc M src/arch/arm/fastmodel/iris/tlb.cc M src/arch/arm/faults.cc M src/arch/arm/htm.cc M src/arch/arm/insts/fplib.cc M src/arch/arm/insts/macromem.cc M src/arch/arm/insts/mem.hh M src/arch/arm/insts/mem64.hh M src/arch/arm/insts/misc64.hh M src/arch/arm/insts/neon64_mem.hh M src/arch/arm/insts/pred_inst.hh M src/arch/arm/insts/static_inst.cc M src/arch/arm/insts/sve.cc M src/arch/arm/insts/sve_macromem.hh M src/arch/arm/insts/tme64ruby.cc M src/arch/arm/insts/vfp.cc M src/arch/arm/interrupts.hh M src/arch/arm/isa.cc M src/arch/arm/isa.hh M src/arch/arm/isa_device.cc M src/arch/arm/kvm/arm_cpu.cc M src/arch/arm/kvm/gic.cc M src/arch/arm/linux/fs_workload.cc M src/arch/arm/linux/se_workload.cc M src/arch/arm/locked_mem.hh M src/arch/arm/mmu.hh M src/arch/arm/nativetrace.cc M src/arch/arm/pauth_helpers.cc M src/arch/arm/pmu.cc M src/arch/arm/pmu.hh M src/arch/arm/regs/int.hh M src/arch/arm/regs/misc.cc M src/arch/arm/semihosting.cc M src/arch/arm/stage2_lookup.cc M src/arch/arm/stage2_mmu.cc M src/arch/arm/system.hh M src/arch/arm/table_walker.cc M src/arch/arm/table_walker.hh M src/arch/arm/tlb.cc M src/arch/arm/tracers/tarmac_parser.cc M src/arch/arm/tracers/tarmac_parser.hh M src/arch/arm/utility.cc M src/arch/generic/memhelpers.hh M src/arch/generic/vec_pred_reg.hh M src/arch/mips/interrupts.cc M src/arch/mips/tlb.cc M src/arch/power/interrupts.hh M src/arch/power/tlb.cc M src/arch/riscv/decoder.cc M src/arch/riscv/interrupts.hh M src/arch/riscv/isa.cc M src/arch/riscv/pagetable_walker.cc M src/arch/riscv/tlb.cc M src/arch/sparc/faults.cc M src/arch/sparc/insts/micro.hh M src/arch/sparc/interrupts.hh M src/arch/sparc/isa.cc M src/arch/sparc/isa.hh M src/arch/sparc/nativetrace.cc M src/arch/sparc/pagetable.hh M src/arch/sparc/process.cc M src/arch/sparc/tlb.cc M src/arch/sparc/ua2005.cc M src/arch/x86/bios/acpi.cc M src/arch/x86/bios/e820.cc M src/arch/x86/bios/smbios.cc M src/arch/x86/cpuid.cc M src/arch/x86/decoder.cc M src/arch/x86/decoder.hh M src/arch/x86/emulenv.cc M src/arch/x86/faults.cc M src/arch/x86/fs_workload.cc M src/arch/x86/insts/macroop.hh M src/arch/x86/insts/microldstop.hh M src/arch/x86/insts/static_inst.cc M src/arch/x86/interrupts.cc M src/arch/x86/isa.cc M src/arch/x86/linux/syscalls.cc M src/arch/x86/pagetable_walker.cc M src/arch/x86/process.cc M src/arch/x86/regs/misc.hh M src/arch/x86/tlb.cc M src/arch/x86/x86_traits.hh M src/base/bitfield.hh M src/base/cast.hh M src/base/chunk_generator.hh M src/base/circular_queue.hh M src/base/filters/base.hh M src/base/filters/block_bloom_filter.cc M src/base/filters/bulk_bloom_filter.cc M src/base/filters/multi_bloom_filter.cc M src/base/framebuffer.hh M src/base/inet.cc M src/base/intmath.hh M src/base/intmath.test.cc M src/base/loader/elf_object.cc M src/base/loader/image_file_data.cc M src/base/logging.hh M src/base/logging.test.cc M src/base/pixel.cc M src/base/sat_counter.hh M src/base/statistics.cc M src/base/statistics.hh M src/base/stats/hdf5.cc M src/base/stats/storage.cc M src/base/stats/storage.hh M src/base/stats/text.cc M src/base/trie.hh M src/base/types.hh M src/base/vnc/vncinput.cc M src/base/vnc/vncserver.cc M src/base/vnc/vncserver.hh M src/cpu/activity.cc M src/cpu/base.cc M src/cpu/base.hh M src/cpu/checker/cpu.cc M src/cpu/checker/cpu.hh M src/cpu/inst_res.hh M src/cpu/kvm/base.cc M src/cpu/kvm/device.cc M src/cpu/kvm/perfevent.cc M src/cpu/kvm/timer.cc M src/cpu/kvm/vm.cc M src/cpu/kvm/x86_cpu.cc M src/cpu/minor/buffers.hh M src/cpu/minor/cpu.cc M src/cpu/minor/decode.cc M src/cpu/minor/dyn_inst.cc M src/cpu/minor/dyn_inst.hh M src/cpu/minor/exec_context.hh M src/cpu/minor/execute.cc M src/cpu/minor/fetch1.cc M src/cpu/minor/fetch2.cc M src/cpu/minor/lsq.cc M src/cpu/minor/pipe_data.cc M src/cpu/o3/commit_impl.hh M
