[gem5-dev] Change in gem5/gem5[develop]: cpu: Use new InstRecord faulting flag in cpu models
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/30135 )
Change subject: cpu: Use new InstRecord faulting flag in cpu models
..
cpu: Use new InstRecord faulting flag in cpu models
This patch sets the faulting flag in atomic, timing, minor and o3 CPU
models.
It also fixes the minor/timing CPU models which were not respecting the
ExecFaulting flag. This is now checked before calling dump() on the
tracing object, to bring it in line with the other CPU models.
Change-Id: I9c7b64cc5605596eb7fcf25fdecaeac5c4b5e3d7
---
M src/cpu/minor/execute.cc
M src/cpu/o3/commit_impl.hh
M src/cpu/simple/atomic.cc
M src/cpu/simple/base.cc
M src/cpu/simple/base.hh
M src/cpu/simple/timing.cc
6 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index ddb8db3..9577549 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014,2018-2019 ARM Limited
+ * Copyright (c) 2013-2014,2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -48,6 +48,7 @@
#include "debug/Activity.hh"
#include "debug/Branch.hh"
#include "debug/Drain.hh"
+#include "debug/ExecFaulting.hh"
#include "debug/MinorExecute.hh"
#include "debug/MinorInterrupt.hh"
#include "debug/MinorMem.hh"
@@ -980,6 +981,15 @@
committed = true;
if (fault != NoFault) {
+if (inst->traceData) {
+if (DTRACE(ExecFaulting)) {
+inst->traceData->setFaulting(true);
+} else {
+delete inst->traceData;
+inst->traceData = NULL;
+}
+}
+
DPRINTF(MinorExecute, "Fault in execute of inst: %s
fault: %s\n",
*inst, fault->name());
fault->invoke(thread, inst->staticInst);
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 0f65e71..8e8ff6e 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1,6 +1,6 @@
/*
* Copyright 2014 Google, Inc.
- * Copyright (c) 2010-2014, 2017 ARM Limited
+ * Copyright (c) 2010-2014, 2017, 2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -1260,6 +1260,7 @@
tid, head_inst->seqNum);
if (head_inst->traceData) {
if (DTRACE(ExecFaulting)) {
+head_inst->traceData->setFaulting(true);
head_inst->traceData->setFetchSeq(head_inst->seqNum);
head_inst->traceData->setCPSeq(thread[tid]->numOp);
head_inst->traceData->dump();
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 4671402..c57fe14 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -1,6 +1,6 @@
/*
* Copyright 2014 Google, Inc.
- * Copyright (c) 2012-2013,2015,2017-2019 ARM Limited
+ * Copyright (c) 2012-2013,2015,2017-2020 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -713,10 +713,8 @@
if (fault == NoFault) {
countInst();
ppCommit->notify(std::make_pair(thread,
curStaticInst));
-}
-else if (traceData && !DTRACE(ExecFaulting)) {
-delete traceData;
-traceData = NULL;
+} else if (traceData) {
+traceFault();
}
if (fault != NoFault &&
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 8f23bab..d03ae86 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2012, 2015, 2017, 2018 ARM Limited
+ * Copyright (c) 2010-2012, 2015, 2017, 2018, 2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -433,6 +433,17 @@
}
void
+BaseSimpleCPU::traceFault()
+{
+if (DTRACE(ExecFaulting)) {
+traceData->setFaulting(true);
+} else {
+delete traceData;
+traceData = NULL;
+}
+}
+
+void
BaseSimpleCPU::checkForInterrupts()
{
SimpleExecContext&t_info = *threadInfo[curThread];
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index df17c26..a544211 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012,2015,2018 ARM Limited
+ * Copyright (c) 2011-2012,2015,2018,2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -120,6 +120,14 @@
Status _status;
+/**
+ * Handler used when encountering a fault; its purpose is to
+ * tear down the InstRecord. If a fault is meant to be traced,
+ * the handler won't delete the record
[gem5-dev] Change in gem5/gem5[develop]: cpu: Use new InstRecord faulting flag in cpu models
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30135 )
Change subject: cpu: Use new InstRecord faulting flag in cpu models
..
cpu: Use new InstRecord faulting flag in cpu models
This patch sets the faulting flag in atomic, timing, minor and o3 CPU
models.
It also fixes the minor/timing CPU models which were not respecting the
ExecFaulting flag. This is now checked before calling dump() on the
tracing object, to bring it in line with the other CPU models.
Change-Id: I9c7b64cc5605596eb7fcf25fdecaeac5c4b5e3d7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30135
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/minor/execute.cc
M src/cpu/o3/commit_impl.hh
M src/cpu/simple/atomic.cc
M src/cpu/simple/base.cc
M src/cpu/simple/base.hh
M src/cpu/simple/timing.cc
6 files changed, 45 insertions(+), 23 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index d311d14..3c94531 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014,2018-2019 ARM Limited
+ * Copyright (c) 2013-2014,2018-2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -48,6 +48,7 @@
#include "debug/Activity.hh"
#include "debug/Branch.hh"
#include "debug/Drain.hh"
+#include "debug/ExecFaulting.hh"
#include "debug/MinorExecute.hh"
#include "debug/MinorInterrupt.hh"
#include "debug/MinorMem.hh"
@@ -978,6 +979,15 @@
committed = true;
if (fault != NoFault) {
+if (inst->traceData) {
+if (DTRACE(ExecFaulting)) {
+inst->traceData->setFaulting(true);
+} else {
+delete inst->traceData;
+inst->traceData = NULL;
+}
+}
+
DPRINTF(MinorExecute, "Fault in execute of inst: %s
fault: %s\n",
*inst, fault->name());
fault->invoke(thread, inst->staticInst);
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 667f42b..4f467e9 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1,6 +1,6 @@
/*
* Copyright 2014 Google, Inc.
- * Copyright (c) 2010-2014, 2017 ARM Limited
+ * Copyright (c) 2010-2014, 2017, 2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -1260,6 +1260,7 @@
tid, head_inst->seqNum);
if (head_inst->traceData) {
if (DTRACE(ExecFaulting)) {
+head_inst->traceData->setFaulting(true);
head_inst->traceData->setFetchSeq(head_inst->seqNum);
head_inst->traceData->setCPSeq(thread[tid]->numOp);
head_inst->traceData->dump();
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 4671402..c57fe14 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -1,6 +1,6 @@
/*
* Copyright 2014 Google, Inc.
- * Copyright (c) 2012-2013,2015,2017-2019 ARM Limited
+ * Copyright (c) 2012-2013,2015,2017-2020 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -713,10 +713,8 @@
if (fault == NoFault) {
countInst();
ppCommit->notify(std::make_pair(thread,
curStaticInst));
-}
-else if (traceData && !DTRACE(ExecFaulting)) {
-delete traceData;
-traceData = NULL;
+} else if (traceData) {
+traceFault();
}
if (fault != NoFault &&
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index c6d5761..1dac921 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2012, 2015, 2017, 2018 ARM Limited
+ * Copyright (c) 2010-2012, 2015, 2017, 2018, 2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -64,6 +64,7 @@
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "debug/Decode.hh"
+#include "debug/ExecFaulting.hh"
#include "debug/Fetch.hh"
#include "debug/Quiesce.hh"
#include "mem/packet.hh"
@@ -433,6 +434,17 @@
}
void
+BaseSimpleCPU::traceFault()
+{
+if (DTRACE(ExecFaulting)) {
+traceData->setFaulting(true);
+} else {
+delete traceData;
+traceData = NULL;
+}
+}
+
+void
BaseSimpleCPU::checkForInterrupts()
{
SimpleExecContext&t_info = *threadInfo[curThread];
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 323850a..9f5bf66 100644
--- a/src/c
