date:20201127

[gem5-users] Re: Adding new replacement policy error

2020-11-27 Thread Daniel Carvalho via gem5-users

 Hello, John,
A few questions:- Did you add the respective SHIPRP class in 
ReplacementPolicies.py?- Are you making sure the namespace is properly applied 
in the Python declaration (Something like cxx_class='ReplacementPolicy::SHiP')?
- When you downloaded the patches for DRRIP, did you cherry-pick? If not, then 
you have probably also applied the patch 
https://gem5-review.googlesource.com/c/public/gem5/+/35938 , in which case you 
need to declare the constructor as "const Params ".

Bonus:
Long ago I have also implemented SHiP-PC and SHiP-Mem. I *think* I was 
confident of their implementation, but I have to double-check it later. It 
would be great if you could take a look and give some feedback: 
https://gem5-review.googlesource.com/c/public/gem5/+/38118
Regards,Daniel

Em sábado, 28 de novembro de 2020 00:11:28 GMT+1, John H via gem5-users 
 escreveu:  
 
 Hello,
I tried creating a separate .cc and .hh file for implementing a new replacement 
policy and added it to Scons within replacement policies. However, when i run 
gem5 build, I get the following error message
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:22: error: 'Params' does 
not name a type SHIPRP::SHIPRP(const Params *p)
                      ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:30: error: ISO C++ 
forbids declaration of 'p' with no type [-fpermissive]
 SHIPRP::SHIPRP(const Params *p)
                              ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:31: error: invalid use 
of incomplete type 'class SHIPRP'
 SHIPRP::SHIPRP(const Params *p)
                               ^
In file included from build/X86/mem/cache/replacement_policies/ship_rp.cc:8:0:
build/X86/params/SHIPRP.hh:4:7: error: forward declaration of 'class SHIPRP'
 class SHIPRP;
       ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:16:1: error: expected 
unqualified-id before '{' token
 {
 ^
scons: *** [build/X86/mem/cache/replacement_policies/ship_rp.o] Error 1
scons: building terminated because of errors.
Can you please guide me on how to fix this?
Thanks,
John
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s  ___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Adding new replacement policy error

2020-11-27 Thread John H via gem5-users

Hello,

I tried creating a separate .cc and .hh file for implementing a new
replacement policy and added it to Scons within replacement policies.
However, when i run gem5 build, I get the following error message
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:22: error: 'Params'
does not name a type
 SHIPRP::SHIPRP(const Params *p)
  ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:30: error: ISO C++
forbids declaration of 'p' with no type [-fpermissive]
 SHIPRP::SHIPRP(const Params *p)
  ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:13:31: error: invalid
use of incomplete type 'class SHIPRP'
 SHIPRP::SHIPRP(const Params *p)
   ^
In file included from
build/X86/mem/cache/replacement_policies/ship_rp.cc:8:0:
build/X86/params/SHIPRP.hh:4:7: error: forward declaration of 'class SHIPRP'
 class SHIPRP;
   ^
build/X86/mem/cache/replacement_policies/ship_rp.cc:16:1: error: expected
unqualified-id before '{' token
 {
 ^
scons: *** [build/X86/mem/cache/replacement_policies/ship_rp.o] Error 1
scons: building terminated because of errors.

Can you please guide me on how to fix this?

Thanks,

John
___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] dumping specific stats

2020-11-27 Thread POLYCHRONOU Nikolaos via gem5-users

Hello.
I do m5 dumpresetstats every 0.1ms but the generated file exceeds 10Gb.
I found that patch https://gem5-review.googlesource.com/c/public/gem5/+/28628
which only keeps stats from root simobjects. In my case I need for example 
numCycles,
exec_branches, predictedNotTakenIncorrect, branchPred.condPredicted, 
dcache.overall_hits, etc.
I simulate with an O3 armv8 processor. I can define --stats-root 
'system.cpu_cluster' but any other option i add is not accepted ie --stats-root 
'system.cpu_cluster[:].cpus.icache'
is not accepted. Is there an option to reduce the stats file size and only dump 
specific stas?
Regards
Niko







[Leti_logo_mail]





Nikolaos Foivos POLYCHRONOU
PhD Student – Security of Embedded Systems/IoT/IIoT
Département DSYS / LSOSP

17, rue des martyrs | 38000 Grenoble
Fix work . +33 4 38 78 19 58
Office Bat. 4022 - P. 221
nikolaos.polychro...@cea.fr

LETI, technology research institute
Commissariat à l’énergie atomique et aux énergies alternatives
www.leti.fr  | LETI is a member of the Carnot Institutes 
network







[icone_youtube]   
[icone_twitter] [icone_linkedin] 






___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: Using perf_event with the ARM PMU inside gem5 on Linux

2020-11-27 Thread Giacomo Travaglini via gem5-users

Hi Niko,

Have a look at the following patch:

https://gem5-review.googlesource.com/c/public/gem5/+/38095

This should solve your problem

Kind Regards

Giacomo

> -Original Message-
> From: Giacomo Travaglini
> Sent: 25 November 2020 12:55
> To: POLYCHRONOU Nikolaos ; gem5 users
> mailing list 
> Subject: RE: [gem5-users] Re: Using perf_event with the ARM PMU inside gem5
> on Linux
>
>
>
> > -Original Message-
> > From: POLYCHRONOU Nikolaos 
> > Sent: 25 November 2020 12:22
> > To: Giacomo Travaglini ; gem5 users
> > mailing list 
> > Subject: RE: [gem5-users] Re: Using perf_event with the ARM PMU inside
> > gem5 on Linux
> >
> > Hello,
> > To conclude my argument is that I instantiate the arm_o3 model and my
> > scripts work perfectly.
> > I am almost convince after spending some days that the HPI model in
> > the minor cpu does not increment the cycle counter  as the
> > CPU_STATE_ON is never used.
> > Indeed in the O3 model is used. I will try to spend some time to see
> > why and also try your suggestion King regards Nikolaos
>
> Thanks for spotting this! This is a real bug in gem5: the cycle counters are 
> not
> updated in the MinorCPU model I will post a patch to fix this and will keep 
> you
> posted
>
> Kind Regards
>
> Giacomo
>
> >
> > -Original Message-
> > From: Giacomo Travaglini 
> > Sent: Wednesday, November 25, 2020 11:12 AM
> > To: POLYCHRONOU Nikolaos ; gem5 users
> > mailing list 
> > Subject: RE: [gem5-users] Re: Using perf_event with the ARM PMU inside
> > gem5 on Linux
> >
> >
> >
> > > -Original Message-
> > > From: POLYCHRONOU Nikolaos 
> > > Sent: 20 November 2020 10:26
> > > To: gem5 users mailing list ; Giacomo
> > > Travaglini 
> > > Subject: RE: [gem5-users] Re: Using perf_event with the ARM PMU
> > > inside
> > > gem5 on Linux
> > >
> > > I give some example
> > >
> > > 
> > > --
> > > --- perf stat -e armv8_pmuv3/cpu_cycles/
> > > ./dijkstra_small input.dat Performance counter stats for './dijkstra_small
> input.dat':
> > > 0  armv8_pmuv3/cpu_cycles/
> > >  0.012288848 seconds time elapsed
> > > 
> > > --
> > > --  perf stat -e
> > > armv8_pmuv3/br_immed_retired/,cpu-cycles,cache-
> > > misses,branch-
> > > misses,armv8_pmuv3/st_retired/,armv8_pmuv3/st_retired/,instructions
> > > ./dijks tra_small input.dat  Performance counter stats for
> > > './dijkstra_small
> > input.dat':
> > >
> > >  0  armv8_pmuv3/br_immed_retired/
> > >  0  cpu-cycles
> > >  0  cache-misses
> > >  244128  branch-misses
> > >  0  armv8_pmuv3/st_retired/
> > >  0  armv8_pmuv3/st_retired/
> > >  0  instructions
> > >
> > >0.011671384 seconds time elapsed
> > > 
> > > --
> > > ---  Performance counter stats for
> > > './example/build/armv8/release/bin/example -s
> > > 200 -n 10 -x 1 -z 10':
> > >
> > > 108323  branch-misses
> > >  0  cache-misses  #0.000 % of all 
> > > cache refs
> > >  0  cache-references
> > >  0  cycles
> > >  0  instructions
> > >  0  L1-dcache-load-misses #0.00% of all 
> > > L1-dcache hits
> > >  0  L1-dcache-load-misses #0.00% of all 
> > > L1-dcache hits
> > >  0  L1-dcache-loads
> > >  0  L1-dcache-store-misses
> > >  0  L1-dcache-stores
> > >  0  L1-icache-load-misses
> > > 358406  branch-load-misses
> > > 0  L1-icache-load-misses
> > > [0/44652]
> > > 358406  branch-load-misses
> > >3974014  branch-loads
> > >  0  dTLB-load-misses
> > >  0  iTLB-load-misses
> > >  0  armv8_pmuv3/br_immed_retired/
> > > 358406  armv8_pmuv3/br_mis_pred/
> > >3974014  armv8_pmuv3/br_pred/
> > >2670637  armv8_pmuv3/br_retired/
> > >  0  armv8_pmuv3/br_return_retired/
> > >  0  armv8_pmuv3/cpu_cycles/
> > >  0  armv8_pmuv3/inst_retired/
> > >  0  armv8_pmuv3/inst_spec/
> > >  0  armv8_pmuv3/l1d_cache/
> > >  0  armv8_pmuv3/l1d_cache_refill/
> > >  0  armv8_pmuv3/l1d_tlb_refill/
> > >  0  armv8_pmuv3/l1i_cache_refill/
> > >  0  armv8_pmuv3/l1i_tlb_refill/
> > >  0  armv8_pmuv3/l2d_cache/
> > >  0  armv8_pmuv3/l2d_cache_refill/
> > >

[gem5-users] Re: Adding new replacement policy error

[gem5-users] Adding new replacement policy error

[gem5-users] dumping specific stats

[gem5-users] Re: Using perf_event with the ARM PMU inside gem5 on Linux

4 matches

Site Navigation

Mail list logo

Footer information