Re: Instruction Cache Flush in createAdjustor on SPARC
Simon Marlow wrote: > I'm not a sparc expert, would anyone like to suggest a patch? From the top of my head (sorry, I forgot my SUN Enterprise Server at work :-): /* the flush instruction works on double words */ inline void flushCacheOnSPARC(int64_t* from, int64_t* to) { while (from < to) { asm("flush %0" : : "r" (from++)); } /* it could take up to 5 instructions until the flush is visible */ asm("nop" : : ); asm("nop" : : ); asm("nop" : : ); asm("nop" : : ); asm("nop" : : ); } Cheers, S. ___ Glasgow-haskell-bugs mailing list [EMAIL PROTECTED] http://www.haskell.org/mailman/listinfo/glasgow-haskell-bugs
RE: Instruction Cache Flush in createAdjustor on SPARC
> Wolfgang Thaller wrote: > > > [...] Can anyone with sparc experience think of a reason > why cache flushing > > > should _not_ be necessary here? > > > Synchronizing the data/instruction caches *and* the caches of > different > processors (most people forget the latter) is necessary for > both PowerPC and SPARC. I'm not a sparc expert, would anyone like to suggest a patch? Cheers, Simon ___ Glasgow-haskell-bugs mailing list [EMAIL PROTECTED] http://www.haskell.org/mailman/listinfo/glasgow-haskell-bugs
Re: Instruction Cache Flush in createAdjustor on SPARC
Wolfgang Thaller wrote: > [...] Can anyone with sparc experience think of a reason why cache flushing > should _not_ be necessary here? Synchronizing the data/instruction caches *and* the caches of different processors (most people forget the latter) is necessary for both PowerPC and SPARC. Cheers, S. ___ Glasgow-haskell-bugs mailing list [EMAIL PROTECTED] http://www.haskell.org/mailman/listinfo/glasgow-haskell-bugs