Re: [hwloc-users] hwloc 0.9.3 not showing opt275 caches correctly?
yes they all show up as 1024K cat /sys/devices/system/cpu/cpu*/cache/index*/size 1024K 1024K 1024K 1024K 1024K 1024K 1024K 1024K 1024K 1024K 1024K 1024K Thanks for the input. Brock Palen www.umich.edu/~brockp Center for Advanced Computing bro...@umich.edu (734)936-1985 On Jan 23, 2010, at 2:22 PM, Samuel Thibault wrote: Hello, Brock Palen, le Sat 23 Jan 2010 13:51:09 -0500, a écrit : System(7870MB) Node#0(3906MB) + Socket#0 L2(1024KB) + L1(1024KB) + Core#0 + P#0 L2(1024KB) + L1(1024KB) + Core#1 + P#1 Node#1(4040MB) + Socket#1 L2(1024KB) + L1(1024KB) + Core#0 + P#2 L2(1024KB) + L1(1024KB) + Core#1 + P#3 If I am reading the AMD docs right, the L1 cache for each core should be smaller, and in two parts, (data and instruction cache) Also appears that L2 should be shared, as far as I can tell, it is not shared in this case. Am I looking at this wrong? No, that's the right interpretation of lstopo's output. However, the bug probably lies into your kernel's code. Could you check /sys/devices/system/cpu/cpu*/cache/index*/size ? Samuel ___ hwloc-users mailing list hwloc-us...@open-mpi.org http://www.open-mpi.org/mailman/listinfo.cgi/hwloc-users
Re: [hwloc-users] hwloc 0.9.3 not showing opt275 caches correctly?
Hello, Brock Palen, le Sat 23 Jan 2010 13:51:09 -0500, a écrit : > System(7870MB) > Node#0(3906MB) + Socket#0 > L2(1024KB) + L1(1024KB) + Core#0 + P#0 > L2(1024KB) + L1(1024KB) + Core#1 + P#1 > Node#1(4040MB) + Socket#1 > L2(1024KB) + L1(1024KB) + Core#0 + P#2 > L2(1024KB) + L1(1024KB) + Core#1 + P#3 > > If I am reading the AMD docs right, the L1 cache for each core should > be smaller, and in two parts, (data and instruction cache) > Also appears that L2 should be shared, as far as I can tell, it is not > shared in this case. > > Am I looking at this wrong? No, that's the right interpretation of lstopo's output. However, the bug probably lies into your kernel's code. Could you check /sys/devices/system/cpu/cpu*/cache/index*/size ? Samuel
[hwloc-users] hwloc 0.9.3 not showing opt275 caches correctly?
lstopo on our opteron 275 login node gives the following output System(7870MB) Node#0(3906MB) + Socket#0 L2(1024KB) + L1(1024KB) + Core#0 + P#0 L2(1024KB) + L1(1024KB) + Core#1 + P#1 Node#1(4040MB) + Socket#1 L2(1024KB) + L1(1024KB) + Core#0 + P#2 L2(1024KB) + L1(1024KB) + Core#1 + P#3 If I am reading the AMD docs right, the L1 cache for each core should be smaller, and in two parts, (data and instruction cache) Also appears that L2 should be shared, as far as I can tell, it is not shared in this case. Am I looking at this wrong? Brock Palen www.umich.edu/~brockp Center for Advanced Computing bro...@umich.edu (734)936-1985
