from:"michelbutz"

THAT's IT

Thanks 

Sent from my iPhone

> On Jun 8, 2016, at 9:41 PM, Blaicher, Christopher Y. <cblaic...@syncsort.com> 
> wrote:
> 
> If it is in a key zero CSA subpool, then yes you need to be in key zero.  
> Even if you do a fast wait, ie test the completed bit, you will want to clear 
> the ECB once it is posted and to do that you will need to be in key zero.
> 
> Anyway, if you aren't in the right key, you'll get an 0C4 fast enough. :)
> 
> Chris Blaicher
> Technical Architect
> Mainframe Development
> Syncsort Incorporated
> 50 Tice Boulevard, Woodcliff Lake, NJ 07677
> P: 201-930-8234  |  M: 512-627-3803
> E: cblaic...@syncsort.com
> 
> www.syncsort.com
> 
> 
> 
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of michelbutz
> Sent: Wednesday, June 8, 2016 9:29 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Clarification of ECBLIST
> 
> Do I have to be in key 0 to wait on ecb in CSA
> 
> Sent from my iPhone
> 
>>> On Jun 8, 2016, at 2:11 PM, Greg Dyck <gregd...@pobox.com> wrote:
>>> 
>>> On 6/8/2016 7:07 AM, michelbutz wrote:
>>> The XMEM post is being done from a FRR resulting from an abend in a
>>> SRB the SRB is the primary address space
>> 
>> Putting an ECB in common storage is allowed, but great care must be taken 
>> when doing so.
>> 
>> As has already been said, if issuing the POST from another address space a 
>> cross-memory post must be done.  If in the local address space that is not 
>> necessary.
>> 
>> Then comes the storage key for the ECB.  Putting it in user key common 
>> storage is a big mistake, and opens major integrity exposures.  It should 
>> always be in system key (0 to 7) storage.
>> 
>> And then, when doing the POST you must make sure you specify the ECBKEY 
>> operand.  That is my guess as to why your POST failed.
>> 
>> Greg
>> 
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Re: Clarification of ECBLIST

Do I have to be in key 0 to wait on ecb in CSA 

Sent from my iPhone

> On Jun 8, 2016, at 2:11 PM, Greg Dyck <gregd...@pobox.com> wrote:
> 
>> On 6/8/2016 7:07 AM, michelbutz wrote:
>> The XMEM post is being done from a FRR resulting from an abend in a SRB the 
>> SRB is the primary address space
> 
> Putting an ECB in common storage is allowed, but great care must be taken 
> when doing so.
> 
> As has already been said, if issuing the POST from another address space a 
> cross-memory post must be done.  If in the local address space that is not 
> necessary.
> 
> Then comes the storage key for the ECB.  Putting it in user key common 
> storage is a big mistake, and opens major integrity exposures.  It should 
> always be in system key (0 to 7) storage.
> 
> And then, when doing the POST you must make sure you specify the ECBKEY 
> operand.  That is my guess as to why your POST failed.
> 
> Greg
> 
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Re: Clarification of ECBLIST

Not by my computer but will do shortly 

Sent from my iPhone

> On Jun 8, 2016, at 1:28 PM, Binyamin Dissen <bdis...@dissensoftware.com> 
> wrote:
> 
> That should not be an issue. Also, that the ECB is in the primary is not
> relevant for the POST service.
> 
> As always, show you code.
> 
> You can SLIP for an abend in SRB mode and see what it shows.
> 
> On Wed, 8 Jun 2016 10:07:54 -0400 michelbutz <michealb...@comcast.net> wrote:
> 
> :>The XMEM post is being done from a FRR resulting from an abend in a SRB the 
> SRB is the primary address space 
> :>
> :>Sent from my iPhone
> :>
> :>> On Jun 8, 2016, at 9:44 AM, Binyamin Dissen <bdis...@dissensoftware.com> 
> wrote:
> :>> 
> :>> Even if the ECB is in CSA, a cross-memory post must be used if the home
> :>> address space is not the waiting address space.
> :>> 
> :>> On Wed, 8 Jun 2016 09:03:45 -0400 michelbutz <michealb...@comcast.net> 
> wrote:
> :>> 
> :>> :>I'll double check the wait bit X'80' is on after the wait thanks 
> :>> :>
> :>> :>Sent from my iPhone
> :>> :>
> :>> :>> On Jun 8, 2016, at 9:00 AM, John McKown 
> <john.archie.mck...@gmail.com> wrote:
> :>> :>> 
> :>> :>>> On Tue, Jun 7, 2016 at 9:17 PM, michelbutz <michealb...@comcast.net> 
> wrote:
> :>> :>>> 
> :>> :>>> Hi
> :>> :>>> 
> :>> :>>> The documentation says for ECBLIST
> :>> :>>> All ecb's must be in the home address
> :>> :>>> Space. Does that mean addressable from the
> :>> :>>> Hone address space
> :>> :>>> 
> :>> :>>> As I have 1 ecb's in the home address space
> :>> :>>> And 1 in CSA
> :>> :>>> Thanks
> :>> :>> 
> :>> :>> ?I am sure that will work. To my way of thinking, whatever is in 
> "common
> :>> :>> storage" (CSA, SQA, ECSA, ESQA, HVCOMMON, NUC) is mapped into the home
> :>> :>> address space of all address spaces. I'm sure Mr. Relson will correct 
> me if
> :>> :>> I'm wrong.
> :>> 
> :>> --
> :>> Binyamin Dissen <bdis...@dissensoftware.com>
> :>> http://www.dissensoftware.com
> :>> 
> :>> Director, Dissen Software, Bar & Grill - Israel
> :>> 
> :>> 
> :>> Should you use the mailblocks package and expect a response from me,
> :>> you should preauthorize the dissensoftware.com domain.
> :>> 
> :>> I very rarely bother responding to challenge/response systems,
> :>> especially those from irresponsible companies.
> :>> 
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> http://www.dissensoftware.com
> 
> Director, Dissen Software, Bar & Grill - Israel
> 
> 
> Should you use the mailblocks package and expect a response from me,
> you should preauthorize the dissensoftware.com domain.
> 
> I very rarely bother responding to challenge/response systems,
> especially those from irresponsible companies.
> 
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Re: Clarification of ECBLIST

The XMEM post is being done from a FRR resulting from an abend in a SRB the SRB 
is the primary address space 

Sent from my iPhone

> On Jun 8, 2016, at 9:44 AM, Binyamin Dissen <bdis...@dissensoftware.com> 
> wrote:
> 
> Even if the ECB is in CSA, a cross-memory post must be used if the home
> address space is not the waiting address space.
> 
> On Wed, 8 Jun 2016 09:03:45 -0400 michelbutz <michealb...@comcast.net> wrote:
> 
> :>I'll double check the wait bit X'80' is on after the wait thanks 
> :>
> :>Sent from my iPhone
> :>
> :>> On Jun 8, 2016, at 9:00 AM, John McKown <john.archie.mck...@gmail.com> 
> wrote:
> :>> 
> :>>> On Tue, Jun 7, 2016 at 9:17 PM, michelbutz <michealb...@comcast.net> 
> wrote:
> :>>> 
> :>>> Hi
> :>>> 
> :>>> The documentation says for ECBLIST
> :>>> All ecb's must be in the home address
> :>>> Space. Does that mean addressable from the
> :>>> Hone address space
> :>>> 
> :>>> As I have 1 ecb's in the home address space
> :>>> And 1 in CSA
> :>>> Thanks
> :>> 
> :>> ?I am sure that will work. To my way of thinking, whatever is in "common
> :>> storage" (CSA, SQA, ECSA, ESQA, HVCOMMON, NUC) is mapped into the home
> :>> address space of all address spaces. I'm sure Mr. Relson will correct me 
> if
> :>> I'm wrong.
> 
> --
> Binyamin Dissen <bdis...@dissensoftware.com>
> http://www.dissensoftware.com
> 
> Director, Dissen Software, Bar & Grill - Israel
> 
> 
> Should you use the mailblocks package and expect a response from me,
> you should preauthorize the dissensoftware.com domain.
> 
> I very rarely bother responding to challenge/response systems,
> especially those from irresponsible companies.
> 
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Re: Clarification of ECBLIST

I'll double check the wait bit X'80' is on after the wait thanks 

Sent from my iPhone

> On Jun 8, 2016, at 9:00 AM, John McKown <john.archie.mck...@gmail.com> wrote:
> 
>> On Tue, Jun 7, 2016 at 9:17 PM, michelbutz <michealb...@comcast.net> wrote:
>> 
>> Hi
>> 
>> The documentation says for ECBLIST
>> All ecb's must be in the home address
>> Space. Does that mean addressable from the
>> Hone address space
>> 
>> As I have 1 ecb's in the home address space
>> And 1 in CSA
>> Thanks
> 
> I am sure that will work. To my way of thinking, whatever is in "common
> storage" (CSA, SQA, ECSA, ESQA, HVCOMMON, NUC) is mapped into the home
> address space of all address spaces. I'm sure Mr. Relson will correct me if
> I'm wrong.
> 
> --
> The unfacts, did we have them, are too imprecisely few to warrant our
> certitude.
> 
> Maranatha! <><
> John McKown
> 
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Clarification of ECBLIST

2016-06-07 Thread michelbutz

Hi

The documentation says for ECBLIST 
All ecb's must be in the home address 
Space. Does that mean addressable from the
Hone address space 

As I have 1 ecb's in the home address space
And 1 in CSA
 Thanks

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Re: SRB SUSPEND exit curiosity

2016-06-07 Thread michelbutz

Can someone tell me what the advantage of this 
Is then using IEAVPSE2 is it performance 
I think they both set up a SSRB

Sent from my iPhone

> On Jun 7, 2016, at 11:27 AM, Greg Dyck  wrote:
> 
> On 6/6/2016 6:54 AM, Steve Smith wrote:
> > I'm wondering what an SRB SUSPEND exit is really good for.  The Services 
> > Guide and Reference state that it is required, and that it is supposed to 
> > save the SUSPEND token, and decide whether to allow the SUSPEND.  I can't 
> > see why the SRB mainline couldn't do those things itself, and in fact 
> > that's the way I've coded it.  So, am I missing something?
> 
> Yes, you are missing something.
> 
> First, once you issue the SUSPEND the mainline never gets control back unless 
> the exit decides to terminate the request or a RESUME is issued using the 
> token.  So the mainline *CAN* *NOT* save the SUSPEND token, which is 
> generated after the SUSPEND is issued, for use on the RESUME.
> 
> Second, a timing window exists between the SUSPEND being issued and the token 
> for it being created where a RESUME would have been performed but could not 
> be because the token did not yet exist.
> 
> The normal suspend protocol is to-
> 
> 1) In the exit, fetch the suspend token value and check if it is 0.
> 2) If the token is 0, use compare-and-swap to change the value from 0 to the 
> new suspend token and complete the suspend.
> 3) If the token is non-0 or the swap fails then the suspend is terminated 
> because the resuming code has already run.
> 4) Set the suspend token back to 0 to prepare for the next suspend request 
> (it must be initialized to 0 at the start, as well).
> 
> The normal resume protocol is to-
> 
> 1) Fetch the suspend token and check if it is 0.
> 2) If the token is 0, compare-and-swap in a different specific value, such as 
> -1.
> 3) If the token is non-0 or the swap fails then a RESUME is issued using the 
> suspend token value.
> 
> Greg
> 
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Re: Release code paramter of IEAVRLS2

2016-06-03 Thread michelbutz

Does it have to be a different value on every call 

Sent from my iPhone

> On Jun 3, 2016, at 1:14 AM, Greg Dyck <gregd...@pobox.com> wrote:
> 
>> On 6/2/2016 9:43 PM, michelbutz wrote:
>> So it is the same parm as the one in the pause
> 
> Yes.
> 
> . IEAVPSE/IEAVPSE2/IEA4PSE/IEA4PSE2 release_code
> . IEAVXFR/IEAVXFR2/IEA4XFR/IEA4XFR2 current_du_release_code
> 
> will be set to the value specified by one of the following-
> 
> . IEAVRLS/IEAVRLS2/IEA4RLS/IEA4RLS2 target_du_release_code
> . IEAVXFR/IEAVXFR2/IEA4XFR/IEA4XFR2 target_du_release_code
> . IEAVAPE2/IEA4APE2 owner_termination_release_code
> 
> All of the parameters are three bytes in length.
> 
> You should always use a non-0 unique value for the 
> owner_termination_release_code parameter so that you can tell the PET was 
> released by Release or Transfer, or because the PET owning address space 
> terminated.
> 
> Greg
> 
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Re: Release code paramter of IEAVRLS2

2016-06-02 Thread michelbutz

So it is the same parm as the one in the pause 

Sent from my iPhone

> On Jun 3, 2016, at 12:00 AM, Greg Dyck  wrote:
> 
>> On 6/2/2016 7:08 PM, michealbutz wrote:
>> I have a question about the 3rd paramter of IEAVRLS2 target_du_release_code
>> it is specfied as 4 bytes. Is this the same as the 4th paramter of the Pause
>> service release code this is specfied as being 3 bytes
> 
> Sigh... I checked the code and the description of IEAVRLS2 has two errors in 
> it.
> 
> First, there are only 4 parameters passed.  The book should show-
> 
>   ,(return_code
>,target_du_pause_element_token
>,target_du_release_code
>,linkage)
> 
> Second, the target_du_release_code parameter should be 3 bytes in size, not 
> 4, matching the size of the pause/transfer release_code parameter.
> 
> The definition of IEA4RLS2, the 64 bit address parameter list equivalent of 
> IEAVRLS2, shows the correct information.
> 
> Greg
> 
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Re: TCPIP Help

2016-06-01 Thread michelbutz

Can I ask you another question did you get z/OS 
2.2 from zpdt  as I am still waiting 

Thanks 

Sent from my iPhone

> On Jun 1, 2016, at 10:21 AM, Scott Ford  wrote:
> 
> All:
> 
> I need some help guys/gals.  I have installed z/OS 2.2 under z/PDT and have
> a wierd issue. I am trying to send a file via IND$FILE, I see the xref
> start and it hangs forever forcing me to cancel the TSO userid. Could this
> be a IP routing issue ?  I need some help on where to start looking.  I
> realize this isnt the TCPIP forum and apologize for the thread.but I need
> some help.
> 
> Regards,
> Scott
> 
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Re: SUSPEND/RESUME is slower than WAIT/POST. PAUSE/RELEASE is slower than both.

2016-05-26 Thread michelbutz

Can you tell us the following 

What type of processor 
 The work load 
  What version of z/OS these  are relevant factors

Sent from my iPhone

> On May 26, 2016, at 1:29 PM, Jerry Callen  wrote:
> 
> (A very delayed follow-up on a thread from yesteryear...)
> 
> tl;dr: In unauthorized code, ECBs are much faster than pause elements.
> 
> I wrote a simple test program to compare the performance of WAIT/POST and 
> pause elements. The program has two tasks and simply ping-pongs back and 
> forth between them (no overlapped execution). Each task has a synchronization 
> gadget, either an ECB or a pause element. The tasks use each other's 
> synchronization gadget to just transfer control back and forth between each 
> other in a loop. This is a pretty unrealistic test (in terms of being like 
> anything "real" code would do), but it does illustrate the relative 
> performance of the two synchronization methods.
> 
> Note that this unauthorized code, and tasks, not SRBs This means that all of 
> the synchronization primitives used SVCs, not branch entry points. The code 
> is 64-bit C++ compiled with xlC using -q64 and thread_create() to create the 
> tasks. The code is running on a z13, native LPAR, z/OS 2.2.
> 
> The mechanisms I tested are:
> 
> * ECBs: each task just alternates between a WAIT on its own ECB and a POST of 
> the other task's ECB.
> * Pause elements with Pause (iea4pse) and Release (iea4rls) taking the role 
> of WAIT and POST.
> * Pause elements using Transfer (iea4xfr) in "transfer and pause" mode (one 
> call to do both).
> * Pause elements using Transfer (iea4xfr) in "just transfer" mode followed by 
> Pause (iea4pse).
> 
> Here are the results:
> 
> Relative performance: total CPU
> ECB   1.0
> Pause/Resume  4.30
> Transfer and Pause3.25
> Transfer with separate Pause  4.55
> 
> Relative performance: elapsed
> ECB   1.0
> Pause/Resume  6.06
> Transfer and Pause4.75
> Transfer with separate Pause  6.28
> 
> -- Jerry
> 
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Re: XMEM and Swap ability

2016-05-17 Thread michelbutz

Rob

I understand now however the second address space is a started task

So I don't have axlist,tklist,lxlist available

I guess thinking about it the design was a good
Idea as we shouldn't be "hacking" into system 
Address spaces 

Sent from my iPhone

> On May 17, 2016, at 8:22 AM, Rob Scott <rsc...@rocketsoftware.com> wrote:
> 
> If you are in control of both address spaces (ie the second ASID is not 
> "foreign"), there are all sorts of non-common memory sharing options 
> available to you, including (but not limited to) :
> 
> (1) ASID1 starting ASID2 using ASCRE - you can get an official cross-memory 
> bind and then use ALETs to access data in ASID2 from ASID1
> (2) Use shared memory objects
> (3) Use PC-ss owned by either/both ASIDs to add items to queues in the other 
> ASID
> (4) SCOPE=ALL dataspaces
> (5) IARVSERV
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of michelbutz
> Sent: Tuesday, May 17, 2016 12:59 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: XMEM and Swap ability
> 
> So the face that a SRB is running in space #2
> 
> Would automatically mKe it swapped in ?
> 
> If I had to go thru all that trouble of writing A routine I would rather XMEM 
> post space #2 to do A SYSEVENT TRANSWAP
> 
> Sent from my iPhone
> 
>>> On May 15, 2016, at 3:59 PM, Ed Jaffe <edja...@phoenixsoftware.com> wrote:
>>> 
>>> On 5/15/2016 11:12 AM, michealbutz wrote:
>>> Hi,
>>> 
>>> Transferring data between 2 address spaces weather its MVCP/MVCS or
>>> AR mode there is always the possibility of a S0C4.
>>> 
>>> What the best way of making sure the target Address Space is Swapped in.
>>> Doing XMEM post to  the target address space  to do a SYSEVENT ?
>> 
>> Space #1 should schedule an SRB to Space #2. That SRB can PC back to a 
>> routine in the private area of Space #1. That routine can use AR mode to 
>> copy anything it wants in either direction without fear of abend caused by 
>> swap out of either space.
>> 
>> --
>> Edward E Jaffe
>> Phoenix Software International, Inc
>> 831 Parkview Drive North
>> El Segundo, CA 90245
>> http://www.phoenixsoftware.com/
>> 
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Re: XMEM and Swap ability

2016-05-17 Thread michelbutz

So the face that a SRB is running in space #2 

Would automatically mKe it swapped in ?

If I had to go thru all that trouble of writing 
A routine I would rather XMEM post space #2 to do 
A SYSEVENT TRANSWAP 

Sent from my iPhone

> On May 15, 2016, at 3:59 PM, Ed Jaffe  wrote:
> 
>> On 5/15/2016 11:12 AM, michealbutz wrote:
>> Hi,
>> 
>> Transferring data between 2 address spaces weather its MVCP/MVCS or AR mode
>> there is always the possibility of a S0C4.
>> 
>> What the best way of making sure the target Address Space is Swapped in.
>> Doing XMEM post to  the target address space  to do a SYSEVENT ?
> 
> Space #1 should schedule an SRB to Space #2. That SRB can PC back to a 
> routine in the private area of Space #1. That routine can use AR mode to copy 
> anything it wants in either direction without fear of abend caused by swap 
> out of either space.
> 
> -- 
> Edward E Jaffe
> Phoenix Software International, Inc
> 831 Parkview Drive North
> El Segundo, CA 90245
> http://www.phoenixsoftware.com/
> 
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Can a FRR routine be in the SASN address space

2016-05-15 Thread michelbutz

Hi

The documentation states that SETFRR can be issued ASC AR mode and PASN |= SASN 
|= HASN

so can the recovery routine itself be in a secondary address space I am taking 
protecting the code in the primary address space 

Thanks 

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Re: XMEM and Swap ability

2016-05-15 Thread michelbutz

Forget about my design how about 
A general XMEM question what the point if
You are going to get S0C4

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> On May 15, 2016, at 2:30 PM, Binyamin Dissen  
> wrote:
> 
> On Sun, 15 May 2016 14:12:39 -0400 michealbutz 
> wrote:
> 
> :>Transferring data between 2 address spaces weather its MVCP/MVCS or AR mode
> :>there is always the possibility of a S0C4. 
> 
> :>What the best way of making sure the target Address Space is Swapped in.
> :>Doing XMEM post to  the target address space  to do a SYSEVENT ?  
> 
> Terrible design. You should rethink it.
> 
> --
> Binyamin Dissen 
> http://www.dissensoftware.com
> 
> Director, Dissen Software, Bar & Grill - Israel
> 
> 
> Should you use the mailblocks package and expect a response from me,
> you should preauthorize the dissensoftware.com domain.
> 
> I very rarely bother responding to challenge/response systems,
> especially those from irresponsible companies.
> 
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Re: Strange out out from OBTAIN

2016-05-10 Thread michelbutz

Thanks

Sent from my iPhone

> On May 10, 2016, at 3:36 PM, Gerhard Postpischil <gerha...@charter.net> wrote:
> 
>> On 5/10/2016 2:18 PM, michelbutz wrote:
>> Using an example in the DFSSMS advanced services guide I got strange
>> output from OBTAIN With CAMLST
>> 
>> OBTAIN DSCB DSCB.   CAMLST SEARCH,DSABC,VOL,WORKAREA DSABC.   DC.
>> CL44'data.set.name' VOL. DC.  CL6'VOLSER' WORKAREA DS CL140
>> 
>> Register 15 returned a zero
>> 
>> WORKAREA pointed to a '1' indicating a format1 DSCB then a volser
>> when I back up the address of WORKAREA by 50 bytes I got the 44 bytes
>> dataset name followed by the volser followed by a '1' followed by the
>> volser again The 2 byte volseq field didn't seem to make any sense
>> and the 3 byte creation date had some binary number not a EBCDIC
>> representation that I would expect
> 
> When you backup 50 bytes from the work area, you are looking at your search 
> parameters DC. and VOL.OBTAIN only returns the data portion of the DSCB, 
> so you got exactly what you were asking for. To make this easier to work 
> with, define the DSN and work area consecutively, then the IECSDSL! 1 mapping 
> will match exactly.
> 
> Gerhard Postpischil
> Bradford, VT
> 
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Re: Dataset space information

2016-05-10 Thread michelbutz

I would assume a layout of DSCB format 1 didn't quite match up to the 
documentation 
Specifically the volser followed the DSN followed by a '1' I assume for format 
1 DSCB for by the volser again 

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> On May 10, 2016, at 2:52 PM, John Eells <ee...@us.ibm.com> wrote:
> 
> What information are you trying to get, exactly?
> 
> michelbutz wrote:
>> Hi
>> 
>> I need to obtain dataset space information
> 
> 
> -- 
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> IBM Poughkeepsie
> ee...@us.ibm.com
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Strange out out from OBTAIN

2016-05-10 Thread michelbutz

Hi

Using an example in the DFSSMS advanced services guide I got strange output 
from OBTAIN
With CAMLST

 OBTAIN DSCB
DSCB.   CAMLST SEARCH,DSABC,VOL,WORKAREA
DSABC.   DC. CL44'data.set.name'
VOL. DC.  CL6'VOLSER'
WORKAREA DS CL140

Register 15 returned a zero

WORKAREA pointed to a '1' indicating a format1
DSCB then a volser when I back up the address of WORKAREA by 50 bytes I got the 
44 bytes dataset name followed by the volser followed by a '1' followed by the 
volser again 
The 2 byte volseq field didn't seem to make any sense and the 3 byte creation 
date had some binary number not a EBCDIC representation that I would expect


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Re: z10BC Mainframe Available in Connecticut for Your Basement

2016-05-06 Thread michelbutz

I didn't catch the initial  e-mail thread what did he pay and what is his 
monthly electrical bill 

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> On May 6, 2016, at 10:55 AM, Timothy Sipples  wrote:
> 
> For those of you who would like to attempt to recreate Connor's feat,
> especially if you have understanding parents, you may wish to consider this
> auction:
> 
> https://www.govdeals.com/index.cfm?fa=Main.Item=452=3678
> 
> This z10BC machine is two model generations newer than Connor's z890
> machine, but the higher asking price naturally reflects that. (Connor got a
> great deal.) Like Connor's z890, storage is not included. According to the
> listing, this z10BC machine has ESCON, FICON, and 1000BASE-T connectivity,
> one IFL, and a PCI rating of approximately 127 with two CPs (G02 capacity
> model). The FICON connectivity is rather interesting since, as I understand
> it, it should be able to negotiate a link with FICON/FCP-attached storage
> of practically any vintage. Not necessarily a *fast* connection, but a
> connection. This particular machine is configured with 32 GB of memory, so
> it's quite realistic to run multiple LPARs. It's compatible with all
> current IBM operating system and software releases, to my knowledge,
> although z/VM 6.3 will be the last release to support the z10BC. The z10BC
> was introduced in late 2008. It'd be a fine addition to the finest home
> data center. Assuming you can get it up and running, it will support your
> most mission-critical home workloads.
> 
> Happy bidding. And no, I have no affiliation with the University of
> Connecticut.
> 
> 
> Timothy Sipples
> IT Architect Executive, Industry Solutions, IBM z Systems, AP/GCG/MEA
> E-Mail: sipp...@sg.ibm.com
> 
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Re: Dataset space information

For CVAF I need the DEB of the VTOC 

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> On May 3, 2016, at 7:24 PM, Mike Shaw <techsupp...@quickref.com> wrote:
> 
>> On 5/3/2016 11:29 AM, michelbutz wrote:
>> Hi
>> ..
> 
> Michael, since you said "...what is the VTOC..." it looks like you have a 
> long row to hoe..
> 
> To read the VTOC of a DASD volume you can issue a RDJFCB for a DDNAME that is 
> allocated to the volume, set the DSN in that JFCB to all x'04' characters, 
> then use OPEN TYPE=J to open the VTOC with that JFCB.
> 
> You can then read the entire with EXCP or BSAM to get the DSCBs and 
> interrogate each one in turn.
> 
> If you just want space info for one DS, maybe CVAF is better.
> 
> We have tried CVAF, BSAM, and EXCP; EXCP with a chained channel program is 
> fastest. If you don't care about speed, then use CVAF.
> 
> Mike Shaw
> MVS/QuickRef Support Group
> Chicago-Soft, Ltd.
> 
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Re: SRB dispatching question

Thanks I am going to try the GTF trace

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> On May 3, 2016, at 9:02 AM, Blaicher, Christopher Y.  
> wrote:
> 
> Peter,
> Obviously I didn't fully put on my thinking cap yesterday when I mentioned 
> the LOCAL LOCK.
> 
> I was attempting to think of what might be causing the poster's perceived 
> condition of SRB #2 not appearing to run in the address space of the PAUSED 
> global SRB #1.
> Your comment seems to be backing my understanding that once SRB #1 did the 
> PAUSE, SRB #2, or any other qualifying unit of work, was free to run in the 
> address space subject to normal dispatching rules.
> 
> Michel,
> You may want to run this situation on a test machine and start a GTF trace 
> and see what is happening from that.  It should answer the question about if 
> the second SRB is being dispatched or not.
> 
> Chris Blaicher
> Technical Architect
> Mainframe Development
> Syncsort Incorporated
> 50 Tice Boulevard, Woodcliff Lake, NJ 07677
> P: 201-930-8234  |  M: 512-627-3803
> E: cblaic...@syncsort.com
> 
> www.syncsort.com
> 
> 
> 
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of Peter Relson
> Sent: Tuesday, May 3, 2016 7:51 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: SRB dispatching question
> 
> I'll point out that the very fact that a global SRB paused very likely means 
> that you did not consider the SRB itself truly to be global. The system will 
> no longer treat it as such after the pause.
> 
> Chris mentioned the local lock. I'm not sure why. You can't pause a work unit 
> that is holding the local lock. Obviously some other running work unit could 
> hold the local lock and thus prevent an SRB scheduled with LLOCK=YES from 
> beginning.
> 
> In the scenario posed
> SRB 1 scheduled to address space A pauses SRB 2 was scheduled to address 
> space A (from anywhere) SRB 2 will run, according to normal dispatch priority 
> rules.
> 
> Peter Relson
> z/OS Core Technology Design
> 
> 
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> 
> 
> ATTENTION: -
> 
> The information contained in this message (including any files transmitted 
> with this message) may contain proprietary, trade secret or other 
> confidential and/or legally privileged information. Any pricing information 
> contained in this message or in any files transmitted with this message is 
> always confidential and cannot be shared with any third parties without prior 
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Re: Dataset space information

This all started by me trying to find out how space was taken by a dataset DSCB 
info which led me to CVAFDIR
It needed the DEB of the VTOC 
Maybe I should of used OBTAIN/CAMLIST

Sent from my iPhone

> On May 3, 2016, at 4:09 PM, J R <jayare...@hotmail.com> wrote:
> 
> The RDJFCB doesn't care too much about the DCB other than for the DDNAME and 
> where to put the copy of the JFCB.  
> 
> I'm not really sure what you're trying to do.  Unless you actually want to 
> access your dataset rather than its DSCB, why do you want to access the VTOC? 
>  
> 
> Back in the '60s, this sort of thing was in the System Programmer's Guide.  
> It may be in Using Datasets or something similar now. 
> 
> However , you've lost me now.  I don't know why you need the DEB.  But you 
> should be able to get to it from the DCB.  
> 
> Sent from my iPhone
> 
>> On May 3, 2016, at 15:54, michelbutz <michealb...@comcast.net> wrote:
>> 
>> Okay then the DCB on the open type=j is for the VTOC how about the DCB for 
>> the RDJFCB 
>> The original DCB in my program was for VB
>> Dataset 
>> I hate bothering everybody is this documented anywhere i.e how to get the 
>> deb of the VTOC 
>> 
>> 
>> Sent from my iPhone
>> 
>>> On May 3, 2016, at 3:44 PM, J R <jayare...@hotmail.com> wrote:
>>> 
>>> You should use BSAM, ie. READ, not GET, KEYLEN=44, BLKSIZE=140? (Not sure, 
>>> it's been a long time). Then read until you see your damage in the key 
>>> area. Or, if you are more adventurous, you could use BDAM and search 
>>> directly for the key you are interested in. 
>>> 
>>> Sent from my iPhone
>>> 
>>>> On May 3, 2016, at 15:11, michelbutz <michealb...@comcast.net> wrote:
>>>> 
>>>> Something strange is bombed on the open 
>>>> Message IEC141I the dataset it in the message is sys1.vtoc
>>>> The DCB whose DSCB I am trying to access is a VB have that  DCB on the 
>>>> open type=j 
>>>> 
>>>> Sent from my iPhone
>>>> 
>>>>> On May 3, 2016, at 2:35 PM, J R <jayare...@hotmail.com> wrote:
>>>>> 
>>>>> Do the RDJFCB first, *then* move the 44X'4' to JFCBDSNM. 
>>>>> 
>>>>> Sent from my iPhone
>>>>> 
>>>>>> On May 3, 2016, at 14:30, michelbutz <michealb...@comcast.net> wrote:
>>>>>> 
>>>>>> I am still getting return code 4 in R15 CVSTAT is 8
>>>>>> 
>>>>>> I first move 44X'04' to JFCBDSNM
>>>>>> I then do a READJFCB FILE
>>>>>> Everything is okay I get R15 = 0
>>>>>> I then do OPEN FILE,TYPE=J
>>>>>> R15 = 0
>>>>>> I then do ICM. R11,B'0111',DCBDEBA
>>>>>> XC BUFLIST(BFLHLN+BFLELN),BUFLIST
>>>>>> OI  BFLHFL,BFLHDSCB
>>>>>> MVI. BFLHNOE,1
>>>>>> LA. R6,DS1FMTID
>>>>>> ST. R6,BFLEBUF
>>>>>> OI.  BFLEFL,BFLECHR
>>>>>> MVI. BFLELTH,DSCBLTH
>>>>>> 
>>>>>> CVAFDIR ACCESS=READ,DSN=DSN,BUFLIST=BUFLIST,DEB=(R11)
>>>>>> 
>>>>>> I get rerun code 4 in R15 and CVSTAT is 08 invalid DEB
>>>>>> 
>>>>>> Sent from my iPhone
>>>>>> 
>>>>>>> On May 3, 2016, at 1:56 PM, J R <n...@hotmail.com> wrote:
>>>>>>> 
>>>>>>> Nope. 
>>>>>>> 
>>>>>>> Sent from my iPhone
>>>>>>> 
>>>>>>>> On May 3, 2016, at 13:55, Staller, Allan <allan.stal...@wunderman.com> 
>>>>>>>> wrote:
>>>>>>>> 
>>>>>>>> ITYM 44x'40'
>>>>>>>> 
>>>>>>>> 
>>>>>>>> 
>>>>>>>> So, as I posted before:  
>>>>>>>> 
>>>>>>>> VTOC DSN is 44X'4'
>>>>>>>> 
>>>>>>>> This email � including attachments � may contain confidential 
>>>>>>>> information. If you are not the intended recipient, do not copy, 
>>>>>>>> distribute or act on it. Instead, notify the sender immediately and 
>>>>>>>> delete the message.
>>>>>>>> 
>>>>>>>> --
>>>>>>>> Fo

Re: Dataset space information

Okay then the DCB on the open type=j is for the VTOC how about the DCB for the 
RDJFCB 
The original DCB in my program was for VB
Dataset 
I hate bothering everybody is this documented anywhere i.e how to get the deb 
of the VTOC 


Sent from my iPhone

> On May 3, 2016, at 3:44 PM, J R <jayare...@hotmail.com> wrote:
> 
> You should use BSAM, ie. READ, not GET, KEYLEN=44, BLKSIZE=140? (Not sure, 
> it's been a long time). Then read until you see your damage in the key area. 
> Or, if you are more adventurous, you could use BDAM and search directly for 
> the key you are interested in. 
> 
> Sent from my iPhone
> 
>> On May 3, 2016, at 15:11, michelbutz <michealb...@comcast.net> wrote:
>> 
>> Something strange is bombed on the open 
>> Message IEC141I the dataset it in the message is sys1.vtoc
>> The DCB whose DSCB I am trying to access is a VB have that  DCB on the open 
>> type=j 
>> 
>> Sent from my iPhone
>> 
>>> On May 3, 2016, at 2:35 PM, J R <jayare...@hotmail.com> wrote:
>>> 
>>> Do the RDJFCB first, *then* move the 44X'4' to JFCBDSNM. 
>>> 
>>> Sent from my iPhone
>>> 
>>>> On May 3, 2016, at 14:30, michelbutz <michealb...@comcast.net> wrote:
>>>> 
>>>> I am still getting return code 4 in R15 CVSTAT is 8
>>>> 
>>>> I first move 44X'04' to JFCBDSNM
>>>> I then do a READJFCB FILE
>>>> Everything is okay I get R15 = 0
>>>> I then do OPEN FILE,TYPE=J
>>>> R15 = 0
>>>> I then do ICM. R11,B'0111',DCBDEBA
>>>> XC BUFLIST(BFLHLN+BFLELN),BUFLIST
>>>> OI  BFLHFL,BFLHDSCB
>>>> MVI. BFLHNOE,1
>>>> LA. R6,DS1FMTID
>>>> ST. R6,BFLEBUF
>>>> OI.  BFLEFL,BFLECHR
>>>> MVI. BFLELTH,DSCBLTH
>>>> 
>>>> CVAFDIR ACCESS=READ,DSN=DSN,BUFLIST=BUFLIST,DEB=(R11)
>>>> 
>>>> I get rerun code 4 in R15 and CVSTAT is 08 invalid DEB
>>>> 
>>>> Sent from my iPhone
>>>> 
>>>>> On May 3, 2016, at 1:56 PM, J R <n...@hotmail.com> wrote:
>>>>> 
>>>>> Nope. 
>>>>> 
>>>>> Sent from my iPhone
>>>>> 
>>>>>> On May 3, 2016, at 13:55, Staller, Allan <allan.stal...@wunderman.com> 
>>>>>> wrote:
>>>>>> 
>>>>>> ITYM 44x'40'
>>>>>> 
>>>>>> 
>>>>>> 
>>>>>> So, as I posted before:  
>>>>>> 
>>>>>> VTOC DSN is 44X'4'
>>>>>> 
>>>>>> This email � including attachments � may contain confidential 
>>>>>> information. If you are not the intended recipient, do not copy, 
>>>>>> distribute or act on it. Instead, notify the sender immediately and 
>>>>>> delete the message.
>>>>>> 
>>>>>> --
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>>>>>> send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
>>>>> 
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Re: Dataset space information

Something strange is bombed on the open 
Message IEC141I the dataset it in the message is sys1.vtoc
The DCB whose DSCB I am trying to access is a VB have that  DCB on the open 
type=j 

Sent from my iPhone

> On May 3, 2016, at 2:35 PM, J R <jayare...@hotmail.com> wrote:
> 
> Do the RDJFCB first, *then* move the 44X'4' to JFCBDSNM. 
> 
> Sent from my iPhone
> 
>> On May 3, 2016, at 14:30, michelbutz <michealb...@comcast.net> wrote:
>> 
>> I am still getting return code 4 in R15 CVSTAT is 8
>> 
>> I first move 44X'04' to JFCBDSNM
>> I then do a READJFCB FILE
>> Everything is okay I get R15 = 0
>> I then do OPEN FILE,TYPE=J
>> R15 = 0
>> I then do ICM. R11,B'0111',DCBDEBA
>> XC BUFLIST(BFLHLN+BFLELN),BUFLIST
>> OI  BFLHFL,BFLHDSCB
>> MVI. BFLHNOE,1
>> LA. R6,DS1FMTID
>> ST. R6,BFLEBUF
>> OI.  BFLEFL,BFLECHR
>> MVI. BFLELTH,DSCBLTH
>> 
>> CVAFDIR ACCESS=READ,DSN=DSN,BUFLIST=BUFLIST,DEB=(R11)
>> 
>> I get rerun code 4 in R15 and CVSTAT is 08 invalid DEB
>> 
>> Sent from my iPhone
>> 
>>> On May 3, 2016, at 1:56 PM, J R <n...@hotmail.com> wrote:
>>> 
>>> Nope. 
>>> 
>>> Sent from my iPhone
>>> 
>>>> On May 3, 2016, at 13:55, Staller, Allan <allan.stal...@wunderman.com> 
>>>> wrote:
>>>> 
>>>> ITYM 44x'40'
>>>> 
>>>> 
>>>> 
>>>> So, as I posted before:  
>>>> 
>>>> VTOC DSN is 44X'4'
>>>> 
>>>> This email � including attachments � may contain confidential information. 
>>>> If you are not the intended recipient, do not copy, distribute or act on 
>>>> it. Instead, notify the sender immediately and delete the message.
>>>> 
>>>> --
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Re: Dataset space information

I am still getting return code 4 in R15 CVSTAT is 8

I first move 44X'04' to JFCBDSNM
I then do a READJFCB FILE
Everything is okay I get R15 = 0
I then do OPEN FILE,TYPE=J
R15 = 0
I then do ICM. R11,B'0111',DCBDEBA
XC BUFLIST(BFLHLN+BFLELN),BUFLIST
OI  BFLHFL,BFLHDSCB
MVI. BFLHNOE,1
LA. R6,DS1FMTID
ST. R6,BFLEBUF
OI.  BFLEFL,BFLECHR
MVI. BFLELTH,DSCBLTH

CVAFDIR ACCESS=READ,DSN=DSN,BUFLIST=BUFLIST,DEB=(R11)

I get rerun code 4 in R15 and CVSTAT is 08 invalid DEB

Sent from my iPhone

> On May 3, 2016, at 1:56 PM, J R  wrote:
> 
> Nope. 
> 
> Sent from my iPhone
> 
>> On May 3, 2016, at 13:55, Staller, Allan  wrote:
>> 
>> ITYM 44x'40'
>> 
>> 
>> 
>> So, as I posted before:  
>> 
>> VTOC DSN is 44X'4'
>> 
>> This email � including attachments � may contain confidential information. 
>> If you are not the intended recipient, do not copy, distribute or act on it. 
>> Instead, notify the sender immediately and delete the message.
>> 
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Re: Dataset space information

I have seen examples in the DFSMS advanced services using CVAFDIR one of the 
parameters is the DEB of the VTOC is there a way to get that 
Normally when you open a dataset its in the DCB

Sent from my iPhone

> On May 3, 2016, at 12:15 PM, John McKown <john.archie.mck...@gmail.com> wrote:
> 
>> On Tue, May 3, 2016 at 10:54 AM, michelbutz <michealb...@comcast.net> wrote:
>> 
>> I am sorry dont understand what is the VTOC
>> Dataset name, there is another dataset on that volume sys1.vvds.v
>> concentrated to the volser
> 
> SYS1.VTOCIX.aa (aa is _normally_ the same as the volser, but need
> not necessarily be) is a _index_ into the actual VTOC itself. It does not
> contain the VTOC information.
> SYS1.VVDS.Vaa (aa, again, is _normally_ the same as the volser, but
> need not necessarily be) is a VSAM-like data set which contains SMS
> information for data sets in the VTOC.
> 
> The VTOC is the Volume Table Of Contents. IT IS NOT A DATA SET!!! It does
> _not_ show up in a VTOC listing of data sets on a volume. The VOL1 record
> on a volume contains a field which points to where the VTOC exists. The
> VTOC is "self described" in the type 4 VTOC record. The VTOC most closely
> resembles a keyed BDAM data set (remember, it's not a data set!) which has
> a 44 byte hardware key. The hardware key is the same as the DSN. For the
> VTOC, the hardware key is 44x'04', that is 44 repetitions of the hex value
> x'04'. When z/OS processes the VARY ONLINE command for a DASD device, it
> reads the VOL1 record. This validates the volume serial is unique and it
> then stores the address of the VTOC in the UCB for other users, such as
> DADSM allocation.
> 
> I don't know what you want to do, but personally, I prefer using the
> output from the IDCAMS DCOLLECT command for data set information. Of
> course, it is not useful for a "one off" data set requirement. If you want
> a VTOC mapping of where data sets reside on a volume, for some reason, then
> using ADRDSSU with a PARM='TYPRUN=NORUN' and a DEFRAG command will get you
> a fairly nice listing.
> 
> You could also do a IEHLIST of the volume.
> 
> Oh, and I also use the REXX / TSO LISTDSI command for data set information
> retrieval.
> 
> 
> -- 
> The unfacts, did we have them, are too imprecisely few to warrant our
> certitude.
> 
> Maranatha! <><
> John McKown
> 
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Re: Dataset space information

I am sorry dont understand what is the VTOC 
Dataset name, there is another dataset on that volume sys1.vvds.v concentrated 
to the volser 

Sent from my iPhone

> On May 3, 2016, at 11:46 AM, J R <jayare...@hotmail.com> wrote:
> 
> VTOC DSN is 44X'4' 
> 
> Sent from my iPhone
> 
>> On May 3, 2016, at 11:30, michelbutz <michealb...@comcast.net> wrote:
>> 
>> Hi
>> 
>> I need to obtain dataset space information 
>> 
>> I have been looking at the DFSMS advanced services and there seems like a 
>> few away of going about this 
>> 
>> The OBTAIN and camlist seems like the easiest 
>> As all it needs is a dataset name and volser
>> 
>> The CVAF macros seems like the must current
>> But I would need to get (if I am using for instance)
>> CVAFDIR the DEB of the VTOC
>> 
>> 
>> BTW is the VTOC dataset name SYS1.VTOCIX.  (Volser) ?
>> 
>> I guess that would mean allocating and opening it
>> 
>> Any suggestions ?
>> 
>> Sent from my iPhone
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Dataset space information

Hi

I need to obtain dataset space information 

I have been looking at the DFSMS advanced services and there seems like a few 
away of going about this 

The OBTAIN and camlist seems like the easiest 
As all it needs is a dataset name and volser

The CVAF macros seems like the must current
But I would need to get (if I am using for instance)
CVAFDIR the DEB of the VTOC


BTW is the VTOC dataset name SYS1.VTOCIX.  (Volser) ?

I guess that would mean allocating and opening it

Any suggestions ?

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Re: SRB dispatching question

Thanks so much the documentation for IEAVPSE2 says "NO LOCKS HELD"

Sent from my iPhone

> On May 3, 2016, at 7:50 AM, Peter Relson  wrote:
> 
> I'll point out that the very fact that a global SRB paused very likely 
> means that you did not consider the SRB itself truly to be global. The 
> system will no longer treat it as such after the pause. 
> 
> Chris mentioned the local lock. I'm not sure why. You can't pause a work 
> unit that is holding the local lock. Obviously some other running work 
> unit could hold the local lock and thus prevent an SRB scheduled with 
> LLOCK=YES from beginning. 
> 
> In the scenario posed
> SRB 1 scheduled to address space A pauses
> SRB 2 was scheduled to address space A (from anywhere)
> SRB 2 will run, according to normal dispatch priority rules.
> 
> Peter Relson
> z/OS Core Technology Design
> 
> 
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Re: SRB dispatching question

2016-05-02 Thread michelbutz

My situation is I paused a global (non preemptable) SRB then another address 
space
schedules a global SRB in that same address space where the scope=global non 
preemptable SRB called IEAVPSE2
Will the second take off it doesn't seem like it did

Thanks 

Sent from my iPhone

> On May 2, 2016, at 3:11 PM, Blaicher, Christopher Y. <cblaic...@syncsort.com> 
> wrote:
> 
> IF SRB #1 that is non-preemptable schedules SRB #2 and then does a PAUSE, SRB 
> #2 can still be dispatched.
> 
> Sorry if I wasn't clear.  SRB #1 can't be interrupted to dispatch other work 
> on the processor it is running on, but that doesn't mean nothing else can 
> run.  Also, if it stops itself, the dispatcher is going to find something to 
> dispatch on the processor.  Once the event happens that will resume the 
> paused SRB, it will be dispatched again and run until it is done or issues 
> another PAUSE.
> 
> Think about it.  If you had a non-preemptable SRB running on a uni-processor, 
> and it issued a PAUSE, and nothing else could run, how would the PAUSE be 
> resolved?
> 
> Chris Blaicher
> Technical Architect
> Mainframe Development
> Syncsort Incorporated
> 50 Tice Boulevard, Woodcliff Lake, NJ 07677
> P: 201-930-8234  |  M: 512-627-3803
> E: cblaic...@syncsort.com
> 
> www.syncsort.com
> 
> 
> 
> 
> 
> -Original Message-----
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of michelbutz
> Sent: Monday, May 2, 2016 2:26 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: SRB dispatching question
> 
> So it DOESN'T get dispatched 
> 
> Sent from my iPhone
> 
>> On May 2, 2016, at 2:17 PM, Blaicher, Christopher Y. 
>> <cblaic...@syncsort.com> wrote:
>> 
>> Yes.  It wasn't pre-empted, it paused.
>> 
>> Chris Blaicher
>> Technical Architect
>> Mainframe Development
>> Syncsort Incorporated
>> 50 Tice Boulevard, Woodcliff Lake, NJ 07677
>> P: 201-930-8234  |  M: 512-627-3803
>> E: cblaic...@syncsort.com
>> 
>> www.syncsort.com
>> 
>> 
>> 
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] 
>> On Behalf Of michelbutz
>> Sent: Sunday, May 1, 2016 6:46 PM
>> To: IBM-MAIN@LISTSERV.UA.EDU
>> Subject: SRB dispatching question
>> 
>> Hi
>> 
>> If a nonpreamtable scope=global SRB does a pause And another SRB is 
>> scheduled does it get dispatched ?
>> 
>> Sent from my iPhone
>> 
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>> 
>> 
>> 
>> 
>> ATTENTION: -
>> 
>> The information contained in this message (including any files transmitted 
>> with this message) may contain proprietary, trade secret or other 
>> confidential and/or legally privileged information. Any pricing information 
>> contained in this message or in any files transmitted with this message is 
>> always confidential and cannot be shared with any third parties without 
>> prior written approval from Syncsort. This message is intended to be read 
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SRB dispatching question

2016-05-01 Thread michelbutz

Hi

If a nonpreamtable scope=global SRB does a pause 
And another SRB is scheduled does it get dispatched ?

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Re: UCBSCAN and LSPACE

2016-04-30 Thread michelbutz

Once I check for Dasd UCB 
Got it working thanks

Sent from my iPhone

> On Apr 28, 2016, at 9:12 PM, Gerhard Postpischil <gerha...@charter.net> wrote:
> 
>> On 4/27/2016 3:10 PM, michelbutz wrote:
>> Can any one of the parameters returned by UCBSCAN be used with LSPACE
>> As ucbscan returns different parts of the UCB
> 
> 1) What does the documentation say about LSPACE parameters?
> 
> 2) Run UCBSCAN unauthorized to get a copy of a UCB, and invoke UCBSCAN to see 
> what happens.
> 
> Both of these would be faster than asking a poorly phrased question.
> 
> P.S. If 2) fails, you can try to run the UCB chain yourself - see SHOWDS 
> program for source.
> 
> Gerhard Postpischil
> Bradford, VT
> 
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Re: UCBSCAN and LSPACE

2016-04-30 Thread michelbutz

Thanks for your help

I got it working

Sent from my iPhone

> On Apr 28, 2016, at 11:51 PM, Charles Mills <charl...@mcn.org> wrote:
> 
> Did not see the original question but yes:
> 
> UCBSCAN COPY, +
>   WORKAREA=UCBSCAN_Work,  +
>   UCBAREA=UCBSCAN_UCBAREA, Return area for UCB copy   +
>   VOLSER=VOLSER,  Input VOLSER to search for  +
>   LDEVNCHAR=UCBSCAN_LDEVNCHAR, receive logical dev number +
>   DEVN=0, Start scan from beginning   +
>   DYNAMIC=YES,also include dynamic UCBs   +
>   RANGE=ALL,  include UCBs w/ 4-digit dev numbers +
>   PLISTVER=MAX,   +
>   MF=(E,UCBSCAN_L,COMPLETE)
> *
> *  Store return and reason codes
> STR15,UCBSCAN_RETCODE Pass return code
> STR0,UCBSCAN_RSNCODE  Pass reason code
> *
> *  See if life is still worth living
> LTR   R15,R15 Life is good?
> JNZ   RETERROR  Nope
> *
> *  Set up for LSPACE
> LAR2,UCBSCAN_UCBAREA  LSPACE needs a pointer
> *
> *  Issue LSPACE
> LSPACE MF=(E,LSPACE_L),   +
>   UCB=(R2),   address of the UCB  +
>   SMF=NONE,   do not want an SMF record written   +
>   F4DSCB=0,   do not want format-4 DSCB   +
>   EXPDATA=LSPACE_EXPDATA   return expanded information
> 
> Charles
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Gerhard Postpischil
> Sent: Thursday, April 28, 2016 6:13 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: UCBSCAN and LSPACE
> 
>> On 4/27/2016 3:10 PM, michelbutz wrote:
>> Can any one of the parameters returned by UCBSCAN be used with LSPACE 
>> As ucbscan returns different parts of the UCB
> 
> 1) What does the documentation say about LSPACE parameters?
> 
> 2) Run UCBSCAN unauthorized to get a copy of a UCB, and invoke UCBSCAN to
> see what happens.
> 
> Both of these would be faster than asking a poorly phrased question.
> 
> P.S. If 2) fails, you can try to run the UCB chain yourself - see SHOWDS
> program for source.
> 
> Gerhard Postpischil
> Bradford, VT
> 
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UCBSCAN and LSPACE

2016-04-27 Thread michelbutz

Hi

Can any one of the parameters returned by UCBSCAN be used with LSPACE

As ucbscan returns different parts of the UCB

Thanks 

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Re: CSSMTP sorry for the typo

2016-03-24 Thread michelbutz

Sent from my iPhone

> On Mar 24, 2016, at 8:27 PM, michelbutz <michealb...@comcast.net> wrote:
> 
> Hi
> 
> Does anyone know if you can use CSSTMP
> 
> To put text in the body of the e-mail 
> 
> Have found anything like a CSSTMP users guide anywhere 
> 
> Thanks 
> 
> Sent from my iPhone
> 
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CSSTMP

2016-03-24 Thread michelbutz

Hi

Does anyone know if you can use CSSTMP

To put text in the body of the e-mail 

Have found anything like a CSSTMP users guide anywhere 

Thanks 

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Re: Acessing storage in a other address space

2016-01-04 Thread michelbutz

Thanks 
The only thing STORAGE shouldn't return zero
If the address space is swapped out

Thanks

Sent from my iPhone

> On Jan 4, 2016, at 5:12 AM, Rob Scott  wrote:
> 
> Search the archives for IBM-Main as this has been discussed several times.
> 
> Using CHKEAX=NO on ALESERV is not to be encouraged (to say the least) and 
> will NOT work reliably for swappable address spaces.
> 
> If you are in control on both address spaces, there are documented and 
> supported techniques to access memory in either address spaces from the other 
> - see the extended addressability manual.
> 
> If your program is an uninvited "snooper" into a foreign address space - then 
> using an SRB is typically the preferred option, however you have to 
> understand the implications of what you are doing.
> 
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of michealbutz
> Sent: Thursday, December 31, 2015 11:47 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Acessing storage in a other address space
> 
> Hi
> 
> 
> 
> I am trying to access storage in a other address space
> 
> 
> 
> I am logged on to TSOA and am running the following code under TESTAUTH
> 
> 
> 
>  L R5,0(,R5)
> 
>  USING ASCB,R5
> 
>  L R6,ASCBASSB
> 
>  USING ASSB,R6
> 
>  MVC   STOKENC,ASSBSTKN   Get the job's STOKEN
> 
>  MODESET KEY=ZERO,MODE=SUP
> 
>  XR R1,R1
> 
> 
> 
> 
> 
> 
> 
>  ALESERV ADD,  X
> 
>STOKEN=STOKENC, X
> 
>CHKEAX=NO,  X
> 
>ACCESS=PUBLIC,  X
> 
>ALET=ALET,  X
> 
> 
> 
> 
> 
> LA  R0,111
> 
> STORAGE OBTAIN,   X
> 
>   LENGTH=(R0),X
> 
>   ADDR=(R9),  X
> 
>   SP=0,   X
> 
>   BNDRY=DBLWD,X
> 
>   ALET=ALET
> 
> 
> 
> LATER ON I go to into access register mode
> 
> SAC 512
> 
> 
> 
>And Move data to the storage area
> 
>after doing so I versify the move under TESTAUTH
> 
> 
> 
> Via
> 
> 
> 
> L 9R? AR(9) L(111) XC
> 
> 
> 
> However in the target address space using TASID Storage View Option
> 
> the data I see at the address is not there, I am still under TESTAUTH at this
> 
> point (meaningthe task hasn't ended) in the first address space
> 
> 
> 
> both ALESERV and Storage have return code zeros
> 
> 
> 
> Thanks in Advance
> 
> 
> 
> 
> 
> 
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Searching archives 1986-2004

2016-01-04 Thread michelbutz

Hi 

I registered a e-mail and password however 
I can search IBM-main
But not the archives 1986-2004

Thanks

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Re: Searching archives 1986-2004

2016-01-04 Thread michelbutz

I registered my e-mail and password but it gives me a message I am *not 
authorized*

Sent from my iPhone

> On Jan 4, 2016, at 12:04 PM, Elardus Engelbrecht 
> <elardus.engelbre...@sita.co.za> wrote:
> 
> michelbutz wrote:
> 
>> I registered a e-mail and password however I can search IBM-main
>> But not the archives 1986-2004
> 
> Look in https://listserv.ua.edu/cgi-bin/wa?INDEX
> 
> You will see that old archive. Oh, BTW, that is ANOTHER list serv which is 
> NOT the same list as IBM-MAIN. You will need to register on that list serv 
> too.
> 
> Groete / Greetings
> Elardus Engelbrecht
> 
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IEAVAPE2/IEAVPSE2 for SRB

2015-12-22 Thread michelbutz

Hi

I have two questions regarding the following services used to suspend a SRB

First if IEAVPSE2 suspends a SRB Then it in fact
Works like a WAIT execution stops after the SVC 2 from wait and BASR from 
IEAVPSE2 
So how would the updated STOKEN get returned

Second IEAVAPE2 has a parameter for address space token does this mean if I 
specify the STOKEN of address space "a" I can Suspend from address space b the 
current SRB running in "a"

Thanks 

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Re: SRB And Enclave SRB

2015-11-05 Thread michelbutz

Thanks so much SRBs have apparently become more than quick and dirty type of 
work 
And do extensive processing in some instances 

Sent from my iPhone

> On Nov 4, 2015, at 6:09 PM, Dave Barry 
> <00a5644c6d08-dmarc-requ...@listserv.ua.edu> wrote:
> 
> See John Arwe's seminal work on the subject described at 
> ftp://public.dhe.ibm.com/s390/zos/wlm/WLMpresrb.pdf. 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of michelbutz
> Sent: Wednesday, November 04, 2015 1:39 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: SRB And Enclave SRB
> 
> Hi
> 
> Can someone on the list point me to where I might find the differences 
> between the above two
> 
> 
> Thanks
> 
> Sent from my iPhone
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Re: SRB And Enclave SRB

2015-11-04 Thread michelbutz

Thanks

Sent from my iPhone

> On Nov 4, 2015, at 2:25 PM, Sam Siegel <s...@pscsi.net> wrote:
> 
> Authorized assembler services guide chapter 9. SA22-7608
> 
> wlm: programing workload management services : SA22-7619 IWMECRE
> and IWM4ECRE
> 
> essentially, an enclave srb is associated with a work load management
> enclave.
> 
> 
> 
>> On Wed, Nov 4, 2015 at 10:39 AM, michelbutz <michealb...@comcast.net> wrote:
>> 
>> Hi
>> 
>> Can someone on the list point me to where I might find the differences
>> between the above two
>> 
>> 
>> Thanks
>> 
>> Sent from my iPhone
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SRB And Enclave SRB

2015-11-04 Thread michelbutz

Hi

Can someone on the list point me to where I might find the differences between 
the above two


Thanks

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Re: I am looking for a new contract/job

2015-10-27 Thread michelbutz

Each vendor ASG,SyncSort (in fact Chris B. Forgot his last name principle @ 
SyncSort said they were looking ) has careers would think with your experience 
they would take you with out question 
I'll be in Israel next May I am thinking of buying an apt in Jerusalem would 
like to make aliah retire there 

Sent from my iPhone

> On Oct 27, 2015, at 7:38 PM, Lizette Koehler  wrote:
> 
> So do you go to the vendor sites you are interested in at look at their 
> opening?
> 
> Or check out SPCI.NET, INDEED.COM, DICE.com, Monster.com
> 
> And if you use LINKEDIN, then start hooking up with the HR folks or others 
> are the companies you are interested in.
> 
> Places like SYNCSORT, COMPUWARE, CA, IBM, etc
> 
> Most hiring managers probably do not subscribe to these lists.
> 
> 
> 
> Lizette
> 
> 
> 
> -Original Message-
>> From: Binyamin Dissen 
>> Sent: Oct 27, 2015 3:54 PM
>> To: IBM-MAIN@LISTSERV.UA.EDU
>> Subject: I am looking for a new contract/job
>> 
>> As a long time member of this group, I hope I will not receive objections for
>> this personal ad.
>> 
>> I am looking for something where I can work remote most of the time from
>> Israel. Probably best with a software vendor.
>> 
>> I have more than 20 years of commercial systems software development, mostly
>> in assembler. Expert experience with AR mode, 64bit, FRRs, PCs, system exits,
>> SRBs, etc. Experience with hooking into MVS as well as CICS and DB2. 
>> 
>> Thank you.
>> 
>> --
>> Binyamin Dissen 
>> http://www.dissensoftware.com
>> 
>> Director, Dissen Software, Bar & Grill - Israel
>> 
>> 
>> Should you use the mailblocks package and expect a response from me,
>> you should preauthorize the dissensoftware.com domain.
>> 
>> I very rarely bother responding to challenge/response systems,
>> especially those from irresponsible companies.
> 
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Re: (External):Re: Fwd: Bank’s severance deal indebts laid off IT workers to be ‘on call’ for 2 years of tech support — without pay

2015-10-22 Thread michelbutz

What about the tax issue 

Think severance and employment are taxed differently I think severance is at 
higher tax rate

Sent from my iPhone

> On Oct 22, 2015, at 5:21 PM, J O Skip Robinson  
> wrote:
> 
> I've never heard that a severance package is required by law in the US, 
> although it would likely be a state issue rather than Federal. From war 
> stories I've encountered I'd say almost certainly not. Large responsible 
> companies usually offer something. Terms vary, but it's designed to keep 
> torch carrying peasants from storming the castle.
> 
> The chutzpa of Sun Trust appears to be mind-boggling. If the package is paid 
> up front in a lump sum (usual practice), then let a judge decide whether the 
> company has the right to demand labor from a person no longer employed. If 
> the package is paid out gradually over time, then it looks more like a 
> retainer and could be subject to termination for non-compliance. Sigh.
> 
> .
> .
> .
> J.O.Skip Robinson
> Southern California Edison Company
> Electric Dragon Team Paddler 
> SHARE MVS Program Co-Manager
> 626-302-7535 Office
> 323-715-0595 Mobile
> jo.skip.robin...@sce.com
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of Steve Beaver
> Sent: Thursday, October 22, 2015 11:11 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: (External):Re: Fwd: Bank’s severance deal indebts laid off IT 
> workers to be ‘on call’ for 2 years of tech support — without pay
> 
> I am ignorant: is a severance package legally required? Depends and it is 
> NEGOCIABLE 
> 
> Otherwise its Pay-to-Stay 
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of Chris Hoelscher
> Sent: Thursday, October 22, 2015 11:03 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Fwd: Bank’s severance deal indebts laid off IT workers to be ‘on 
> call’ for 2 years of tech support — without pay
> 
> Wow - a bank lets staff go - and then expects on-call answers? And the bank 
> expects "truthful" answers?  And even if the "answers" are provided in good 
> faith, but in the end turn out not the best advice, what happens then? 
> Personally - if I let someone go - I would want to be done with them ; not 
> rely on them at all'
> 
> Chris Hoelscher
> Technology Architect, Database Infrastructure Services Technology Solution 
> Services
> : humana.com
> 123 East Main Street
> Louisville, KY 40202
> Humana.com
> (502) 714-8615, (502) 476-2538
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
> Behalf Of John McKown
> Sent: Thursday, October 22, 2015 1:55 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: [IBM-MAIN] Fwd: Bank’s severance deal indebts laid off IT 
> workers to be ‘on call’ for 2 years of tech support — without pay
> 
> I certainly dislike what the bank did. I am ignorant: is a severance package 
> legally required? Hum, that probably varies. If the employment contract does 
> not require that a severance be paid, then the company can require anything 
> (legal) in order to qualify for it. IIRC, at one time our company had 
> something similar. You wouldn't get a lump sum, but you would continue to get 
> a fortnightly (2 week) pay check, with no deductions other than taxes for (up 
> to) 6 months. While receiving this pay out, you could still be called to 
> answer questions. I.e. you couldn't log onto the company's systems or need to 
> "come it". But you did need to be "reasonably"
> available for phone contact. If you refused, you're payout would stop. So it 
> really wasn't "severance", per se, more like a "retainer".
> 
>> On Thu, Oct 22, 2015 at 12:46 PM, Elardus Engelbrecht < 
>> elardus.engelbre...@sita.co.za> wrote:
>> 
>> Ed Gould wrote:
>> 
>> 
>> http://www.rawstory.com/2015/10/banks-severance-deal-indebts-laid-off-
>> it-workers-to-be-on-call-for-2-years-of-tech-support-without-pay/
>> 
>> WTF! G! Those crappies are too cheap to support their employees! 
>> That bank wants to have its bread buttered on both sides.
>> 
>> If you drop me, I drop you. Simple. My new employer wants my full 
>> attention and if needed 24 hours be on standby. Goodbye ex-employer.
>> 
>> If my ex-employer wants my work, they need to setup a contract with pay.
>> Treat me like a consultant with full [hourly] pay, not like a 
>> cheap/free slave.
>> 
>> I will surely challenge that "no-pay work after being dismissed" clause.
>> (BTW, I think our land's somewhat militant unions will go very badly 
>> mad about this...)
>> 
>> And of course move my money to another bank.
>> 
>> Even when I'm retired, I still want to be paid for any work to any 
>> ex-employer.
>> 
>> PS: You think I'm ranting for fun? Read this disgusting story about a 
>> doctor being misused for 8 years:
>> 
>> 
>> http://www.health24.com/Lifestyle/Healthy-you/Slave-doctor-in-SA-worki
>>

Re: AW: Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-19 Thread michelbutz

I would like to know the what rules are for posting 
Let IBMMAIN require proof of IDENTITY 
I didn't see that anywhere 
Are *YOU* sure everybody is who they say they are 
And Please don't  misspell my name its Joseph
With PH not with a F

Sent from my iPhone

> On Oct 19, 2015, at 1:45 AM, Peter Hunkeler  wrote:
> 
> 
>>> What the big deal I didn't want to use my real name never saw that as one 
>>> of  the requirements for  
>>> Using IBMMAIN
>> My real name is Joseph Reichman
> 
> 
> 
> 
> What a big deal?? Do *you* like to communicate with people who think they 
> have a need to hide their real personality? I definitely do not. 
> 
> 
> There are people who post on lists without mentioning their name. Bad enough. 
> But signing in the name of someone else? And who can we be sure Josef 
> Reichman isn't just another name you've arbitrarily chosen?
> 
> 
> I had not replied to any post of you since long time, and I will continue to 
> refrain from doing so. This a one-time exception. You don't seem to be 
> honest, neither about you, nor about you programming intent.
> 
> 
> --
> Peter Hunkeler
> 
> 
> 
> 
> 
> --
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Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-19 Thread michelbutz

I meant no disrespect my apologies 
To Peter Relson 

Sent from my iPhone

> On Oct 19, 2015, at 11:42 AM, John McKown  
> wrote:
> 
> On Mon, Oct 19, 2015 at 10:12 AM, Tom Marchant <
> 000a2a8c2020-dmarc-requ...@listserv.ua.edu> wrote:
> 
>> On Sat, 17 Oct 2015 12:47:46 -0500, John McKown wrote:
>> 
>> 
> 
> 
>> 
>> Perhaps Peter wasn't referring to Michael Butz not using his real name,
>> but to the reference to Peter as "Pete". That strikes me as quite
>> discourteous. I, for one, don't care what his name is. I have tended to
>> ignore his posts for a long time because he doesn't seem to bother to
>> do the basic research before asking questions. His level of expertise
>> seems to be rather low, and he seems to always want to do something
>> that he doesn't understand, and he doesn't seem to care to understand.
> 
> Ah, yes. I can understand that. I generally refer to him as Mr. Relson. I
> feel that his "position" is such that I should. He is a "recognized
> authority". I'm mainly a loud mouthed sysprog , with some
> experience and opinions.
> 
> 
> 
>> --
>> Tom Marchant
> 
> -- 
> 
> Schrodinger's backup: The condition of any backup is unknown until a
> restore is attempted.
> 
> Yoda of Borg, we are. Futile, resistance is, yes. Assimilated, you will be.
> 
> He's about as useful as a wax frying pan.
> 
> 10 to the 12th power microphones = 1 Megaphone
> 
> Maranatha! <><
> John McKown
> 
> --
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Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-18 Thread michelbutz

What the big deal I didn't want to use my real name never saw that as one of  
the requirements for 
Using IBMMAIN
So Peter Relson and all the IBM'er want to know 
Okay they help me out as they know the code 
Thanks

Sent from my iPhone

> On Oct 18, 2015, at 9:07 AM, Ted MacNEIL <eamacn...@yahoo.ca> wrote:
> 
> So, why michelbutz?
> 
> 
> -
> -teD
> -
>   Original Message  
> From: michelbutz
> Sent: Saturday, October 17, 2015 19:44
> To: IBM-MAIN@LISTSERV.UA.EDU
> Reply To: IBM Mainframe Discussion List
> Subject: Re: IEAVAPE2/IEAVPSE2 another address space
> 
> Thank you 
> 
> My real name is Joseph Reichman
> And I have licensed copy of RD
> 
> Sent from my iPhone
> 
> On Oct 17, 2015, at 10:17 AM, Peter Relson <rel...@us.ibm.com> wrote:
> 
>>> Waiting for the likes of Pete Relson to chime in
>> 
>> I tend not to chime in when a poster does not have the courtesy to the 
>> list subscribers of using their real name.
>> 
>> Pause pauses *you*, as the reference clearly says.
>> 
>> Regardless, that table row appears to be related to "waking up", so the 
>> words "pause and" should be removed.
>> 
>> Peter Relson
>> z/OS Core Technology Design
>> 
>> --
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>> send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
> 
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Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-17 Thread michelbutz

Thank you 

My real name is Joseph Reichman
And I have licensed copy of RD

Sent from my iPhone

On Oct 17, 2015, at 10:17 AM, Peter Relson  wrote:

>> Waiting for the likes of Pete Relson to chime in
> 
> I tend not to chime in when a poster does not have the courtesy to the 
> list subscribers of using their real name.
> 
> Pause pauses *you*, as the reference clearly says.
> 
> Regardless, that table row appears to be related to "waking up", so the 
> words "pause and" should be removed.
> 
> Peter Relson
> z/OS Core Technology Design
> 
> --
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Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-16 Thread michelbutz

 
Yes I'm using 2.1 

Waiting for the likes of Pete Relson to chime in 

Thanks so much

Sent from my iPhone

> On Oct 16, 2015, at 10:58 AM, John McKown  
> wrote:
> 
> Well, the URL that I'm reading is
> https://www-01.ibm.com/support/knowledgecenter/SSLTBW_2.1.0/com.ibm.zos.v2r1.ieaa800/chooch.htm?lang=en
> 
> I do see what you're reading. It's under the "Pause, Release, Transfer"
> column, row 4. Which says: "An authorized caller can pause and release any
> task or SRB in the system."
> 
> Please confirm that you want is program "A" to be able to pause "any task
> or SRB" in the system (same or different address space) without any coding
> in the target. Oh, you might want to say what release of z/OS you're using
> too.
> 
> I take it you interpret "An authorized caller can pause and release any
> task or SRB in the system." as meaning "An authorized caller can use the
> pause service to pause any _other_ task or SRB in the system". From reading
> the other documentation (
> https://www-01.ibm.com/support/knowledgecenter/SSLTBW_2.1.0/com.ibm.zos.v2r1.ieaa200/ieavpse.htm?lang=en
> "Call Pause to make the current task or SRB nondispatchable" )
> 
> I interpret this to mean that an authorized user can allocate a PE in such
> a way as to allow that PE to be used by any task or SRB to suspend itself.
> And that any _other_ task or SRB in the system can then use that same PE to
> resume the paused task or SRB.
> 
> I guess what I'm saying, at least until someone corrects me, is that the
> sentence is either too ambiguous or just down right wrong. I don't see a
> way for program "A" to cause some other "task of SRB" to be suspended (or
> paused) without the target "task or SRB" doing something. IIRC, what you
> want is something like CALLRTM (which abends any task or SRB in the
> system), but which just "stops" it instead of abending it.
> 
> I must now bow out to those more knowledgeable than I about the internals.
> If this were _my_ need, my approach would be to schedule an SRB into the
> address space which would schedule a CIRB which would do a SUSPEND
> RB=PREVIOUS. Then something later would need to schedule an SRB into the
> address space which would do a RESUME TCB=,RETURN=N to allow the suspended
> work to continue.
> 
> -- 
> 
> Schrodinger's backup: The condition of any backup is unknown until a
> restore is attempted.
> 
> Yoda of Borg, we are. Futile, resistance is, yes. Assimilated, you will be.
> 
> He's about as useful as a wax frying pan.
> 
> 10 to the 12th power microphones = 1 Megaphone
> 
> Maranatha! <><
> John McKown
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions,
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Re: IEAVAPE2/IEAVPSE2 another address space

2015-10-16 Thread michelbutz

The pause element can be obtained from any
ASSBSTKN

Sent from my iPhone

> On Oct 16, 2015, at 11:26 AM, Sam Siegel <s...@pscsi.net> wrote:
> 
> It works like POST and WAIT.  The task to be suspended must call the pause
> service with a valid Pause Element.
> 
>> On Fri, Oct 16, 2015 at 8:17 AM, michelbutz <michealb...@comcast.net> wrote:
>> 
>> 
>> Yes I'm using 2.1
>> 
>> Waiting for the likes of Pete Relson to chime in
>> 
>> Thanks so much
>> 
>> Sent from my iPhone
>> 
>>>> On Oct 16, 2015, at 10:58 AM, John McKown <john.archie.mck...@gmail.com>
>>> wrote:
>>> 
>>> Well, the URL that I'm reading is
>> https://www-01.ibm.com/support/knowledgecenter/SSLTBW_2.1.0/com.ibm.zos.v2r1.ieaa800/chooch.htm?lang=en
>>> 
>>> I do see what you're reading. It's under the "Pause, Release, Transfer"
>>> column, row 4. Which says: "An authorized caller can pause and release
>> any
>>> task or SRB in the system."
>>> 
>>> Please confirm that you want is program "A" to be able to pause "any task
>>> or SRB" in the system (same or different address space) without any
>> coding
>>> in the target. Oh, you might want to say what release of z/OS you're
>> using
>>> too.
>>> 
>>> I take it you interpret "An authorized caller can pause and release any
>>> task or SRB in the system." as meaning "An authorized caller can use the
>>> pause service to pause any _other_ task or SRB in the system". From
>> reading
>>> the other documentation (
>> https://www-01.ibm.com/support/knowledgecenter/SSLTBW_2.1.0/com.ibm.zos.v2r1.ieaa200/ieavpse.htm?lang=en
>>> "Call Pause to make the current task or SRB nondispatchable" )
>>> 
>>> I interpret this to mean that an authorized user can allocate a PE in
>> such
>>> a way as to allow that PE to be used by any task or SRB to suspend
>> itself.
>>> And that any _other_ task or SRB in the system can then use that same PE
>> to
>>> resume the paused task or SRB.
>>> 
>>> I guess what I'm saying, at least until someone corrects me, is that the
>>> sentence is either too ambiguous or just down right wrong. I don't see a
>>> way for program "A" to cause some other "task of SRB" to be suspended (or
>>> paused) without the target "task or SRB" doing something. IIRC, what you
>>> want is something like CALLRTM (which abends any task or SRB in the
>>> system), but which just "stops" it instead of abending it.
>>> 
>>> I must now bow out to those more knowledgeable than I about the
>> internals.
>>> If this were _my_ need, my approach would be to schedule an SRB into the
>>> address space which would schedule a CIRB which would do a SUSPEND
>>> RB=PREVIOUS. Then something later would need to schedule an SRB into the
>>> address space which would do a RESUME TCB=,RETURN=N to allow the
>> suspended
>>> work to continue.
>>> 
>>> --
>>> 
>>> Schrodinger's backup: The condition of any backup is unknown until a
>>> restore is attempted.
>>> 
>>> Yoda of Borg, we are. Futile, resistance is, yes. Assimilated, you will
>> be.
>>> 
>>> He's about as useful as a wax frying pan.
>>> 
>>> 10 to the 12th power microphones = 1 Megaphone
>>> 
>>> Maranatha! <><
>>> John McKown
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access instructions,
>>> send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
>> 
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Re: What is a request block prefix?

2015-10-13 Thread michelbutz

It's in the data areas for RB IHARB the RB like TCB 
Seems to have a prefix 

Sent from my iPhone

> On Oct 13, 2015, at 5:01 PM, Lindy Mayfield  wrote:
> 
> In the system completion codes documentation it says that for an abend FDB 
> that register 2 points to the request block prefix.  What is a 'request block 
> prefix' in this context?
> 
> Verbatim it reads:
> "When nn is not equal to 13, 14, 17, or 37, the system records in register 2 
> the address of the request block prefix for the program that issued the 
> incorrect SVC."
> 
> Thanks in advance for any advice.
> Regards,
> Lindy
> 
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Address Swap question

2015-09-30 Thread michelbutz

Hi

Was just wondering does an address space 
Need to be swapped in for any code be running in 
It 

Thanks

Sent from my iPhone

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Debug Tool question

2015-09-24 Thread michelbutz

Hi

I'm trying to make a breakpoint when register 3 displacement 14 is not equal 
x'30'

This statement doesn't seem to work

At statement number when %gpr3->+14 ~= x'30'

I don't have the symbol for not x'5f' on my iPhone 

But the above statement passes the debug tool 
Parser but it still stops when reg3 + 14 is equal to x'30'

14 is decimal 14 the debug tool parser doesn't take +E
Thanks 

Sent from my iPhone
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Re: Catalog entry not visible

2015-08-26 Thread michelbutz

Is IKJ tso ?

Sent from my iPhone

 On Aug 26, 2015, at 3:53 PM, Lizette Koehler stars...@mindspring.com wrote:
 
 Can you do 3.4 on the dataset?  If so, when you press PF11 - does it show any 
 details?
 
 Is there more than one LPAR involved?  Is the Alias and ucat connected if 
 there is more than one MCAT?
 
 Can you present the IKJ message (complete text)?
 
 There a some reasons a dataset is not found,
 The JCL is running on a system where the ALIAS does not exist
 The Data is a catalog entry only and not a physical file.
 The dataset was cataloged in a MCAT not a UCAT and the MCAT is different from 
 where the dataset was cataloged to where the job ran.
 
 Lizette
 
 
 
 -Original Message-
 From: Nathan Astle tcpipat...@gmail.com
 Sent: Aug 26, 2015 11:52 AM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Catalog entry not visible
 
 Hi
 
 I have built a new z/OS image where one of our product fails with a IKJ
 message saying that the dataset is not found. I can still see the usercat
 where the dataset is catalogued is connected to the master catalog of the
 new z/OS image
 
 The listcat with entry of those alias are defined to the MCAT of xOS image
 
 Not sure why it is not visible though I have put the datasets in the
 CATALOG volume of the new z/OS images.
 
 Could someone please shed some light on it
 
 Nathan
 
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Re: S0C4 running Disasembler ASMDASM

2015-08-25 Thread michelbutz

There are two loadlibs with ASMDASM apparently 
The one with HLA.SA Works

Thanks

Sent from my iPhone

 On Aug 25, 2015, at 11:19 AM, Lucas Rosalen rosalen.lu...@gmail.com wrote:
 
 I've never run ASMDASM but could you try to move the input in SYSIN DD to
 column 2?
 
 Lucas
 Did you open a pmr/Sr with IBM?
 
 did you search IBM.com to see if this was a known issue?
 
 Lizette
 
 -Original Message-
 From: michealbutz michealb...@comcast.net
 Sent: Aug 25, 2015 7:56 AM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: S0C4 running Disasembler ASMDASM
 
 I tried it with sysprint and syspuch all going to sysout=* same thing
 ASMDASM is link edited as AMODE ANY RMODE 24 AC=0
 
 Thanks
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
 Behalf Of John Eells
 Sent: Tuesday, August 25, 2015 10:43 AM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: S0C4 running Disasembler ASMDASM
 
 You pointed the SYSPRINT DD statement to a RECFM=U data set?  If you sent
 it
 to SYSOUT, perhaps you'd get a more easily understood message.
 
 michealb...@comcast.net (michealbutz) wrote:
 
 If this helps great all it says is ASMDASM bombed in the beginning of
 the module at offset X'48'
 
 I would think the S0C4 points to missing DD card but I have
 SYSLIB,SYSPRINT,SYSIN pointing to a load modue csect
 snip
 
 --
 John Eells
 z/OS Technical Marketing
 IBM Poughkeepsie
 ee...@us.ibm.com
 
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Fwd: Console messages which has precedence and related questions

2015-08-19 Thread michelbutz

Sorry I don't know if I replied to the group
My apologizes if I didn't 

Sent from my iPhone

Begin forwarded message:

 From: michelbutz michealb...@comcast.net
 Date: August 19, 2015 at 12:55:30 PM EDT
 To: Peter Fatzinger f...@us.ibm.com
 Subject: Re: Console messages which has precedence and related questions

 Peter

 So if the name parameter on the MCSOPER macro 
 Is the first name on the syncdest group
 And I have have master authority 
 I should be able to respond to both IEE128A
 And IEE331A

 As when this happens I need the time to debug

 Thanks

 Sent from my iPhone

 On Aug 19, 2015, at 11:46 AM, Peter Fatzinger f...@us.ibm.com wrote:

 Michael, 
   I should've looked closer at the WTOR you were trying to catch.  IEE331A 
 is a synchronous WTOR meaning virtually everything else on the processor 
 stops until a reply has been received.  The WTOR will be presented to one 
 and only one MCS console at a time (as selected via the SYNCHDEST console 
 group).  If a response isn't received in approx. 2 minutes it moves the WTOR 
 to the next MCS console in the list until if eventually reaches the system 
 console on the HMC.  Your EMCS console will not see the message prior to it 
 being replied to. 

   In general, if a WTOR is delivered to your console, then you should have 
 the authority to reply to it.  A console with MASTER authority may be able 
 to reply to a WTOR even if it wasn't delivered to it. 

 For reference, synchronous messages are described here: 
 http://www-01.ibm.com/support/knowledgecenter/SSLTBW_2.1.0/com.ibm.zos.v2r1.ieag300/cfsynch.htm

 Peter 

 Wisdom is the power to put our time and our knowledge to the proper use. 
 Thomas J. Watson

 Peter Fatzinger
 z/OS Core Components Development and Service
 435-1881   (T/L) 295-1881
 f...@us.ibm.com 

 From:michelbutz michealb...@comcast.net 
 To:  Peter Fatzinger/Poughkeepsie/IBM@IBMUS
 Date:08/18/2015 01:45 PM
 Subject: Re: Console messages which has precedence and related questions

 The message I'm trying to capture IEE331A
 Which is preceded by IEE128A
 Invokes the disabled console communications
 I'm wondering it that would stop me from capturing IEE331A even though it is 
 displayed
 On another console or would I need to 
 Respond to IEE128A first by performing the cancel action i.e. Entering pa2 
 or the cancel
 I guess I could respond with from my
 Extended console routine 
 IEE331A Is a WTOR message as it gives the operator a
 Chance to respond

 Besides setting those 2 bit settings which you
 Mentioned since it's a critical type message
 As there is a spinloop on a CPU Would I set MCSOAUTH to MCSOMSTR

 Thanks so much

 I

 Sent from my iPhone

  On Aug 18, 2015, at 11:33 AM, Peter Fatzinger f...@us.ibm.com wrote:

  Michael,
   The pubs aren't the greatest at explaining the various attributes.  Even 
  this explanation is over-simplifying it, but you can think of the message 
  level settings as a filter on the routing codes.  For example, if you 
  wanted all immediate action messages with a routing code 5 you would set 
  MCSOMLI and the bit for routing code 5.  If you just wanted all WTORs you 
  would set MCSOMLR and MCSORCAL (All routing codes).
  Peter

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Re: Console messages which has precedence and related questions

2015-08-17 Thread michelbutz

Thanks for responding

I have set MCSOMLVL to MCSOMLR indicating 
I should receive all WTOR's

However I have a bug in a program
And when I get the following message IEE331A
That I am in a disabled spin loop

I fail to capture it even though it asks for a reply 
Meaning it's a WTOR

Thanks

Sent from my iPhone

 On Aug 17, 2015, at 1:15 PM, Peter Fatzinger f...@us.ibm.com wrote:
 
 Hi Michael,
  A message will be delivered to all receivers whose attributes match those of 
 the message.  When you retrieve a message via MCSOPMSG you can make no 
 assumptions about whether the message has or hasn't been delivered to any 
 other recipient.  A DOM can potentially keep a message from being displayed 
 on an MCS console, but in the scenario you describe it's highly unlikely to 
 happen quick enough.
 
  You cannot obtain a specific message id via MCSOPMSG.  It is recommended 
 that you limit the routing attributes of the EMCS console to the bare minimum 
 required.  If you are using it to issue a command and receive a response then 
 give the EMCS console no routing attributes and use the CART on the MGCRE and 
 MCSOPMSG.  If you need to monitor for a wider range of messages then give the 
 EMCS console only those routing attributes needed, and limit the amount of 
 processing done on the unneeded messages obtained via MCSOPMSG.
 
 The message dataspace will be created in the console address space and will 
 be shared by all EMCS consoles activated in your address space.
 
 Peter Fatzinger
 z/OS Core Components Development and Service
 
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Re: RACF syntax to permit TSO user to use TESTAUTH

2015-08-15 Thread michelbutz

PERMIT TESTAUTH CLASS(TSOAUTH) ID(TSOID)
ACC(upd)

Sorry someone let me know

Sent from my iPhone

 On Aug 15, 2015, at 11:28 PM, Lizette Koehler stars...@mindspring.com wrote:
 
 Are you seeing an ICH408I Message or S913?
 
 If not, is the TESTSAUTH in the IKJTSOxx member of parmlib?
 
 Lizette
 
 
 -Original Message-
 From: michealbutz michealb...@comcast.net
 Sent: Aug 15, 2015 7:25 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: RACF syntax to permit TSO user to use TESTAUTH
 
 Hi
 
 
 
 would anyone know the  RACF command syntax for a TSO id to be authorized to
 use TESTAUTH
 
 
 
 Thanks   
 
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Strange 047 abend

2015-07-22 Thread michelbutz

I am getting a 047 abend running a program 
That runs in production 
The 047 abend under both TSO TEST and debug tool happens with a STC instruction 
which tries to 
Modify the 2 lengths of a AP instruction

The program is NOT re-entrant 

Thanks

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Re: Strange 047 abend

2015-07-22 Thread michelbutz

There wasn't a dump just got a message from TEST  system abend 047 I'll 
allocate sysudump
To my TSO session 
Thanks 
Sent from my iPhone

 On Jul 22, 2015, at 11:42 PM, Binyamin Dissen bdis...@dissensoftware.com 
 wrote:
 
 On Wed, 22 Jul 2015 22:39:58 -0400 michelbutz michealb...@comcast.net wrote:
 
 :I am getting a 047 abend running a program 
 :That runs in production 
 :The 047 abend under both TSO TEST and debug tool happens with a STC 
 instruction which tries to 
 :Modify the 2 lengths of a AP instruction
 :
 :The program is NOT re-entrant 
 
 Ain't gonna happen.
 
 Show the mini-dump.
 
 --
 Binyamin Dissen bdis...@dissensoftware.com
 http://www.dissensoftware.com
 
 Director, Dissen Software, Bar  Grill - Israel
 
 
 Should you use the mailblocks package and expect a response from me,
 you should preauthorize the dissensoftware.com domain.
 
 I very rarely bother responding to challenge/response systems,
 especially those from irresponsible companies.
 
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Re: Strange 047 abend

2015-07-22 Thread michelbutz

Happened with both TSO TEST and debug tool

I'll check the instruction storage area again to see that it is a STC 
instruction

Thanks

Sent from my iPhone

On Jul 22, 2015, at 11:09 PM, Jim Mulder d10j...@us.ibm.com wrote:

 From: michelbutz michealb...@comcast.net
 To: IBM-MAIN@LISTSERV.UA.EDU
 Date: 07/22/2015 11:06 PM
 Subject: Strange 047 abend
 Sent by: IBM Mainframe Discussion List IBM-MAIN@LISTSERV.UA.EDU
 
 I am getting a 047 abend running a program 
 That runs in production 
 The 047 abend under both TSO TEST and debug tool happens with a STC 
 instruction which tries to 
 Modify the 2 lengths of a AP instruction
 
 The program is NOT re-entrant
 
  It is impossible to get a 047 abend as the result of an 
 STC instruction.  If you need assistance with correctly 
 interpreting the data you are misinterpreting, then
 you will need to provide the data that you are misinterpreting. 
 
 
 Jim Mulder   z/OS System Test   IBM Corp.  Poughkeepsie,  NY
 
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IVSK and SPKA

2015-07-08 Thread michelbutz

Hi

I know that a S0C4 reason 4 occurs anytime the storage key doesn't match the 
PSW key bits 8 - 11
 Would IVSK. R1,R2 and SPKA 0(R11) prevent this obviously one would have to be 
in supervisor state to this as they are both privilege inst to qualify that if 
the storage key is 0


Thanks in advance

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Re: IVSK and SPKA

2015-07-08 Thread michelbutz

Yes I meant SPKA 0(1) 

I writing a macro the entails a wait at times it
Would be hard to determine the storage key 
of the ECB

Sent from my iPhone

 On Jul 8, 2015, at 11:30 PM, Binyamin Dissen bdis...@dissensoftware.com 
 wrote:
 
 On Wed, 8 Jul 2015 17:09:54 -0400 michelbutz michealb...@comcast.net wrote:
 
 :I know that a S0C4 reason 4 occurs anytime the storage key doesn't match 
 the PSW key bits 8 - 11
 
 PIC-4 if alter or fetch with fetch protection.
 
 : Would IVSK. R1,R2 and SPKA 0(R11) prevent this obviously one would have to 
 be in supervisor state to this as they are both privilege inst to qualify 
 that if the storage key is 0
 
 I presume you mean SPKA 0(1)
 
 But if you know the storage is in key zero, why bother with the IVSK?
 
 And even more, why are you accessing the protected storage? What is your
 business case?
 
 --
 Binyamin Dissen bdis...@dissensoftware.com
 http://www.dissensoftware.com
 
 Director, Dissen Software, Bar  Grill - Israel
 
 
 Should you use the mailblocks package and expect a response from me,
 you should preauthorize the dissensoftware.com domain.
 
 I very rarely bother responding to challenge/response systems,
 especially those from irresponsible companies.
 
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Re: IVSK and SPKA

2015-07-08 Thread michelbutz

I am writing a generic macro without knowing the environment

Sent from my iPhone

 On Jul 8, 2015, at 6:38 PM, Tony Harminc t...@harminc.net wrote:
 
 On 8 July 2015 at 17:09, michelbutz michealb...@comcast.net wrote:
 
 I know that a S0C4 reason 4 occurs anytime the storage key doesn't match the 
 PSW key bits 8 - 11
 
 Uh, no.
 
 Would IVSK. R1,R2 and SPKA 0(R11) prevent this
 
 It's highly unlikely. Perhaps if you set R11... But I can hardly
 overemphasise how bad an approach all this is. Key controlled
 protection is there for a reason.
 
 Tony H.
 
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Re: S0C4 At Entry to SRB routine

2015-06-26 Thread michelbutz

Thanks for your help 

I checked how the FRR param works 
R2 points to 24 bytes for my use to prime as
Parameters on entry to the SRB for the FRR

Sent from my iPhone

On Jun 26, 2015, at 7:39 AM, Peter Relson rel...@us.ibm.com wrote:

 could you post what you had vs. what worked?
 
 What didn't work: putting the SRB routine in fetch-protected key 0 storage 
 and invoking IEAMSCHD in key 8.
 What did work: putting the SRB routine in non-fetch-protected storage.
 What would also have worked: using the KEYVALUE parameter of IEAMSCHD to 
 indicate to give control to the SRB in key 0.
 
 SCHEDULE gives control to the SRB routine by default in key 0.
 IEAMSCHD gives control to the SRB routine by default in caller-key.
 
 Peter Relson
 z/OS Core Technology Design
 
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Re: S0C4 At Entry to SRB routine

Sorry jade

Sent from my iPhone

 On Jun 25, 2015, at 4:25 PM, michelbutz michealb...@comcast.net wrote:
 
 Edward Jaffa help my understand my problem
 
 This was the first time I used IEAMSCHD 
 In the past when I used SCHEDULE 
 I cleared out the 44 byte block XC to binary zeros
 This included SRBPKF 
 I was erroneously under the assumption that the SRB always get control in Key  0
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 4:20 PM, Lizette Koehler stars...@mindspring.com wrote:
 
 To help others in the future when searching for answers; could you post what 
 you had vs. what worked?
 
 It could be beneficial.
 
 Lizette
 
 
 
 -Original Message-
 From: michelbutz michealb...@comcast.net
 Sent: Jun 25, 2015 1:17 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: S0C4 At Entry to SRB routine
 
 I did not have storage key parameter  set correctly 
 On IEAMSCHD 
 
 Thanks 
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 8:21 AM, Shmuel Metz (Seymour J.) 
 shmuel+ibm-m...@patriot.net wrote:
 
 In 000901d0ad3b$eb56bbb0$c2043310$@comcast.net, on 06/22/2015
 at 06:36 PM, michealbutz michealb...@comcast.net said:
 
 I am at my wits end I have tried all sorts of things
 
 1.Are you running from LPA or did you copy the code?
 
 2. Show us the expanded code from the beginning to the point of
 dailure.
 
 I am getting S0C4
 
 Registers and IC at time of failure?
 
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Re: S0C4 At Entry to SRB routine

I did not have storage key parameter  set correctly 
On IEAMSCHD 

Thanks 

Sent from my iPhone

 On Jun 25, 2015, at 8:21 AM, Shmuel Metz (Seymour J.) 
 shmuel+ibm-m...@patriot.net wrote:
 
 In 000901d0ad3b$eb56bbb0$c2043310$@comcast.net, on 06/22/2015
   at 06:36 PM, michealbutz michealb...@comcast.net said:
 
 I am at my wits end I have tried all sorts of things
 
 1.Are you running from LPA or did you copy the code?
 
 2. Show us the expanded code from the beginning to the point of
 dailure.
 
 I am getting S0C4
 
 Registers and IC at time of failure?
 
 -- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see http://patriot.net/~shmuel/resume/brief.html 
 We don't care. We don't have to care, we're Congress.
 (S877: The Shut up and Eat Your spam act of 2003)
 
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Re: S0C4 At Entry to SRB routine

It's that spellchecker on the IPhone 

Jaffe 

My apologies Edward 

Sent from my iPhone

 On Jun 25, 2015, at 4:26 PM, michelbutz michealb...@comcast.net wrote:
 
 Sorry jade
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 4:25 PM, michelbutz michealb...@comcast.net wrote:
 
 Edward Jaffa help my understand my problem
 
 This was the first time I used IEAMSCHD 
 In the past when I used SCHEDULE 
 I cleared out the 44 byte block XC to binary zeros
 This included SRBPKF 
 I was erroneously under the assumption that the SRB always get control in 
 Key 0
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 4:20 PM, Lizette Koehler stars...@mindspring.com 
 wrote:
 
 To help others in the future when searching for answers; could you post 
 what you had vs. what worked?
 
 It could be beneficial.
 
 Lizette
 
 
 
 -Original Message-
 From: michelbutz michealb...@comcast.net
 Sent: Jun 25, 2015 1:17 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: S0C4 At Entry to SRB routine
 
 I did not have storage key parameter  set correctly 
 On IEAMSCHD 
 
 Thanks 
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 8:21 AM, Shmuel Metz (Seymour J.) 
 shmuel+ibm-m...@patriot.net wrote:
 
 In 000901d0ad3b$eb56bbb0$c2043310$@comcast.net, on 06/22/2015
 at 06:36 PM, michealbutz michealb...@comcast.net said:
 
 I am at my wits end I have tried all sorts of things
 
 1.Are you running from LPA or did you copy the code?
 
 2. Show us the expanded code from the beginning to the point of
 dailure.
 
 I am getting S0C4
 
 Registers and IC at time of failure?
 
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Re: S0C4 At Entry to SRB routine

Edward Jaffa help my understand my problem

This was the first time I used IEAMSCHD 
In the past when I used SCHEDULE 
I cleared out the 44 byte block XC to binary zeros
This included SRBPKF 
I was erroneously under the assumption that the SRB always get control in Key 0

Sent from my iPhone

 On Jun 25, 2015, at 4:20 PM, Lizette Koehler stars...@mindspring.com wrote:
 
 To help others in the future when searching for answers; could you post what 
 you had vs. what worked?
 
 It could be beneficial.
 
 Lizette
 
 
 
 -Original Message-
 From: michelbutz michealb...@comcast.net
 Sent: Jun 25, 2015 1:17 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: S0C4 At Entry to SRB routine
 
 I did not have storage key parameter  set correctly 
 On IEAMSCHD 
 
 Thanks 
 
 Sent from my iPhone
 
 On Jun 25, 2015, at 8:21 AM, Shmuel Metz (Seymour J.) 
 shmuel+ibm-m...@patriot.net wrote:
 
 In 000901d0ad3b$eb56bbb0$c2043310$@comcast.net, on 06/22/2015
  at 06:36 PM, michealbutz michealb...@comcast.net said:
 
 I am at my wits end I have tried all sorts of things
 
 1.Are you running from LPA or did you copy the code?
 
 2. Show us the expanded code from the beginning to the point of
 dailure.
 
 I am getting S0C4
 
 Registers and IC at time of failure?
 
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Re: Address location

2015-06-24 Thread michelbutz

I'm doing linkage=branch and holding the local lock

Peter just to re-iterate R2 has the address of 
the FRR param before I issue IEAMSCHD 

Correct ?

Sent from my iPhone

On Jun 24, 2015, at 7:51 AM, Peter Relson rel...@us.ibm.com wrote:

 The VSMLOC macro might issue abend code X'C78'.
 
 The book is correct: VSMLOC with LINKAGE=SYSTEM can issue C78 (on 
 incorrect input).
 
 The VSMLOC processing module doesn't issue any abends.
 
 Peter Relson
 z/OS Core Technology Design
 
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Re: S0C4 At Entry to SRB routine

I obviously wasn't Edward figure out what I was doing this was my first foray 
into IEAMSCHD 
I had previously only used schedule 
Which I always started by XC the SRB block 
Including SRBPKF

IEAMSCHD had a parm keyvalue which I didn't use and got a S0C4

Sent from my iPhone

 On Jun 23, 2015, at 12:24 PM, Tony Harminc t...@harminc.net wrote:
 
 On 23 June 2015 at 07:37, michelbutz michealb...@comcast.net wrote:
 
 Still needed subpool 228 as when I tried to access data from subpool 227
 s0c4 as it is fetch protected
 
 
 If you have PSW key 0, how can you get an S0C4 based on fetch protection?
 Can you not look at a dump and trace table to see what is actually causing
 your program check? You have provided very little information.
 
 Tony H.
 
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Re: S0C4 At Entry to SRB routine

Edward you are very smart by rote I always XC the SRB block 

Thanks for making me aware

Sent from my iPhone

 On Jun 23, 2015, at 10:24 AM, Ed Jaffe edja...@phoenixsoftware.com wrote:
 
 On 6/22/2015 10:48 PM, Elardus Engelbrecht wrote:
 michelbutz wrote:
 
 I always assumed SRB's run PSW key 0 supervisor state
 No disrespect, but on what reason or environment is your assumption based?
 
 This is IMHO a dangerous assumption, unless you know something the rest of 
 us don't know.
 
 SRB routines are *always* given control in supervisor state. In fact, they 
 are not allowed to leave supervisor state.
 
 An SRB's execution key is controlled by the SRBPKF setting in the SRB control 
 block. If you didn't know about or have never set this field then, assuming 
 you clear your 44-byte SRB control block to zeros before filling it in, your 
 SRB will execute in key zero.
 
 This is all fully documented. There is no need for assumptions.
 
 -- 
 Edward E Jaffe
 Phoenix Software International, Inc
 831 Parkview Drive North
 El Segundo, CA 90245
 http://www.phoenixsoftware.com/
 
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Re: S0C4 At Entry to SRB routine

The fetch protection was because I used subpool
227 to move data from the SRB referenced by sp 227 to my working storage 
subpool 0
Once I changed to 228 the problem went away

Thanks

Sent from my iPhone

 On Jun 23, 2015, at 12:24 PM, Tony Harminc t...@harminc.net wrote:
 
 On 23 June 2015 at 07:37, michelbutz michealb...@comcast.net wrote:
 
 Still needed subpool 228 as when I tried to access data from subpool 227
 s0c4 as it is fetch protected
 
 
 If you have PSW key 0, how can you get an S0C4 based on fetch protection?
 Can you not look at a dump and trace table to see what is actually causing
 your program check? You have provided very little information.
 
 Tony H.
 
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Re: S0C4 At Entry to SRB routine

Still needed subpool 228 as when I tried to access data from subpool 227 s0c4 
as it is fetch protected 228 isn't 

Sent from my iPhone

 On Jun 22, 2015, at 7:20 PM, Mike La Martina mike.lamart...@mcleansoft.com 
 wrote:
 
 Try Subpool 228.  
 For some reason I always used that subpool.
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
 Behalf Of michealbutz
 Sent: Monday, June 22, 2015 3:37 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: S0C4 At Entry to SRB routine
 
 Hi,
 
 
 
 I am at my wits end I have tried all sorts of things I am getting S0C4 at
 right at the entry point to my SRB routine my SRB rtn does even take off it
 goes directly to the   FRR routine looking at the SDWAABCC its 940C4 
 
 
 
 *
 
 STORAGE OBTAIN, 
 
   LENGTH=(R0),  
 
   ADDR=(R12),   
 
   KEY=0,
 
   SP=227
 
 *
 
 SPKA  0 
 
 *
 
 STR12,SRBEPXStore Entry Point   
 
 OCSRBEPX,=X'8000'   Turn on high order bit  
 
 LAR5,VSMFRR-VSMLOC(,R12) R9 -- frr Code
 
 STR5,SRBFRR Store FRR   
 
 LAR8,SRBFLAG-VSMLOC(,R12)   
 
 MVI   0(R8),X'00'   
 
 OCSRBFRR,=X'8000'   Turn on high order bit  
 
 LAR5,PARMS-VSMLOC(,R12)  Get parms addr 
 
 STR4,0(R5)  
 
 STR5,FRRPARM
 
 OCFRRPARM,=X'8000'  
 
 LRR4,R12Point to Csa
 
 LAR5,VSRBLEN   len  
 
 STR6,INBUFPTR  Store Buffer pointer 
 
 LAR6,VSMLOC 
 
 LRR7,R5 
 
 MVCL  R4,R6 Move to csa 
 
 
 
 a little later
 
 
 
 *---*  
 
 * Schedule the SRB  *  
 
 *---*  
 
 LAR12,SRBEPX  Entry point 
 
 LAR11,PARMADD Srb Param   
 
 LAR9,SRBFRR   FRR Address 
 
 *LAR2,FRRPARM  Frr Paramters   
 
 XRR2,R2   
 
 *  
 
 IEAMSCHD EPADDR=(R12),
 
   PRIORITY=GLOBAL,
 
   ENV=STOKEN, 
 
   TARGETSTOKEN=WSSTOKEN,  
 
   PARM=(R11), 
 
   FRRADDR=(R9),   
 
   SDWALOC31=YES,  
 
   FLAGS=(R8), 
 
 
 
 The next adress points to LR R13,1
 
 *-*
 
 * *
 
 * SRB CODE*
 
 * *
 
 * R2 -- Point to 24 Bit 24 byte paramter area*
 
 * *
 
 *bytes 0 - 3 Address of Retry routine *
 
 *bytes 4 - 7 area of storage LSQA,PVT etc *
 
 *bytes 8 - 11 R13 *
 
 *-*
 
 VSMLOC   DS0D  
 
  DROP  R3  
 
  LRR5,R15  
 
  USING VSMLOC,R5 Entry Point

Re: Address location

I have taken that

Approach I am issuing a VSMLOC XXX where XXX is PVT or LSQA or CSA or SQA and 
if 
I get what is a C78 ABEND which is what I was told if I tried to look at say 
LSQA with PVT param
I'll retry the VSMLOC from the FRR until I have the right parm thanks



Sent from my iPhone

 On Jun 22, 2015, at 2:25 PM, David Cole dbc...@colesoft.com wrote:
 
 Joe,
 
 The GDA can be used to distinguish SQA form CSA from PVT, but it won't tell 
 you squat about the LSQA. And the LDA won't either. That's because the LSQA 
 is not a discrete subarea of PVT. It is a specific subpool which can meander 
 all over upper private.
 
 yes, the LDA will give you LSQA anchors, but Binyamin (and others) is right. 
 Your best bet is to use VSMLOC.
 
 Dave Cole
 ColeSoft Marketing
 414 Third Street, NE
 Charlottesville, VA 22902
 EADDRESS: dbc...@colesoft.com
 
 Home page:www.colesoft.com
 User's Group: www.xdc.com (on LinkedIn)
 Facebook: www.facebook.com/colesoftware
 Videos:   www.youtube.com/user/colesoftware
 
 
 
 
 
 
 At 6/14/2015 09:46 AM, Shane Ginnane wrote:
 
 On Sun, 14 Jun 2015 01:32:26 -0400, michelbutz wrote:
 
 Given address how I can I tell whether this is SQA LSQA PVT, or CSA
 
 GDA.
 
 Shane ...
 
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 ColeSoft Marketing
 414 Third Street, NE
 Charlottesville, VA 22902
 EADDRESS: mailto:dbc...@colesoft.comdbc...@colesoft.com
 
 Home page:www.colesoft.com
 User's Group: www.xdc.com (on LinkedIn)
 Facebook: www.facebook.com/colesoftware
 Videos:   www.youtube.com/user/colesoftware  
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Re: S0C4 At Entry to SRB routine

There is keyvalue parm on IEAMSCHD 

I always assumed SRB's run PSW key 0 supervisor state

Let my give this a shot and then try 228

Thanks

Sent from my iPhone

 On Jun 22, 2015, at 7:20 PM, Mike La Martina mike.lamart...@mcleansoft.com 
 wrote:
 
 Try Subpool 228.  
 For some reason I always used that subpool.
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
 Behalf Of michealbutz
 Sent: Monday, June 22, 2015 3:37 PM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: S0C4 At Entry to SRB routine
 
 Hi,
 
 
 
 I am at my wits end I have tried all sorts of things I am getting S0C4 at
 right at the entry point to my SRB routine my SRB rtn does even take off it
 goes directly to the   FRR routine looking at the SDWAABCC its 940C4 
 
 
 
 *
 
 STORAGE OBTAIN, 
 
   LENGTH=(R0),  
 
   ADDR=(R12),   
 
   KEY=0,
 
   SP=227
 
 *
 
 SPKA  0 
 
 *
 
 STR12,SRBEPXStore Entry Point   
 
 OCSRBEPX,=X'8000'   Turn on high order bit  
 
 LAR5,VSMFRR-VSMLOC(,R12) R9 -- frr Code
 
 STR5,SRBFRR Store FRR   
 
 LAR8,SRBFLAG-VSMLOC(,R12)   
 
 MVI   0(R8),X'00'   
 
 OCSRBFRR,=X'8000'   Turn on high order bit  
 
 LAR5,PARMS-VSMLOC(,R12)  Get parms addr 
 
 STR4,0(R5)  
 
 STR5,FRRPARM
 
 OCFRRPARM,=X'8000'  
 
 LRR4,R12Point to Csa
 
 LAR5,VSRBLEN   len  
 
 STR6,INBUFPTR  Store Buffer pointer 
 
 LAR6,VSMLOC 
 
 LRR7,R5 
 
 MVCL  R4,R6 Move to csa 
 
 
 
 a little later
 
 
 
 *---*  
 
 * Schedule the SRB  *  
 
 *---*  
 
 LAR12,SRBEPX  Entry point 
 
 LAR11,PARMADD Srb Param   
 
 LAR9,SRBFRR   FRR Address 
 
 *LAR2,FRRPARM  Frr Paramters   
 
 XRR2,R2   
 
 *  
 
 IEAMSCHD EPADDR=(R12),
 
   PRIORITY=GLOBAL,
 
   ENV=STOKEN, 
 
   TARGETSTOKEN=WSSTOKEN,  
 
   PARM=(R11), 
 
   FRRADDR=(R9),   
 
   SDWALOC31=YES,  
 
   FLAGS=(R8), 
 
 
 
 The next adress points to LR R13,1
 
 *-*
 
 * *
 
 * SRB CODE*
 
 * *
 
 * R2 -- Point to 24 Bit 24 byte paramter area*
 
 * *
 
 *bytes 0 - 3 Address of Retry routine *
 
 *bytes 4 - 7 area of storage LSQA,PVT etc *
 
 *bytes 8 - 11 R13 *
 
 *-*
 
 VSMLOC   DS0D  
 
  DROP  R3  
 
  LRR5,R15  
 
  USING VSMLOC,R5

Re: Address location

Truth is I haven't gotten to that point 
I am issuing the VSMLOC from a different 
Address space and towards that end I have wrapped it in a SRB 
I am still trying to get schedule the SRB using IEAMSCHD 
Right now it goes straight to the FRR before 
I get to the 1st instruction of the SRB 
I am hoping at the very least it would give me
Some sort of return code allowing me to retry 
The VSMLOC until I get the right storage area
PVT,SQA,LSQA or CSA

Thanks

Sent from my iPhone

On Jun 22, 2015, at 2:49 PM, Jim Mulder d10j...@us.ibm.com wrote:

 From: michelbutz michealb...@comcast.net
 To: IBM-MAIN@LISTSERV.UA.EDU
 Date: 06/22/2015 02:48 PM
 Subject: Re: Address location
 Sent by: IBM Mainframe Discussion List IBM-MAIN@LISTSERV.UA.EDU
 
 I have taken that
 
 Approach I am issuing a VSMLOC XXX where XXX is PVT or LSQA or CSA 
 or SQA and if 
 I get what is a C78 ABEND which is what I was told if I tried to 
 look at say LSQA with PVT param
 I'll retry the VSMLOC from the FRR until I have the right parm thanks
 
  VSMLOC does not issue any ABENDs.
 
 Jim Mulder   z/OS System Test   IBM Corp.  Poughkeepsie,  NY
 
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My apologizes

To all

This was my first shot at IEAMSCHD 
I had previously only used schedule 
That I took it for granted that SRB's run in key 0


Sent from my iPhone

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Re: IEAMSCHD no FRR param

Wow
So I prime R2
And R2 has to be 24 key 0 I guess I can use LSQA shouldn't bump heads with the
os
Thanks

Sent from my iPhone

On Jun 15, 2015, at 4:31 AM, Rob Scott rsc...@rocketsoftware.com wrote:

When SRB receives control from IEAMSCHD, R2 contains a 24-bit address of the
FRR parameter area.

You can pass parameters to your FRR from your SRB by using this address.

Your FRR can establish addressability to whatever you store there by using
the SDWAPARM field.

Note that you will need to be in Key0 to store at this address.

Rob Scott
Principal Software Engineer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of michelbutz
Sent: 14 June 2015 19:30
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: IEAMSCHD no FRR param

The IEAMSCHD has a FRRADDR parm
But doesn't have an input param for paramters to FRR routine

Sent from my iPhone

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Re: IEAMSCHD no FRR param

This was a follow up from a suggestion of not knowing what type of storage 
VSMLOC was processing. I was issuing VSMLOC from an SRB
And coding of PVT for a LSQA address would generate a ABEND which I would 
subsequently 
Re-try with the correct LSQA PARM in the VSMLOC

I wasn't sure how to get the address space boundaries from the LDA

Maybe this was not the correct approach 

Sent from my iPhone

On Jun 15, 2015, at 8:12 AM, Peter Relson rel...@us.ibm.com wrote:

 doesn't have an input param for paramters to FRR routine
 Because it doesn't need one.
 
 I'll just prime R13 from the SDWA with the value that the SRB had for 13
 
 This sort of post scares the heck out of experienced z/OS people.
 Are you 100% sure that the FRR got control due to an error while your 
 module (with your R13) was in control?
 Are you 100% sure that the FRR got control with valid time-of-error 
 registers (there are some machine checks for which that information is not 
 available)?
 
 If you know that R13 contains some value, then your code put it there. 
 When? While the SRB routine was running. If your code sets R13, then it 
 can also set a word in the FRR parameter area, the address of which is 
 provided to the SRB routine in R2 on entry when that SRB routine requested 
 the establishment of an FRR.
 
 For good form, the FRR should always look to see if the information it 
 expected to be there was indeed there (as opposed to blowing up right 
 after the FRR was set but before you were able to store the information).
 
 Peter Relson
 z/OS Core Technology Design
 
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Re: IEAMSCHD no FRR param

I hear you I'll put an eye catcher and do a sanity check

Thanks 

Sent from my iPhone

 On Jun 15, 2015, at 5:11 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 One thing to bear in mind is that you cannot guarantee that the R13 at the 
 time of error is the same as the R13 that you establish in your SRB.
 
 If you use this technique, I would recommend some verification steps in your 
 FRR code before you use the R13 from the SDWA.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
 Behalf Of michelbutz
 Sent: 14 June 2015 19:49
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 No that big of a deal
 
 I'll just prime R13 from the SDWA with the value that the SRB had for 13 
 Which had my working storage
 
 Sent from my iPhone
 
 On Jun 14, 2015, at 2:41 PM, Lizette Koehler stars...@mindspring.com wrote:
 
 So I guess my question, what is the issue?
 
 It has the FRRADDR to pass an address of the FRR to get control.  What
 parms do you need to pass to the FRR?
 
 Specifies the name (RS-type), or address in register (2)-(12), of an
 optional 4 byte input that contains the address of the Functional
 Recovery Routine (FRR) that is to be established prior to the SRB
 routine receiving control. The low bit of this address should not be
 set on. If it is set on, that bit will not be treated as part of the
 FRR address, but will be treated as indicating SDWALOC31=YES and will
 override the specification, or default, of SDWALOC31=NO.
 
 The FRR receives control in supervisor state, PSW key 0, primary ASC
 mode, 31-bit addressing mode, holding the same locks the SRB routine
 held at the time of error. The FRR receives control with the same
 PASID, SASID, and HASID as the SRB routine had on entry.
 
 If you specify LLOCK=YES, then the FRR should release the LOCAL lock
 prior to the completion of its processing.
 
 
 Lizette
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
 On Behalf Of michelbutz
 Sent: Sunday, June 14, 2015 11:30 AM
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: IEAMSCHD no FRR param
 
 The IEAMSCHD has a FRRADDR parm
 But doesn't have an input param for paramters to FRR routine
 
 Sent from my iPhone
 
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Re: IEAMSCHD no FRR param

When The FRR parameter area which R2 points to
Is 24 bit ? Just makes life more difficult 

Sent from my iPhone

 On Jun 15, 2015, at 11:02 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 Apologies, the FRR=YES was copied from the Auth Asm Services Guide 
 description of the reg contents at SRB entry and refers to the keyword on 
 SCHEDULE.
 
 The appropriate keyword on IEAMSCHD is FRRADDR= with a value that is not 
 NOFRR
 
 As stated before, you do not have to code anything, the system will prime R2 
 for your SRB to use on entry.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
 Behalf Of michelbutz
 Sent: 15 June 2015 15:50
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 Rob
 
 With all you due respect I looked at the IEAMSCHD macro in Sys1.maclibb
 
 And all I see is FRRADDR= a pointer the FRR routine I don't see FRR= parameter
 
 If I code FRRADDR= address of my FRR routine Am I supposed to prime R2 with 
 the FRR parameter area
 
 Sent from my iPhone
 
 On Jun 15, 2015, at 8:41 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 No.
 
 On entry to your SRB, the *system* sets R2 to the FRR parameter area pointer 
 if you code FRR=YES on IEAMSCHD.
 
 See the doc on IEAMSCHD in Auth Asm Services Guide.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
 On Behalf Of michelbutz
 Sent: 15 June 2015 13:34
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 Wow
 So I prime R2
 And R2 has to be 24 key 0 I guess I can use LSQA shouldn't bump heads
 with the os Thanks
 
 Sent from my iPhone
 
 On Jun 15, 2015, at 4:31 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 When SRB receives control from IEAMSCHD, R2 contains a 24-bit address of 
 the FRR parameter area.
 
 You can pass parameters to your FRR from your SRB by using this address.
 
 Your FRR can establish addressability to whatever you store there by using 
 the SDWAPARM field.
 
 Note that you will need to be in Key0 to store at this address.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
 On Behalf Of michelbutz
 Sent: 14 June 2015 19:30
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: IEAMSCHD no FRR param
 
 The IEAMSCHD has a FRRADDR parm
 But doesn't have an input param for paramters to FRR routine
 
 Sent from my iPhone
 
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Re: IEAMSCHD no FRR param

Rob

With all you due respect I looked at the IEAMSCHD macro in Sys1.maclibb

And all I see is FRRADDR= a pointer the FRR routine I don't see FRR= parameter

If I code FRRADDR= address of my FRR routine
Am I supposed to prime R2 with the FRR parameter area

Sent from my iPhone

On Jun 15, 2015, at 8:41 AM, Rob Scott rsc...@rocketsoftware.com wrote:

No.

On entry to your SRB, the *system* sets R2 to the FRR parameter area pointer
if you code FRR=YES on IEAMSCHD.

See the doc on IEAMSCHD in Auth Asm Services Guide.

Rob Scott
Principal Software Engineer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of michelbutz
Sent: 15 June 2015 13:34
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: IEAMSCHD no FRR param

Wow
So I prime R2
And R2 has to be 24 key 0 I guess I can use LSQA shouldn't bump heads with
the os Thanks

Sent from my iPhone

On Jun 15, 2015, at 4:31 AM, Rob Scott rsc...@rocketsoftware.com wrote:

When SRB receives control from IEAMSCHD, R2 contains a 24-bit address of the
FRR parameter area.

You can pass parameters to your FRR from your SRB by using this address.

Your FRR can establish addressability to whatever you store there by using
the SDWAPARM field.

Note that you will need to be in Key0 to store at this address.

Rob Scott
Principal Software Engineer
Rocket Software
77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
On Behalf Of michelbutz
Sent: 14 June 2015 19:30
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: IEAMSCHD no FRR param

The IEAMSCHD has a FRRADDR parm
But doesn't have an input param for paramters to FRR routine

Sent from my iPhone

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Re: IEAMSCHD no FRR param

Thank you so much you made it so easy

Sent from my iPhone

 On Jun 15, 2015, at 12:05 PM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 The address of the FRR parm area is a 24-bit address - (I seem to recall the 
 last time I actually looked the address was something like x'0C00' but I 
 am not 100% sure).
 
 However you choose to use the 24 bytes that this points to is up to you ;  
 there is no reason why you cannot put a 31-bit (or 64-bit) address in the 
 first word (or doubleword) in this area that points to your parameter data in 
 your SRB working storage.
 
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On 
 Behalf Of michelbutz
 Sent: 15 June 2015 16:56
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 When The FRR parameter area which R2 points to Is 24 bit ? Just makes life 
 more difficult
 
 Sent from my iPhone
 
 On Jun 15, 2015, at 11:02 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 Apologies, the FRR=YES was copied from the Auth Asm Services Guide 
 description of the reg contents at SRB entry and refers to the keyword on 
 SCHEDULE.
 
 The appropriate keyword on IEAMSCHD is FRRADDR= with a value that is not 
 NOFRR
 
 As stated before, you do not have to code anything, the system will prime R2 
 for your SRB to use on entry.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
 On Behalf Of michelbutz
 Sent: 15 June 2015 15:50
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 Rob
 
 With all you due respect I looked at the IEAMSCHD macro in
 Sys1.maclibb
 
 And all I see is FRRADDR= a pointer the FRR routine I don't see FRR=
 parameter
 
 If I code FRRADDR= address of my FRR routine Am I supposed to prime R2
 with the FRR parameter area
 
 Sent from my iPhone
 
 On Jun 15, 2015, at 8:41 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 No.
 
 On entry to your SRB, the *system* sets R2 to the FRR parameter area 
 pointer if you code FRR=YES on IEAMSCHD.
 
 See the doc on IEAMSCHD in Auth Asm Services Guide.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU]
 On Behalf Of michelbutz
 Sent: 15 June 2015 13:34
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: Re: IEAMSCHD no FRR param
 
 Wow
 So I prime R2
 And R2 has to be 24 key 0 I guess I can use LSQA shouldn't bump heads
 with the os Thanks
 
 Sent from my iPhone
 
 On Jun 15, 2015, at 4:31 AM, Rob Scott rsc...@rocketsoftware.com wrote:
 
 When SRB receives control from IEAMSCHD, R2 contains a 24-bit address of 
 the FRR parameter area.
 
 You can pass parameters to your FRR from your SRB by using this address.
 
 Your FRR can establish addressability to whatever you store there by using 
 the SDWAPARM field.
 
 Note that you will need to be in Key0 to store at this address.
 
 Rob Scott
 Principal Software Engineer
 Rocket Software
 77 Fourth Avenue . Suite 100 . Waltham . MA 02451-1468 . USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List
 [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf Of michelbutz
 Sent: 14 June 2015 19:30
 To: IBM-MAIN@LISTSERV.UA.EDU
 Subject: IEAMSCHD no FRR param
 
 The IEAMSCHD has a FRRADDR parm
 But doesn't have an input param for paramters to FRR routine
 
 Sent from my iPhone
 
 
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Re: Address location

Were you I get that info is that in the LDA ?

Sent from my iPhone

 On Jun 14, 2015, at 9:08 AM, Robert A. Rosenberg hal9...@panix.com wrote:
 
 At 04:51 -0500 on 06/14/2015, Elardus Engelbrecht wrote about Re: Address 
 location:
 
 michelbutz wrote:
 
 CSMLOC only takes one of those as the first parameters
 I would have to know whether it is SQA LSQA PVT. Or CSA before
 
 Binyamin Dissen [he really does know his stuff!] gave you a good solution 
 about VSMLOC, despite the fact that you gave very little information.
 
 I and perhaps others also want to know these, before giving a possible 
 better answer:
 
 1. What are you trying to solve?
 2. Does it matter that the address is in your same address space or in other 
 address space?
 3. Do you want check it while being AC(1) or not?
 4. At what z/OS level are you?
 
 Given address how I can Itell whether this is SQA LSQA PVT, or CSA
 
 Based on what I read on VSMLOC, you can repeatedly use VSMLOC with one of 
 these parms and examine the return codes. Repeat with other parm and check 
 until you get the desired return code. Just be ready to handle a possible 
 C78 abend.
 
 Unless someone can come with a better solution.
 
 Have a subroutine that you call which returns the SQA LSQA PVT. and CSA 
 boundaries. It would do the needed calls and then return the table of 
 addresses.
 
 
 Groete / Greetings
 Elardus Engelbrecht
 
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Re: Address location

Thanks

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 On Jun 14, 2015, at 9:46 AM, Shane Ginnane ibm-m...@tpg.com.au wrote:
 
 On Sun, 14 Jun 2015 01:32:26 -0400, michelbutz wrote:
 
 Given address how I can I tell whether this is SQA LSQA PVT, or CSA
 
 GDA.
 
 Shane ...
 
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Re: Address location

It's in a other address space to I'm using a SRB
I am at 2.1
I guess I have to set up a FRR and check for a C78 ABEND
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 On Jun 14, 2015, at 5:51 AM, Elardus Engelbrecht 
 elardus.engelbre...@sita.co.za wrote:
 
 michelbutz wrote:
 
 CSMLOC only takes one of those as the first parameters 
 I would have to know whether it is SQA LSQA PVT. Or CSA before 
 
 Binyamin Dissen [he really does know his stuff!] gave you a good solution 
 about VSMLOC, despite the fact that you gave very little information.
 
 I and perhaps others also want to know these, before giving a possible better 
 answer:
 
 1. What are you trying to solve?
 2. Does it matter that the address is in your same address space or in other 
 address space?
 3. Do you want check it while being AC(1) or not?
 4. At what z/OS level are you?
 
 Given address how I can Itell whether this is SQA LSQA PVT, or CSA
 
 Based on what I read on VSMLOC, you can repeatedly use VSMLOC with one of 
 these parms and examine the return codes. Repeat with other parm and check 
 until you get the desired return code. Just be ready to handle a possible C78 
 abend.
 
 Unless someone can come with a better solution.
 
 Groete / Greetings
 Elardus Engelbrecht
 
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Re: Address location

CSMLOC only takes one of those as the first parameters 

I would have to know whether it is SQA LSQA PVT. Or CSA before 

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 On Jun 14, 2015, at 2:05 AM, Binyamin Dissen bdis...@dissensoftware.com 
 wrote:
 
 VSMLOC
 
 On Sun, 14 Jun 2015 01:32:26 -0400 michelbutz michealb...@comcast.net wrote:
 
 :Given address how I can I tell whether this is SQA LSQA PVT, or CSA
 
 --
 Binyamin Dissen bdis...@dissensoftware.com
 http://www.dissensoftware.com
 
 Director, Dissen Software, Bar  Grill - Israel
 
 
 Should you use the mailblocks package and expect a response from me,
 you should preauthorize the dissensoftware.com domain.
 
 I very rarely bother responding to challenge/response systems,
 especially those from irresponsible companies.
 
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Re: Address location/GDA is for common

GDA is for common storage I think 

I need the LDA for private

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 On Jun 14, 2015, at 9:46 AM, Shane Ginnane ibm-m...@tpg.com.au wrote:
 
 On Sun, 14 Jun 2015 01:32:26 -0400, michelbutz wrote:
 
 Given address how I can I tell whether this is SQA LSQA PVT, or CSA
 
 GDA.
 
 Shane ...
 
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IEAMSCHD no FRR param

The IEAMSCHD has a FRRADDR parm
But doesn't have an input param for paramters to 
FRR routine

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Re: IEAMSCHD no FRR param