[Intel-gfx] [PATCH 01/22] drm/i915: add more VLV IDs
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 51e9c76..69d0637 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -387,6 +387,9 @@ static const struct pci_device_id pciidlist[] = {
/* aka */
INTEL_VGA_DEVICE(0x0D26, intel_haswell_m_info), /* CRW GT2 mobile */
INTEL_VGA_DEVICE(0x0D36, intel_haswell_m_info), /* CRW GT2 mobile */
INTEL_VGA_DEVICE(0x0f30, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f31, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f32, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f33, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0157, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0155, intel_valleyview_d_info),
{0, 0, 0}
--
1.7.9.5
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[Intel-gfx] [PATCH 02/22] drm/i915: remove VLV MSI IRQ hack
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_irq.c |8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 6ba0573..f781ff0 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1999,7 +1999,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) u32 enable_mask; u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV; u32 render_irqs; - u16 msid; enable_mask = I915_DISPLAY_PORT_INTERRUPT; enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | @@ -2018,13 +2017,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) dev_priv-pipestat[0] = 0; dev_priv-pipestat[1] = 0; - /* Hack for broken MSIs on VLV */ - pci_write_config_dword(dev_priv-dev-pdev, 0x94, 0xfee0); - pci_read_config_word(dev-pdev, 0x98, msid); - msid = 0xff; /* mask out delivery bits */ - msid |= (114); - pci_write_config_word(dev_priv-dev-pdev, 0x98, msid); - I915_WRITE(PORT_HOTPLUG_EN, 0); POSTING_READ(PORT_HOTPLUG_EN); -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/22] drm/i915: add UCGCTL4 to display reg check on VLV
Add a few regs needed for various clock gating init purposes and make sure they don't fall into the display offset range on VLV. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c |1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 69d0637..13b9b4f 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1208,6 +1208,7 @@ static bool IS_DISPLAYREG(u32 reg) case GEN7_HALF_SLICE_CHICKEN1: case GEN6_MBCTL: case GEN6_UCGCTL2: + case GEN7_UCGCTL4: return false; default: break; -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 04/22] drm/i915: implement WaGTEnableMiFlush on VLV
We don't generally use MI_FLUSH these days, but this bit may affect
other flushing logic, so set it to be safe.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_ringbuffer.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2bd074a..5a9e26a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -511,6 +511,9 @@ static int init_render_ring(struct intel_ring_buffer *ring)
I915_WRITE(GFX_MODE_GEN7,
_MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
_MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
+ if (IS_VALLEYVIEW(dev))
+ I915_WRITE(MI_MODE, I915_READ(MI_MODE) |
+ _MASKED_BIT_ENABLE(MI_FLUSH_ENABLE));
}
if (INTEL_INFO(dev)-gen = 5) {
--
1.7.9.5
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[Intel-gfx] Updated VLV patchset
With the new boards, we've been able to test a few more things. This set is still a WIP, but I wanted to get it out for review. I also need to do some additional testing when I get back from FOSDEM, but others with VLV systems can try these out and let me know how it goes. Thanks, Jesse ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 05/22] drm/i915: enable force wake, disable LLC on VLV
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 13b9b4f..b35b479 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -276,6 +276,8 @@ static const struct intel_device_info
intel_valleyview_m_info = {
.has_bsd_ring = 1,
.has_blt_ring = 1,
.is_valleyview = 1,
+ .has_force_wake = 1,
+ .has_llc = 0,
};
static const struct intel_device_info intel_valleyview_d_info = {
@@ -285,6 +287,8 @@ static const struct intel_device_info
intel_valleyview_d_info = {
.has_bsd_ring = 1,
.has_blt_ring = 1,
.is_valleyview = 1,
+ .has_force_wake = 1,
+ .has_llc = 0,
};
static const struct intel_device_info intel_haswell_d_info = {
--
1.7.9.5
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[Intel-gfx] [PATCH 06/22] drm/i915: add power context allocation and setup on VLV
The Gunit has a separate reg for this, so allocate some stolen space for
the power context and initialize the reg.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.h|2 ++
drivers/gpu/drm/i915/i915_gem_stolen.c | 41
drivers/gpu/drm/i915/i915_reg.h|1 +
3 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f4ae73d..34f01a9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -928,6 +928,8 @@ typedef struct drm_i915_private {
struct drm_mm_node *compressed_fb;
struct drm_mm_node *compressed_llb;
+ struct drm_mm_node *vlv_pctx;
+
unsigned long last_gpu_reset;
/* list of fbdev register on this device */
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index f21ae17..ac11a41 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -171,11 +171,49 @@ void i915_gem_stolen_cleanup_compression(struct
drm_device *dev)
dev_priv-cfb_size = 0;
}
+static void i915_setup_pctx(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct drm_mm_node *pctx;
+ unsigned long pctx_paddr;
+ int pctx_size = 24*1024;
+
+ pctx = drm_mm_search_free(dev_priv-mm.stolen, pctx_size, 4096, 0);
+ if (pctx)
+ pctx = drm_mm_get_block(pctx, pctx_size, 4096);
+ if (!pctx)
+ goto err;
+
+ pctx_paddr = dev_priv-mm.stolen_base + pctx-start;
+ if (!pctx_paddr)
+ goto err_free_pctx;
+
+ dev_priv-vlv_pctx = pctx;
+ I915_WRITE(VLV_PCBR, pctx_paddr);
+
+ return;
+
+err_free_pctx:
+ drm_mm_put_block(pctx);
+err:
+ DRM_DEBUG(not enough stolen space for PCTX, disabling\n);
+}
+
+static void i915_cleanup_pctx(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+
+ I915_WRITE(VLV_PCBR, 0);
+ drm_mm_put_block(dev_priv-vlv_pctx);
+}
+
void i915_gem_cleanup_stolen(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
i915_gem_stolen_cleanup_compression(dev);
+ if (IS_VALLEYVIEW(dev) i915_powersave)
+ i915_cleanup_pctx(dev);
drm_mm_takedown(dev_priv-mm.stolen);
}
@@ -193,6 +231,9 @@ int i915_gem_init_stolen(struct drm_device *dev)
/* Basic memrange allocator for stolen space */
drm_mm_init(dev_priv-mm.stolen, 0, dev_priv-mm.gtt-stolen_size);
+ if (IS_VALLEYVIEW(dev) i915_powersave)
+ i915_setup_pctx(dev);
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 286bab3..c785750 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -561,6 +561,7 @@
#define ISR0x020ac
#define VLV_GUNIT_CLOCK_GATE 0x182060
#define GCFG_DIS (18)
+#define VLV_PCBR 0x182120
#define VLV_IIR_RW 0x182084
#define VLV_IER0x1820a0
#define VLV_IIR0x1820a4
--
1.7.9.5
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[Intel-gfx] [PATCH 07/22] drm/i915: new register for IS_DISPLAYREG
From: Ben Widawsky b...@bwidawsk.net Signed-off-by: Ben Widawsky b...@bwidawsk.net --- drivers/gpu/drm/i915/i915_drv.c |7 +++ drivers/gpu/drm/i915/i915_reg.h |1 + 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b35b479..28d5992 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1193,10 +1193,6 @@ static bool IS_DISPLAYREG(u32 reg) reg = VLV_ISR) return false; - if (reg == FORCEWAKE_VLV || - reg == FORCEWAKE_ACK_VLV) - return false; - if (reg == GEN6_GDRST) return false; @@ -1213,6 +1209,9 @@ static bool IS_DISPLAYREG(u32 reg) case GEN6_MBCTL: case GEN6_UCGCTL2: case GEN7_UCGCTL4: + case FORCEWAKE_VLV: + case FORCEWAKE_ACK_VLV: + case VLV_GTLC_WAKE_CTRL: return false; default: break; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c785750..7e13f34 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4212,6 +4212,7 @@ #define FORCEWAKE_ACK_VLV 0x1300b4 #define FORCEWAKE_ACK_HSW 0x130044 #define FORCEWAKE_ACK 0x130090 +#define VLV_GTLC_WAKE_CTRL0x130090 #define FORCEWAKE_MT 0xa188 /* multi-threaded */ #define FORCEWAKE_KERNEL 0x1 #define FORCEWAKE_USER 0x2 -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/22] drm/i915: allow force wake on VLV
There's a separate bit in the Gunit to allow force wake control.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_gem.c |5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ad98db5..fa12248 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3987,6 +3987,11 @@ int i915_gem_init(struct drm_device *dev)
int ret;
mutex_lock(dev-struct_mutex);
+
+ if (IS_VALLEYVIEW(dev)) {
+ /* Make sure we can use force wake */
+ I915_WRITE(VLV_GTLC_WAKE_CTRL, 1);
+ }
i915_gem_init_global_gtt(dev);
ret = i915_gem_init_hw(dev);
mutex_unlock(dev-struct_mutex);
--
1.7.9.5
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[Intel-gfx] [PATCH 09/22] drm/i915: more clock gating disables on VLV
Disable a swath of clock gating bits pending further testing and measurement. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_pm.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index e8d416c..2820707 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3851,7 +3851,16 @@ static void valleyview_init_clock_gating(struct drm_device *dev) * Disable clock gating on th GCFG unit to prevent a delay * in the reporting of vblank events. */ - I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS); + I915_WRITE(VLV_GUNIT_CLOCK_GATE, 0x); + + /* Need testing additional review on newer hw */ + I915_WRITE(0x9400, 0x); + I915_WRITE(0x9404, 0x); + I915_WRITE(0x9408, 0x); + I915_WRITE(0x940c, 0x); + I915_WRITE(0x9410, 0x); + I915_WRITE(0x9414, 0x); + I915_WRITE(0x9418, 0x); } static void g4x_init_clock_gating(struct drm_device *dev) -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 17/22] drm/i915: VLV hack: force DP to report connected
--- drivers/gpu/drm/i915/intel_dp.c |4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index f4c8723..f346bab 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2399,6 +2399,10 @@ intel_dp_detect(struct drm_connector *connector, bool force) else status = g4x_dp_detect(intel_dp); + /* HOTPLUG Detect is not working even though it is enabled */ + if (IS_VALLEYVIEW(connector-dev)) + status = connector_status_connected; + if (status != connector_status_connected) return status; -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 10/22] drm/i915: don't init LVDS on VLV
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_lvds.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 8c61876..feef18c 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -1024,6 +1024,9 @@ static bool intel_lvds_supported(struct drm_device *dev) if (HAS_PCH_SPLIT(dev)) return true; + if (IS_VALLEYVIEW(dev)) + return false; + /* Otherwise LVDS was only attached to mobile products, * except for the inglorious 830gm */ return IS_MOBILE(dev) !IS_I830(dev); -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 12/22] drm/i915: Fix VLV hdmi limits
Fix the correct hdmi limits for VLV A0
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
---
drivers/gpu/drm/i915/intel_display.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 9f2f817..83d629d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -387,12 +387,12 @@ static const intel_limit_t intel_limits_vlv_dac = {
};
static const intel_limit_t intel_limits_vlv_hdmi = {
- .dot = { .min = 2, .max = 165000 },
- .vco = { .min = 400, .max = 5994000},
- .n = { .min = 1, .max = 7 },
+ .dot = { .min = 25000, .max = 18 },
+ .vco = { .min = 404, .max = 596 },
+ .n = { .min = 1, .max = 5 },
.m = { .min = 60, .max = 300 }, /* guess */
.m1 = { .min = 2, .max = 3 },
- .m2 = { .min = 11, .max = 156 },
+ .m2 = { .min = 15, .max = 149 },
.p = { .min = 10, .max = 30 },
.p1 = { .min = 2, .max = 3 },
.p2 = { .dot_limit = 27,
--
1.7.9.5
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[Intel-gfx] [PATCH 22/22] drm/i915: turbo RC6 support for VLV
Uses slightly different interfaces than other platforms.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/intel_pm.c | 148 +--
1 file changed, 144 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 36f019b..b7922b8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2372,6 +2372,47 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
trace_intel_gpu_freq_change(val * 50);
}
+void valleyview_set_rps(struct drm_device *dev, u8 val)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+ u32 limits = gen6_rps_limits(dev_priv, val);
+ u32 pval;
+
+ WARN_ON(!mutex_is_locked(dev_priv-rps.hw_lock));
+ WARN_ON(val dev_priv-rps.max_delay);
+ WARN_ON(val dev_priv-rps.min_delay);
+
+ if (val == dev_priv-rps.cur_delay)
+ return;
+
+ valleyview_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
+
+ do {
+ valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, pval);
+ if (time_after(jiffies, timeout)) {
+ DRM_DEBUG_DRIVER(timed out waiting for Punit\n);
+ break;
+ }
+ udelay(10);
+ } while (pval 1);
+
+ valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, pval);
+ if ((pval 8) != val)
+ DRM_DEBUG_DRIVER(punit overrode freq: %d requested, but got
%d\n,
+ val, pval 8);
+
+ /* Make sure we continue to get interrupts
+* until we hit the minimum or maximum frequencies.
+*/
+ I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
+
+ dev_priv-rps.cur_delay = val;
+
+ trace_intel_gpu_freq_change(val * 50);
+}
+
+
static void gen6_disable_rps(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -2615,6 +2656,100 @@ static void gen6_update_ring_freq(struct drm_device
*dev)
}
}
+static void valleyview_enable_rps(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ struct intel_ring_buffer *ring;
+ u32 gtfifodbg, val;
+ int i;
+
+ WARN_ON(!mutex_is_locked(dev_priv-rps.hw_lock));
+
+ if ((gtfifodbg = I915_READ(GTFIFODBG))) {
+ DRM_ERROR(GT fifo had a previous error %x\n, gtfifodbg);
+ I915_WRITE(GTFIFODBG, gtfifodbg);
+ }
+
+ gen6_gt_force_wake_get(dev_priv);
+
+ I915_WRITE(GEN6_RC_SLEEP, 0);
+
+ I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 0x0028);
+ I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);
+ I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 0x19);
+
+ for_each_ring(ring, dev_priv, i)
+ I915_WRITE(RING_MAX_IDLE(ring-mmio_base), 10);
+
+ I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);
+ I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
+
+ I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
+ I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
+ I915_WRITE(GEN6_RP_UP_EI, 66000);
+ I915_WRITE(GEN6_RP_DOWN_EI, 35);
+
+ I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
+
+ I915_WRITE(GEN6_RP_CONTROL,
+ GEN6_RP_MEDIA_TURBO |
+ GEN6_RP_MEDIA_HW_NORMAL_MODE |
+ GEN6_RP_MEDIA_IS_GFX |
+ GEN6_RP_ENABLE |
+ GEN6_RP_UP_BUSY_AVG |
+ GEN6_RP_DOWN_IDLE_CONT);
+
+ /* allows RC6 residency counter to work */
+ I915_WRITE(0x138104, 0x00ff);
+ I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE);
+
+ valleyview_punit_read(dev_priv, PUNIT_FUSE_BUS1, val);
+ DRM_DEBUG_DRIVER(max GPU freq: %d\n, val);
+ dev_priv-rps.max_delay = val;
+
+ valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, val);
+ DRM_DEBUG_DRIVER(min GPU freq: %d\n, val);
+ dev_priv-rps.min_delay = val;
+
+ valleyview_punit_read(dev_priv, PUNIT_FUSE_BUS2, val);
+ DRM_DEBUG_DRIVER(max GPLL freq: %d\n, val);
+
+ valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, val);
+ DRM_DEBUG_DRIVER(DDR speed: );
+ if (((val 6) 3) == 0) {
+ dev_priv-mem_freq = 800;
+ printk(800 MHz\n);
+ } else if (((val 6) 3) == 1) {
+ printk(1066 MHz\n);
+ dev_priv-mem_freq = 1066;
+ } else if (((val 6) 3) == 2) {
+ printk(1333 MHz\n);
+ dev_priv-mem_freq = 1333;
+ } else if (((val 6) 3) == 3)
+ printk(invalid\n);
+ DRM_DEBUG_DRIVER(GPLL enabled? %s\n, val 8 ? yes : no);
+ DRM_DEBUG_DRIVER(GPU status: 0x%08x\n, val);
+
+ DRM_DEBUG_DRIVER(current GPU freq: %x\n, (val 8) 0xff);
+ dev_priv-rps.cur_delay = (val 8) 0xff;
+
+ val = 0xd500;
+ DRM_DEBUG_DRIVER(setting GPU
[Intel-gfx] [PATCH 13/22] drm/i915: update DPIO constants for VLV
Separate bits for HDMI and DP. Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 83d629d..2bc8ce7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4307,15 +4307,26 @@ static void vlv_update_pll(struct drm_crtc *crtc, mdiv |= DPIO_ENABLE_CALIBRATION; intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv); - intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), 0x0100); + //intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), 0x0100); pdiv = (1 DPIO_REFSEL_OVERRIDE) | (5 DPIO_PLL_MODESEL_SHIFT) | (3 DPIO_BIAS_CURRENT_CTL_SHIFT) | (120) | (7 DPIO_PLL_REFCLK_SEL_SHIFT) | (8 DPIO_DRIVER_CTL_SHIFT) | (5 DPIO_CLK_BIAS_CTL_SHIFT); - intel_dpio_write(dev_priv, DPIO_REFSFR(pipe), pdiv); - intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), 0x005f003b); + //intel_dpio_write(dev_priv, DPIO_REFSFR(pipe), pdiv); + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) + intel_dpio_write(dev_priv, DPIO_REFSFR(pipe), 0x0d77); + else + // for DP/eDP. We'll not worry about VGA + intel_dpio_write(dev_priv, DPIO_REFSFR(pipe), 0x0d74); + + intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), 0x01C0); + + //intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), 0x005f003b); + intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), 0x005f0051); + + intel_dpio_write(dev_priv, 0x804C, 0x87871000); dpll |= DPLL_VCO_ENABLE; I915_WRITE(DPLL(pipe), dpll); -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 15/22] drm/i915: move DPIO init to init and resume, not unload
The GOP should do this for us once at boot time, but on resume and to defend against the various BIOS versions, we init once at load time and also in the resume path. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/intel_display.c |5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c0cb254..961ac69 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8556,6 +8556,8 @@ void intel_modeset_init_hw(struct drm_device *dev) intel_init_clock_gating(dev); + vlv_init_dpio(dev); + mutex_lock(dev-struct_mutex); intel_enable_gt_powersave(dev); mutex_unlock(dev-struct_mutex); @@ -8947,9 +8949,6 @@ void intel_modeset_cleanup(struct drm_device *dev) ironlake_teardown_rc6(dev); - if (IS_VALLEYVIEW(dev)) - vlv_init_dpio(dev); - mutex_unlock(dev-struct_mutex); /* Disable the irq before mode object teardown, for the irq might -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 14/22] drm/i915: add HMDI workarounds on VLV
Need to do some extra work at PLL disable time to allow HDMI to come
back up on the next mode set.
v2: take dpio lock around update - jbarnes
only do WA on VLV -jbarnes
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 2bc8ce7..c0cb254 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1492,6 +1492,14 @@ static void intel_disable_pll(struct drm_i915_private
*dev_priv, enum pipe pipe)
int reg;
u32 val;
+ if (IS_VALLEYVIEW(dev_priv-dev)) {
+ mutex_lock(dev_priv-dpio_lock);
+ // Flicker WA for HDMI
+ intel_dpio_write(dev_priv, 0x8200, 0x);
+ intel_dpio_write(dev_priv, 0x8204, 0x00e00060);
+ mutex_unlock(dev_priv-dpio_lock);
+ }
+
/* Don't disable pipe A or pipe A PLLs if needed */
if (pipe == PIPE_A (dev_priv-quirks QUIRK_PIPEA_FORCE))
return;
@@ -4299,6 +4307,12 @@ static void vlv_update_pll(struct drm_crtc *crtc,
* In Valleyview PLL and program lane counter registers are exposed
* through DPIO interface
*/
+
+ // program DD1 Tx lane resets sets to default
+ // WA for HDMI flicker issue
+ intel_dpio_write(dev_priv, 0x8200, 0x10080);
+ intel_dpio_write(dev_priv, 0x8204, 0x00600060);
+
mdiv = ((bestm1 DPIO_M1DIV_SHIFT) | (bestm2 DPIO_M2DIV_MASK));
mdiv |= ((bestp1 DPIO_P1_SHIFT) | (bestp2 DPIO_P2_SHIFT));
mdiv |= ((bestn DPIO_N_SHIFT));
--
1.7.9.5
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[Intel-gfx] [PATCH 21/22] drm/i915: add media well to VLV force wake routines
We could split this out into a separate routine at some point as an
optimization.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
drivers/gpu/drm/i915/i915_reg.h |3 +++
drivers/gpu/drm/i915/intel_pm.c |8 +++-
3 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dde54b1..8440d28a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1211,7 +1211,10 @@ static bool IS_DISPLAYREG(u32 reg)
case GEN7_UCGCTL4:
case FORCEWAKE_VLV:
case FORCEWAKE_ACK_VLV:
+ case FORCEWAKE_MEDIA_VLV:
+ case FORCEWAKE_ACK_MEDIA_VLV:
case VLV_GTLC_WAKE_CTRL:
+ case VLV_GTLC_PW_STATUS:
case GFX_FLSH_CNTL_GEN6:
return false;
default:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7325b7a..39c6318 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4210,9 +4210,12 @@
#define FORCEWAKE 0xA18C
#define FORCEWAKE_VLV 0x1300b0
#define FORCEWAKE_ACK_VLV 0x1300b4
+#define FORCEWAKE_MEDIA_VLV 0x1300b8
+#define FORCEWAKE_ACK_MEDIA_VLV 0x1300bc
#define FORCEWAKE_ACK_HSW 0x130044
#define FORCEWAKE_ACK 0x130090
#define VLV_GTLC_WAKE_CTRL0x130090
+#define VLV_GTLC_PW_STATUS0x130094
#define FORCEWAKE_MT 0xa188 /* multi-threaded */
#define FORCEWAKE_KERNEL 0x1
#define FORCEWAKE_USER 0x2
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index bb97309..36f019b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4260,10 +4260,15 @@ static void vlv_force_wake_get(struct drm_i915_private
*dev_priv)
DRM_ERROR(Timed out waiting for forcewake old ack to
clear.\n);
I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
+ I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
_MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) 1),
FORCEWAKE_ACK_TIMEOUT_MS))
- DRM_ERROR(Timed out waiting for forcewake to ack request.\n);
+ DRM_ERROR(Timed out waiting for GT to ack forcewake
request.\n);
+
+ if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_MEDIA_VLV) 1),
+ FORCEWAKE_ACK_TIMEOUT_MS))
+ DRM_ERROR(Timed out waiting for media to ack forcewake
request.\n);
__gen6_gt_wait_for_thread_c0(dev_priv);
}
@@ -4271,6 +4276,7 @@ static void vlv_force_wake_get(struct drm_i915_private
*dev_priv)
static void vlv_force_wake_put(struct drm_i915_private *dev_priv)
{
I915_WRITE_NOTRACE(FORCEWAKE_VLV,
_MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
+ I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
_MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
/* The below doubles as a POSTING_READ */
gen6_gt_check_fifodbg(dev_priv);
}
--
1.7.9.5
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[Intel-gfx] [PATCH 20/22] drm/i915: add Punit read/write routines for VLV
Slightly different than other platforms.
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.h |2 ++
drivers/gpu/drm/i915/i915_reg.h | 22
drivers/gpu/drm/i915/intel_pm.c | 74 +++
3 files changed, 98 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 34f01a9..60eee7d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1749,6 +1749,8 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private
*dev_priv);
int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32
*val);
int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32
val);
+int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32
*val);
+int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32
val);
#define __i915_read(x, y) \
u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool
trace);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7e13f34..7325b7a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4335,6 +4335,28 @@
#define GEN6_PCODE_DATA0x138128
#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
+#define VLV_IOSF_DOORBELL_REQ 0x182100
+#define IOSF_DEVFN_SHIFT 24
+#define IOSF_OPCODE_SHIFT16
+#define IOSF_PORT_SHIFT 8
+#define IOSF_BYTE_ENABLES_SHIFT 4
+#define IOSF_BAR_SHIFT 1
+#define IOSF_SB_BUSY (10)
+#define IOSF_PORT_PUNIT 0x4
+#define VLV_IOSF_DATA 0x182104
+#define VLV_IOSF_ADDR 0x182108
+
+#define PUNIT_REG_GPU_LFM 0xd3
+#define PUNIT_REG_GPU_FREQ_REQ 0xd4
+#define PUNIT_REG_GPU_FREQ_STS 0xd8
+#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ 0xdc
+
+#define PUNIT_OPCODE_REG_READ 6
+#define PUNIT_OPCODE_REG_WRITE 7
+
+#define PUNIT_FUSE_BUS20xf6 /* bits 47:40 */
+#define PUNIT_FUSE_BUS10xf5 /* bits 55:48 */
+
#define GEN6_GT_CORE_STATUS0x138060
#define GEN6_CORE_CPD_STATE_MASK (74)
#define GEN6_RCn_MASK7
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7d812ba..bb97309 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4356,3 +4356,77 @@ int sandybridge_pcode_write(struct drm_i915_private
*dev_priv, u8 mbox, u32 val)
return 0;
}
+
+int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
+{
+ u32 cmd, devfn, opcode, port, be, bar;
+
+ bar = 0;
+ be = 0xf;
+ port = IOSF_PORT_PUNIT;
+ opcode = PUNIT_OPCODE_REG_READ;
+ devfn = 16;
+
+ cmd = (devfn IOSF_DEVFN_SHIFT) | (opcode IOSF_OPCODE_SHIFT) |
+ (port IOSF_PORT_SHIFT) | (be | IOSF_BYTE_ENABLES_SHIFT) |
+ (bar IOSF_BAR_SHIFT);
+
+ WARN_ON(!mutex_is_locked(dev_priv-rps.hw_lock));
+
+ if (I915_READ(VLV_IOSF_DOORBELL_REQ) IOSF_SB_BUSY) {
+ DRM_DEBUG_DRIVER(warning: pcode (read) mailbox access
failed\n);
+ return -EAGAIN;
+ }
+
+ I915_WRITE(VLV_IOSF_ADDR, addr);
+ I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
+
+ if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) IOSF_SB_BUSY) == 0,
+500)) {
+ DRM_ERROR(timeout waiting for pcode read (%d) to finish\n,
+ addr);
+ return -ETIMEDOUT;
+ }
+
+ *val = I915_READ(VLV_IOSF_DATA);
+ I915_WRITE(VLV_IOSF_DATA, 0);
+
+ return 0;
+}
+
+int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
+{
+ u32 cmd, devfn, opcode, port, be, bar;
+
+ bar = 0;
+ be = 0xf;
+ port = IOSF_PORT_PUNIT;
+ opcode = PUNIT_OPCODE_REG_WRITE;
+ devfn = 16;
+
+ cmd = (devfn IOSF_DEVFN_SHIFT) | (opcode IOSF_OPCODE_SHIFT) |
+ (port IOSF_PORT_SHIFT) | (be | IOSF_BYTE_ENABLES_SHIFT) |
+ (bar IOSF_BAR_SHIFT);
+
+ WARN_ON(!mutex_is_locked(dev_priv-rps.hw_lock));
+
+ if (I915_READ(VLV_IOSF_DOORBELL_REQ) IOSF_SB_BUSY) {
+ DRM_DEBUG_DRIVER(warning: pcode (write) mailbox access
failed\n);
+ return -EAGAIN;
+ }
+
+ I915_WRITE(VLV_IOSF_ADDR, addr);
+ I915_WRITE(VLV_IOSF_DATA, val);
+ I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
+
+ if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) IOSF_SB_BUSY) == 0,
+500)) {
+ DRM_ERROR(timeout waiting for pcode write (%d) to finish\n,
+
[Intel-gfx] [PATCH 16/22] drm/i915: VLV hack: Disable wm for VLV
From: Vijay Purushothaman vijay.a.purushotha...@intel.com
Pondicherry should take care in most cases.
Watermark update is causing driver crash with divide error. Look again.
For current usage, not needed.
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
---
drivers/gpu/drm/i915/intel_pm.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2820707..7d812ba 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4050,7 +4050,8 @@ void intel_init_pm(struct drm_device *dev)
} else
dev_priv-display.update_wm = NULL;
} else if (IS_VALLEYVIEW(dev)) {
- dev_priv-display.update_wm = valleyview_update_wm;
+// dev_priv-display.update_wm = valleyview_update_wm;
+ dev_priv-display.update_wm = NULL;
dev_priv-display.update_sprite_wm =
valleyview_update_sprite_wm,
dev_priv-display.init_clock_gating =
valleyview_init_clock_gating;
--
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[Intel-gfx] [PATCH 11/22] drm/i915: fixup port enumeration on VLV
From: Vijay Purushothaman vijay.a.purushotha...@intel.com
Updated to reflect newer boards.
Signed-off-by: Vijay Purushothaman vijay.a.purushotha...@intel.com
---
drivers/gpu/drm/i915/intel_display.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index c8a9b7d..9f2f817 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8092,7 +8092,8 @@ static void intel_setup_outputs(struct drm_device *dev)
* IMP : To route DP in PORT_B in VLV X0 board, make sure to
remove the
* jumper from J3K1
*/
- intel_dp_init(dev, DP_B, PORT_B);
+ // Only for testing - Vijay
+ //intel_dp_init(dev, DP_B, PORT_B);
/*
* To get HDMI output on VLV X0, comment the above line
(intel_dp_init)
@@ -8101,13 +8102,13 @@ static void intel_setup_outputs(struct drm_device *dev)
* IMP : To route HDMI in PORT_B in VLV X0 board, make sure to
connect
* the jumper in J3K1
*/
- /* intel_hdmi_init(dev, SDVOB, PORT_B); */
+ intel_hdmi_init(dev, SDVOB, PORT_B);
/*
* For VLV X0, the eDP is supported on PORT_C after rework.
* Uncomment the following line if the board is reworked for eDP
*/
- /* intel_dp_init(dev, DP_C, PORT_C); */
+ intel_dp_init(dev, DP_C, PORT_C);
} else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
bool found = false;
--
1.7.9.5
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[Intel-gfx] [PATCH 18/22] drm/i915: add flush control reg to IS_DISPLAYREG check
With the PTE poking code pulled into i915, we need to make sure we don't add the display offset to our TLB flush writes. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_drv.c |1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 28d5992..dde54b1 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1212,6 +1212,7 @@ static bool IS_DISPLAYREG(u32 reg) case FORCEWAKE_VLV: case FORCEWAKE_ACK_VLV: case VLV_GTLC_WAKE_CTRL: + case GFX_FLSH_CNTL_GEN6: return false; default: break; -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 19/22] drm/i915: use gen6 stolen check on VLV
It uses the same bit definitions. Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org --- drivers/gpu/drm/i915/i915_gem_gtt.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index eac2cec..3900b98 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -725,7 +725,7 @@ int i915_gem_gtt_init(struct drm_device *dev) pci_read_config_word(dev-pdev, SNB_GMCH_CTRL, snb_gmch_ctl); dev_priv-mm.gtt-gtt_total_entries = gen6_get_total_gtt_size(snb_gmch_ctl) / sizeof(gtt_pte_t); - if (INTEL_INFO(dev)-gen 7) + if (INTEL_INFO(dev)-gen 7 || IS_VALLEYVIEW(dev)) dev_priv-mm.gtt-stolen_size = gen6_get_stolen_size(snb_gmch_ctl); else dev_priv-mm.gtt-stolen_size = gen7_get_stolen_size(snb_gmch_ctl); -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] VT switchless suspend/resume
Finally got around to updating these patches here at FOSDEM. I made the core PM support for this into a function so multiple drivers can indicate their support and we'll be conservative about doing the switch if no drivers call in or if any driver indicates it can't support VT switchless suspend/resume. Please check the logic in my pm_vt_switch_required function; I try to handle several cases: 1) no driver calls the routine (should VT switch) 2) driver requires it but then unbinds and clears its req, a subsequent driver that doesn't require VT switching should have its switchless behavior honored (shouldn't VT switch) 3) multiple drivers call in with different reqs (should VT switch) 4) multiple or single drivers call in that don't require VT switching (shouldn't VT switch) Still need to add calls to some other drivers, so if this looks ok I can do that. Thanks, Jesse ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] PM: make VT switching to the suspend console optional v2
KMS drivers can potentially restore the display configuration without
userspace help. Such drivers can can call a new funciton,
pm_vt_switch_required(false) if they support this feature. In that
case, the PM layer won't VT switch to the suspend console at suspend
time and then back to the original VT on resume, but rather leave things
alone for a nicer looking suspend and resume sequence.
v2: make a function so we can handle multiple drivers (Alan)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
include/linux/pm.h |2 ++
kernel/power/console.c | 59
2 files changed, 61 insertions(+)
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 03d7bb1..5c2b131 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -35,6 +35,8 @@ extern void (*pm_idle)(void);
extern void (*pm_power_off)(void);
extern void (*pm_power_off_prepare)(void);
+extern void pm_vt_switch_required(bool required);
+
/*
* Device power management
*/
diff --git a/kernel/power/console.c b/kernel/power/console.c
index b1dc456..67c4de3 100644
--- a/kernel/power/console.c
+++ b/kernel/power/console.c
@@ -4,6 +4,7 @@
* Originally from swsusp.
*/
+#include linux/console.h
#include linux/vt_kern.h
#include linux/kbd_kern.h
#include linux/vt.h
@@ -14,8 +15,63 @@
static int orig_fgconsole, orig_kmsg;
+DEFINE_SPINLOCK(vt_switch_lock);
+static int vt_switch_required = -1;
+
+/**
+ * pm_vt_switch_required - indicate VT switch at suspend requirements
+ * @required: if true, caller needs VT switch at suspend/resume time
+ *
+ * The different console drivers may or may not require VT switches across
+ * suspend/resume, depending on how they handle restoring video state and
+ * what may be running.
+ *
+ * Drivers can indicate support for switchless suspend/resume, which can
+ * save time and flicker, by using this routine and passing 'false' as
+ * the argument. If any loaded driver needs VT switching, or the
+ * no_console_suspend argument has been passed on the command line, VT
+ * switches will occur.
+ */
+void pm_vt_switch_required(bool required)
+{
+ spin_lock(vt_switch_lock);
+ if (vt_switch_required == -1) {
+ /* First call, set up real value */
+ if (!required)
+ vt_switch_required = 0;
+ if (required)
+ vt_switch_required = 1;
+ } else {
+ /*
+* Subsequent caller, make sure we handle the case
+* where a driver binds, needs VT switch, but then unbinds
+* later and a switchless driver is present.
+*/
+ if (!required vt_switch_required 0)
+ vt_switch_required--;
+ else if (required)
+ vt_switch_required++;
+ }
+ spin_unlock(vt_switch_lock);
+}
+EXPORT_SYMBOL(pm_vt_switch_required);
+
+static bool pm_vt_switch(void)
+{
+ bool ret = true;
+
+ spin_lock(vt_switch_lock);
+ if (!vt_switch_required console_suspend_enabled)
+ ret = false;
+ spin_unlock(vt_switch_lock);
+ return ret;
+}
+
int pm_prepare_console(void)
{
+ if (!pm_vt_switch())
+ return 0;
+
orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1);
if (orig_fgconsole 0)
return 1;
@@ -26,6 +82,9 @@ int pm_prepare_console(void)
void pm_restore_console(void)
{
+ if (!pm_vt_switch())
+ return;
+
if (orig_fgconsole = 0) {
vt_move_to_console(orig_fgconsole, 0);
vt_kmsg_redirect(orig_kmsg);
--
1.7.9.5
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Re: [Intel-gfx] [PATCH 01/22] drm/i915: add more VLV IDs
I was going to review them, but I couldn't find vlv ids at bspec.
where is the ids list?
On Sat, Feb 2, 2013 at 10:56 AM, Jesse Barnes jbar...@virtuousgeek.org wrote:
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 51e9c76..69d0637 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -387,6 +387,9 @@ static const struct pci_device_id pciidlist[] = {
/* aka */
INTEL_VGA_DEVICE(0x0D26, intel_haswell_m_info), /* CRW GT2 mobile */
INTEL_VGA_DEVICE(0x0D36, intel_haswell_m_info), /* CRW GT2 mobile */
INTEL_VGA_DEVICE(0x0f30, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f31, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f32, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f33, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0157, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0155, intel_valleyview_d_info),
{0, 0, 0}
--
1.7.9.5
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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Re: [Intel-gfx] [PATCH 01/22] drm/i915: add more VLV IDs
The IDs are off in the VLV doc sites, which are separate and internal
only atm.
Jesse
On Sat, 2 Feb 2013 15:30:59 -0200
Rodrigo Vivi rodrigo.v...@gmail.com wrote:
I was going to review them, but I couldn't find vlv ids at bspec.
where is the ids list?
On Sat, Feb 2, 2013 at 10:56 AM, Jesse Barnes jbar...@virtuousgeek.org
wrote:
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c
b/drivers/gpu/drm/i915/i915_drv.c
index 51e9c76..69d0637 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -387,6 +387,9 @@ static const struct pci_device_id pciidlist[] = {
/* aka */
INTEL_VGA_DEVICE(0x0D26, intel_haswell_m_info), /* CRW GT2 mobile
*/
INTEL_VGA_DEVICE(0x0D36, intel_haswell_m_info), /* CRW GT2 mobile
*/
INTEL_VGA_DEVICE(0x0f30, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f31, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f32, intel_valleyview_m_info),
+ INTEL_VGA_DEVICE(0x0f33, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0157, intel_valleyview_m_info),
INTEL_VGA_DEVICE(0x0155, intel_valleyview_d_info),
{0, 0, 0}
--
1.7.9.5
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Re: [Intel-gfx] [PATCH] PM: make VT switching to the suspend console optional v2
On Saturday, February 02, 2013 04:34:08 PM Jesse Barnes wrote:
KMS drivers can potentially restore the display configuration without
userspace help. Such drivers can can call a new funciton,
pm_vt_switch_required(false) if they support this feature. In that
case, the PM layer won't VT switch to the suspend console at suspend
time and then back to the original VT on resume, but rather leave things
alone for a nicer looking suspend and resume sequence.
v2: make a function so we can handle multiple drivers (Alan)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
include/linux/pm.h |2 ++
kernel/power/console.c | 59
2 files changed, 61 insertions(+)
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 03d7bb1..5c2b131 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -35,6 +35,8 @@ extern void (*pm_idle)(void);
extern void (*pm_power_off)(void);
extern void (*pm_power_off_prepare)(void);
+extern void pm_vt_switch_required(bool required);
+
/*
* Device power management
*/
diff --git a/kernel/power/console.c b/kernel/power/console.c
index b1dc456..67c4de3 100644
--- a/kernel/power/console.c
+++ b/kernel/power/console.c
@@ -4,6 +4,7 @@
* Originally from swsusp.
*/
+#include linux/console.h
#include linux/vt_kern.h
#include linux/kbd_kern.h
#include linux/vt.h
@@ -14,8 +15,63 @@
static int orig_fgconsole, orig_kmsg;
+DEFINE_SPINLOCK(vt_switch_lock);
+static int vt_switch_required = -1;
+
+/**
+ * pm_vt_switch_required - indicate VT switch at suspend requirements
+ * @required: if true, caller needs VT switch at suspend/resume time
+ *
+ * The different console drivers may or may not require VT switches across
+ * suspend/resume, depending on how they handle restoring video state and
+ * what may be running.
+ *
+ * Drivers can indicate support for switchless suspend/resume, which can
+ * save time and flicker, by using this routine and passing 'false' as
+ * the argument. If any loaded driver needs VT switching, or the
+ * no_console_suspend argument has been passed on the command line, VT
+ * switches will occur.
+ */
It seems to me that we'll need a separate counter for the number of registered
drivers and do the switch if that number is equal to the number of drivers that
have passed false to this thing.
In which case we can simplify this slightly and introduce
pm_vt_swtich_not_required(void) and then the only drivers that need to bother
will be the ones known to not require the switch.
Otherwise it will be kind of error prone I'm afraid.
Thanks,
Rafael
+void pm_vt_switch_required(bool required)
+{
+ spin_lock(vt_switch_lock);
+ if (vt_switch_required == -1) {
+ /* First call, set up real value */
+ if (!required)
+ vt_switch_required = 0;
+ if (required)
+ vt_switch_required = 1;
+ } else {
+ /*
+ * Subsequent caller, make sure we handle the case
+ * where a driver binds, needs VT switch, but then unbinds
+ * later and a switchless driver is present.
+ */
+ if (!required vt_switch_required 0)
+ vt_switch_required--;
+ else if (required)
+ vt_switch_required++;
+ }
+ spin_unlock(vt_switch_lock);
+}
+EXPORT_SYMBOL(pm_vt_switch_required);
+
+static bool pm_vt_switch(void)
+{
+ bool ret = true;
+
+ spin_lock(vt_switch_lock);
+ if (!vt_switch_required console_suspend_enabled)
+ ret = false;
+ spin_unlock(vt_switch_lock);
+ return ret;
+}
+
int pm_prepare_console(void)
{
+ if (!pm_vt_switch())
+ return 0;
+
orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1);
if (orig_fgconsole 0)
return 1;
@@ -26,6 +82,9 @@ int pm_prepare_console(void)
void pm_restore_console(void)
{
+ if (!pm_vt_switch())
+ return;
+
if (orig_fgconsole = 0) {
vt_move_to_console(orig_fgconsole, 0);
vt_kmsg_redirect(orig_kmsg);
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
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Re: [Intel-gfx] [PATCH] PM: make VT switching to the suspend console optional v2
On Saturday, February 02, 2013 08:39:21 PM Rafael J. Wysocki wrote:
On Saturday, February 02, 2013 04:34:08 PM Jesse Barnes wrote:
KMS drivers can potentially restore the display configuration without
userspace help. Such drivers can can call a new funciton,
pm_vt_switch_required(false) if they support this feature. In that
case, the PM layer won't VT switch to the suspend console at suspend
time and then back to the original VT on resume, but rather leave things
alone for a nicer looking suspend and resume sequence.
v2: make a function so we can handle multiple drivers (Alan)
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
include/linux/pm.h |2 ++
kernel/power/console.c | 59
2 files changed, 61 insertions(+)
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 03d7bb1..5c2b131 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -35,6 +35,8 @@ extern void (*pm_idle)(void);
extern void (*pm_power_off)(void);
extern void (*pm_power_off_prepare)(void);
+extern void pm_vt_switch_required(bool required);
+
/*
* Device power management
*/
diff --git a/kernel/power/console.c b/kernel/power/console.c
index b1dc456..67c4de3 100644
--- a/kernel/power/console.c
+++ b/kernel/power/console.c
@@ -4,6 +4,7 @@
* Originally from swsusp.
*/
+#include linux/console.h
#include linux/vt_kern.h
#include linux/kbd_kern.h
#include linux/vt.h
@@ -14,8 +15,63 @@
static int orig_fgconsole, orig_kmsg;
+DEFINE_SPINLOCK(vt_switch_lock);
+static int vt_switch_required = -1;
+
+/**
+ * pm_vt_switch_required - indicate VT switch at suspend requirements
+ * @required: if true, caller needs VT switch at suspend/resume time
+ *
+ * The different console drivers may or may not require VT switches across
+ * suspend/resume, depending on how they handle restoring video state and
+ * what may be running.
+ *
+ * Drivers can indicate support for switchless suspend/resume, which can
+ * save time and flicker, by using this routine and passing 'false' as
+ * the argument. If any loaded driver needs VT switching, or the
+ * no_console_suspend argument has been passed on the command line, VT
+ * switches will occur.
+ */
It seems to me that we'll need a separate counter for the number of registered
drivers and do the switch if that number is equal to the number of drivers
that
have passed false to this thing.
In which case we can simplify this slightly and introduce
pm_vt_swtich_not_required(void)
Sorry, that won't be sufficient. Rather something like pm_vt_switch_get()
(indicating I'll do the switch, thanks) and pm_vt_switch_put() (indicating
now you need to do the switch yourself).
and then the only drivers that need to bother
will be the ones known to not require the switch.
Otherwise it will be kind of error prone I'm afraid.
Thanks,
Rafael
+void pm_vt_switch_required(bool required)
+{
+ spin_lock(vt_switch_lock);
+ if (vt_switch_required == -1) {
+ /* First call, set up real value */
+ if (!required)
+ vt_switch_required = 0;
+ if (required)
+ vt_switch_required = 1;
+ } else {
+ /*
+* Subsequent caller, make sure we handle the case
+* where a driver binds, needs VT switch, but then unbinds
+* later and a switchless driver is present.
+*/
+ if (!required vt_switch_required 0)
+ vt_switch_required--;
+ else if (required)
+ vt_switch_required++;
+ }
+ spin_unlock(vt_switch_lock);
+}
+EXPORT_SYMBOL(pm_vt_switch_required);
+
+static bool pm_vt_switch(void)
+{
+ bool ret = true;
+
+ spin_lock(vt_switch_lock);
+ if (!vt_switch_required console_suspend_enabled)
+ ret = false;
+ spin_unlock(vt_switch_lock);
+ return ret;
+}
+
int pm_prepare_console(void)
{
+ if (!pm_vt_switch())
+ return 0;
+
orig_fgconsole = vt_move_to_console(SUSPEND_CONSOLE, 1);
if (orig_fgconsole 0)
return 1;
@@ -26,6 +82,9 @@ int pm_prepare_console(void)
void pm_restore_console(void)
{
+ if (!pm_vt_switch())
+ return;
+
if (orig_fgconsole = 0) {
vt_move_to_console(orig_fgconsole, 0);
vt_kmsg_redirect(orig_kmsg);
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
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[Intel-gfx] [PATCH 1/2] configure.ac: Do not include `xext` and `xfixes` in `XVMCLIB`
Date: Sat, 2 Feb 2013 11:44:54 +0100 Building the package under Debian Sid/unstable, `dh_shlibdeps` informs that `libIntelXvMC.so.1.0.0` does not need to be linked against `libXext.so.6` or `libXfixes.so.3` [1]. $ debuild -b -us -uc […] make[1]: Entering directory `/build/buildd-xserver-xorg-video-intel_2.19.0-6-i386-9thLfo/xserver-xorg-video-intel-2.19.0' dh_shlibdeps -- --warnings=6 dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 should not be linked against libXext.so.6 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 should not be linked against libXfixes.so.3 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libXext.so.6 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libXfixes.so.3 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libX11-xcb.so.1 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb-dri2.so.0 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb-util.so.0 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb.so.1 (it uses none of the library's symbols) dpkg-shlibdeps: warning: package could avoid a useless dependency if debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 were not linked against libXext.so.6 (they use none of the library's symbols) dpkg-shlibdeps: warning: package could avoid a useless dependency if debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 were not linked against libXfixes.so.3 (they use none of the library's symbols) make[1]: Leaving directory `/build/buildd-xserver-xorg-video-intel_2.19.0-6-i386-9thLfo/xserver-xorg-video-intel-2.19.0' dh_installdeb -a -O--builddirectory=build/ […] Not populating `XVMCLIB` with `xext` and `xfixes` makes the warning go away and the libraries are still built without any issues. [1] https://buildd.debian.org/status/fetch.php?pkg=xserver-xorg-video-intelarch=i386ver=2%3A2.19.0-6stamp=1347825458 Signed-off-by: Paul Menzel paulepan...@users.sourceforge.net --- configure.ac |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure.ac b/configure.ac index 5135ecc..e6ab9d0 100644 --- a/configure.ac +++ b/configure.ac @@ -404,7 +404,7 @@ AC_MSG_RESULT([$DRI2]) if test $XVMC = yes; then PKG_CHECK_MODULES(XVMCLIB, - [xvmc xext xfixes dri2proto x11-xcb xcb-dri2 xcb-aux], + [xvmc dri2proto x11-xcb xcb-dri2 xcb-aux], [XVMC=yes], [XVMC=no]) fi AC_MSG_CHECKING([whether to include XvMC support]) -- 1.7.10.4 signature.asc Description: This is a digitally signed message part ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] configure.ac: Do not include `x11-xcb`, `xcb-dri2` and `xcb-aux` in `XVMCLIB`
Date: Sat, 2 Feb 2013 20:33:36 +0100
Building the package under Debian Sid/unstable, `dh_shlibdeps` informs
that `libI810XvMC.so.1.0.0` does not need to be linked against
`libX11-xcb.so.1`, `libxcb-dri2.so.0`, `libxcb-util.so.0` or
`libxcb.so.1` [1].
$ debuild -b -us -uc
[…]
make[1]: Entering directory `/src/xserver-xorg-video-intel'
dh_shlibdeps -- --warnings=6
dpkg-shlibdeps: Warnung:
debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen
libX11-xcb.so.1 gelinkt werden (es verwendet keines der Bibliotheks-Symbole)
dpkg-shlibdeps: Warnung:
debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen
libxcb-dri2.so.0 gelinkt werden (es verwendet keines der Bibliotheks-Symbole)
dpkg-shlibdeps: Warnung:
debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen
libxcb-util.so.0 gelinkt werden (es verwendet keines der Bibliotheks-Symbole)
dpkg-shlibdeps: Warnung:
debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen
libxcb.so.1 gelinkt werden (es verwendet keines der Bibliotheks-Symbole)
make[1]: Leaving directory `/src/xserver-xorg-video-intel'
[…]
Not populating `XVMCLIB` with `x11-xcb`, `xcb-dri2` and `xcb-aux` makes
the warnings go away and the libraries are still built without any
issues.
make[1]: Entering directory `/src/xserver-xorg-video-intel'
dh_shlibdeps -- --warnings=6
make[1]: Leaving directory `/src/xserver-xorg-video-intel'
dh_installdeb -O--builddirectory=build/
dh_xsf_substvars -O--builddirectory=build/
dh_gencontrol -O--builddirectory=build/
dpkg-gencontrol: Warnung: Feld Depends von Paket
xserver-xorg-video-intel-dbg: unbekannte Substitutionsvariable ${shlibs:Depends}
dh_md5sums -O--builddirectory=build/
dh_builddeb -O--builddirectory=build/
dpkg-deb: Paket »xserver-xorg-video-intel« wird in
»../xserver-xorg-video-intel_2.19.0-6.1_i386.deb« gebaut.
dpkg-deb: Paket »xserver-xorg-video-intel-dbg« wird in
»../xserver-xorg-video-intel-dbg_2.19.0-6.1_i386.deb« gebaut.
dpkg-genchanges -b ../xserver-xorg-video-intel_2.19.0-6.1_i386.changes
dpkg-genchanges: rein binärer Upload - es ist kein Quellcode hinzugefügt
dpkg-source --after-build xserver-xorg-video-intel
dpkg-buildpackage: Binärpaket(e) hochzuladen (keine Quellen enthalten)
Now running lintian...
W: xserver-xorg-video-intel: hardening-no-relro
usr/lib/libI810XvMC.so.1.0.0
W: xserver-xorg-video-intel: hardening-no-fortify-functions
usr/lib/libI810XvMC.so.1.0.0
W: xserver-xorg-video-intel: hardening-no-relro
usr/lib/libIntelXvMC.so.1.0.0
W: xserver-xorg-video-intel: hardening-no-fortify-functions
usr/lib/libIntelXvMC.so.1.0.0
W: xserver-xorg-video-intel: hardening-no-relro
usr/lib/xorg/modules/drivers/intel_drv.so
W: xserver-xorg-video-intel: hardening-no-fortify-functions
usr/lib/xorg/modules/drivers/intel_drv.so
N: 1 tag overridden (1 warning)
Finished running lintian.
[1]
https://buildd.debian.org/status/fetch.php?pkg=xserver-xorg-video-intelarch=i386ver=2%3A2.19.0-6stamp=1347825458
Signed-off-by: Paul Menzel paulepan...@users.sourceforge.net
---
I hope there is not a corner case where applying this patch will result
in built errors.
configure.ac |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure.ac b/configure.ac
index e6ab9d0..0652822 100644
--- a/configure.ac
+++ b/configure.ac
@@ -404,7 +404,7 @@ AC_MSG_RESULT([$DRI2])
if test $XVMC = yes; then
PKG_CHECK_MODULES(XVMCLIB,
- [xvmc dri2proto x11-xcb xcb-dri2 xcb-aux],
+ [xvmc dri2proto],
[XVMC=yes], [XVMC=no])
fi
AC_MSG_CHECKING([whether to include XvMC support])
--
1.7.10.4
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[Intel-gfx] [PATCH 00/10] [RFC v2] quick dump
This is my second attempt at winning approval for the series. First one was: https://patchwork.kernel.org/patch/1493131/ In spending the time to rework this tool, I've begun to lose my belief in some of the original motivations I had. Even if you don't want to review, but just like (or dislike) what you see, I'd appreciate such comments. One very important note: I don't know or understand the legal implications of patch 6. I'd really appreciate anyone who's dealt with the m4 extensions on non-GPL projects to comment. What's new == The primary differences this time around is I've tried to add the proper autofoo things, as well as using SWIG to get python bindings. I've left the original incantation for the script in the first few patches so people can observe the progression. (Potentially we can also drop the real patches with the SWIG interface). What it is == The goal is simply to make a tool can get register state, and one that is easy to maintain and update across many generations. I've also long theorized that having python bindings to our gpu tools could really benefit certain types of debugging. reg_access.py is an example of a simple binding which could really be helpful. Like intel_reg_dumper, supporting new generations isn't free. In order to make the tool nearly as useful as intel_reg_dumper I created the base_ files. These files were created directly from intel_reg_dumper. The idea of base_ files as well as the hackish implementation in quick_dump will likely need to change over time, for I feel that's not where the power of the tool lies. How to use it = reg_access.py provides register reading capabilities out of the box. You can either run it as an app: sudo ./reg_access.py 0x20c0 0x8080 or directly from python interpreter: import reg_access as reg reg.init() True hex(reg.read(0x20c0)) '0x8080' I'll leave all the options up to readers of the code, but here are some useful examples, to dump all base registers, and your current platform registers: sudo ./quick_dump.py -a to just dump platform specific registers sudo ./quick_dump.py -ab profiles can be used for specific lists of reigsters. Profiles are simply text files containing a list of other text files with interesting registers. See sandybridge|ivybridge|valleyview as examples. sudo ./quick_dump.py -b valleyview What is left The valleyview profile isn't complete. Hopefully someone with such a platform can fix it up. Jesse had given me a patch for dpio support on Valleyview. I haven't bothered to port that to the new SWIG stuff. Since his patch implied it wasn't complete anyway, I have decided not to bother putting it in this series. I probably need to slap some copyright stuff on things. There is talk that the future holds some magical XML register files, passed down to us by the omniscient designers. If that ever happens, the tool would simply change to XML parsing. -- Ben Widawsky (10): configure.ac: Fix spacing configure.ac: Add vim magic modeline quick_dump: A dump utility different than reg_dumper quick_dump: gen6 support quick_dump: gen7 support quick_dump: vlv support configure.ac: Add swig dependency quick_dump: SWIG chipset interface quick_dump: Connect libpciaccess and other utils quick_dump: Use the register access library configure.ac| 102 +-- m4/ax_pkg_swig.m4 | 135 +++ m4/ax_python_devel.m4 | 325 m4/ax_swig_python.m4| 64 +++ tools/Makefile.am | 2 + tools/quick_dump/Makefile.am| 26 +++ tools/quick_dump/base_display.txt | 197 ++ tools/quick_dump/base_interrupt.txt | 20 +++ tools/quick_dump/base_other.txt | 6 + tools/quick_dump/base_power.txt | 21 +++ tools/quick_dump/base_rings.txt | 27 +++ tools/quick_dump/chipset.i | 24 +++ tools/quick_dump/gen6_other.txt | 1 + tools/quick_dump/gen7_other.txt | 1 + tools/quick_dump/intel_chipset.c| 23 +++ tools/quick_dump/ivybridge | 1 + tools/quick_dump/quick_dump.py | 52 ++ tools/quick_dump/reg_access.py | 25 +++ tools/quick_dump/sandybridge| 1 + tools/quick_dump/valleyview | 6 + tools/quick_dump/vlv_display.txt| 84 ++ 21 files changed, 1095 insertions(+), 48 deletions(-) create mode 100644 m4/ax_pkg_swig.m4 create mode 100644 m4/ax_python_devel.m4 create mode 100644 m4/ax_swig_python.m4 create mode 100644 tools/quick_dump/Makefile.am create mode 100644 tools/quick_dump/base_display.txt create mode 100644 tools/quick_dump/base_interrupt.txt create mode 100644 tools/quick_dump/base_other.txt create mode 100644 tools/quick_dump/base_power.txt create mode 100644 tools/quick_dump/base_rings.txt create mode 100644 tools/quick_dump/chipset.i create mode 100644 tools/quick_dump/gen6_other.txt create
[Intel-gfx] [PATCH 01/10] configure.ac: Fix spacing
Almost all based on vim's config file type. It got it wrong in a few places which were fixed by hand. Signed-off-by: Ben Widawsky b...@bwidawsk.net --- configure.ac | 94 +--- 1 file changed, 46 insertions(+), 48 deletions(-) diff --git a/configure.ac b/configure.ac index 0ba7ce7..b75a9d4 100644 --- a/configure.ac +++ b/configure.ac @@ -22,9 +22,9 @@ AC_PREREQ([2.60]) AC_INIT([intel-gpu-tools], -[1.3], -[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], -[intel-gpu-tools]) + [1.3], + [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], + [intel-gpu-tools]) AC_CONFIG_SRCDIR([Makefile.am]) AC_CONFIG_HEADERS([config.h]) @@ -41,8 +41,8 @@ AM_MAINTAINER_MODE # Checks for functions, headers, structures, etc. AC_CHECK_HEADERS([termios.h]) AC_CHECK_MEMBERS([struct sysinfo.totalram],[],[],[AC_INCLUDES_DEFAULT -#include sys/sysinfo.h -]) + #include sys/sysinfo.h + ]) AC_CHECK_FUNCS([swapctl]) AC_CHECK_FUNCS([asprintf]) @@ -60,17 +60,15 @@ PKG_CHECK_MODULES(DRM, [libdrm_intel = 2.4.38 libdrm]) PKG_CHECK_MODULES(PCIACCESS, [pciaccess = 0.10]) # for dma-buf tests -AC_ARG_ENABLE(nouveau, - AS_HELP_STRING([--disable-nouveau], - [Enable use of nouveau API for prime tests (default: enabled)]), - [NOUVEAU=$enableval], [NOUVEAU=yes]) +AC_ARG_ENABLE(nouveau, AS_HELP_STRING([--disable-nouveau], + [Enable use of nouveau API for prime tests (default: enabled)]), + [NOUVEAU=$enableval], [NOUVEAU=yes]) if test x$NOUVEAU = xyes; then - PKG_CHECK_MODULES(DRM_NOUVEAU, [libdrm_nouveau = 2.4.33]) - AC_DEFINE(HAVE_NOUVEAU, 1, [Have nouveau support]) + PKG_CHECK_MODULES(DRM_NOUVEAU, [libdrm_nouveau = 2.4.33]) + AC_DEFINE(HAVE_NOUVEAU, 1, [Have nouveau support]) fi AM_CONDITIONAL(HAVE_NOUVEAU, [test x$NOUVEAU = xyes]) - # for testdisplay PKG_CHECK_MODULES(CAIRO, cairo) PKG_CHECK_MODULES(LIBUDEV, [libudev], [udev=yes], [udev=no]) @@ -84,37 +82,37 @@ PKG_CHECK_MODULES(GLIB, glib-2.0) # - # Define a configure option for the shadder debugger AC_ARG_ENABLE(shader-debugger, AS_HELP_STRING([--enable-shader-debugger], -[Enable shader debugging support [autodetected]]), -[BUILD_SHADER_DEBUGGER=$enableval], [BUILD_SHADER_DEBUGGER=auto]) + [Enable shader debugging support [autodetected]]), + [BUILD_SHADER_DEBUGGER=$enableval], [BUILD_SHADER_DEBUGGER=auto]) # Shadder debugger depends on python3, intel-genasm and objcopy if test x$BUILD_SHADER_DEBUGGER != xno; then -# Check Python 3 is installed -if test $PYTHON = : ; then - if test x$BUILD_SHADER_DEBUGGER = xyes; then - AC_MSG_ERROR([Shader debugger requested, python version 3 not found.]) - else - BUILD_SHADER_DEBUGGER=no + # Check Python 3 is installed + if test $PYTHON = : ; then + if test x$BUILD_SHADER_DEBUGGER = xyes; then + AC_MSG_ERROR([Shader debugger requested, python version 3 not found.]) + else + BUILD_SHADER_DEBUGGER=no + fi fi -fi -# Check for the Intel Chipset assembler compiler -AC_PATH_PROGS([GEN4ASM], intel-gen4asm) -if test -z $GEN4ASM ; then - if test x$BUILD_SHADER_DEBUGGER = xyes; then - AC_MSG_ERROR([Shader debugger requested, but intel-gen4asm not found.]) - else - BUILD_SHADER_DEBUGGER=no + # Check for the Intel Chipset assembler compiler + AC_PATH_PROGS([GEN4ASM], intel-gen4asm) + if test -z $GEN4ASM ; then + if test x$BUILD_SHADER_DEBUGGER = xyes; then + AC_MSG_ERROR([Shader debugger requested, but intel-gen4asm not found.]) + else + BUILD_SHADER_DEBUGGER=no + fi fi -fi -# Check for the objcopy GNU binary utiliy command -AC_PATH_PROGS([OBJCOPY], objcopy) -if test -z $OBJCOPY ; then - if test x$BUILD_SHADER_DEBUGGER = xyes; then - AC_MSG_ERROR([Shader debugger requested, but objcopy command not found.]) - else - BUILD_SHADER_DEBUGGER=no + # Check for the objcopy GNU binary utiliy command + AC_PATH_PROGS([OBJCOPY], objcopy) + if test -z $OBJCOPY ; then + if test x$BUILD_SHADER_DEBUGGER = xyes; then + AC_MSG_ERROR([Shader debugger requested, but objcopy command not found.]) + else + BUILD_SHADER_DEBUGGER=no + fi fi -fi fi AM_CONDITIONAL(BUILD_SHADER_DEBUGGER, [test x$BUILD_SHADER_DEBUGGER != xno]) @@ -125,15 +123,15 @@ XORG_TESTSET_CFLAG([THREAD_CFLAGS], [-pthread], [-mt]) AC_SUBST([THREAD_CFLAGS]) AC_CONFIG_FILES([ - Makefile -
[Intel-gfx] [PATCH 02/10] configure.ac: Add vim magic modeline
Signed-off-by: Ben Widawsky b...@bwidawsk.net --- configure.ac | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configure.ac b/configure.ac index b75a9d4..1c56fa4 100644 --- a/configure.ac +++ b/configure.ac @@ -135,3 +135,5 @@ AC_CONFIG_FILES([ debugger/system_routine/Makefile ]) AC_OUTPUT + +# vim: set ft=config ts=8 sw=8 tw=0 noet : -- 1.8.1.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/10] quick_dump: A dump utility different than reg_dumper
This is the base tool for quick dump. At it's heart, quick dump is
simply a basic text parsing thingie which plugs into intel-gpu-tools to
do something similar to intel_reg_dumper.
The format for the register definition files is very open, so it's just
something simple for now.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
configure.ac| 1 +
tools/Makefile.am | 2 +
tools/quick_dump/Makefile.am| 3 +
tools/quick_dump/base_display.txt | 197
tools/quick_dump/base_interrupt.txt | 20
tools/quick_dump/base_other.txt | 6 ++
tools/quick_dump/base_power.txt | 21
tools/quick_dump/base_rings.txt | 27 +
tools/quick_dump/quick_dump.py | 37 +++
9 files changed, 314 insertions(+)
create mode 100644 tools/quick_dump/Makefile.am
create mode 100644 tools/quick_dump/base_display.txt
create mode 100644 tools/quick_dump/base_interrupt.txt
create mode 100644 tools/quick_dump/base_other.txt
create mode 100644 tools/quick_dump/base_power.txt
create mode 100644 tools/quick_dump/base_rings.txt
create mode 100755 tools/quick_dump/quick_dump.py
diff --git a/configure.ac b/configure.ac
index 1c56fa4..7f89ee6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -131,6 +131,7 @@ AC_CONFIG_FILES([
scripts/Makefile
tests/Makefile
tools/Makefile
+tools/quick_dump/Makefile
debugger/Makefile
debugger/system_routine/Makefile
])
diff --git a/tools/Makefile.am b/tools/Makefile.am
index 71fb087..016fb89 100644
--- a/tools/Makefile.am
+++ b/tools/Makefile.am
@@ -1,3 +1,5 @@
+DIST_SUBDIRS = quick_dump
+
bin_PROGRAMS = \
intel_disable_clock_gating \
intel_audio_dump\
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
new file mode 100644
index 000..34938c8
--- /dev/null
+++ b/tools/quick_dump/Makefile.am
@@ -0,0 +1,3 @@
+EXTRA_DIST = \
+ base_display.txt base_interrupt.txt base_other.txt base_power.txt
base_rings.txt \
+ quick_dump.py
diff --git a/tools/quick_dump/base_display.txt
b/tools/quick_dump/base_display.txt
new file mode 100644
index 000..8bead7f
--- /dev/null
+++ b/tools/quick_dump/base_display.txt
@@ -0,0 +1,197 @@
+('CPU_VGACNTRL', '0x00041000', '')
+('PORT_DBG', '0x00042308', '')
+('DIGITAL_PORT_HOTPLUG_CNTRL', '0x00044030', '')
+('FDI_PLL_BIOS_0', '0x00046000', '')
+('FDI_PLL_BIOS_1', '0x00046004', '')
+('FDI_PLL_BIOS_2', '0x00046008', '')
+('DISPLAY_PORT_PLL_BIOS_0', '0x0004600c', '')
+('DISPLAY_PORT_PLL_BIOS_1', '0x00046010', '')
+('DISPLAY_PORT_PLL_BIOS_2', '0x00046014', '')
+('FDI_PLL_FREQ_CTL', '0x00046030', '')
+('BLC_PWM_CPU_CTL2', '0x00048250', '')
+('BLC_PWM_CPU_CTL', '0x00048254', '')
+('HTOTAL_A', '0x0006', '')
+('HBLANK_A', '0x00060004', '')
+('HSYNC_A', '0x00060008', '')
+('VTOTAL_A', '0x0006000c', '')
+('VBLANK_A', '0x00060010', '')
+('VSYNC_A', '0x00060014', '')
+('PIPEASRC', '0x0006001c', '')
+('VSYNCSHIFT_A', '0x00060028', '')
+('PIPEA_DATA_M1', '0x00060030', '')
+('PIPEA_DATA_N1', '0x00060034', '')
+('PIPEA_DATA_M2', '0x00060038', '')
+('PIPEA_DATA_N2', '0x0006003c', '')
+('PIPEA_LINK_M1', '0x00060040', '')
+('PIPEA_LINK_N1', '0x00060044', '')
+('PIPEA_LINK_M2', '0x00060048', '')
+('PIPEA_LINK_N2', '0x0006004c', '')
+('FDI_TXA_CTL', '0x00060100', '')
+('HTOTAL_B', '0x00061000', '')
+('HBLANK_B', '0x00061004', '')
+('HSYNC_B', '0x00061008', '')
+('VTOTAL_B', '0x0006100c', '')
+('VBLANK_B', '0x00061010', '')
+('VSYNC_B', '0x00061014', '')
+('PIPEBSRC', '0x0006101c', '')
+('VSYNCSHIFT_B', '0x00061028', '')
+('PIPEB_DATA_M1', '0x00061030', '')
+('PIPEB_DATA_N1', '0x00061034', '')
+('PIPEB_DATA_M2', '0x00061038', '')
+('PIPEB_DATA_N2', '0x0006103c', '')
+('PIPEB_LINK_M1', '0x00061040', '')
+('PIPEB_LINK_N1', '0x00061044', '')
+('PIPEB_LINK_M2', '0x00061048', '')
+('PIPEB_LINK_N2', '0x0006104c', '')
+('FDI_TXB_CTL', '0x00061100', '')
+('HTOTAL_C', '0x00062000', '')
+('HBLANK_C', '0x00062004', '')
+('HSYNC_C', '0x00062008', '')
+('VTOTAL_C', '0x0006200c', '')
+('VBLANK_C', '0x00062010', '')
+('VSYNC_C', '0x00062014', '')
+('PIPECSRC', '0x0006201c', '')
+('VSYNCSHIFT_C', '0x00062028', '')
+('PIPEC_DATA_M1', '0x00062030', '')
+('PIPEC_DATA_N1', '0x00062034', '')
+('PIPEC_DATA_M2', '0x00062038', '')
+('PIPEC_DATA_N2', '0x0006203c', '')
+('PIPEC_LINK_M1', '0x00062040', '')
+('PIPEC_LINK_N1', '0x00062044', '')
+('PIPEC_LINK_M2', '0x00062048', '')
+('PIPEC_LINK_N2', '0x0006204c', '')
+('FDI_TXC_CTL', '0x00062100', '')
+('CPU_eDP_A', '0x00064000', '')
+('PFA_WIN_POS', '0x00068070', '')
+('PFA_WIN_SIZE', '0x00068074', '')
+('PFA_CTL_1', '0x00068080', '')
+('PFA_CTL_2', '0x00068084', '')
+('PFA_CTL_3', '0x00068088', '')
+('PFA_CTL_4', '0x00068090', '')
+('PFB_WIN_POS', '0x00068870', '')
+('PFB_WIN_SIZE', '0x00068874', '')
+('PFB_CTL_1',
[Intel-gfx] [PATCH 04/10] quick_dump: gen6 support
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/Makefile.am| 1 +
tools/quick_dump/gen6_other.txt | 1 +
tools/quick_dump/sandybridge| 1 +
3 files changed, 3 insertions(+)
create mode 100644 tools/quick_dump/gen6_other.txt
create mode 100644 tools/quick_dump/sandybridge
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 34938c8..fbafdc5 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -1,3 +1,4 @@
EXTRA_DIST = \
base_display.txt base_interrupt.txt base_other.txt base_power.txt
base_rings.txt \
+ gen6_other.txt sandybridge \
quick_dump.py
diff --git a/tools/quick_dump/gen6_other.txt b/tools/quick_dump/gen6_other.txt
new file mode 100644
index 000..9aa6539
--- /dev/null
+++ b/tools/quick_dump/gen6_other.txt
@@ -0,0 +1 @@
+('GFX_MODE', '0x2520', '')
diff --git a/tools/quick_dump/sandybridge b/tools/quick_dump/sandybridge
new file mode 100644
index 000..6ece0fd
--- /dev/null
+++ b/tools/quick_dump/sandybridge
@@ -0,0 +1 @@
+gen6_other.txt
--
1.8.1.2
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[Intel-gfx] [PATCH 05/10] quick_dump: gen7 support
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/Makefile.am| 1 +
tools/quick_dump/gen7_other.txt | 1 +
tools/quick_dump/ivybridge | 1 +
3 files changed, 3 insertions(+)
create mode 100644 tools/quick_dump/gen7_other.txt
create mode 100644 tools/quick_dump/ivybridge
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index fbafdc5..0ed28fb 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -1,4 +1,5 @@
EXTRA_DIST = \
base_display.txt base_interrupt.txt base_other.txt base_power.txt
base_rings.txt \
gen6_other.txt sandybridge \
+ gen7_other.txt ivybridge \
quick_dump.py
diff --git a/tools/quick_dump/gen7_other.txt b/tools/quick_dump/gen7_other.txt
new file mode 100644
index 000..b6313a4
--- /dev/null
+++ b/tools/quick_dump/gen7_other.txt
@@ -0,0 +1 @@
+('GFX_MODE_GEN7', '0x229c', '')
diff --git a/tools/quick_dump/ivybridge b/tools/quick_dump/ivybridge
new file mode 100644
index 000..4637b42
--- /dev/null
+++ b/tools/quick_dump/ivybridge
@@ -0,0 +1 @@
+gen7_other.txt
--
1.8.1.2
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[Intel-gfx] [PATCH 06/10] quick_dump: vlv support
This patch includes a patch from Jesse which removed a bunch of VLV
registers which were useless in my original RFC.
Cc: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/Makefile.am | 1 +
tools/quick_dump/valleyview | 6 +++
tools/quick_dump/vlv_display.txt | 84
3 files changed, 91 insertions(+)
create mode 100644 tools/quick_dump/valleyview
create mode 100644 tools/quick_dump/vlv_display.txt
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 0ed28fb..a0c7083 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -2,4 +2,5 @@ EXTRA_DIST = \
base_display.txt base_interrupt.txt base_other.txt base_power.txt
base_rings.txt \
gen6_other.txt sandybridge \
gen7_other.txt ivybridge \
+ vlv_display.txt valleyview \
quick_dump.py
diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview
new file mode 100644
index 000..2669d92
--- /dev/null
+++ b/tools/quick_dump/valleyview
@@ -0,0 +1,6 @@
+vlv_display.txt
+base_interrupt.txt
+base_other.txt
+base_power.txt
+base_rings.txt
+gen7_other.txt
diff --git a/tools/quick_dump/vlv_display.txt b/tools/quick_dump/vlv_display.txt
new file mode 100644
index 000..c785670
--- /dev/null
+++ b/tools/quick_dump/vlv_display.txt
@@ -0,0 +1,84 @@
+('DPLLA_CRTL', '0x186014', '')
+('DPLBA_CRTL', '0x186018', '')
+('DPLLAMD_CRTL', '0x18601c', '')
+('DPLBAMD_CRTL', '0x186020', '')
+('RAWCLK_FREQ', '0x186024', '')
+('D_STAT', '0x186104', '')
+('DISPCLK_GATE_D', '0x186200', '')
+('DPPSR_CGDIS', '0x186204', '')
+('RAMCLK_GATE_D', '0x186210', '')
+('CPU_VGACNTRL', '0x001c1000', '')
+('HTOTAL_A', '0x001e', '')
+('HBLANK_A', '0x001e0004', '')
+('HSYNC_A', '0x001e0008', '')
+('VTOTAL_A', '0x001e000c', '')
+('VBLANK_A', '0x001e0010', '')
+('VSYNC_A', '0x001e0014', '')
+('PIPEASRC', '0x001e001c', '')
+('VSYNCSHIFT_A', '0x001e0028', '')
+('PIPEA_DATA_M1', '0x001e0030', '')
+('PIPEA_DATA_N1', '0x001e0034', '')
+('PIPEA_DATA_M2', '0x001e0038', '')
+('PIPEA_DATA_N2', '0x001e003c', '')
+('PIPEA_LINK_M1', '0x001e0040', '')
+('PIPEA_LINK_N1', '0x001e0044', '')
+('PIPEA_LINK_M2', '0x001e0048', '')
+('PIPEA_LINK_N2', '0x001e004c', '')
+('HTOTAL_B', '0x001e1000', '')
+('HBLANK_B', '0x001e1004', '')
+('HSYNC_B', '0x001e1008', '')
+('VTOTAL_B', '0x001e100c', '')
+('VBLANK_B', '0x001e1010', '')
+('VSYNC_B', '0x001e1014', '')
+('PIPEBSRC', '0x001e101c', '')
+('VSYNCSHIFT_B', '0x001e1028', '')
+('PIPEB_DATA_M1', '0x001e1030', '')
+('PIPEB_DATA_N1', '0x001e1034', '')
+('PIPEB_DATA_M2', '0x001e1038', '')
+('PIPEB_DATA_N2', '0x001e103c', '')
+('PIPEB_LINK_M1', '0x001e1040', '')
+('PIPEB_LINK_N1', '0x001e1044', '')
+('PIPEB_LINK_M2', '0x001e1048', '')
+('PIPEB_LINK_N2', '0x001e104c', '')
+('ADPA', '0x1e1100', '')
+('PORT_HOTPLUG_EN', '0x1e1110', '')
+('PORT_HOTPLUG_STAT', '0x1e1114', '')
+('SDVO_HDMIB', '0x1e1140', '')
+('SDVO_DP2', '0x1e1154', '')
+('HDMIC', '0x1e1160', '')
+('PORT_HOTPLUG_CTRL', '0x1e1164', '')
+('DP_B', '0x1e4100', '')
+('PIPEACONF', '0x001f0008', '')
+('PIPEASTAT', '0x001f0024', '')
+('DPINVGTT', '0x001f002c', '')
+('DSPARB', '0x001f0030', '')
+('FW1', '0x001f0034', '')
+('FW2', '0x001f0038', '')
+('FW3', '0x001f003c', '')
+('FW4', '0x001f0070', '')
+('FW5', '0x001f0074', '')
+('FW6', '0x001f0078', '')
+('FW7', '0x001f007c', '')
+('DDL1', '0x001f0050', '')
+('DDL2', '0x001f0052', '')
+('DSPARB2', '0x001f0060', '')
+('DSPHOWM', '0x001f0064', '')
+('DSPHOWM1', '0x001f0068', '')
+('DSPACNTR', '0x001f0180', '')
+('DSPABASE', '0x001f0184', '')
+('DSPASTRIDE', '0x001f0188', '')
+('DSPASURF', '0x001f019c', '')
+('DSPATILEOFF', '0x001f01a4', '')
+('PIPEBCONF', '0x001f1008', '')
+('PIPEBSTAT', '0x001f1024', '')
+('DSPBCNTR', '0x001f1180', '')
+('DSPBBASE', '0x001f1184', '')
+('DSPBSTRIDE', '0x001f1188', '')
+('DSPBSURF', '0x001f119c', '')
+('DSPBTILEOFF', '0x001f11a4', '')
+('PIPECCONF', '0x001f2008', '')
+('DSPCCNTR', '0x001f2180', '')
+('DSPCBASE', '0x001f2184', '')
+('DSPCSTRIDE', '0x001f2188', '')
+('DSPCSURF', '0x001f219c', '')
+('DSPCTILEOFF', '0x001f21a4', '')
--
1.8.1.2
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[Intel-gfx] [PATCH 07/10] configure.ac: Add swig dependency
As far as I can tell (and recommended to me by Matt) taking these m4 extension macros from http://www.gnu.org/software/autoconf-archive/ doesn't require the project distribute GPL. I am a bit confused from reading the license. I'd really hope someone can comment. The only other solution would be to roll my on m4 macros, or figure out a way to check that this autoconf-archive package is included from the configure.ac. Cc: Matt Turner matts...@gmail.com Signed-off-by: Ben Widawsky b...@bwidawsk.net --- configure.ac | 5 + m4/ax_pkg_swig.m4 | 135 + m4/ax_python_devel.m4 | 325 ++ m4/ax_swig_python.m4 | 64 ++ 4 files changed, 529 insertions(+) create mode 100644 m4/ax_pkg_swig.m4 create mode 100644 m4/ax_python_devel.m4 create mode 100644 m4/ax_swig_python.m4 diff --git a/configure.ac b/configure.ac index 7f89ee6..f2d76d3 100644 --- a/configure.ac +++ b/configure.ac @@ -50,6 +50,11 @@ AC_CHECK_FUNCS([asprintf]) AC_DISABLE_STATIC AC_PROG_LIBTOOL +# SWIG configuration +AX_PKG_SWIG(2.0.0, [], [ AC_MSG_ERROR([SWIG 2.0.0 or higher is required to build..]) ]) +AX_PYTHON_DEVEL([= '3.0']) +AX_SWIG_PYTHON + # Require X.Org macros 1.16 or later for XORG_TESTSET_CFLAG m4_ifndef([XORG_MACROS_VERSION], [m4_fatal([must install xorg-macros 1.16 or later before running autoconf/autogen])]) diff --git a/m4/ax_pkg_swig.m4 b/m4/ax_pkg_swig.m4 new file mode 100644 index 000..d836eec --- /dev/null +++ b/m4/ax_pkg_swig.m4 @@ -0,0 +1,135 @@ +# === +#http://www.gnu.org/software/autoconf-archive/ax_pkg_swig.html +# === +# +# SYNOPSIS +# +# AX_PKG_SWIG([major.minor.micro], [action-if-found], [action-if-not-found]) +# +# DESCRIPTION +# +# This macro searches for a SWIG installation on your system. If found, +# then SWIG is AC_SUBST'd; if not found, then $SWIG is empty. If SWIG is +# found, then SWIG_LIB is set to the SWIG library path, and AC_SUBST'd. +# +# You can use the optional first argument to check if the version of the +# available SWIG is greater than or equal to the value of the argument. It +# should have the format: N[.N[.N]] (N is a number between 0 and 999. Only +# the first N is mandatory.) If the version argument is given (e.g. +# 1.3.17), AX_PKG_SWIG checks that the swig package is this version number +# or higher. +# +# As usual, action-if-found is executed if SWIG is found, otherwise +# action-if-not-found is executed. +# +# In configure.in, use as: +# +# AX_PKG_SWIG(1.3.17, [], [ AC_MSG_ERROR([SWIG is required to build..]) ]) +# AX_SWIG_ENABLE_CXX +# AX_SWIG_MULTI_MODULE_SUPPORT +# AX_SWIG_PYTHON +# +# LICENSE +# +# Copyright (c) 2008 Sebastian Huber sebastian-hu...@web.de +# Copyright (c) 2008 Alan W. Irwin +# Copyright (c) 2008 Rafael Laboissiere raf...@laboissiere.net +# Copyright (c) 2008 Andrew Collier +# Copyright (c) 2011 Murray Cumming murr...@openismus.com +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 2 of the License, or (at your +# option) any later version. +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General +# Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program. If not, see http://www.gnu.org/licenses/. +# +# As a special exception, the respective Autoconf Macro's copyright owner +# gives unlimited permission to copy, distribute and modify the configure +# scripts that are the output of Autoconf when processing the Macro. You +# need not follow the terms of the GNU General Public License when using +# or distributing such scripts, even though portions of the text of the +# Macro appear in them. The GNU General Public License (GPL) does govern +# all other use of the material that constitutes the Autoconf Macro. +# +# This special exception to the GPL applies to versions of the Autoconf +# Macro released by the Autoconf Archive. When you make and distribute a +# modified version of the Autoconf Macro, you may extend this special +# exception to the GPL to apply to your modified version as well. + +#serial 11 + +AC_DEFUN([AX_PKG_SWIG],[ +# Ubuntu has swig 2.0 as /usr/bin/swig2.0 +AC_PATH_PROGS([SWIG],[swig swig2.0]) +if test -z $SWIG ; then +m4_ifval([$3],[$3],[:]) +elif test -n $1 ; then +AC_MSG_CHECKING([SWIG version]) +[swig_version=`$SWIG -version 21 | grep 'SWIG Version' | sed
[Intel-gfx] [PATCH 08/10] quick_dump: SWIG chipset interface
This isn't strictly necessary it would have been easy enough to simply
convert intel_chipset.h but this should be nice prep work for directly
doing MMIO. It also serves as a nice review point.
It's demonstrated with an autodetect function in the script. That
autodetect has a hardcoded path that shouldn't be there, but it will go
away in the next patch when we can properly link in libpciaccess.
Thanks to Matt for helping whip the automake stuff into shape.
Cc: Matt Turner matts...@gmail.com
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/Makefile.am| 2 +-
tools/quick_dump/Makefile.am | 18 +-
tools/quick_dump/chipset.i | 12
tools/quick_dump/intel_chipset.c | 16
tools/quick_dump/quick_dump.py | 15 +++
5 files changed, 61 insertions(+), 2 deletions(-)
create mode 100644 tools/quick_dump/chipset.i
create mode 100644 tools/quick_dump/intel_chipset.c
diff --git a/tools/Makefile.am b/tools/Makefile.am
index 016fb89..6088919 100644
--- a/tools/Makefile.am
+++ b/tools/Makefile.am
@@ -1,4 +1,4 @@
-DIST_SUBDIRS = quick_dump
+SUBDIRS = quick_dump
bin_PROGRAMS = \
intel_disable_clock_gating \
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index a0c7083..6c04dd5 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -1,6 +1,22 @@
+BUILT_SOURCES = chipset_wrap_python.c
+
+bin_SCRIPTS = quick_dump.py chipset.py
+
+lib_LTLIBRARIES = I915ChipsetPython.la
+I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS)
+I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS)
+I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c
+
+chipset_wrap_python.c: chipset.i
+ $(SWIG) $(AX_SWIG_PYTHON_OPT) -I$(top_srcdir)/lib -o $@ $
+
+all-local: I915ChipsetPython.la
+ $(LN_S) -f .libs/I915ChipsetPython.so _chipset.so
+
+CLEANFILES = chipset_wrap_python.c chipset.py _chipset.so
EXTRA_DIST = \
base_display.txt base_interrupt.txt base_other.txt base_power.txt
base_rings.txt \
gen6_other.txt sandybridge \
gen7_other.txt ivybridge \
vlv_display.txt valleyview \
- quick_dump.py
+ chipset.i quick_dump.py chipset.py
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
new file mode 100644
index 000..16c4932
--- /dev/null
+++ b/tools/quick_dump/chipset.i
@@ -0,0 +1,12 @@
+%module chipset
+%{
+#include intel_chipset.h
+extern int is_sandybridge(unsigned short pciid);
+extern int is_ivybridge(unsigned short pciid);
+extern int is_valleyview(unsigned short pciid);
+%}
+
+%include intel_chipset.h
+extern int is_sandybridge(unsigned short pciid);
+extern int is_ivybridge(unsigned short pciid);
+extern int is_valleyview(unsigned short pciid);
diff --git a/tools/quick_dump/intel_chipset.c b/tools/quick_dump/intel_chipset.c
new file mode 100644
index 000..b242ffc
--- /dev/null
+++ b/tools/quick_dump/intel_chipset.c
@@ -0,0 +1,16 @@
+#include intel_chipset.h
+
+int is_sandybridge(unsigned short pciid)
+{
+ return IS_GEN6(pciid);
+}
+
+int is_ivybridge(unsigned short pciid)
+{
+ return IS_IVYBRIDGE(pciid);
+}
+
+int is_valleyview(unsigned short pciid)
+{
+ return IS_VALLEYVIEW(pciid);
+}
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index 3fea7bb..59cae1f 100755
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/quick_dump.py
@@ -5,6 +5,7 @@ import os
import sys
import ast
import subprocess
+import chipset
def parse_file(file):
for line in file:
@@ -18,6 +19,7 @@ def parse_file(file):
parser = argparse.ArgumentParser(description='Dumb register dumper.')
parser.add_argument('-b', '--baseless', action='store_true', default=False,
help='baseless mode, ignore files starting with base_')
+parser.add_argument('-a', '--autodetect', action='store_true', default=False,
help='autodetect chipset')
parser.add_argument('profile', nargs='?', type=argparse.FileType('r'),
default=None)
args = parser.parse_args()
@@ -29,6 +31,19 @@ if args.baseless == False:
file = open(name.rstrip(), 'r')
parse_file(file)
+if args.autodetect:
+ sysfs_file = open('/sys/class/drm/card0/device/device', 'r')
+ devid_str = sysfs_file.read()
+ devid = int(devid_str, 16)
+ if chipset.is_sandybridge(devid):
+ args.profile = open('sandybridge', 'r')
+ elif chipset.is_ivybridge(devid):
+ args.profile = open('ivybridge', 'r')
+ elif chipset.is_valleyview(devid):
+ args.profile = open('valleyview', 'r')
+ else:
+ print(Autodetect of %x + devid + failed)
+
if args.profile == None:
sys.exit()
--
1.8.1.2
___
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[Intel-gfx] [PATCH 09/10] quick_dump: Connect libpciaccess and other utils
Make a register access library with sample to do register reads
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/Makefile.am | 14 +-
tools/quick_dump/chipset.i | 16 ++--
tools/quick_dump/intel_chipset.c | 7 +++
tools/quick_dump/quick_dump.py | 5 ++---
tools/quick_dump/reg_access.py | 25 +
5 files changed, 57 insertions(+), 10 deletions(-)
create mode 100755 tools/quick_dump/reg_access.py
diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am
index 6c04dd5..4711830 100644
--- a/tools/quick_dump/Makefile.am
+++ b/tools/quick_dump/Makefile.am
@@ -1,14 +1,18 @@
BUILT_SOURCES = chipset_wrap_python.c
-bin_SCRIPTS = quick_dump.py chipset.py
+bin_SCRIPTS = quick_dump.py chipset.py reg_access.py
lib_LTLIBRARIES = I915ChipsetPython.la
-I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS)
-I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS)
-I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c
+I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS) $(CFLAGS)
-I/usr/include/libdrm/
+I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS)
-lpciaccess
+I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c \
+ ../../lib/intel_drm.c \
+ ../../lib/intel_pci.c \
+ ../../lib/intel_reg_map.c \
+ ../../lib/intel_mmio.c
chipset_wrap_python.c: chipset.i
- $(SWIG) $(AX_SWIG_PYTHON_OPT) -I$(top_srcdir)/lib -o $@ $
+ $(SWIG) $(AX_SWIG_PYTHON_OPT) -I/usr/include -I$(top_srcdir)/lib -o $@
$
all-local: I915ChipsetPython.la
$(LN_S) -f .libs/I915ChipsetPython.so _chipset.so
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index 16c4932..2f4f5ef 100644
--- a/tools/quick_dump/chipset.i
+++ b/tools/quick_dump/chipset.i
@@ -1,12 +1,24 @@
-%module chipset
+%module chipset
+%include stdint.i
%{
+#include pciaccess.h
+#include stdint.h
#include intel_chipset.h
extern int is_sandybridge(unsigned short pciid);
extern int is_ivybridge(unsigned short pciid);
extern int is_valleyview(unsigned short pciid);
+extern struct pci_device *intel_get_pci_device();
+extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
+extern uint32_t intel_register_read(uint32_t reg);
+extern void intel_register_access_fini();
+extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
%}
-%include intel_chipset.h
extern int is_sandybridge(unsigned short pciid);
extern int is_ivybridge(unsigned short pciid);
extern int is_valleyview(unsigned short pciid);
+extern struct pci_device *intel_get_pci_device();
+extern int intel_register_access_init(struct pci_device *pci_dev, int safe);
+extern uint32_t intel_register_read(uint32_t reg);
+extern void intel_register_access_fini();
+extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
diff --git a/tools/quick_dump/intel_chipset.c b/tools/quick_dump/intel_chipset.c
index b242ffc..d6e7f91 100644
--- a/tools/quick_dump/intel_chipset.c
+++ b/tools/quick_dump/intel_chipset.c
@@ -1,3 +1,4 @@
+#include pciaccess.h
#include intel_chipset.h
int is_sandybridge(unsigned short pciid)
@@ -14,3 +15,9 @@ int is_valleyview(unsigned short pciid)
{
return IS_VALLEYVIEW(pciid);
}
+
+/* Simple helper because I couldn't make this work in the script */
+unsigned short pcidev_to_devid(struct pci_device *pdev)
+{
+ return pdev-device_id;
+}
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index 59cae1f..44aa2ba 100755
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/quick_dump.py
@@ -32,9 +32,8 @@ if args.baseless == False:
parse_file(file)
if args.autodetect:
- sysfs_file = open('/sys/class/drm/card0/device/device', 'r')
- devid_str = sysfs_file.read()
- devid = int(devid_str, 16)
+ pci_dev = chipset.intel_get_pci_device()
+ devid = chipset.pcidev_to_devid(pci_dev)
if chipset.is_sandybridge(devid):
args.profile = open('sandybridge', 'r')
elif chipset.is_ivybridge(devid):
diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
new file mode 100755
index 000..0f63424
--- /dev/null
+++ b/tools/quick_dump/reg_access.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python3
+import chipset
+
+def read(reg):
+ reg = int(reg, 16)
+ val = chipset.intel_register_read(reg)
+ return val
+
+def init():
+ pci_dev = chipset.intel_get_pci_device()
+ ret = chipset.intel_register_access_init(pci_dev, 0)
+ if ret != 0:
+ print(Register access init failed);
+ return False
+ return True
+
+if __name__ == __main__:
+ import sys
+
+ if init() == False:
+ sys.exit()
+
+ reg =
[Intel-gfx] [PATCH 10/10] quick_dump: Use the register access library
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
tools/quick_dump/quick_dump.py | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index 44aa2ba..5c88ef1 100755
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/quick_dump.py
@@ -6,15 +6,13 @@ import sys
import ast
import subprocess
import chipset
+import reg_access as reg
def parse_file(file):
for line in file:
register = ast.literal_eval(line)
- value = subprocess.check_output([../intel_reg_read,
register[1]])
- value = value.decode('UTF-8') # convert the byte array to string
- value = value.rstrip() #dump the newline
- value = value.split(':') #output is 'addr : offset'
- print(value[0], (, register[0], ), value[1])
+ val = reg.read(register[1])
+ print(register[1], (, register[0], ), hex(val))
parser = argparse.ArgumentParser(description='Dumb register dumper.')
@@ -23,6 +21,9 @@ parser.add_argument('-a', '--autodetect',
action='store_true', default=False, he
parser.add_argument('profile', nargs='?', type=argparse.FileType('r'),
default=None)
args = parser.parse_args()
+if reg.init() == False:
+ sys.exit()
+
#parse anything named base_ these are assumed to apply for all gens.
if args.baseless == False:
for root, dirs, files in os.walk('.'):
--
1.8.1.2
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