Re: [Intel-gfx] [PATCH i-g-t v2 11/14] lib/igt_kms: Remove igt_crtc_set_background()

[Mika Kahola]

Reviewed-by: Mika Kahola 

On Thu, 2017-10-12 at 13:54 +0200, Maarten Lankhorst wrote:
> This can be handled by generic properties.
> 
> Signed-off-by: Maarten Lankhorst 
> ---
>  lib/igt_kms.c | 21 -
>  lib/igt_kms.h |  1 -
>  tests/kms_crtc_background_color.c | 18 +-
>  3 files changed, 9 insertions(+), 31 deletions(-)
> 
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 70b104b24f8d..9cf4b68f4191 100644
> --- a/lib/igt_kms.c
> +++ b/lib/igt_kms.c
> @@ -3227,27 +3227,6 @@ void igt_pipe_request_out_fence(igt_pipe_t
> *pipe)
>   igt_pipe_obj_set_prop_value(pipe, IGT_CRTC_OUT_FENCE_PTR,
> (ptrdiff_t)&pipe->out_fence_fd);
>  }
>  
> -/**
> - * igt_crtc_set_background:
> - * @pipe: pipe pointer to which background color to be set
> - * @background: background color value in BGR 16bpc
> - *
> - * Sets background color for requested pipe. Color value provided
> here
> - * will be actually submitted at output commit time via
> "background_color"
> - * property.
> - * For example to get red as background, set background =
> 0x.
> - */
> -void igt_crtc_set_background(igt_pipe_t *pipe, uint64_t background)
> -{
> - igt_display_t *display = pipe->display;
> -
> - LOG(display, "%s.%d: crtc_set_background(%"PRIx64")\n",
> - kmstest_pipe_name(pipe->pipe),
> - pipe->pipe, background);
> -
> - igt_pipe_obj_set_prop_value(pipe, IGT_CRTC_BACKGROUND,
> background);
> -}
> -
>  void igt_wait_for_vblank_count(int drm_fd, enum pipe pipe, int
> count)
>  {
>   drmVBlank wait_vbl;
> diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> index dbba0cd53a25..e722f0be3757 100644
> --- a/lib/igt_kms.h
> +++ b/lib/igt_kms.h
> @@ -378,7 +378,6 @@ void igt_plane_set_fence_fd(igt_plane_t *plane,
> int fence_fd);
>  void igt_plane_set_position(igt_plane_t *plane, int x, int y);
>  void igt_plane_set_size(igt_plane_t *plane, int w, int h);
>  void igt_plane_set_rotation(igt_plane_t *plane, igt_rotation_t
> rotation);
> -void igt_crtc_set_background(igt_pipe_t *pipe, uint64_t background);
>  void igt_fb_set_position(struct igt_fb *fb, igt_plane_t *plane,
>   uint32_t x, uint32_t y);
>  void igt_fb_set_size(struct igt_fb *fb, igt_plane_t *plane,
> diff --git a/tests/kms_crtc_background_color.c
> b/tests/kms_crtc_background_color.c
> index 414cc82f3e8b..6edb8de3bb24 100644
> --- a/tests/kms_crtc_background_color.c
> +++ b/tests/kms_crtc_background_color.c
> @@ -97,7 +97,7 @@ static void prepare_crtc(data_t *data, igt_output_t
> *output, enum pipe pipe,
>   igt_assert(fb_id);
>  
>   /* To make FB pixel win with background color, set alpha as
> full opaque */
> - igt_crtc_set_background(plane->pipe, pipe_background_color);
> + igt_pipe_set_prop_value(display, pipe, IGT_CRTC_BACKGROUND,
> pipe_background_color);
>   if (opaque_buffer)
>   alpha = 1.0;/* alpha 1 is fully opque */
>   else
> @@ -117,7 +117,7 @@ static void cleanup_crtc(data_t *data,
> igt_output_t *output, igt_plane_t *plane)
>  
>   igt_remove_fb(data->gfx_fd, &data->fb);
>  
> - igt_crtc_set_background(plane->pipe, BLACK64);
> + igt_pipe_obj_set_prop_value(plane->pipe,
> IGT_CRTC_BACKGROUND, BLACK64);
>   igt_plane_set_fb(plane, NULL);
>   igt_output_set_pipe(output, PIPE_ANY);
>  
> @@ -144,26 +144,26 @@ static void test_crtc_background(data_t *data)
>   /* Now set background without using a plane, i.e.,
>    * Disable the plane to let hw background color win
> blend. */
>   igt_plane_set_fb(plane, NULL);
> - igt_crtc_set_background(plane->pipe, PURPLE64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, PURPLE64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
>   /* Try few other background colors */
> - igt_crtc_set_background(plane->pipe, CYAN64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, CYAN64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
> - igt_crtc_set_background(plane->pipe, YELLOW64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, YELLOW64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
> - igt_crtc_set_background(plane->pipe, RED64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, RED64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
> - igt_crtc_set_background(plane->pipe, GREEN64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, GREEN64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
> - igt_crtc_set_background(plane->pipe, BLUE64);
> + igt_pipe_set_prop_value(display, pipe,
> IGT_CRTC_BACKGROUND, BLUE64);
>   igt_display_commit2(display, COMMIT_UNIVERSAL);
>  
> - igt_

[Intel-gfx] ✓ Fi.CI.IGT: success for tests/kms_fbcon_fbt: Report fbc_status on error (rev2)

[Patchwork]

== Series Details ==

Series: tests/kms_fbcon_fbt: Report fbc_status on error (rev2)
URL   : https://patchwork.freedesktop.org/series/32256/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-reload-inject:
dmesg-warn -> PASS   (shard-hsw) fdo#102707
Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#103038

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038

shard-hswtotal:2540 pass:1431 dwarn:0   dfail:0   fail:8   skip:1101 
time:9240s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_392/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for tests/kms_fbcon_fbt: Report fbc_status on error (rev2)

[Patchwork]

== Series Details ==

Series: tests/kms_fbcon_fbt: Report fbc_status on error (rev2)
URL   : https://patchwork.freedesktop.org/series/32256/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers before 
measuring available memory

with latest DRM-Tip kernel build CI_DRM_3268
8ddf486a3f3a drm-tip: 2017y-10m-19d-20h-21m-08s UTC integration manifest

No testlist changes.

Test gem_exec_reloc:
Subgroup basic-gtt-cpu-active:
fail   -> PASS   (fi-gdg-551) fdo#102582
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-j1900) fdo#101705

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:462s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:535s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:498s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:504s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:478s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:554s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:416s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:248s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:581s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:455s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:463s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:490s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:574s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:586s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:545s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:449s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:646s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:501s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:463s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:572s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:434s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_392/
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[Intel-gfx] [PATCH i-g-t v2] tests/kms_fbcon_fbt: Report fbc_status on error

[Gabriel Krisman Bertazi]

knowing the assertion triggered on wait_until_enabled() is not that
useful without knowing what exactly caused the failure.  It might be an
user error, like too little stolen memory by the bios, or an actual
issue in the kernel.  So, let's make life easier, particularly for the
CI, by printing the status before failing out.

Case in point:

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101718

Signed-off-by: Gabriel Krisman Bertazi 
---
 tests/kms_fbcon_fbt.c | 24 ++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/tests/kms_fbcon_fbt.c b/tests/kms_fbcon_fbt.c
index d0090912694e..8371be5612f5 100644
--- a/tests/kms_fbcon_fbt.c
+++ b/tests/kms_fbcon_fbt.c
@@ -95,6 +95,14 @@ static bool connector_can_fbc(drmModeConnectorPtr connector)
return true;
 }
 
+static void fbc_print_status(int fd)
+{
+   static char buf[128];
+
+   igt_debugfs_read(fd, "i915_fbc_status", buf);
+   igt_debug("FBC status: %s\n", buf);
+}
+
 static bool fbc_is_enabled(int fd)
 {
char buf[128];
@@ -105,7 +113,9 @@ static bool fbc_is_enabled(int fd)
 
 static bool fbc_wait_until_enabled(int fd)
 {
-   return igt_wait(fbc_is_enabled(fd), 5000, 1);
+   bool r = igt_wait(fbc_is_enabled(fd), 5000, 1);
+   fbc_print_status(fd);
+   return r;
 }
 
 typedef bool (*connector_possible_fn)(drmModeConnectorPtr connector);
@@ -160,6 +170,14 @@ static bool connector_can_psr(drmModeConnectorPtr 
connector)
return (connector->connector_type == DRM_MODE_CONNECTOR_eDP);
 }
 
+static void psr_print_status(int fd)
+{
+   static char buf[256];
+
+   igt_debugfs_read(fd, "i915_edp_psr_status", buf);
+   igt_debug("FBC status: %s\n", buf);
+}
+
 static bool psr_is_enabled(int fd)
 {
char buf[256];
@@ -170,7 +188,9 @@ static bool psr_is_enabled(int fd)
 
 static bool psr_wait_until_enabled(int fd)
 {
-   return igt_wait(psr_is_enabled(fd), 5000, 1);
+   bool r = igt_wait(psr_is_enabled(fd), 5000, 1);
+   psr_print_status(fd);
+   return r;
 }
 
 struct feature {
-- 
2.11.0

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fb-helper: Add .last_close and .output_poll_changed helpers

[Patchwork]

== Series Details ==

Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers
URL   : https://patchwork.freedesktop.org/series/32332/
State : success

== Summary ==

Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hswtotal:2540 pass:1429 dwarn:1   dfail:0   fail:9   skip:1101 
time:9197s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6117/shards.html
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Re: [Intel-gfx] [PATCH] drm/i915: Apply Wa Display #1183 on skl, kbl, and cfl.

[Rodrigo Vivi]

On Tue, Oct 17, 2017 at 07:25:46PM +, Ville Syrjälä wrote:
> On Tue, Oct 17, 2017 at 10:38:19AM -0700, Rodrigo Vivi wrote:
> > Wa Display #1183 was recently added to workaround
> > "Failures when enabling DPLL0 with eDP link rate 2.16
> > or 4.32 GHz and CD clock frequency 308.57 or 617.14 MHz
> > (CDCLK_CTL CD Frequency Select 10b or 11b) used in this
> >  enabling or in previous enabling."
> > 
> > However our code is already not following the
> > "Skylake Seqyences to Initialize Display" line by line
> > so it was really hard to map this workaround there.
> > 
> > The biggest difference is that Spec sequence expect that
> > by the time we are enabling DPLL0 we already know the
> > eDP link rate. What it is not true for us. We handle eDP
> > link rate as any other DP link rate at the modeset. With
> > only one small difference that we check a VCO when that
> > is available.
> > 
> > WARN: It seems that DPLL0 link rate was not designed to
> > change on the fly and we will probably need to find a more
> > robuts solution caching the eDP link rate somehow.
> > 
> > This Workaround was designed to minimize the impact only
> > to save the bad case with that link rates. But HW engineers
> > indicated that it should be safe to apply broadly. Although
> > they were expecting the DPLL0 link rate to be unchanged on
> > runtime.
> 
> I think the eDP link rate just refers to the VCO freq. So we should
> apparently do the w/a only if 8640 MHz is used. But I'd rather do it
> always if we can to keep the code simpler.
> 
> Our current sequence is pretty much this:
> if necessary to disable DPLL0
>   disable DPLL0
> if necessary to enable DPLL0
>   write CDLCK_CTL
>   freq_select = 2
>   decimal = whatever
>   enable DPLL0
> write CDCLK_CTL
>   freq_select = final
>   decimal = final
> 
> IIRC the first CDCLK_CTL write was put there just to make sure we start
> at the minimum CDCLK when DPLL0 is first enabled. For this w/a we
> should apparently just do that write even if DPLL0 is already enabled, 
> and change it to select 450/432 MHz instead.
> 
> As far as the divmux override goes, I wonder if we can just do this
> with two CDCLK_CTL writes, or if we really need four.
> 
> So I was thinking we'd just do this:
> if necessary to disable DPLL0
>   disable DPLL0
> write CDLCK_CTL
>   divmux_override = 1
>   freq_select = 0
>   decimal = whatever
> if necessary to enable DPLL0
>   enable DPLL0
> write CDCLK_CTL
>   freq_select = final
>   decimal = final

ok, so the code I posted do:
if necessary to disable DPLL0
disable DPLL0
if necessary to enable DPLL0
write CDLCK_CTL
freq_select = 337_308 (min)
decimal = decimal(min_cdclk)
rm-write CDLCK_CTL
divmux_override = 1
rm-write CDLCK_CTL
freq_select = 0
enable DPLL0
write CDCLK_CTL
freq_select = final
decimal = final
rm-write CDLCK_CTL
divmux_override = 0

5 writes actually to cdclk_ctl.

and ouch! I just saw we are doing a non rmw on the middle... a v2 is needed 
anyways.

Art confirmed that we need to interleave the writes...

Maybe I thought that we could avoid the first one that is the
minimun CDCLK before enabling DPLL, it seems there is no impact
on changing that before enabling it.

Also I saw that what I can avoid are the many mmio reads since
we are constructing the right "val" (just carefully to rename it
to avoid mistaking with val usage on ctrl1.

Thoughts?

> 
> Or should we even do the first CDCLK_CTL write before potentially
> disabling DPLL0? Not that we would normally do that, but in theory
> it can happen if the machine boots with the wrong DPLL0 settings.
> 
> And if we really need the four writes then I guess we'd maybe end
> up doing something like:
> if necessary to disable DPLL0
>   disable DPLL0
> read-modify-write CDLCK_CTL
>   divmux_override = 1
> write CDLCK_CTL
>   divmux_override = 1
>   freq_select = 0
>   decimal = whatever
> if necessary to enable DPLL0
>   enable DPLL0
> write CDCLK_CTL
>   divmux_override = 1
>   freq_select = final
>   decimal = final
> read-modify-write CDLCK_CTL
>   divmux_override = 0
> 
> With the DPLL0 disable potentially moved to just before DPLL0 enable.
> 
> > 
> > Cc: Arthur J Runyan 
> > Cc: Ville Syrjälä 
> > Signed-off-by: Rodrigo Vivi 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |  2 ++
> >  drivers/gpu/drm/i915/intel_cdclk.c  | 33 
> > +++--
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 10 ++
> >  3 files changed, 39 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h 
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 5f99d4d6291b..446f4b6fade1 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -6980,6 +698

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: CNL DVFS thing (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev2)
URL   : https://patchwork.freedesktop.org/series/32247/
State : success

== Summary ==

Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-C:
pass   -> DMESG-WARN (shard-hsw) fdo#102249 +1
Test kms_force_connector_basic:
Subgroup force-load-detect:
skip   -> PASS   (shard-hsw)
Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-hsw) fdo#102707

fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707

shard-hswtotal:2540 pass:1430 dwarn:2   dfail:0   fail:8   skip:1100 
time:9186s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6116/shards.html
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Re: [Intel-gfx] [PATCH 8/8] drm/i915: Adjust system agent voltage on CNL if required by DDI ports

[Rodrigo Vivi]

On Wed, Oct 18, 2017 at 08:48:25PM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> On CNL we may need to bump up the system agent voltage not only due
> to CDCLK but also when driving DDI port with a sufficiently high clock.
> To that end start tracking the minimum acceptable voltage for each crtc.
> We do the tracking via crtcs because we don't have any kind of encoder
> state. Also there's no downside to doing it this way, and it matches how
> we track cdclk requirements on account of pixel rate.
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 


Reviewed-by: Rodrigo Vivi 

Tested-by: Rodrigo Vivi 
(Although I didn't find cases where I could force a higher voltage level,
everything works well on CNL with this.)


> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  2 ++
>  drivers/gpu/drm/i915/intel_cdclk.c   | 34 +-
>  drivers/gpu/drm/i915/intel_ddi.c | 13 +
>  drivers/gpu/drm/i915/intel_display.c |  6 ++
>  drivers/gpu/drm/i915/intel_dp_mst.c  |  5 +
>  drivers/gpu/drm/i915/intel_drv.h |  6 ++
>  6 files changed, 65 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d3ac58dc275f..185711a852b0 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2415,6 +2415,8 @@ struct drm_i915_private {
>   unsigned int active_crtcs;
>   /* minimum acceptable cdclk for each pipe */
>   int min_cdclk[I915_MAX_PIPES];
> + /* minimum acceptable voltage for each pipe */
> + u8 min_voltage[I915_MAX_PIPES];
>  
>   int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
>  
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 795a18f64c4c..035c44858908 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1666,6 +1666,13 @@ static void cnl_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   mutex_unlock(&dev_priv->pcu_lock);
>  
>   intel_update_cdclk(dev_priv);
> +
> + /*
> +  * Can't read this out :( Can't rely on .get_cdclk() since it
> +  * doesn't know about DDI voltage requirements. So let's just
> +  * assume everything is as expected.
> +  */
> + dev_priv->cdclk.hw.voltage = cdclk_state->voltage;
>  }
>  
>  static int cnl_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
> @@ -1935,6 +1942,29 @@ static int intel_compute_min_cdclk(struct 
> drm_atomic_state *state)
>   return min_cdclk;
>  }
>  
> +static u8 intel_compute_min_voltage(struct intel_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + struct intel_crtc *crtc;
> + struct intel_crtc_state *crtc_state;
> + u8 min_voltage;
> + int i;
> + enum pipe pipe;
> +
> + memcpy(state->min_voltage, dev_priv->min_voltage,
> +sizeof(state->min_voltage));
> +
> + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
> + state->min_voltage[i] = crtc_state->min_voltage;
> +
> + min_voltage = 0;
> + for_each_pipe(dev_priv, pipe)
> + min_voltage = max(state->min_voltage[pipe],
> +   min_voltage);
> +
> + return min_voltage;
> +}
> +
>  static int vlv_modeset_calc_cdclk(struct drm_atomic_state *state)
>  {
>   struct drm_i915_private *dev_priv = to_i915(state->dev);
> @@ -2091,7 +2121,9 @@ static int cnl_modeset_calc_cdclk(struct 
> drm_atomic_state *state)
>  
>   intel_state->cdclk.logical.vco = vco;
>   intel_state->cdclk.logical.cdclk = cdclk;
> - intel_state->cdclk.logical.voltage = cnl_calc_voltage(cdclk);
> + intel_state->cdclk.logical.voltage =
> + max(cnl_calc_voltage(cdclk),
> + intel_compute_min_voltage(intel_state));
>  
>   if (!intel_state->active_crtcs) {
>   cdclk = cnl_calc_cdclk(0);
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> b/drivers/gpu/drm/i915/intel_ddi.c
> index adf51b328844..f02e3c2f4ad2 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2525,6 +2525,15 @@ bool intel_ddi_is_audio_enabled(struct 
> drm_i915_private *dev_priv,
>   return false;
>  }
>  
> +void intel_ddi_compute_min_voltage(struct drm_i915_private *dev_priv,
> +struct intel_crtc_state *crtc_state)
> +{
> + if (INTEL_GEN(dev_priv) >= 10 && crtc_state->port_clock > 594000)
> + crtc_state->min_voltage = 2;
> + else
> + crtc_state->min_voltage = 0;
> +}
> +
>  void intel_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
>  {
> @@ -2624,6 +2633,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
>   if (IS_GEN9_LP(dev_priv))
>   pipe_config->lane_lat_optim_mask =
>   bxt_ddi_phy_get_lane

Re: [Intel-gfx] [PATCH v2 06/10] drm/i915: Pass encoder type to cnl_ddi_vswing_sequence() explicitly

[Manasi Navare]

On Thu, Oct 19, 2017 at 01:38:06PM +0300, Ville Syrjälä wrote:
> On Wed, Oct 18, 2017 at 02:11:46PM -0700, Manasi Navare wrote:
> > On Mon, Oct 16, 2017 at 05:57:01PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > encoder->type is unreliable for DP/HDMI, so pass it in explicity into
> > > cnl_ddi_vswing_sequence(). This matches what we do for BXT.
> > >
> > 
> > I still dont get why we cant use encoder->type reliably?
> > Since if I trace back on the caller of intel_ddi_pre_enable_hdmi or
> > intel_ddi_pre_enable_dp, the caler intel_ddi_pre_enable() calls
> > either of these based on encoder->type itself.
> > So why do we explicitly need to pass encoder->type instead
> > of deriving it from encoder inside the vswing_sequenc_ functions?
> > 
> > May be I am missing something?
> 
> Currently DDI encoder->type changes at unpredicatble times whenever
> we detect a DP or HDMI sink, or force the driver to think one or the
> other is connected. Thus it can flip flop pretty much randomly at any
> time leading to hilarity if we try to drive the port in one mode but
> someone plugs in another type of sink.
> 
> I'm trying to eliminate that flip-flopping by making sure the 
> encoder->type just says "DDI", and instead we figure out the real type
> from crtc state output_types. So once I'm done (one more patch set
> after this one at least), we will not use encoder->type anymore, except
> in a very limited fashion which doesn't lead to misprogramming of the
> hardware.
>

Thanks a lot for the explanation.
That makes it loud and clear now. So right now intel_ddi_pre_enable()
still uses encoder->type to determine whether to call into
pre_enable_dp() or pre_enable_hdmi(). 
Shouldnt we change that to use crtc state output type instead as well?
Or do you plan to do in the next patch set?

Manasi

> > 
> > Manasi
> >  
> > > v2: Pass intel_encoder down to cnl_ddi_vswing_program(), and
> > > clean up the argument types while at it
> > > 
> > > Signed-off-by: Ville Syrjälä 
> > > ---
> > >  drivers/gpu/drm/i915/intel_ddi.c | 53 
> > > +++-
> > >  1 file changed, 25 insertions(+), 28 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c 
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 2d886148a653..cab72177299c 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -1920,20 +1920,21 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder 
> > > *encoder)
> > >   DP_TRAIN_VOLTAGE_SWING_MASK;
> > >  }
> > >  
> > > -static void cnl_ddi_vswing_program(struct drm_i915_private *dev_priv,
> > > - u32 level, enum port port, int type)
> > > +static void cnl_ddi_vswing_program(struct intel_encoder *encoder,
> > > +int level, enum intel_output_type type)
> > >  {
> > > - const struct cnl_ddi_buf_trans *ddi_translations = NULL;
> > > - u32 n_entries, val;
> > > - int ln;
> > > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > + enum port port = intel_ddi_get_encoder_port(encoder);
> > > + const struct cnl_ddi_buf_trans *ddi_translations;
> > > + int n_entries, ln;
> > > + u32 val;
> > >  
> > > - if (type == INTEL_OUTPUT_HDMI) {
> > > + if (type == INTEL_OUTPUT_HDMI)
> > >   ddi_translations = cnl_get_buf_trans_hdmi(dev_priv, &n_entries);
> > > - } else if (type == INTEL_OUTPUT_DP) {
> > > - ddi_translations = cnl_get_buf_trans_dp(dev_priv, &n_entries);
> > > - } else if (type == INTEL_OUTPUT_EDP) {
> > > + else if (type == INTEL_OUTPUT_EDP)
> > >   ddi_translations = cnl_get_buf_trans_edp(dev_priv, &n_entries);
> > > - }
> > > + else
> > > + ddi_translations = cnl_get_buf_trans_dp(dev_priv, &n_entries);
> > >  
> > >   if (WARN_ON(ddi_translations == NULL))
> > >   return;
> > > @@ -1986,26 +1987,22 @@ static void cnl_ddi_vswing_program(struct 
> > > drm_i915_private *dev_priv,
> > >   I915_WRITE(CNL_PORT_TX_DW7_GRP(port), val);
> > >  }
> > >  
> > > -static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder, u32 
> > > level)
> > > +static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder,
> > > + int level, enum intel_output_type type)
> > >  {
> > >   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > > - struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> > >   enum port port = intel_ddi_get_encoder_port(encoder);
> > > - int type = encoder->type;
> > > - int width = 0;
> > > - int rate = 0;
> > > + int width, rate, ln;
> > >   u32 val;
> > > - int ln = 0;
> > >  
> > > - if ((intel_dp) && (type == INTEL_OUTPUT_EDP || type == 
> > > INTEL_OUTPUT_DP)) {
> > > + if (type == INTEL_OUTPUT_HDMI) {
> > > + width = 4;
> > > + rate = 0; /* Rate is always < than 6GHz for HDMI */
> > > + } else {
> > > + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
> > > +
> > >   width 

Re: [Intel-gfx] [PATCH 7/8] drm/i915: Use cdclk_state->voltage on CNL

[Rodrigo Vivi]

On Thu, Oct 19, 2017 at 10:48:04AM +, Ville Syrjälä wrote:
> On Wed, Oct 18, 2017 at 02:50:59PM -0700, Rodrigo Vivi wrote:
> > On Wed, Oct 18, 2017 at 08:48:24PM +, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > Track the system agent voltage we request from pcode in the cdclk state
> > > on CNL. Annoyingly we can't actually read out the current value since
> > > there's no pcode command to do that, so we'll have to just assume that
> > > it worked.
> > 
> > +static u32 cnl_cur_voltage(struct drm_i915_private *dev_priv)
> > +{
> > +   u32 voltage;
> > +   sandybridge_pcode_read(dev_priv, SKL_PCODE_CDCLK_CONTROL, &voltage);
> 
> I don't think that'll work. _pcode_read() and _pcode_write() are actually
> the same thing, the only difference is whether we return the resulting value
> or not. Thus if we actually tried to do this we'd end up setting the
> voltage instead of reading it.

:(

> 
> The only way to actually read anything is for pcode to specify a
> specific read command. It's a rather unfortunate design of the
> mailbox interface :(
> 
> We should perhaps put some WARNS into the pcode read/write functions so
> that people don't accidentally use them in the wrong way.
> 
> > +   return voltage;
> > +}
> > +
> >  static void cnl_get_cdclk(struct drm_i915_private *dev_priv,
> >  struct intel_cdclk_state *cdclk_state)
> >  {
> > @@ -1486,8 +1493,7 @@ static void cnl_get_cdclk(struct drm_i915_private 
> > *dev_priv,
> >  
> > cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div);
> >  
> > +   cdclk_state->voltage = cnl_cur_voltage(dev_priv);
> >  }
> >  
> >  static void cnl_cdclk_pll_disable(struct drm_i915_private *dev_priv)
> > @@ -1594,8 +1600,7 @@ static void cnl_set_cdclk(struct drm_i915_private 
> > *dev_priv,
> >  
> > intel_update_cdclk(dev_priv);
> >  
> > +   dev_priv->cdclk.hw.voltage = cnl_cur_voltage(dev_priv);
> > 
> > 
> > > 
> > > Cc: Mika Kahola 
> > > Cc: Manasi Navare 
> > > Cc: Rodrigo Vivi 
> > > Signed-off-by: Ville Syrjälä 
> > > ---
> > >  drivers/gpu/drm/i915/intel_cdclk.c | 44 
> > > --
> > >  1 file changed, 28 insertions(+), 16 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> > > b/drivers/gpu/drm/i915/intel_cdclk.c
> > > index 1b4dcd9689da..795a18f64c4c 100644
> > > --- a/drivers/gpu/drm/i915/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> > > @@ -1505,6 +1505,19 @@ static int cnl_calc_cdclk(int min_cdclk)
> > >   return 168000;
> > >  }
> > >  
> > > +static u8 cnl_calc_voltage(int cdclk)
> > > +{
> > > + switch (cdclk) {
> > > + default:
> > > + case 168000:
> > > + return 0;
> > > + case 336000:
> > > + return 1;
> > > + case 528000:
> > > + return 2;
> > > + }
> > > +}
> > 
> > where is the port_clock taking into account?
> 
> Last patch of the series.
> 
> > 
> > > +
> > >  static void cnl_cdclk_pll_update(struct drm_i915_private *dev_priv,
> > >struct intel_cdclk_state *cdclk_state)
> > >  {
> > > @@ -1538,7 +1551,7 @@ static void cnl_get_cdclk(struct drm_i915_private 
> > > *dev_priv,
> > >   cdclk_state->cdclk = cdclk_state->ref;
> > >  
> > >   if (cdclk_state->vco == 0)
> > > - return;
> > > + goto out;
> > >  
> > >   divider = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK;
> > >  
> > > @@ -1555,6 +1568,13 @@ static void cnl_get_cdclk(struct drm_i915_private 
> > > *dev_priv,
> > >   }
> > >  
> > >   cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div);
> > > +
> > > + out:
> > > + /*
> > > +  * Can't read this out :( Let's assume it's
> > > +  * at least what the CDCLK frequency requires.
> > > +  */
> > > + cdclk_state->voltage = cnl_calc_voltage(cdclk_state->cdclk);
> > >  }
> > >  
> > >  static void cnl_cdclk_pll_disable(struct drm_i915_private *dev_priv)
> > > @@ -1595,7 +1615,7 @@ static void cnl_set_cdclk(struct drm_i915_private 
> > > *dev_priv,
> > >  {
> > >   int cdclk = cdclk_state->cdclk;
> > >   int vco = cdclk_state->vco;
> > > - u32 val, divider, pcu_ack;
> > > + u32 val, divider;
> > >   int ret;
> > >  
> > >   mutex_lock(&dev_priv->pcu_lock);
> > > @@ -1624,19 +1644,6 @@ static void cnl_set_cdclk(struct drm_i915_private 
> > > *dev_priv,
> > >   break;
> > >   }
> > >  
> > > - switch (cdclk) {
> > > - case 528000:
> > > - pcu_ack = 2;
> > > - break;
> > > - case 336000:
> > > - pcu_ack = 1;
> > > - break;
> > > - case 168000:
> > > - default:
> > > - pcu_ack = 0;
> > > - break;
> > > - }
> > > -
> > >   if (dev_priv->cdclk.hw.vco != 0 &&
> > >   dev_priv->cdclk.hw.vco != vco)
> > >   cnl_cdclk_pll_disable(dev_priv);
> > > @@ -1654,7 +1661,8 @@ static void cnl_set_cdclk(struct drm_i915_private 
> > > *dev_priv,
> > >  
> > >   /* inform PCU of the change */
> > >   mutex_lock(&dev_priv->pcu_lock);
> > > - sandybridge_pco

Re: [Intel-gfx] [PATCH 5/8] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL

[Rodrigo Vivi]

On Wed, Oct 18, 2017 at 08:48:22PM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Track the system agent voltage we request from pcode in the cdclk state
> on SKL/KBL/CFL. Annoyingly we can't actually read out the current value since
> there's no pcode command to do that, so we'll have to just assume that
> it worked.
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 40 
> +++---
>  1 file changed, 33 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 7442e9443ffa..6f7b5abe6e3f 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -789,6 +789,24 @@ static int skl_calc_cdclk(int min_cdclk, int vco)
>   }
>  }
>  
> +static u8 skl_calc_voltage(int cdclk)
> +{
> + switch (cdclk) {
> + default:
> + case 308571:
> + case 337500:
> + return 0;
> + case 45:
> + case 432000:
> + return 1;
> + case 54:
> + return 2;
> + case 617143:
> + case 675000:
> + return 3;
> + }
> +}
> +
>  static void skl_dpll0_update(struct drm_i915_private *dev_priv,
>struct intel_cdclk_state *cdclk_state)
>  {
> @@ -839,7 +857,7 @@ static void skl_get_cdclk(struct drm_i915_private 
> *dev_priv,
>   cdclk_state->cdclk = cdclk_state->ref;
>  
>   if (cdclk_state->vco == 0)
> - return;
> + goto out;

why do we need this case?

>  
>   cdctl = I915_READ(CDCLK_CTL);
>  
> @@ -880,6 +898,13 @@ static void skl_get_cdclk(struct drm_i915_private 
> *dev_priv,
>   break;
>   }
>   }
> +
> + out:
> + /*
> +  * Can't read this out :( Let's assume it's
> +  * at least what the CDCLK frequency requires.
> +  */
> + cdclk_state->voltage = skl_calc_voltage(cdclk_state->cdclk);
>  }
>  
>  /* convert from kHz to .1 fixpoint MHz with -1MHz offset */
> @@ -964,7 +989,7 @@ static void skl_set_cdclk(struct drm_i915_private 
> *dev_priv,
>  {
>   int cdclk = cdclk_state->cdclk;
>   int vco = cdclk_state->vco;
> - u32 freq_select, pcu_ack;
> + u32 freq_select;
>   int ret;
>  
>   mutex_lock(&dev_priv->pcu_lock);
> @@ -988,21 +1013,17 @@ static void skl_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   case 308571:
>   case 337500:
>   freq_select = CDCLK_FREQ_337_308;
> - pcu_ack = 0;
>   break;
>   case 45:
>   case 432000:
>   freq_select = CDCLK_FREQ_450_432;
> - pcu_ack = 1;
>   break;
>   case 54:
>   freq_select = CDCLK_FREQ_540;
> - pcu_ack = 2;
>   break;
>   case 617143:
>   case 675000:
>   freq_select = CDCLK_FREQ_675_617;
> - pcu_ack = 3;
>   break;
>   }
>  
> @@ -1018,7 +1039,8 @@ static void skl_set_cdclk(struct drm_i915_private 
> *dev_priv,
>  
>   /* inform PCU of the change */
>   mutex_lock(&dev_priv->pcu_lock);
> - sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL, pcu_ack);
> + sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> + cdclk_state->voltage);
>   mutex_unlock(&dev_priv->pcu_lock);
>  
>   intel_update_cdclk(dev_priv);
> @@ -1097,6 +1119,7 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
>   if (cdclk_state.vco == 0)
>   cdclk_state.vco = 810;
>   cdclk_state.cdclk = skl_calc_cdclk(0, cdclk_state.vco);
> + cdclk_state.voltage = skl_calc_voltage(cdclk_state.cdclk);
>  
>   skl_set_cdclk(dev_priv, &cdclk_state);
>  }
> @@ -1114,6 +1137,7 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv)
>  
>   cdclk_state.cdclk = cdclk_state.ref;
>   cdclk_state.vco = 0;
> + cdclk_state.voltage = skl_calc_voltage(cdclk_state.cdclk);
>  
>   skl_set_cdclk(dev_priv, &cdclk_state);
>  }
> @@ -1970,12 +1994,14 @@ static int skl_modeset_calc_cdclk(struct 
> drm_atomic_state *state)
>  
>   intel_state->cdclk.logical.vco = vco;
>   intel_state->cdclk.logical.cdclk = cdclk;
> + intel_state->cdclk.logical.voltage = skl_calc_voltage(cdclk);
>  
>   if (!intel_state->active_crtcs) {
>   cdclk = skl_calc_cdclk(0, vco);
>  
>   intel_state->cdclk.actual.vco = vco;
>   intel_state->cdclk.actual.cdclk = cdclk;
> + intel_state->cdclk.actual.voltage = skl_calc_voltage(cdclk);
>   } else {
>   intel_state->cdclk.actual =
>   intel_state->cdclk.logical;
> -- 
> 2.13.6
> 
___
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Intel-gfx@lists.freedesktop.org
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fb-helper: Add .last_close and .output_poll_changed helpers

[Patchwork]

== Series Details ==

Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers
URL   : https://patchwork.freedesktop.org/series/32332/
State : success

== Summary ==

Series 32332v1 drm/fb-helper: Add .last_close and .output_poll_changed helpers
https://patchwork.freedesktop.org/api/1.0/series/32332/revisions/1/mbox/

Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
Test kms_pipe_crc_basic:
Subgroup read-crc-pipe-b-frame-sequence:
notrun -> INCOMPLETE (fi-skl-6700hq)
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:451s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:530s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:494s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:489s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:472s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:551s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:418s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:581s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:445s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:493s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:572s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:547s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:242  pass:217  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:527s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:497s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:455s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:570s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:417s

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC 
integration manifest
742ccf2c2da0 staging: vboxvideo: Use drm_fb_helper_lastclose()
70c0b14c7764 drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed()
6fef91fd7667 drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed()
0e49f03da2fd drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()
344ce1a5ea30 drm/omap: Use drm_fb_helper_lastclose() and _poll_changed()
3e04ff4cbc8a drm/nouveau: Use drm_fb_helper_output_poll_changed()
c90505059e8b drm/msm: Use drm_fb_helper_lastclose() and _poll_changed()
dee1ecaeb0a4 drm/i915: Use drm_fb_helper_output_poll_changed()
8566e07a2b26 drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed()
480449dcb8c9 drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed()
b720bee357cf drm/armada: Use drm_fb_helper_lastclose() and _poll_changed()
4e12c87943f2 drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
34ce6de2b311 drm/fb-helper: Add .last_close and .output_poll_changed helpers
61ec81d147cf drm: Add drm_device->drm_fb_helper_private pointer
62d16aed8fa6 drm/fb-helper: Handle function NULL argument

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6117/
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Use cdclk_state->voltage on BDW

[Rodrigo Vivi]

On Wed, Oct 18, 2017 at 08:48:21PM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Track the system agent voltage we request from pcode in the cdclk state
> on BDW. Annoyingly we can't actually read out the current value since
> there's no pcode command to do that, so we'll have to just assume that
> it worked.
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 36 ++--
>  1 file changed, 26 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index df71667c9fd6..7442e9443ffa 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -648,6 +648,21 @@ static int bdw_calc_cdclk(int min_cdclk)
>   return 337500;
>  }
>  
> +static u8 bdw_calc_voltage(int cdclk)
> +{
> + switch (cdclk) {
> + default:
> + case 337500:
> + return 2;
> + case 45:
> + return 0;
> + case 54:
> + return 1;
> + case 675000:
> + return 3;
> + }
> +}
> +
>  static void bdw_get_cdclk(struct drm_i915_private *dev_priv,
> struct intel_cdclk_state *cdclk_state)
>  {
> @@ -666,13 +681,19 @@ static void bdw_get_cdclk(struct drm_i915_private 
> *dev_priv,
>   cdclk_state->cdclk = 337500;
>   else
>   cdclk_state->cdclk = 675000;
> +
> + /*
> +  * Can't read this out :( Let's assume it's
> +  * at least what the CDCLK frequency requires.
> +  */
> + cdclk_state->voltage = bdw_calc_voltage(cdclk_state->cdclk);
>  }
>  
>  static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
> const struct intel_cdclk_state *cdclk_state)
>  {
>   int cdclk = cdclk_state->cdclk;
> - uint32_t val, data;
> + uint32_t val;
>   int ret;
>  
>   if (WARN((I915_READ(LCPLL_CTL) &
> @@ -713,19 +734,15 @@ static void bdw_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   /* fall through */
>   case 337500:
>   val |= LCPLL_CLK_FREQ_337_5_BDW;
> - data = 2;
>   break;
>   case 45:
>   val |= LCPLL_CLK_FREQ_450;
> - data = 0;
>   break;
>   case 54:
>   val |= LCPLL_CLK_FREQ_54O_BDW;
> - data = 1;
>   break;
>   case 675000:
>   val |= LCPLL_CLK_FREQ_675_BDW;
> - data = 3;
>   break;
>   }
>  
> @@ -740,16 +757,13 @@ static void bdw_set_cdclk(struct drm_i915_private 
> *dev_priv,
>   DRM_ERROR("Switching back to LCPLL failed\n");
>  
>   mutex_lock(&dev_priv->pcu_lock);
> - sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ, data);
> + sandybridge_pcode_write(dev_priv, HSW_PCODE_DE_WRITE_FREQ_REQ,
> + cdclk_state->voltage);
>   mutex_unlock(&dev_priv->pcu_lock);
>  
>   I915_WRITE(CDCLK_FREQ, DIV_ROUND_CLOSEST(cdclk, 1000) - 1);
>  
>   intel_update_cdclk(dev_priv);
> -
> - WARN(cdclk != dev_priv->cdclk.hw.cdclk,
> -  "cdclk requested %d kHz but got %d kHz\n",
> -  cdclk, dev_priv->cdclk.hw.cdclk);

Why?

>  }
>  
>  static int skl_calc_cdclk(int min_cdclk, int vco)
> @@ -1919,11 +1933,13 @@ static int bdw_modeset_calc_cdclk(struct 
> drm_atomic_state *state)
>   cdclk = bdw_calc_cdclk(min_cdclk);
>  
>   intel_state->cdclk.logical.cdclk = cdclk;
> + intel_state->cdclk.logical.voltage = bdw_calc_voltage(cdclk);
>  
>   if (!intel_state->active_crtcs) {
>   cdclk = bdw_calc_cdclk(0);
>  
>   intel_state->cdclk.actual.cdclk = cdclk;
> + intel_state->cdclk.actual.voltage = bdw_calc_voltage(cdclk);
>   } else {
>   intel_state->cdclk.actual =
>   intel_state->cdclk.logical;
> -- 
> 2.13.6
> 
___
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Re: [Intel-gfx] [PATCH v2 3/8] drm/i915: Use cdclk_state->voltage on VLV/CHV

[Rodrigo Vivi]

On Thu, Oct 19, 2017 at 05:43:29PM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> Store the punit DSPFREQUAR value into cdclk_state->voltage on
> VLV/CHV. Since we can actually read that out from the hardware
> this can give us a bit more cross checking between the hardware
> and software state.
> 
> v2: Don't break waiting for cdclk change on VLV/CHV
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 66 
> +-
>  1 file changed, 50 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 52f8bb50..9cc4374797eb 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -437,13 +437,45 @@ static int vlv_calc_cdclk(struct drm_i915_private 
> *dev_priv, int min_cdclk)
>   return 20;
>  }
>  
> +static u8 vlv_calc_voltage(struct drm_i915_private *dev_priv, int cdclk)
> +{
> + if (IS_VALLEYVIEW(dev_priv)) {
> + if (cdclk >= 32) /* jump to highest voltage for 400MHz too 
> */
> + return 2;
> + else if (cdclk >= 27)
> + return 1;
> + else
> + return 0;
> + } else {
> + /*
> +  * Specs are full of misinformation, but testing on actual
> +  * hardware has shown that we just need to write the desired
> +  * CCK divider into the Punit register.
> +  */
> + return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
> + }
> +}
> +
>  static void vlv_get_cdclk(struct drm_i915_private *dev_priv,
> struct intel_cdclk_state *cdclk_state)
>  {
> + u32 val;
> +
>   cdclk_state->vco = vlv_get_hpll_vco(dev_priv);
>   cdclk_state->cdclk = vlv_get_cck_clock(dev_priv, "cdclk",
>  CCK_DISPLAY_CLOCK_CONTROL,
>  cdclk_state->vco);
> +
> + mutex_lock(&dev_priv->pcu_lock);
> + val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
> + mutex_unlock(&dev_priv->pcu_lock);
> +
> + if (IS_VALLEYVIEW(dev_priv))
> + cdclk_state->voltage = (val & DSPFREQGUAR_MASK) >>
> + DSPFREQGUAR_SHIFT;
> + else
> + cdclk_state->voltage = (val & DSPFREQGUAR_MASK_CHV) >>
> + DSPFREQGUAR_SHIFT_CHV;

Oh interresting that vlv is the only one where we can actually read it. :(

I was going to ask pointers to spec, but just by {vlv,chv}_set_cdclk it was
possible to verify this is right.

>  }
>  
>  static void vlv_program_pfi_credits(struct drm_i915_private *dev_priv)
> @@ -486,7 +518,19 @@ static void vlv_set_cdclk(struct drm_i915_private 
> *dev_priv,
> const struct intel_cdclk_state *cdclk_state)
>  {
>   int cdclk = cdclk_state->cdclk;
> - u32 val, cmd;
> + u32 val, cmd = cdclk_state->voltage;
> +
> + switch (cdclk) {
> + case 40:
> + case 33:
> + case 32:
> + case 27:
> + case 20:
> + break;
> + default:
> + MISSING_CASE(cdclk);
> + return;
> + }

I believe this should be in a separated patch, no?!
Seems something we were already missing anyways.

But anyways, if you decide to split or not

Reviewed-by: Rodrigo Vivi 

>  
>   /* There are cases where we can end up here with power domains
>* off and a CDCLK frequency other than the minimum, like when
> @@ -496,13 +540,6 @@ static void vlv_set_cdclk(struct drm_i915_private 
> *dev_priv,
>*/
>   intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
>  
> - if (cdclk >= 32) /* jump to highest voltage for 400MHz too */
> - cmd = 2;
> - else if (cdclk == 27)
> - cmd = 1;
> - else
> - cmd = 0;
> -
>   mutex_lock(&dev_priv->pcu_lock);
>   val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
>   val &= ~DSPFREQGUAR_MASK;
> @@ -562,7 +599,7 @@ static void chv_set_cdclk(struct drm_i915_private 
> *dev_priv,
> const struct intel_cdclk_state *cdclk_state)
>  {
>   int cdclk = cdclk_state->cdclk;
> - u32 val, cmd;
> + u32 val, cmd = cdclk_state->voltage;
>  
>   switch (cdclk) {
>   case 33:
> @@ -583,13 +620,6 @@ static void chv_set_cdclk(struct drm_i915_private 
> *dev_priv,
>*/
>   intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
>  
> - /*
> -  * Specs are full of misinformation, but testing on actual
> -  * hardware has shown that we just need to write the desired
> -  * CCK divider into the Punit register.
> -  */
> - cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
> -
>   mutex_lock(&dev_priv->pcu_lock);
>   val = vlv_punit_read(dev_priv, P

Re: [Intel-gfx] [PATCH 2/8] drm/i915: Start tracking voltage level in the cdclk state

[Rodrigo Vivi]

On Wed, Oct 18, 2017 at 08:48:19PM +, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> For CNL we'll need to start considering the port clocks when we select
> the voltage level for the system agent. To that end start tracking the
> voltage in the cdclk state (since that already has to adjust it).
> 
> Cc: Mika Kahola 
> Cc: Manasi Navare 
> Cc: Rodrigo Vivi 
> Signed-off-by: Ville Syrjälä 

Reviewed-by: Rodrigo Vivi 

> ---
>  drivers/gpu/drm/i915/i915_drv.h |  1 +
>  drivers/gpu/drm/i915/intel_cdclk.c  | 31 ---
>  drivers/gpu/drm/i915/intel_display.c|  8 
>  drivers/gpu/drm/i915/intel_drv.h|  4 +++-
>  drivers/gpu/drm/i915/intel_runtime_pm.c |  3 ++-
>  5 files changed, 34 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f01c80076c59..d3ac58dc275f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2227,6 +2227,7 @@ struct i915_oa_ops {
>  
>  struct intel_cdclk_state {
>   unsigned int cdclk, vco, ref;
> + u8 voltage;
>  };
>  
>  struct drm_i915_private {
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index 4bffd31a8924..52f8bb50 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1690,17 +1690,34 @@ void cnl_uninit_cdclk(struct drm_i915_private 
> *dev_priv)
>  }
>  
>  /**
> - * intel_cdclk_state_compare - Determine if two CDCLK states differ
> + * intel_cdclk_needs_modeset - Determine if two CDCLK states require a 
> modeset on all pipes
>   * @a: first CDCLK state
>   * @b: second CDCLK state
>   *
>   * Returns:
> - * True if the CDCLK states are identical, false if they differ.
> + * True if the CDCLK states require pipes to be off during reprogramming, 
> false if not.
>   */
> -bool intel_cdclk_state_compare(const struct intel_cdclk_state *a,
> +bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
>  const struct intel_cdclk_state *b)
>  {
> - return memcmp(a, b, sizeof(*a)) == 0;
> + return a->cdclk != b->cdclk ||
> + a->vco != b->vco ||
> + a->ref != b->ref;
> +}
> +
> +/**
> + * intel_cdclk_changed - Determine if two CDCLK states are different
> + * @a: first CDCLK state
> + * @b: second CDCLK state
> + *
> + * Returns:
> + * True if the CDCLK states don't match, false if they do.
> + */
> +bool intel_cdclk_changed(const struct intel_cdclk_state *a,
> +  const struct intel_cdclk_state *b)
> +{
> + return intel_cdclk_needs_modeset(a, b) ||
> + a->voltage != b->voltage;
>  }
>  
>  /**
> @@ -1714,15 +1731,15 @@ bool intel_cdclk_state_compare(const struct 
> intel_cdclk_state *a,
>  void intel_set_cdclk(struct drm_i915_private *dev_priv,
>const struct intel_cdclk_state *cdclk_state)
>  {
> - if (intel_cdclk_state_compare(&dev_priv->cdclk.hw, cdclk_state))
> + if (!intel_cdclk_changed(&dev_priv->cdclk.hw, cdclk_state))
>   return;
>  
>   if (WARN_ON_ONCE(!dev_priv->display.set_cdclk))
>   return;
>  
> - DRM_DEBUG_DRIVER("Changing CDCLK to %d kHz, VCO %d kHz, ref %d kHz\n",
> + DRM_DEBUG_DRIVER("Changing CDCLK to %d kHz, VCO %d kHz, ref %d kHz, 
> voltage %d\n",
>cdclk_state->cdclk, cdclk_state->vco,
> -  cdclk_state->ref);
> +  cdclk_state->ref, cdclk_state->voltage);
>  
>   dev_priv->display.set_cdclk(dev_priv, cdclk_state);
>  }
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index bd62c0a65bcd..32e7cca52da2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11946,16 +11946,16 @@ static int intel_modeset_checks(struct 
> drm_atomic_state *state)
>* holding all the crtc locks, even if we don't end up
>* touching the hardware
>*/
> - if (!intel_cdclk_state_compare(&dev_priv->cdclk.logical,
> -&intel_state->cdclk.logical)) {
> + if (intel_cdclk_changed(&dev_priv->cdclk.logical,
> + &intel_state->cdclk.logical)) {
>   ret = intel_lock_all_pipes(state);
>   if (ret < 0)
>   return ret;
>   }
>  
>   /* All pipes must be switched off while we change the cdclk. */
> - if (!intel_cdclk_state_compare(&dev_priv->cdclk.actual,
> -&intel_state->cdclk.actual)) {
> + if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,
> +   &intel_state->cdclk.actual)) {
>   ret = intel_modeset_all_pipes(state);
>   if (r

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: CNL DVFS thing (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev2)
URL   : https://patchwork.freedesktop.org/series/32247/
State : success

== Summary ==

Series 32247v2 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/

Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:438s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:451s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:529s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:496s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:494s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:497s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:480s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:569s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:418s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:576s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:449s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:426s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:435s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:486s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:457s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:489s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:571s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:585s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:541s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:442s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:654s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:526s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:495s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:456s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:567s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:417s

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC 
integration manifest
84c5e3f60750 drm/i915: Adjust system agent voltage on CNL if required by DDI 
ports
d7a8a9c662a2 drm/i915: Use cdclk_state->voltage on CNL
0bfa89acae45 drm/i915: Use cdclk_state->voltage on BXT/GLK
f558caf969be drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
ade1a80f438b drm/i915: Use cdclk_state->voltage on BDW
56387c5c30c5 drm/i915: Use cdclk_state->voltage on VLV/CHV
8cc699fdd699 drm/i915: Start tracking voltage level in the cdclk state
7f610d7180b6 drm/i915: Clean up some cdclk switch statements

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6116/
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[Intel-gfx] [PATCH 13/15] drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Mark Yao 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 9 +
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c  | 9 +
 2 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 76d63de5921d..d85431400a0d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -207,13 +207,6 @@ static void rockchip_drm_unbind(struct device *dev)
drm_dev_unref(drm_dev);
 }
 
-static void rockchip_drm_lastclose(struct drm_device *dev)
-{
-   struct rockchip_drm_private *priv = dev->dev_private;
-
-   drm_fb_helper_restore_fbdev_mode_unlocked(&priv->fbdev_helper);
-}
-
 static const struct file_operations rockchip_drm_driver_fops = {
.owner = THIS_MODULE,
.open = drm_open,
@@ -228,7 +221,7 @@ static const struct file_operations 
rockchip_drm_driver_fops = {
 static struct drm_driver rockchip_drm_driver = {
.driver_features= DRIVER_MODESET | DRIVER_GEM |
  DRIVER_PRIME | DRIVER_ATOMIC,
-   .lastclose  = rockchip_drm_lastclose,
+   .lastclose  = drm_fb_helper_lastclose,
.gem_vm_ops = &drm_gem_cma_vm_ops,
.gem_free_object_unlocked = rockchip_gem_free_object,
.dumb_create= rockchip_gem_dumb_create,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index cd2ace0c3caa..e266539e04e5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -167,20 +167,13 @@ rockchip_user_fb_create(struct drm_device *dev, struct 
drm_file *file_priv,
return ERR_PTR(ret);
 }
 
-static void rockchip_drm_output_poll_changed(struct drm_device *dev)
-{
-   struct rockchip_drm_private *private = dev->dev_private;
-
-   drm_fb_helper_hotplug_event(&private->fbdev_helper);
-}
-
 static const struct drm_mode_config_helper_funcs rockchip_mode_config_helpers 
= {
.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
 };
 
 static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = {
.fb_create = rockchip_user_fb_create,
-   .output_poll_changed = rockchip_drm_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
 };
-- 
2.14.2

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[Intel-gfx] [PATCH 12/15] drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Alex Deucher 
Cc: "Christian König" 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/radeon/radeon_display.c |  9 ++---
 drivers/gpu/drm/radeon/radeon_fb.c  | 22 --
 drivers/gpu/drm/radeon/radeon_kms.c |  5 ++---
 drivers/gpu/drm/radeon/radeon_mode.h|  3 ---
 4 files changed, 4 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_display.c 
b/drivers/gpu/drm/radeon/radeon_display.c
index ddfe91efa61e..dfda5e0ed166 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -32,6 +32,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -1362,15 +1363,9 @@ radeon_user_framebuffer_create(struct drm_device *dev,
return &radeon_fb->base;
 }
 
-static void radeon_output_poll_changed(struct drm_device *dev)
-{
-   struct radeon_device *rdev = dev->dev_private;
-   radeon_fb_output_poll_changed(rdev);
-}
-
 static const struct drm_mode_config_funcs radeon_mode_funcs = {
.fb_create = radeon_user_framebuffer_create,
-   .output_poll_changed = radeon_output_poll_changed
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
 };
 
 static const struct drm_prop_enum_list radeon_tmds_pll_enum_list[] =
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c 
b/drivers/gpu/drm/radeon/radeon_fb.c
index 2fcf805d3a16..8a582af52073 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -307,12 +307,6 @@ static int radeonfb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-void radeon_fb_output_poll_changed(struct radeon_device *rdev)
-{
-   if (rdev->mode_info.rfbdev)
-   drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
-}
-
 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev 
*rfbdev)
 {
struct radeon_framebuffer *rfb = &rfbdev->rfb;
@@ -423,19 +417,3 @@ void radeon_fb_remove_connector(struct radeon_device 
*rdev, struct drm_connector
if (rdev->mode_info.rfbdev)

drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
 }
-
-void radeon_fbdev_restore_mode(struct radeon_device *rdev)
-{
-   struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev;
-   struct drm_fb_helper *fb_helper;
-   int ret;
-
-   if (!rfbdev)
-   return;
-
-   fb_helper = &rfbdev->helper;
-
-   ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
-   if (ret)
-   DRM_DEBUG("failed to restore crtc mode\n");
-}
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c 
b/drivers/gpu/drm/radeon/radeon_kms.c
index dfee8f7d94ae..e4c1bb8c21fa 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -26,6 +26,7 @@
  *  Jerome Glisse
  */
 #include 
+#include 
 #include "radeon.h"
 #include 
 #include "radeon_asic.h"
@@ -636,9 +637,7 @@ static int radeon_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
  */
 void radeon_driver_lastclose_kms(struct drm_device *dev)
 {
-   struct radeon_device *rdev = dev->dev_private;
-
-   radeon_fbdev_restore_mode(rdev);
+   drm_fb_helper_lastclose(dev);
vga_switcheroo_process_delayed_switch();
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h 
b/drivers/gpu/drm/radeon/radeon_mode.h
index da44ac234f64..567156a7beae 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -988,9 +988,6 @@ int radeon_fbdev_init(struct radeon_device *rdev);
 void radeon_fbdev_fini(struct radeon_device *rdev);
 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo 
*robj);
-void radeon_fbdev_restore_mode(struct radeon_device *rdev);
-
-void radeon_fb_output_poll_changed(struct radeon_device *rdev);
 
 void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
 
-- 
2.14.2

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[Intel-gfx] [PATCH 14/15] drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Thierry Reding 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/tegra/drm.c | 13 ++---
 drivers/gpu/drm/tegra/drm.h |  4 
 drivers/gpu/drm/tegra/fb.c  | 14 --
 3 files changed, 2 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 597d563d636a..73bca7ac1271 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -120,7 +120,7 @@ static int tegra_atomic_commit(struct drm_device *drm,
 static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
.fb_create = tegra_fb_create,
 #ifdef CONFIG_DRM_FBDEV_EMULATION
-   .output_poll_changed = tegra_fb_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
 #endif
.atomic_check = drm_atomic_helper_check,
.atomic_commit = tegra_atomic_commit,
@@ -287,15 +287,6 @@ static void tegra_drm_context_free(struct 
tegra_drm_context *context)
kfree(context);
 }
 
-static void tegra_drm_lastclose(struct drm_device *drm)
-{
-#ifdef CONFIG_DRM_FBDEV_EMULATION
-   struct tegra_drm *tegra = drm->dev_private;
-
-   tegra_fbdev_restore_mode(tegra->fbdev);
-#endif
-}
-
 static struct host1x_bo *
 host1x_bo_lookup(struct drm_file *file, u32 handle)
 {
@@ -1100,7 +1091,7 @@ static struct drm_driver tegra_drm_driver = {
.unload = tegra_drm_unload,
.open = tegra_drm_open,
.postclose = tegra_drm_postclose,
-   .lastclose = tegra_drm_lastclose,
+   .lastclose = drm_fb_helper_lastclose,
 
 #if defined(CONFIG_DEBUG_FS)
.debugfs_init = tegra_debugfs_init,
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index 063f5d397526..55b6aff25b9b 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -290,10 +290,6 @@ int tegra_drm_fb_init(struct drm_device *drm);
 void tegra_drm_fb_exit(struct drm_device *drm);
 void tegra_drm_fb_suspend(struct drm_device *drm);
 void tegra_drm_fb_resume(struct drm_device *drm);
-#ifdef CONFIG_DRM_FBDEV_EMULATION
-void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
-void tegra_fb_output_poll_changed(struct drm_device *drm);
-#endif
 
 extern struct platform_driver tegra_dc_driver;
 extern struct platform_driver tegra_hdmi_driver;
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index 80540c1c66dc..8dfe3c6c217e 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -361,20 +361,6 @@ static void tegra_fbdev_exit(struct tegra_fbdev *fbdev)
drm_fb_helper_fini(&fbdev->base);
tegra_fbdev_free(fbdev);
 }
-
-void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev)
-{
-   if (fbdev)
-   drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->base);
-}
-
-void tegra_fb_output_poll_changed(struct drm_device *drm)
-{
-   struct tegra_drm *tegra = drm->dev_private;
-
-   if (tegra->fbdev)
-   drm_fb_helper_hotplug_event(&tegra->fbdev->base);
-}
 #endif
 
 int tegra_drm_fb_prepare(struct drm_device *drm)
-- 
2.14.2

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[Intel-gfx] [PATCH 11/15] drm/omap: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Tomi Valkeinen 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/omapdrm/omap_drv.c | 34 ++
 1 file changed, 2 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c 
b/drivers/gpu/drm/omapdrm/omap_drv.c
index cdf5b0601eba..96857c508ee0 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -46,14 +46,6 @@
  * devices
  */
 
-static void omap_fb_output_poll_changed(struct drm_device *dev)
-{
-   struct omap_drm_private *priv = dev->dev_private;
-   DBG("dev=%p", dev);
-   if (priv->fbdev)
-   drm_fb_helper_hotplug_event(priv->fbdev);
-}
-
 static void omap_atomic_wait_for_completion(struct drm_device *dev,
struct drm_atomic_state *old_state)
 {
@@ -132,7 +124,7 @@ static const struct drm_mode_config_helper_funcs 
omap_mode_config_helper_funcs =
 
 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
.fb_create = omap_framebuffer_create,
-   .output_poll_changed = omap_fb_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
 };
@@ -467,28 +459,6 @@ static int dev_open(struct drm_device *dev, struct 
drm_file *file)
return 0;
 }
 
-/**
- * lastclose - clean up after all DRM clients have exited
- * @dev: DRM device
- *
- * Take care of cleaning up after all DRM clients have exited.  In the
- * mode setting case, we want to restore the kernel's initial mode (just
- * in case the last client left us in a bad state).
- */
-static void dev_lastclose(struct drm_device *dev)
-{
-   struct omap_drm_private *priv = dev->dev_private;
-   int ret;
-
-   DBG("lastclose: dev=%p", dev);
-
-   if (priv->fbdev) {
-   ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
-   if (ret)
-   DBG("failed to restore crtc mode");
-   }
-}
-
 static const struct vm_operations_struct omap_gem_vm_ops = {
.fault = omap_gem_fault,
.open = drm_gem_vm_open,
@@ -511,7 +481,7 @@ static struct drm_driver omap_drm_driver = {
.driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
DRIVER_ATOMIC | DRIVER_RENDER,
.open = dev_open,
-   .lastclose = dev_lastclose,
+   .lastclose = drm_fb_helper_lastclose,
 #ifdef CONFIG_DEBUG_FS
.debugfs_init = omap_debugfs_init,
 #endif
-- 
2.14.2

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[Intel-gfx] [PATCH 15/15] staging: vboxvideo: Use drm_fb_helper_lastclose()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.

Cc: Hans de Goede 
Signed-off-by: Noralf Trønnes 
---
 drivers/staging/vboxvideo/vbox_drv.c  |  2 +-
 drivers/staging/vboxvideo/vbox_drv.h  |  1 -
 drivers/staging/vboxvideo/vbox_main.c | 12 
 3 files changed, 1 insertion(+), 14 deletions(-)

diff --git a/drivers/staging/vboxvideo/vbox_drv.c 
b/drivers/staging/vboxvideo/vbox_drv.c
index e18642e5027e..a4d8d7898e3d 100644
--- a/drivers/staging/vboxvideo/vbox_drv.c
+++ b/drivers/staging/vboxvideo/vbox_drv.c
@@ -229,7 +229,7 @@ static struct drm_driver driver = {
 
.load = vbox_driver_load,
.unload = vbox_driver_unload,
-   .lastclose = vbox_driver_lastclose,
+   .lastclose = drm_fb_helper_lastclose,
.master_set = vbox_master_set,
.master_drop = vbox_master_drop,
 
diff --git a/drivers/staging/vboxvideo/vbox_drv.h 
b/drivers/staging/vboxvideo/vbox_drv.h
index 4b9302703b36..7273d7e9bc9b 100644
--- a/drivers/staging/vboxvideo/vbox_drv.h
+++ b/drivers/staging/vboxvideo/vbox_drv.h
@@ -128,7 +128,6 @@ struct vbox_private {
 
 int vbox_driver_load(struct drm_device *dev, unsigned long flags);
 void vbox_driver_unload(struct drm_device *dev);
-void vbox_driver_lastclose(struct drm_device *dev);
 
 struct vbox_gem_object;
 
diff --git a/drivers/staging/vboxvideo/vbox_main.c 
b/drivers/staging/vboxvideo/vbox_main.c
index 80bd039fa08e..c3d756620fd5 100644
--- a/drivers/staging/vboxvideo/vbox_main.c
+++ b/drivers/staging/vboxvideo/vbox_main.c
@@ -421,18 +421,6 @@ void vbox_driver_unload(struct drm_device *dev)
vbox_hw_fini(vbox);
 }
 
-/**
- * @note this is described in the DRM framework documentation.  AST does not
- * have it, but we get an oops on driver unload if it is not present.
- */
-void vbox_driver_lastclose(struct drm_device *dev)
-{
-   struct vbox_private *vbox = dev->dev_private;
-
-   if (vbox->fbdev)
-   drm_fb_helper_restore_fbdev_mode_unlocked(&vbox->fbdev->helper);
-}
-
 int vbox_gem_create(struct drm_device *dev,
u32 size, bool iskernel, struct drm_gem_object **obj)
 {
-- 
2.14.2

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[Intel-gfx] [PATCH 10/15] drm/nouveau: Use drm_fb_helper_output_poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_output_poll_changed() instead of
its own nouveau_fbcon_output_poll_changed().

Cc: Ben Skeggs 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/nouveau/nouveau_display.c | 3 ++-
 drivers/gpu/drm/nouveau/nouveau_fbcon.c   | 8 
 drivers/gpu/drm/nouveau/nouveau_fbcon.h   | 2 --
 drivers/gpu/drm/nouveau/nouveau_vga.c | 3 ++-
 drivers/gpu/drm/nouveau/nv50_display.c| 2 +-
 5 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c 
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 2e7785f49e6d..009713404cc4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -292,7 +293,7 @@ nouveau_user_framebuffer_create(struct drm_device *dev,
 
 static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
.fb_create = nouveau_user_framebuffer_create,
-   .output_poll_changed = nouveau_fbcon_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
 };
 
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c 
b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index f7707849bb53..60ca03c27ec4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -411,14 +411,6 @@ nouveau_fbcon_create(struct drm_fb_helper *helper,
return ret;
 }
 
-void
-nouveau_fbcon_output_poll_changed(struct drm_device *dev)
-{
-   struct nouveau_drm *drm = nouveau_drm(dev);
-   if (drm->fbcon)
-   drm_fb_helper_hotplug_event(&drm->fbcon->helper);
-}
-
 static int
 nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *fbcon)
 {
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h 
b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index e2bca729721e..a6f192ea3fa6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -68,8 +68,6 @@ void nouveau_fbcon_set_suspend(struct drm_device *dev, int 
state);
 void nouveau_fbcon_accel_save_disable(struct drm_device *dev);
 void nouveau_fbcon_accel_restore(struct drm_device *dev);
 
-void nouveau_fbcon_output_poll_changed(struct drm_device *dev);
-
 extern int nouveau_nofbaccel;
 
 #endif /* __NV50_FBCON_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_vga.c 
b/drivers/gpu/drm/nouveau/nouveau_vga.c
index 48393a4f6331..ac97c30c5bbd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_vga.c
+++ b/drivers/gpu/drm/nouveau/nouveau_vga.c
@@ -3,6 +3,7 @@
 
 #include 
 #include 
+#include 
 
 #include "nouveau_drv.h"
 #include "nouveau_acpi.h"
@@ -60,7 +61,7 @@ static void
 nouveau_switcheroo_reprobe(struct pci_dev *pdev)
 {
struct drm_device *dev = pci_get_drvdata(pdev);
-   nouveau_fbcon_output_poll_changed(dev);
+   drm_fb_helper_output_poll_changed(dev);
 }
 
 static bool
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 2dbf62a2ac41..5b3db08e50e4 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -4308,7 +4308,7 @@ nv50_disp_atomic_state_alloc(struct drm_device *dev)
 static const struct drm_mode_config_funcs
 nv50_disp_func = {
.fb_create = nouveau_user_framebuffer_create,
-   .output_poll_changed = nouveau_fbcon_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = nv50_disp_atomic_check,
.atomic_commit = nv50_disp_atomic_commit,
.atomic_state_alloc = nv50_disp_atomic_state_alloc,
-- 
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[Intel-gfx] [PATCH 03/15] drm/fb-helper: Add .last_close and .output_poll_changed helpers

[Noralf Trønnes]

This adds helpers for the drm_driver->last_close and the
drm_mode_config_funcs->output_poll_changed callbacks.

Signed-off-by: Noralf Trønnes 
Reviewed-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_fb_helper.c | 28 
 include/drm/drm_fb_helper.h | 11 +++
 2 files changed, 39 insertions(+)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index c07b7af8de4c..5f32c11eb0d2 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -2633,6 +2633,34 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper 
*fb_helper)
 }
 EXPORT_SYMBOL(drm_fb_helper_hotplug_event);
 
+/**
+ * drm_fb_helper_lastclose - DRM driver lastclose helper for fbdev emulation
+ * @dev: DRM device
+ *
+ * This function can be used as the &drm_driver->lastclose callback for drivers
+ * that only need to call drm_fb_helper_restore_fbdev_mode_unlocked().
+ */
+void drm_fb_helper_lastclose(struct drm_device *dev)
+{
+   drm_fb_helper_restore_fbdev_mode_unlocked(dev->drm_fb_helper_private);
+}
+EXPORT_SYMBOL(drm_fb_helper_lastclose);
+
+/**
+ * drm_fb_helper_output_poll_changed - DRM mode config \.output_poll_changed
+ * helper for fbdev emulation
+ * @dev: DRM device
+ *
+ * This function can be used as the
+ * &drm_mode_config_funcs.output_poll_changed callback for drivers that only
+ * need to call drm_fb_helper_hotplug_event().
+ */
+void drm_fb_helper_output_poll_changed(struct drm_device *dev)
+{
+   drm_fb_helper_hotplug_event(dev->drm_fb_helper_private);
+}
+EXPORT_SYMBOL(drm_fb_helper_output_poll_changed);
+
 /* The Kconfig DRM_KMS_HELPER selects FRAMEBUFFER_CONSOLE (if !EXPERT)
  * but the module doesn't depend on any fb console symbols.  At least
  * attempt to load fbcon to avoid leaving the system without a usable console.
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index 33fe95927742..877e5b395c02 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -310,6 +310,9 @@ drm_pick_cmdline_mode(struct drm_fb_helper_connector 
*fb_helper_conn);
 int drm_fb_helper_add_one_connector(struct drm_fb_helper *fb_helper, struct 
drm_connector *connector);
 int drm_fb_helper_remove_one_connector(struct drm_fb_helper *fb_helper,
   struct drm_connector *connector);
+
+void drm_fb_helper_lastclose(struct drm_device *dev);
+void drm_fb_helper_output_poll_changed(struct drm_device *dev);
 #else
 static inline void drm_fb_helper_prepare(struct drm_device *dev,
struct drm_fb_helper *helper,
@@ -507,6 +510,14 @@ drm_fb_helper_remove_one_connector(struct drm_fb_helper 
*fb_helper,
return 0;
 }
 
+static inline void drm_fb_helper_lastclose(struct drm_device *dev)
+{
+}
+
+static inline void drm_fb_helper_output_poll_changed(struct drm_device *dev)
+{
+}
+
 #endif
 
 static inline int
-- 
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[Intel-gfx] [PATCH 08/15] drm/i915: Use drm_fb_helper_output_poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 drivers/gpu/drm/i915/intel_drv.h | 5 -
 drivers/gpu/drm/i915/intel_fbdev.c   | 8 
 3 files changed, 1 insertion(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index f780f39e0758..b205e2c782bb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14123,7 +14123,7 @@ static void intel_atomic_state_free(struct 
drm_atomic_state *state)
 static const struct drm_mode_config_funcs intel_mode_funcs = {
.fb_create = intel_user_framebuffer_create,
.get_format_info = intel_get_format_info,
-   .output_poll_changed = intel_fbdev_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = intel_atomic_check,
.atomic_commit = intel_atomic_commit,
.atomic_state_alloc = intel_atomic_state_alloc,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 463ed152e6b1..dfcf5ba220e8 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1607,7 +1607,6 @@ extern void intel_fbdev_initial_config_async(struct 
drm_device *dev);
 extern void intel_fbdev_unregister(struct drm_i915_private *dev_priv);
 extern void intel_fbdev_fini(struct drm_i915_private *dev_priv);
 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool 
synchronous);
-extern void intel_fbdev_output_poll_changed(struct drm_device *dev);
 extern void intel_fbdev_restore_mode(struct drm_device *dev);
 #else
 static inline int intel_fbdev_init(struct drm_device *dev)
@@ -1631,10 +1630,6 @@ static inline void intel_fbdev_set_suspend(struct 
drm_device *dev, int state, bo
 {
 }
 
-static inline void intel_fbdev_output_poll_changed(struct drm_device *dev)
-{
-}
-
 static inline void intel_fbdev_restore_mode(struct drm_device *dev)
 {
 }
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c 
b/drivers/gpu/drm/i915/intel_fbdev.c
index f2bb8116227c..35babbadfc5a 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -796,14 +796,6 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int 
state, bool synchronous
console_unlock();
 }
 
-void intel_fbdev_output_poll_changed(struct drm_device *dev)
-{
-   struct intel_fbdev *ifbdev = to_i915(dev)->fbdev;
-
-   if (ifbdev)
-   drm_fb_helper_hotplug_event(&ifbdev->helper);
-}
-
 void intel_fbdev_restore_mode(struct drm_device *dev)
 {
struct intel_fbdev *ifbdev = to_i915(dev)->fbdev;
-- 
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[Intel-gfx] [PATCH 07/15] drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Patrik Jakobsson 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/gma500/framebuffer.c |  9 +
 drivers/gpu/drm/gma500/psb_drv.c | 15 +--
 2 files changed, 2 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/gma500/framebuffer.c 
b/drivers/gpu/drm/gma500/framebuffer.c
index 2570c7f647a6..cb0a2ae916e0 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -576,13 +576,6 @@ static void psb_fbdev_fini(struct drm_device *dev)
dev_priv->fbdev = NULL;
 }
 
-static void psbfb_output_poll_changed(struct drm_device *dev)
-{
-   struct drm_psb_private *dev_priv = dev->dev_private;
-   struct psb_fbdev *fbdev = (struct psb_fbdev *)dev_priv->fbdev;
-   drm_fb_helper_hotplug_event(&fbdev->psb_fb_helper);
-}
-
 /**
  * psb_user_framebuffer_create_handle - add hamdle to a framebuffer
  * @fb: framebuffer
@@ -623,7 +616,7 @@ static void psb_user_framebuffer_destroy(struct 
drm_framebuffer *fb)
 
 static const struct drm_mode_config_funcs psb_mode_funcs = {
.fb_create = psb_user_framebuffer_create,
-   .output_poll_changed = psbfb_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
 };
 
 static void psb_setup_outputs(struct drm_device *dev)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index 37a3be71acd9..7ab4c532f1d4 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -107,19 +107,6 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
 static const struct drm_ioctl_desc psb_ioctls[] = {
 };
 
-static void psb_driver_lastclose(struct drm_device *dev)
-{
-   int ret;
-   struct drm_psb_private *dev_priv = dev->dev_private;
-   struct psb_fbdev *fbdev = dev_priv->fbdev;
-
-   ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
-   if (ret)
-   DRM_DEBUG("failed to restore crtc mode\n");
-
-   return;
-}
-
 static int psb_do_init(struct drm_device *dev)
 {
struct drm_psb_private *dev_priv = dev->dev_private;
@@ -479,7 +466,7 @@ static struct drm_driver driver = {
   DRIVER_MODESET | DRIVER_GEM,
.load = psb_driver_load,
.unload = psb_driver_unload,
-   .lastclose = psb_driver_lastclose,
+   .lastclose = drm_fb_helper_lastclose,
 
.num_ioctls = ARRAY_SIZE(psb_ioctls),
.irq_preinstall = psb_irq_preinstall,
-- 
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[Intel-gfx] [PATCH 01/15] drm/fb-helper: Handle function NULL argument

[Noralf Trønnes]

Make functions tolerate that the drm_fb_helper argument is NULL.
This is useful for drivers that continue probing when fbdev emulation
fails and not having to do this check themselves.
Update docs for functions that already handles this.

Signed-off-by: Noralf Trønnes 
Reviewed-by: Daniel Vetter 
---
 drivers/gpu/drm/drm_fb_helper.c | 28 +---
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 116d1f1337c7..954cdd48de92 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -150,6 +150,9 @@ int drm_fb_helper_add_one_connector(struct drm_fb_helper 
*fb_helper,
 {
int err;
 
+   if (!fb_helper)
+   return 0;
+
mutex_lock(&fb_helper->lock);
err = __drm_fb_helper_add_one_connector(fb_helper, connector);
mutex_unlock(&fb_helper->lock);
@@ -161,7 +164,7 @@ EXPORT_SYMBOL(drm_fb_helper_add_one_connector);
 /**
  * drm_fb_helper_single_add_all_connectors() - add all connectors to fbdev
  *emulation helper
- * @fb_helper: fbdev initialized with drm_fb_helper_init
+ * @fb_helper: fbdev initialized with drm_fb_helper_init, can be NULL
  *
  * This functions adds all the available connectors for use with the given
  * fb_helper. This is a separate step to allow drivers to freely assign
@@ -179,7 +182,7 @@ int drm_fb_helper_single_add_all_connectors(struct 
drm_fb_helper *fb_helper)
struct drm_connector_list_iter conn_iter;
int i, ret = 0;
 
-   if (!drm_fbdev_emulation)
+   if (!drm_fbdev_emulation || !fb_helper)
return 0;
 
mutex_lock(&fb_helper->lock);
@@ -245,6 +248,9 @@ int drm_fb_helper_remove_one_connector(struct drm_fb_helper 
*fb_helper,
 {
int err;
 
+   if (!fb_helper)
+   return 0;
+
mutex_lock(&fb_helper->lock);
err = __drm_fb_helper_remove_one_connector(fb_helper, connector);
mutex_unlock(&fb_helper->lock);
@@ -484,7 +490,7 @@ static int restore_fbdev_mode(struct drm_fb_helper 
*fb_helper)
 
 /**
  * drm_fb_helper_restore_fbdev_mode_unlocked - restore fbdev configuration
- * @fb_helper: fbcon to restore
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  *
  * This should be called from driver's drm &drm_driver.lastclose callback
  * when implementing an fbcon on top of kms using this helper. This ensures 
that
@@ -498,7 +504,7 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct 
drm_fb_helper *fb_helper)
bool do_delayed;
int ret;
 
-   if (!drm_fbdev_emulation)
+   if (!drm_fbdev_emulation || !fb_helper)
return -ENODEV;
 
if (READ_ONCE(fb_helper->deferred_setup))
@@ -883,7 +889,7 @@ EXPORT_SYMBOL(drm_fb_helper_alloc_fbi);
 
 /**
  * drm_fb_helper_unregister_fbi - unregister fb_info framebuffer device
- * @fb_helper: driver-allocated fbdev helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  *
  * A wrapper around unregister_framebuffer, to release the fb_info
  * framebuffer device. This must be called before releasing all resources for
@@ -898,7 +904,7 @@ EXPORT_SYMBOL(drm_fb_helper_unregister_fbi);
 
 /**
  * drm_fb_helper_fini - finialize a &struct drm_fb_helper
- * @fb_helper: driver-allocated fbdev helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  *
  * This cleans up all remaining resources associated with @fb_helper. Must be
  * called after drm_fb_helper_unlink_fbi() was called.
@@ -937,7 +943,7 @@ EXPORT_SYMBOL(drm_fb_helper_fini);
 
 /**
  * drm_fb_helper_unlink_fbi - wrapper around unlink_framebuffer
- * @fb_helper: driver-allocated fbdev helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  *
  * A wrapper around unlink_framebuffer implemented by fbdev core
  */
@@ -1138,7 +1144,7 @@ EXPORT_SYMBOL(drm_fb_helper_cfb_imageblit);
 
 /**
  * drm_fb_helper_set_suspend - wrapper around fb_set_suspend
- * @fb_helper: driver-allocated fbdev helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  * @suspend: whether to suspend or resume
  *
  * A wrapper around fb_set_suspend implemented by fbdev core.
@@ -1155,7 +1161,7 @@ EXPORT_SYMBOL(drm_fb_helper_set_suspend);
 /**
  * drm_fb_helper_set_suspend_unlocked - wrapper around fb_set_suspend that also
  *  takes the console lock
- * @fb_helper: driver-allocated fbdev helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  * @suspend: whether to suspend or resume
  *
  * A wrapper around fb_set_suspend() that takes the console lock. If the lock
@@ -2568,7 +2574,7 @@ EXPORT_SYMBOL(drm_fb_helper_initial_config);
 /**
  * drm_fb_helper_hotplug_event - respond to a hotplug notification by
  *   probing all the outputs attached to the fb
- * @fb_helper: the drm_fb_helper
+ * @fb_helper: driver-allocated fbdev helper, can be NULL
  *
  * Scan the 

[Intel-gfx] [PATCH 05/15] drm/armada: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Russell King 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/armada/armada_drm.h   |  1 -
 drivers/gpu/drm/armada/armada_drv.c   |  8 ++--
 drivers/gpu/drm/armada/armada_fb.c| 11 +--
 drivers/gpu/drm/armada/armada_fbdev.c |  8 
 4 files changed, 3 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/armada/armada_drm.h 
b/drivers/gpu/drm/armada/armada_drm.h
index b064879ecdbd..cc4c557c9f66 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -84,7 +84,6 @@ void armada_drm_queue_unref_work(struct drm_device *,
 extern const struct drm_mode_config_funcs armada_drm_mode_config_funcs;
 
 int armada_fbdev_init(struct drm_device *);
-void armada_fbdev_lastclose(struct drm_device *);
 void armada_fbdev_fini(struct drm_device *);
 
 int armada_overlay_plane_create(struct drm_device *, unsigned long);
diff --git a/drivers/gpu/drm/armada/armada_drv.c 
b/drivers/gpu/drm/armada/armada_drv.c
index e857b88a9799..4b11b6b52f1d 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "armada_crtc.h"
 #include "armada_drm.h"
@@ -54,15 +55,10 @@ static struct drm_ioctl_desc armada_ioctls[] = {
DRM_IOCTL_DEF_DRV(ARMADA_GEM_PWRITE, armada_gem_pwrite_ioctl, 0),
 };
 
-static void armada_drm_lastclose(struct drm_device *dev)
-{
-   armada_fbdev_lastclose(dev);
-}
-
 DEFINE_DRM_GEM_FOPS(armada_drm_fops);
 
 static struct drm_driver armada_drm_driver = {
-   .lastclose  = armada_drm_lastclose,
+   .lastclose  = drm_fb_helper_lastclose,
.gem_free_object_unlocked = armada_gem_free_object,
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
diff --git a/drivers/gpu/drm/armada/armada_fb.c 
b/drivers/gpu/drm/armada/armada_fb.c
index a38d5a0892a9..ac92bce07ecd 100644
--- a/drivers/gpu/drm/armada/armada_fb.c
+++ b/drivers/gpu/drm/armada/armada_fb.c
@@ -154,16 +154,7 @@ static struct drm_framebuffer *armada_fb_create(struct 
drm_device *dev,
return ERR_PTR(ret);
 }
 
-static void armada_output_poll_changed(struct drm_device *dev)
-{
-   struct armada_private *priv = dev->dev_private;
-   struct drm_fb_helper *fbh = priv->fbdev;
-
-   if (fbh)
-   drm_fb_helper_hotplug_event(fbh);
-}
-
 const struct drm_mode_config_funcs armada_drm_mode_config_funcs = {
.fb_create  = armada_fb_create,
-   .output_poll_changed= armada_output_poll_changed,
+   .output_poll_changed= drm_fb_helper_output_poll_changed,
 };
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c 
b/drivers/gpu/drm/armada/armada_fbdev.c
index a2ce83f84800..2a59db0994b2 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -159,14 +159,6 @@ int armada_fbdev_init(struct drm_device *dev)
return ret;
 }
 
-void armada_fbdev_lastclose(struct drm_device *dev)
-{
-   struct armada_private *priv = dev->dev_private;
-
-   if (priv->fbdev)
-   drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
-}
-
 void armada_fbdev_fini(struct drm_device *dev)
 {
struct armada_private *priv = dev->dev_private;
-- 
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[Intel-gfx] [PATCH 02/15] drm: Add drm_device->drm_fb_helper_private pointer

[Noralf Trønnes]

drm_fb_helper is *the* way of doing fbdev emulation so add a pointer to
struct drm_device. This makes it possible to add callback helpers for
.last_close and .output_poll_changed further reducing fbdev emulation
footprint in drivers. The pointer is set by drm_fb_helper_init() and
cleared by drm_fb_helper_fini().

Signed-off-by: Noralf Trønnes 
---

This patch was initially part of the patchset: drm/tinydrm: Use vmalloc BO
Changes since previous version:
- Change member name: fbdev -> drm_fb_helper_private
- Expand docs
- Set and clear pointer in drm_fb_helper_init/fini()

 drivers/gpu/drm/drm_fb_helper.c | 13 +++--
 include/drm/drm_device.h|  9 +
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 954cdd48de92..c07b7af8de4c 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -799,8 +799,10 @@ int drm_fb_helper_init(struct drm_device *dev,
struct drm_mode_config *config = &dev->mode_config;
int i;
 
-   if (!drm_fbdev_emulation)
+   if (!drm_fbdev_emulation) {
+   dev->drm_fb_helper_private = fb_helper;
return 0;
+   }
 
if (!max_conn_count)
return -EINVAL;
@@ -835,6 +837,8 @@ int drm_fb_helper_init(struct drm_device *dev,
i++;
}
 
+   dev->drm_fb_helper_private = fb_helper;
+
return 0;
 out_free:
drm_fb_helper_crtc_free(fb_helper);
@@ -913,7 +917,12 @@ void drm_fb_helper_fini(struct drm_fb_helper *fb_helper)
 {
struct fb_info *info;
 
-   if (!drm_fbdev_emulation || !fb_helper)
+   if (!fb_helper)
+   return;
+
+   fb_helper->dev->drm_fb_helper_private = NULL;
+
+   if (!drm_fbdev_emulation)
return;
 
cancel_work_sync(&fb_helper->resume_work);
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index e21af87a2f3c..6b26262658ae 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -17,6 +17,7 @@ struct drm_vblank_crtc;
 struct drm_sg_mem;
 struct drm_local_map;
 struct drm_vma_offset_manager;
+struct drm_fb_helper;
 
 struct inode;
 
@@ -185,6 +186,14 @@ struct drm_device {
struct drm_vma_offset_manager *vma_offset_manager;
/*@} */
int switch_power_state;
+
+   /**
+* @drm_fb_helper_private:
+*
+* Pointer to the fbdev emulation structure.
+* Set by drm_fb_helper_init() and cleared by drm_fb_helper_fini().
+*/
+   struct drm_fb_helper *drm_fb_helper_private;
 };
 
 #endif
-- 
2.14.2

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[Intel-gfx] [PATCH 06/15] drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Inki Dae 
Cc: Joonyoung Shim 
Cc: Seung-Woo Kim 
Cc: Kyungmin Park 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/exynos/exynos_drm_drv.c   |  8 ++--
 drivers/gpu/drm/exynos/exynos_drm_fb.c|  2 +-
 drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 18 --
 drivers/gpu/drm/exynos/exynos_drm_fbdev.h |  2 --
 4 files changed, 3 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c 
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index e651a58c18cf..70f4895ac49c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -89,11 +90,6 @@ static void exynos_drm_postclose(struct drm_device *dev, 
struct drm_file *file)
file->driver_priv = NULL;
 }
 
-static void exynos_drm_lastclose(struct drm_device *dev)
-{
-   exynos_drm_fbdev_restore_mode(dev);
-}
-
 static const struct vm_operations_struct exynos_drm_gem_vm_ops = {
.fault = exynos_drm_gem_fault,
.open = drm_gem_vm_open,
@@ -140,7 +136,7 @@ static struct drm_driver exynos_drm_driver = {
.driver_features= DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME
  | DRIVER_ATOMIC | DRIVER_RENDER,
.open   = exynos_drm_open,
-   .lastclose  = exynos_drm_lastclose,
+   .lastclose  = drm_fb_helper_lastclose,
.postclose  = exynos_drm_postclose,
.gem_free_object_unlocked = exynos_drm_gem_free_object,
.gem_vm_ops = &exynos_drm_gem_vm_ops,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c 
b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 8208df56a88f..0faaf829f5bf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -205,7 +205,7 @@ static struct drm_mode_config_helper_funcs 
exynos_drm_mode_config_helpers = {
 
 static const struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {
.fb_create = exynos_user_fb_create,
-   .output_poll_changed = exynos_drm_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = exynos_atomic_check,
.atomic_commit = drm_atomic_helper_commit,
 };
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c 
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index dfb66ecf417b..132dd52d0ac7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -270,24 +270,6 @@ void exynos_drm_fbdev_fini(struct drm_device *dev)
private->fb_helper = NULL;
 }
 
-void exynos_drm_fbdev_restore_mode(struct drm_device *dev)
-{
-   struct exynos_drm_private *private = dev->dev_private;
-
-   if (!private || !private->fb_helper)
-   return;
-
-   drm_fb_helper_restore_fbdev_mode_unlocked(private->fb_helper);
-}
-
-void exynos_drm_output_poll_changed(struct drm_device *dev)
-{
-   struct exynos_drm_private *private = dev->dev_private;
-   struct drm_fb_helper *fb_helper = private->fb_helper;
-
-   drm_fb_helper_hotplug_event(fb_helper);
-}
-
 void exynos_drm_fbdev_suspend(struct drm_device *dev)
 {
struct exynos_drm_private *private = dev->dev_private;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h 
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
index 645d1bb7f665..b33847223a85 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
@@ -19,8 +19,6 @@
 
 int exynos_drm_fbdev_init(struct drm_device *dev);
 void exynos_drm_fbdev_fini(struct drm_device *dev);
-void exynos_drm_fbdev_restore_mode(struct drm_device *dev);
-void exynos_drm_output_poll_changed(struct drm_device *dev);
 void exynos_drm_fbdev_suspend(struct drm_device *drm);
 void exynos_drm_fbdev_resume(struct drm_device *drm);
 
-- 
2.14.2

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[Intel-gfx] [PATCH 09/15] drm/msm: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Rob Clark 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/msm/msm_drv.c | 18 ++
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 606df7bea97b..1bddbbc6fd3e 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -34,16 +34,9 @@
 #define MSM_VERSION_MINOR  2
 #define MSM_VERSION_PATCHLEVEL 0
 
-static void msm_fb_output_poll_changed(struct drm_device *dev)
-{
-   struct msm_drm_private *priv = dev->dev_private;
-   if (priv->fbdev)
-   drm_fb_helper_hotplug_event(priv->fbdev);
-}
-
 static const struct drm_mode_config_funcs mode_config_funcs = {
.fb_create = msm_framebuffer_create,
-   .output_poll_changed = msm_fb_output_poll_changed,
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = msm_atomic_check,
.atomic_commit = msm_atomic_commit,
.atomic_state_alloc = msm_atomic_state_alloc,
@@ -545,13 +538,6 @@ static void msm_postclose(struct drm_device *dev, struct 
drm_file *file)
kfree(ctx);
 }
 
-static void msm_lastclose(struct drm_device *dev)
-{
-   struct msm_drm_private *priv = dev->dev_private;
-   if (priv->fbdev)
-   drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
-}
-
 static irqreturn_t msm_irq(int irq, void *arg)
 {
struct drm_device *dev = arg;
@@ -825,7 +811,7 @@ static struct drm_driver msm_driver = {
DRIVER_MODESET,
.open   = msm_open,
.postclose   = msm_postclose,
-   .lastclose  = msm_lastclose,
+   .lastclose  = drm_fb_helper_lastclose,
.irq_handler= msm_irq,
.irq_preinstall = msm_irq_preinstall,
.irq_postinstall= msm_irq_postinstall,
-- 
2.14.2

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[Intel-gfx] [PATCH 04/15] drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()

[Noralf Trønnes]

This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.

Cc: Alex Deucher 
Cc: "Christian König" 
Signed-off-by: Noralf Trønnes 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c |  9 ++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  | 27 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  4 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|  4 
 4 files changed, 3 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6ad243293a78..c41262865616 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -34,6 +34,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static void amdgpu_flip_callback(struct dma_fence *f, struct dma_fence_cb *cb)
 {
@@ -556,15 +557,9 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
return &amdgpu_fb->base;
 }
 
-static void amdgpu_output_poll_changed(struct drm_device *dev)
-{
-   struct amdgpu_device *adev = dev->dev_private;
-   amdgpu_fb_output_poll_changed(adev);
-}
-
 const struct drm_mode_config_funcs amdgpu_mode_funcs = {
.fb_create = amdgpu_user_framebuffer_create,
-   .output_poll_changed = amdgpu_output_poll_changed
+   .output_poll_changed = drm_fb_helper_output_poll_changed,
 };
 
 static const struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 562930b17a6d..e38bf856f48b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -288,12 +288,6 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
return ret;
 }
 
-void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev)
-{
-   if (adev->mode_info.rfbdev)
-   drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper);
-}
-
 static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev 
*rfbdev)
 {
struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
@@ -397,24 +391,3 @@ bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, 
struct amdgpu_bo *robj)
return true;
return false;
 }
-
-void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev)
-{
-   struct amdgpu_fbdev *afbdev;
-   struct drm_fb_helper *fb_helper;
-   int ret;
-
-   if (!adev)
-   return;
-
-   afbdev = adev->mode_info.rfbdev;
-
-   if (!afbdev)
-   return;
-
-   fb_helper = &afbdev->helper;
-
-   ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
-   if (ret)
-   DRM_DEBUG("failed to restore crtc mode\n");
-}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 4fd06f8d9768..db1e320be54a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -785,9 +785,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
  */
 void amdgpu_driver_lastclose_kms(struct drm_device *dev)
 {
-   struct amdgpu_device *adev = dev->dev_private;
-
-   amdgpu_fbdev_restore_mode(adev);
+   drm_fb_helper_lastclose(dev);
vga_switcheroo_process_delayed_switch();
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 2af2678ddaf6..9e9cd0e1c558 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -570,10 +570,6 @@ void amdgpu_fbdev_fini(struct amdgpu_device *adev);
 void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state);
 int amdgpu_fbdev_total_size(struct amdgpu_device *adev);
 bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo 
*robj);
-void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev);
-
-void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev);
-
 
 int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool 
tiled);
 
-- 
2.14.2

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[Intel-gfx] [PATCH 00/15] drm/fb-helper: Add .last_close and .output_poll_changed helpers

[Noralf Trønnes]

This patchset adds fbdev .last_close and .output_poll_changed helpers to
reduce fbdev emulation footprint in drivers.

I don't know which drivers have their own tree or not, so if you want me
to apply your patch to drm-misc, please let me know.

I will do a separate patchset for the cma helper drivers.

Noralf.

Noralf Trønnes (15):
  drm/fb-helper: Handle function NULL argument
  drm: Add drm_device->drm_fb_helper_private pointer
  drm/fb-helper: Add .last_close and .output_poll_changed helpers
  drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/armada: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/i915: Use drm_fb_helper_output_poll_changed()
  drm/msm: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/nouveau: Use drm_fb_helper_output_poll_changed()
  drm/omap: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed()
  drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed()
  staging: vboxvideo: Use drm_fb_helper_lastclose()

 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c |  9 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c  | 27 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|  4 --
 drivers/gpu/drm/armada/armada_drm.h |  1 -
 drivers/gpu/drm/armada/armada_drv.c |  8 +---
 drivers/gpu/drm/armada/armada_fb.c  | 11 +
 drivers/gpu/drm/armada/armada_fbdev.c   |  8 
 drivers/gpu/drm/drm_fb_helper.c | 69 +++--
 drivers/gpu/drm/exynos/exynos_drm_drv.c |  8 +---
 drivers/gpu/drm/exynos/exynos_drm_fb.c  |  2 +-
 drivers/gpu/drm/exynos/exynos_drm_fbdev.c   | 18 
 drivers/gpu/drm/exynos/exynos_drm_fbdev.h   |  2 -
 drivers/gpu/drm/gma500/framebuffer.c|  9 +---
 drivers/gpu/drm/gma500/psb_drv.c| 15 +--
 drivers/gpu/drm/i915/intel_display.c|  2 +-
 drivers/gpu/drm/i915/intel_drv.h|  5 ---
 drivers/gpu/drm/i915/intel_fbdev.c  |  8 
 drivers/gpu/drm/msm/msm_drv.c   | 18 +---
 drivers/gpu/drm/nouveau/nouveau_display.c   |  3 +-
 drivers/gpu/drm/nouveau/nouveau_fbcon.c |  8 
 drivers/gpu/drm/nouveau/nouveau_fbcon.h |  2 -
 drivers/gpu/drm/nouveau/nouveau_vga.c   |  3 +-
 drivers/gpu/drm/nouveau/nv50_display.c  |  2 +-
 drivers/gpu/drm/omapdrm/omap_drv.c  | 34 +-
 drivers/gpu/drm/radeon/radeon_display.c |  9 +---
 drivers/gpu/drm/radeon/radeon_fb.c  | 22 -
 drivers/gpu/drm/radeon/radeon_kms.c |  5 +--
 drivers/gpu/drm/radeon/radeon_mode.h|  3 --
 drivers/gpu/drm/rockchip/rockchip_drm_drv.c |  9 +---
 drivers/gpu/drm/rockchip/rockchip_drm_fb.c  |  9 +---
 drivers/gpu/drm/tegra/drm.c | 13 +-
 drivers/gpu/drm/tegra/drm.h |  4 --
 drivers/gpu/drm/tegra/fb.c  | 14 --
 drivers/staging/vboxvideo/vbox_drv.c|  2 +-
 drivers/staging/vboxvideo/vbox_drv.h|  1 -
 drivers/staging/vboxvideo/vbox_main.c   | 12 -
 include/drm/drm_device.h|  9 
 include/drm/drm_fb_helper.h | 11 +
 39 files changed, 106 insertions(+), 297 deletions(-)

-- 
2.14.2

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Test kms_force_connector_basic:
Subgroup force-load-detect:
skip   -> PASS   (shard-hsw)
Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-hsw) fdo#102707
Test kms_flip:
Subgroup modeset-vs-vblank-race:
pass   -> DMESG-FAIL (shard-hsw) fdo#103060

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060

shard-hswtotal:2540 pass:1429 dwarn:2   dfail:1   fail:8   skip:1100 
time:9206s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6115/shards.html
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v3 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/3/mbox/

Test gem_sync:
Subgroup basic-store-all:
pass   -> FAIL   (fi-ivb-3520m) fdo#17
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:443s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:449s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:375s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:545s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:265s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:503s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:498s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:496s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:480s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:552s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:424s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:258s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:586s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:456s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:432s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:259  dwarn:0   dfail:0   fail:1   skip:29  
time:491s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:463s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:495s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:574s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:564s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:453s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:645s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:518s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:503s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:459s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:571s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:419s

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC 
integration manifest
d432e1914713 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6115/
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[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Rodrigo Vivi]

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+--+---++
| DDI Type | VBT Value | Bspec Mapped Value |
+--+---++
| DDI-B| 0x1   | 0x1|
| DDI-C| 0x2   | 0x2|
| DDI-D| 0x3   | 0x4|
| DDI-F| 0x4   | 0x3|
+--+---++

v2: Move defines to a better place.
This is actually CNL_PCH not CNL only.
v3: Accepting Ville's suggestions: enums and array to
to make this future proof.

Cc: Jani Nikula 
Cc: Paulo Zanoni 
Cc: Anusha Srivatsa 
Cc: Clinton Taylor 
Cc: Ville Syrjälä 
Signed-off-by: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/intel_bios.c | 26 --
 drivers/gpu/drm/i915/intel_vbt_defs.h | 15 +++
 2 files changed, 31 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..79638308664c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,21 @@ static void sanitize_aux_ch(struct drm_i915_private 
*dev_priv,
}
 }
 
+static const enum bspec_gmbus_pin cnp_ddc_pin_map[] = {
+   [DDC_BUS_DDI_B] = GMBUS_PIN_1,
+   [DDC_BUS_DDI_C] = GMBUS_PIN_2,
+   [DDC_BUS_DDI_D] = GMBUS_PIN_4,
+   [DDC_BUS_DDI_F] = GMBUS_PIN_3,
+};
+
+static u8 get_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
+{
+   if (HAS_PCH_CNP(dev_priv))
+   return cnp_ddc_pin_map[vbt_pin];
+
+   return vbt_pin;
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
   u8 bdb_version)
 {
@@ -1164,16 +1179,7 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
if (is_dvi) {
-   info->alternate_ddc_pin = ddc_pin;
-
-   /*
-* All VBTs that we got so far for B Stepping has this
-* information wrong for Port D. So, let's just ignore for now.
-*/
-   if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-   port == PORT_D) {
-   info->alternate_ddc_pin = 0;
-   }
+   info->alternate_ddc_pin = get_ddc_pin(dev_priv, ddc_pin);
 
sanitize_ddc_pin(dev_priv, port);
}
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 7e2a96712d07..dfc9f7a43668 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -308,6 +308,21 @@ struct bdb_general_features {
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE33
 
+/* DDC Bus DDI Type 155+ */
+enum vbt_gmbus_ddi {
+   DDC_BUS_DDI_B = 0x1,
+   DDC_BUS_DDI_C,
+   DDC_BUS_DDI_D,
+   DDC_BUS_DDI_F,
+};
+
+enum bspec_gmbus_pin {
+   GMBUS_PIN_1 = 0x1,
+   GMBUS_PIN_2,
+   GMBUS_PIN_3,
+   GMBUS_PIN_4,
+};
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
-- 
2.13.5

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[Intel-gfx] ✗ Fi.CI.BAT: failure for igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev2)

[Patchwork]

== Series Details ==

Series: igt/prime_mmap_coherency: Remove manual gem_sync() calls (rev2)
URL   : https://patchwork.freedesktop.org/series/32272/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers before 
measuring available memory

with latest DRM-Tip kernel build CI_DRM_3267
87b113da0ae4 drm-tip: 2017y-10m-19d-18h-14m-41s UTC integration manifest

No testlist changes.

Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
pass   -> INCOMPLETE (fi-skl-6770hq)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
notrun -> INCOMPLETE (fi-skl-6700hq)
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:452s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:376s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:535s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:270s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:503s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:506s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:504s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:484s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:563s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:424s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:253s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:582s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:449s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:426s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:436s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:457s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:492s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:480s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:589s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:548s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:451s
fi-skl-6700hqtotal:230  pass:205  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:520s
fi-skl-6770hqtotal:219  pass:206  dwarn:0   dfail:0   fail:0   skip:12 
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:461s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:567s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:431s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_391/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Guc/HuC firmware details to error state (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Add Guc/HuC firmware details to error state (rev3)
URL   : https://patchwork.freedesktop.org/series/32293/
State : failure

== Summary ==

Series 32293v3 drm/i915: Add Guc/HuC firmware details to error state
https://patchwork.freedesktop.org/api/1.0/series/32293/revisions/3/mbox/

Test chamelium:
Subgroup dp-hpd-fast:
skip   -> INCOMPLETE (fi-bdw-gvtdvm) fdo#102332
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
pass   -> INCOMPLETE (fi-skl-6770hq)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705
Test drv_module_reload:
Subgroup basic-reload-inject:
dmesg-warn -> INCOMPLETE (fi-cfl-s) fdo#103206

fdo#102332 https://bugs.freedesktop.org/show_bug.cgi?id=102332
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fdo#103206 https://bugs.freedesktop.org/show_bug.cgi?id=103206

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:439s
fi-bdw-gvtdvmtotal:59   pass:0dwarn:0   dfail:0   fail:0   skip:0  
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:525s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:494s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:482s
fi-cfl-s total:288  pass:253  dwarn:3   dfail:0   fail:0   skip:31 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:415s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:581s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:449s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:426s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:493s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:473s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:547s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:452s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:648s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:521s
fi-skl-6770hqtotal:219  pass:206  dwarn:0   dfail:0   fail:0   skip:12 
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:459s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:567s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:422s

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC 
integration manifest
e08b27eb1f11 drm/i915: Add Guc/HuC firmware details to error state

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6114/
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[Intel-gfx] [PATCH igt] igt/prime_mmap_coherency: Remove manual gem_sync() calls

[Chris Wilson]

Emphasize that we want to test synchronisation using the dmabuf API
(prime_sync_start, prime_sync_end) and so drop the manual
synchronisation using the GEM API (gem_sync).

Signed-off-by: Chris Wilson 
Reviewed-by: Daniel Vetter 
---
 tests/prime_mmap_coherency.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
index ffd2d751..192b4348 100644
--- a/tests/prime_mmap_coherency.c
+++ b/tests/prime_mmap_coherency.c
@@ -62,7 +62,6 @@ static int test_read_flush(void)
 * the GTT domain. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #2: read BO 1 using the dma-buf CPU mmap. This dirties the CPU 
caches. */
@@ -86,7 +85,6 @@ static int test_read_flush(void)
prime_sync_end(dma_buf_fd, false);
 
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #4: read again using the CPU mmap. Doing #1 before #3 makes 
sure we
@@ -129,7 +127,6 @@ static int test_write_flush(void)
 * the GTT domain. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_1, bo_2, width * height);
-   gem_sync(fd, bo_1->handle);
drm_intel_bo_unreference(bo_2);
 
/* STEP #2: Write '1's into BO 1 using the dma-buf CPU mmap. */
@@ -149,7 +146,6 @@ static int test_write_flush(void)
/* STEP #3: Copy BO 1 into BO 2, using blitter. */
bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096);
intel_copy_bo(batch, bo_2, bo_1, width * height);
-   gem_sync(fd, bo_2->handle);
 
/* STEP #4: compare BO 2 against written BO 1. In !llc hardware, there
 * should be some cache lines that didn't get flushed out and are still 
0,
-- 
2.15.0.rc1

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[Intel-gfx] [PATCH v3] drm/i915: Add Guc/HuC firmware details to error state

[Michal Wajdeczko]

Include GuC and HuC firmware details in captured error state
to provide additional debug information. To reuse existing
uc firmware pretty printer, introduce new drm-printer variant
that works with our i915_error_state_buf output. Also update
uc firmware pretty printer to accept const input.

v2: don't rely on current caps (Chris)
dump correct fw info (Michal)
v3: simplify capture of custom paths (Chris)

Suggested-by: Chris Wilson 
Signed-off-by: Michal Wajdeczko 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_drv.h   |  4 
 drivers/gpu/drm/i915/i915_gpu_error.c | 39 +++
 drivers/gpu/drm/i915/intel_uc_fw.c|  2 +-
 drivers/gpu/drm/i915/intel_uc_fw.h|  2 +-
 4 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c2649c..4d6519b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -911,6 +911,10 @@ struct i915_gpu_state {
struct intel_device_info device_info;
struct i915_params params;
 
+   /* uC state */
+   struct intel_uc_fw guc_fw;
+   struct intel_uc_fw huc_fw;
+
/* Generic register state */
u32 eir;
u32 pgtbl_er;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 653fb69..21d78eb 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -30,6 +30,8 @@
 #include 
 #include 
 #include 
+#include 
+
 #include "i915_drv.h"
 
 static const char *engine_str(int engine)
@@ -175,6 +177,21 @@ static void i915_error_puts(struct 
drm_i915_error_state_buf *e,
 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 #define err_puts(e, s) i915_error_puts(e, s)
 
+static void __i915_printfn_error(struct drm_printer *p, struct va_format *vaf)
+{
+   i915_error_vprintf(p->arg, vaf->fmt, *vaf->va);
+}
+
+static inline struct drm_printer
+i915_error_printer(struct drm_i915_error_state_buf *e)
+{
+   struct drm_printer p = {
+   .printfn = __i915_printfn_error,
+   .arg = e,
+   };
+   return p;
+}
+
 #ifdef CONFIG_DRM_I915_COMPRESS_ERROR
 
 struct compress {
@@ -592,8 +609,10 @@ static void err_print_pciid(struct 
drm_i915_error_state_buf *m,
 int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
const struct i915_gpu_state *error)
 {
+   struct drm_printer p = i915_error_printer(m);
struct drm_i915_private *dev_priv = m->i915;
struct drm_i915_error_object *obj;
+
int i, j;
 
if (!error) {
@@ -774,6 +793,11 @@ int i915_error_state_to_str(struct 
drm_i915_error_state_buf *m,
err_print_capabilities(m, &error->device_info);
err_print_params(m, &error->params);
 
+   if (error->device_info.has_guc) {
+   intel_uc_fw_dump(&error->guc_fw, &p);
+   intel_uc_fw_dump(&error->huc_fw, &p);
+   }
+
if (m->bytes == 0 && m->err)
return m->err;
 
@@ -870,6 +894,9 @@ void __i915_gpu_state_free(struct kref *error_ref)
I915_PARAMS_FOR_EACH(FREE);
 #undef FREE
 
+   kfree(error->guc_fw.path);
+   kfree(error->huc_fw.path);
+
kfree(error);
 }
 
@@ -1559,6 +1586,17 @@ static void i915_capture_pinned_buffers(struct 
drm_i915_private *dev_priv,
error->pinned_bo = bo;
 }
 
+static void i915_capture_uc_state(struct drm_i915_private *dev_priv,
+ struct i915_gpu_state *error)
+{
+   error->guc_fw = dev_priv->guc.fw;
+   error->huc_fw = dev_priv->huc.fw;
+
+   /* Make sure to capture custom firmware paths */
+   error->guc_fw.path = kstrdup(error->guc_fw.path, GFP_ATOMIC);
+   error->huc_fw.path = kstrdup(error->huc_fw.path, GFP_ATOMIC);
+}
+
 static void i915_gem_capture_guc_log_buffer(struct drm_i915_private *dev_priv,
struct i915_gpu_state *error)
 {
@@ -1710,6 +1748,7 @@ static int capture(void *data)
I915_PARAMS_FOR_EACH(DUP);
 #undef DUP
 
+   i915_capture_uc_state(error->i915, error);
i915_capture_gen_state(error->i915, error);
i915_capture_reg_state(error->i915, error);
i915_gem_record_fences(error->i915, error);
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.c 
b/drivers/gpu/drm/i915/intel_uc_fw.c
index 973888e..4bc82d3 100644
--- a/drivers/gpu/drm/i915/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/intel_uc_fw.c
@@ -299,7 +299,7 @@ void intel_uc_fw_fini(struct intel_uc_fw *uc_fw)
  *
  * Pretty printer for uC firmware.
  */
-void intel_uc_fw_dump(struct intel_uc_fw *uc_fw, struct drm_printer *p)
+void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
 {
drm_printf(p, "%s firmware: %s\n",
   intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.h 
b/drivers/gpu/drm/i915/intel_uc_fw.h
i

Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

[Daniele Ceraolo Spurio]

On 19/10/17 11:12, Chris Wilson wrote:

Quoting Daniele Ceraolo Spurio (2017-10-18 17:50:33)



On 18/10/17 09:04, Chris Wilson wrote:

Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24)



On 13/10/17 09:37, Daniele Ceraolo Spurio wrote:



On 13/10/17 01:31, Chris Wilson wrote:

Quoting Chris Wilson (2017-10-12 23:57:38)

Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27)

+igt_cork_t *igt_cork_new(int fd);


_new does not imply plugged.


+void igt_cork_signal(igt_cork_t *cork);


When have you signaled a cork?


+void igt_cork_free(int fd, igt_cork_t *cork);


_free does not imply unplug.


To be clear the verbs are to plug and unplug a queue/schedule. Cork is a
reference to TCP_CORK which does the same thing, but plug/unplug are
more commonplace (at least in kernel code).

I don't see any reason why we need a malloc here.
-Chris



I added the malloc just to use the same approach as the spin_batch, I'll
get rid of it.
My concern with the existing plug/unplug scheme was that the plug()
function in the various tests didn't really plug anything but just
created the bo and that was slightly confusing.


It created a bo with an unsignaled fence, that's enough to plug anything
attached to it. Since we can't just say plug(device) we have to say
execbuf(device, plug()).


What do you think of going with:

   struct igt_cork {
       int device;
       uint32_t handle;
       uint32_t fence;
   };

   struct igt_cork igt_cork_create(int fd);
   void igt_cork_unplug(struct igt_cork *cork);
   void igt_cork_close(int fd, struct igt_cork *cork);
   void igt_cork_unplug_and_close(int fd, struct igt_cork *cork);


close will always be unplug; there's no differentiation, in both APIs we
ensure that any fence associated with the device or timeline fd is
signaled upon release. We could lose the fence and still work, but for
us it gives us the means by which we can do a test-and-set and report an
issue where the fence was signaled too early (due to slow test setup).
Similarly once unplugged, there is no use for the struct anymore, you
could release the device/timeline, but we've embedded it because in
terms of overhead, so far it has been insignificant.

Leaving a fence dangling by separating unplug/close is a good way to
leave lots of timeouts and GPU resets behind.
-Chris



What I wanted to separate is the unplugging from the closing of the BO
handle, because in some case we keep the BO around for a while after
unblocking the execution.


Where? What value could it possibly have? You know the state of its
fence, so presumably you want the contents. In such a situation you don't
need a dummy cork to plug the queue, you have a real object with which
you want interact.


In most of those cases the BO handle is not
currently closed,


Every single unplug() function is closing the device; which closes the
handle; gem_close() is superfluous. Early on I kept the vgem fd around
and just needed to close the handle, but it looks like all of those
functions have now been converted to own their device.
-Chris



Apologies for being unclear, what I was referring to was the imported BO 
handle, not the one from the vgem device. In a couple of tests 
(gem_wait, gem_exec_latency) we still use it after the unplug. My 
understanding (which could be wrong, since I haven't looked at this area 
a lot) is that the imported handle will stay valid even if the original 
device is closed and that's why I wanted to explicitly clean it up. 
It'll still be closed when the fd is closed so we're not doing something 
inherently bad, but I felt it would've been cleaner to have that in the 
common function. I'll add a note about it in the function description 
instead and keep the existing plug/unplug scheme.


Daniele
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[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev2)
URL   : https://patchwork.freedesktop.org/series/32247/
State : warning

== Summary ==

Series 32247v2 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/

Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
incomplete -> PASS   (fi-skl-6700hq)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705
Test prime_vgem:
Subgroup basic-fence-flip:
pass   -> DMESG-WARN (fi-kbl-7567u)

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:439s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:455s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:515s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:266s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:494s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:473s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:559s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:419s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:252s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:580s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:450s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:425s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:432s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:498s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:485s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:574s
fi-kbl-7567u total:289  pass:268  dwarn:1   dfail:0   fail:0   skip:20  
time:497s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:583s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:539s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:452s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:647s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:502s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:457s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:422s
fi-skl-6700k failed to connect after reboot

87b113da0ae43b97650ddcec6c05ef69469e2107 drm-tip: 2017y-10m-19d-18h-14m-41s UTC 
integration manifest
f392fa125360 drm/i915: Adjust system agent voltage on CNL if required by DDI 
ports
c98ae974506a drm/i915: Use cdclk_state->voltage on CNL
4ebfa4bd61ec drm/i915: Use cdclk_state->voltage on BXT/GLK
d402b82451e2 drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
7a47d927ff10 drm/i915: Use cdclk_state->voltage on BDW
380201ee642b drm/i915: Use cdclk_state->voltage on VLV/CHV
7163b02f9819 drm/i915: Start tracking voltage level in the cdclk state
ca505a66dcdb drm/i915: Clean up some cdclk switch statements

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6113/
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Re: [Intel-gfx] [PATCH 13/14] drm/i915/guc: Workaround the missing user interrupt after preemption

[Chris Wilson]

Quoting Michał Winiarski (2017-10-19 19:36:18)
> With GuC, we're scheduling tasklet on USER_INTERRUPT - since some work
> has completed, perhaps we're able to submit some more work. We're doing
> similar thing for preemption - after preemption has completed, it's time
> to schedule the tasklet and submit more work (since the engine is now
> idle). Unfortunately, we can hit the scenarios where the preemption is
> done, but the interrupt is nowhere to be seen. To work around the
> problem, let's use a delayed work that's kicking the tasklet if
> preemption is done, and queueing itself otherwise.

I'm not buying it yet. Missing USER_INTERRUPT would not be guc specific
(surely?) and so we would be getting similar missed-breadcrumb warnings
on skl+. We dedicate a lot of CI towards detecting those...

The first alternative that springs to mind is bad ordering between ggtt
write and MI_USER_INTERRUPT, but that too is common to execlists, and
also results in missed-breadcrumb warnings (which are notable by their
absence). Though having said that, the HWSP ordering issue with
intel_iommu is worrying me that we have similar issues with breadcrumbs
+ intel_iommu. Is iommu a factor?

In short, if this is a problem here, it should be a problem everywhere.
Right?
-Chris
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Re: [Intel-gfx] [PATCH v2 06/14] drm/i915/guc: Add a second client, to be used for preemption

[Michal Wajdeczko]

On Thu, 19 Oct 2017 20:36:11 +0200, Michał Winiarski  
 wrote:



From: Dave Gordon 

This second client is created with priority KMD_HIGH, and marked
as preemptive. This will allow us to request preemption using GuC  
actions.


v2: Extract clients creation into a helper, debugfs fixups. (Michał)
Recreate doorbell on init. (Daniele)
Move clients into an array.

Signed-off-by: Dave Gordon 
Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Daniele Ceraolo Spurio 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
---
 drivers/gpu/drm/i915/i915_debugfs.c|  11 +--
 drivers/gpu/drm/i915/i915_guc_submission.c | 107  
-

 drivers/gpu/drm/i915/intel_guc.h   |   9 ++-
 drivers/gpu/drm/i915/intel_uncore.c|   2 +-
 4 files changed, 91 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c  
b/drivers/gpu/drm/i915/i915_debugfs.c

index c65e381b85f3..daf7a16a4ee2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2459,7 +2459,7 @@ static bool check_guc_submission(struct seq_file  
*m)

struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
-   if (!guc->execbuf_client) {
+   if (!guc->client[SUBMIT]) {
seq_printf(m, "GuC submission %s\n",
   HAS_GUC_SCHED(dev_priv) ?
   "disabled" :
@@ -2474,6 +2474,7 @@ static int i915_guc_info(struct seq_file *m, void  
*data)

 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
+   u32 i;
if (!check_guc_submission(m))
return 0;
@@ -2482,8 +2483,10 @@ static int i915_guc_info(struct seq_file *m, void  
*data)

seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
seq_printf(m, "Doorbell next cacheline: 0x%x\n\n", guc->db_cacheline);
-   seq_printf(m, "\nGuC execbuf client @ %p:\n", guc->execbuf_client);
-   i915_guc_client_info(m, dev_priv, guc->execbuf_client);
+   for (i = 0; i < I915_GUC_NUM_CLIENTS; i++) {
+   seq_printf(m, "\nGuC client @ %p:\n", guc->client[i]);
+   i915_guc_client_info(m, dev_priv, guc->client[i]);
+   }
i915_guc_log_info(m, dev_priv);
@@ -2497,7 +2500,7 @@ static int i915_guc_stage_pool(struct seq_file *m,  
void *data)

struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
struct guc_stage_desc *desc = guc->stage_desc_pool_vaddr;
-   struct i915_guc_client *client = guc->execbuf_client;
+   struct i915_guc_client *client = guc->client[SUBMIT];
unsigned int tmp;
int index;
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c  
b/drivers/gpu/drm/i915/i915_guc_submission.c

index 0bd1fcffa78d..d8b8125aa4cc 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -33,10 +33,11 @@
  *
  * GuC client:
  * A i915_guc_client refers to a submission path through GuC.  
Currently, there
- * is only one of these (the execbuf_client) and this one is charged  
with all
- * submissions to the GuC. This struct is the owner of a doorbell, a  
process
- * descriptor and a workqueue (all of them inside a single gem object  
that

- * contains all required pages for these elements).
+ * are two clients. One of them (SUBMIT) is charged with all  
submissions to the
+ * GuC, the other one (PREEMPT) is responsible for preempting the  
SUBMIT one.
+ * This struct is the owner of a doorbell, a process descriptor and a  
workqueue
+ * (all of them inside a single gem object that contains all required  
pages for

+ * these elements).


Hmm, it's little unfortunate that SUBMIT and PREEMPT enums are defined
in intel_guc.h while mostly used in guc_submission.c


  *
  * GuC stage descriptor:
  * During initialization, the driver allocates a static pool of 1024  
such
@@ -363,6 +364,8 @@ static void guc_stage_desc_init(struct intel_guc  
*guc,

memset(desc, 0, sizeof(*desc));
	desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |  
GUC_STAGE_DESC_ATTR_KERNEL;

+   if (client->priority <= GUC_CLIENT_PRIORITY_HIGH)
+   desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
desc->stage_id = client->stage_id;
desc->priority = client->priority;
desc->db_id = client->doorbell_id;
@@ -553,7 +556,7 @@ static void i915_guc_submit(struct intel_engine_cs  
*engine)

 {
struct drm_i915_private *dev_priv = engine->i915;
struct intel_guc *guc = &dev_priv->guc;
-   struct i915_guc_client *client = guc->execbuf_client;
+   struct i915_guc_client *client = guc->client[SUBMIT];


what about using helpers like:

static inline
struct i915_guc_client *guc_exec_client(struct intel_guc *guc)
{
return guc->client[SUBMIT];
}


+   struct i915_gu

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add Guc/HuC firmware details to error state (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Add Guc/HuC firmware details to error state (rev2)
URL   : https://patchwork.freedesktop.org/series/32293/
State : failure

== Summary ==

Series 32293v2 drm/i915: Add Guc/HuC firmware details to error state
https://patchwork.freedesktop.org/api/1.0/series/32293/revisions/2/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
pass   -> INCOMPLETE (fi-skl-6700hq)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:449s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:534s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:498s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:489s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:481s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:552s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:414s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:582s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:448s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:432s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:495s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:481s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:473s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:553s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:448s
fi-skl-6700hqtotal:219  pass:198  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:522s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:500s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:457s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:566s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:426s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
1a0bf9728423 drm/i915: Add Guc/HuC firmware details to error state

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6112/
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Re: [Intel-gfx] [PATCH v2] drm/i915: Add Guc/HuC firmware details to error state

[Chris Wilson]

Quoting Michal Wajdeczko (2017-10-19 20:02:57)
> +static void i915_capture_uc_state(struct drm_i915_private *dev_priv,
> + struct i915_gpu_state *error)
> +{
> +   error->guc_fw = dev_priv->guc.fw;
> +   error->huc_fw = dev_priv->huc.fw;
> +
> +   /* Make sure to capture custom firmware paths */
> +   if (i915_modparams.guc_firmware_path) {

If we pretend we are not inside a stop_machine() right now...

i915_modparams may be overwritten at any point by userspace. So first of
all this perhaps should be if (error->params.guc_firmware_path) but then
what about that GEM_BUG_ON?

> +   error->guc_fw.path = error->params.guc_firmware_path;
> +   GEM_BUG_ON(strcmp(error->guc_fw.path, dev_priv->guc.fw.path));
> +   }

Don't you just want to
error->guc_fw.path = kstrdup(dev_priv->guc.fw.path, GFP_ATOMIC) 
? The goal is to take a copy of the parameters that match the firmware
at the time of the hang, which may not match the state of the modparam
at this moment in time.
-Chris 
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Re: [Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

[Chris Wilson]

Quoting Michał Winiarski (2017-10-19 19:36:16)
> @@ -855,10 +853,10 @@ static void intel_lrc_irq_handler(unsigned long data)
>  
> if (status & GEN8_CTX_STATUS_ACTIVE_IDLE &&
> buf[2*head + 1] == PREEMPT_ID) {
> -   execlist_cancel_port_requests(execlists);
> +   execlists_cancel_port_requests(execlists);
>  
> spin_lock_irq(&engine->timeline->lock);
> -   unwind_incomplete_requests(engine);
> +   
> execlists_unwind_incomplete_requests(execlists);
> spin_unlock_irq(&engine->timeline->lock);

For exporting, I vote we move the spin_lock into
execlists_unwind_incomplete_requests().
-Chris
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Re: [Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

[Chris Wilson]

Quoting Michał Winiarski (2017-10-19 19:36:16)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
> b/drivers/gpu/drm/i915/intel_lrc.c
> index f9852c422ea0..dd4708904c85 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -354,8 +354,11 @@ static void unwind_wa_tail(struct drm_i915_gem_request 
> *rq)
> assert_ring_tail_valid(rq->ring, rq->tail);
>  }
>  
> -static void unwind_incomplete_requests(struct intel_engine_cs *engine)
> +static void execlists_unwind_incomplete_requests(
> +   const struct intel_engine_execlists * const execlists)
>  {
> +   struct intel_engine_cs *engine =
> +   container_of(execlists, typeof(*engine), execlists);

We can't really say its const if we immediately cast it away. We have to
be careful as the compiler may believe us in the caller when we say it's
const...
-Cris
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Re: [Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

[Chris Wilson]

Quoting Michał Winiarski (2017-10-19 19:36:17)
> diff --git a/drivers/gpu/drm/i915/intel_lrc.h 
> b/drivers/gpu/drm/i915/intel_lrc.h
> index 689fde1a63a9..17182ce29674 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.h
> +++ b/drivers/gpu/drm/i915/intel_lrc.h
> @@ -107,7 +107,6 @@ intel_lr_context_descriptor(struct i915_gem_context *ctx,
> return ctx->engine[engine->id].lrc_desc;
>  }
>  
> -
>  /* Execlists */
>  int intel_sanitize_enable_execlists(struct drm_i915_private *dev_priv,
> int enable_execlists);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
> b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 8ad9a33e803b..5a68499bf3eb 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -525,6 +525,12 @@ struct intel_engine_cs {
> u32 (*get_cmd_length_mask)(u32 cmd_header);
>  };
>  
> +void
> +execlists_cancel_port_requests(struct intel_engine_execlists * const 
> execlists);
> +
> +void execlists_unwind_incomplete_requests(
> +   const struct intel_engine_execlists * const execlists);
> +
>  static inline unsigned int
>  execlists_num_ports(const struct intel_engine_execlists * const execlists)
>  {
> @@ -543,6 +549,8 @@ execlists_port_complete(struct intel_engine_execlists * 
> const execlists,
> memset(port + m, 0, sizeof(struct execlist_port));
>  }
>  
> +
> +
>  static inline unsigned int

You were doing such a good job at cleaning up the unwanted newlines
-Chris
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Re: [Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

[Chris Wilson]

Quoting Michał Winiarski (2017-10-19 19:36:17)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index ef14c6d570dc..7d52baf4f3bd 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2904,6 +2904,16 @@ i915_gem_reset_prepare_engine(struct intel_engine_cs 
> *engine)
> tasklet_kill(&engine->execlists.irq_tasklet);
> tasklet_disable(&engine->execlists.irq_tasklet);
>  
> +   /*
> +* We're using worker to queue preemption requests from the tasklet in
> +* GuC submission mode.
> +* Even though tasklet was disabled, we may still have a worker 
> queued.
> +* Let's make sure that all workers scheduled before disabling the
> +* tasklet are completed before continuing with the reset.
> +*/
> +   if (i915_modparams.enable_guc_submission)

Don't we have engine->i915->guc.preempt_ctx or something a bit more
specific than a modparam?

> +   flush_workqueue(engine->i915->guc.preempt_wq);

Ok, after some thought, this is the preferred order. If we do the flush
early, we may end up a worker queued before we kill the tasklet. Too
late and tasklet_action spins a little; that's better than parallel
writes into the hw.
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for Preemption with GuC, third attempt

[Patchwork]

== Series Details ==

Series: Preemption with GuC, third attempt
URL   : https://patchwork.freedesktop.org/series/32320/
State : failure

== Summary ==

Series 32320v1 Preemption with GuC, third attempt
https://patchwork.freedesktop.org/api/1.0/series/32320/revisions/1/mbox/

Test gem_ringfill:
Subgroup basic-default-hang:
pass   -> DMESG-WARN (fi-skl-6700k)
Test gem_sync:
Subgroup basic-all:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-each:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-many-each:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-store-all:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-store-each:
pass   -> SKIP   (fi-skl-6700k)
Test gem_tiled_blits:
Subgroup basic:
pass   -> SKIP   (fi-skl-6700k)
Test gem_tiled_fence_blits:
Subgroup basic:
pass   -> SKIP   (fi-skl-6700k)
Test gem_wait:
Subgroup basic-busy-all:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-wait-all:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-await-all:
pass   -> SKIP   (fi-skl-6700k)
Test gem_workarounds:
Subgroup basic-read:
pass   -> SKIP   (fi-skl-6700k)
Test kms_busy:
Subgroup basic-flip-a:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-flip-c:
pass   -> SKIP   (fi-skl-6700k) fdo#103097
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
pass   -> SKIP   (fi-skl-6700k)
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test kms_frontbuffer_tracking:
Subgroup basic:
pass   -> SKIP   (fi-skl-6700k)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-b:
pass   -> DMESG-FAIL (fi-elk-e7500)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass   -> DMESG-FAIL (fi-elk-e7500)
Subgroup nonblocking-crc-pipe-c-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-b:
pass   -> INCOMPLETE (fi-elk-e7500)
Test drv_module_reload:
Subgroup basic-reload:
pass   -> DMESG-WARN (fi-skl-6700k)

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#103097 https://bugs.freedesktop.org/show_bug.cgi?id=103097
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:442s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:450s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:518s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:265s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:501s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:511s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:489s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:480s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:581s
fi-elk-e7500 total:241  pass:188  dwarn:0   dfail:2   fail:0   skip:50 
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:581s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:445s
fi-hsw-4770r total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:431s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:442s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:455s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:578s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:482s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  p

[Intel-gfx] [PATCH v2] drm/i915: Add Guc/HuC firmware details to error state

[Michal Wajdeczko]

Include GuC and HuC firmware details in captured error state
to provide additional debug information. To reuse existing
uc firmware pretty printer, introduce new drm-printer variant
that works with our i915_error_state_buf output. Also update
uc firmware pretty printer to accept const input.

v2: don't rely on current caps (Chris)
dump correct fw info (Michal)

Suggested-by: Chris Wilson 
Signed-off-by: Michal Wajdeczko 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_drv.h   |  4 
 drivers/gpu/drm/i915/i915_gpu_error.c | 42 +++
 drivers/gpu/drm/i915/intel_uc_fw.c|  2 +-
 drivers/gpu/drm/i915/intel_uc_fw.h|  2 +-
 4 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c2649c..4d6519b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -911,6 +911,10 @@ struct i915_gpu_state {
struct intel_device_info device_info;
struct i915_params params;
 
+   /* uC state */
+   struct intel_uc_fw guc_fw;
+   struct intel_uc_fw huc_fw;
+
/* Generic register state */
u32 eir;
u32 pgtbl_er;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 653fb69..2defbb4 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -30,6 +30,8 @@
 #include 
 #include 
 #include 
+#include 
+
 #include "i915_drv.h"
 
 static const char *engine_str(int engine)
@@ -175,6 +177,21 @@ static void i915_error_puts(struct 
drm_i915_error_state_buf *e,
 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 #define err_puts(e, s) i915_error_puts(e, s)
 
+static void __i915_printfn_error(struct drm_printer *p, struct va_format *vaf)
+{
+   i915_error_vprintf(p->arg, vaf->fmt, *vaf->va);
+}
+
+static inline struct drm_printer
+i915_error_printer(struct drm_i915_error_state_buf *e)
+{
+   struct drm_printer p = {
+   .printfn = __i915_printfn_error,
+   .arg = e,
+   };
+   return p;
+}
+
 #ifdef CONFIG_DRM_I915_COMPRESS_ERROR
 
 struct compress {
@@ -592,8 +609,10 @@ static void err_print_pciid(struct 
drm_i915_error_state_buf *m,
 int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
const struct i915_gpu_state *error)
 {
+   struct drm_printer p = i915_error_printer(m);
struct drm_i915_private *dev_priv = m->i915;
struct drm_i915_error_object *obj;
+
int i, j;
 
if (!error) {
@@ -774,6 +793,11 @@ int i915_error_state_to_str(struct 
drm_i915_error_state_buf *m,
err_print_capabilities(m, &error->device_info);
err_print_params(m, &error->params);
 
+   if (error->device_info.has_guc) {
+   intel_uc_fw_dump(&error->guc_fw, &p);
+   intel_uc_fw_dump(&error->huc_fw, &p);
+   }
+
if (m->bytes == 0 && m->err)
return m->err;
 
@@ -1559,6 +1583,23 @@ static void i915_capture_pinned_buffers(struct 
drm_i915_private *dev_priv,
error->pinned_bo = bo;
 }
 
+static void i915_capture_uc_state(struct drm_i915_private *dev_priv,
+ struct i915_gpu_state *error)
+{
+   error->guc_fw = dev_priv->guc.fw;
+   error->huc_fw = dev_priv->huc.fw;
+
+   /* Make sure to capture custom firmware paths */
+   if (i915_modparams.guc_firmware_path) {
+   error->guc_fw.path = error->params.guc_firmware_path;
+   GEM_BUG_ON(strcmp(error->guc_fw.path, dev_priv->guc.fw.path));
+   }
+   if (i915_modparams.huc_firmware_path) {
+   error->huc_fw.path = error->params.huc_firmware_path;
+   GEM_BUG_ON(strcmp(error->huc_fw.path, dev_priv->huc.fw.path));
+   }
+}
+
 static void i915_gem_capture_guc_log_buffer(struct drm_i915_private *dev_priv,
struct i915_gpu_state *error)
 {
@@ -1710,6 +1751,7 @@ static int capture(void *data)
I915_PARAMS_FOR_EACH(DUP);
 #undef DUP
 
+   i915_capture_uc_state(error->i915, error);
i915_capture_gen_state(error->i915, error);
i915_capture_reg_state(error->i915, error);
i915_gem_record_fences(error->i915, error);
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.c 
b/drivers/gpu/drm/i915/intel_uc_fw.c
index 973888e..4bc82d3 100644
--- a/drivers/gpu/drm/i915/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/intel_uc_fw.c
@@ -299,7 +299,7 @@ void intel_uc_fw_fini(struct intel_uc_fw *uc_fw)
  *
  * Pretty printer for uC firmware.
  */
-void intel_uc_fw_dump(struct intel_uc_fw *uc_fw, struct drm_printer *p)
+void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
 {
drm_printf(p, "%s firmware: %s\n",
   intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.h 
b/drivers/gpu/drm/i915/intel_u

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev2)
URL   : https://patchwork.freedesktop.org/series/32247/
State : failure

== Summary ==

Series 32247v2 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/

Test kms_busy:
Subgroup basic-flip-a:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-c:
pass   -> SKIP   (fi-hsw-4770r)
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-after-cursor-atomic:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-after-cursor-legacy:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-after-cursor-varying-size:
pass   -> SKIP   (fi-hsw-4770r)
incomplete -> PASS   (fi-skl-6260u)
Subgroup basic-flip-before-cursor-atomic:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-before-cursor-legacy:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-before-cursor-varying-size:
pass   -> SKIP   (fi-hsw-4770r)
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-vs-modeset:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-flip-vs-wf_vblank:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-plain-flip:
pass   -> SKIP   (fi-hsw-4770r)
pass   -> INCOMPLETE (fi-skl-6700hq)
Test kms_frontbuffer_tracking:
Subgroup basic:
pass   -> SKIP   (fi-hsw-4770r)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup hang-read-crc-pipe-b:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup hang-read-crc-pipe-c:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-a-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-b:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-b-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-c:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup nonblocking-crc-pipe-c-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-a-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-b:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-b-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r) fdo#102332
Subgroup read-crc-pipe-c:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup read-crc-pipe-c-frame-sequence:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup suspend-read-crc-pipe-a:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup suspend-read-crc-pipe-b:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup suspend-read-crc-pipe-c:
pass   -> SKIP   (fi-hsw-4770r)
Test pm_rpm:
Subgroup basic-pci-d3-state:
pass   -> SKIP   (fi-hsw-4770r)
Subgroup basic-rte:
pass   -> SKIP   (fi-hsw-4770r)
Test prime_vgem:
Subgroup basic-fence-flip:
pass   -> SKIP   (fi-hsw-4770r)

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fdo#102332 https://bugs.freedesktop.org/show_bug.cgi?id=102332

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:439s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:452s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:371s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:526s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   ski

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for 
ILK watermarks
URL   : https://patchwork.freedesktop.org/series/32301/
State : success

== Summary ==

Test kms_flip:
Subgroup plain-flip-fb-recreate-interruptible:
pass   -> FAIL   (shard-hsw) fdo#100368
Subgroup flip-vs-expired-vblank-interruptible:
pass   -> FAIL   (shard-hsw) fdo#102887
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
dmesg-warn -> PASS   (shard-hsw) fdo#102249 +1
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#103038

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249
fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038

shard-hswtotal:2540 pass:1426 dwarn:3   dfail:0   fail:10  skip:1101 
time:9178s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6108/shards.html
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Re: [Intel-gfx] [PATCH] drm/i915: Add Guc/HuC firmware details to error state

[Michal Wajdeczko]

On Thu, 19 Oct 2017 15:30:44 +0200, Chris Wilson  
 wrote:



Quoting Michal Wajdeczko (2017-10-19 13:57:06)
@@ -774,6 +793,11 @@ int i915_error_state_to_str(struct  
drm_i915_error_state_buf *m,

err_print_capabilities(m, &error->device_info);
err_print_params(m, &error->params);

+   if (HAS_GUC(dev_priv)) {


Could we not peek inside the struct to know if it has been set? Looking
at the current device should be a last resort -- better to assume that
everything and anything may have been overwritten since the error.


I was following earlier patterns where HAS_CSR/IS_GEN were used.
Will change into:

if (error->device_info.has_guc) {




+   intel_uc_fw_dump(&dev_priv->guc.fw, &p);
+   intel_uc_fw_dump(&dev_priv->huc.fw, &p);
+   }


Ooops, I don't know how it happen but above dump should be:

intel_uc_fw_dump(&error->guc_fw, &p);
intel_uc_fw_dump(&error->huc_fw, &p);

Michal
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[Intel-gfx] [PATCH 13/14] drm/i915/guc: Workaround the missing user interrupt after preemption

[Michał Winiarski]

With GuC, we're scheduling tasklet on USER_INTERRUPT - since some work
has completed, perhaps we're able to submit some more work. We're doing
similar thing for preemption - after preemption has completed, it's time
to schedule the tasklet and submit more work (since the engine is now
idle). Unfortunately, we can hit the scenarios where the preemption is
done, but the interrupt is nowhere to be seen. To work around the
problem, let's use a delayed work that's kicking the tasklet if
preemption is done, and queueing itself otherwise.

Testcase: igt/gem_exec_whisper/*-priority
Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Jeff McGee 
Cc: John Harrison 
Cc: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 36 +-
 drivers/gpu/drm/i915/intel_guc.h   |  1 +
 2 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index a11ed4deff4b..dbb03b5481d2 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -574,6 +574,26 @@ static void flush_ggtt_writes(struct i915_vma *vma)
POSTING_READ_FW(GUC_STATUS);
 }
 
+#define GUC_LOST_IRQ_WORK_DELAY_MS 100
+static void guc_lost_user_interrupt(struct work_struct *work)
+{
+   struct guc_preempt_work *preempt_work =
+   container_of(to_delayed_work(work), typeof(*preempt_work),
+lost_irq_work);
+   struct intel_engine_cs *engine = preempt_work->engine;
+   struct intel_guc *guc = &engine->i915->guc;
+   struct guc_shared_ctx_data *data = guc->shared_data_vaddr;
+   struct guc_ctx_report *report = 
&data->preempt_ctx_report[engine->guc_id];
+
+   if (report->report_return_status == INTEL_GUC_REPORT_STATUS_COMPLETE)
+   tasklet_schedule(&engine->execlists.irq_tasklet);
+   else
+   queue_delayed_work(guc->preempt_wq,
+  &preempt_work->lost_irq_work,
+  
msecs_to_jiffies(GUC_LOST_IRQ_WORK_DELAY_MS));
+
+}
+
 #define GUC_PREEMPT_FINISHED 0x1
 #define GUC_PREEMPT_BREADCRUMB_DWORDS 0x8
 static void inject_preempt_context(struct work_struct *work)
@@ -629,7 +649,13 @@ static void inject_preempt_context(struct work_struct 
*work)
if (WARN_ON(intel_guc_send(guc, data, ARRAY_SIZE(data {
WRITE_ONCE(engine->execlists.preempt, false);
tasklet_schedule(&engine->execlists.irq_tasklet);
+
+   return;
}
+
+   queue_delayed_work(engine->i915->guc.preempt_wq,
+  &preempt_work->lost_irq_work,
+  msecs_to_jiffies(GUC_LOST_IRQ_WORK_DELAY_MS));
 }
 
 /*
@@ -647,6 +673,10 @@ static void wait_for_guc_preempt_report(struct 
intel_engine_cs *engine)
struct guc_shared_ctx_data *data = guc->shared_data_vaddr;
struct guc_ctx_report *report = 
&data->preempt_ctx_report[engine->guc_id];
 
+   /* If we landed here, it means that we didn't lose an interrupt, and
+* we can safely cancel the worker */
+   cancel_delayed_work(&guc->preempt_work[engine->id].lost_irq_work);
+
WARN_ON(wait_for_atomic(report->report_return_status ==
INTEL_GUC_REPORT_STATUS_COMPLETE,
GUC_PREEMPT_POSTPROCESS_DELAY_MS));
@@ -1229,6 +1259,8 @@ static int guc_preempt_work_create(struct intel_guc *guc)
for_each_engine(engine, dev_priv, id) {
guc->preempt_work[id].engine = engine;
INIT_WORK(&guc->preempt_work[id].work, inject_preempt_context);
+   INIT_DELAYED_WORK(&guc->preempt_work[id].lost_irq_work,
+ guc_lost_user_interrupt);
}
 
return 0;
@@ -1240,8 +1272,10 @@ static void guc_preempt_work_destroy(struct intel_guc 
*guc)
struct intel_engine_cs *engine;
enum intel_engine_id id;
 
-   for_each_engine(engine, dev_priv, id)
+   for_each_engine(engine, dev_priv, id) {
+   cancel_delayed_work_sync(&guc->preempt_work[id].lost_irq_work);
cancel_work_sync(&guc->preempt_work[id].work);
+   }
 
destroy_workqueue(guc->preempt_wq);
 }
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 7273a6be7dc1..0c9338b5c4b8 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -49,6 +49,7 @@ enum i915_guc_client_id {
 struct guc_preempt_work {
struct intel_engine_cs *engine;
struct work_struct work;
+   struct delayed_work lost_irq_work;
 };
 
 struct intel_guc {
-- 
2.13.6

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[Intel-gfx] [PATCH 14/14] HAX Enable GuC Submission for CI

[Michał Winiarski]

Also:
Revert "drm/i915/guc: Assert that we switch between known ggtt->invalidate 
functions"

This reverts commit 04f7b24eccdfae680a36e9825fe0d61dcd5ed528.
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
 drivers/gpu/drm/i915/i915_params.h  | 4 ++--
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 527a2d2d6281..74479ea31d60 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3568,17 +3568,13 @@ int i915_ggtt_enable_hw(struct drm_i915_private 
*dev_priv)
 
 void i915_ggtt_enable_guc(struct drm_i915_private *i915)
 {
-   GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
-
i915->ggtt.invalidate = guc_ggtt_invalidate;
 }
 
 void i915_ggtt_disable_guc(struct drm_i915_private *i915)
 {
-   /* We should only be called after i915_ggtt_enable_guc() */
-   GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
-
-   i915->ggtt.invalidate = gen6_ggtt_invalidate;
+   if (i915->ggtt.invalidate == guc_ggtt_invalidate)
+   i915->ggtt.invalidate = gen6_ggtt_invalidate;
 }
 
 void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index c7292268ed43..c38cef07b9fe 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -44,8 +44,8 @@
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
-   param(int, enable_guc_loading, 0) \
-   param(int, enable_guc_submission, 0) \
+   param(int, enable_guc_loading, 1) \
+   param(int, enable_guc_submission, 1) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
-- 
2.13.6

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[Intel-gfx] [PATCH v2 11/14] drm/i915: Rename helpers used for unwinding, use macro for can_preempt

[Michał Winiarski]

We would also like to make use of execlist_cancel_port_requests and
unwind_incomplete_requests in GuC preemption backend.
Let's rename the functions to use the correct prefixes, so that we can
simply add the declarations in the following patch.
Similar thing for applies for can_preempt, except we're introducing
HAS_LOGICAL_RING_PREEMPTION macro instad, converting other users that
were previously touching device info directly.

v2: s/intel_engine/execlists and pass execlists to unwind (Chris)

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Michal Wajdeczko 
---
 drivers/gpu/drm/i915/i915_drv.c|  2 +-
 drivers/gpu/drm/i915/i915_drv.h|  2 ++
 drivers/gpu/drm/i915/intel_engine_cs.c |  6 +++---
 drivers/gpu/drm/i915/intel_lrc.c   | 24 +++-
 4 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3db5851756f0..7b871802ae36 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -372,7 +372,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
value |= I915_SCHEDULER_CAP_ENABLED;
value |= I915_SCHEDULER_CAP_PRIORITY;
 
-   if (INTEL_INFO(dev_priv)->has_logical_ring_preemption &&
+   if (HAS_LOGICAL_RING_PREEMPTION(dev_priv) &&
i915_modparams.enable_execlists &&
!i915_modparams.enable_guc_submission)
value |= I915_SCHEDULER_CAP_PREEMPTION;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3c2649c27f88..caa8e79b38b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3135,6 +3135,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 
 #define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \
((dev_priv)->info.has_logical_ring_contexts)
+#define HAS_LOGICAL_RING_PREEMPTION(dev_priv) \
+   ((dev_priv)->info.has_logical_ring_preemption)
 #define USES_PPGTT(dev_priv)   (i915_modparams.enable_ppgtt)
 #define USES_FULL_PPGTT(dev_priv)  (i915_modparams.enable_ppgtt >= 2)
 #define USES_FULL_48BIT_PPGTT(dev_priv)(i915_modparams.enable_ppgtt == 
3)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index a47a9c6bea52..db590d34ed48 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -620,7 +620,7 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
 * Similarly the preempt context must always be available so that
 * we can interrupt the engine at any time.
 */
-   if (INTEL_INFO(engine->i915)->has_logical_ring_preemption) {
+   if (HAS_LOGICAL_RING_PREEMPTION(engine->i915)) {
ring = engine->context_pin(engine,
   engine->i915->preempt_context);
if (IS_ERR(ring)) {
@@ -651,7 +651,7 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
 err_breadcrumbs:
intel_engine_fini_breadcrumbs(engine);
 err_unpin_preempt:
-   if (INTEL_INFO(engine->i915)->has_logical_ring_preemption)
+   if (HAS_LOGICAL_RING_PREEMPTION(engine->i915))
engine->context_unpin(engine, engine->i915->preempt_context);
 err_unpin_kernel:
engine->context_unpin(engine, engine->i915->kernel_context);
@@ -679,7 +679,7 @@ void intel_engine_cleanup_common(struct intel_engine_cs 
*engine)
intel_engine_cleanup_cmd_parser(engine);
i915_gem_batch_pool_fini(&engine->batch_pool);
 
-   if (INTEL_INFO(engine->i915)->has_logical_ring_preemption)
+   if (HAS_LOGICAL_RING_PREEMPTION(engine->i915))
engine->context_unpin(engine, engine->i915->preempt_context);
engine->context_unpin(engine, engine->i915->kernel_context);
 }
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f9852c422ea0..dd4708904c85 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -354,8 +354,11 @@ static void unwind_wa_tail(struct drm_i915_gem_request *rq)
assert_ring_tail_valid(rq->ring, rq->tail);
 }
 
-static void unwind_incomplete_requests(struct intel_engine_cs *engine)
+static void execlists_unwind_incomplete_requests(
+   const struct intel_engine_execlists * const execlists)
 {
+   struct intel_engine_cs *engine =
+   container_of(execlists, typeof(*engine), execlists);
struct drm_i915_gem_request *rq, *rn;
struct i915_priolist *uninitialized_var(p);
int last_prio = I915_PRIORITY_INVALID;
@@ -515,11 +518,6 @@ static void inject_preempt_context(struct intel_engine_cs 
*engine)
elsp_write(ce->lrc_desc, elsp);
 }
 
-static bool can_preempt(struct intel_engine_cs *engine)
-{
-   return INTEL_INFO(e

[Intel-gfx] [PATCH 10/14] drm/i915/guc: Keep request->priority for its lifetime

[Michał Winiarski]

We also want to support preemption with GuC submission backend.
In order to do that, we need to remember the priority, like we do on
execlists path.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Jeff McGee 
Cc: Joonas Lahtinen 
Reviewed-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index c0fdcdb8c41d..e47a5000fc03 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -659,7 +659,6 @@ static void i915_guc_dequeue(struct intel_engine_cs *engine)
}
 
INIT_LIST_HEAD(&rq->priotree.link);
-   rq->priotree.priority = INT_MAX;
 
__i915_gem_request_submit(rq);
trace_i915_gem_request_in(rq, port_index(port, 
execlists));
@@ -694,6 +693,7 @@ static void i915_guc_irq_handler(unsigned long data)
rq = port_request(&port[0]);
while (rq && i915_gem_request_completed(rq)) {
trace_i915_gem_request_out(rq);
+   rq->priotree.priority = INT_MAX;
i915_gem_request_put(rq);
 
execlists_port_complete(execlists, port);
-- 
2.13.6

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[Intel-gfx] [PATCH v3 12/14] drm/i915/guc: Preemption! With GuC

[Michał Winiarski]

Pretty similar to what we have on execlists.
We're reusing most of the GEM code, however, due to GuC quirks we need a
couple of extra bits.
Preemption is implemented as GuC action, and actions can be pretty slow.
Because of that, we're using a mutex to serialize them. Since we're
requesting preemption from the tasklet, the task of creating a workitem
and wrapping it in GuC action is delegated to a worker.

To distinguish that preemption has finished, we're using additional
piece of HWSP, and since we're not getting context switch interrupts,
we're also adding a user interrupt.

The fact that our special preempt context has completed unfortunately
doesn't mean that we're ready to submit new work. We also need to wait
for GuC to finish its own processing.

v2: Don't compile out the wait for GuC, handle workqueue flush on reset,
no need for ordered workqueue, put on a reviewer hat when looking at my own
patches (Chris)
Move struct work around in intel_guc, move user interruput outside of
conditional (Michał)
Keep ring around rather than chase though intel_context

v3: Extract WA for flushing ggtt writes to a helper (Chris)
Keep work_struct in intel_guc rather than engine (Michał)
Use ordered workqueue for inject_preempt worker to avoid GuC quirks.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Jeff McGee 
Cc: Joonas Lahtinen 
Cc: Oscar Mateo 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_drv.c|   3 +-
 drivers/gpu/drm/i915/i915_gem.c|  10 ++
 drivers/gpu/drm/i915/i915_guc_submission.c | 206 +++--
 drivers/gpu/drm/i915/intel_guc.h   |   8 ++
 drivers/gpu/drm/i915/intel_lrc.c   |   4 +-
 drivers/gpu/drm/i915/intel_lrc.h   |   1 -
 drivers/gpu/drm/i915/intel_ringbuffer.h|   8 ++
 7 files changed, 222 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7b871802ae36..af745749509c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -373,8 +373,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
value |= I915_SCHEDULER_CAP_PRIORITY;
 
if (HAS_LOGICAL_RING_PREEMPTION(dev_priv) &&
-   i915_modparams.enable_execlists &&
-   !i915_modparams.enable_guc_submission)
+   i915_modparams.enable_execlists)
value |= I915_SCHEDULER_CAP_PREEMPTION;
}
break;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ef14c6d570dc..7d52baf4f3bd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2904,6 +2904,16 @@ i915_gem_reset_prepare_engine(struct intel_engine_cs 
*engine)
tasklet_kill(&engine->execlists.irq_tasklet);
tasklet_disable(&engine->execlists.irq_tasklet);
 
+   /*
+* We're using worker to queue preemption requests from the tasklet in
+* GuC submission mode.
+* Even though tasklet was disabled, we may still have a worker queued.
+* Let's make sure that all workers scheduled before disabling the
+* tasklet are completed before continuing with the reset.
+*/
+   if (i915_modparams.enable_guc_submission)
+   flush_workqueue(engine->i915->guc.preempt_wq);
+
if (engine->irq_seqno_barrier)
engine->irq_seqno_barrier(engine);
 
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index e47a5000fc03..a11ed4deff4b 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -559,6 +559,105 @@ static void guc_add_request(struct intel_guc *guc,
spin_unlock(&client->wq_lock);
 }
 
+/*
+ * When we're doing submissions using regular execlists backend, writing to
+ * ELSP from CPU side is enough to make sure that writes to ringbuffer pages
+ * pinned in mappable aperture portion of GGTT are visible to command streamer.
+ * Writes done by GuC on our behalf are not guaranteeing such ordering,
+ * therefore, to ensure the flush, we're issuing a POSTING READ.
+ */
+static void flush_ggtt_writes(struct i915_vma *vma)
+{
+   struct drm_i915_private *dev_priv = to_i915(vma->obj->base.dev);
+
+   if (i915_vma_is_map_and_fenceable(vma))
+   POSTING_READ_FW(GUC_STATUS);
+}
+
+#define GUC_PREEMPT_FINISHED 0x1
+#define GUC_PREEMPT_BREADCRUMB_DWORDS 0x8
+static void inject_preempt_context(struct work_struct *work)
+{
+   struct guc_preempt_work *preempt_work =
+   container_of(work, typeof(*preempt_work), work);
+   struct intel_engine_cs *engine = preempt_work->engine;
+   struct intel_guc *guc = &engine->i915->guc;
+   struct i915_guc_client *client = guc->client[PREEMPT];
+   struct intel_ring *ring = client->owner->engine[engine->id].ring;
+ 

[Intel-gfx] [PATCH 09/14] drm/i915: Add information needed to track engine preempt state

[Michał Winiarski]

We shouldn't inspect ELSP context status (or any other bits depending on
specific submission backend) when using GuC submission.
Let's use another piece of HWSP for preempt context, to write its bit of
information, meaning that preemption has finished, and hardware is now
idle.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Reviewed-by: Chris Wilson 
Reviewed-by: Jeff McGee 
---
 drivers/gpu/drm/i915/intel_ringbuffer.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index fe8e52c839dd..8ad9a33e803b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -593,6 +593,8 @@ intel_write_status_page(struct intel_engine_cs *engine, int 
reg, u32 value)
  */
 #define I915_GEM_HWS_INDEX 0x30
 #define I915_GEM_HWS_INDEX_ADDR (I915_GEM_HWS_INDEX << 
MI_STORE_DWORD_INDEX_SHIFT)
+#define I915_GEM_HWS_PREEMPT_INDEX 0x32
+#define I915_GEM_HWS_PREEMPT_ADDR (I915_GEM_HWS_PREEMPT_INDEX << 
MI_STORE_DWORD_INDEX_SHIFT)
 #define I915_GEM_HWS_SCRATCH_INDEX 0x40
 #define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << 
MI_STORE_DWORD_INDEX_SHIFT)
 
@@ -745,6 +747,11 @@ static inline u32 intel_hws_seqno_address(struct 
intel_engine_cs *engine)
return engine->status_page.ggtt_offset + I915_GEM_HWS_INDEX_ADDR;
 }
 
+static inline u32 intel_hws_preempt_done_address(struct intel_engine_cs 
*engine)
+{
+   return engine->status_page.ggtt_offset + I915_GEM_HWS_PREEMPT_ADDR;
+}
+
 /* intel_breadcrumbs.c -- user interrupt bottom-half for waiters */
 int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine);
 
-- 
2.13.6

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[Intel-gfx] [PATCH v2 08/14] drm/i915: Extract "emit write" part of emit breadcrumb functions

[Michał Winiarski]

Let's separate the "emit" part from touching any internal structures,
this way we can have a generic "emit coherent GGTT write" function.
We would like to reuse this functionality for emitting HWSP write, to
confirm that preempt-to-idle has finished.

v2: Reorder args to match emit_pipe_control, s/render/rcs (Chris)

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/intel_lrc.c| 28 +++-
 drivers/gpu/drm/i915/intel_ringbuffer.h | 38 +
 2 files changed, 46 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a1e177258e3c..f9852c422ea0 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1783,10 +1783,8 @@ static void gen8_emit_breadcrumb(struct 
drm_i915_gem_request *request, u32 *cs)
/* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */
BUILD_BUG_ON(I915_GEM_HWS_INDEX_ADDR & (1 << 5));
 
-   *cs++ = (MI_FLUSH_DW + 1) | MI_FLUSH_DW_OP_STOREDW;
-   *cs++ = intel_hws_seqno_address(request->engine) | MI_FLUSH_DW_USE_GTT;
-   *cs++ = 0;
-   *cs++ = request->global_seqno;
+   cs = gen8_emit_ggtt_write(cs, request->global_seqno,
+ intel_hws_seqno_address(request->engine));
*cs++ = MI_USER_INTERRUPT;
*cs++ = MI_NOOP;
request->tail = intel_ring_offset(request, cs);
@@ -1796,24 +1794,14 @@ static void gen8_emit_breadcrumb(struct 
drm_i915_gem_request *request, u32 *cs)
 }
 static const int gen8_emit_breadcrumb_sz = 6 + WA_TAIL_DWORDS;
 
-static void gen8_emit_breadcrumb_render(struct drm_i915_gem_request *request,
+static void gen8_emit_breadcrumb_rcs(struct drm_i915_gem_request *request,
u32 *cs)
 {
/* We're using qword write, seqno should be aligned to 8 bytes. */
BUILD_BUG_ON(I915_GEM_HWS_INDEX & 1);
 
-   /* w/a for post sync ops following a GPGPU operation we
-* need a prior CS_STALL, which is emitted by the flush
-* following the batch.
-*/
-   *cs++ = GFX_OP_PIPE_CONTROL(6);
-   *cs++ = PIPE_CONTROL_GLOBAL_GTT_IVB | PIPE_CONTROL_CS_STALL |
-   PIPE_CONTROL_QW_WRITE;
-   *cs++ = intel_hws_seqno_address(request->engine);
-   *cs++ = 0;
-   *cs++ = request->global_seqno;
-   /* We're thrashing one dword of HWS. */
-   *cs++ = 0;
+   cs = gen8_emit_ggtt_write_rcs(cs, request->global_seqno,
+ intel_hws_seqno_address(request->engine));
*cs++ = MI_USER_INTERRUPT;
*cs++ = MI_NOOP;
request->tail = intel_ring_offset(request, cs);
@@ -1821,7 +1809,7 @@ static void gen8_emit_breadcrumb_render(struct 
drm_i915_gem_request *request,
 
gen8_emit_wa_tail(request, cs);
 }
-static const int gen8_emit_breadcrumb_render_sz = 8 + WA_TAIL_DWORDS;
+static const int gen8_emit_breadcrumb_rcs_sz = 8 + WA_TAIL_DWORDS;
 
 static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 {
@@ -1977,8 +1965,8 @@ int logical_render_ring_init(struct intel_engine_cs 
*engine)
engine->init_hw = gen8_init_render_ring;
engine->init_context = gen8_init_rcs_context;
engine->emit_flush = gen8_emit_flush_render;
-   engine->emit_breadcrumb = gen8_emit_breadcrumb_render;
-   engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_render_sz;
+   engine->emit_breadcrumb = gen8_emit_breadcrumb_rcs;
+   engine->emit_breadcrumb_sz = gen8_emit_breadcrumb_rcs_sz;
 
ret = intel_engine_create_scratch(engine, PAGE_SIZE);
if (ret)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 17186f067408..fe8e52c839dd 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -833,6 +833,44 @@ static inline u32 *gen8_emit_pipe_control(u32 *batch, u32 
flags, u32 offset)
return batch + 6;
 }
 
+static inline u32 *
+gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset)
+{
+   /* We're using qword write, offset should be aligned to 8 bytes. */
+   GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8));
+
+   /* w/a for post sync ops following a GPGPU operation we
+* need a prior CS_STALL, which is emitted by the flush
+* following the batch.
+*/
+   *cs++ = GFX_OP_PIPE_CONTROL(6);
+   *cs++ = PIPE_CONTROL_GLOBAL_GTT_IVB | PIPE_CONTROL_CS_STALL |
+   PIPE_CONTROL_QW_WRITE;
+   *cs++ = gtt_offset;
+   *cs++ = 0;
+   *cs++ = value;
+   /* We're thrashing one dword of HWS. */
+   *cs++ = 0;
+
+   return cs;
+}
+
+static inline u32 *
+gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset)
+{
+   /* w/a: bit 5 needs to be zero for MI_FLUSH_DW address. */
+   GEM_BUG_ON(gtt_offset & (1 << 5));
+   /* Offset should be aligned t

[Intel-gfx] [PATCH 07/14] drm/i915/guc: Split guc_wq_item_append

[Michał Winiarski]

We're using a special preempt context for HW to preempt into. We don't
want to emit any requests there, but we still need to wrap this context
into a valid GuC work item.
Let's cleanup the functions operating on GuC work items.
We can extract guc_request_add - responsible for adding GuC work item and
ringing the doorbell, and guc_wq_item_append - used by the function
above, not tied to the concept of gem request.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Reviewed-by: Chris Wilson 
Reviewed-by: Jeff McGee 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 55 --
 1 file changed, 30 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index d8b8125aa4cc..c0fdcdb8c41d 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -71,7 +71,7 @@
  * WQ_TYPE_INORDER is needed to support legacy submission via GuC, which
  * represents in-order queue. The kernel driver packs ring tail pointer and an
  * ELSP context descriptor dword into Work Item.
- * See guc_wq_item_append()
+ * See guc_add_request()
  *
  * ADS:
  * The Additional Data Struct (ADS) has pointers for different buffers used by
@@ -390,7 +390,7 @@ static void guc_stage_desc_init(struct intel_guc *guc,
 * submission or, in other words, not using a direct submission
 * model) the KMD's LRCA is not used for any work submission.
 * Instead, the GuC uses the LRCA of the user mode context (see
-* guc_wq_item_append below).
+* guc_add_request below).
 */
lrc->context_desc = lower_32_bits(ce->lrc_desc);
 
@@ -469,22 +469,18 @@ static void guc_shared_data_destroy(struct intel_guc *guc)
 
 /* Construct a Work Item and append it to the GuC's Work Queue */
 static void guc_wq_item_append(struct i915_guc_client *client,
-  struct drm_i915_gem_request *rq)
+  u32 target_engine, u32 context_desc,
+  u32 ring_tail, u32 fence_id)
 {
/* wqi_len is in DWords, and does not include the one-word header */
const size_t wqi_size = sizeof(struct guc_wq_item);
const u32 wqi_len = wqi_size / sizeof(u32) - 1;
-   struct intel_engine_cs *engine = rq->engine;
-   struct i915_gem_context *ctx = rq->ctx;
struct guc_process_desc *desc = __get_process_desc(client);
struct guc_wq_item *wqi;
-   u32 ring_tail, wq_off;
+   u32 wq_off;
 
lockdep_assert_held(&client->wq_lock);
 
-   ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
-   GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
-
/* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
 * should not have the case where structure wqi is across page, neither
 * wrapped to the beginning. This simplifies the implementation below.
@@ -506,15 +502,14 @@ static void guc_wq_item_append(struct i915_guc_client 
*client,
/* Now fill in the 4-word work queue item */
wqi->header = WQ_TYPE_INORDER |
  (wqi_len << WQ_LEN_SHIFT) |
- (engine->guc_id << WQ_TARGET_SHIFT) |
+ (target_engine << WQ_TARGET_SHIFT) |
  WQ_NO_WCFLUSH_WAIT;
-
-   wqi->context_desc = lower_32_bits(intel_lr_context_descriptor(ctx, 
engine));
-
+   wqi->context_desc = context_desc;
wqi->submit_element_info = ring_tail << WQ_RING_TAIL_SHIFT;
-   wqi->fence_id = rq->global_seqno;
+   GEM_BUG_ON(ring_tail > WQ_RING_TAIL_MAX);
+   wqi->fence_id = fence_id;
 
-   /* Postincrement WQ tail for next time. */
+   /* Make the update visible to GuC */
WRITE_ONCE(desc->tail, (wq_off + wqi_size) & (GUC_WQ_SIZE - 1));
 }
 
@@ -545,6 +540,25 @@ static void guc_ring_doorbell(struct i915_guc_client 
*client)
GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
 }
 
+static void guc_add_request(struct intel_guc *guc,
+   struct drm_i915_gem_request *rq)
+{
+   struct i915_guc_client *client = guc->client[SUBMIT];
+   struct intel_engine_cs *engine = rq->engine;
+   u32 ctx_desc = lower_32_bits(intel_lr_context_descriptor(rq->ctx, 
engine));
+   u32 ring_tail = intel_ring_set_tail(rq->ring, rq->tail) / sizeof(u64);
+
+   spin_lock(&client->wq_lock);
+
+   guc_wq_item_append(client, engine->guc_id, ctx_desc,
+  ring_tail, rq->global_seqno);
+   guc_ring_doorbell(client);
+
+   client->submissions[engine->id] += 1;
+
+   spin_unlock(&client->wq_lock);
+}
+
 /**
  * i915_guc_submit() - Submit commands through GuC
  * @engine: engine associated with the commands
@@ -556,10 +570,8 @@ static void i915_guc_submit(struct intel_engine_cs *engine)
 {

[Intel-gfx] [PATCH 05/14] drm/i915/guc: Add preemption action to GuC firmware interface

[Michał Winiarski]

We're using GuC action to request preemption. However, after requesting
preemption we need to wait for GuC to finish its own post-processing
before we start submitting our requests. Firmware is using shared
context to report its status.
Let's update GuC firmware interface with those new definitions.

Signed-off-by: Michał Winiarski 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Reviewed-by: Jeff McGee 
---
 drivers/gpu/drm/i915/intel_guc_fwif.h | 40 +++
 1 file changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h 
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 80c507435458..bc9897f96e56 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -544,9 +544,36 @@ union guc_log_control {
u32 value;
 } __packed;
 
+struct guc_ctx_report {
+   u32 report_return_status;
+   u32 reserved1[64];
+   u32 affected_count;
+   u32 reserved2[2];
+} __packed;
+
+/* GuC Shared Context Data Struct */
+struct guc_shared_ctx_data {
+   u32 addr_of_last_preempted_data_low;
+   u32 addr_of_last_preempted_data_high;
+   u32 addr_of_last_preempted_data_high_tmp;
+   u32 padding;
+   u32 is_mapped_to_proxy;
+   u32 proxy_ctx_id;
+   u32 engine_reset_ctx_id;
+   u32 media_reset_count;
+   u32 reserved1[8];
+   u32 uk_last_ctx_switch_reason;
+   u32 was_reset;
+   u32 lrca_gpu_addr;
+   u64 execlist_ctx;
+   u32 reserved2[66];
+   struct guc_ctx_report preempt_ctx_report[GUC_MAX_ENGINES_NUM];
+} __packed;
+
 /* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
 enum intel_guc_action {
INTEL_GUC_ACTION_DEFAULT = 0x0,
+   INTEL_GUC_ACTION_REQUEST_PREEMPTION = 0x2,
INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
@@ -562,6 +589,19 @@ enum intel_guc_action {
INTEL_GUC_ACTION_LIMIT
 };
 
+enum intel_guc_preempt_options {
+   INTEL_GUC_PREEMPT_OPTION_IMMEDIATE = 0x1,
+   INTEL_GUC_PREEMPT_OPTION_DROP_WORK_Q = 0x4,
+   INTEL_GUC_PREEMPT_OPTION_DROP_SUBMIT_Q = 0x8,
+};
+
+enum intel_guc_report_status {
+   INTEL_GUC_REPORT_STATUS_UNKNOWN = 0x0,
+   INTEL_GUC_REPORT_STATUS_ACKED = 0x1,
+   INTEL_GUC_REPORT_STATUS_ERROR = 0x2,
+   INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4,
+};
+
 /*
  * The GuC sends its response to a command by overwriting the
  * command in SS0. The response is distinguishable from a command
-- 
2.13.6

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[Intel-gfx] [PATCH v2 06/14] drm/i915/guc: Add a second client, to be used for preemption

[Michał Winiarski]

From: Dave Gordon 

This second client is created with priority KMD_HIGH, and marked
as preemptive. This will allow us to request preemption using GuC actions.

v2: Extract clients creation into a helper, debugfs fixups. (Michał)
Recreate doorbell on init. (Daniele)
Move clients into an array.

Signed-off-by: Dave Gordon 
Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Daniele Ceraolo Spurio 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
---
 drivers/gpu/drm/i915/i915_debugfs.c|  11 +--
 drivers/gpu/drm/i915/i915_guc_submission.c | 107 -
 drivers/gpu/drm/i915/intel_guc.h   |   9 ++-
 drivers/gpu/drm/i915/intel_uncore.c|   2 +-
 4 files changed, 91 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index c65e381b85f3..daf7a16a4ee2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2459,7 +2459,7 @@ static bool check_guc_submission(struct seq_file *m)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
 
-   if (!guc->execbuf_client) {
+   if (!guc->client[SUBMIT]) {
seq_printf(m, "GuC submission %s\n",
   HAS_GUC_SCHED(dev_priv) ?
   "disabled" :
@@ -2474,6 +2474,7 @@ static int i915_guc_info(struct seq_file *m, void *data)
 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
+   u32 i;
 
if (!check_guc_submission(m))
return 0;
@@ -2482,8 +2483,10 @@ static int i915_guc_info(struct seq_file *m, void *data)
seq_printf(m, "\t%*pb\n", GUC_NUM_DOORBELLS, guc->doorbell_bitmap);
seq_printf(m, "Doorbell next cacheline: 0x%x\n\n", guc->db_cacheline);
 
-   seq_printf(m, "\nGuC execbuf client @ %p:\n", guc->execbuf_client);
-   i915_guc_client_info(m, dev_priv, guc->execbuf_client);
+   for (i = 0; i < I915_GUC_NUM_CLIENTS; i++) {
+   seq_printf(m, "\nGuC client @ %p:\n", guc->client[i]);
+   i915_guc_client_info(m, dev_priv, guc->client[i]);
+   }
 
i915_guc_log_info(m, dev_priv);
 
@@ -2497,7 +2500,7 @@ static int i915_guc_stage_pool(struct seq_file *m, void 
*data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
struct guc_stage_desc *desc = guc->stage_desc_pool_vaddr;
-   struct i915_guc_client *client = guc->execbuf_client;
+   struct i915_guc_client *client = guc->client[SUBMIT];
unsigned int tmp;
int index;
 
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 0bd1fcffa78d..d8b8125aa4cc 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -33,10 +33,11 @@
  *
  * GuC client:
  * A i915_guc_client refers to a submission path through GuC. Currently, there
- * is only one of these (the execbuf_client) and this one is charged with all
- * submissions to the GuC. This struct is the owner of a doorbell, a process
- * descriptor and a workqueue (all of them inside a single gem object that
- * contains all required pages for these elements).
+ * are two clients. One of them (SUBMIT) is charged with all submissions to the
+ * GuC, the other one (PREEMPT) is responsible for preempting the SUBMIT one.
+ * This struct is the owner of a doorbell, a process descriptor and a workqueue
+ * (all of them inside a single gem object that contains all required pages for
+ * these elements).
  *
  * GuC stage descriptor:
  * During initialization, the driver allocates a static pool of 1024 such
@@ -363,6 +364,8 @@ static void guc_stage_desc_init(struct intel_guc *guc,
memset(desc, 0, sizeof(*desc));
 
desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE | 
GUC_STAGE_DESC_ATTR_KERNEL;
+   if (client->priority <= GUC_CLIENT_PRIORITY_HIGH)
+   desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
desc->stage_id = client->stage_id;
desc->priority = client->priority;
desc->db_id = client->doorbell_id;
@@ -553,7 +556,7 @@ static void i915_guc_submit(struct intel_engine_cs *engine)
 {
struct drm_i915_private *dev_priv = engine->i915;
struct intel_guc *guc = &dev_priv->guc;
-   struct i915_guc_client *client = guc->execbuf_client;
+   struct i915_guc_client *client = guc->client[SUBMIT];
struct intel_engine_execlists * const execlists = &engine->execlists;
struct execlist_port *port = execlists->port;
const unsigned int engine_id = engine->id;
@@ -750,10 +753,11 @@ static int __reset_doorbell(struct i915_guc_client* 
client, u16 db_id)
  */
 static int guc_init_doorbell_hw(struct intel_guc *guc)
 {
-   struct i915_guc_client *client = guc->execbuf_cl

[Intel-gfx] [PATCH 04/14] drm/i915/guc: Initialize GuC before restarting engines

[Michał Winiarski]

Now that we're handling request resubmission the same way as regular
submission (from the tasklet), we can move GuC initialization earlier,
before restarting the engines. This way, we're no longer being in the
state of flux during engine restart - we're already in user requested
submission mode.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Michal Wajdeczko 
Cc: Michel Thierry 
Cc: Mika Kuoppala 
Cc: Oscar Mateo 
Reviewed-by: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem.c| 10 +-
 drivers/gpu/drm/i915/i915_guc_submission.c |  7 ---
 drivers/gpu/drm/i915/intel_lrc.c   |  2 +-
 3 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d699ea3ab80b..ef14c6d570dc 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4881,6 +4881,11 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
goto out;
}
 
+   /* We can't enable contexts until all firmware is loaded */
+   ret = intel_uc_init_hw(dev_priv);
+   if (ret)
+   goto out;
+
/* Need to do basic initialisation of all rings first: */
ret = __i915_gem_restart_engines(dev_priv);
if (ret)
@@ -4888,11 +4893,6 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
 
intel_mocs_init_l3cc_table(dev_priv);
 
-   /* We can't enable contexts until all firmware is loaded */
-   ret = intel_uc_init_hw(dev_priv);
-   if (ret)
-   goto out;
-
 out:
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
return ret;
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 7097d81f4ac2..0bd1fcffa78d 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1189,14 +1189,7 @@ int i915_guc_submission_enable(struct drm_i915_private 
*dev_priv)
 
for_each_engine(engine, dev_priv, id) {
struct intel_engine_execlists * const execlists = 
&engine->execlists;
-   /* The tasklet was initialised by execlists, and may be in
-* a state of flux (across a reset) and so we just want to
-* take over the callback without changing any other state
-* in the tasklet.
-*/
execlists->irq_tasklet.func = i915_guc_irq_handler;
-   clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
-   tasklet_schedule(&execlists->irq_tasklet);
}
 
return 0;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 7f45dd7dc3e5..a1e177258e3c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1463,7 +1463,7 @@ static int gen8_init_common_ring(struct intel_engine_cs 
*engine)
execlists->preempt = false;
 
/* After a GPU reset, we may have requests to replay */
-   if (!i915_modparams.enable_guc_submission && execlists->first)
+   if (execlists->first)
tasklet_schedule(&execlists->irq_tasklet);
 
return 0;
-- 
2.13.6

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[Intel-gfx] [PATCH 02/14] drm/i915/guc: Extract GuC stage desc pool creation into a helper

[Michał Winiarski]

Since it's a two-step process, we can have a cleaner error handling in
the caller if we do the allocations in a helper.

Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Daniele Ceraolo Spurio 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Reviewed-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 65 +-
 1 file changed, 38 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 02ca2a412c62..4891eb1d9289 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -311,6 +311,37 @@ static void guc_proc_desc_init(struct intel_guc *guc,
desc->priority = client->priority;
 }
 
+static int guc_stage_desc_pool_create(struct intel_guc *guc)
+{
+   struct i915_vma *vma;
+   void *vaddr;
+
+   vma = intel_guc_allocate_vma(guc,
+PAGE_ALIGN(sizeof(struct guc_stage_desc) *
+GUC_MAX_STAGE_DESCRIPTORS));
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
+
+   vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+   if (IS_ERR(vaddr)) {
+   i915_vma_unpin_and_release(&vma);
+   return PTR_ERR(vaddr);
+   }
+
+   guc->stage_desc_pool = vma;
+   guc->stage_desc_pool_vaddr = vaddr;
+   ida_init(&guc->stage_ids);
+
+   return 0;
+}
+
+static void guc_stage_desc_pool_destroy(struct intel_guc *guc)
+{
+   ida_destroy(&guc->stage_ids);
+   i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
+   i915_vma_unpin_and_release(&guc->stage_desc_pool);
+}
+
 /*
  * Initialise/clear the stage descriptor shared with the GuC firmware.
  *
@@ -972,47 +1003,29 @@ static void guc_ads_destroy(struct intel_guc *guc)
 int i915_guc_submission_init(struct drm_i915_private *dev_priv)
 {
struct intel_guc *guc = &dev_priv->guc;
-   struct i915_vma *vma;
-   void *vaddr;
int ret;
 
if (guc->stage_desc_pool)
return 0;
 
-   vma = intel_guc_allocate_vma(guc,
-   PAGE_ALIGN(sizeof(struct guc_stage_desc) *
-   GUC_MAX_STAGE_DESCRIPTORS));
-   if (IS_ERR(vma))
-   return PTR_ERR(vma);
-
-   guc->stage_desc_pool = vma;
-
-   vaddr = i915_gem_object_pin_map(guc->stage_desc_pool->obj, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   ret = PTR_ERR(vaddr);
-   goto err_vma;
-   }
-
-   guc->stage_desc_pool_vaddr = vaddr;
+   ret = guc_stage_desc_pool_create(guc);
+   if (ret)
+   return ret;
 
ret = intel_guc_log_create(guc);
if (ret < 0)
-   goto err_vaddr;
+   goto err_stage_desc_pool;
 
ret = guc_ads_create(guc);
if (ret < 0)
goto err_log;
 
-   ida_init(&guc->stage_ids);
-
return 0;
 
 err_log:
intel_guc_log_destroy(guc);
-err_vaddr:
-   i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
-err_vma:
-   i915_vma_unpin_and_release(&guc->stage_desc_pool);
+err_stage_desc_pool:
+   guc_stage_desc_pool_destroy(guc);
return ret;
 }
 
@@ -1020,11 +1033,9 @@ void i915_guc_submission_fini(struct drm_i915_private 
*dev_priv)
 {
struct intel_guc *guc = &dev_priv->guc;
 
-   ida_destroy(&guc->stage_ids);
guc_ads_destroy(guc);
intel_guc_log_destroy(guc);
-   i915_gem_object_unpin_map(guc->stage_desc_pool->obj);
-   i915_vma_unpin_and_release(&guc->stage_desc_pool);
+   guc_stage_desc_pool_destroy(guc);
 }
 
 static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
-- 
2.13.6

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[Intel-gfx] [PATCH v2 03/14] drm/i915/guc: Allocate separate shared data object for GuC communication

[Michał Winiarski]

We were using first page of kernel context render state for sharing data
with GuC. While it's justified by the fact that those pages are not used
(note, GuC still enforces this layout and refuses to work if we remove
the extra page in front), it's also confusing (why are we using this
particular page?). Let's allocate a separate object instead.

v2: Drop kernel_context from GuC suspend/resume action handlers (Michel)

Suggested-by: Daniele Ceraolo Spurio 
Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Daniele Ceraolo Spurio 
Cc: Jeff McGee 
Cc: Michal Wajdeczko 
Cc: Oscar Mateo 
Reviewed-by: Daniele Ceraolo Spurio 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 36 +-
 drivers/gpu/drm/i915/intel_guc.c   | 14 ++--
 drivers/gpu/drm/i915/intel_guc.h   |  2 ++
 3 files changed, 39 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 4891eb1d9289..7097d81f4ac2 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -437,6 +437,33 @@ static void guc_stage_desc_fini(struct intel_guc *guc,
memset(desc, 0, sizeof(*desc));
 }
 
+static int guc_shared_data_create(struct intel_guc *guc)
+{
+   struct i915_vma *vma;
+   void *vaddr;
+
+   vma = intel_guc_allocate_vma(guc, PAGE_SIZE);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
+
+   vaddr = i915_gem_object_pin_map(vma->obj, I915_MAP_WB);
+   if (IS_ERR(vaddr)) {
+   i915_vma_unpin_and_release(&vma);
+   return PTR_ERR(vaddr);
+   }
+
+   guc->shared_data = vma;
+   guc->shared_data_vaddr = vaddr;
+
+   return 0;
+}
+
+static void guc_shared_data_destroy(struct intel_guc *guc)
+{
+   i915_gem_object_unpin_map(guc->shared_data->obj);
+   i915_vma_unpin_and_release(&guc->shared_data);
+}
+
 /* Construct a Work Item and append it to the GuC's Work Queue */
 static void guc_wq_item_append(struct i915_guc_client *client,
   struct drm_i915_gem_request *rq)
@@ -1012,9 +1039,13 @@ int i915_guc_submission_init(struct drm_i915_private 
*dev_priv)
if (ret)
return ret;
 
+   ret = guc_shared_data_create(guc);
+   if (ret)
+   goto err_stage_desc_pool;
+
ret = intel_guc_log_create(guc);
if (ret < 0)
-   goto err_stage_desc_pool;
+   goto err_shared_data;
 
ret = guc_ads_create(guc);
if (ret < 0)
@@ -1024,6 +1055,8 @@ int i915_guc_submission_init(struct drm_i915_private 
*dev_priv)
 
 err_log:
intel_guc_log_destroy(guc);
+err_shared_data:
+   guc_shared_data_destroy(guc);
 err_stage_desc_pool:
guc_stage_desc_pool_destroy(guc);
return ret;
@@ -1035,6 +1068,7 @@ void i915_guc_submission_fini(struct drm_i915_private 
*dev_priv)
 
guc_ads_destroy(guc);
intel_guc_log_destroy(guc);
+   guc_shared_data_destroy(guc);
guc_stage_desc_pool_destroy(guc);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 10037c0fdf95..f74d50fdaeb0 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -268,7 +268,6 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 
rsa_offset)
 int intel_guc_suspend(struct drm_i915_private *dev_priv)
 {
struct intel_guc *guc = &dev_priv->guc;
-   struct i915_gem_context *ctx;
u32 data[3];
 
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
@@ -276,14 +275,10 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv)
 
gen9_disable_guc_interrupts(dev_priv);
 
-   ctx = dev_priv->kernel_context;
-
data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
/* any value greater than GUC_POWER_D0 */
data[1] = GUC_POWER_D1;
-   /* first page is shared data with GuC */
-   data[2] = guc_ggtt_offset(ctx->engine[RCS].state) +
- LRC_GUCSHR_PN * PAGE_SIZE;
+   data[2] = guc_ggtt_offset(guc->shared_data);
 
return intel_guc_send(guc, data, ARRAY_SIZE(data));
 }
@@ -295,7 +290,6 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv)
 int intel_guc_resume(struct drm_i915_private *dev_priv)
 {
struct intel_guc *guc = &dev_priv->guc;
-   struct i915_gem_context *ctx;
u32 data[3];
 
if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
@@ -304,13 +298,9 @@ int intel_guc_resume(struct drm_i915_private *dev_priv)
if (i915_modparams.guc_log_level >= 0)
gen9_enable_guc_interrupts(dev_priv);
 
-   ctx = dev_priv->kernel_context;
-
data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
data[1] = GUC_POWER_D0;
-   /* first page is shared data with GuC */
-   data[2] = guc_ggtt_offset(ctx->engine[RCS].state) +
- LRC_GUCSHR_PN * PAGE_SIZE;
+   data[2] = guc_ggtt_offset(guc->shared_d

[Intel-gfx] [PATCH 01/14] drm/i915/guc: Do not use 0 for GuC doorbell cookie

[Michał Winiarski]

Apparently, this value is reserved and may be interpreted as changing
doorbell ownership. Even though we're not observing any side effects
now, let's skip over it to be consistent with the spec.

Suggested-by: Sagar Arun Kamble 
Signed-off-by: Michał Winiarski 
Cc: Chris Wilson 
Cc: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c 
b/drivers/gpu/drm/i915/i915_guc_submission.c
index a2e8114b739d..02ca2a412c62 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -475,9 +475,10 @@ static void guc_ring_doorbell(struct i915_guc_client 
*client)
/* pointer of current doorbell cacheline */
db = __get_doorbell(client);
 
-   /* we're not expecting the doorbell cookie to change behind our back */
+   /* we're not expecting the doorbell cookie to change behind our back,
+* we also need to treat 0 as a reserved value */
cookie = READ_ONCE(db->cookie);
-   WARN_ON_ONCE(xchg(&db->cookie, cookie + 1) != cookie);
+   WARN_ON_ONCE(xchg(&db->cookie, cookie + 1 ?: cookie + 2) != cookie);
 
/* XXX: doorbell was lost and need to acquire it again */
GEM_BUG_ON(db->db_status != GUC_DOORBELL_ENABLED);
-- 
2.13.6

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[Intel-gfx] [PATCH 00/14] Preemption with GuC, third attempt

[Michał Winiarski]

It turns out that preempt failures were caused by GuC not expecting multiple
workitems when preempt action was requested.
Another thing that deserves attention is the workaround for missing
USER_INTERRUPT. The value I've used for the delayed work timer is just a
semi-educated guess at this point.
There's also small oneline doorbell cleanup (we weren't observing any problems
with it, but Sagar pointed out that doorbell cookie with value 0 seems to be
reserved), and removal of unused variable (pointed out by Michel)

Dave Gordon (1):
  drm/i915/guc: Add a second client, to be used for preemption

Michał Winiarski (13):
  drm/i915/guc: Do not use 0 for GuC doorbell cookie
  drm/i915/guc: Extract GuC stage desc pool creation into a helper
  drm/i915/guc: Allocate separate shared data object for GuC
communication
  drm/i915/guc: Initialize GuC before restarting engines
  drm/i915/guc: Add preemption action to GuC firmware interface
  drm/i915/guc: Split guc_wq_item_append
  drm/i915: Extract "emit write" part of emit breadcrumb functions
  drm/i915: Add information needed to track engine preempt state
  drm/i915/guc: Keep request->priority for its lifetime
  drm/i915: Rename helpers used for unwinding, use macro for can_preempt
  drm/i915/guc: Preemption! With GuC
  drm/i915/guc: Workaround the missing user interrupt after preemption
  HAX Enable GuC Submission for CI

 drivers/gpu/drm/i915/i915_debugfs.c|  11 +-
 drivers/gpu/drm/i915/i915_drv.c|   5 +-
 drivers/gpu/drm/i915/i915_drv.h|   2 +
 drivers/gpu/drm/i915/i915_gem.c|  20 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c|   8 +-
 drivers/gpu/drm/i915/i915_guc_submission.c | 511 +++--
 drivers/gpu/drm/i915/i915_params.h |   4 +-
 drivers/gpu/drm/i915/intel_engine_cs.c |   6 +-
 drivers/gpu/drm/i915/intel_guc.c   |  14 +-
 drivers/gpu/drm/i915/intel_guc.h   |  20 +-
 drivers/gpu/drm/i915/intel_guc_fwif.h  |  40 +++
 drivers/gpu/drm/i915/intel_lrc.c   |  56 ++--
 drivers/gpu/drm/i915/intel_lrc.h   |   1 -
 drivers/gpu/drm/i915/intel_ringbuffer.h|  53 +++
 drivers/gpu/drm/i915/intel_uncore.c|   2 +-
 15 files changed, 575 insertions(+), 178 deletions(-)

-- 
2.13.6

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Re: [Intel-gfx] [PATCH i-g-t v2 3/3] igt: Add VC4 purgeable BO tests

[Eric Anholt]

Boris Brezillon  writes:

> Signed-off-by: Boris Brezillon 

I got a build error without including .  Rebased branch with
that changed is "purgeable" in my tree.


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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: CNL DVFS thing (rev2)
URL   : https://patchwork.freedesktop.org/series/32247/
State : failure

== Summary ==

Series 32247v2 drm/i915: CNL DVFS thing
https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/2/mbox/

Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a:
pass   -> INCOMPLETE (fi-skl-6700hq)

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:439s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:448s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:377s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:514s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:264s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:493s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:491s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:478s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:559s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:416s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:579s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:443s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:435s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:493s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:486s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:548s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:233  pass:208  dwarn:0   dfail:0   fail:0   skip:24 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:508s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:500s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:455s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:560s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:417s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
a47c474f5bb3 drm/i915: Adjust system agent voltage on CNL if required by DDI 
ports
ad731a2dd2c8 drm/i915: Use cdclk_state->voltage on CNL
cef8e0749338 drm/i915: Use cdclk_state->voltage on BXT/GLK
bf835fb0553b drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
7023b46c7035 drm/i915: Use cdclk_state->voltage on BDW
888417332cda drm/i915: Use cdclk_state->voltage on VLV/CHV
42ebf0bcacda drm/i915: Start tracking voltage level in the cdclk state
2d0f7ed970e9 drm/i915: Clean up some cdclk switch statements

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6109/
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Re: [Intel-gfx] [PATCH i-g-t 1/8] lib/igt_dummyload: add igt_cork

[Chris Wilson]

Quoting Daniele Ceraolo Spurio (2017-10-18 17:50:33)
> 
> 
> On 18/10/17 09:04, Chris Wilson wrote:
> > Quoting Daniele Ceraolo Spurio (2017-10-18 16:49:24)
> >>
> >>
> >> On 13/10/17 09:37, Daniele Ceraolo Spurio wrote:
> >>>
> >>>
> >>> On 13/10/17 01:31, Chris Wilson wrote:
>  Quoting Chris Wilson (2017-10-12 23:57:38)
> > Quoting Daniele Ceraolo Spurio (2017-10-12 23:27:27)
> >> +igt_cork_t *igt_cork_new(int fd);
> >
> > _new does not imply plugged.
> >
> >> +void igt_cork_signal(igt_cork_t *cork);
> >
> > When have you signaled a cork?
> >
> >> +void igt_cork_free(int fd, igt_cork_t *cork);
> >
> > _free does not imply unplug.
> 
>  To be clear the verbs are to plug and unplug a queue/schedule. Cork is a
>  reference to TCP_CORK which does the same thing, but plug/unplug are
>  more commonplace (at least in kernel code).
> 
>  I don't see any reason why we need a malloc here.
>  -Chris
> 
> >>>
> >>> I added the malloc just to use the same approach as the spin_batch, I'll
> >>> get rid of it.
> >>> My concern with the existing plug/unplug scheme was that the plug()
> >>> function in the various tests didn't really plug anything but just
> >>> created the bo and that was slightly confusing.
> > 
> > It created a bo with an unsignaled fence, that's enough to plug anything
> > attached to it. Since we can't just say plug(device) we have to say
> > execbuf(device, plug()).
> > 
> >>> What do you think of going with:
> >>>
> >>>   struct igt_cork {
> >>>       int device;
> >>>       uint32_t handle;
> >>>       uint32_t fence;
> >>>   };
> >>>
> >>>   struct igt_cork igt_cork_create(int fd);
> >>>   void igt_cork_unplug(struct igt_cork *cork);
> >>>   void igt_cork_close(int fd, struct igt_cork *cork);
> >>>   void igt_cork_unplug_and_close(int fd, struct igt_cork *cork);
> > 
> > close will always be unplug; there's no differentiation, in both APIs we
> > ensure that any fence associated with the device or timeline fd is
> > signaled upon release. We could lose the fence and still work, but for
> > us it gives us the means by which we can do a test-and-set and report an
> > issue where the fence was signaled too early (due to slow test setup).
> > Similarly once unplugged, there is no use for the struct anymore, you
> > could release the device/timeline, but we've embedded it because in
> > terms of overhead, so far it has been insignificant.
> > 
> > Leaving a fence dangling by separating unplug/close is a good way to
> > leave lots of timeouts and GPU resets behind.
> > -Chris
> > 
> 
> What I wanted to separate is the unplugging from the closing of the BO 
> handle, because in some case we keep the BO around for a while after 
> unblocking the execution.

Where? What value could it possibly have? You know the state of its
fence, so presumably you want the contents. In such a situation you don't
need a dummy cork to plug the queue, you have a real object with which
you want interact.

> In most of those cases the BO handle is not 
> currently closed,

Every single unplug() function is closing the device; which closes the
handle; gem_close() is superfluous. Early on I kept the vgem fd around
and just needed to close the handle, but it looks like all of those
functions have now been converted to own their device.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for 
ILK watermarks
URL   : https://patchwork.freedesktop.org/series/32301/
State : success

== Summary ==

Series 32301v1 series starting with [1/2] drm/i915: Do not rely on wm 
preservation for ILK watermarks
https://patchwork.freedesktop.org/api/1.0/series/32301/revisions/1/mbox/

Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:440s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:453s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:519s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:267s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:497s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:499s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:497s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:489s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:561s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:419s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:578s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:450s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:489s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:580s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:584s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:549s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:459s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:646s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:515s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:507s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:462s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:566s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
7a40e80cb14f drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
a8cc9f2f099f drm/i915: Do not rely on wm preservation for ILK watermarks

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6108/
___
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[Intel-gfx] [PATCH v2 3/8] drm/i915: Use cdclk_state->voltage on VLV/CHV

[Ville Syrjala]

From: Ville Syrjälä 

Store the punit DSPFREQUAR value into cdclk_state->voltage on
VLV/CHV. Since we can actually read that out from the hardware
this can give us a bit more cross checking between the hardware
and software state.

v2: Don't break waiting for cdclk change on VLV/CHV

Cc: Mika Kahola 
Cc: Manasi Navare 
Cc: Rodrigo Vivi 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_cdclk.c | 66 +-
 1 file changed, 50 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c 
b/drivers/gpu/drm/i915/intel_cdclk.c
index 52f8bb50..9cc4374797eb 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -437,13 +437,45 @@ static int vlv_calc_cdclk(struct drm_i915_private 
*dev_priv, int min_cdclk)
return 20;
 }
 
+static u8 vlv_calc_voltage(struct drm_i915_private *dev_priv, int cdclk)
+{
+   if (IS_VALLEYVIEW(dev_priv)) {
+   if (cdclk >= 32) /* jump to highest voltage for 400MHz too 
*/
+   return 2;
+   else if (cdclk >= 27)
+   return 1;
+   else
+   return 0;
+   } else {
+   /*
+* Specs are full of misinformation, but testing on actual
+* hardware has shown that we just need to write the desired
+* CCK divider into the Punit register.
+*/
+   return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
+   }
+}
+
 static void vlv_get_cdclk(struct drm_i915_private *dev_priv,
  struct intel_cdclk_state *cdclk_state)
 {
+   u32 val;
+
cdclk_state->vco = vlv_get_hpll_vco(dev_priv);
cdclk_state->cdclk = vlv_get_cck_clock(dev_priv, "cdclk",
   CCK_DISPLAY_CLOCK_CONTROL,
   cdclk_state->vco);
+
+   mutex_lock(&dev_priv->pcu_lock);
+   val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
+   mutex_unlock(&dev_priv->pcu_lock);
+
+   if (IS_VALLEYVIEW(dev_priv))
+   cdclk_state->voltage = (val & DSPFREQGUAR_MASK) >>
+   DSPFREQGUAR_SHIFT;
+   else
+   cdclk_state->voltage = (val & DSPFREQGUAR_MASK_CHV) >>
+   DSPFREQGUAR_SHIFT_CHV;
 }
 
 static void vlv_program_pfi_credits(struct drm_i915_private *dev_priv)
@@ -486,7 +518,19 @@ static void vlv_set_cdclk(struct drm_i915_private 
*dev_priv,
  const struct intel_cdclk_state *cdclk_state)
 {
int cdclk = cdclk_state->cdclk;
-   u32 val, cmd;
+   u32 val, cmd = cdclk_state->voltage;
+
+   switch (cdclk) {
+   case 40:
+   case 33:
+   case 32:
+   case 27:
+   case 20:
+   break;
+   default:
+   MISSING_CASE(cdclk);
+   return;
+   }
 
/* There are cases where we can end up here with power domains
 * off and a CDCLK frequency other than the minimum, like when
@@ -496,13 +540,6 @@ static void vlv_set_cdclk(struct drm_i915_private 
*dev_priv,
 */
intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
 
-   if (cdclk >= 32) /* jump to highest voltage for 400MHz too */
-   cmd = 2;
-   else if (cdclk == 27)
-   cmd = 1;
-   else
-   cmd = 0;
-
mutex_lock(&dev_priv->pcu_lock);
val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
val &= ~DSPFREQGUAR_MASK;
@@ -562,7 +599,7 @@ static void chv_set_cdclk(struct drm_i915_private *dev_priv,
  const struct intel_cdclk_state *cdclk_state)
 {
int cdclk = cdclk_state->cdclk;
-   u32 val, cmd;
+   u32 val, cmd = cdclk_state->voltage;
 
switch (cdclk) {
case 33:
@@ -583,13 +620,6 @@ static void chv_set_cdclk(struct drm_i915_private 
*dev_priv,
 */
intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
 
-   /*
-* Specs are full of misinformation, but testing on actual
-* hardware has shown that we just need to write the desired
-* CCK divider into the Punit register.
-*/
-   cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;
-
mutex_lock(&dev_priv->pcu_lock);
val = vlv_punit_read(dev_priv, PUNIT_REG_DSPFREQ);
val &= ~DSPFREQGUAR_MASK_CHV;
@@ -1859,11 +1889,15 @@ static int vlv_modeset_calc_cdclk(struct 
drm_atomic_state *state)
cdclk = vlv_calc_cdclk(dev_priv, min_cdclk);
 
intel_state->cdclk.logical.cdclk = cdclk;
+   intel_state->cdclk.logical.voltage =
+   vlv_calc_voltage(dev_priv, cdclk);
 
if (!intel_state->active_crtcs) {
cdclk = vlv_calc_cdclk(dev_priv, 0);
 
intel_state->cdclk.actual.cdclk = cdclk;
+   intel_state->cdclk.ac

Re: [Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: CNL DVFS thing

[Ville Syrjälä]

On Wed, Oct 18, 2017 at 09:07:37PM -, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: CNL DVFS thing
> URL   : https://patchwork.freedesktop.org/series/32247/
> State : warning
> 
> == Summary ==
> 
> Series 32247v1 drm/i915: CNL DVFS thing
> https://patchwork.freedesktop.org/api/1.0/series/32247/revisions/1/mbox/
> 
> Test debugfs_test:
> Subgroup read_all_entries:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)

[   57.469230] [drm:chv_set_cdclk [i915]] *ERROR* timed out waiting for CDclk 
change

Curious. I wonder what I broke there...

> Test gem_exec_suspend:
> Subgroup basic-s3:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-s4-devices:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Test kms_busy:
> Subgroup basic-flip-a:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup basic-flip-b:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup basic-flip-c:
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Test kms_cursor_legacy:
> Subgroup basic-busy-flip-before-cursor-atomic:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-busy-flip-before-cursor-legacy:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-after-cursor-atomic:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-after-cursor-legacy:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-after-cursor-varying-size:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-before-cursor-atomic:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-before-cursor-legacy:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-before-cursor-varying-size:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Test kms_flip:
> Subgroup basic-flip-vs-dpms:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-vs-modeset:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-flip-vs-wf_vblank:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup basic-plain-flip:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Test kms_force_connector_basic:
> Subgroup force-connector-state:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup force-load-detect:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Test kms_frontbuffer_tracking:
> Subgroup basic:
> pass   -> DMESG-WARN (fi-byt-j1900)
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Test kms_pipe_crc_basic:
> Subgroup hang-read-crc-pipe-a:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup hang-read-crc-pipe-b:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup hang-read-crc-pipe-c:
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup nonblocking-crc-pipe-a:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup nonblocking-crc-pipe-a-frame-sequence:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup nonblocking-crc-pipe-b:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup nonblocking-crc-pipe-b-frame-sequence:
> pass   -> DMESG-WARN (fi-byt-j1900) fdo#102619
> Subgroup nonblocking-crc-pipe-c:
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup nonblocking-crc-pipe-c-frame-sequence:
> pass   -> DMESG-WARN (fi-bsw-n3050)
> Subgroup read-crc-pipe-a:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup read-crc-pipe-a-frame-sequence:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup read-crc-pipe-b:
> pass   -> DMESG-WARN (fi-byt-j1900)
> Subgroup read-c

Re: [Intel-gfx] [PATCH i-g-t 5/8] tools/intel_vbt_decode: unify child device printing across versions

[Ville Syrjälä]

On Thu, Oct 19, 2017 at 06:22:56PM +0300, Jani Nikula wrote:
> Make it easier to compare dumping against the struct definition.
> 
> Signed-off-by: Jani Nikula 
> ---
>  tools/intel_vbt_decode.c | 128 
> ++-
>  1 file changed, 71 insertions(+), 57 deletions(-)
> 
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index 69cf1e4c6cc6..bc5f38112619 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -401,74 +401,88 @@ static const char *mipi_bridge_type(uint8_t type)
>  static void dump_child_device(struct context *context,
> const struct child_device_config *child)
>  {
> - const struct child_device_config *efp = child;
> -
>   if (!child->device_type)
>   return;
>  
> + printf("\tChild device info:\n");
> + printf("\t\tDevice handle: 0x%04x (%s)\n", child->handle,
> +child_device_handle(child->handle));
> + printf("\t\tDevice type: 0x%04x (%s)\n", child->device_type,
> +child_device_type(child->device_type));
> + dump_child_device_type_bits(child->device_type);
> +
>   if (context->bdb->version < 152) {
> - printf("\tChild device info:\n");
> - printf("\t\tDevice type: %04x (%s)\n", child->device_type,
> -child_device_type(child->device_type));
>   printf("\t\tSignature: %.*s\n", (int)sizeof(child->device_id), 
> child->device_id);
> - printf("\t\tAIM offset: %d\n", child->addin_offset);
> - printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
> - } else { /* 152+ have EFP blocks here */
> - printf("\tEFP device info:\n");
> - printf("\t\tDevice handle: 0x%04x (%s)\n", efp->handle,
> -child_device_handle(efp->handle));
> - printf("\t\tDevice type: 0x%04x (%s)\n", efp->device_type,
> -child_device_type(efp->device_type));
> - dump_child_device_type_bits(efp->device_type);
> - printf("\t\tI2C speed: 0x%02x\n", efp->i2c_speed);
> - printf("\t\tDP onboard redriver: 0x%02x\n", 
> efp->dp_onboard_redriver);
> - printf("\t\tDP ondock redriver: 0x%02x\n", 
> efp->dp_ondock_redriver);
> - printf("\t\tHDMI max data rate: 0x%02x\n", 
> efp->hdmi_max_data_rate);
> - printf("\t\tHDMI level shifter value: 0x%02x\n", 
> efp->hdmi_level_shifter_value);
> - printf("\t\tOffset to DTD buffer for edidless EFP: 0x%02x\n", 
> efp->dtd_buf_ptr);
> - printf("\t\tDual pipe ganged eDP: %s\n", 
> YESNO(efp->ganged_edp));
> - printf("\t\tCompression method CPS: %s\n", 
> YESNO(efp->compression_method));
> - printf("\t\tCompression enable: %s\n", 
> YESNO(efp->compression_enable));
> - printf("\t\tEdidless EFP: %s\n", YESNO(efp->edidless_efp));
> - printf("\t\tCompression structure index: 0x%02x)\n", 
> efp->compression_structure_index);
> - printf("\t\tSlave DDI port: 0x%02x (%s)\n", efp->slave_port, 
> dvo_port(efp->slave_port));
> - printf("\t\tAIM offset: %d\n", child->addin_offset);
> - printf("\t\tPort: 0x%02x (%s)\n", efp->dvo_port, 
> dvo_port(efp->dvo_port));
> - printf("\t\tAIM I2C pin: 0x%02x\n", efp->i2c_pin);
> - printf("\t\tAIM Slave address: 0x%02x\n", efp->slave_addr);
> - printf("\t\tDDC pin: 0x%02x\n", efp->ddc_pin);
> - printf("\t\tEDID buffer ptr: 0x%02x\n", efp->edid_ptr);
> - printf("\t\tDVO config: 0x%02x\n", efp->dvo_cfg);
> - printf("\t\tHPD sense invert: %s\n", YESNO(efp->hpd_invert));
> - printf("\t\tIboost enable: %s\n", YESNO(efp->iboost));
> - printf("\t\tOnboard LSPCON: %s\n", YESNO(efp->lspcon));
> - printf("\t\tLane reversal: %s\n", YESNO(efp->lane_reversal));
> - printf("\t\tEFP routed through dock: %s\n", 
> YESNO(efp->efp_routed));
> - printf("\t\tHDMI compatible? %s\n", YESNO(efp->hdmi_support));
> - printf("\t\tDP compatible? %s\n", YESNO(efp->dp_support));
> - printf("\t\tTMDS compatible? %s\n", YESNO(efp->tmds_support));
> - printf("\t\tAux channel: 0x%02x\n", efp->aux_channel);
> - printf("\t\tDongle detect: 0x%02x\n", efp->dongle_detect);
> - printf("\t\tIntegrated encoder instead of SDVO: %s\n", 
> YESNO(efp->integrated_encoder));
> - printf("\t\tHotplu connect status: 0x%02x\n", efp->hpd_status);
> - printf("\t\tSDVO stall signal available: %s\n", 
> YESNO(efp->sdvo_stall));
> - printf("\t\tPipe capabilities: 0x%02x\n", efp->pipe_cap);
> - printf("\t\tDVO wiring: 0x%02x\n", efp->dvo_wiring);
> - printf("\t\tMIPI bridge type: %02x (%s)\n", 
> efp->mipi_bridge_type,
> -mipi_bridge_type(efp->mipi_bridge_type));
> - 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Test kms_busy:
Subgroup extended-modeset-hang-newfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#103038

fdo#103038 https://bugs.freedesktop.org/show_bug.cgi?id=103038

shard-hswtotal:2540 pass:1428 dwarn:3   dfail:0   fail:8   skip:1101 
time:9230s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6107/shards.html
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[Intel-gfx] ✗ Fi.CI.BAT: failure for lib: Ask the kernel to quiesce the GPU (rev2)

[Patchwork]

== Series Details ==

Series: lib: Ask the kernel to quiesce the GPU (rev2)
URL   : https://patchwork.freedesktop.org/series/31850/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers before 
measuring available memory

with latest DRM-Tip kernel build CI_DRM_3266
9024f1a2827a drm-tip: 2017y-10m-19d-12h-57m-03s UTC integration manifest

No testlist changes.

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test gem_sync:
Subgroup basic-all:
pass   -> DMESG-FAIL (fi-blb-e6850)
pass   -> FAIL   (fi-pnv-d510)
Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test pm_rpm:
Subgroup basic-rte:
pass   -> SKIP   (fi-hsw-4770r)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:440s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:448s
fi-blb-e6850 total:289  pass:222  dwarn:1   dfail:1   fail:0   skip:65  
time:383s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:530s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:499s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:490s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:491s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:478s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:552s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:416s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:579s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:447s
fi-hsw-4770r total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:423s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:437s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:490s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:464s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:473s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:581s
fi-pnv-d510  total:289  pass:221  dwarn:1   dfail:0   fail:1   skip:66  
time:549s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:450s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:650s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:516s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:494s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:459s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:565s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:419s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_390/
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[Intel-gfx] ✗ Fi.CI.BAT: failure for tools/intel_vbt_decode: refactoring and cleanups

[Patchwork]

== Series Details ==

Series: tools/intel_vbt_decode: refactoring and cleanups
URL   : https://patchwork.freedesktop.org/series/32302/
State : failure

== Summary ==

IGT patchset tested on top of latest successful build
abc08cba366a64a07f7f4deb167ae7d6ae059958 lib: Free all internal buffers before 
measuring available memory

with latest DRM-Tip kernel build CI_DRM_3266
9024f1a2827a drm-tip: 2017y-10m-19d-12h-57m-03s UTC integration manifest

No testlist changes.

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test kms_flip:
Subgroup basic-plain-flip:
pass   -> INCOMPLETE (fi-skl-6700hq)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:458s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:375s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:539s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:267s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:502s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:500s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:495s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:489s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:546s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:412s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:253s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:579s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:451s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:437s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:482s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:461s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:572s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:585s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:545s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:453s
fi-skl-6700hqtotal:220  pass:199  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:515s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:506s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:454s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:569s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:425s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_389/
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2)
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v2 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/2/mbox/

Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test drv_module_reload:
Subgroup basic-reload-inject:
dmesg-warn -> INCOMPLETE (fi-cfl-s) fdo#103206

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fdo#103206 https://bugs.freedesktop.org/show_bug.cgi?id=103206

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:446s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:448s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:381s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:519s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:263s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:500s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:496s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:494s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:472s
fi-cfl-s total:288  pass:253  dwarn:3   dfail:0   fail:0   skip:31 
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:417s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:249s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:583s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:444s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:434s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:487s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:456s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:490s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:570s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:475s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:577s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:541s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:453s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:647s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:516s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:499s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:457s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:568s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:419s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
9bfbafa247c0 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6107/
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
URL   : https://patchwork.freedesktop.org/series/32305/
State : success

== Summary ==

Series 32305v1 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
https://patchwork.freedesktop.org/api/1.0/series/32305/revisions/1/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#102514
Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:439s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:453s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:373s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:529s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:265s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:495s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:490s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:489s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:475s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:561s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:413s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:583s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:448s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:497s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:455s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:475s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:575s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:471s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:582s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:544s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:449s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:644s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:522s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:501s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:455s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:561s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
fa6f2c6e84c5 drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6106/
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Re: [Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Ville Syrjälä]

On Thu, Oct 19, 2017 at 08:45:21AM -0700, Rodrigo Vivi wrote:
> Starting on CNL we now need to map VBT DDC Pin to
> BSPec DDC Pin values. Not a direct translation anymore.
> 
> According to VBT
> Block 2 (General Bytes Definition)
> DDC Bus
> 
> +--+---++
> | DDI Type | VBT Value | Bspec Mapped Value |
> +--+---++
> | DDI-B| 0x1   | 0x1|
> | DDI-C| 0x2   | 0x2|
> | DDI-D| 0x3   | 0x4|
> | DDI-F| 0x4   | 0x3|
> +--+---++
> 
> Cc: Jani Nikula 
> Cc: Paulo Zanoni 
> Cc: Anusha Srivatsa 
> Cc: Clinton Taylor 
> Signed-off-by: Rodrigo Vivi 
> ---
>  drivers/gpu/drm/i915/intel_bios.c | 32 ++--
>  1 file changed, 22 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_bios.c 
> b/drivers/gpu/drm/i915/intel_bios.c
> index dc4fad30bf4f..e0e59cd52766 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1071,6 +1071,24 @@ static void sanitize_aux_ch(struct drm_i915_private 
> *dev_priv,
>   }
>  }
>  
> +#define DDC_BUS_DDI_B0x1
> +#define DDC_BUS_DDI_C0x2
> +#define DDC_BUS_DDI_D0x3
> +#define DDC_BUS_DDI_F0x4

enum perhaps?

> +
> +static u8 cnl_ddc_pin_map(u8 ddc_pin)
> +{
> + switch (ddc_pin) {
> + case DDC_BUS_DDI_B: return 0x1;
> + case DDC_BUS_DDI_C: return 0x2;
> + case DDC_BUS_DDI_D: return 0x4;
> + case DDC_BUS_DDI_F: return 0x3;

s/magic number/GMBUS_PIN_whatever/ ?

Also looks like this thing could be represented as an array instead,
even for *future* platforms.

> + default:
> + MISSING_CASE(ddc_pin);
> + return ddc_pin;
> + }
> +}
> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  u8 bdb_version)
>  {
> @@ -1164,16 +1182,10 @@ static void parse_ddi_port(struct drm_i915_private 
> *dev_priv, enum port port,
>   DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>  
>   if (is_dvi) {
> - info->alternate_ddc_pin = ddc_pin;
> -
> - /*
> -  * All VBTs that we got so far for B Stepping has this
> -  * information wrong for Port D. So, let's just ignore for now.
> -  */
> - if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> - port == PORT_D) {
> - info->alternate_ddc_pin = 0;
> - }
> + if (IS_CANNONLAKE(dev_priv))
> + info->alternate_ddc_pin = cnl_ddc_pin_map(ddc_pin);
> + else
> + info->alternate_ddc_pin = ddc_pin;
>  
>   sanitize_ddc_pin(dev_priv, port);
>   }
> -- 
> 2.13.5
> 
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Rodrigo Vivi]

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+--+---++
| DDI Type | VBT Value | Bspec Mapped Value |
+--+---++
| DDI-B| 0x1   | 0x1|
| DDI-C| 0x2   | 0x2|
| DDI-D| 0x3   | 0x4|
| DDI-F| 0x4   | 0x3|
+--+---++

v2: Move defines to a better place.
This is actually CNL_PCH not CNL only.

Cc: Jani Nikula 
Cc: Paulo Zanoni 
Cc: Anusha Srivatsa 
Cc: Clinton Taylor 
Signed-off-by: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/intel_bios.c | 27 +--
 drivers/gpu/drm/i915/intel_vbt_defs.h |  6 ++
 2 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..49e333826c2c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,19 @@ static void sanitize_aux_ch(struct drm_i915_private 
*dev_priv,
}
 }
 
+static u8 cnp_ddc_pin_map(u8 ddc_pin)
+{
+   switch (ddc_pin) {
+   case DDC_BUS_DDI_B: return 0x1;
+   case DDC_BUS_DDI_C: return 0x2;
+   case DDC_BUS_DDI_D: return 0x4;
+   case DDC_BUS_DDI_F: return 0x3;
+   default:
+   MISSING_CASE(ddc_pin);
+   return ddc_pin;
+   }
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
   u8 bdb_version)
 {
@@ -1164,16 +1177,10 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
if (is_dvi) {
-   info->alternate_ddc_pin = ddc_pin;
-
-   /*
-* All VBTs that we got so far for B Stepping has this
-* information wrong for Port D. So, let's just ignore for now.
-*/
-   if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-   port == PORT_D) {
-   info->alternate_ddc_pin = 0;
-   }
+   if (HAS_PCH_CNP(dev_priv))
+   info->alternate_ddc_pin = cnp_ddc_pin_map(ddc_pin);
+   else
+   info->alternate_ddc_pin = ddc_pin;
 
sanitize_ddc_pin(dev_priv, port);
}
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 7e2a96712d07..e2e9fc601a9e 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -308,6 +308,12 @@ struct bdb_general_features {
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE33
 
+/* ddc_pin DDI Type 155+ */
+#define DDC_BUS_DDI_B  0x1
+#define DDC_BUS_DDI_C  0x2
+#define DDC_BUS_DDI_D  0x3
+#define DDC_BUS_DDI_F  0x4
+
 /*
  * The child device config, aka the display device data structure, provides a
  * description of a port and its configuration on the platform.
-- 
2.13.5

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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Move execlists port head instead of memmoving array

[Chris Wilson]

Quoting Mika Kuoppala (2017-10-19 15:39:42)
> From: Mika Kuoppala 
> 
> As all our access to execlist ports are through head and tail
> helpers, we can now move the head instead of memmoving the array.
> 
> Cc: Michał Winiarski 
> Cc: Joonas Lahtinen 
> Cc: Chris Wilson 
> Signed-off-by: Mika Kuoppala 
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.h | 9 +
>  1 file changed, 5 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
> b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index cfec73400d0f..27f5c42ae7c8 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -573,12 +573,13 @@ static inline void
>  execlists_port_complete(struct intel_engine_execlists * const execlists,
> struct execlist_port * const port)
>  {
> -   const unsigned int m = execlists->port_mask;
> +   GEM_BUG_ON(port_index(port, execlists) != execlists->port_head);
> +   GEM_BUG_ON(!port_isset(port));
>  
> -   GEM_BUG_ON(port_index(port, execlists) != 0);
> +   port->request_count = NULL;
> +   GEM_DEBUG_DECL(port->context_id = 0);
memset(port, 0, sizeof(*port));

In my ring, we no longer needed the memset, but the tradeoff is tracking
the last_port.
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Do not rely on wm preservation for 
ILK watermarks
URL   : https://patchwork.freedesktop.org/series/32301/
State : warning

== Summary ==

Series 32301v1 series starting with [1/2] drm/i915: Do not rely on wm 
preservation for ILK watermarks
https://patchwork.freedesktop.org/api/1.0/series/32301/revisions/1/mbox/

Test kms_busy:
Subgroup basic-flip-b:
fail   -> PASS   (fi-gdg-551) fdo#102654
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-gdg-551) fdo#102618
Subgroup basic-flip-after-cursor-varying-size:
incomplete -> PASS   (fi-skl-6260u)
Test kms_flip:
Subgroup basic-flip-vs-dpms:
pass   -> WARN   (fi-hsw-4770)
pass   -> INCOMPLETE (fi-skl-6700hq) fdo#103124

fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654
fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618
fdo#103124 https://bugs.freedesktop.org/show_bug.cgi?id=103124

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:441s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:458s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:374s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:528s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:493s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:502s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:492s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:474s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:558s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:420s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:250s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:580s
fi-hsw-4770  total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:27  
time:449s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:428s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:489s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:457s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:485s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:566s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:476s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:583s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:548s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:445s
fi-skl-6700hqtotal:217  pass:196  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:515s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:497s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:458s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:569s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:428s

9024f1a2827aa921560ee3f985a5b418ef296435 drm-tip: 2017y-10m-19d-12h-57m-03s UTC 
integration manifest
10ebfdb43f85 drm/i915: Calculate ironlake intermediate watermarks correctly, v2.
ce0e2864d502 drm/i915: Do not rely on wm preservation for ILK watermarks

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6105/
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[Intel-gfx] [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.

[Rodrigo Vivi]

Starting on CNL we now need to map VBT DDC Pin to
BSPec DDC Pin values. Not a direct translation anymore.

According to VBT
Block 2 (General Bytes Definition)
DDC Bus

+--+---++
| DDI Type | VBT Value | Bspec Mapped Value |
+--+---++
| DDI-B| 0x1   | 0x1|
| DDI-C| 0x2   | 0x2|
| DDI-D| 0x3   | 0x4|
| DDI-F| 0x4   | 0x3|
+--+---++

Cc: Jani Nikula 
Cc: Paulo Zanoni 
Cc: Anusha Srivatsa 
Cc: Clinton Taylor 
Signed-off-by: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/intel_bios.c | 32 ++--
 1 file changed, 22 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index dc4fad30bf4f..e0e59cd52766 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1071,6 +1071,24 @@ static void sanitize_aux_ch(struct drm_i915_private 
*dev_priv,
}
 }
 
+#define DDC_BUS_DDI_B  0x1
+#define DDC_BUS_DDI_C  0x2
+#define DDC_BUS_DDI_D  0x3
+#define DDC_BUS_DDI_F  0x4
+
+static u8 cnl_ddc_pin_map(u8 ddc_pin)
+{
+   switch (ddc_pin) {
+   case DDC_BUS_DDI_B: return 0x1;
+   case DDC_BUS_DDI_C: return 0x2;
+   case DDC_BUS_DDI_D: return 0x4;
+   case DDC_BUS_DDI_F: return 0x3;
+   default:
+   MISSING_CASE(ddc_pin);
+   return ddc_pin;
+   }
+}
+
 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
   u8 bdb_version)
 {
@@ -1164,16 +1182,10 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
 
if (is_dvi) {
-   info->alternate_ddc_pin = ddc_pin;
-
-   /*
-* All VBTs that we got so far for B Stepping has this
-* information wrong for Port D. So, let's just ignore for now.
-*/
-   if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
-   port == PORT_D) {
-   info->alternate_ddc_pin = 0;
-   }
+   if (IS_CANNONLAKE(dev_priv))
+   info->alternate_ddc_pin = cnl_ddc_pin_map(ddc_pin);
+   else
+   info->alternate_ddc_pin = ddc_pin;
 
sanitize_ddc_pin(dev_priv, port);
}
-- 
2.13.5

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[Intel-gfx] [PATCH igt] lib: Ask the kernel to quiesce the GPU

[Chris Wilson]

Since the introduction of debugfs/i915_drop_caches, we have offered the
ability to wait upon all outstanding batches. This is more efficient and
less error prone (one example is the use of context priorities, we have
to idle at the lowest in order not to jump over any low priority tasks
we want to wait upon) than trying to do it all in userspace. Though we
could if we wanted to, it's just easier to use the existing facility
designed for the purpose -- that we were already partially using!

Note that debugfs/i915_drop_caches has only existed since v4.2.

Signed-off-by: Chris Wilson 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Petri Latvala 
---
Another week, another poke.
---
 lib/drmtest.c | 29 ++---
 1 file changed, 2 insertions(+), 27 deletions(-)

diff --git a/lib/drmtest.c b/lib/drmtest.c
index 15a46477..7ac3591e 100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -159,35 +159,10 @@ static bool has_known_intel_chipset(int fd)
  */
 void gem_quiescent_gpu(int fd)
 {
-   uint32_t bbe = MI_BATCH_BUFFER_END;
-   struct drm_i915_gem_execbuffer2 execbuf;
-   struct drm_i915_gem_exec_object2 obj;
-   unsigned ring;
-
igt_terminate_spin_batches();
 
-   memset(&obj, 0, sizeof(obj));
-   obj.handle = gem_create(fd, 4096);
-   gem_write(fd, obj.handle, 0, &bbe, sizeof(&bbe));
-
-   memset(&execbuf, 0, sizeof(execbuf));
-   execbuf.buffers_ptr = to_user_pointer(&obj);
-   execbuf.buffer_count = 1;
-
-   for (ring = 0; ring < 1<<6; ring++) {
-   execbuf.flags = ring;
-   __gem_execbuf(fd, &execbuf);
-   }
-
-   if (gem_has_bsd2(fd)) {
-   execbuf.flags = I915_EXEC_BSD | (2 << 13);
-   __gem_execbuf(fd, &execbuf);
-   }
-
-   gem_sync(fd, obj.handle);
-   gem_close(fd, obj.handle);
-
-   igt_drop_caches_set(fd, DROP_RETIRE | DROP_IDLE | DROP_FREED);
+   igt_drop_caches_set(fd,
+   DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED);
 }
 
 /**
-- 
2.15.0.rc1

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[Intel-gfx] [PATCH i-g-t 8/8] tools/intel_vbt_decode: abstract child devices printing more

[Jani Nikula]

Unify the common code for current and legacy blocks.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 70 +---
 1 file changed, 31 insertions(+), 39 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index ebc65b82bbde..04f733c8cb06 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -483,25 +483,12 @@ static void dump_child_device(struct context *context,
}
 }
 
-static void dump_general_definitions(struct context *context,
-const struct bdb_block *block)
+
+static void dump_child_devices(struct context *context, const uint8_t *devices,
+  uint8_t child_dev_num, uint8_t child_dev_size)
 {
-   const struct bdb_general_definitions *defs = block->data;
struct child_device_config *child;
int i;
-   int child_device_num;
-
-   printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin);
-   printf("\tUse ACPI DPMS CRT power states: %s\n",
-  YESNO(defs->dpms_acpi));
-   printf("\tSkip CRT detect at boot: %s\n",
-  YESNO(defs->skip_boot_crt_detect));
-   printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim));
-   printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1],
-  defs->boot_display[0]);
-   printf("\tChild device size: %d\n", defs->child_dev_size);
-   child_device_num = (block->size - sizeof(*defs)) /
-   defs->child_dev_size;
 
/*
 * Use a temp buffer so dump_child_device() doesn't have to worry about
@@ -510,9 +497,9 @@ static void dump_general_definitions(struct context 
*context,
 */
child = calloc(1, sizeof(*child));
 
-   for (i = 0; i < child_device_num; i++) {
-   memcpy(child, &defs->devices[i * defs->child_dev_size],
-  min(sizeof(*child), defs->child_dev_size));
+   for (i = 0; i < child_dev_num; i++) {
+   memcpy(child, devices + i * child_dev_size,
+  min(sizeof(*child), child_dev_size));
 
dump_child_device(context, child);
}
@@ -520,33 +507,38 @@ static void dump_general_definitions(struct context 
*context,
free(child);
 }
 
-static void dump_legacy_child_devices(struct context *context,
- const struct bdb_block *block)
+static void dump_general_definitions(struct context *context,
+const struct bdb_block *block)
 {
-   const struct bdb_legacy_child_devices *defs = block->data;
-   struct child_device_config *child;
-   int i;
-   int child_device_num;
+   const struct bdb_general_definitions *defs = block->data;
+   int child_dev_num;
 
+   printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin);
+   printf("\tUse ACPI DPMS CRT power states: %s\n",
+  YESNO(defs->dpms_acpi));
+   printf("\tSkip CRT detect at boot: %s\n",
+  YESNO(defs->skip_boot_crt_detect));
+   printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim));
+   printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1],
+  defs->boot_display[0]);
printf("\tChild device size: %d\n", defs->child_dev_size);
-   child_device_num = (block->size - sizeof(*defs)) /
-   defs->child_dev_size;
 
-   /*
-* Use a temp buffer so dump_child_device() doesn't have to worry about
-* accessing the struct beyond child_dev_size. The tail, if any, remains
-* initialized to zero.
-*/
-   child = calloc(1, sizeof(*child));
+   child_dev_num = (block->size - sizeof(*defs)) / defs->child_dev_size;
+   dump_child_devices(context, defs->devices,
+  child_dev_num, defs->child_dev_size);
+}
 
-   for (i = 0; i < child_device_num; i++) {
-   memcpy(child, &defs->devices[i * defs->child_dev_size],
-  min(sizeof(*child), defs->child_dev_size));
+static void dump_legacy_child_devices(struct context *context,
+ const struct bdb_block *block)
+{
+   const struct bdb_legacy_child_devices *defs = block->data;
+   int child_dev_num;
 
-   dump_child_device(context, child);
-   }
+   printf("\tChild device size: %d\n", defs->child_dev_size);
 
-   free(child);
+   child_dev_num = (block->size - sizeof(*defs)) / defs->child_dev_size;
+   dump_child_devices(context, defs->devices,
+  child_dev_num, defs->child_dev_size);
 }
 
 static void dump_lvds_options(struct context *context,
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 1/8] tools/intel_vbt_decode: make a copy of child devices before dumping

[Jani Nikula]

Take child device size into account, avoid reading past the actual child
device.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 948dc29dd114..499dcb065745 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 
+#include "igt_aux.h"
 #include "intel_io.h"
 #include "intel_chipset.h"
 #include "drmtest.h"
@@ -475,6 +476,7 @@ static void dump_general_definitions(struct context 
*context,
 const struct bdb_block *block)
 {
const struct bdb_general_definitions *defs = block->data;
+   struct child_device_config *child;
int i;
int child_device_num;
 
@@ -489,8 +491,22 @@ static void dump_general_definitions(struct context 
*context,
printf("\tChild device size: %d\n", defs->child_dev_size);
child_device_num = (block->size - sizeof(*defs)) /
defs->child_dev_size;
-   for (i = 0; i < child_device_num; i++)
-   dump_child_device(context, (const void*)&defs->devices[i * 
defs->child_dev_size]);
+
+   /*
+* Use a temp buffer so dump_child_device() doesn't have to worry about
+* accessing the struct beyond child_dev_size. The tail, if any, remains
+* initialized to zero.
+*/
+   child = calloc(1, sizeof(*child));
+
+   for (i = 0; i < child_device_num; i++) {
+   memcpy(child, &defs->devices[i * defs->child_dev_size],
+  min(sizeof(*child), defs->child_dev_size));
+
+   dump_child_device(context, child);
+   }
+
+   free(child);
 }
 
 static void dump_legacy_child_devices(struct context *context,
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 3/8] tools/intel_vbt_decode: use %.*s instead of duplicating a string

[Jani Nikula]

child->device_id may not be terminated, but we can use %.*s format
specifier to define the max length to print. No need to make a copy.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 4865f0bab25f..0f7e2dafc762 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -388,19 +388,15 @@ static void dump_child_device(struct context *context,
  const struct child_device_config *child)
 {
const struct child_device_config *efp = child;
-   char child_id[11];
 
if (!child->device_type)
return;
 
if (context->bdb->version < 152) {
-   strncpy(child_id, (const char *)child->device_id, 10);
-   child_id[10] = 0;
-
printf("\tChild device info:\n");
printf("\t\tDevice type: %04x (%s)\n", child->device_type,
   child_device_type(child->device_type));
-   printf("\t\tSignature: %s\n", child_id);
+   printf("\t\tSignature: %.*s\n", (int)sizeof(child->device_id), 
child->device_id);
printf("\t\tAIM offset: %d\n", child->addin_offset);
printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
} else { /* 152+ have EFP blocks here */
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 7/8] tools/intel_vbt_decode: dump more child device data for version < 152

[Jani Nikula]

There's no evidence that this is the limit.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 3cce60bf2ee2..ebc65b82bbde 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -431,9 +431,6 @@ static void dump_child_device(struct context *context,
printf("\t\tAIM offset: %d\n", child->addin_offset);
printf("\t\tDVO Port: 0x%02x (%s)\n", child->dvo_port, 
dvo_port(child->dvo_port));
 
-   if (context->bdb->version < 152)
-   return;
-
printf("\t\tAIM I2C pin: 0x%02x\n", child->i2c_pin);
printf("\t\tAIM Slave address: 0x%02x\n", child->slave_addr);
printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin);
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 5/8] tools/intel_vbt_decode: unify child device printing across versions

[Jani Nikula]

Make it easier to compare dumping against the struct definition.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 128 ++-
 1 file changed, 71 insertions(+), 57 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 69cf1e4c6cc6..bc5f38112619 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -401,74 +401,88 @@ static const char *mipi_bridge_type(uint8_t type)
 static void dump_child_device(struct context *context,
  const struct child_device_config *child)
 {
-   const struct child_device_config *efp = child;
-
if (!child->device_type)
return;
 
+   printf("\tChild device info:\n");
+   printf("\t\tDevice handle: 0x%04x (%s)\n", child->handle,
+  child_device_handle(child->handle));
+   printf("\t\tDevice type: 0x%04x (%s)\n", child->device_type,
+  child_device_type(child->device_type));
+   dump_child_device_type_bits(child->device_type);
+
if (context->bdb->version < 152) {
-   printf("\tChild device info:\n");
-   printf("\t\tDevice type: %04x (%s)\n", child->device_type,
-  child_device_type(child->device_type));
printf("\t\tSignature: %.*s\n", (int)sizeof(child->device_id), 
child->device_id);
-   printf("\t\tAIM offset: %d\n", child->addin_offset);
-   printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
-   } else { /* 152+ have EFP blocks here */
-   printf("\tEFP device info:\n");
-   printf("\t\tDevice handle: 0x%04x (%s)\n", efp->handle,
-  child_device_handle(efp->handle));
-   printf("\t\tDevice type: 0x%04x (%s)\n", efp->device_type,
-  child_device_type(efp->device_type));
-   dump_child_device_type_bits(efp->device_type);
-   printf("\t\tI2C speed: 0x%02x\n", efp->i2c_speed);
-   printf("\t\tDP onboard redriver: 0x%02x\n", 
efp->dp_onboard_redriver);
-   printf("\t\tDP ondock redriver: 0x%02x\n", 
efp->dp_ondock_redriver);
-   printf("\t\tHDMI max data rate: 0x%02x\n", 
efp->hdmi_max_data_rate);
-   printf("\t\tHDMI level shifter value: 0x%02x\n", 
efp->hdmi_level_shifter_value);
-   printf("\t\tOffset to DTD buffer for edidless EFP: 0x%02x\n", 
efp->dtd_buf_ptr);
-   printf("\t\tDual pipe ganged eDP: %s\n", 
YESNO(efp->ganged_edp));
-   printf("\t\tCompression method CPS: %s\n", 
YESNO(efp->compression_method));
-   printf("\t\tCompression enable: %s\n", 
YESNO(efp->compression_enable));
-   printf("\t\tEdidless EFP: %s\n", YESNO(efp->edidless_efp));
-   printf("\t\tCompression structure index: 0x%02x)\n", 
efp->compression_structure_index);
-   printf("\t\tSlave DDI port: 0x%02x (%s)\n", efp->slave_port, 
dvo_port(efp->slave_port));
-   printf("\t\tAIM offset: %d\n", child->addin_offset);
-   printf("\t\tPort: 0x%02x (%s)\n", efp->dvo_port, 
dvo_port(efp->dvo_port));
-   printf("\t\tAIM I2C pin: 0x%02x\n", efp->i2c_pin);
-   printf("\t\tAIM Slave address: 0x%02x\n", efp->slave_addr);
-   printf("\t\tDDC pin: 0x%02x\n", efp->ddc_pin);
-   printf("\t\tEDID buffer ptr: 0x%02x\n", efp->edid_ptr);
-   printf("\t\tDVO config: 0x%02x\n", efp->dvo_cfg);
-   printf("\t\tHPD sense invert: %s\n", YESNO(efp->hpd_invert));
-   printf("\t\tIboost enable: %s\n", YESNO(efp->iboost));
-   printf("\t\tOnboard LSPCON: %s\n", YESNO(efp->lspcon));
-   printf("\t\tLane reversal: %s\n", YESNO(efp->lane_reversal));
-   printf("\t\tEFP routed through dock: %s\n", 
YESNO(efp->efp_routed));
-   printf("\t\tHDMI compatible? %s\n", YESNO(efp->hdmi_support));
-   printf("\t\tDP compatible? %s\n", YESNO(efp->dp_support));
-   printf("\t\tTMDS compatible? %s\n", YESNO(efp->tmds_support));
-   printf("\t\tAux channel: 0x%02x\n", efp->aux_channel);
-   printf("\t\tDongle detect: 0x%02x\n", efp->dongle_detect);
-   printf("\t\tIntegrated encoder instead of SDVO: %s\n", 
YESNO(efp->integrated_encoder));
-   printf("\t\tHotplu connect status: 0x%02x\n", efp->hpd_status);
-   printf("\t\tSDVO stall signal available: %s\n", 
YESNO(efp->sdvo_stall));
-   printf("\t\tPipe capabilities: 0x%02x\n", efp->pipe_cap);
-   printf("\t\tDVO wiring: 0x%02x\n", efp->dvo_wiring);
-   printf("\t\tMIPI bridge type: %02x (%s)\n", 
efp->mipi_bridge_type,
-  mipi_bridge_type(efp->mipi_bridge_type));
-   printf("\t\tDevice class extendsion: 0x%02x\n", 
efp->extended_type);
-   printf("\t\tDVO function: 0x%02x\n",

[Intel-gfx] [PATCH i-g-t 6/8] tools/intel_vbt_decode: unify legacy child device block dumping

[Jani Nikula]

It's the same stuff as in the new child devices.

Signed-off-by: Jani Nikula 
---
 tools/intel_bios.h   | 30 +++---
 tools/intel_vbt_decode.c | 37 +
 2 files changed, 24 insertions(+), 43 deletions(-)

diff --git a/tools/intel_bios.h b/tools/intel_bios.h
index f0475b5cfcc3..78a96d977536 100644
--- a/tools/intel_bios.h
+++ b/tools/intel_bios.h
@@ -42,33 +42,9 @@
 #define DEVICE_TYPE_DVI0x68d2
 #define DEVICE_TYPE_MIPI   0x7cc2
 
-struct legacy_child_device_config {
-   uint16_t handle;
-   uint16_t device_type;   /* See DEVICE_TYPE_* above */
-   uint8_t device_id[10];
-   uint16_t addin_offset;
-   uint8_t dvo_port;   /* See DEVICE_PORT_* above */
-   uint8_t i2c_pin;
-   uint8_t slave_addr;
-   uint8_t ddc_pin;
-   uint16_t edid_ptr;
-   uint8_t dvo_cfg;/* See DEVICE_CFG_* above */
-   uint8_t dvo2_port;
-   uint8_t i2c2_pin;
-   uint8_t slave2_addr;
-   uint8_t ddc2_pin;
-   uint8_t capabilities;
-   uint8_t dvo_wiring; /* See DEVICE_WIRE_* above */
-   uint8_t dvo2_wiring;
-   uint16_t extended_type;
-   uint8_t dvo_function;
-} __attribute__ ((packed));
-
-#define DEVICE_CHILD_SIZE 7
-
-struct bdb_child_devices {
-   uint8_t child_structure_size;
-   struct legacy_child_device_config children[DEVICE_CHILD_SIZE];
+struct bdb_legacy_child_devices {
+   uint8_t child_dev_size;
+   uint8_t devices[0]; /* presumably 7 * 33 */
 } __attribute__ ((packed));
 
 #define BDB_DRIVER_NO_LVDS 0
diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index bc5f38112619..3cce60bf2ee2 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -526,25 +526,30 @@ static void dump_general_definitions(struct context 
*context,
 static void dump_legacy_child_devices(struct context *context,
  const struct bdb_block *block)
 {
-   const struct bdb_child_devices *child_devs = block->data;
-   const struct legacy_child_device_config *child;
+   const struct bdb_legacy_child_devices *defs = block->data;
+   struct child_device_config *child;
int i;
+   int child_device_num;
 
-   for (i = 0; i < DEVICE_CHILD_SIZE; i++) {
-   child = &child_devs->children[i];
-   /* Skip nonexistent children */
-   if (!child->device_type)
-   continue;
-   printf("\tChild device %d\n", i);
-   printf("\t\tType: 0x%04x (%s)\n", child->device_type,
-  child_device_type(child->device_type));
-   printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
-   printf("\t\tI2C pin: 0x%02x\n", child->i2c_pin);
-   printf("\t\tSlave addr: 0x%02x\n", child->slave_addr);
-   printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin);
-   printf("\t\tDVO config: 0x%02x\n", child->dvo_cfg);
-   printf("\t\tDVO wiring: 0x%02x\n", child->dvo_wiring);
+   printf("\tChild device size: %d\n", defs->child_dev_size);
+   child_device_num = (block->size - sizeof(*defs)) /
+   defs->child_dev_size;
+
+   /*
+* Use a temp buffer so dump_child_device() doesn't have to worry about
+* accessing the struct beyond child_dev_size. The tail, if any, remains
+* initialized to zero.
+*/
+   child = calloc(1, sizeof(*child));
+
+   for (i = 0; i < child_device_num; i++) {
+   memcpy(child, &defs->devices[i * defs->child_dev_size],
+  min(sizeof(*child), defs->child_dev_size));
+
+   dump_child_device(context, child);
}
+
+   free(child);
 }
 
 static void dump_lvds_options(struct context *context,
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 2/8] tools/intel_vbt_decode: update dvo port name dumping

[Jani Nikula]

Add names for new ports, throw out unused macros.

Signed-off-by: Jani Nikula 
---
 tools/intel_bios.h   | 12 
 tools/intel_vbt_decode.c | 47 +--
 2 files changed, 25 insertions(+), 34 deletions(-)

diff --git a/tools/intel_bios.h b/tools/intel_bios.h
index 4e06ef74e459..f0475b5cfcc3 100644
--- a/tools/intel_bios.h
+++ b/tools/intel_bios.h
@@ -42,18 +42,6 @@
 #define DEVICE_TYPE_DVI0x68d2
 #define DEVICE_TYPE_MIPI   0x7cc2
 
-#define DEVICE_PORT_DVOA   0x00/* none on 845+ */
-#define DEVICE_PORT_DVOB   0x01
-#define DEVICE_PORT_DVOC   0x02
-
-#define DEVICE_PORT_NONE   0
-#define DEVICE_PORT_HDMIB  1
-#define DEVICE_PORT_HDMIC  2
-#define DEVICE_PORT_HDMID  3
-#define DEVICE_PORT_DPB7
-#define DEVICE_PORT_DPC8
-#define DEVICE_PORT_DPD9
-
 struct legacy_child_device_config {
uint16_t handle;
uint16_t device_type;   /* See DEVICE_TYPE_* above */
diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 499dcb065745..4865f0bab25f 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -356,29 +356,32 @@ static const char *child_device_handle(unsigned char 
handle)
return "unknown";
 }
 
-static const struct {
-   unsigned short type;
-   const char *name;
-} efp_ports[] = {
-   { DEVICE_PORT_NONE, "N/A" },
-   { DEVICE_PORT_HDMIB, "HDMI-B" },
-   { DEVICE_PORT_HDMIC, "HDMI-C" },
-   { DEVICE_PORT_HDMID, "HDMI-D" },
-   { DEVICE_PORT_DPB, "DP-B" },
-   { DEVICE_PORT_DPC, "DP-C" },
-   { DEVICE_PORT_DPD, "DP-D" },
+static const char *dvo_port_names[] = {
+   [DVO_PORT_HDMIA] = "HDMI-A",
+   [DVO_PORT_HDMIB] = "HDMI-B",
+   [DVO_PORT_HDMIC] = "HDMI-C",
+   [DVO_PORT_HDMID] = "HDMI-D",
+   [DVO_PORT_LVDS] = "LVDS",
+   [DVO_PORT_TV] = "TV",
+   [DVO_PORT_CRT] = "CRT",
+   [DVO_PORT_DPB] = "DP-B",
+   [DVO_PORT_DPC] = "DP-C",
+   [DVO_PORT_DPD] = "DP-D",
+   [DVO_PORT_DPA] = "DP-A",
+   [DVO_PORT_DPE] = "DP-E",
+   [DVO_PORT_HDMIE] = "HDMI-E",
+   [DVO_PORT_MIPIA] = "MIPI-A",
+   [DVO_PORT_MIPIB] = "MIPI-B",
+   [DVO_PORT_MIPIC] = "MIPI-C",
+   [DVO_PORT_MIPID] = "MIPI-D",
 };
-static const int num_efp_ports = sizeof(efp_ports) / sizeof(efp_ports[0]);
 
-static const char *efp_port(uint8_t type)
+static const char *dvo_port(uint8_t type)
 {
-   int i;
-
-   for (i = 0; i < num_efp_ports; i++)
-   if (efp_ports[i].type == type)
-   return efp_ports[i].name;
-
-   return "unknown";
+   if (type < ARRAY_SIZE(dvo_port_names) && dvo_port_names[type])
+   return dvo_port_names[type];
+   else
+   return "unknown";
 }
 
 static void dump_child_device(struct context *context,
@@ -418,9 +421,9 @@ static void dump_child_device(struct context *context,
printf("\t\tCompression enable: %s\n", 
YESNO(efp->compression_enable));
printf("\t\tEdidless EFP: %s\n", YESNO(efp->edidless_efp));
printf("\t\tCompression structure index: 0x%02x)\n", 
efp->compression_structure_index);
-   printf("\t\tSlave DDI port: 0x%02x (%s)\n", efp->slave_port, 
efp_port(efp->slave_port));
+   printf("\t\tSlave DDI port: 0x%02x (%s)\n", efp->slave_port, 
dvo_port(efp->slave_port));
printf("\t\tAIM offset: %d\n", child->addin_offset);
-   printf("\t\tPort: 0x%02x (%s)\n", efp->dvo_port, 
efp_port(efp->dvo_port));
+   printf("\t\tPort: 0x%02x (%s)\n", efp->dvo_port, 
dvo_port(efp->dvo_port));
printf("\t\tAIM I2C pin: 0x%02x\n", efp->i2c_pin);
printf("\t\tAIM Slave address: 0x%02x\n", efp->slave_addr);
printf("\t\tDDC pin: 0x%02x\n", efp->ddc_pin);
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 4/8] tools/intel_vbt_decode: abstract DSI bridge type dump

[Jani Nikula]

Cleaner than having it inline.

Signed-off-by: Jani Nikula 
---
 tools/intel_vbt_decode.c | 31 ---
 1 file changed, 16 insertions(+), 15 deletions(-)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 0f7e2dafc762..69cf1e4c6cc6 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -384,6 +384,20 @@ static const char *dvo_port(uint8_t type)
return "unknown";
 }
 
+static const char *mipi_bridge_type(uint8_t type)
+{
+   switch (type) {
+   case 1:
+   return "ASUS";
+   case 2:
+   return "Toshiba";
+   case 3:
+   return "Renesas";
+   default:
+   return "unknown";
+   }
+}
+
 static void dump_child_device(struct context *context,
  const struct child_device_config *child)
 {
@@ -440,21 +454,8 @@ static void dump_child_device(struct context *context,
printf("\t\tSDVO stall signal available: %s\n", 
YESNO(efp->sdvo_stall));
printf("\t\tPipe capabilities: 0x%02x\n", efp->pipe_cap);
printf("\t\tDVO wiring: 0x%02x\n", efp->dvo_wiring);
-   printf("\t\tMIPI bridge type:");
-   switch (efp->mipi_bridge_type) {
-   case 1:
-   printf("ASUS\n");
-   break;
-   case 2:
-   printf("Toshiba\n");
-   break;
-   case 3:
-   printf("Renesas\n");
-   break;
-   default:
-   printf("(unknown value %d)\n", efp->mipi_bridge_type);
-   break;
-   }
+   printf("\t\tMIPI bridge type: %02x (%s)\n", 
efp->mipi_bridge_type,
+  mipi_bridge_type(efp->mipi_bridge_type));
printf("\t\tDevice class extendsion: 0x%02x\n", 
efp->extended_type);
printf("\t\tDVO function: 0x%02x\n", efp->dvo_function);
}
-- 
2.11.0

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[Intel-gfx] [PATCH i-g-t 0/8] tools/intel_vbt_decode: refactoring and cleanups

[Jani Nikula]

Flush some old branches to the list...

BR,
Jani.


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[Intel-gfx] [PATCH 1/2] drm/i915: Do not rely on wm preservation for ILK watermarks

[Maarten Lankhorst]

The original intent was to preserve watermarks as much as possible
in intel_pipe_wm.raw_wm, and put the validated ones in intel_pipe_wm.wm.

It seems this approach is insufficient and we don't always preserve
the raw watermarks, so just use the atomic iterator we're already using
to get a const pointer to all bound planes on the crtc.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102373
Signed-off-by: Maarten Lankhorst 
Cc: sta...@vger.kernel.org #v4.8+
---
 drivers/gpu/drm/i915/intel_drv.h |  1 -
 drivers/gpu/drm/i915/intel_pm.c  | 51 +---
 2 files changed, 21 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 47d022d48718..7bc60c848940 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -499,7 +499,6 @@ struct intel_crtc_scaler_state {
 
 struct intel_pipe_wm {
struct intel_wm_level wm[5];
-   struct intel_wm_level raw_wm[5];
uint32_t linetime;
bool fbc_wm_enabled;
bool pipe_enabled;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index c42a65a93b3a..ea70c720f492 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2721,9 +2721,9 @@ static void ilk_compute_wm_level(const struct 
drm_i915_private *dev_priv,
 const struct intel_crtc *intel_crtc,
 int level,
 struct intel_crtc_state *cstate,
-struct intel_plane_state *pristate,
-struct intel_plane_state *sprstate,
-struct intel_plane_state *curstate,
+const struct intel_plane_state *pristate,
+const struct intel_plane_state *sprstate,
+const struct intel_plane_state *curstate,
 struct intel_wm_level *result)
 {
uint16_t pri_latency = dev_priv->wm.pri_latency[level];
@@ -3043,28 +3043,24 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state 
*cstate)
struct intel_pipe_wm *pipe_wm;
struct drm_device *dev = state->dev;
const struct drm_i915_private *dev_priv = to_i915(dev);
-   struct intel_plane *intel_plane;
-   struct intel_plane_state *pristate = NULL;
-   struct intel_plane_state *sprstate = NULL;
-   struct intel_plane_state *curstate = NULL;
+   struct drm_plane *plane;
+   const struct drm_plane_state *plane_state;
+   const struct intel_plane_state *pristate = NULL;
+   const struct intel_plane_state *sprstate = NULL;
+   const struct intel_plane_state *curstate = NULL;
int level, max_level = ilk_wm_max_level(dev_priv), usable_level;
struct ilk_wm_maximums max;
 
pipe_wm = &cstate->wm.ilk.optimal;
 
-   for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) {
-   struct intel_plane_state *ps;
-
-   ps = intel_atomic_get_existing_plane_state(state,
-  intel_plane);
-   if (!ps)
-   continue;
+   drm_atomic_crtc_state_for_each_plane_state(plane, plane_state, 
&cstate->base) {
+   const struct intel_plane_state *ps = 
to_intel_plane_state(plane_state);
 
-   if (intel_plane->base.type == DRM_PLANE_TYPE_PRIMARY)
+   if (plane->type == DRM_PLANE_TYPE_PRIMARY)
pristate = ps;
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_OVERLAY)
+   else if (plane->type == DRM_PLANE_TYPE_OVERLAY)
sprstate = ps;
-   else if (intel_plane->base.type == DRM_PLANE_TYPE_CURSOR)
+   else if (plane->type == DRM_PLANE_TYPE_CURSOR)
curstate = ps;
}
 
@@ -3086,11 +3082,9 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state 
*cstate)
if (pipe_wm->sprites_scaled)
usable_level = 0;
 
-   ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
-pristate, sprstate, curstate, &pipe_wm->raw_wm[0]);
-
memset(&pipe_wm->wm, 0, sizeof(pipe_wm->wm));
-   pipe_wm->wm[0] = pipe_wm->raw_wm[0];
+   ilk_compute_wm_level(dev_priv, intel_crtc, 0, cstate,
+pristate, sprstate, curstate, &pipe_wm->wm[0]);
 
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
pipe_wm->linetime = hsw_compute_linetime_wm(cstate);
@@ -3100,8 +3094,8 @@ static int ilk_compute_pipe_wm(struct intel_crtc_state 
*cstate)
 
ilk_compute_wm_reg_maximums(dev_priv, 1, &max);
 
-   for (level = 1; level <= max_level; level++) {
-   struct intel_wm_level *wm = &pipe_wm->raw_wm[level];
+   for (level = 1; level <= usable_level; level++) {
+   

[Intel-gfx] [PATCH 2/2] drm/i915: Calculate ironlake intermediate watermarks correctly, v2.

[Maarten Lankhorst]

The watermarks it should calculate against are the old optimal watermarks.
The currently active crtc watermarks are pure fiction, and are invalid in
case of a nonblocking modeset, page flip enabling/disabling planes or any
other reason.

When the crtc is disabled or during a modeset the intermediate watermarks
don't need to be programmed separately, and could be directly assigned
to the optimal watermarks.

Changes since v1:
- Use intel_atomic_get_old_crtc_state. (ville)

Signed-off-by: Maarten Lankhorst 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_pm.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ea70c720f492..e181dfc36200 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3124,7 +3124,11 @@ static int ilk_compute_intermediate_wm(struct drm_device 
*dev,
   struct intel_crtc_state *newstate)
 {
struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate;
-   struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk;
+   struct intel_atomic_state *intel_state =
+   to_intel_atomic_state(newstate->base.state);
+   const struct intel_crtc_state *oldstate =
+   intel_atomic_get_old_crtc_state(intel_state, intel_crtc);
+   const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal;
int level, max_level = ilk_wm_max_level(to_i915(dev));
 
/*
@@ -3133,6 +3137,9 @@ static int ilk_compute_intermediate_wm(struct drm_device 
*dev,
 * and after the vblank.
 */
*a = newstate->wm.ilk.optimal;
+   if (!newstate->base.active || 
drm_atomic_crtc_needs_modeset(&newstate->base))
+   return 0;
+
a->pipe_enabled |= b->pipe_enabled;
a->sprites_enabled |= b->sprites_enabled;
a->sprites_scaled |= b->sprites_scaled;
-- 
2.14.1

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[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [1/2] drm/i915: Introduce execlist_port_* accessors

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Introduce execlist_port_* accessors
URL   : https://patchwork.freedesktop.org/series/32300/
State : warning

== Summary ==

Series 32300v1 series starting with [1/2] drm/i915: Introduce execlist_port_* 
accessors
https://patchwork.freedesktop.org/api/1.0/series/32300/revisions/1/mbox/

Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (fi-skl-6770hq)

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:442s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:369s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:514s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:262s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:494s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:501s
fi-byt-j1900 total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  
time:488s
fi-byt-n2820 total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  
time:479s
fi-cfl-s total:289  pass:253  dwarn:4   dfail:0   fail:0   skip:32  
time:554s
fi-elk-e7500 total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  
time:421s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:248s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:579s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:453s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:427s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:433s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:491s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:482s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:575s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:474s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:588s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:546s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:448s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:645s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:516s
fi-skl-6770hqtotal:289  pass:268  dwarn:1   dfail:0   fail:0   skip:20  
time:506s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:460s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:556s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:420s
fi-bdw-gvtdvm failed to connect after reboot

93f001963c9915c52b5ad84500075d231e008ced drm-tip: 2017y-10m-19d-10h-52m-17s UTC 
integration manifest
7fb186a28a20 drm/i915: Move execlists port head instead of memmoving array
6b361fdad897 drm/i915: Introduce execlist_port_* accessors

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6104/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Last part of DDI encoder->type cleanup

[Patchwork]

== Series Details ==

Series: drm/i915: Last part of DDI encoder->type cleanup
URL   : https://patchwork.freedesktop.org/series/32298/
State : success

== Summary ==

Test drv_module_reload:
Subgroup basic-reload-inject:
pass   -> DMESG-WARN (shard-hsw) fdo#102707
Test kms_setmode:
Subgroup basic:
fail   -> PASS   (shard-hsw) fdo#99912
Test kms_busy:
Subgroup extended-modeset-hang-oldfb-with-reset-render-B:
pass   -> DMESG-WARN (shard-hsw) fdo#102249 +1

fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102249 https://bugs.freedesktop.org/show_bug.cgi?id=102249

shard-hswtotal:2540 pass:1428 dwarn:3   dfail:0   fail:8   skip:1101 
time:9199s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_6103/shards.html
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