[Intel-gfx] ✓ Fi.CI.IGT: success for firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev3)
== Series Details ==
Series: firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev3)
URL : https://patchwork.freedesktop.org/series/49678/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4932_full -> Patchwork_10367_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10367_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10367_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10367_full:
=== IGT changes ===
Warnings
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-snb: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10367_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_eio@in-flight-internal-10ms:
shard-glk: PASS -> FAIL (fdo#105957)
igt@gem_exec_await@wide-contexts:
shard-apl: PASS -> FAIL (fdo#106680)
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +2
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-glk: PASS -> FAIL (fdo#103232) +1
igt@kms_cursor_crc@cursor-128x42-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-apl: PASS -> FAIL (fdo#103232, fdo#103191)
igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
shard-hsw: PASS -> FAIL (fdo#105767)
igt@kms_cursor_legacy@cursor-vs-flip-toggle:
shard-hsw: PASS -> FAIL (fdo#103355)
igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: PASS -> FAIL (fdo#105363)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363, fdo#102887)
igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
shard-skl: PASS -> FAIL (fdo#105682) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
shard-apl: PASS -> FAIL (fdo#103167) +2
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-glk: PASS -> FAIL (fdo#103167) +3
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +2
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: PASS -> FAIL (fdo#108145)
{igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb}:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
shard-apl: PASS -> FAIL (fdo#103166) +1
igt@kms_setmode@basic:
shard-hsw: PASS -> FAIL (fdo#99912)
igt@kms_universal_plane@universal-plane-pipe-c-functional:
shard-glk: PASS -> FAIL (fdo#103166) +3
Possible fixes
igt@kms_busy@extended-pageflip-hang-newfb-render-b:
shard-glk: DMESG-WARN (fdo#107956) -> PASS
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: FAIL (fdo#108145) -> PASS
igt@kms_color@pipe-a-ctm-max:
shard-apl: FAIL (fdo#108147) -> PASS
igt@kms_cursor_crc@cursor-256x256-onscreen:
shard-glk: FAIL (fdo#103232) -> PASS
igt@kms_cursor_crc@cursor-64x21-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +2
igt@kms_draw_crc@draw-method-xrgb-render-untiled:
shard-skl: FAIL -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: FAIL (fdo#103167) -> PASS +2
igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
shard-skl: FAIL (fdo#105682) -> PASS
igt@kms_plane@plane-position-covered-pipe-a-planes:
shard-glk: FAIL (fdo#103166) -> PASS +2
igt@kms_setmode@basic:
shard-kbl: FAIL (fdo#99912) -> PASS
igt@pm_rpm@modeset-lpsp-stress-no-wait:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev4)
== Series Details == Series: drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. (rev4) URL : https://patchwork.freedesktop.org/series/49800/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4933 -> Patchwork_10372 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49800/revisions/4/mbox/ == Known issues == Here are the changes found in Patchwork_10372 that come from known issues: === IGT changes === Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (44 -> 41) == Additional (2): fi-glk-j4005 fi-snb-2520m Missing(5): fi-ctg-p8600 fi-bsw-cyan fi-ilk-m540 fi-byt-squawks fi-icl-u2 == Build changes == * Linux: CI_DRM_4933 -> Patchwork_10372 CI_DRM_4933: 6b7a44d1597791524f46d7ea17620db54dffdc8c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10372: 2be92258bd1a96c47c25c8f21a5c010735f28305 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 2be92258bd1a drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10372/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] [intel-gfx] drm/i915/csr Added DC5 and DC6 counter register for ICL in debugfs entry.
DC5 and DC6 counter register tells about residency of DC5 and DC6.
These registers are same for SKL and ICL.
v2 : Remove csr_version check.
Added generic check regarding DC counters for Gen9 onwards. (Rodrigo)
v3 : Simplified gen checks. (Chris)
v4 : Simplified "if" ladder for multiple gens.
Signed-off-by: Jyoti Yadav
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 -
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index a5265c2..738f8c7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2897,15 +2897,14 @@ static int i915_dmc_info(struct seq_file *m, void
*unused)
seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version),
CSR_VERSION_MINOR(csr->version));
- if (IS_KABYLAKE(dev_priv) ||
- (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) {
+ if (IS_BROXTON(dev_priv)) {
+ seq_printf(m, "DC3 -> DC5 count: %d\n",
+ I915_READ(BXT_CSR_DC3_DC5_COUNT));
+ } else if (IS_GEN(dev_priv, 9, 11)) {
seq_printf(m, "DC3 -> DC5 count: %d\n",
I915_READ(SKL_CSR_DC3_DC5_COUNT));
seq_printf(m, "DC5 -> DC6 count: %d\n",
I915_READ(SKL_CSR_DC5_DC6_COUNT));
- } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) {
- seq_printf(m, "DC3 -> DC5 count: %d\n",
- I915_READ(BXT_CSR_DC3_DC5_COUNT));
}
out:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8534f88..573d5f3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6985,6 +6985,7 @@ enum {
/* MMIO address range for CSR program (0x8 - 0x82FFF) */
#define CSR_MMIO_START_RANGE 0x8
#define CSR_MMIO_END_RANGE 0x8
+/* DC3_DC5 count and DC5_DC6 count registers are same for SKL and ICL */
#define SKL_CSR_DC3_DC5_COUNT _MMIO(0x80030)
#define SKL_CSR_DC5_DC6_COUNT _MMIO(0x8002C)
#define BXT_CSR_DC3_DC5_COUNT _MMIO(0x80038)
--
1.9.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix VIDEO_DIP_CTL bit shifts
== Series Details ==
Series: drm/i915: Fix VIDEO_DIP_CTL bit shifts
URL : https://patchwork.freedesktop.org/series/50573/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4932_full -> Patchwork_10365_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10365_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10365_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10365_full:
=== IGT changes ===
Warnings
igt@pm_rc6_residency@rc6-accuracy:
shard-snb: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_10365_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +3
igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-b:
shard-apl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +1
igt@kms_cursor_crc@cursor-128x128-random:
shard-glk: PASS -> FAIL (fdo#103232)
igt@kms_cursor_crc@cursor-128x42-random:
shard-apl: PASS -> FAIL (fdo#103232) +1
igt@kms_cursor_crc@cursor-64x64-suspend:
shard-apl: PASS -> FAIL (fdo#103191, fdo#103232) +1
shard-kbl: PASS -> FAIL (fdo#103191, fdo#103232)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: PASS -> FAIL (fdo#105363)
igt@kms_flip@plain-flip-fb-recreate:
shard-skl: NOTRUN -> FAIL (fdo#100368)
igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
shard-skl: PASS -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-glk: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
shard-skl: PASS -> FAIL (fdo#103167)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
shard-apl: PASS -> INCOMPLETE (fdo#103927)
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-apl: PASS -> FAIL (fdo#108145)
shard-skl: NOTRUN -> FAIL (fdo#108145) +3
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: PASS -> FAIL (fdo#108145)
{igt@kms_plane_alpha_blend@pipe-c-alpha-7efc}:
shard-skl: NOTRUN -> FAIL (fdo#108146)
{igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb}:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-glk: PASS -> FAIL (fdo#103166) +1
igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
shard-apl: PASS -> FAIL (fdo#103166) +1
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
shard-hsw: PASS -> FAIL (fdo#99912)
igt@kms_vblank@pipe-c-wait-busy:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +10
igt@pm_rpm@cursor-dpms:
shard-skl: PASS -> INCOMPLETE (fdo#107807) +1
Possible fixes
igt@drv_suspend@fence-restore-untiled:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
igt@gem_cpu_reloc@full:
shard-skl: INCOMPLETE (fdo#108073) -> PASS
igt@gem_userptr_blits@readonly-unsync:
shard-skl: INCOMPLETE (fdo#108074) -> PASS
igt@kms_color@pipe-a-ctm-max:
shard-apl: FAIL (fdo#108147) -> PASS
igt@kms_cursor_crc@cursor-64x21-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +2
igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
shard-glk: DMESG-WARN (fdo#106538, fdo#105763) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
shard-apl: FAIL (fdo#103167) -> PASS +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: FAIL (fdo#103167) -> PASS +1
igt@kms_plane@plane-position-covered-pipe-b-planes:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-apl: FAIL (fdo#103166) -> PASS +1
igt@kms_setmode@basic:
shard-kbl: FAIL (fdo#99912) -> PASS
igt@pm_rpm@modeset-lpsp-stress-no-wait:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/psr: Reduce PSR2 "frames before selective update entry"
== Series Details == Series: series starting with [1/2] drm/i915/psr: Reduce PSR2 "frames before selective update entry" URL : https://patchwork.freedesktop.org/series/50593/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4933 -> Patchwork_10371 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50593/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10371 that come from known issues: === IGT changes === Issues hit igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (44 -> 40) == Additional (2): fi-glk-j4005 fi-snb-2520m Missing(6): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 fi-gdg-551 == Build changes == * Linux: CI_DRM_4933 -> Patchwork_10371 CI_DRM_4933: 6b7a44d1597791524f46d7ea17620db54dffdc8c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10371: 32fc1b6c3261b803afd70572b42479068f73d1f0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 32fc1b6c3261 drm/i915/psr: Set Y coordinate valid for Gen10+ display 41e2255b028b drm/i915/psr: Reduce PSR2 "frames before selective update entry" == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10371/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/psr: Reduce PSR2 "frames before selective update entry"
== Series Details == Series: series starting with [1/2] drm/i915/psr: Reduce PSR2 "frames before selective update entry" URL : https://patchwork.freedesktop.org/series/50593/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915/psr: Reduce PSR2 "frames before selective update entry" -O:drivers/gpu/drm/i915/intel_psr.c:425:23: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_psr.c:425:23: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_psr.c:425:23: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_psr.c:425:23: warning: expression using sizeof(void) Commit: drm/i915/psr: Set Y coordinate valid for Gen10+ display Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915/psr: Reduce PSR2 "frames before selective update entry"
The hardware can start selective update following capture of a full frame in the remote frame buffer, there is no need to wait any longer. Set "Frames Before SU Entry" bitfield to the default value of 1. Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 83528647b40b..105b7ea2cd98 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -424,6 +424,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1); val = idle_frames << EDP_PSR2_IDLE_FRAME_SHIFT; + val |= EDP_PSR2_FRAME_BEFORE_SU(1); /* FIXME: selective update is probably totally broken because it doesn't * mesh at all with our frontbuffer tracking. And the hw alone isn't @@ -432,8 +433,6 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) val |= EDP_Y_COORDINATE_ENABLE; - val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1); - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 && dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50) val |= EDP_PSR2_TP2_TIME_50us; -- 2.14.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/psr: Set Y coordinate valid for Gen10+ display
PSR2 sinks that require Y coordinates for selective update also need the Y coordinate Valid bit in VSC SDP. Spec: eDP 1.4b VSC payload extension for PSR2 operation (Table 6-12) Signed-off-by: Dhinakaran Pandiyan --- drivers/gpu/drm/i915/intel_psr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 105b7ea2cd98..92672954dfef 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -431,7 +431,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) * good enough. */ val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE; if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) - val |= EDP_Y_COORDINATE_ENABLE; + val |= EDP_Y_COORDINATE_ENABLE | EDP_Y_COORDINATE_VALID; if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 && dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50) -- 2.14.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, 2018-10-04 at 17:27 -0700, Manasi Navare wrote:
> On Thu, Oct 04, 2018 at 05:00:06PM -0700, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-10-04 at 16:28 -0700, Manasi Navare wrote:
> > > On Thu, Oct 04, 2018 at 04:13:26PM -0700, Dhinakaran Pandiyan
> > > wrote:
> > > > On Thu, 2018-10-04 at 16:03 -0700, Lucas De Marchi wrote:
> > > > > On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan
> > > > > wrote:
> > > > > > The shifts for VSC_SELECT bits are wrong, fix it. Good
> > > > > > thing is
> > > > > > the
> > > > > > definitions are unused.
>
> No need to mention that defs are unused in the commit since that will
> not make sense
> once the patches get merged that start using these.
Well, the patch is based on the current state of the code base.
>
> More comments below
>
> > > > >
> > > > > If they are unused why are we fixing them instead of
> > > > > removing? Or
> > > > > better,
> > > > > why did we add them?
> > > >
> > > > I guess there are plans to make use of them, no idea.
> > > >
> > >
> > > Yes, the VDIP_RNABLE_PPS and DIP enables get used in the DSC
> > > patch
> > > series:
> > >
> > > https://patchwork.freedesktop.org/series/47514/
> > >
> > > If you want I can combine this fixes patch with the new revision
> > > of
> > > DSC patchseries
> > > I am about to send out
> >
> > That might create an unnecessary dependency on the series getting
> > merged. We'll have to program these bits for PSR2 from the looks of
> > it.
> > Let's get this into the tree soon, can you please review the fix?
> >
> > -DK
> >
> > >
> > > Manasi
> > >
> > > > Cc: Anusha, Manasi
> > > >
> > > > >
> > > > > Lucas De Marchi
> > > > >
> > > > > >
> > > > > > Cc: Manasi Navare
> > > > > > Cc: Anusha Srivatsa
> > > > > > Cc: Rodrigo Vivi
> > > > > > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP
> > > > > > registers")
> > > > > > Signed-off-by: Dhinakaran Pandiyan <
> > > > > > dhinakaran.pandi...@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > > > > > 1 file changed, 9 insertions(+), 9 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > > > b/drivers/gpu/drm/i915/i915_reg.h
> > > > > > index 27e650fe591b..a0ad77b9212b 100644
> > > > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > > > @@ -4584,6 +4584,15 @@ enum {
> > > > > > #define VIDEO_DIP_FREQ_2VSYNC(2 << 16)
> > > > > > #define VIDEO_DIP_FREQ_MASK (3 << 16)
> > > > > > /* HSW and later: */
> > > > > > +#define DRM_DIP_ENABLE (1 << 28)
> > > > > > +#define PSR_VSC_BIT_7_SET(1 << 27)
> > > > > > +#define VSC_SELECT_MASK (0x3 << 25)
> > > > > > +#define VSC_SELECT_SHIFT 25
> > > > > > +#define VSC_DIP_HW_HEA_DATA (0 << 25)
> > > > > > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > > > > > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > > > > > +#define VSC_DIP_SW_HEA_DATA (3 << 25)
> > > > > > +#define VDIP_ENABLE_PPS (1 << 24)
> > > > > > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > > > > > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > > > > > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > > > > > @@ -4591,15 +4600,6 @@ enum {
> > > > > > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > > > > > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> > > > > >
> > > > > > -#define DRM_DIP_ENABLE(1 << 28)
> > > > > > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > > > > > -#define VSC_SELECT_MASK (0x3 << 26)
> > > > > > -#define VSC_SELECT_SHIFT 26
> > > > > > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > > > > > -#define VSC_DIP_HW_HEA_SW_DATA(1 << 26)
> > > > > > -#define VSC_DIP_HW_DATA_SW_HEA(2 << 26)
> > > > > > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > > > > > -#define VDIP_ENABLE_PPS (1 << 24)
>
> Why do you need to remove all of these defs?
> From the spec, the only shift thats wrong is :
> VSC_SELECT_MASK (0x3 << 26)
> #define VSC_SELECT_SHIFT26
> #define VSC_DIP_HW_HEA_DATA (0 << 26)
> define VSC_DIP_HW_HEA_SW_DATA (1 << 26)
> define VSC_DIP_HW_DATA_SW_HEA (2 << 26)
> VSC_DIP_SW_HEA_DATA (3 << 26)
>
> Removing others and redefining to be the same is misleading
Please see other definitions in the file and the documentation above,
we generally organize bit definitions in the descending order of their
position.
>
> Other than that the actual fixes look good, double checked with the
> spec.
> So after the above fix and the commit message fix
>
> Reviewed-by: Manasi Navare
>
> Manasi
>
> > > > > >
> > > > > > /* Panel power sequencing */
> > > > > > #define PPS_BASE 0x61200
> > > > > > --
> > > > > > 2.14.1
> > > > > >
> > > > > >
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/6] drm/i915/icl: Add WaEnable32PlaneMode
== Series Details ==
Series: series starting with [v2,1/6] drm/i915/icl: Add WaEnable32PlaneMode
URL : https://patchwork.freedesktop.org/series/50569/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4932_full -> Patchwork_10364_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10364_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +1
igt@kms_color@pipe-b-degamma:
shard-apl: PASS -> FAIL (fdo#104782)
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-glk: PASS -> FAIL (fdo#103232) +2
shard-apl: PASS -> FAIL (fdo#103191, fdo#103232) +1
igt@kms_cursor_crc@cursor-128x42-random:
shard-glk: PASS -> INCOMPLETE (k.org#198133, fdo#103359)
igt@kms_cursor_crc@cursor-256x256-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_legacy@cursor-vs-flip-atomic:
shard-apl: PASS -> INCOMPLETE (fdo#103927)
igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763)
igt@kms_cursor_legacy@flip-vs-cursor-legacy:
shard-skl: PASS -> FAIL (fdo#102670)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-skl: PASS -> FAIL (fdo#105363)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-apl: PASS -> FAIL (fdo#103167) +6
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
shard-glk: PASS -> FAIL (fdo#103167) +4
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +2
igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
shard-glk: PASS -> FAIL (fdo#103166) +1
shard-apl: PASS -> FAIL (fdo#103166) +2
igt@kms_setmode@basic:
shard-hsw: PASS -> FAIL (fdo#99912)
igt@perf@polling:
shard-hsw: PASS -> FAIL (fdo#102252)
Possible fixes
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: FAIL (fdo#108145) -> PASS
igt@kms_color@pipe-a-ctm-max:
shard-apl: FAIL (fdo#108147) -> PASS
igt@kms_cursor_crc@cursor-256x256-onscreen:
shard-glk: FAIL (fdo#103232) -> PASS
igt@kms_cursor_crc@cursor-64x21-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +2
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: FAIL (fdo#105454, fdo#106509) -> PASS
igt@kms_draw_crc@draw-method-xrgb-render-untiled:
shard-skl: FAIL -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: FAIL (fdo#103167) -> PASS +1
igt@kms_plane@plane-position-covered-pipe-b-planes:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
shard-apl: FAIL (fdo#103166) -> PASS
igt@pm_rpm@modeset-lpsp-stress-no-wait:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
fdo#107882 https://bugs.freedesktop.org/show_bug.cgi?id=107882
fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
[Intel-gfx] ✗ Fi.CI.BAT: failure for Fix legacy DPMS changes with MST (rev4)
== Series Details == Series: Fix legacy DPMS changes with MST (rev4) URL : https://patchwork.freedesktop.org/series/49878/ State : failure == Summary == Applying: drm/atomic_helper: Disallow new modesets on unregistered connectors Applying: drm/nouveau: Fix nv50_mstc->best_encoder() Applying: drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead Applying: drm/i915: Skip vcpi allocation for MSTB ports that are gone error: sha1 information is lacking or useless (drivers/gpu/drm/i915/intel_dp_mst.c). error: could not build fake ancestor Patch failed at 0004 drm/i915: Skip vcpi allocation for MSTB ports that are gone Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, Oct 04, 2018 at 05:00:06PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-10-04 at 16:28 -0700, Manasi Navare wrote:
> > On Thu, Oct 04, 2018 at 04:13:26PM -0700, Dhinakaran Pandiyan wrote:
> > > On Thu, 2018-10-04 at 16:03 -0700, Lucas De Marchi wrote:
> > > > On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan
> > > > wrote:
> > > > > The shifts for VSC_SELECT bits are wrong, fix it. Good thing is
> > > > > the
> > > > > definitions are unused.
No need to mention that defs are unused in the commit since that will not make
sense
once the patches get merged that start using these.
More comments below
> > > >
> > > > If they are unused why are we fixing them instead of removing? Or
> > > > better,
> > > > why did we add them?
> > >
> > > I guess there are plans to make use of them, no idea.
> > >
> >
> > Yes, the VDIP_RNABLE_PPS and DIP enables get used in the DSC patch
> > series:
> >
> > https://patchwork.freedesktop.org/series/47514/
> >
> > If you want I can combine this fixes patch with the new revision of
> > DSC patchseries
> > I am about to send out
>
> That might create an unnecessary dependency on the series getting
> merged. We'll have to program these bits for PSR2 from the looks of it.
> Let's get this into the tree soon, can you please review the fix?
>
> -DK
>
> >
> > Manasi
> >
> > > Cc: Anusha, Manasi
> > >
> > > >
> > > > Lucas De Marchi
> > > >
> > > > >
> > > > > Cc: Manasi Navare
> > > > > Cc: Anusha Srivatsa
> > > > > Cc: Rodrigo Vivi
> > > > > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> > > > > Signed-off-by: Dhinakaran Pandiyan <
> > > > > dhinakaran.pandi...@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > > > > 1 file changed, 9 insertions(+), 9 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > > b/drivers/gpu/drm/i915/i915_reg.h
> > > > > index 27e650fe591b..a0ad77b9212b 100644
> > > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > > @@ -4584,6 +4584,15 @@ enum {
> > > > > #define VIDEO_DIP_FREQ_2VSYNC (2 << 16)
> > > > > #define VIDEO_DIP_FREQ_MASK(3 << 16)
> > > > > /* HSW and later: */
> > > > > +#define DRM_DIP_ENABLE (1 << 28)
> > > > > +#define PSR_VSC_BIT_7_SET (1 << 27)
> > > > > +#define VSC_SELECT_MASK(0x3 << 25)
> > > > > +#define VSC_SELECT_SHIFT 25
> > > > > +#define VSC_DIP_HW_HEA_DATA(0 << 25)
> > > > > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > > > > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > > > > +#define VSC_DIP_SW_HEA_DATA(3 << 25)
> > > > > +#define VDIP_ENABLE_PPS(1 << 24)
> > > > > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > > > > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > > > > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > > > > @@ -4591,15 +4600,6 @@ enum {
> > > > > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > > > > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> > > > >
> > > > > -#define DRM_DIP_ENABLE (1 << 28)
> > > > > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > > > > -#define VSC_SELECT_MASK (0x3 << 26)
> > > > > -#define VSC_SELECT_SHIFT26
> > > > > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > > > > -#define VSC_DIP_HW_HEA_SW_DATA (1 << 26)
> > > > > -#define VSC_DIP_HW_DATA_SW_HEA (2 << 26)
> > > > > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > > > > -#define VDIP_ENABLE_PPS (1 << 24)
Why do you need to remove all of these defs?
From the spec, the only shift thats wrong is :
VSC_SELECT_MASK (0x3 << 26)
#define VSC_SELECT_SHIFT26
#define VSC_DIP_HW_HEA_DATA (0 << 26)
define VSC_DIP_HW_HEA_SW_DATA (1 << 26)
define VSC_DIP_HW_DATA_SW_HEA (2 << 26)
VSC_DIP_SW_HEA_DATA (3 << 26)
Removing others and redefining to be the same is misleading
Other than that the actual fixes look good, double checked with the spec.
So after the above fix and the commit message fix
Reviewed-by: Manasi Navare
Manasi
> > > > >
> > > > > /* Panel power sequencing */
> > > > > #define PPS_BASE 0x61200
> > > > > --
> > > > > 2.14.1
> > > > >
> > > > > ___
> > > > > Intel-gfx mailing list
> > > > > Intel-gfx@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 3/5] drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead
Currently we set intel_connector->mst_port to NULL to signify that the
MST port has been removed from the system so that we can prevent further
action on the port such as connector probes, mode probing, etc.
However, we're going to need access to intel_connector->mst_port in
order to fixup ->best_encoder() so that it can always return the correct
encoder for an MST port to prevent legacy DPMS prop changes from
failing. This should be safe, so instead keep intel_connector->mst_port
always set and instead add intel_connector->mst_port_gone in order to
signify whether or not the connector has disappeared from the system.
Changes since v2:
- Add a comment to mst_port_gone (Jani Nikula)
- Change mst_port_gone to a u8 instead of a bool, per the kernel bot.
Apparently bool is discouraged in structs these days
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/intel_dp_mst.c | 14 +++---
drivers/gpu/drm/i915/intel_drv.h| 6 ++
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 4ecd65375603..fcb9b87b9339 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -311,9 +311,8 @@ static int intel_dp_mst_get_ddc_modes(struct drm_connector
*connector)
struct edid *edid;
int ret;
- if (!intel_dp) {
+ if (intel_connector->mst_port_gone)
return intel_connector_update_modes(connector, NULL);
- }
edid = drm_dp_mst_get_edid(connector, _dp->mst_mgr,
intel_connector->port);
ret = intel_connector_update_modes(connector, edid);
@@ -328,9 +327,10 @@ intel_dp_mst_detect(struct drm_connector *connector, bool
force)
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return connector_status_disconnected;
- return drm_dp_mst_detect_port(connector, _dp->mst_mgr,
intel_connector->port);
+ return drm_dp_mst_detect_port(connector, _dp->mst_mgr,
+ intel_connector->port);
}
static void
@@ -370,7 +370,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
int bpp = 24; /* MST uses fixed bpp */
int max_rate, mode_rate, max_lanes, max_link_clock;
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return MODE_ERROR;
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -402,7 +402,7 @@ static struct drm_encoder
*intel_mst_atomic_best_encoder(struct drm_connector *c
struct intel_dp *intel_dp = intel_connector->mst_port;
struct intel_crtc *crtc = to_intel_crtc(state->crtc);
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return NULL;
return _dp->mst_encoders[crtc->pipe]->base.base;
}
@@ -514,7 +514,7 @@ static void intel_dp_destroy_mst_connector(struct
drm_dp_mst_topology_mgr *mgr,
connector);
/* prevent race with the check in ->detect */
drm_modeset_lock(>dev->mode_config.connection_mutex, NULL);
- intel_connector->mst_port = NULL;
+ intel_connector->mst_port_gone = true;
drm_modeset_unlock(>dev->mode_config.connection_mutex);
drm_connector_put(connector);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8fc61e96754f..8261d4579452 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -410,6 +410,12 @@ struct intel_connector {
struct intel_dp *mst_port;
+ /*
+* Set to 1 if this is an MST connector that was removed from the
+* system and unregistered from sysfs
+*/
+ u8 mst_port_gone;
+
/* Work struct to schedule a uevent on link train failure */
struct work_struct modeset_retry_work;
--
2.17.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 4/5] drm/i915: Skip vcpi allocation for MSTB ports that are gone
Since we need to be able to allow DPMS on->off prop changes after an MST
port has disappeared from the system, we need to be able to make sure we
can compute a config for the resulting atomic commit. Currently this is
impossible when the port has disappeared, since the VCPI slot searching
we try to do in intel_dp_mst_compute_config() will fail with -EINVAL.
Since the only commits we want to allow on no-longer-present MST ports
are ones that shut off display hardware, we already know that no VCPI
allocations are needed. So, hardcode the VCPI slot count to 0 when
intel_dp_mst_compute_config() is called on an MST port that's gone.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/intel_dp_mst.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index fcb9b87b9339..a366f32b048a 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -42,7 +42,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
to_intel_connector(conn_state->connector);
struct drm_atomic_state *state = pipe_config->base.state;
int bpp;
- int lane_count, slots;
+ int lane_count, slots = 0;
const struct drm_display_mode *adjusted_mode =
_config->base.adjusted_mode;
int mst_pbn;
bool reduce_m_n = drm_dp_has_quirk(_dp->desc,
@@ -76,11 +76,16 @@ static bool intel_dp_mst_compute_config(struct
intel_encoder *encoder,
mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
pipe_config->pbn = mst_pbn;
- slots = drm_dp_atomic_find_vcpi_slots(state, _dp->mst_mgr,
- connector->port, mst_pbn);
- if (slots < 0) {
- DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
- return false;
+ if (!connector->mst_port_gone) {
+ slots = drm_dp_atomic_find_vcpi_slots(state,
+ _dp->mst_mgr,
+ connector->port,
+ mst_pbn);
+ if (slots < 0) {
+ DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
+ slots);
+ return false;
+ }
}
intel_link_compute_m_n(bpp, lane_count,
--
2.17.1
___
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[Intel-gfx] [PATCH v4 5/5] drm/i915: Fix intel_dp_mst_best_encoder()
Currently, i915 appears to rely on blocking modesets on no-longer-present MSTB ports by simply returning NULL for ->best_encoder(), which in turn causes any new atomic commits that don't disable the CRTC to fail. This is wrong however, since we still want to allow userspace to disable CRTCs on no-longer-present MSTB ports by changing the DPMS state to off and this still requires that we retrieve an encoder. So, fix this by always returning a valid encoder regardless of the state of the MST port. Signed-off-by: Lyude Paul Cc: sta...@vger.kernel.org Changes since v1: - Remove mst atomic helper, since this got replaced with a much simpler solution Signed-off-by: Lyude Paul --- drivers/gpu/drm/i915/intel_dp_mst.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index a366f32b048a..daade60c5714 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -407,8 +407,6 @@ static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *c struct intel_dp *intel_dp = intel_connector->mst_port; struct intel_crtc *crtc = to_intel_crtc(state->crtc); - if (intel_connector->mst_port_gone) - return NULL; return _dp->mst_encoders[crtc->pipe]->base.base; } -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 2/5] drm/nouveau: Fix nv50_mstc->best_encoder()
As mentioned in the previous commit, we currently prevent new modesets
on recently-removed MST connectors by returning no encoder from our
->best_encoder() callback once the MST port has disappeared. This is
wrong however, because it prevents legacy modesetting users from being
able to disable CRTCs on MST connectors after the connector's respective
topology has disappeared.
So, fix this by instead by just always returning a valid encoder.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
Changes since v2:
- Remove usage of atomic MST helper for now, since that got replaced
with a much simpler solution
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 5691dfa1db6f..63a23a80f279 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -843,22 +843,16 @@ nv50_mstc_atomic_best_encoder(struct drm_connector
*connector,
{
struct nv50_head *head = nv50_head(connector_state->crtc);
struct nv50_mstc *mstc = nv50_mstc(connector);
- if (mstc->port) {
- struct nv50_mstm *mstm = mstc->mstm;
- return >msto[head->base.index]->encoder;
- }
- return NULL;
+
+ return >mstm->msto[head->base.index]->encoder;
}
static struct drm_encoder *
nv50_mstc_best_encoder(struct drm_connector *connector)
{
struct nv50_mstc *mstc = nv50_mstc(connector);
- if (mstc->port) {
- struct nv50_mstm *mstm = mstc->mstm;
- return >msto[0]->encoder;
- }
- return NULL;
+
+ return >mstm->msto[0]->encoder;
}
static enum drm_mode_status
--
2.17.1
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[Intel-gfx] [PATCH v4 0/5] Fix legacy DPMS changes with MST
Next version of https://patchwork.freedesktop.org/series/49878/ . No changes, except that these patches are against master so hopefully intel's CI doesn't get confused this time. Lyude Paul (5): drm/atomic_helper: Disallow new modesets on unregistered connectors drm/nouveau: Fix nv50_mstc->best_encoder() drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead drm/i915: Skip vcpi allocation for MSTB ports that are gone drm/i915: Fix intel_dp_mst_best_encoder() drivers/gpu/drm/drm_atomic_helper.c | 21 - drivers/gpu/drm/i915/intel_dp_mst.c | 31 ++--- drivers/gpu/drm/i915/intel_drv.h| 6 + drivers/gpu/drm/nouveau/dispnv50/disp.c | 14 --- 4 files changed, 47 insertions(+), 25 deletions(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 1/5] drm/atomic_helper: Disallow new modesets on unregistered connectors
With the exception of modesets which would switch the DPMS state of a
connector from on to off, we want to make sure that we disallow all
modesets which would result in enabling a new monitor or a new mode
configuration on a monitor if the connector for the display in question
is no longer registered. This allows us to stop userspace from trying to
enable new displays on connectors for an MST topology that were just
removed from the system, without preventing userspace from disabling
DPMS on those connectors.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/drm_atomic_helper.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 80be74df7ba6..ce2decfc6826 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -307,6 +307,26 @@ update_connector_routing(struct drm_atomic_state *state,
return 0;
}
+ crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_connector_state->crtc);
+ /*
+* For compatibility with legacy users, we want to make sure that
+* we allow DPMS On->Off modesets on unregistered connectors. Modesets
+* which would result in anything else must be considered invalid, to
+* avoid turning on new displays on dead connectors.
+*
+* Since the connector can be unregistered at any point during an
+* atomic check or commit, this is racy. But that's OK: all we care
+* about is ensuring that userspace can't do anything but shut off the
+* display on a connector that was destroyed after it's been notified,
+* not before.
+*/
+ if (!READ_ONCE(connector->registered) && crtc_state->active) {
+ DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] is not registered\n",
+connector->base.id, connector->name);
+ return -EINVAL;
+ }
+
funcs = connector->helper_private;
if (funcs->atomic_best_encoder)
@@ -351,7 +371,6 @@ update_connector_routing(struct drm_atomic_state *state,
set_best_encoder(state, new_connector_state, new_encoder);
- crtc_state = drm_atomic_get_new_crtc_state(state,
new_connector_state->crtc);
crtc_state->connectors_changed = true;
DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] using [ENCODER:%d:%s] on
[CRTC:%d:%s]\n",
--
2.17.1
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Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, 2018-10-04 at 16:28 -0700, Manasi Navare wrote:
> On Thu, Oct 04, 2018 at 04:13:26PM -0700, Dhinakaran Pandiyan wrote:
> > On Thu, 2018-10-04 at 16:03 -0700, Lucas De Marchi wrote:
> > > On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan
> > > wrote:
> > > > The shifts for VSC_SELECT bits are wrong, fix it. Good thing is
> > > > the
> > > > definitions are unused.
> > >
> > > If they are unused why are we fixing them instead of removing? Or
> > > better,
> > > why did we add them?
> >
> > I guess there are plans to make use of them, no idea.
> >
>
> Yes, the VDIP_RNABLE_PPS and DIP enables get used in the DSC patch
> series:
>
> https://patchwork.freedesktop.org/series/47514/
>
> If you want I can combine this fixes patch with the new revision of
> DSC patchseries
> I am about to send out
That might create an unnecessary dependency on the series getting
merged. We'll have to program these bits for PSR2 from the looks of it.
Let's get this into the tree soon, can you please review the fix?
-DK
>
> Manasi
>
> > Cc: Anusha, Manasi
> >
> > >
> > > Lucas De Marchi
> > >
> > > >
> > > > Cc: Manasi Navare
> > > > Cc: Anusha Srivatsa
> > > > Cc: Rodrigo Vivi
> > > > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> > > > Signed-off-by: Dhinakaran Pandiyan <
> > > > dhinakaran.pandi...@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > > > 1 file changed, 9 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > > b/drivers/gpu/drm/i915/i915_reg.h
> > > > index 27e650fe591b..a0ad77b9212b 100644
> > > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > > @@ -4584,6 +4584,15 @@ enum {
> > > > #define VIDEO_DIP_FREQ_2VSYNC(2 << 16)
> > > > #define VIDEO_DIP_FREQ_MASK (3 << 16)
> > > > /* HSW and later: */
> > > > +#define DRM_DIP_ENABLE (1 << 28)
> > > > +#define PSR_VSC_BIT_7_SET(1 << 27)
> > > > +#define VSC_SELECT_MASK (0x3 << 25)
> > > > +#define VSC_SELECT_SHIFT 25
> > > > +#define VSC_DIP_HW_HEA_DATA (0 << 25)
> > > > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > > > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > > > +#define VSC_DIP_SW_HEA_DATA (3 << 25)
> > > > +#define VDIP_ENABLE_PPS (1 << 24)
> > > > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > > > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > > > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > > > @@ -4591,15 +4600,6 @@ enum {
> > > > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > > > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> > > >
> > > > -#define DRM_DIP_ENABLE(1 << 28)
> > > > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > > > -#define VSC_SELECT_MASK (0x3 << 26)
> > > > -#define VSC_SELECT_SHIFT 26
> > > > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > > > -#define VSC_DIP_HW_HEA_SW_DATA(1 << 26)
> > > > -#define VSC_DIP_HW_DATA_SW_HEA(2 << 26)
> > > > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > > > -#define VDIP_ENABLE_PPS (1 << 24)
> > > >
> > > > /* Panel power sequencing */
> > > > #define PPS_BASE 0x61200
> > > > --
> > > > 2.14.1
> > > >
> > > > ___
> > > > Intel-gfx mailing list
> > > > Intel-gfx@lists.freedesktop.org
> > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] ✓ Fi.CI.IGT: success for igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
== Series Details ==
Series: igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
URL : https://patchwork.freedesktop.org/series/50561/
State : success
== Summary ==
= CI Bug Log - changes from IGT_4667_full -> IGTPW_1909_full =
== Summary - WARNING ==
Minor unknown changes coming with IGTPW_1909_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_1909_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/50561/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in IGTPW_1909_full:
=== IGT changes ===
Warnings
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
shard-snb: PASS -> SKIP +1
== Known issues ==
Here are the changes found in IGTPW_1909_full that come from known issues:
=== IGT changes ===
Issues hit
igt@kms_atomic_transition@plane-all-modeset-transition:
shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133)
igt@kms_color@pipe-a-ctm-max:
shard-apl: PASS -> FAIL (fdo#108147)
igt@kms_cursor_crc@cursor-128x128-random:
shard-apl: PASS -> FAIL (fdo#103232) +4
igt@kms_cursor_crc@cursor-256x256-sliding:
shard-glk: PASS -> FAIL (fdo#103232) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-apl: PASS -> FAIL (fdo#103167) +4
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-kbl: PASS -> FAIL (fdo#103167) +4
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-glk: PASS -> FAIL (fdo#103167) +6
igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
shard-glk: PASS -> FAIL (fdo#103166) +1
shard-kbl: PASS -> FAIL (fdo#103166)
igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
shard-apl: PASS -> FAIL (fdo#103166) +1
igt@kms_rotation_crc@sprite-rotation-180:
shard-snb: PASS -> FAIL (fdo#103925)
igt@kms_setmode@basic:
shard-apl: PASS -> FAIL (fdo#99912)
igt@perf_pmu@busy-start-vecs0:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
Possible fixes
igt@drv_suspend@fence-restore-untiled:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
igt@gem_exec_big:
shard-hsw: TIMEOUT (fdo#107937) -> PASS
igt@gem_mmap_gtt@medium-copy:
shard-snb: INCOMPLETE (fdo#105411) -> PASS
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
shard-snb: DMESG-WARN (fdo#107956) -> SKIP
igt@kms_ccs@pipe-a-bad-pixel-format:
shard-apl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +6
igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
shard-kbl: FAIL (fdo#108145) -> PASS
igt@kms_cursor_crc@cursor-128x128-dpms:
shard-kbl: FAIL (fdo#103232) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS
shard-kbl: FAIL (fdo#103191, fdo#103232) -> PASS
igt@kms_cursor_crc@cursor-128x42-onscreen:
shard-glk: FAIL (fdo#103232) -> PASS +4
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-apl: DMESG-FAIL (fdo#105602, fdo#103558) -> PASS
igt@kms_cursor_crc@cursor-64x21-random:
shard-apl: FAIL (fdo#103232) -> PASS +7
igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
shard-hsw: FAIL (fdo#105767) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
shard-apl: FAIL (fdo#103167) -> PASS +3
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: FAIL (fdo#103167) -> PASS +2
shard-kbl: FAIL (fdo#103167) -> PASS +1
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-apl: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
shard-apl: FAIL (fdo#103166) -> PASS +2
igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
shard-kbl: FAIL (fdo#103166) -> PASS +1
igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
shard-glk: FAIL (fdo#103166) -> PASS +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103359
[Intel-gfx] ✓ Fi.CI.BAT: success for Watermarks small fixes/improvements
== Series Details == Series: Watermarks small fixes/improvements URL : https://patchwork.freedesktop.org/series/50579/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4933 -> Patchwork_10368 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50579/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10368 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s4-devices: fi-kbl-7500u: PASS -> DMESG-WARN (fdo#105128, fdo#107139) igt@kms_flip@basic-plain-flip: fi-ilk-650: PASS -> DMESG-WARN (fdo#106387) igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128 fdo#106387 https://bugs.freedesktop.org/show_bug.cgi?id=106387 fdo#107139 https://bugs.freedesktop.org/show_bug.cgi?id=107139 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 == Participating hosts (44 -> 40) == Additional (2): fi-glk-j4005 fi-snb-2520m Missing(6): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 fi-pnv-d510 == Build changes == * Linux: CI_DRM_4933 -> Patchwork_10368 CI_DRM_4933: 6b7a44d1597791524f46d7ea17620db54dffdc8c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10368: cb6ffc487ae82bef586cce9617a7f4b150118efc @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == cb6ffc487ae8 drm/i915: promote ddb update message to DRM_DEBUG_KMS ba4585dfc75c drm/i915: don't write PLANE_BUF_CFG twice every time bc9212a3b57e drm/i915: transition WMs ask for Selected Result Blocks c1245720e828 drm/i915: fix the watermark result selection on glk/gen10+ 47839a11088f drm/i915: fix the transition minimums for gen9+ watermarks 99b1569417cb drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10368/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: MBUS B credit change
== Series Details ==
Series: drm/i915/icl: MBUS B credit change
URL : https://patchwork.freedesktop.org/series/50560/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4931_full -> Patchwork_10363_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10363_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_await@wide-contexts:
shard-kbl: PASS -> FAIL (fdo#106680)
igt@gem_exec_flush@basic-batch-kernel-default-wb:
shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133) +1
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039)
igt@kms_busy@extended-modeset-hang-newfb-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956)
igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
shard-snb: PASS -> DMESG-WARN (fdo#107956)
igt@kms_color@pipe-b-degamma:
shard-apl: PASS -> FAIL (fdo#104782)
igt@kms_cursor_crc@cursor-128x128-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_crc@cursor-size-change:
shard-glk: PASS -> FAIL (fdo#103232) +2
igt@kms_fbcon_fbt@fbc-suspend:
shard-glk: PASS -> FAIL (fdo#105681, fdo#103833)
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: PASS -> FAIL (fdo#105363)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack:
shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763) +2
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_plane@pixel-format-pipe-a-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
igt@kms_plane@plane-position-covered-pipe-b-planes:
shard-glk: PASS -> FAIL (fdo#103166) +3
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +1
igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
shard-apl: PASS -> FAIL (fdo#103166) +1
Possible fixes
igt@kms_cursor_crc@cursor-256x256-sliding:
shard-glk: FAIL (fdo#103232) -> PASS +1
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +1
igt@kms_draw_crc@draw-method-xrgb-mmap-cpu-xtiled:
shard-skl: FAIL (fdo#107791) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
shard-glk: FAIL (fdo#103167) -> PASS +1
igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_universal_plane@universal-plane-pipe-c-functional:
shard-apl: FAIL (fdo#103166) -> PASS
igt@pm_rpm@legacy-planes:
shard-skl: INCOMPLETE (fdo#107807, fdo#105959) -> PASS
Warnings
igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
shard-apl: DMESG-WARN (fdo#107956) -> INCOMPLETE (fdo#103927)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103833 https://bugs.freedesktop.org/show_bug.cgi?id=103833
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105681 https://bugs.freedesktop.org/show_bug.cgi?id=105681
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#105959 https://bugs.freedesktop.org/show_bug.cgi?id=105959
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#106680 https://bugs.freedesktop.org/show_bug.cgi?id=106680
fdo#106885 https://bugs.freedesktop.org/show_bug.cgi?id=106885
fdo#107791 https://bugs.freedesktop.org/show_bug.cgi?id=107791
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
[Intel-gfx] ✗ Fi.CI.BAT: failure for Fix legacy DPMS changes with MST (rev3)
== Series Details == Series: Fix legacy DPMS changes with MST (rev3) URL : https://patchwork.freedesktop.org/series/49878/ State : failure == Summary == Applying: drm/atomic_helper: Disallow new modesets on unregistered connectors Applying: drm/nouveau: Fix nv50_mstc->best_encoder() Applying: drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead Applying: drm/i915: Skip vcpi allocation for MSTB ports that are gone error: sha1 information is lacking or useless (drivers/gpu/drm/i915/intel_dp_mst.c). error: could not build fake ancestor Patch failed at 0004 drm/i915: Skip vcpi allocation for MSTB ports that are gone Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] sysfs: constify sysfs create/remove files harder
== Series Details ==
Series: series starting with [1/2] sysfs: constify sysfs create/remove files
harder
URL : https://patchwork.freedesktop.org/series/50558/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4931_full -> Patchwork_10362_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10362_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10362_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10362_full:
=== IGT changes ===
Possible regressions
igt@kms_atomic_interruptible@legacy-pageflip:
shard-kbl: PASS -> DMESG-WARN
igt@kms_flip_tiling@flip-to-x-tiled:
shard-skl: PASS -> FAIL
== Known issues ==
Here are the changes found in Patchwork_10362_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@drv_suspend@shrink:
shard-skl: NOTRUN -> INCOMPLETE (fdo#106886)
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039)
igt@gem_softpin@softpin:
shard-apl: PASS -> INCOMPLETE (fdo#103927)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-apl: PASS -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956)
igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
shard-snb: PASS -> DMESG-WARN (fdo#107956)
igt@kms_cursor_crc@cursor-256x256-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_crc@cursor-64x64-sliding:
shard-glk: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +1
igt@kms_fbcon_fbt@fbc-suspend:
shard-glk: PASS -> FAIL (fdo#105681, fdo#103833)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
shard-glk: PASS -> FAIL (fdo#103167)
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_plane@pixel-format-pipe-a-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
igt@kms_plane@plane-position-covered-pipe-c-planes:
shard-apl: PASS -> FAIL (fdo#103166)
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145)
igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
shard-glk: PASS -> FAIL (fdo#103166)
igt@pm_rpm@fences-dpms:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
Possible fixes
igt@drv_suspend@fence-restore-untiled:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
igt@kms_cursor_crc@cursor-256x256-sliding:
shard-glk: FAIL (fdo#103232) -> PASS +1
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-apl: FAIL (fdo#103232) -> PASS +1
igt@kms_draw_crc@draw-method-xrgb-mmap-cpu-xtiled:
shard-skl: FAIL (fdo#107791) -> PASS
igt@kms_draw_crc@fill-fb:
shard-skl: FAIL -> PASS
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-skl: FAIL (fdo#105363) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
shard-skl: FAIL (fdo#103167) -> PASS +2
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_universal_plane@universal-plane-pipe-c-functional:
shard-apl: FAIL (fdo#103166) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103833 https://bugs.freedesktop.org/show_bug.cgi?id=103833
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#105363
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Watermarks small fixes/improvements
== Series Details == Series: Watermarks small fixes/improvements URL : https://patchwork.freedesktop.org/series/50579/ State : warning == Summary == $ dim sparse origin/drm-tip Commit: drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ Okay! Commit: drm/i915: fix the transition minimums for gen9+ watermarks Okay! Commit: drm/i915: fix the watermark result selection on glk/gen10+ Okay! Commit: drm/i915: transition WMs ask for Selected Result Blocks -O:drivers/gpu/drm/i915/intel_pm.c:4899:30: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4899:30: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4911:30: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4911:30: warning: expression using sizeof(void) Commit: drm/i915: don't write PLANE_BUF_CFG twice every time Okay! Commit: drm/i915: promote ddb update message to DRM_DEBUG_KMS Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 5/5] drm/i915: Fix intel_dp_mst_best_encoder()
Currently, i915 appears to rely on blocking modesets on no-longer-present MSTB ports by simply returning NULL for ->best_encoder(), which in turn causes any new atomic commits that don't disable the CRTC to fail. This is wrong however, since we still want to allow userspace to disable CRTCs on no-longer-present MSTB ports by changing the DPMS state to off and this still requires that we retrieve an encoder. So, fix this by always returning a valid encoder regardless of the state of the MST port. Signed-off-by: Lyude Paul Cc: sta...@vger.kernel.org Changes since v1: - Remove mst atomic helper, since this got replaced with a much simpler solution Signed-off-by: Lyude Paul --- drivers/gpu/drm/i915/intel_dp_mst.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index a366f32b048a..daade60c5714 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -407,8 +407,6 @@ static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *c struct intel_dp *intel_dp = intel_connector->mst_port; struct intel_crtc *crtc = to_intel_crtc(state->crtc); - if (intel_connector->mst_port_gone) - return NULL; return _dp->mst_encoders[crtc->pipe]->base.base; } -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 4/5] drm/i915: Skip vcpi allocation for MSTB ports that are gone
Since we need to be able to allow DPMS on->off prop changes after an MST
port has disappeared from the system, we need to be able to make sure we
can compute a config for the resulting atomic commit. Currently this is
impossible when the port has disappeared, since the VCPI slot searching
we try to do in intel_dp_mst_compute_config() will fail with -EINVAL.
Since the only commits we want to allow on no-longer-present MST ports
are ones that shut off display hardware, we already know that no VCPI
allocations are needed. So, hardcode the VCPI slot count to 0 when
intel_dp_mst_compute_config() is called on an MST port that's gone.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/intel_dp_mst.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index fcb9b87b9339..a366f32b048a 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -42,7 +42,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
to_intel_connector(conn_state->connector);
struct drm_atomic_state *state = pipe_config->base.state;
int bpp;
- int lane_count, slots;
+ int lane_count, slots = 0;
const struct drm_display_mode *adjusted_mode =
_config->base.adjusted_mode;
int mst_pbn;
bool reduce_m_n = drm_dp_has_quirk(_dp->desc,
@@ -76,11 +76,16 @@ static bool intel_dp_mst_compute_config(struct
intel_encoder *encoder,
mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
pipe_config->pbn = mst_pbn;
- slots = drm_dp_atomic_find_vcpi_slots(state, _dp->mst_mgr,
- connector->port, mst_pbn);
- if (slots < 0) {
- DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
- return false;
+ if (!connector->mst_port_gone) {
+ slots = drm_dp_atomic_find_vcpi_slots(state,
+ _dp->mst_mgr,
+ connector->port,
+ mst_pbn);
+ if (slots < 0) {
+ DRM_DEBUG_KMS("failed finding vcpi slots:%d\n",
+ slots);
+ return false;
+ }
}
intel_link_compute_m_n(bpp, lane_count,
--
2.17.1
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[Intel-gfx] [PATCH v3 3/5] drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead
Currently we set intel_connector->mst_port to NULL to signify that the
MST port has been removed from the system so that we can prevent further
action on the port such as connector probes, mode probing, etc.
However, we're going to need access to intel_connector->mst_port in
order to fixup ->best_encoder() so that it can always return the correct
encoder for an MST port to prevent legacy DPMS prop changes from
failing. This should be safe, so instead keep intel_connector->mst_port
always set and instead add intel_connector->mst_port_gone in order to
signify whether or not the connector has disappeared from the system.
Changes since v2:
- Add a comment to mst_port_gone (Jani Nikula)
- Change mst_port_gone to a u8 instead of a bool, per the kernel bot.
Apparently bool is discouraged in structs these days
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/i915/intel_dp_mst.c | 14 +++---
drivers/gpu/drm/i915/intel_drv.h| 6 ++
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 4ecd65375603..fcb9b87b9339 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -311,9 +311,8 @@ static int intel_dp_mst_get_ddc_modes(struct drm_connector
*connector)
struct edid *edid;
int ret;
- if (!intel_dp) {
+ if (intel_connector->mst_port_gone)
return intel_connector_update_modes(connector, NULL);
- }
edid = drm_dp_mst_get_edid(connector, _dp->mst_mgr,
intel_connector->port);
ret = intel_connector_update_modes(connector, edid);
@@ -328,9 +327,10 @@ intel_dp_mst_detect(struct drm_connector *connector, bool
force)
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return connector_status_disconnected;
- return drm_dp_mst_detect_port(connector, _dp->mst_mgr,
intel_connector->port);
+ return drm_dp_mst_detect_port(connector, _dp->mst_mgr,
+ intel_connector->port);
}
static void
@@ -370,7 +370,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
int bpp = 24; /* MST uses fixed bpp */
int max_rate, mode_rate, max_lanes, max_link_clock;
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return MODE_ERROR;
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
@@ -402,7 +402,7 @@ static struct drm_encoder
*intel_mst_atomic_best_encoder(struct drm_connector *c
struct intel_dp *intel_dp = intel_connector->mst_port;
struct intel_crtc *crtc = to_intel_crtc(state->crtc);
- if (!intel_dp)
+ if (intel_connector->mst_port_gone)
return NULL;
return _dp->mst_encoders[crtc->pipe]->base.base;
}
@@ -514,7 +514,7 @@ static void intel_dp_destroy_mst_connector(struct
drm_dp_mst_topology_mgr *mgr,
connector);
/* prevent race with the check in ->detect */
drm_modeset_lock(>dev->mode_config.connection_mutex, NULL);
- intel_connector->mst_port = NULL;
+ intel_connector->mst_port_gone = true;
drm_modeset_unlock(>dev->mode_config.connection_mutex);
drm_connector_put(connector);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8fc61e96754f..8261d4579452 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -410,6 +410,12 @@ struct intel_connector {
struct intel_dp *mst_port;
+ /*
+* Set to 1 if this is an MST connector that was removed from the
+* system and unregistered from sysfs
+*/
+ u8 mst_port_gone;
+
/* Work struct to schedule a uevent on link train failure */
struct work_struct modeset_retry_work;
--
2.17.1
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Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, Oct 04, 2018 at 04:13:26PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-10-04 at 16:03 -0700, Lucas De Marchi wrote:
> > On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan wrote:
> > > The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
> > > definitions are unused.
> >
> > If they are unused why are we fixing them instead of removing? Or
> > better,
> > why did we add them?
> I guess there are plans to make use of them, no idea.
>
Yes, the VDIP_RNABLE_PPS and DIP enables get used in the DSC patch series:
https://patchwork.freedesktop.org/series/47514/
If you want I can combine this fixes patch with the new revision of DSC
patchseries
I am about to send out
Manasi
> Cc: Anusha, Manasi
>
> >
> > Lucas De Marchi
> >
> > >
> > > Cc: Manasi Navare
> > > Cc: Anusha Srivatsa
> > > Cc: Rodrigo Vivi
> > > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> > > Signed-off-by: Dhinakaran Pandiyan
> > > ---
> > > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > > 1 file changed, 9 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > > b/drivers/gpu/drm/i915/i915_reg.h
> > > index 27e650fe591b..a0ad77b9212b 100644
> > > --- a/drivers/gpu/drm/i915/i915_reg.h
> > > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > > @@ -4584,6 +4584,15 @@ enum {
> > > #define VIDEO_DIP_FREQ_2VSYNC (2 << 16)
> > > #define VIDEO_DIP_FREQ_MASK(3 << 16)
> > > /* HSW and later: */
> > > +#define DRM_DIP_ENABLE (1 << 28)
> > > +#define PSR_VSC_BIT_7_SET (1 << 27)
> > > +#define VSC_SELECT_MASK(0x3 << 25)
> > > +#define VSC_SELECT_SHIFT 25
> > > +#define VSC_DIP_HW_HEA_DATA(0 << 25)
> > > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > > +#define VSC_DIP_SW_HEA_DATA(3 << 25)
> > > +#define VDIP_ENABLE_PPS(1 << 24)
> > > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > > @@ -4591,15 +4600,6 @@ enum {
> > > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> > >
> > > -#define DRM_DIP_ENABLE (1 << 28)
> > > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > > -#define VSC_SELECT_MASK (0x3 << 26)
> > > -#define VSC_SELECT_SHIFT26
> > > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > > -#define VSC_DIP_HW_HEA_SW_DATA (1 << 26)
> > > -#define VSC_DIP_HW_DATA_SW_HEA (2 << 26)
> > > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > > -#define VDIP_ENABLE_PPS (1 << 24)
> > >
> > > /* Panel power sequencing */
> > > #define PPS_BASE 0x61200
> > > --
> > > 2.14.1
> > >
> > > ___
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
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[Intel-gfx] [PATCH v3 2/5] drm/nouveau: Fix nv50_mstc->best_encoder()
As mentioned in the previous commit, we currently prevent new modesets
on recently-removed MST connectors by returning no encoder from our
->best_encoder() callback once the MST port has disappeared. This is
wrong however, because it prevents legacy modesetting users from being
able to disable CRTCs on MST connectors after the connector's respective
topology has disappeared.
So, fix this by instead by just always returning a valid encoder.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
Changes since v2:
- Remove usage of atomic MST helper for now, since that got replaced
with a much simpler solution
Signed-off-by: Lyude Paul
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 14 --
1 file changed, 4 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index 9da0bdfe1e1c..f58fc12f0a07 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -881,22 +881,16 @@ nv50_mstc_atomic_best_encoder(struct drm_connector
*connector,
{
struct nv50_head *head = nv50_head(connector_state->crtc);
struct nv50_mstc *mstc = nv50_mstc(connector);
- if (mstc->port) {
- struct nv50_mstm *mstm = mstc->mstm;
- return >msto[head->base.index]->encoder;
- }
- return NULL;
+
+ return >mstm->msto[head->base.index]->encoder;
}
static struct drm_encoder *
nv50_mstc_best_encoder(struct drm_connector *connector)
{
struct nv50_mstc *mstc = nv50_mstc(connector);
- if (mstc->port) {
- struct nv50_mstm *mstm = mstc->mstm;
- return >msto[0]->encoder;
- }
- return NULL;
+
+ return >mstm->msto[0]->encoder;
}
static enum drm_mode_status
--
2.17.1
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[Intel-gfx] [PATCH v3 0/5] Fix legacy DPMS changes with MST
Next version of https://patchwork.freedesktop.org/series/49877/ This fixes some rather silly bugs regarding DPMS On->Off changes failing for connectors which were just recently destroyed. Lyude Paul (5): drm/atomic_helper: Disallow new modesets on unregistered connectors drm/nouveau: Fix nv50_mstc->best_encoder() drm/i915: Leave intel_conn->mst_port set, use mst_port_gone instead drm/i915: Skip vcpi allocation for MSTB ports that are gone drm/i915: Fix intel_dp_mst_best_encoder() drivers/gpu/drm/drm_atomic_helper.c | 21 - drivers/gpu/drm/i915/intel_dp_mst.c | 31 ++--- drivers/gpu/drm/i915/intel_drv.h| 6 + drivers/gpu/drm/nouveau/dispnv50/disp.c | 14 --- 4 files changed, 47 insertions(+), 25 deletions(-) -- 2.17.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 1/5] drm/atomic_helper: Disallow new modesets on unregistered connectors
With the exception of modesets which would switch the DPMS state of a
connector from on to off, we want to make sure that we disallow all
modesets which would result in enabling a new monitor or a new mode
configuration on a monitor if the connector for the display in question
is no longer registered. This allows us to stop userspace from trying to
enable new displays on connectors for an MST topology that were just
removed from the system, without preventing userspace from disabling
DPMS on those connectors.
Signed-off-by: Lyude Paul
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/drm_atomic_helper.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 80be74df7ba6..ce2decfc6826 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -307,6 +307,26 @@ update_connector_routing(struct drm_atomic_state *state,
return 0;
}
+ crtc_state = drm_atomic_get_new_crtc_state(state,
+ new_connector_state->crtc);
+ /*
+* For compatibility with legacy users, we want to make sure that
+* we allow DPMS On->Off modesets on unregistered connectors. Modesets
+* which would result in anything else must be considered invalid, to
+* avoid turning on new displays on dead connectors.
+*
+* Since the connector can be unregistered at any point during an
+* atomic check or commit, this is racy. But that's OK: all we care
+* about is ensuring that userspace can't do anything but shut off the
+* display on a connector that was destroyed after it's been notified,
+* not before.
+*/
+ if (!READ_ONCE(connector->registered) && crtc_state->active) {
+ DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] is not registered\n",
+connector->base.id, connector->name);
+ return -EINVAL;
+ }
+
funcs = connector->helper_private;
if (funcs->atomic_best_encoder)
@@ -351,7 +371,6 @@ update_connector_routing(struct drm_atomic_state *state,
set_best_encoder(state, new_connector_state, new_encoder);
- crtc_state = drm_atomic_get_new_crtc_state(state,
new_connector_state->crtc);
crtc_state->connectors_changed = true;
DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] using [ENCODER:%d:%s] on
[CRTC:%d:%s]\n",
--
2.17.1
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Re: [Intel-gfx] [PATCH] firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
Em Qui, 2018-10-04 às 15:36 -0700, Rodrigo Vivi escreveu:
> From: Anusha Srivatsa
>
> Add missing MODULE_FIRMWARE while loading DMC ICL.
>
> v2: Add Fixes tag. (Rodrigo)
> v3: Rebase by Rodrigo after commit 7fe78985cd08 ("drm/i915/csr:
> restructure CSR firmware definition macros")
> v4: Rodrigo fixing his own mess on commit mentioning on v3
> comment above.
>
> Fixes: 4445930f1c4a ("firmware/dmc/icl: load v1.07 on icelake.")
Yes, please. I wasted time because I lacked this commit.
Tested-by: Paulo Zanoni
> Cc: Rodrigo Vivi
> Cc: Paulo Zanoni
> Cc: Jani Nikula
> Signed-off-by: Anusha Srivatsa
> Reviewed-by: Rodrigo Vivi (v2)
> Signed-off-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_csr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c
> b/drivers/gpu/drm/i915/intel_csr.c
> index e4e310b0ef78..fc7bd21fa586 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -37,6 +37,7 @@
> #define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bi
> n"
> #define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
> #define ICL_CSR_MAX_FW_SIZE 0x6000
> +MODULE_FIRMWARE(ICL_CSR_PATH);
>
> #define CNL_CSR_PATH "i915/cnl_dmc_ver1_07.bi
> n"
> #define CNL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
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Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, Oct 04, 2018 at 04:03:05PM -0700, Lucas De Marchi wrote:
> On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan wrote:
> > The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
> > definitions are unused.
>
> If they are unused why are we fixing them instead of removing? Or better,
> why did we add them?
Sorry, my bad... I assumed Manasi's work depending on this would land sooner.
But this should actually be part of Manasi's series instead of merging.
Manasi is still working on that. So let's fix. Maybe it was a good thing
having in the tree... got more attention and fix than during reviews ;)
/me runs
>
> Lucas De Marchi
>
> >
> > Cc: Manasi Navare
> > Cc: Anusha Srivatsa
> > Cc: Rodrigo Vivi
> > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > 1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 27e650fe591b..a0ad77b9212b 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4584,6 +4584,15 @@ enum {
> > #define VIDEO_DIP_FREQ_2VSYNC(2 << 16)
> > #define VIDEO_DIP_FREQ_MASK (3 << 16)
> > /* HSW and later: */
> > +#define DRM_DIP_ENABLE (1 << 28)
> > +#define PSR_VSC_BIT_7_SET(1 << 27)
> > +#define VSC_SELECT_MASK (0x3 << 25)
> > +#define VSC_SELECT_SHIFT 25
> > +#define VSC_DIP_HW_HEA_DATA (0 << 25)
> > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > +#define VSC_DIP_SW_HEA_DATA (3 << 25)
> > +#define VDIP_ENABLE_PPS (1 << 24)
> > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > @@ -4591,15 +4600,6 @@ enum {
> > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> >
> > -#define DRM_DIP_ENABLE(1 << 28)
> > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > -#define VSC_SELECT_MASK (0x3 << 26)
> > -#define VSC_SELECT_SHIFT 26
> > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > -#define VSC_DIP_HW_HEA_SW_DATA(1 << 26)
> > -#define VSC_DIP_HW_DATA_SW_HEA(2 << 26)
> > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > -#define VDIP_ENABLE_PPS (1 << 24)
> >
> > /* Panel power sequencing */
> > #define PPS_BASE 0x61200
> > --
> > 2.14.1
> >
> > ___
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> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[Intel-gfx] [PATCH 5/6] drm/i915: don't write PLANE_BUF_CFG twice every time
We were writing to PLANE_BUF_CFG(pipe, plane_id) twice for every platform, and we were even using different values on the gen10- planar case. The first write is useless since it just gets replaced with the next one, so kill it. There's a lot to improve in the DDB code, but let's start by avoiding the double write. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 14f13a371989..53b4a9a2de69 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5040,8 +5040,6 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc, skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id), >trans_wm); - skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id), - >plane[pipe][plane_id]); /* FIXME: add proper NV12 support for ICL. */ if (INTEL_GEN(dev_priv) >= 11) return skl_ddb_entry_write(dev_priv, -- 2.14.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/6] drm/i915: transition WMs ask for Selected Result Blocks
The transition watermarks ask for Selected Result Blocks (the real
value), not Result Blocks (the integer value). Given how ceilings are
applied in both the non-transition and the transition watermarks
calculations, we can get away with assuming that Selected Result
Blocks is actually Result Blocks minus 1 without any rounding errors.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 40ce99c455f3..14f13a371989 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4874,7 +4874,7 @@ static void skl_compute_transition_wm(struct
intel_crtc_state *cstate,
const struct drm_i915_private *dev_priv = to_i915(dev);
uint16_t trans_min, trans_y_tile_min;
const uint16_t trans_amount = 10; /* This is configurable amount */
- uint16_t trans_offset_b, res_blocks;
+ uint16_t wm0_sel_res_b, trans_offset_b, res_blocks;
if (!cstate->base.active)
goto exit;
@@ -4893,13 +4893,25 @@ static void skl_compute_transition_wm(struct
intel_crtc_state *cstate,
trans_offset_b = trans_min + trans_amount;
+ /*
+* The spec asks for Selected Result Blocks for wm0 (the real value),
+* not Result Blocks (the integer value). Pay attention to the capital
+* letters. The value wm_l0->plane_res_b is actually Result Blocks, but
+* since Result Blocks is the ceiling of Selected Result Blocks plus 1,
+* and since we later will have to get the ceiling of the sum in the
+* transition watermarks calculation, we can just pretend Selected
+* Result Blocks is Result Blocks minus 1 and it should work for the
+* current platforms.
+*/
+ wm0_sel_res_b = wm_l0->plane_res_b - 1;
+
if (wp->y_tiled) {
trans_y_tile_min = (uint16_t) mul_round_up_u32_fixed16(2,
wp->y_tile_minimum);
- res_blocks = max(wm_l0->plane_res_b, trans_y_tile_min) +
+ res_blocks = max(wm0_sel_res_b, trans_y_tile_min) +
trans_offset_b;
} else {
- res_blocks = wm_l0->plane_res_b + trans_offset_b;
+ res_blocks = wm0_sel_res_b + trans_offset_b;
/* WA BUG:1938466 add one block for non y-tile planes */
if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))
--
2.14.4
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[Intel-gfx] [PATCH 0/6] Watermarks small fixes/improvements
I'm investigating ICL watermarks failures and these are some of the immediate problems I was able to find in the watermarks code. I don't think they're enough to fix the problems our CI is able to reproduce, but I do think these changes are worth having. Paulo Zanoni (6): drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+ drm/i915: fix the transition minimums for gen9+ watermarks drm/i915: fix the watermark result selection on glk/gen10+ drm/i915: transition WMs ask for Selected Result Blocks drm/i915: don't write PLANE_BUF_CFG twice every time drm/i915: promote ddb update message to DRM_DEBUG_KMS drivers/gpu/drm/i915/intel_pm.c | 100 1 file changed, 61 insertions(+), 39 deletions(-) -- 2.14.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/6] drm/i915: fix the watermark result selection on glk/gen10+
On these platforms we're supposed to unconditonally pick the method 2
result instead of the minimum.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index cab86690a0ba..40ce99c455f3 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4672,15 +4672,24 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
} else {
if ((wp->cpp * cstate->base.adjusted_mode.crtc_htotal /
wp->dbuf_block_size < 1) &&
-(wp->plane_bytes_per_line / wp->dbuf_block_size < 1))
+(wp->plane_bytes_per_line / wp->dbuf_block_size < 1)) {
selected_result = method2;
- else if (ddb_allocation >=
-fixed16_to_u32_round_up(wp->plane_blocks_per_line))
- selected_result = min_fixed16(method1, method2);
- else if (latency >= wp->linetime_us)
- selected_result = min_fixed16(method1, method2);
- else
+ } else if (ddb_allocation >=
+fixed16_to_u32_round_up(wp->plane_blocks_per_line)) {
+ if (INTEL_GEN(dev_priv) == 9 &&
+ !IS_GEMINILAKE(dev_priv))
+ selected_result = min_fixed16(method1, method2);
+ else
+ selected_result = method2;
+ } else if (latency >= wp->linetime_us) {
+ if (INTEL_GEN(dev_priv) == 9 &&
+ !IS_GEMINILAKE(dev_priv))
+ selected_result = min_fixed16(method1, method2);
+ else
+ selected_result = method2;
+ } else {
selected_result = method1;
+ }
}
res_blocks = fixed16_to_u32_round_up(selected_result) + 1;
--
2.14.4
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[Intel-gfx] [PATCH 2/6] drm/i915: fix the transition minimums for gen9+ watermarks
The transition minimum is 14 blocks for gens 9 and 10, and 4 blocks for gen 11. This minimum value is supposed to be added to the configurable trans_amount. This matches both BSpec and additional information provided by our HW engineers. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/intel_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 910551e04d16..cab86690a0ba 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4878,8 +4878,8 @@ static void skl_compute_transition_wm(struct intel_crtc_state *cstate, if (!dev_priv->ipc_enabled) goto exit; - trans_min = 0; - if (INTEL_GEN(dev_priv) >= 10) + trans_min = 14; + if (INTEL_GEN(dev_priv) >= 11) trans_min = 4; trans_offset_b = trans_min + trans_amount; -- 2.14.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/6] drm/i915: don't apply Display WAs 1125 and 1126 to GLK/CNL+
BSpec does not show these WAs as applicable to GLK, and for CNL it
only shows them applicable for a super early pre-production stepping
we shouldn't be caring about anymore. Remove these so we can avoid
them on ICL too.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1392aa56a55a..910551e04d16 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4687,28 +4687,31 @@ static int skl_compute_plane_wm(const struct
drm_i915_private *dev_priv,
res_lines = div_round_up_fixed16(selected_result,
wp->plane_blocks_per_line);
- /* Display WA #1125: skl,bxt,kbl,glk */
- if (level == 0 && wp->rc_surface)
- res_blocks += fixed16_to_u32_round_up(wp->y_tile_minimum);
+ if (IS_GEN9(dev_priv) && !IS_GEMINILAKE(dev_priv)) {
+ /* Display WA #1125: skl,bxt,kbl */
+ if (level == 0 && wp->rc_surface)
+ res_blocks +=
+ fixed16_to_u32_round_up(wp->y_tile_minimum);
+
+ /* Display WA #1126: skl,bxt,kbl */
+ if (level >= 1 && level <= 7) {
+ if (wp->y_tiled) {
+ res_blocks +=
+ fixed16_to_u32_round_up(wp->y_tile_minimum);
+ res_lines += wp->y_min_scanlines;
+ } else {
+ res_blocks++;
+ }
- /* Display WA #1126: skl,bxt,kbl,glk */
- if (level >= 1 && level <= 7) {
- if (wp->y_tiled) {
- res_blocks += fixed16_to_u32_round_up(
- wp->y_tile_minimum);
- res_lines += wp->y_min_scanlines;
- } else {
- res_blocks++;
+ /*
+* Make sure result blocks for higher latency levels are
+* atleast as high as level below the current level.
+* Assumption in DDB algorithm optimization for special
+* cases. Also covers Display WA #1125 for RC.
+*/
+ if (result_prev->plane_res_b > res_blocks)
+ res_blocks = result_prev->plane_res_b;
}
-
- /*
-* Make sure result blocks for higher latency levels are atleast
-* as high as level below the current level.
-* Assumption in DDB algorithm optimization for special cases.
-* Also covers Display WA #1125 for RC.
-*/
- if (result_prev->plane_res_b > res_blocks)
- res_blocks = result_prev->plane_res_b;
}
if (INTEL_GEN(dev_priv) >= 11) {
--
2.14.4
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[Intel-gfx] [PATCH 6/6] drm/i915: promote ddb update message to DRM_DEBUG_KMS
This message is currently marked as DRM_DEBUG_ATOMIC. I would like it
to be DRM_DEBUG_KMS since it is more KMS than atomic, and this will
also make the message appear in the CI logs, which may or may not help
us with some FIFO underrun bugs.
Signed-off-by: Paulo Zanoni
---
drivers/gpu/drm/i915/intel_pm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 53b4a9a2de69..6cacddd16010 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5233,11 +5233,11 @@ skl_print_wm_changes(const struct drm_atomic_state
*state)
if (skl_ddb_entry_equal(old, new))
continue;
- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] ddb (%d - %d) -> (%d -
%d)\n",
-intel_plane->base.base.id,
-intel_plane->base.name,
-old->start, old->end,
-new->start, new->end);
+ DRM_DEBUG_KMS("[PLANE:%d:%s] ddb (%d - %d) -> (%d -
%d)\n",
+ intel_plane->base.base.id,
+ intel_plane->base.name,
+ old->start, old->end,
+ new->start, new->end);
}
}
}
--
2.14.4
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Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, 2018-10-04 at 16:03 -0700, Lucas De Marchi wrote:
> On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan wrote:
> > The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
> > definitions are unused.
>
> If they are unused why are we fixing them instead of removing? Or
> better,
> why did we add them?
I guess there are plans to make use of them, no idea.
Cc: Anusha, Manasi
>
> Lucas De Marchi
>
> >
> > Cc: Manasi Navare
> > Cc: Anusha Srivatsa
> > Cc: Rodrigo Vivi
> > Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> > Signed-off-by: Dhinakaran Pandiyan
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 18 +-
> > 1 file changed, 9 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 27e650fe591b..a0ad77b9212b 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4584,6 +4584,15 @@ enum {
> > #define VIDEO_DIP_FREQ_2VSYNC(2 << 16)
> > #define VIDEO_DIP_FREQ_MASK (3 << 16)
> > /* HSW and later: */
> > +#define DRM_DIP_ENABLE (1 << 28)
> > +#define PSR_VSC_BIT_7_SET(1 << 27)
> > +#define VSC_SELECT_MASK (0x3 << 25)
> > +#define VSC_SELECT_SHIFT 25
> > +#define VSC_DIP_HW_HEA_DATA (0 << 25)
> > +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> > +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> > +#define VSC_DIP_SW_HEA_DATA (3 << 25)
> > +#define VDIP_ENABLE_PPS (1 << 24)
> > #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> > #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> > #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> > @@ -4591,15 +4600,6 @@ enum {
> > #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> > #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
> >
> > -#define DRM_DIP_ENABLE(1 << 28)
> > -#define PSR_VSC_BIT_7_SET (1 << 27)
> > -#define VSC_SELECT_MASK (0x3 << 26)
> > -#define VSC_SELECT_SHIFT 26
> > -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> > -#define VSC_DIP_HW_HEA_SW_DATA(1 << 26)
> > -#define VSC_DIP_HW_DATA_SW_HEA(2 << 26)
> > -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> > -#define VDIP_ENABLE_PPS (1 << 24)
> >
> > /* Panel power sequencing */
> > #define PPS_BASE 0x61200
> > --
> > 2.14.1
> >
> > ___
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[Intel-gfx] ✓ Fi.CI.BAT: success for firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev3)
== Series Details == Series: firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev3) URL : https://patchwork.freedesktop.org/series/49678/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4932 -> Patchwork_10367 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49678/revisions/3/mbox/ == Changes == No changes found == Participating hosts (48 -> 41) == Additional (1): fi-pnv-d510 Missing(8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bwr-2160 fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus == Build changes == * Linux: CI_DRM_4932 -> Patchwork_10367 CI_DRM_4932: 21f90148bf7adb33d82580013a5697a6bbb88248 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10367: 19ea29a1d3529803eeb934b1f05a16d240df5e22 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 19ea29a1d352 firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10367/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
On Thu, Oct 04, 2018 at 01:51:49PM -0700, Dhinakaran Pandiyan wrote:
> The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
> definitions are unused.
If they are unused why are we fixing them instead of removing? Or better,
why did we add them?
Lucas De Marchi
>
> Cc: Manasi Navare
> Cc: Anusha Srivatsa
> Cc: Rodrigo Vivi
> Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
> Signed-off-by: Dhinakaran Pandiyan
> ---
> drivers/gpu/drm/i915/i915_reg.h | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 27e650fe591b..a0ad77b9212b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4584,6 +4584,15 @@ enum {
> #define VIDEO_DIP_FREQ_2VSYNC (2 << 16)
> #define VIDEO_DIP_FREQ_MASK(3 << 16)
> /* HSW and later: */
> +#define DRM_DIP_ENABLE (1 << 28)
> +#define PSR_VSC_BIT_7_SET (1 << 27)
> +#define VSC_SELECT_MASK(0x3 << 25)
> +#define VSC_SELECT_SHIFT 25
> +#define VSC_DIP_HW_HEA_DATA(0 << 25)
> +#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
> +#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
> +#define VSC_DIP_SW_HEA_DATA(3 << 25)
> +#define VDIP_ENABLE_PPS(1 << 24)
> #define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
> #define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
> #define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
> @@ -4591,15 +4600,6 @@ enum {
> #define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
> #define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
>
> -#define DRM_DIP_ENABLE (1 << 28)
> -#define PSR_VSC_BIT_7_SET (1 << 27)
> -#define VSC_SELECT_MASK (0x3 << 26)
> -#define VSC_SELECT_SHIFT26
> -#define VSC_DIP_HW_HEA_DATA (0 << 26)
> -#define VSC_DIP_HW_HEA_SW_DATA (1 << 26)
> -#define VSC_DIP_HW_DATA_SW_HEA (2 << 26)
> -#define VSC_DIP_SW_HEA_DATA (3 << 26)
> -#define VDIP_ENABLE_PPS (1 << 24)
>
> /* Panel power sequencing */
> #define PPS_BASE 0x61200
> --
> 2.14.1
>
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[Intel-gfx] [PATCH] firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
From: Anusha Srivatsa
Add missing MODULE_FIRMWARE while loading DMC ICL.
v2: Add Fixes tag. (Rodrigo)
v3: Rebase by Rodrigo after commit 7fe78985cd08 ("drm/i915/csr:
restructure CSR firmware definition macros")
v4: Rodrigo fixing his own mess on commit mentioning on v3
comment above.
Fixes: 4445930f1c4a ("firmware/dmc/icl: load v1.07 on icelake.")
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi (v2)
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_csr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index e4e310b0ef78..fc7bd21fa586 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -37,6 +37,7 @@
#define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define ICL_CSR_MAX_FW_SIZE0x6000
+MODULE_FIRMWARE(ICL_CSR_PATH);
#define CNL_CSR_PATH "i915/cnl_dmc_ver1_07.bin"
#define CNL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
--
2.17.1
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Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2)
On Thu, Oct 04, 2018 at 10:14:17PM -, Patchwork wrote:
> == Series Details ==
>
> Series: firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2)
> URL : https://patchwork.freedesktop.org/series/49678/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 751aeeb3a90f firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
> -:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit
> <12+ chars of sha1> ("")' - ie: 'commit 7fe78985cd08
> ("drm/i915/csr: restructure CSR firmware definition macros")'
I think we need to change dim cite to use exact same line as cp requires :/
> #9:
> v3: Rebase by Rodrigo after 7fe78985cd08 ("drm/i915/csr: restructure CSR
>
> total: 1 errors, 0 warnings, 0 checks, 7 lines checked
>
> ___
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[Intel-gfx] ✓ Fi.CI.BAT: success for firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2)
== Series Details == Series: firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2) URL : https://patchwork.freedesktop.org/series/49678/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4932 -> Patchwork_10366 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/49678/revisions/2/mbox/ == Known issues == Here are the changes found in Patchwork_10366 that come from known issues: === IGT changes === Issues hit igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 == Participating hosts (48 -> 40) == Additional (1): fi-pnv-d510 Missing(9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bwr-2160 fi-bsw-cyan fi-ctg-p8600 fi-icl-u fi-bdw-samus == Build changes == * Linux: CI_DRM_4932 -> Patchwork_10366 CI_DRM_4932: 21f90148bf7adb33d82580013a5697a6bbb88248 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10366: 751aeeb3a90f190fb115cc679f45fbed941d27cf @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 751aeeb3a90f firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10366/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2)
== Series Details ==
Series: firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake. (rev2)
URL : https://patchwork.freedesktop.org/series/49678/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
751aeeb3a90f firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 7fe78985cd08 ("drm/i915/csr:
restructure CSR firmware definition macros")'
#9:
v3: Rebase by Rodrigo after 7fe78985cd08 ("drm/i915/csr: restructure CSR
total: 1 errors, 0 warnings, 0 checks, 7 lines checked
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[Intel-gfx] [PATCH] firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
From: Anusha Srivatsa
Add missing MODULE_FIRMWARE while loading DMC ICL.
v2: Add Fixes tag. (Rodrigo)
v3: Rebase by Rodrigo after 7fe78985cd08 ("drm/i915/csr: restructure CSR
firmware definition macros")
Fixes: 4445930f1c4a ("firmware/dmc/icl: load v1.07 on icelake.")
Cc: Rodrigo Vivi
Cc: Paulo Zanoni
Cc: Jani Nikula
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi (v2)
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_csr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index e4e310b0ef78..fc7bd21fa586 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -37,6 +37,7 @@
#define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define ICL_CSR_MAX_FW_SIZE0x6000
+MODULE_FIRMWARE(ICL_CSR_PATH);
#define CNL_CSR_PATH "i915/cnl_dmc_ver1_07.bin"
#define CNL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
--
2.17.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix VIDEO_DIP_CTL bit shifts
== Series Details == Series: drm/i915: Fix VIDEO_DIP_CTL bit shifts URL : https://patchwork.freedesktop.org/series/50573/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4932 -> Patchwork_10365 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50573/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10365 that come from known issues: === IGT changes === Issues hit igt@kms_flip@basic-flip-vs-dpms: fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927) fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 == Participating hosts (48 -> 39) == Missing(9): fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bwr-2160 fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus == Build changes == * Linux: CI_DRM_4932 -> Patchwork_10365 CI_DRM_4932: 21f90148bf7adb33d82580013a5697a6bbb88248 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10365: dabd694408ac19e4f366640c15665211e4de0e53 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == dabd694408ac drm/i915: Fix VIDEO_DIP_CTL bit shifts == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10365/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 8/8] drm/i915/icl: Fix DDI/TC port clk_off bits
On Wed, Oct 03, 2018 at 12:52:03PM +0530, Mahesh Kumar wrote:
> DDI/TC clock-off bits are not equally distanced. TC1-3 bits are
> from offset 12 & TC4 is at offset 21.
> Create a function to choose correct clk-off bit.
>
> Signed-off-by: Mahesh Kumar
> Signed-off-by: Vandita Kulkarni
> Cc: Lucas De Marchi
Missing Fixes tag.
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_ddi.c | 21 ++---
> 2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eaf3e0d529d3..e1a2851a28cf 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9302,6 +9302,9 @@ enum skl_power_gate {
> #define DPCLKA_CFGCR0_ICL_MMIO(0x164280)
> #define DPCLKA_CFGCR0_DDI_CLK_OFF(port) (1 << ((port) == PORT_F ? 23 :
> \
> (port) + 10))
> +#define ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port) (1 << ((port) + 10))
> +#define ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) == PORT_TC4
> ? \
> + 21 : (tc_port) + 12))
> #define DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port) ((port) == PORT_F ? 21
> : \
> (port) * 2)
> #define DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port)(3 <<
> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port))
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index b5b8dae06cde..9883f02756ab 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2733,6 +2733,21 @@ uint32_t ddi_signal_levels(struct intel_dp *intel_dp)
> return DDI_BUF_TRANS_SELECT(level);
> }
>
> +static inline
> +uint32_t icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv,
> +enum port port)
> +{
> + if (intel_port_is_combophy(dev_priv, port)) {
> + return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port);
> + } else if (intel_port_is_tc(dev_priv, port)) {
> + enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> +
> + return ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port);
> + }
> +
> + return 0;
> +}
> +
> void icl_map_plls_to_ports(struct drm_crtc *crtc,
> struct intel_crtc_state *crtc_state,
> struct drm_atomic_state *old_state)
> @@ -2756,7 +2771,7 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc,
> mutex_lock(_priv->dpll_lock);
>
> val = I915_READ(DPCLKA_CFGCR0_ICL);
> - WARN_ON((val & DPCLKA_CFGCR0_DDI_CLK_OFF(port)) == 0);
> + WARN_ON((val & icl_dpclka_cfgcr0_clk_off(dev_priv, port)) == 0);
>
> if (intel_port_is_combophy(dev_priv, port)) {
> val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
> @@ -2765,7 +2780,7 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc,
> POSTING_READ(DPCLKA_CFGCR0_ICL);
> }
>
> - val &= ~DPCLKA_CFGCR0_DDI_CLK_OFF(port);
> + val &= ~icl_dpclka_cfgcr0_clk_off(dev_priv, port);
> I915_WRITE(DPCLKA_CFGCR0_ICL, val);
>
> mutex_unlock(_priv->dpll_lock);
> @@ -2793,7 +2808,7 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
> mutex_lock(_priv->dpll_lock);
> I915_WRITE(DPCLKA_CFGCR0_ICL,
> I915_READ(DPCLKA_CFGCR0_ICL) |
> -DPCLKA_CFGCR0_DDI_CLK_OFF(port));
> +icl_dpclka_cfgcr0_clk_off(dev_priv, port));
> mutex_unlock(_priv->dpll_lock);
> }
> }
> --
> 2.16.2
>
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Re: [Intel-gfx] [PATCH 5/8] drm/i915/icl: Refactor icl pll functions
On Wed, Oct 03, 2018 at 12:52:00PM +0530, Mahesh Kumar wrote:
> From: Vandita Kulkarni
>
> This patch adds helper function for identifying
> whether the given PLL is combo PHY PLL or not.
> This helper function is used inside various ICL
> functions to make them scalable.
>
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Mahesh Kumar
> Cc: Madhav Chauhan
> Cc: Lucas De Marchi
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/intel_display.c | 2 +-
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 54
> +++
> drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 +
> 3 files changed, 19 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index e31d71526afd..a1c6891cf14b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9301,7 +9301,7 @@ static void icelake_get_ddi_pll(struct drm_i915_private
> *dev_priv,
> DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
> id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port);
>
> - if (WARN_ON(id != DPLL_ID_ICL_DPLL0 && id != DPLL_ID_ICL_DPLL1))
> + if (WARN_ON(!intel_dpll_is_combophy(id)))
> return;
> } else if (intel_port_is_tc(dev_priv, port)) {
> id = icl_port_to_mg_pll_id(port);
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 5b2ee49aee14..93e8e2307989 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2633,6 +2633,11 @@ enum intel_dpll_id icl_port_to_mg_pll_id(enum port
> port)
> return port - PORT_C + DPLL_ID_ICL_MGPLL1;
> }
>
> +bool intel_dpll_is_combophy(enum intel_dpll_id id)
> +{
> + return id == DPLL_ID_ICL_DPLL0 || id == DPLL_ID_ICL_DPLL1;
> +}
> +
> static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
>uint32_t *target_dco_khz,
>struct intel_dpll_hw_state *state)
> @@ -2926,21 +2931,16 @@ icl_get_dpll(struct intel_crtc *crtc, struct
> intel_crtc_state *crtc_state,
>
> static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id)
> {
> - switch (id) {
> - default:
> - MISSING_CASE(id);
> - /* fall through */
> - case DPLL_ID_ICL_DPLL0:
> - case DPLL_ID_ICL_DPLL1:
> + if (intel_dpll_is_combophy(id))
> return CNL_DPLL_ENABLE(id);
> - case DPLL_ID_ICL_TBTPLL:
> + else if (id == DPLL_ID_ICL_TBTPLL)
> return TBT_PLL_ENABLE;
> - case DPLL_ID_ICL_MGPLL1:
> - case DPLL_ID_ICL_MGPLL2:
> - case DPLL_ID_ICL_MGPLL3:
> - case DPLL_ID_ICL_MGPLL4:
> + else
> + /*
> + * TODO: Make MG_PLL macros use
> + * tc port id instead of port id
> + */
> return MG_PLL_ENABLE(icl_mg_pll_id_to_port(id));
> - }
> }
>
> static bool icl_pll_get_hw_state(struct drm_i915_private *dev_priv,
> @@ -2959,17 +2959,11 @@ static bool icl_pll_get_hw_state(struct
> drm_i915_private *dev_priv,
> if (!(val & PLL_ENABLE))
> goto out;
>
> - switch (id) {
> - case DPLL_ID_ICL_DPLL0:
> - case DPLL_ID_ICL_DPLL1:
> - case DPLL_ID_ICL_TBTPLL:
> + if (intel_dpll_is_combophy(id) ||
> + id == DPLL_ID_ICL_TBTPLL) {
> hw_state->cfgcr0 = I915_READ(ICL_DPLL_CFGCR0(id));
> hw_state->cfgcr1 = I915_READ(ICL_DPLL_CFGCR1(id));
> - break;
> - case DPLL_ID_ICL_MGPLL1:
> - case DPLL_ID_ICL_MGPLL2:
> - case DPLL_ID_ICL_MGPLL3:
> - case DPLL_ID_ICL_MGPLL4:
> + } else {
> port = icl_mg_pll_id_to_port(id);
> hw_state->mg_refclkin_ctl = I915_READ(MG_REFCLKIN_CTL(port));
> hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK;
> @@ -3007,9 +3001,6 @@ static bool icl_pll_get_hw_state(struct
> drm_i915_private *dev_priv,
>
> hw_state->mg_pll_tdc_coldst_bias &=
> hw_state->mg_pll_tdc_coldst_bias_mask;
> hw_state->mg_pll_bias &= hw_state->mg_pll_bias_mask;
> - break;
> - default:
> - MISSING_CASE(id);
> }
>
> ret = true;
> @@ -3098,21 +3089,10 @@ static void icl_pll_enable(struct drm_i915_private
> *dev_priv,
> PLL_POWER_STATE, 1))
> DRM_ERROR("PLL %d Power not enabled\n", id);
>
> - switch (id) {
> - case DPLL_ID_ICL_DPLL0:
> - case DPLL_ID_ICL_DPLL1:
> - case DPLL_ID_ICL_TBTPLL:
> + if (intel_dpll_is_combophy(id) || id == DPLL_ID_ICL_TBTPLL)
> icl_dpll_write(dev_priv, pll);
> - break;
> - case DPLL_ID_ICL_MGPLL1:
> - case DPLL_ID_ICL_MGPLL2:
> - case DPLL_ID_ICL_MGPLL3:
> - case DPLL_ID_ICL_MGPLL4:
> + else
>
Re: [Intel-gfx] [PATCH 4/8] drm/i915/icl: Use helper functions to classify the ports
On Wed, Oct 03, 2018 at 12:51:59PM +0530, Mahesh Kumar wrote:
> From: Vandita Kulkarni
>
> Use intel_port_is_tc and intel_port_is_combophy
> functions to replace the individual port checks
> from port C to F and port A to B respectively.
>
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Mahesh Kumar
> Cc: Lucas De Marchi
> Cc: Madhav Chauhan
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/intel_display.c | 15 ---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 14 --
> 2 files changed, 8 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 16d9a20a420a..e31d71526afd 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9296,24 +9296,17 @@ static void icelake_get_ddi_pll(struct
> drm_i915_private *dev_priv,
> u32 temp;
>
> /* TODO: TBT pll not implemented. */
> - switch (port) {
> - case PORT_A:
> - case PORT_B:
> + if (intel_port_is_combophy(dev_priv, port)) {
> temp = I915_READ(DPCLKA_CFGCR0_ICL) &
> DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
> id = temp >> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port);
>
> if (WARN_ON(id != DPLL_ID_ICL_DPLL0 && id != DPLL_ID_ICL_DPLL1))
> return;
> - break;
> - case PORT_C:
> - case PORT_D:
> - case PORT_E:
> - case PORT_F:
> + } else if (intel_port_is_tc(dev_priv, port)) {
> id = icl_port_to_mg_pll_id(port);
> - break;
> - default:
> - MISSING_CASE(port);
> + } else {
> + WARN(1, "Invalid port %x\n", port);
> return;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 510ea90f6f5b..5b2ee49aee14 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2874,6 +2874,7 @@ static struct intel_shared_dpll *
> icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
>struct intel_encoder *encoder)
> {
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_digital_port *intel_dig_port =
> enc_to_dig_port(>base);
> struct intel_shared_dpll *pll;
> @@ -2883,18 +2884,12 @@ icl_get_dpll(struct intel_crtc *crtc, struct
> intel_crtc_state *crtc_state,
> int clock = crtc_state->port_clock;
> bool ret;
>
> - switch (port) {
> - case PORT_A:
> - case PORT_B:
> + if (intel_port_is_combophy(dev_priv, port)) {
> min = DPLL_ID_ICL_DPLL0;
> max = DPLL_ID_ICL_DPLL1;
> ret = icl_calc_dpll_state(crtc_state, encoder, clock,
> _state);
> - break;
> - case PORT_C:
> - case PORT_D:
> - case PORT_E:
> - case PORT_F:
> + } else if (intel_port_is_tc(dev_priv, port)) {
> if (intel_dig_port->tc_type == TC_PORT_TBT) {
> min = DPLL_ID_ICL_TBTPLL;
> max = min;
> @@ -2906,8 +2901,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct
> intel_crtc_state *crtc_state,
> ret = icl_calc_mg_pll_state(crtc_state, encoder, clock,
> _state);
> }
> - break;
> - default:
> + } else {
> MISSING_CASE(port);
> return NULL;
> }
> --
> 2.16.2
>
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Re: [Intel-gfx] [PATCH 3/8] drm/i915/icl: Refactor get_ddi_pll using helper func
On Wed, Oct 03, 2018 at 12:51:58PM +0530, Mahesh Kumar wrote:
> From: Vandita Kulkarni
>
> Use the existing port-to-id helper function, to refactor
> hence making it scalable.
>
> Signed-off-by: Vandita Kulkarni
> Signed-off-by: Mahesh Kumar
> Cc: Lucas De Marchi
> Cc: Madhav Chauhan
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 +---
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
> drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 +
> 3 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 916eb71e78ed..16d9a20a420a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9307,16 +9307,10 @@ static void icelake_get_ddi_pll(struct
> drm_i915_private *dev_priv,
> return;
> break;
> case PORT_C:
> - id = DPLL_ID_ICL_MGPLL1;
> - break;
> case PORT_D:
> - id = DPLL_ID_ICL_MGPLL2;
> - break;
> case PORT_E:
> - id = DPLL_ID_ICL_MGPLL3;
> - break;
> case PORT_F:
> - id = DPLL_ID_ICL_MGPLL4;
> + id = icl_port_to_mg_pll_id(port);
> break;
> default:
> MISSING_CASE(port);
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index e6cac9225536..510ea90f6f5b 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2628,7 +2628,7 @@ static enum port icl_mg_pll_id_to_port(enum
> intel_dpll_id id)
> return id - DPLL_ID_ICL_MGPLL1 + PORT_C;
> }
>
> -static enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
> +enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
> {
> return port - PORT_C + DPLL_ID_ICL_MGPLL1;
> }
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> index bf0de8a4dc63..5305ce1c2175 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> @@ -345,5 +345,6 @@ void intel_dpll_dump_hw_state(struct drm_i915_private
> *dev_priv,
> int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
> uint32_t pll_id);
> int cnl_hdmi_pll_ref_clock(struct drm_i915_private *dev_priv);
> +enum intel_dpll_id icl_port_to_mg_pll_id(enum port port);
>
> #endif /* _INTEL_DPLL_MGR_H_ */
> --
> 2.16.2
>
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Re: [Intel-gfx] [PATCH 2/8] drm/i915/icl: use combophy/TC helper functions during display detection
On Wed, Oct 03, 2018 at 12:51:57PM +0530, Mahesh Kumar wrote:
> Instead of directly comparing HPD pins use intel_port_is_combophy/tc
> helper functions to distinguish between combophy/TC ports.
>
> Signed-off-by: Mahesh Kumar
> Cc: Manasi Navare
> ---
Reviewed-by: Lucas De Marchi
> drivers/gpu/drm/i915/intel_dp.c | 15 +--
> 1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 15a981ef5966..f6b9be81ea18 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4965,19 +4965,14 @@ static bool icl_digital_port_connected(struct
> intel_encoder *encoder)
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_digital_port *dig_port = enc_to_dig_port(>base);
>
> - switch (encoder->hpd_pin) {
> - case HPD_PORT_A:
> - case HPD_PORT_B:
> + if (intel_port_is_combophy(dev_priv, encoder->port))
> return icl_combo_port_connected(dev_priv, dig_port);
> - case HPD_PORT_C:
> - case HPD_PORT_D:
> - case HPD_PORT_E:
> - case HPD_PORT_F:
> + else if (intel_port_is_tc(dev_priv, encoder->port))
> return icl_tc_port_connected(dev_priv, dig_port);
> - default:
> + else
> MISSING_CASE(encoder->hpd_pin);
> - return false;
> - }
> +
> + return false;
> }
>
> /*
> --
> 2.16.2
>
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[Intel-gfx] [PATCH] drm/i915: Fix VIDEO_DIP_CTL bit shifts
The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
definitions are unused.
Cc: Manasi Navare
Cc: Anusha Srivatsa
Cc: Rodrigo Vivi
Fixes: 7af2be6d54d4 ("drm/i915/icl: Add VIDEO_DIP registers")
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/i915_reg.h | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 27e650fe591b..a0ad77b9212b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4584,6 +4584,15 @@ enum {
#define VIDEO_DIP_FREQ_2VSYNC(2 << 16)
#define VIDEO_DIP_FREQ_MASK (3 << 16)
/* HSW and later: */
+#define DRM_DIP_ENABLE (1 << 28)
+#define PSR_VSC_BIT_7_SET(1 << 27)
+#define VSC_SELECT_MASK (0x3 << 25)
+#define VSC_SELECT_SHIFT 25
+#define VSC_DIP_HW_HEA_DATA (0 << 25)
+#define VSC_DIP_HW_HEA_SW_DATA (1 << 25)
+#define VSC_DIP_HW_DATA_SW_HEA (2 << 25)
+#define VSC_DIP_SW_HEA_DATA (3 << 25)
+#define VDIP_ENABLE_PPS (1 << 24)
#define VIDEO_DIP_ENABLE_VSC_HSW (1 << 20)
#define VIDEO_DIP_ENABLE_GCP_HSW (1 << 16)
#define VIDEO_DIP_ENABLE_AVI_HSW (1 << 12)
@@ -4591,15 +4600,6 @@ enum {
#define VIDEO_DIP_ENABLE_GMP_HSW (1 << 4)
#define VIDEO_DIP_ENABLE_SPD_HSW (1 << 0)
-#define DRM_DIP_ENABLE(1 << 28)
-#define PSR_VSC_BIT_7_SET (1 << 27)
-#define VSC_SELECT_MASK (0x3 << 26)
-#define VSC_SELECT_SHIFT 26
-#define VSC_DIP_HW_HEA_DATA (0 << 26)
-#define VSC_DIP_HW_HEA_SW_DATA(1 << 26)
-#define VSC_DIP_HW_DATA_SW_HEA(2 << 26)
-#define VSC_DIP_SW_HEA_DATA (3 << 26)
-#define VDIP_ENABLE_PPS (1 << 24)
/* Panel power sequencing */
#define PPS_BASE 0x61200
--
2.14.1
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Re: [Intel-gfx] [PATCH 17/18] drm: Unexport drm_plane_helper_check_update
On Wed, Oct 03, 2018 at 11:18:26AM +0200, Daniel Vetter wrote:
> It's for legacy drivers only (atomic ones should use
> drm_atomic_helper_check_plane_state() instead), and there's no users
> left except the one in the primary plane helpers.
>
> Signed-off-by: Daniel Vetter
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_plane_helper.c | 49 +++---
> include/drm/drm_plane_helper.h | 11 ---
> 2 files changed, 11 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_plane_helper.c
> b/drivers/gpu/drm/drm_plane_helper.c
> index 965286231600..33b3e6892787 100644
> --- a/drivers/gpu/drm/drm_plane_helper.c
> +++ b/drivers/gpu/drm/drm_plane_helper.c
> @@ -100,43 +100,17 @@ static int get_connectors_for_crtc(struct drm_crtc
> *crtc,
> return count;
> }
>
> -/**
> - * drm_plane_helper_check_update() - Check plane update for validity
> - * @plane: plane object to update
> - * @crtc: owning CRTC of owning plane
> - * @fb: framebuffer to flip onto plane
> - * @src: source coordinates in 16.16 fixed point
> - * @dst: integer destination coordinates
> - * @rotation: plane rotation
> - * @min_scale: minimum @src:@dest scaling factor in 16.16 fixed point
> - * @max_scale: maximum @src:@dest scaling factor in 16.16 fixed point
> - * @can_position: is it legal to position the plane such that it
> - *doesn't cover the entire crtc? This will generally
> - *only be false for primary planes.
> - * @can_update_disabled: can the plane be updated while the crtc
> - * is disabled?
> - * @visible: output parameter indicating whether plane is still visible after
> - * clipping
> - *
> - * Checks that a desired plane update is valid. Drivers that provide
> - * their own plane handling rather than helper-provided implementations may
> - * still wish to call this function to avoid duplication of error checking
> - * code.
> - *
> - * RETURNS:
> - * Zero if update appears valid, error code on failure
> - */
> -int drm_plane_helper_check_update(struct drm_plane *plane,
> - struct drm_crtc *crtc,
> - struct drm_framebuffer *fb,
> - struct drm_rect *src,
> - struct drm_rect *dst,
> - unsigned int rotation,
> - int min_scale,
> - int max_scale,
> - bool can_position,
> - bool can_update_disabled,
> - bool *visible)
> +static int drm_plane_helper_check_update(struct drm_plane *plane,
> + struct drm_crtc *crtc,
> + struct drm_framebuffer *fb,
> + struct drm_rect *src,
> + struct drm_rect *dst,
> + unsigned int rotation,
> + int min_scale,
> + int max_scale,
> + bool can_position,
> + bool can_update_disabled,
> + bool *visible)
> {
> struct drm_plane_state plane_state = {
> .plane = plane,
> @@ -173,7 +147,6 @@ int drm_plane_helper_check_update(struct drm_plane *plane,
>
> return 0;
> }
> -EXPORT_SYMBOL(drm_plane_helper_check_update);
>
> /**
> * drm_primary_helper_update() - Helper for primary plane update
> diff --git a/include/drm/drm_plane_helper.h b/include/drm/drm_plane_helper.h
> index 1999781781c7..7bff930b8b10 100644
> --- a/include/drm/drm_plane_helper.h
> +++ b/include/drm/drm_plane_helper.h
> @@ -38,17 +38,6 @@
> */
> #define DRM_PLANE_HELPER_NO_SCALING (1<<16)
>
> -int drm_plane_helper_check_update(struct drm_plane *plane,
> - struct drm_crtc *crtc,
> - struct drm_framebuffer *fb,
> - struct drm_rect *src,
> - struct drm_rect *dest,
> - unsigned int rotation,
> - int min_scale,
> - int max_scale,
> - bool can_position,
> - bool can_update_disabled,
> - bool *visible);
> int drm_primary_helper_update(struct drm_plane *plane,
> struct drm_crtc *crtc,
> struct drm_framebuffer *fb,
> --
> 2.19.0.rc2
>
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___
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Re: [Intel-gfx] [PATCH 04/18] drm/vmwgfx: Remove confused comment from vmw_du_connector_atomic_set_property
On Tue, Oct 02, 2018 at 04:36:31PM +, Thomas Hellstrom wrote:
> On 10/02/2018 05:15 PM, Ville Syrjälä wrote:
> > On Tue, Oct 02, 2018 at 03:35:12PM +0200, Daniel Vetter wrote:
> >> The core _does_ the call to drm_atomic_commit for you. That's pretty
> >> much the entire point of having the fancy new atomic_set/get_prop
> >> callbacks.
> >>
> >> Signed-off-by: Daniel Vetter
> >> Cc: VMware Graphics
> >> Cc: Sinclair Yeh
> >> Cc: Thomas Hellstrom
> >> ---
> >> drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 6 --
> >> 1 file changed, 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> >> b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> >> index 292e48feba83..049bd50eea87 100644
> >> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> >> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
> >> @@ -2311,12 +2311,6 @@ vmw_du_connector_atomic_set_property(struct
> >> drm_connector *connector,
> >>
> >>if (property == dev_priv->implicit_placement_property) {
> >>vcs->is_implicit = val;
> >> -
> >> - /*
> >> - * We should really be doing a drm_atomic_commit() to
> >> - * commit the new state, but since this doesn't cause
> >> - * an immedate state change, this is probably ok
> >> - */
> >>du->is_implicit = vcs->is_implicit;
> > Maybe the comment is referring to delaying the du->is_implicit
> > assignment to commit time? Otherwise a TEST_ONLY/failed commit
> > will clobber this.
>
> The is_implicit property is made read-only in a vmwgfx recent commit.
> Not sure exactly where it ended up, though. (-fixes, -next or -limbo).
> Need to take a look.
I guess -limbo, since my tree contains both drm-fixes and drm-next. Or at
least they didn't make it to Dave yet.
-Daniel
>
>
> >
> > Hmm. There's both .set_property() and .atomic_set_property()
> > in there. I wonder what that's about.
>
> Probably a leftover. I take it .set_property() is not needed when we
> have .atomic_set_property()?
>
> /Thomas
>
> >
> >>} else {
> >>return -EINVAL;
> >> --
> >> 2.19.0.rc2
> >>
> >> ___
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>
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Re: [Intel-gfx] [PATCH v2 1/8] drm/i915/icl: create function to identify combophy port
On Thu, Oct 04, 2018 at 02:20:43PM +0530, Mahesh Kumar wrote:
> This patch creates a function/wrapper to check if port is combophy port
> instead of explicitly comparing ports.
>
> Changes since V1:
> - keep all intel_port_is_* helper together (Lucas)
>
> Signed-off-by: Mahesh Kumar
> Cc: Madhav Chauhan
> Cc: Manasi Navare
> Reviewed-by: Rodrigo Vivi
Reviewed-by: Lucas De Marchi
Lucas De Marchi
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 15 ---
> drivers/gpu/drm/i915/intel_display.c | 11 +++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 3 files changed, 20 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index b6594948b617..69b7355845ac 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -916,7 +916,7 @@ static int intel_ddi_hdmi_level(struct drm_i915_private
> *dev_priv, enum port por
> level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
>
> if (IS_ICELAKE(dev_priv)) {
> - if (port == PORT_A || port == PORT_B)
> + if (intel_port_is_combophy(dev_priv, port))
> icl_get_combo_buf_trans(dev_priv, port,
> INTEL_OUTPUT_HDMI, _entries);
> else
> @@ -1535,7 +1535,7 @@ static void icl_ddi_clock_get(struct intel_encoder
> *encoder,
> uint32_t pll_id;
>
> pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll);
> - if (port == PORT_A || port == PORT_B) {
> + if (intel_port_is_combophy(dev_priv, port)) {
> if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
> link_clock = cnl_calc_wrpll_link(dev_priv, pll_id);
> else
> @@ -2235,7 +2235,7 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder
> *encoder)
> int n_entries;
>
> if (IS_ICELAKE(dev_priv)) {
> - if (port == PORT_A || port == PORT_B)
> + if (intel_port_is_combophy(dev_priv, port))
> icl_get_combo_buf_trans(dev_priv, port, encoder->type,
> _entries);
> else
> @@ -2669,9 +2669,10 @@ static void icl_ddi_vswing_sequence(struct
> intel_encoder *encoder,
> u32 level,
> enum intel_output_type type)
> {
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> enum port port = encoder->port;
>
> - if (port == PORT_A || port == PORT_B)
> + if (intel_port_is_combophy(dev_priv, port))
> icl_combo_phy_ddi_vswing_sequence(encoder, level, type);
> else
> icl_mg_phy_ddi_vswing_sequence(encoder, link_clock, level);
> @@ -2757,7 +2758,7 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc,
> val = I915_READ(DPCLKA_CFGCR0_ICL);
> WARN_ON((val & DPCLKA_CFGCR0_DDI_CLK_OFF(port)) == 0);
>
> - if (port == PORT_A || port == PORT_B) {
> + if (intel_port_is_combophy(dev_priv, port)) {
> val &= ~DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port);
> val |= DPCLKA_CFGCR0_DDI_CLK_SEL(pll->info->id, port);
> I915_WRITE(DPCLKA_CFGCR0_ICL, val);
> @@ -2810,7 +2811,7 @@ static void intel_ddi_clk_select(struct intel_encoder
> *encoder,
> mutex_lock(_priv->dpll_lock);
>
> if (IS_ICELAKE(dev_priv)) {
> - if (port >= PORT_C)
> + if (!intel_port_is_combophy(dev_priv, port))
> I915_WRITE(DDI_CLK_SEL(port),
> icl_pll_to_ddi_pll_sel(encoder, pll));
> } else if (IS_CANNONLAKE(dev_priv)) {
> @@ -2852,7 +2853,7 @@ static void intel_ddi_clk_disable(struct intel_encoder
> *encoder)
> enum port port = encoder->port;
>
> if (IS_ICELAKE(dev_priv)) {
> - if (port >= PORT_C)
> + if (!intel_port_is_combophy(dev_priv, port))
> I915_WRITE(DDI_CLK_SEL(port), DDI_CLK_SEL_NONE);
> } else if (IS_CANNONLAKE(dev_priv)) {
> I915_WRITE(DPCLKA_CFGCR0, I915_READ(DPCLKA_CFGCR0) |
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 36434c5359b1..60aa033405bd 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5944,6 +5944,17 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
> I915_WRITE(BCLRPAT(crtc->pipe), 0);
> }
>
> +bool intel_port_is_combophy(struct drm_i915_private *dev_priv, enum port
> port)
> +{
> + if (port == PORT_NONE)
> + return false;
> +
> + if (IS_ICELAKE(dev_priv))
> + return port <= PORT_B;
> +
> + return false;
> +}
> +
> bool intel_port_is_tc(struct drm_i915_private *dev_priv, enum port port)
> {
> if (IS_ICELAKE(dev_priv))
> diff --git
Re: [Intel-gfx] [PATCH 02/18] drm/atomic-helper: Unexport drm_atomic_helper_best_encoder
On Thu, Oct 04, 2018 at 02:33:24PM -0400, Sean Paul wrote:
> On Tue, Oct 02, 2018 at 03:35:10PM +0200, Daniel Vetter wrote:
> > It's the default. The exported version was kinda a transition state,
> > before we made this the default.
> >
> > To stop new atomic drivers from using it (instead of just relying on
> > the default) let's unexport it.
> >
> > Signed-off-by: Daniel Vetter
> > Cc: Gustavo Padovan
> > Cc: Maarten Lankhorst
> > Cc: Sean Paul
> > Cc: David Airlie
> > Cc: VMware Graphics
> > Cc: Sinclair Yeh
> > Cc: Thomas Hellstrom
> > Cc: Archit Taneja
> > Cc: Neil Armstrong
> > Cc: Laurent Pinchart
> > Cc: Hans Verkuil
> > Cc: Daniel Vetter
> > Cc: Russell King
> > Cc: Jernej Skrabec
> > Cc: Jani Nikula
> > Cc: Pierre-Hugues Husson
> > Cc: Fabio Estevam
> > ---
> > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 -
> > drivers/gpu/drm/drm_atomic_helper.c | 24 +++
> > drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 1 -
> > drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 1 -
> > drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 1 -
> > include/drm/drm_atomic_helper.h | 2 --
> > 6 files changed, 7 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > index ac37c50d6c4b..5ac979d3450b 100644
> > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > @@ -1957,7 +1957,6 @@ static const struct drm_connector_funcs
> > dw_hdmi_connector_funcs = {
> >
> > static const struct drm_connector_helper_funcs
> > dw_hdmi_connector_helper_funcs = {
> > .get_modes = dw_hdmi_connector_get_modes,
> > - .best_encoder = drm_atomic_helper_best_encoder,
> > };
> >
> > static int dw_hdmi_bridge_attach(struct drm_bridge *bridge)
> > diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> > b/drivers/gpu/drm/drm_atomic_helper.c
> > index f92b7cf4cbd7..8c93f33fe92f 100644
> > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > @@ -92,6 +92,13 @@ drm_atomic_helper_plane_changed(struct drm_atomic_state
> > *state,
> > }
> > }
> >
> > +static struct drm_encoder *
> > +drm_atomic_helper_best_encoder(struct drm_connector *connector)
> > +{
> > + WARN_ON(connector->encoder_ids[1]);
> > + return drm_encoder_find(connector->dev, NULL,
> > connector->encoder_ids[0]);
> > +}
> > +
> > static int handle_conflicting_encoders(struct drm_atomic_state *state,
> >bool disable_conflicting_encoders)
> > {
> > @@ -3376,23 +3383,6 @@ int drm_atomic_helper_page_flip_target(struct
> > drm_crtc *crtc,
> > }
> > EXPORT_SYMBOL(drm_atomic_helper_page_flip_target);
> >
> > -/**
> > - * drm_atomic_helper_best_encoder - Helper for
> > - * _connector_helper_funcs.best_encoder callback
> > - * @connector: Connector control structure
> > - *
> > - * This is a _connector_helper_funcs.best_encoder callback helper for
> > - * connectors that support exactly 1 encoder, statically determined at
> > driver
> > - * init time.
> > - */
> > -struct drm_encoder *
> > -drm_atomic_helper_best_encoder(struct drm_connector *connector)
> > -{
> > - WARN_ON(connector->encoder_ids[1]);
> > - return drm_encoder_find(connector->dev, NULL,
> > connector->encoder_ids[0]);
> > -}
> > -EXPORT_SYMBOL(drm_atomic_helper_best_encoder);
> > -
> > /**
> > * DOC: atomic state reset and initialization
> > *
> > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> > b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> > index 723578117191..4b5378495eea 100644
> > --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> > +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> > @@ -274,7 +274,6 @@ static const struct drm_connector_funcs
> > vmw_legacy_connector_funcs = {
> >
> > static const struct
> > drm_connector_helper_funcs vmw_ldu_connector_helper_funcs = {
> > - .best_encoder = drm_atomic_helper_best_encoder,
> > };
>
> Seems like you can remove this entirely, as well as the helper funcs
> registration call? Same goes for a few other drivers.
Needs a huge audit, at least in the past we've had cases where everything
started oopsing because helpers didn't check carefully whether the vtable
pointer was NULL or not.
Heck even this patch here blew up on amdgpu at first.
So good idea, but maybe not in this patch here :-)
-Daniel
> > /*
> > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> > b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> > index ad0de7f0cd60..4c68ad6f3605 100644
> > --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> > +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> > @@ -389,7 +389,6 @@ static const struct drm_connector_funcs
> > vmw_sou_connector_funcs = {
> >
> > static const struct
> > drm_connector_helper_funcs vmw_sou_connector_helper_funcs = {
> > - .best_encoder = drm_atomic_helper_best_encoder,
> > };
> >
> >
> > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> >
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/6] drm/i915/icl: Add WaEnable32PlaneMode
== Series Details == Series: series starting with [v2,1/6] drm/i915/icl: Add WaEnable32PlaneMode URL : https://patchwork.freedesktop.org/series/50569/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4932 -> Patchwork_10364 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50569/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10364 that come from known issues: === IGT changes === Issues hit igt@drv_selftest@live_evict: fi-bsw-kefka: PASS -> DMESG-WARN (fdo#107709) igt@gem_exec_suspend@basic-s3: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: PASS -> FAIL (fdo#103167) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#107709 https://bugs.freedesktop.org/show_bug.cgi?id=107709 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 == Participating hosts (48 -> 41) == Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 == Build changes == * Linux: CI_DRM_4932 -> Patchwork_10364 CI_DRM_4932: 21f90148bf7adb33d82580013a5697a6bbb88248 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10364: 0e5bcb1216ffcd65716a0840a879a269e4866bbb @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 0e5bcb1216ff drm/i915/icl:Add Wa_1606682166 fd1a33cc069b drm/i915/icl: Add Wa_1406609255 a593fe319225 drm/i915/icl: WaAllowUMDToModifySamplerMode bfdffb94fd07 drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7 914ba5ff7ca8 drm/i915/icl: Implement Display WA_1405510057 2f27b6f17cd5 drm/i915/icl: Add WaEnable32PlaneMode == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10364/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Engine discovery query (rev6)
== Series Details ==
Series: drm/i915: Engine discovery query (rev6)
URL : https://patchwork.freedesktop.org/series/39958/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4931_full -> Patchwork_10358_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10358_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10358_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10358_full:
=== IGT changes ===
Possible regressions
igt@kms_flip_tiling@flip-to-x-tiled:
shard-skl: PASS -> FAIL
Warnings
igt@pm_rc6_residency@rc6-accuracy:
shard-snb: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10358_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_flush@basic-batch-kernel-default-wb:
shard-glk: PASS -> INCOMPLETE (fdo#103359, k.org#198133)
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-apl: PASS -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956)
igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
shard-snb: PASS -> DMESG-WARN (fdo#107956)
igt@kms_cursor_crc@cursor-128x128-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-glk: PASS -> FAIL (fdo#103232)
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: PASS -> FAIL (fdo#105363, fdo#102887)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack:
shard-glk: PASS -> DMESG-WARN (fdo#105763, fdo#106538) +2
igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
shard-glk: PASS -> DMESG-FAIL (fdo#106538)
igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
shard-skl: PASS -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt:
shard-skl: PASS -> FAIL (fdo#103167, fdo#105682)
igt@kms_frontbuffer_tracking@fbcpsr-suspend:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
shard-skl: PASS -> FAIL (fdo#103167) +2
igt@kms_plane@pixel-format-pipe-a-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +1
Possible fixes
igt@drv_suspend@fence-restore-untiled:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
igt@kms_cursor_crc@cursor-128x42-onscreen:
shard-glk: FAIL (fdo#103232) -> PASS
igt@kms_draw_crc@draw-method-xrgb-mmap-cpu-xtiled:
shard-skl: FAIL (fdo#107791) -> PASS
igt@kms_draw_crc@fill-fb:
shard-skl: FAIL -> PASS
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-skl: FAIL (fdo#105363) -> PASS
igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
shard-skl: FAIL (fdo#103167) -> PASS +2
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_universal_plane@universal-plane-pipe-b-functional:
shard-apl: FAIL (fdo#103166) -> PASS +2
igt@pm_rpm@legacy-planes:
shard-skl: INCOMPLETE (fdo#105959, fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103665
Re: [Intel-gfx] [PATCH 02/18] drm/atomic-helper: Unexport drm_atomic_helper_best_encoder
On Tue, Oct 02, 2018 at 03:35:10PM +0200, Daniel Vetter wrote:
> It's the default. The exported version was kinda a transition state,
> before we made this the default.
>
> To stop new atomic drivers from using it (instead of just relying on
> the default) let's unexport it.
>
> Signed-off-by: Daniel Vetter
> Cc: Gustavo Padovan
> Cc: Maarten Lankhorst
> Cc: Sean Paul
> Cc: David Airlie
> Cc: VMware Graphics
> Cc: Sinclair Yeh
> Cc: Thomas Hellstrom
> Cc: Archit Taneja
> Cc: Neil Armstrong
> Cc: Laurent Pinchart
> Cc: Hans Verkuil
> Cc: Daniel Vetter
> Cc: Russell King
> Cc: Jernej Skrabec
> Cc: Jani Nikula
> Cc: Pierre-Hugues Husson
> Cc: Fabio Estevam
> ---
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 -
> drivers/gpu/drm/drm_atomic_helper.c | 24 +++
> drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 1 -
> drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 1 -
> drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 1 -
> include/drm/drm_atomic_helper.h | 2 --
> 6 files changed, 7 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> index ac37c50d6c4b..5ac979d3450b 100644
> --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> @@ -1957,7 +1957,6 @@ static const struct drm_connector_funcs
> dw_hdmi_connector_funcs = {
>
> static const struct drm_connector_helper_funcs
> dw_hdmi_connector_helper_funcs = {
> .get_modes = dw_hdmi_connector_get_modes,
> - .best_encoder = drm_atomic_helper_best_encoder,
> };
>
> static int dw_hdmi_bridge_attach(struct drm_bridge *bridge)
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c
> index f92b7cf4cbd7..8c93f33fe92f 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -92,6 +92,13 @@ drm_atomic_helper_plane_changed(struct drm_atomic_state
> *state,
> }
> }
>
> +static struct drm_encoder *
> +drm_atomic_helper_best_encoder(struct drm_connector *connector)
> +{
> + WARN_ON(connector->encoder_ids[1]);
> + return drm_encoder_find(connector->dev, NULL,
> connector->encoder_ids[0]);
> +}
> +
> static int handle_conflicting_encoders(struct drm_atomic_state *state,
> bool disable_conflicting_encoders)
> {
> @@ -3376,23 +3383,6 @@ int drm_atomic_helper_page_flip_target(struct drm_crtc
> *crtc,
> }
> EXPORT_SYMBOL(drm_atomic_helper_page_flip_target);
>
> -/**
> - * drm_atomic_helper_best_encoder - Helper for
> - * _connector_helper_funcs.best_encoder callback
> - * @connector: Connector control structure
> - *
> - * This is a _connector_helper_funcs.best_encoder callback helper for
> - * connectors that support exactly 1 encoder, statically determined at driver
> - * init time.
> - */
> -struct drm_encoder *
> -drm_atomic_helper_best_encoder(struct drm_connector *connector)
> -{
> - WARN_ON(connector->encoder_ids[1]);
> - return drm_encoder_find(connector->dev, NULL,
> connector->encoder_ids[0]);
> -}
> -EXPORT_SYMBOL(drm_atomic_helper_best_encoder);
> -
> /**
> * DOC: atomic state reset and initialization
> *
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> index 723578117191..4b5378495eea 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> @@ -274,7 +274,6 @@ static const struct drm_connector_funcs
> vmw_legacy_connector_funcs = {
>
> static const struct
> drm_connector_helper_funcs vmw_ldu_connector_helper_funcs = {
> - .best_encoder = drm_atomic_helper_best_encoder,
> };
Seems like you can remove this entirely, as well as the helper funcs
registration call? Same goes for a few other drivers.
Sean
>
> /*
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> index ad0de7f0cd60..4c68ad6f3605 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> @@ -389,7 +389,6 @@ static const struct drm_connector_funcs
> vmw_sou_connector_funcs = {
>
> static const struct
> drm_connector_helper_funcs vmw_sou_connector_helper_funcs = {
> - .best_encoder = drm_atomic_helper_best_encoder,
> };
>
>
> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> index f30e839f7bfd..e28bb08114a5 100644
> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
> @@ -1037,7 +1037,6 @@ static const struct drm_connector_funcs
> vmw_stdu_connector_funcs = {
>
> static const struct
> drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
> - .best_encoder = drm_atomic_helper_best_encoder,
> };
>
>
> diff --git a/include/drm/drm_atomic_helper.h b/include/drm/drm_atomic_helper.h
> index 657af7b39379..e60c4f0f8827 100644
> --- a/include/drm/drm_atomic_helper.h
>
[Intel-gfx] [PATCH v2 5/6] drm/i915/icl: Add Wa_1406609255
Shader feature to prefetch binding tables does not support 16:6 18:8 BTP
formats. Enabling fault handling could result in hangs with faults.
Disabling demand prefetch would disable binding table prefetch.
V2: Fix the stepping rivision to B0(Mika)
References: HSDES#1406609255, HSDES#1406573985
Cc: Mika Kuoppala
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_workarounds.c | 6 ++
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c8a187d8db0f..fa020425754f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7413,6 +7413,9 @@ enum {
#define GEN9_SLICE_COMMON_ECO_CHICKEN1 _MMIO(0x731c)
#define GEN11_STATE_CACHE_REDIRECT_TO_CS (1 << 11)
+#define GEN7_SARCHKMD _MMIO(0xB000)
+#define GEN7_DISABLE_DEMAND_PREFETCH (1 << 31)
+
#define GEN7_L3SQCREG1 _MMIO(0xB010)
#define VLV_B0_WA_L3SQCREG1_VALUE 0x00D3
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 65cd36cd2957..cf4f4c1f86ab 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -905,6 +905,12 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
I915_WRITE(GAMT_CHKN_BIT_REG,
I915_READ(GAMT_CHKN_BIT_REG) |
GAMT_CHKN_DISABLE_L3_COH_PIPE);
+
+ /* Wa_1406609255:icl (pre-prod) */
+ if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
+ I915_WRITE(GEN7_SARCHKMD,
+ I915_READ(GEN7_SARCHKMD) |
+ GEN7_DISABLE_DEMAND_PREFETCH);
}
void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
--
2.9.3
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[Intel-gfx] [PATCH v2 6/6] drm/i915/icl:Add Wa_1606682166
From: Anuj Phogat
Incorrect TDL's SSP address shift in SARB for 16:6 & 18:8 modes.
Disable the Sampler state prefetch functionality in the SARB by
programming 0xB000[30] to '1'. This is to be done at boot time
and the feature must remain disabled permanently.
Fixes flaky tex-mip-level-selection* piglit tests with Mesa i965
driver.
Cc: Radhakrishna Sripada
Signed-off-by: Anuj Phogat
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_workarounds.c | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fa020425754f..0c544161ed47 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7415,6 +7415,7 @@ enum {
#define GEN7_SARCHKMD _MMIO(0xB000)
#define GEN7_DISABLE_DEMAND_PREFETCH (1 << 31)
+#define GEN7_DISABLE_SAMPLER_PREFETCH (1 << 30)
#define GEN7_L3SQCREG1 _MMIO(0xB010)
#define VLV_B0_WA_L3SQCREG1_VALUE 0x00D3
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index cf4f4c1f86ab..7157115e5bc9 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -910,7 +910,8 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0))
I915_WRITE(GEN7_SARCHKMD,
I915_READ(GEN7_SARCHKMD) |
- GEN7_DISABLE_DEMAND_PREFETCH);
+ GEN7_DISABLE_DEMAND_PREFETCH |
+ GEN7_DISABLE_SAMPLER_PREFETCH);
}
void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
--
2.9.3
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[Intel-gfx] [PATCH v2 2/6] drm/i915/icl: Implement Display WA_1405510057
Display WA_1405510057 asks to not enable YUV 420 HDMI 10bpc when horizontal blank size mod 8 reminder is 2. Cc: James Ausmus Cc: Paulo Zanoni Cc: Rodrigo Vivi Cc: Ville Syrjälä Signed-off-by: Radhakrishna Sripada --- drivers/gpu/drm/i915/intel_hdmi.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 454f570275e9..fa6b39420e69 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1592,6 +1592,8 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, struct drm_atomic_state *state = crtc_state->base.state; struct drm_connector_state *connector_state; struct drm_connector *connector; + const struct drm_display_mode *adjusted_mode = + _state->base.adjusted_mode; int i; if (HAS_GMCH_DISPLAY(dev_priv)) @@ -1640,7 +1642,13 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, /* Display WA #1139: glk */ if (bpc == 12 && IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && - crtc_state->base.adjusted_mode.htotal > 5460) + adjusted_mode->htotal > 5460) + return false; + + /* Display Wa_1405510057:icl */ + if (crtc_state->ycbcr420 && bpc == 10 && IS_ICELAKE(dev_priv) && + (adjusted_mode->crtc_hblank_end - +adjusted_mode->crtc_hblank_start) % 8 == 2) return false; return true; -- 2.9.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 4/6] drm/i915/icl: WaAllowUMDToModifySamplerMode
From: Oscar Mateo
Required for Bindless samplers.
Cc: Mika Kuoppala
Signed-off-by: Oscar Mateo
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4fb8e9eef312..c8a187d8db0f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8632,6 +8632,8 @@ enum {
#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
+#define GEN10_SAMPLER_MODE _MMIO(0xE18C)
+
/* IVYBRIDGE DPF */
#define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD
Error Status 1 */
#define GEN7_L3CDERRST1_ROW_MASK (0x7ff << 14)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 69e247409050..65cd36cd2957 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1011,6 +1011,9 @@ static void icl_whitelist_build(struct whitelist *w)
{
/* WaAllowUMDToModifyHalfSliceChicken7:icl */
whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
+
+ /* WaAllowUMDToModifySamplerMode:icl */
+ whitelist_reg(w, GEN10_SAMPLER_MODE);
}
static struct whitelist *whitelist_build(struct intel_engine_cs *engine,
--
2.9.3
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[Intel-gfx] [PATCH v2 3/6] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7
From: Oscar Mateo
Required to dinamically set 'Trilinear Filter Quality Mode'
Cc: Mika Kuoppala
Signed-off-by: Oscar Mateo
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_workarounds.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 4bcdeaf8d98f..69e247409050 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1009,6 +1009,8 @@ static void cnl_whitelist_build(struct whitelist *w)
static void icl_whitelist_build(struct whitelist *w)
{
+ /* WaAllowUMDToModifyHalfSliceChicken7:icl */
+ whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
}
static struct whitelist *whitelist_build(struct intel_engine_cs *engine,
--
2.9.3
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[Intel-gfx] [PATCH v2 1/6] drm/i915/icl: Add WaEnable32PlaneMode
Gen11 Display suports 32 planes in total. Enable the new format in context
status to be used and expanded to 32 planes.
V2: Move the WA to display WA's(Chris)
Cc: Chris Wilson
Cc: Michel Thierry
Cc: James Ausmus
Cc: Anusha Srivatsa
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a71c507cfb9b..4fb8e9eef312 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2573,6 +2573,7 @@ enum i915_power_well_id {
/* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */
#define GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4)
#define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2)
+#define GEN11_ENABLE_32_PLANE_MODE (1 << 7)
/* WaClearTdlStateAckDirtyBits */
#define GEN8_STATE_ACK _MMIO(0x20F0)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1392aa56a55a..d4a464246760 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8734,6 +8734,10 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
/* This is not an Wa. Enable to reduce Sampler power */
I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN,
I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE);
+
+ /* WaEnable32PlaneMode:icl */
+ I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
+ _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
}
static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.9.3
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Re: [Intel-gfx] [RFC] drm/i915/dp: Remove i915.enable_dp_mst module parameter
On Thu, 2018-10-04 at 08:54 -0700, Rodrigo Vivi wrote: > On Thu, Oct 04, 2018 at 01:59:52PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 04, 2018 at 10:03:39AM +0300, Jani Nikula wrote: > > > On Wed, 03 Oct 2018, Dhinakaran Pandiyan < > > > dhinakaran.pandi...@intel.com> wrote: > > > > MST is enabled by default on all platforms that support it. I > > > > don't think > > > > we should be providing a switch to work around MST issues as > > > > the feature > > > > has been supported for a while now. Let's kill this module > > > > parameter > > > > that we also do not test in CI. > > > > > > I agree we don't want to provide this to users to *work around* > > > issues. But maybe we want something like this to *debug* issues? > > > > Yes. I was using it for that just a few days ago when looking at a > > bug. > > so it seems useful and it means that we need to move to debugfs :) > It also allows us to have a switch for each primary connector instead of disabling MST completely. > > > > Also the mst code lacks a bunch of features I think we'd want > > (remote dpcd, > > remote i2c write, maybe others). It's still the unloved stepchild > > with no > > one really focusing on improving it. > > Because things work (mostly) without them :) But yeah, remote dpcd reads can be very useful for debugging. Why are remote i2c writes needed though? -DK > > So I think it's way too early to think about removing this > > outright. > > Not sure we should ever remove it really. What happens if in the > > future > > most of our ci displays are mst capable? Do we just not test sst at > > all? > > Granted a modparam is a probably a bit too coarse for that, but I > > think > > we may want *something* to force sst. > > > > -- > > Ville Syrjälä > > Intel > > ___ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Use the correct crtc when sanitizing plane mapping
On Wed, Oct 03, 2018 at 06:12:42PM +0200, Daniel Vetter wrote:
> On Wed, Oct 03, 2018 at 05:50:17PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > When we decide that a plane is attached to the wrong pipe we try
> > to turn off said plane. However we are passing around the crtc we
> > think that the plane is supposed to be using rather than the crtc
> > it is currently using. That doesn't work all that well because
> > we may have to do vblank waits etc. and the other pipe might
> > not even be enabled here. So let's pass the plane's current crtc to
> > intel_plane_disable_noatomic() so that it can its job correctly.
> >
> > To do that semi-cleanly we also have to change the plane readout
> > to record the plane's visibility into the bitmasks of the crtc
> > where the plane is currently enabled rather than to the crtc
> > we want to use for the plane.
> >
> > One caveat here is that our active_planes bitmask will get confused
> > if both planes are enabled on the same pipe. Fortunately we can use
> > plane_mask to reconstruct active_planes sufficiently since
> > plane_mask still has the same meaning (is the plane visible?)
> > during readout. We also have to do the same during the initial
> > plane readout as the second plane could clear the active_planes
> > bit the first plane had already set.
> >
> > v2: Rely on fixup_active_planes() to populate active_planes fully (Daniel)
> > Add Daniel's proposed comment to better document why we do this
> > Drop the redundant intel_set_plane_visible() call
> >
> > Cc: sta...@vger.kernel.org # fcba862e8428 drm/i915: Have
> > plane->get_hw_state() return the current pipe
> > Cc: sta...@vger.kernel.org
> > Cc: Dennis
> > Cc: Daniel Vetter
> > Tested-by: Dennis
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105637
> > Fixes: b1e01595a66d ("drm/i915: Redo plane sanitation during readout")
> > Signed-off-by: Ville Syrjälä
>
> I have the illusion of understanding this stuff now.
>
> Reviewed-by: Daniel Vetter
>
> But let's see whether testers and CI agree :-)
Seems to be reasonably happy :)
Picked up another tested-by from the bug report
Tested-by: Peter Nowee
and pushed the series to dinq. Thanks to everyone involved.
> -Daniel
>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 78
> > +---
> > 1 file changed, 46 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index d2828159f6c8..f0d004641b0d 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -2764,20 +2764,33 @@ intel_set_plane_visible(struct intel_crtc_state
> > *crtc_state,
> >
> > plane_state->base.visible = visible;
> >
> > - /* FIXME pre-g4x don't work like this */
> > - if (visible) {
> > + if (visible)
> > crtc_state->base.plane_mask |= drm_plane_mask(>base);
> > - crtc_state->active_planes |= BIT(plane->id);
> > - } else {
> > + else
> > crtc_state->base.plane_mask &= ~drm_plane_mask(>base);
> > - crtc_state->active_planes &= ~BIT(plane->id);
> > - }
> >
> > DRM_DEBUG_KMS("%s active planes 0x%x\n",
> > crtc_state->base.crtc->name,
> > crtc_state->active_planes);
> > }
> >
> > +static void fixup_active_planes(struct intel_crtc_state *crtc_state)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
> > + struct drm_plane *plane;
> > +
> > + /*
> > +* Active_planes aliases if multiple "primary" or cursor planes
> > +* have been used on the same (or wrong) pipe. plane_mask uses
> > +* unique ids, hence we can use that to reconstruct active_planes.
> > +*/
> > + crtc_state->active_planes = 0;
> > +
> > + drm_for_each_plane_mask(plane, _priv->drm,
> > + crtc_state->base.plane_mask)
> > + crtc_state->active_planes |= BIT(to_intel_plane(plane)->id);
> > +}
> > +
> > static void intel_plane_disable_noatomic(struct intel_crtc *crtc,
> > struct intel_plane *plane)
> > {
> > @@ -2787,6 +2800,7 @@ static void intel_plane_disable_noatomic(struct
> > intel_crtc *crtc,
> > to_intel_plane_state(plane->base.state);
> >
> > intel_set_plane_visible(crtc_state, plane_state, false);
> > + fixup_active_planes(crtc_state);
> >
> > if (plane->id == PLANE_PRIMARY)
> > intel_pre_disable_primary_noatomic(>base);
> > @@ -2805,7 +2819,6 @@ intel_find_initial_plane_obj(struct intel_crtc
> > *intel_crtc,
> > struct drm_i915_gem_object *obj;
> > struct drm_plane *primary = intel_crtc->base.primary;
> > struct drm_plane_state *plane_state = primary->state;
> > - struct drm_crtc_state *crtc_state = intel_crtc->base.state;
> > struct intel_plane *intel_plane = to_intel_plane(primary);
> > struct intel_plane_state
Re: [Intel-gfx] [PATCH 02/18] drm/atomic-helper: Unexport drm_atomic_helper_best_encoder
Hi Daniel,
On Wednesday, 3 October 2018 12:08:38 EEST Daniel Vetter wrote:
> On Tue, Oct 02, 2018 at 04:53:12PM +0300, Laurent Pinchart wrote:
> > On Tuesday, 2 October 2018 16:35:10 EEST Daniel Vetter wrote:
> > > It's the default. The exported version was kinda a transition state,
> > > before we made this the default.
> > >
> > > To stop new atomic drivers from using it (instead of just relying on
> > > the default) let's unexport it.
> > >
> > > Signed-off-by: Daniel Vetter
> > > Cc: Gustavo Padovan
> > > Cc: Maarten Lankhorst
> > > Cc: Sean Paul
> > > Cc: David Airlie
> > > Cc: VMware Graphics
> > > Cc: Sinclair Yeh
> > > Cc: Thomas Hellstrom
> > > Cc: Archit Taneja
> > > Cc: Neil Armstrong
> > > Cc: Laurent Pinchart
> > > Cc: Hans Verkuil
> > > Cc: Daniel Vetter
> > > Cc: Russell King
> > > Cc: Jernej Skrabec
> > > Cc: Jani Nikula
> > > Cc: Pierre-Hugues Husson
> > > Cc: Fabio Estevam
> > > ---
> > >
> > > drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 1 -
> > > drivers/gpu/drm/drm_atomic_helper.c | 24 +++
> > > drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 1 -
> > > drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 1 -
> > > drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 1 -
> > > include/drm/drm_atomic_helper.h | 2 --
> > > 6 files changed, 7 insertions(+), 23 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > > b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c index
> > > ac37c50d6c4b..5ac979d3450b 100644
> > > --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> > > +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
> >
> > [snip]
> >
> > > diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> > > b/drivers/gpu/drm/drm_atomic_helper.c index f92b7cf4cbd7..8c93f33fe92f
> > > 100644
> > > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > > @@ -92,6 +92,13 @@ drm_atomic_helper_plane_changed(struct
> > > drm_atomic_state
> > > *state, }
> > >
> > > }
> > >
> > > +static struct drm_encoder *
> > > +drm_atomic_helper_best_encoder(struct drm_connector *connector)
> > > +{
> > > + WARN_ON(connector->encoder_ids[1]);
> >
> > As you're removing the documentation, I would add a comment here to
> > explain the WARN_ON. Something along the lines of "For connectors that
> > support multiple encoders, the .atomic_best_encoder() or .atomic_encoder()
> > operation must be implemented".
> >
> > You could also rename the function to make it more explicit that it's a
> > default for the single encoder case.
>
> So pick_single_encoder_for_connector()?
Works for me.
> I think that would avoid the need for a comment.
I'd still keep the comment, it won't hurt, and you have it already :-)
> r-b: you with that fixed up?
With the comment and function renamed,
Reviewed-by: Laurent Pinchart
> > > + return drm_encoder_find(connector->dev, NULL,
> > > connector->encoder_ids[0]);
> > > +}
> > > +
> > >
> > > static int handle_conflicting_encoders(struct drm_atomic_state *state,
> > >
> > > bool disable_conflicting_encoders)
> > >
> > > {
> > >
> > > @@ -3376,23 +3383,6 @@ int drm_atomic_helper_page_flip_target(struct
> > > drm_crtc *crtc, }
> > >
> > > EXPORT_SYMBOL(drm_atomic_helper_page_flip_target);
> > >
> > > -/**
> > > - * drm_atomic_helper_best_encoder - Helper for
> > > - * _connector_helper_funcs.best_encoder callback
> > > - * @connector: Connector control structure
> > > - *
> > > - * This is a _connector_helper_funcs.best_encoder callback helper
> > > for
> > > - * connectors that support exactly 1 encoder, statically determined at
> > > driver - * init time.
> > > - */
> > > -struct drm_encoder *
> > > -drm_atomic_helper_best_encoder(struct drm_connector *connector)
> > > -{
> > > - WARN_ON(connector->encoder_ids[1]);
> > > - return drm_encoder_find(connector->dev, NULL,
> > > connector->encoder_ids[0]);
> > > -}
> > > -EXPORT_SYMBOL(drm_atomic_helper_best_encoder);
> > > -
> > >
> > > /**
> > >
> > > * DOC: atomic state reset and initialization
> > > *
> >
> > [snip]
--
Regards,
Laurent Pinchart
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for Refactor and Add helper function for combophy/tc ports (rev2)
== Series Details ==
Series: Refactor and Add helper function for combophy/tc ports (rev2)
URL : https://patchwork.freedesktop.org/series/50484/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4930_full -> Patchwork_10356_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10356_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_schedule@pi-ringfull-blt:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-glk: NOTRUN -> FAIL (fdo#103158) +3
igt@gem_render_copy_redux@interruptible:
shard-kbl: PASS -> INCOMPLETE (fdo#106650, fdo#103665)
igt@gem_softpin@noreloc-s3:
shard-skl: PASS -> INCOMPLETE (fdo#104108, fdo#107773)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-glk: NOTRUN -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +11
igt@kms_cursor_crc@cursor-128x128-onscreen:
shard-skl: PASS -> FAIL (fdo#103232)
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-skl: NOTRUN -> INCOMPLETE (fdo#104108)
igt@kms_cursor_crc@cursor-256x256-random:
shard-glk: NOTRUN -> FAIL (fdo#103232) +7
igt@kms_cursor_crc@cursor-256x85-random:
shard-hsw: PASS -> DMESG-WARN (fdo#102614)
igt@kms_cursor_crc@cursor-64x21-random:
shard-apl: PASS -> FAIL (fdo#103232) +1
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#107409, fdo#106509)
igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#105454, fdo#106509)
igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_flip@2x-flip-vs-expired-vblank:
shard-glk: NOTRUN -> FAIL (fdo#105363)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-skl: PASS -> FAIL (fdo#105363)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
shard-glk: NOTRUN -> FAIL (fdo#103167) +9
igt@kms_frontbuffer_tracking@fbc-tilingchange:
shard-skl: PASS -> FAIL (fdo#103167) +2
igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu:
shard-skl: PASS -> FAIL (fdo#105682) +1
igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-pwrite:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
shard-skl: NOTRUN -> FAIL (fdo#105683)
igt@kms_frontbuffer_tracking@fbcpsr-suspend:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
igt@kms_plane@pixel-format-pipe-a-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
{igt@kms_plane_alpha_blend@pipe-a-alpha-basic}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +1
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: PASS -> FAIL (fdo#108145)
{igt@kms_plane_alpha_blend@pipe-b-coverage-7efc}:
shard-skl: NOTRUN -> FAIL (fdo#108146)
{igt@kms_plane_alpha_blend@pipe-c-alpha-7efc}:
shard-glk: NOTRUN -> FAIL (fdo#108146) +1
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-glk: NOTRUN -> FAIL (fdo#108145) +13
igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
shard-glk: NOTRUN -> FAIL (fdo#103166) +2
igt@kms_setmode@basic:
shard-glk: NOTRUN -> FAIL (fdo#99912)
shard-kbl: PASS -> FAIL (fdo#99912)
igt@pm_backlight@fade_with_suspend:
shard-skl: NOTRUN -> FAIL (fdo#107847)
Possible fixes
igt@kms_available_modes_crc@available_mode_test_crc:
shard-apl: FAIL (fdo#106641) -> PASS
igt@kms_flip_tiling@flip-yf-tiled:
shard-apl: DMESG-FAIL (fdo#105602, fdo#103558) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-rte:
shard-apl: FAIL (fdo#103167, fdo#105682) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
shard-apl: FAIL (fdo#103166) -> PASS
igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
shard-apl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +18
igt@perf@enable-disable:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
{name}: This element is suppressed. This
[Intel-gfx] ✓ Fi.CI.IGT: success for Refactor and Add helper function for combophy/tc ports (rev2)
== Series Details ==
Series: Refactor and Add helper function for combophy/tc ports (rev2)
URL : https://patchwork.freedesktop.org/series/50484/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4930_full -> Patchwork_10355_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10355_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_schedule@pi-ringfull-blt:
shard-skl: NOTRUN -> FAIL (fdo#103158)
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-glk: NOTRUN -> FAIL (fdo#103158) +3
igt@gem_pwrite_pread@uncached-pwrite-blt-gtt_mmap-performance:
shard-apl: PASS -> INCOMPLETE (fdo#103927)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-glk: NOTRUN -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +3
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +11
igt@kms_cursor_crc@cursor-128x128-onscreen:
shard-skl: PASS -> FAIL (fdo#103232)
igt@kms_cursor_crc@cursor-256x256-random:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_crc@cursor-256x256-suspend:
shard-skl: PASS -> INCOMPLETE (fdo#104108)
shard-apl: PASS -> FAIL (fdo#103232, fdo#103191)
igt@kms_cursor_crc@cursor-256x85-onscreen:
shard-glk: NOTRUN -> FAIL (fdo#103232) +3
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-skl: NOTRUN -> FAIL (fdo#103232) +1
igt@kms_cursor_crc@cursor-64x64-suspend:
shard-skl: NOTRUN -> FAIL (fdo#103232, fdo#103191)
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#106509, fdo#105454)
igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#105454)
igt@kms_draw_crc@draw-method-rgb565-pwrite-untiled:
shard-skl: PASS -> FAIL (fdo#103184)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
shard-glk: NOTRUN -> FAIL (fdo#103167) +10
igt@kms_frontbuffer_tracking@fbc-tilingchange:
shard-skl: PASS -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu:
shard-skl: PASS -> FAIL (fdo#103167) +4
igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-pwrite:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
shard-skl: NOTRUN -> FAIL (fdo#105683)
igt@kms_plane@pixel-format-pipe-a-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885) +1
{igt@kms_plane_alpha_blend@pipe-a-coverage-7efc}:
shard-skl: PASS -> FAIL (fdo#108145)
{igt@kms_plane_alpha_blend@pipe-b-alpha-basic}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +3
{igt@kms_plane_alpha_blend@pipe-b-coverage-7efc}:
shard-skl: NOTRUN -> FAIL (fdo#108146)
{igt@kms_plane_alpha_blend@pipe-c-alpha-7efc}:
shard-glk: NOTRUN -> FAIL (fdo#108146) +1
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-glk: NOTRUN -> FAIL (fdo#108145) +12
igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
shard-glk: NOTRUN -> FAIL (fdo#103166) +3
igt@kms_rotation_crc@exhaust-fences:
shard-skl: NOTRUN -> DMESG-WARN (fdo#105748)
igt@kms_setmode@basic:
shard-glk: NOTRUN -> FAIL (fdo#99912)
shard-kbl: PASS -> FAIL (fdo#99912)
igt@pm_backlight@fade_with_suspend:
shard-skl: NOTRUN -> FAIL (fdo#107847)
igt@pm_rpm@gem-evict-pwrite:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
Possible fixes
igt@kms_available_modes_crc@available_mode_test_crc:
shard-apl: FAIL (fdo#106641) -> PASS
igt@kms_flip_tiling@flip-yf-tiled:
shard-apl: DMESG-FAIL (fdo#103558, fdo#105602) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-rte:
shard-apl: FAIL (fdo#103167, fdo#105682) -> PASS
igt@kms_plane@plane-position-covered-pipe-a-planes:
shard-apl: FAIL (fdo#103166) -> PASS +1
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
igt@kms_vblank@pipe-c-ts-continuation-dpms-suspend:
shard-apl: DMESG-WARN (fdo#103558,
Re: [Intel-gfx] [PATCH v6] drm/i915: Engine discovery query
Quoting Tvrtko Ursulin (2018-10-04 11:51:18)
> From: Tvrtko Ursulin
>
> Engine discovery query allows userspace to enumerate engines, probe their
> configuration features, all without needing to maintain the internal PCI
> ID based database.
>
> A new query for the generic i915 query ioctl is added named
> DRM_I915_QUERY_ENGINE_INFO, together with accompanying structure
> drm_i915_query_engine_info. The address of latter should be passed to the
> kernel in the query.data_ptr field, and should be large enough for the
> kernel to fill out all known engines as struct drm_i915_engine_info
> elements trailing the query.
>
> As with other queries, setting the item query length to zero allows
> userspace to query minimum required buffer size.
>
> Enumerated engines have common type mask which can be used to query all
> hardware engines, versus engines userspace can submit to using the execbuf
> uAPI.
>
> Engines also have capabilities which are per engine class namespace of
> bits describing features not present on all engine instances.
>
> v2:
> * Fixed HEVC assignment.
> * Reorder some fields, rename type to flags, increase width. (Lionel)
> * No need to allocate temporary storage if we do it engine by engine.
>(Lionel)
>
> v3:
> * Describe engine flags and mark mbz fields. (Lionel)
> * HEVC only applies to VCS.
>
> v4:
> * Squash SFC flag into main patch.
> * Tidy some comments.
>
> v5:
> * Add uabi_ prefix to engine capabilities. (Chris Wilson)
> * Report exact size of engine info array. (Chris Wilson)
> * Drop the engine flags. (Joonas Lahtinen)
> * Added some more reserved fields.
> * Move flags after class/instance.
>
> v6:
> * Do not check engine info array was zeroed by userspace but zero the
>unused fields for them instead.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Chris Wilson
> Cc: Jon Bloomfield
> Cc: Dmitry Rogozhkin
> Cc: Lionel Landwerlin
> Cc: Joonas Lahtinen
> Cc: Tony Ye
> ---
> drivers/gpu/drm/i915/i915_query.c | 56 +
> drivers/gpu/drm/i915/intel_engine_cs.c | 12 ++
> drivers/gpu/drm/i915/intel_ringbuffer.h | 3 ++
> include/uapi/drm/i915_drm.h | 47 +
> 4 files changed, 118 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_query.c
> b/drivers/gpu/drm/i915/i915_query.c
> index 5821002cad42..5ac8ef9f5de4 100644
> --- a/drivers/gpu/drm/i915/i915_query.c
> +++ b/drivers/gpu/drm/i915/i915_query.c
> @@ -84,9 +84,65 @@ static int query_topology_info(struct drm_i915_private
> *dev_priv,
> return total_length;
> }
>
> +static int
> +query_engine_info(struct drm_i915_private *i915,
> + struct drm_i915_query_item *query_item)
> +{
> + struct drm_i915_query_engine_info __user *query_ptr =
> + u64_to_user_ptr(query_item->data_ptr);
> + struct drm_i915_engine_info __user *info_ptr = _ptr->engines[0];
> + struct drm_i915_query_engine_info query;
> + struct drm_i915_engine_info info = { };
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
> + int len;
> +
> + if (query_item->flags)
> + return -EINVAL;
> +
> + len = 0;
> + for_each_engine(engine, i915, id)
> + len++;
(Isn't this INTEL_INFO()->num_rings?)
> + len *= sizeof(struct drm_i915_engine_info);
> + len += sizeof(struct drm_i915_query_engine_info);
> +
> + if (!query_item->length)
> + return len;
> + else if (query_item->length < len)
> + return -EINVAL;
> +
> + if (copy_from_user(, query_ptr, sizeof(query)))
> + return -EFAULT;
> +
> + if (query.num_engines || query.rsvd[0] || query.rsvd[1] ||
> + query.rsvd[2])
> + return -EINVAL;
> +
> + if (!access_ok(VERIFY_WRITE, query_ptr, query_item->length))
> + return -EFAULT;
Hmm, so length is the sizeof of the whole struct and not the space in
the pointed at block? Ok. I was just a little confused by the lack of
checking for info_ptr, as by this point the connection with query_ptr is
off the page.
May I beg
info_ptr = _ptr->engines[0];
here. That should make it more obvious for feeble readers like myself to
see that info_ptr is contained within the access_ok check.
> + for_each_engine(engine, i915, id) {
> + info.class = engine->uabi_class;
> + info.instance = engine->instance;
> + info.capabilities = engine->uabi_capabilities;
> +
GEM_BUG_ON((void *)info_ptr > (void *)query_ptr + query_item->length -
sizeof(info));
> + if (__copy_to_user(info_ptr, , sizeof(info)))
> + return -EFAULT;
> +
> + query.num_engines++;
> + info_ptr++;
> + }
> +
> + if (__copy_to_user(query_ptr, , sizeof(query)))
> + return -EFAULT;
> +
> + return len;
> +}
> +
> static int (*
[Intel-gfx] ✓ Fi.CI.BAT: success for igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
== Series Details == Series: igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE URL : https://patchwork.freedesktop.org/series/50561/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4931 -> IGTPW_1909 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50561/revisions/1/mbox/ == Known issues == Here are the changes found in IGTPW_1909 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@gem_ctx_param@basic-default: fi-pnv-d510:INCOMPLETE (fdo#106007) -> SKIP igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: INCOMPLETE (fdo#106070, fdo#108126) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106007 https://bugs.freedesktop.org/show_bug.cgi?id=106007 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (48 -> 42) == Additional (1): fi-bdw-samus Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u == Build changes == * IGT: IGT_4667 -> IGTPW_1909 CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGTPW_1909: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1909/ IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools == Testlist changes == +igt@gem_ctx_exec@norecovery == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1909/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v2,1/3] drm/i915/guc: init GuC descriptors after GuC load
On 03/10/18 23:29, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2018-10-03 23:45:02)
On 03/10/18 08:24, Chris Wilson wrote:
Quoting Daniele Ceraolo Spurio (2018-10-03 01:12:57)
On 02/10/18 15:39, Patchwork wrote:
== Series Details ==
Series: series starting with [v2,1/3] drm/i915/guc: init GuC descriptors after
GuC load
URL : https://patchwork.freedesktop.org/series/50464/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4915 -> Patchwork_10331 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10331 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10331, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/50464/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10331:
=== IGT changes ===
Possible regressions
igt@drv_selftest@live_gem:
fi-whl-u: PASS -> INCOMPLETE
fi-skl-6600u: PASS -> INCOMPLETE
fi-kbl-7560u: PASS -> INCOMPLETE
fi-cfl-s3: PASS -> INCOMPLETE
fi-skl-iommu: PASS -> INCOMPLETE
fi-skl-6700k2: PASS -> INCOMPLETE
fi-skl-6700hq: PASS -> INCOMPLETE
fi-cfl-8109u: PASS -> INCOMPLETE
fi-kbl-7500u: PASS -> INCOMPLETE
fi-cfl-8700k: PASS -> INCOMPLETE
fi-skl-6770hq: PASS -> INCOMPLETE
fi-kbl-7567u: PASS -> INCOMPLETE
fi-kbl-x1275: PASS -> INCOMPLETE
fi-kbl-8809g: PASS -> INCOMPLETE
fi-kbl-r: PASS -> INCOMPLETE
Those failures are there even without my patches (see
https://patchwork.freedesktop.org/series/40112/). Is there an existing
bugzilla? In the meantime, I'll have a look to see if I can find what's
causing this.
inject_preempt_context() fails when talking to the guc, catastrophe
ensues. As shown above it's quite reliable after a fake suspend/resume,
but it also happens during normal preemption (the preemption smoketest
was added to exercise this issue).
-Chris
Do you consider this a blocker to getting the patches merged?
BTW, on my SKL even with the preemption smoketest I didn't see any issue
on the tree I based the patches on (from Monday) and I only see issues
after:
b16c765122f987056e1dc9ef6c214571bb5bd694 is the first bad commit
commit b16c765122f987056e1dc9ef6c214571bb5bd694
Author: Chris Wilson
Date: Mon Oct 1 15:47:53 2018 +0100
drm/i915: Priority boost for new clients
However I don't get any error logs out (the machine just dies) so not
sure if it is the same issue or not. with that patch and the 2 following
related ones reverted I've been running the live selftests in a loop
without issues. Is this the bug you mentioned or are those possibly 2
different issues?
Possibly different, but unlikely since it's still the preemption that is
at the root cause. smoketest fails for me on bxt/kbl, either starting at
a timeout waiting for the preemption report, or the failure to send the
guc command. The difference with live_gem + preemption I think is all in
the timing, in that it tries to do a very early preemption, shortly
after the fw is loaded.
If you are confident that these are the patches you want, done.
-Chris
Thanks!
I'll try to get my hands on another platform to see if I can pull out
the guc logs in this scenario to see what the GuC perspective. Upcoming
FW has also changes in the area that should help.
Daniele
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/icl: MBUS B credit change
== Series Details == Series: drm/i915/icl: MBUS B credit change URL : https://patchwork.freedesktop.org/series/50560/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4931 -> Patchwork_10363 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50560/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10363 that come from known issues: === IGT changes === Issues hit igt@gem_exec_suspend@basic-s3: fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) Possible fixes igt@drv_module_reload@basic-reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@gem_ctx_param@basic-default: fi-pnv-d510:INCOMPLETE (fdo#106007) -> SKIP igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#106070) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106007 https://bugs.freedesktop.org/show_bug.cgi?id=106007 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (48 -> 42) == Additional (2): fi-icl-u fi-bdw-samus Missing(8): fi-cnl-u fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u == Build changes == * Linux: CI_DRM_4931 -> Patchwork_10363 CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10363: 8e4a871c30c1762b4674e3680ccaa8a01cf5a9c9 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 8e4a871c30c1 drm/i915/icl: MBUS B credit change == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10363/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Only reset seqno if actually idle
== Series Details ==
Series: drm/i915: Only reset seqno if actually idle
URL : https://patchwork.freedesktop.org/series/50537/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4930_full -> Patchwork_10354_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10354_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10354_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10354_full:
=== IGT changes ===
Warnings
igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
shard-hsw: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10354_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@gem_exec_schedule@pi-ringfull-blt:
shard-skl: NOTRUN -> FAIL (fdo#103158) +1
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-glk: NOTRUN -> FAIL (fdo#103158) +3
igt@gem_ppgtt@blt-vs-render-ctxn:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039, fdo#108130)
igt@kms_atomic_transition@2x-modeset-transitions-fencing:
shard-hsw: PASS -> DMESG-FAIL (fdo#102614)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-glk: NOTRUN -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-a:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +3
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-glk: NOTRUN -> DMESG-WARN (fdo#107956) +11
igt@kms_color@pipe-a-legacy-gamma:
shard-apl: PASS -> FAIL (fdo#108145, fdo#104782)
igt@kms_cursor_crc@cursor-128x42-onscreen:
shard-glk: NOTRUN -> FAIL (fdo#103232) +6
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-skl: NOTRUN -> FAIL (fdo#103232)
igt@kms_cursor_crc@cursor-64x64-dpms:
shard-apl: PASS -> FAIL (fdo#103232) +2
igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#106509, fdo#105454)
igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
shard-glk: NOTRUN -> FAIL (fdo#105454)
igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
shard-glk: NOTRUN -> DMESG-WARN (fdo#105763, fdo#106538)
igt@kms_fbcon_fbt@psr:
shard-skl: NOTRUN -> FAIL (fdo#107882)
igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
shard-skl: PASS -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
shard-glk: NOTRUN -> FAIL (fdo#103167) +6
igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-blt:
shard-skl: NOTRUN -> FAIL (fdo#105682)
igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
shard-skl: NOTRUN -> FAIL (fdo#103167)
igt@kms_panel_fitting@legacy:
shard-skl: NOTRUN -> FAIL (fdo#105456)
igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
shard-skl: PASS -> FAIL (fdo#103191)
igt@kms_plane@pixel-format-pipe-c-planes:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106885)
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +3
{igt@kms_plane_alpha_blend@pipe-c-alpha-7efc}:
shard-glk: NOTRUN -> FAIL (fdo#108146) +1
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-glk: NOTRUN -> FAIL (fdo#108145) +13
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-glk: NOTRUN -> FAIL (fdo#103166) +2
igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
shard-apl: PASS -> FAIL (fdo#103166) +4
igt@kms_plane_scaling@pipe-a-scaler-with-rotation:
shard-skl: NOTRUN -> DMESG-WARN (fdo#106107)
igt@kms_rotation_crc@exhaust-fences:
shard-skl: NOTRUN -> DMESG-WARN (fdo#105748)
igt@kms_setmode@basic:
shard-glk: NOTRUN -> FAIL (fdo#99912)
igt@pm_backlight@fade_with_suspend:
shard-skl: NOTRUN -> FAIL (fdo#107847)
Possible fixes
igt@kms_available_modes_crc@available_mode_test_crc:
shard-apl: FAIL (fdo#106641) -> PASS
igt@kms_flip_tiling@flip-yf-tiled:
shard-apl: DMESG-FAIL (fdo#103558, fdo#105602) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS +1
igt@kms_frontbuffer_tracking@fbc-1p-rte:
shard-apl: FAIL
Re: [Intel-gfx] [RFC] drm/i915/dp: Remove i915.enable_dp_mst module parameter
On Thu, Oct 04, 2018 at 01:59:52PM +0300, Ville Syrjälä wrote: > On Thu, Oct 04, 2018 at 10:03:39AM +0300, Jani Nikula wrote: > > On Wed, 03 Oct 2018, Dhinakaran Pandiyan > > wrote: > > > MST is enabled by default on all platforms that support it. I don't think > > > we should be providing a switch to work around MST issues as the feature > > > has been supported for a while now. Let's kill this module parameter > > > that we also do not test in CI. > > > > I agree we don't want to provide this to users to *work around* > > issues. But maybe we want something like this to *debug* issues? > > Yes. I was using it for that just a few days ago when looking at a bug. so it seems useful and it means that we need to move to debugfs :) > > Also the mst code lacks a bunch of features I think we'd want (remote dpcd, > remote i2c write, maybe others). It's still the unloved stepchild with no > one really focusing on improving it. > > So I think it's way too early to think about removing this outright. > Not sure we should ever remove it really. What happens if in the future > most of our ci displays are mst capable? Do we just not test sst at all? > Granted a modparam is a probably a bit too coarse for that, but I think > we may want *something* to force sst. > > -- > Ville Syrjälä > Intel > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH xf86-video-intel v2] sna: Added AYUV format support for textured and sprite video adapters.
Quoting Stanislav Lisovskiy (2018-10-04 13:49:41)
> diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> index 6669af9d..ef88d1f9 100644
> --- a/src/sna/sna_render.h
> +++ b/src/sna/sna_render.h
> @@ -139,20 +139,25 @@ struct sna_composite_op {
>
> struct {
> uint32_t flags;
> + uint8_t wm_kernel;
> } gen6;
>
> struct {
> uint32_t flags;
> + uint8_t wm_kernel;
> } gen7;
>
> struct {
> uint32_t flags;
> + uint8_t wm_kernel;
> } gen8;
>
> struct {
> uint32_t flags;
> + uint8_t wm_kernel;
> } gen9;
> } u;
> + unsigned long gen9_kernel;
Still the same problems. Additional *unused* parameters in the common which
are clearly marked as gen specific, and extra unused gen specific
parameters.
Would it be easier if you split the patch up into functional changes?
-Chris
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[Intel-gfx] [PATCH i-g-t v2] igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
When RECOVERABLE is set, the kernel will attempt to automatically recover
a context after a hang. But if it is unset, the kernel will ban the
guilty context on a hang, preventing subsequent execution.
v2: Create a has_recoverable_param()
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
tests/gem_ctx_exec.c | 48
1 file changed, 48 insertions(+)
diff --git a/tests/gem_ctx_exec.c b/tests/gem_ctx_exec.c
index 908b59af..44e6ec2b 100644
--- a/tests/gem_ctx_exec.c
+++ b/tests/gem_ctx_exec.c
@@ -147,6 +147,51 @@ static void invalid_context(int fd, unsigned ring,
uint32_t handle)
igt_assert_eq(__gem_execbuf(fd, ), -ENOENT);
}
+static bool has_recoverable_param(int i915)
+{
+ struct drm_i915_gem_context_param param = {
+ .param = 0x7,
+ };
+
+ return __gem_context_get_param(i915, ) == 0;
+}
+
+static void norecovery(int i915)
+{
+ igt_require(has_recoverable_param(i915));
+
+ for (int pass = 1; pass >= 0; pass--) {
+ struct drm_i915_gem_context_param param = {
+ .ctx_id = gem_context_create(i915),
+ .param = 0x7,
+ .value = pass,
+ };
+ int expect = pass == 0 ? -EIO : 0;
+ igt_spin_t *spin;
+
+ gem_context_set_param(i915, );
+
+ param.value = !pass;
+ gem_context_get_param(i915, );
+ igt_assert_eq(param.value, pass);
+
+ spin = __igt_spin_batch_new(i915,
+ .ctx = param.ctx_id,
+ .flags = IGT_SPIN_POLL_RUN);
+ igt_assert(spin->running);
+
+ while (!READ_ONCE(*spin->running))
+ ;
+ igt_force_gpu_reset(i915);
+
+ igt_spin_batch_end(spin);
+ igt_assert_eq(__gem_execbuf(i915, >execbuf), expect);
+ igt_spin_batch_free(i915, spin);
+
+ gem_context_destroy(i915, param.ctx_id);
+ }
+}
+
igt_main
{
const uint32_t batch[2] = { 0, MI_BATCH_BUFFER_END };
@@ -190,6 +235,9 @@ igt_main
igt_subtest("eviction")
big_exec(fd, handle, 0);
+ igt_subtest("norecovery")
+ norecovery(fd);
+
igt_subtest("reset-pin-leak") {
int i;
--
2.19.0
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Re: [Intel-gfx] [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
On Thu, Oct 04, 2018 at 03:25:42PM +0200, Maarten Lankhorst wrote: > Op 04-10-18 om 14:57 schreef Ville Syrjälä: > > On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote: > >> Do not rely on crtc->config any more. Remove the assertion from > >> ibx_pch_dpll_disable, because we the dpll state tracking should > >> already handle this case correctly. > >> > >> Signed-off-by: Maarten Lankhorst > >> Reviewed-by: Ville Syrjälä > >> --- > >> drivers/gpu/drm/i915/intel_display.c | 14 ++-- > >> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++ > >> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++--- > >> 3 files changed, 22 insertions(+), 29 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_display.c > >> b/drivers/gpu/drm/i915/intel_display.c > >> index fe8ccbdd4ea1..4df4293a7917 100644 > >> --- a/drivers/gpu/drm/i915/intel_display.c > >> +++ b/drivers/gpu/drm/i915/intel_display.c > >> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct > >> intel_atomic_state *state, > >> * Note that enable_shared_dpll tries to do the right thing, but > >> * get_shared_dpll unconditionally resets the pll - we need that to have > >> * the right LVDS enable sequence. */ > >> - intel_enable_shared_dpll(crtc); > >> + intel_enable_shared_dpll(crtc_state); > >> > >>/* set transcoder timing, panel must allow it */ > >>assert_panel_unlocked(dev_priv, pipe); > >> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct > >> intel_crtc_state *pipe_config, > >>intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); > >>intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false); > >> > >> - if (intel_crtc->config->has_pch_encoder) > >> - intel_prepare_shared_dpll(intel_crtc); > >> + if (pipe_config->has_pch_encoder) > >> + intel_prepare_shared_dpll(pipe_config); > >> > >>if (intel_crtc_has_dp_encoder(intel_crtc->config)) > >>intel_dp_set_m_n(intel_crtc, M1_N1); > >> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct > >> intel_crtc_state *pipe_config, > >> > >>intel_encoders_pre_pll_enable(crtc, pipe_config, old_state); > >> > >> - if (intel_crtc->config->shared_dpll) > >> - intel_enable_shared_dpll(intel_crtc); > >> + if (pipe_config->shared_dpll) > >> + intel_enable_shared_dpll(pipe_config); > >> > >>if (INTEL_GEN(dev_priv) >= 11) > >>icl_map_plls_to_ports(crtc, pipe_config, old_state); > >> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct > >> drm_crtc *crtc, > >> > >>intel_fbc_disable(intel_crtc); > >>intel_update_watermarks(intel_crtc); > >> - intel_disable_shared_dpll(intel_crtc); > >> + intel_disable_shared_dpll(crtc_state); > > I guess this is the explosion on i915g/i965g. We've already freed this > > crtc state at this point. So I guess s/crtc_state/crtc->state/ and it > > should be fine? > > > No, the explosion is at > > - if (WARN_ON(pll == NULL)) > + if (!WARN_ON(!pll)) > return; > > Oops! Should be fixed in v2 I'm sending now. <4>[ 11.181254] R10: R11: R12: 6b6b6b6b6b6b6b6b <4>[ 11.181141] RIP: 0010:intel_disable_shared_dpll+0x12/0x130 [i915] <4>[ 11.181157] Code: c7 e9 67 25 a0 e8 9e da ec e0 0f 0b e9 18 ff ff ff 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 4c 8b 27 48 8b 9f 98 02 00 00 <4d> 8b 34 24 41 80 be 5c 0d 00 00 04 76 05 48 85 db 75 09 5b 5d 41 72a: 4d 8b 34 24 mov(%r12),%r14 Looks like it's still trying to drink poison. -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t] igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
Quoting Mika Kuoppala (2018-10-04 14:26:16)
> Chris Wilson writes:
>
> > When RECOVERABLE is set, the kernel will attempt to automatically recover
> > a context after a hang. But if it is unset, the kernel will ban the
> > guilty context on a hang, preventing subsequent execution.
> >
> > Signed-off-by: Chris Wilson
> > ---
> > tests/gem_ctx_exec.c | 38 ++
> > 1 file changed, 38 insertions(+)
> >
> > diff --git a/tests/gem_ctx_exec.c b/tests/gem_ctx_exec.c
> > index 908b59af..1cd3b20e 100644
> > --- a/tests/gem_ctx_exec.c
> > +++ b/tests/gem_ctx_exec.c
> > @@ -147,6 +147,41 @@ static void invalid_context(int fd, unsigned ring,
> > uint32_t handle)
> > igt_assert_eq(__gem_execbuf(fd, ), -ENOENT);
> > }
> >
> > +static void norecovery(int i915)
> > +{
> > + for (int pass = 1; pass >= 0; pass--) {
> > + struct drm_i915_gem_context_param param = {
> > + .ctx_id = gem_context_create(i915),
> > + .param = 0x7,
> > + .value = pass,
> > + };
> > + int expect = pass == 0 ? -EIO : 0;
> > + igt_spin_t *spin;
> > +
> > + if (pass)
> > + igt_require(__gem_context_set_param(i915, ) ==
> > 0);
> > + else
> > + gem_context_set_param(i915, );
>
> You are trying in here to make the asserts unique?
Nah, since pass=1 was meant to be standard procedure, this was just a
"has param check". So I was being lazy and not separating it out into
its own little helper.
> > + gem_context_get_param(i915, );
> > + igt_assert_eq(param.value, pass);
> > +
> > + spin = __igt_spin_batch_new(i915,
> > + .ctx = param.ctx_id,
> > + .flags = IGT_SPIN_POLL_RUN);
> > + igt_assert(spin->running);
> > +
> > + while (!READ_ONCE(*spin->running))
> > + ;
>
> wait that it is running...
>
> > + igt_force_gpu_reset(i915);
> > +
>
> then reset.
Aye, that's our current MO for gpu resets.
> > + igt_spin_batch_end(spin);
>
> > + igt_assert_eq(__gem_execbuf(i915, >execbuf), expect);
>
> Hmm where do we sync with hang resolution. Is it the handoff in
> the wedged debugfs entry?
Yes. The force-gpu reset is synchronous, you should be able to remember
the fun we had with that little race.
-Chris
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[Intel-gfx] [PATCH] drm/i915/icl: MBUS B credit change
No functional change. But just a minor change to keep
up with Spec, since it has changed since commit c3cc39c539d4
("drm/i915/icl: program mbus during pipe enable")
The instructions previously said to program pipe's
B credit = 24 / number of pipes, which is 8 for ICL.
Now the spec gives us direct values independent of number
of pipes. Let's keep in sync.
Also just a reorder on fields to make easier to compare
against spec's sequence: A -> BW -> B.
Cc: Lucas De Marchi
Cc: Paulo Zanoni
Cc: Mahesh Kumar
Cc: Arthur J Runyan
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_display.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 36434c5359b1..eb2250a984a8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5683,10 +5683,9 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc)
enum pipe pipe = crtc->pipe;
uint32_t val;
- val = MBUS_DBOX_BW_CREDIT(1) | MBUS_DBOX_A_CREDIT(2);
-
- /* Program B credit equally to all pipes */
- val |= MBUS_DBOX_B_CREDIT(24 / INTEL_INFO(dev_priv)->num_pipes);
+ val = MBUS_DBOX_A_CREDIT(2);
+ val |= MBUS_DBOX_BW_CREDIT(1);
+ val |= MBUS_DBOX_B_CREDIT(8);
I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);
}
--
2.17.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] sysfs: constify sysfs create/remove files harder
== Series Details == Series: series starting with [1/2] sysfs: constify sysfs create/remove files harder URL : https://patchwork.freedesktop.org/series/50558/ State : success == Summary == = CI Bug Log - changes from CI_DRM_4931 -> Patchwork_10362 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/50558/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10362 that come from known issues: === IGT changes === Issues hit igt@amdgpu/amd_cs_nop@sync-fork-compute0: fi-kbl-8809g: PASS -> DMESG-WARN (fdo#107762) igt@gem_exec_suspend@basic-s3: fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) Possible fixes igt@gem_ctx_param@basic-default: fi-pnv-d510:INCOMPLETE (fdo#106007) -> SKIP igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: INCOMPLETE (fdo#106070, fdo#108126) -> PASS fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106007 https://bugs.freedesktop.org/show_bug.cgi?id=106007 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107762 https://bugs.freedesktop.org/show_bug.cgi?id=107762 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (48 -> 43) == Additional (2): fi-icl-u fi-bdw-samus Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-kbl-7560u == Build changes == * Linux: CI_DRM_4931 -> Patchwork_10362 CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10362: bac4039c629245599634a1a25a4029671408cc7a @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == bac4039c6292 drm/i915/sysfs: make attrs arrays const fd1ccbdbc465 sysfs: constify sysfs create/remove files harder == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10362/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] sysfs: constify sysfs create/remove files harder
== Series Details == Series: series starting with [1/2] sysfs: constify sysfs create/remove files harder URL : https://patchwork.freedesktop.org/series/50558/ State : warning == Summary == $ dim checkpatch origin/drm-tip fd1ccbdbc465 sysfs: constify sysfs create/remove files harder -:53: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct attribute * const' should also have an identifier name #53: FILE: include/linux/sysfs.h:246: +void sysfs_remove_files(struct kobject *kobj, const struct attribute * const *attr); total: 0 errors, 1 warnings, 0 checks, 48 lines checked bac4039c6292 drm/i915/sysfs: make attrs arrays const ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915/sysfs: make attrs arrays const
They don't need to be modified.
Cc: Greg Kroah-Hartman
Cc: "Rafael J. Wysocki"
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_sysfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
b/drivers/gpu/drm/i915/i915_sysfs.c
index e5e6f6bb2b05..b9aa8515254e 100644
--- a/drivers/gpu/drm/i915/i915_sysfs.c
+++ b/drivers/gpu/drm/i915/i915_sysfs.c
@@ -483,7 +483,7 @@ static ssize_t gt_rp_mhz_show(struct device *kdev, struct
device_attribute *attr
return snprintf(buf, PAGE_SIZE, "%d\n", val);
}
-static const struct attribute *gen6_attrs[] = {
+static const struct attribute * const gen6_attrs[] = {
_attr_gt_act_freq_mhz.attr,
_attr_gt_cur_freq_mhz.attr,
_attr_gt_boost_freq_mhz.attr,
@@ -495,7 +495,7 @@ static const struct attribute *gen6_attrs[] = {
NULL,
};
-static const struct attribute *vlv_attrs[] = {
+static const struct attribute * const vlv_attrs[] = {
_attr_gt_act_freq_mhz.attr,
_attr_gt_cur_freq_mhz.attr,
_attr_gt_boost_freq_mhz.attr,
--
2.11.0
___
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[Intel-gfx] [PATCH 1/2] sysfs: constify sysfs create/remove files harder
Let the passed in array be const (and thus placed in rodata) instead of
a mutable array of const pointers.
Cc: Greg Kroah-Hartman
Cc: "Rafael J. Wysocki"
Signed-off-by: Jani Nikula
---
fs/sysfs/file.c | 4 ++--
include/linux/sysfs.h | 8
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/fs/sysfs/file.c b/fs/sysfs/file.c
index 0a7252aecfa5..bb71db63c99c 100644
--- a/fs/sysfs/file.c
+++ b/fs/sysfs/file.c
@@ -334,7 +334,7 @@ int sysfs_create_file_ns(struct kobject *kobj, const struct
attribute *attr,
}
EXPORT_SYMBOL_GPL(sysfs_create_file_ns);
-int sysfs_create_files(struct kobject *kobj, const struct attribute **ptr)
+int sysfs_create_files(struct kobject *kobj, const struct attribute * const
*ptr)
{
int err = 0;
int i;
@@ -493,7 +493,7 @@ bool sysfs_remove_file_self(struct kobject *kobj, const
struct attribute *attr)
return ret;
}
-void sysfs_remove_files(struct kobject *kobj, const struct attribute **ptr)
+void sysfs_remove_files(struct kobject *kobj, const struct attribute * const
*ptr)
{
int i;
for (i = 0; ptr[i]; i++)
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index 987cefa337de..786816cf4aa5 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -234,7 +234,7 @@ int __must_check sysfs_create_file_ns(struct kobject *kobj,
const struct attribute *attr,
const void *ns);
int __must_check sysfs_create_files(struct kobject *kobj,
- const struct attribute **attr);
+ const struct attribute * const *attr);
int __must_check sysfs_chmod_file(struct kobject *kobj,
const struct attribute *attr, umode_t mode);
struct kernfs_node *sysfs_break_active_protection(struct kobject *kobj,
@@ -243,7 +243,7 @@ void sysfs_unbreak_active_protection(struct kernfs_node
*kn);
void sysfs_remove_file_ns(struct kobject *kobj, const struct attribute *attr,
const void *ns);
bool sysfs_remove_file_self(struct kobject *kobj, const struct attribute
*attr);
-void sysfs_remove_files(struct kobject *kobj, const struct attribute **attr);
+void sysfs_remove_files(struct kobject *kobj, const struct attribute * const
*attr);
int __must_check sysfs_create_bin_file(struct kobject *kobj,
const struct bin_attribute *attr);
@@ -342,7 +342,7 @@ static inline int sysfs_create_file_ns(struct kobject *kobj,
}
static inline int sysfs_create_files(struct kobject *kobj,
- const struct attribute **attr)
+ const struct attribute * const *attr)
{
return 0;
}
@@ -377,7 +377,7 @@ static inline bool sysfs_remove_file_self(struct kobject
*kobj,
}
static inline void sysfs_remove_files(struct kobject *kobj,
-const struct attribute **attr)
+const struct attribute * const *attr)
{
}
--
2.11.0
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Re: [Intel-gfx] [PATCH v7] drm/i915: Engine discovery query
Some comments below, mostly related to trying to keep the uapi header
nice and tidy.
Quoting Tvrtko Ursulin (2018-10-04 14:32:48)
> @@ -1747,6 +1748,52 @@ struct drm_i915_query_topology_info {
> __u8 data[];
> };
>
> +/**
> + * struct drm_i915_engine_info
> + *
> + * Describes one engine known to the driver, whether or not it is an user-
> + * accessible or hardware only engine, and what are it's capabilities where
> + * applicable.
> + */
> +struct drm_i915_engine_info {
> + /** Engine class as in enum drm_i915_gem_engine_class. */
> + __u16 class;
> +
> + /** Engine instance number. */
> + __u16 instance;
> +
> + /** Reserved field must be cleared to zero. */
> + __u32 rsvd0;
u32 class, u32 instance just to put the padding to good use?
> +
> + /** Engine flags. */
> + __u64 flags;
> +
> + /** Capabilities of this engine. */
> + __u64 capabilities;
> +#define I915_VCS_CLASS_CAPABILITY_HEVC (1 << 0)
> +#define I915_VCS_CLASS_CAPABILITY_SFC (1 << 1)
> +
> + /** Reserved fields must be cleared to zero. */
> + __u64 rsvd1[4];
Why this at the end of the struct? We have flags which we should be able
to use for new versions.
> +};
> +
> +/**
> + * struct drm_i915_query_engine_info
> + *
> + * Engine info query enumerates all engines known to the driver by filling in
> + * an array of struct drm_i915_engine_info structures.
> + */
> +struct drm_i915_query_engine_info {
> + /** Number of struct drm_i915_engine_info structs following. */
> + __u32 num_engines;
> +
> + /** MBZ */
Just copy the non-abbreviated comment from other reserved fields.
> + __u32 rsvd[3];
> +
Might as well do just __u32 flags, which must be zero?
I don't think we need to get too excited about adding the reserved
fields in every spot :)
Regards, Joonas
> + /** Marker for drm_i915_engine_info structures. */
> + struct drm_i915_engine_info engines[];
> +};
> +
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.17.1
>
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
== Series Details == Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) URL : https://patchwork.freedesktop.org/series/50506/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4931 -> Patchwork_10361 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10361 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10361, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/50506/revisions/3/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10361: === IGT changes === Possible regressions igt@drv_getparams_basic@basic-subslice-total: fi-bwr-2160:PASS -> TIMEOUT +11 igt@drv_module_reload@basic-no-display: fi-blb-e6850: NOTRUN -> DMESG-WARN igt@gem_busy@basic-busy-default: fi-bwr-2160:SKIP -> TIMEOUT igt@gem_ctx_create@basic: fi-bwr-2160:SKIP -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_10361 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#107362) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) Possible fixes igt@drv_module_reload@basic-reload: fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#106070) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (48 -> 41) == Additional (2): fi-icl-u fi-bdw-samus Missing(9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-pnv-d510 fi-skl-6600u == Build changes == * Linux: CI_DRM_4931 -> Patchwork_10361 CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10361: 20ede0c38c9ddcf2f37c6f345b1e2f660693d74d @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 20ede0c38c9d drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2. 2f4167736bfc drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset f00497170c8a drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link f74f08ce235d drm/i915: Use crtc->state in intel_fbdev_init_bios 06539f0cc392 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel 839ab93a8881 drm/i915: Make shared dpll functions take crtc_state, v2. c7a659cc0fdb drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state 954a652b810f drm/i915: Make pll functions take crtc_state, v2. 7e19a0f17cc5 drm/i915: Make skl_detach_scalers take crtc_state 5131d39f28c8 drm/i915: Use crtc_state in ironlake_enable_pch_transcoder 6ef13c9d6e51 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state 2777f6e22708 drm/i915: Make panel fitter functions take state 743f67a7f663 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10361/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Report the number of closed vma held by each context in debugfs
== Series Details ==
Series: series starting with [1/2] drm/i915: Report the number of closed vma
held by each context in debugfs
URL : https://patchwork.freedesktop.org/series/50536/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4929_full -> Patchwork_10353_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10353_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10353_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in
Patchwork_10353_full:
=== IGT changes ===
Warnings
igt@kms_busy@extended-pageflip-hang-oldfb-render-a:
shard-snb: PASS -> SKIP +2
== Known issues ==
Here are the changes found in Patchwork_10353_full that come from known
issues:
=== IGT changes ===
Issues hit
igt@drv_suspend@shrink:
shard-snb: PASS -> INCOMPLETE (fdo#106886, fdo#105411)
shard-glk: PASS -> INCOMPLETE (fdo#106886, fdo#103359,
k.org#198133)
igt@gem_ppgtt@blt-vs-render-ctx0:
shard-skl: NOTRUN -> TIMEOUT (fdo#108039, fdo#108130)
igt@gem_userptr_blits@readonly-unsync:
shard-skl: PASS -> INCOMPLETE (fdo#108074)
igt@kms_available_modes_crc@available_mode_test_crc:
shard-skl: NOTRUN -> FAIL (fdo#106641)
igt@kms_busy@extended-modeset-hang-newfb-render-c:
shard-skl: NOTRUN -> DMESG-WARN (fdo#107956)
igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
shard-skl: NOTRUN -> FAIL (fdo#105458)
igt@kms_cursor_crc@cursor-64x21-random:
shard-apl: PASS -> FAIL (fdo#103232)
igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled:
shard-glk: PASS -> FAIL (fdo#108222)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-glk: PASS -> FAIL (fdo#103167)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_plane@plane-position-covered-pipe-a-planes:
shard-apl: PASS -> FAIL (fdo#103166) +2
{igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max}:
shard-glk: PASS -> FAIL (fdo#108145)
{igt@kms_plane_alpha_blend@pipe-b-coverage-7efc}:
shard-skl: NOTRUN -> FAIL (fdo#108146)
{igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max}:
shard-skl: NOTRUN -> FAIL (fdo#108145)
igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
shard-glk: PASS -> FAIL (fdo#103166)
igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format:
shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763) +1
igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +23
igt@perf@buffer-fill:
shard-kbl: PASS -> INCOMPLETE (fdo#103665)
Possible fixes
igt@gem_eio@in-flight-1us:
shard-glk: INCOMPLETE (k.org#198133, fdo#103359) -> PASS
igt@kms_cursor_crc@cursor-128x128-random:
shard-apl: FAIL (fdo#103232) -> PASS
igt@kms_draw_crc@draw-method-rgb565-blt-xtiled:
shard-skl: FAIL (fdo#103184) -> PASS +1
igt@kms_flip@2x-flip-vs-expired-vblank:
shard-glk: FAIL (fdo#105363) -> PASS
igt@kms_flip@flip-vs-expired-vblank:
shard-skl: FAIL (fdo#105363) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
shard-glk: FAIL (fdo#103167) -> PASS +2
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
shard-apl: FAIL (fdo#103167) -> PASS +4
igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
shard-kbl: INCOMPLETE (fdo#103665) -> PASS
{igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb}:
shard-glk: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
shard-apl: FAIL (fdo#103166) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-glk: FAIL (fdo#103166) -> PASS +3
igt@kms_rmfb@rmfb-ioctl:
shard-kbl: DMESG-WARN (fdo#105602, fdo#103558) -> PASS +31
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
shard-kbl: FAIL (fdo#99912) -> PASS
Warnings
igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
shard-apl: FAIL (fdo#105458, fdo#106510) -> DMESG-WARN
(fdo#105602, fdo#103558)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103166
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
== Series Details == Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) URL : https://patchwork.freedesktop.org/series/50506/ State : warning == Summary == $ dim checkpatch origin/drm-tip 743f67a7f663 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2. 2777f6e22708 drm/i915: Make panel fitter functions take state 6ef13c9d6e51 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state 5131d39f28c8 drm/i915: Use crtc_state in ironlake_enable_pch_transcoder 7e19a0f17cc5 drm/i915: Make skl_detach_scalers take crtc_state 954a652b810f drm/i915: Make pll functions take crtc_state, v2. c7a659cc0fdb drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state 839ab93a8881 drm/i915: Make shared dpll functions take crtc_state, v2. 06539f0cc392 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel f74f08ce235d drm/i915: Use crtc->state in intel_fbdev_init_bios f00497170c8a drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link -:10: WARNING:TYPO_SPELLING: 'occuring' may be misspelled - perhaps 'occurring'? #10: We're already using crtc_state here and made sure no modeset is occuring total: 0 errors, 1 warnings, 0 checks, 16 lines checked 2f4167736bfc drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset 20ede0c38c9d drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Add XYUV format support (rev8)
== Series Details == Series: Add XYUV format support (rev8) URL : https://patchwork.freedesktop.org/series/48007/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4931 -> Patchwork_10360 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10360 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10360, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/48007/revisions/8/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10360: === IGT changes === Possible regressions igt@drv_selftest@live_hangcheck: fi-icl-u: NOTRUN -> INCOMPLETE == Known issues == Here are the changes found in Patchwork_10360 that come from known issues: === IGT changes === Issues hit igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362) Possible fixes igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS igt@kms_pipe_crc_basic@read-crc-pipe-a: fi-byt-clapper: FAIL (fdo#107362) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#106070) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126 == Participating hosts (48 -> 43) == Additional (2): fi-icl-u fi-bdw-samus Missing(7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 == Build changes == * Linux: CI_DRM_4931 -> Patchwork_10360 CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10360: cb70f1ebba228ce6d6adfcd555a96345cf15fb86 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == cb70f1ebba22 drm/i915: Adding YUV444 packed format support for skl+ f58818541bcb drm: Introduce new DRM_FORMAT_XYUV == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10360/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-intel-next-fixes
Hi Dave, Here comes -fixes for drm-next. One compiler warning fix and adding back a removed max stride check, nothing end user visible. Regards, Joonas PS. Travelling next week, so I'll skip PR unless there's something big. --- drm-intel-next-fixes-2018-10-04: Compiler warning fix and adding back a removed max stride check for sprite planes. The following changes since commit 87c2ee740c07f1edae9eec8bc45cb9b32a68f323: Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next (2018-09-28 09:48:40 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-fixes-2018-10-04 for you to fetch changes up to 98a9bce38b3d93082353fda561abb73a4d7b8d94: drm/i915: Avoid compiler warning for maybe unused gu_misc_iir (2018-10-01 11:58:17 +0300) Compiler warning fix and adding back a removed max stride check for sprite planes. Chris Wilson (1): drm/i915: Avoid compiler warning for maybe unused gu_misc_iir Ville Syrjälä (1): drm/i915: Check fb stride against plane max stride drivers/gpu/drm/i915/i915_irq.c | 33 - drivers/gpu/drm/i915/intel_display.c | 14 ++ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_sprite.c | 22 ++ 4 files changed, 49 insertions(+), 21 deletions(-) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2.
Do not rely on crtc->config any more. Remove the assertion from
ibx_pch_dpll_disable, because we the dpll state tracking should
already handle this case correctly.
Changes since v1:
- Fixup accidental early return in intel_prepare_shared_dpll, oops!
Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 14 ++---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 29 ++-
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
3 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index fe8ccbdd4ea1..4df4293a7917 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct
intel_atomic_state *state,
* Note that enable_shared_dpll tries to do the right thing, but
* get_shared_dpll unconditionally resets the pll - we need that to have
* the right LVDS enable sequence. */
- intel_enable_shared_dpll(crtc);
+ intel_enable_shared_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
@@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state
*pipe_config,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
- if (intel_crtc->config->has_pch_encoder)
- intel_prepare_shared_dpll(intel_crtc);
+ if (pipe_config->has_pch_encoder)
+ intel_prepare_shared_dpll(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state
*pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
+ if (pipe_config->shared_dpll)
+ intel_enable_shared_dpll(pipe_config);
if (INTEL_GEN(dev_priv) >= 11)
icl_map_plls_to_ports(crtc, pipe_config, old_state);
@@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc
*crtc,
intel_fbc_disable(intel_crtc);
intel_update_watermarks(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(crtc_state);
domains = intel_crtc->enabled_power_domains;
for_each_power_domain(domain, domains)
@@ -12735,7 +12735,7 @@ static void intel_atomic_commit_tail(struct
drm_atomic_state *state)
dev_priv->display.crtc_disable(old_intel_crtc_state,
state);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(old_intel_crtc_state);
/*
* Underruns don't always raise
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..10e820804eee 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -131,11 +131,11 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
* This calls the PLL's prepare hook if it has one and if the PLL is not
* already enabled. The prepare hook is platform specific.
*/
-void intel_prepare_shared_dpll(struct intel_crtc *crtc)
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
if (WARN_ON(pll == NULL))
return;
@@ -158,11 +158,11 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
*
* Enable the shared DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(struct intel_crtc *crtc)
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(>base);
unsigned int old_mask;
@@ -203,10 +203,11 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
*
* Disable the
Re: [Intel-gfx] [PATCH i-g-t] igt/gem_ctx_exec: Exercise I915_CONTEXT_PARAM_RECOVERABLE
Chris Wilson writes:
> When RECOVERABLE is set, the kernel will attempt to automatically recover
> a context after a hang. But if it is unset, the kernel will ban the
> guilty context on a hang, preventing subsequent execution.
>
> Signed-off-by: Chris Wilson
> ---
> tests/gem_ctx_exec.c | 38 ++
> 1 file changed, 38 insertions(+)
>
> diff --git a/tests/gem_ctx_exec.c b/tests/gem_ctx_exec.c
> index 908b59af..1cd3b20e 100644
> --- a/tests/gem_ctx_exec.c
> +++ b/tests/gem_ctx_exec.c
> @@ -147,6 +147,41 @@ static void invalid_context(int fd, unsigned ring,
> uint32_t handle)
> igt_assert_eq(__gem_execbuf(fd, ), -ENOENT);
> }
>
> +static void norecovery(int i915)
> +{
> + for (int pass = 1; pass >= 0; pass--) {
> + struct drm_i915_gem_context_param param = {
> + .ctx_id = gem_context_create(i915),
> + .param = 0x7,
> + .value = pass,
> + };
> + int expect = pass == 0 ? -EIO : 0;
> + igt_spin_t *spin;
> +
> + if (pass)
> + igt_require(__gem_context_set_param(i915, ) == 0);
> + else
> + gem_context_set_param(i915, );
You are trying in here to make the asserts unique?
> + gem_context_get_param(i915, );
> + igt_assert_eq(param.value, pass);
> +
> + spin = __igt_spin_batch_new(i915,
> + .ctx = param.ctx_id,
> + .flags = IGT_SPIN_POLL_RUN);
> + igt_assert(spin->running);
> +
> + while (!READ_ONCE(*spin->running))
> + ;
wait that it is running...
> + igt_force_gpu_reset(i915);
> +
then reset.
> + igt_spin_batch_end(spin);
> + igt_assert_eq(__gem_execbuf(i915, >execbuf), expect);
Hmm where do we sync with hang resolution. Is it the handoff in
the wedged debugfs entry?
-Mika
> + igt_spin_batch_free(i915, spin);
> +
> + gem_context_destroy(i915, param.ctx_id);
> + }
> +}
> +
> igt_main
> {
> const uint32_t batch[2] = { 0, MI_BATCH_BUFFER_END };
> @@ -190,6 +225,9 @@ igt_main
> igt_subtest("eviction")
> big_exec(fd, handle, 0);
>
> + igt_subtest("norecovery")
> + norecovery(fd);
> +
> igt_subtest("reset-pin-leak") {
> int i;
>
> --
> 2.19.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
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Re: [Intel-gfx] [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
Op 04-10-18 om 14:57 schreef Ville Syrjälä: > On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote: >> Do not rely on crtc->config any more. Remove the assertion from >> ibx_pch_dpll_disable, because we the dpll state tracking should >> already handle this case correctly. >> >> Signed-off-by: Maarten Lankhorst >> Reviewed-by: Ville Syrjälä >> --- >> drivers/gpu/drm/i915/intel_display.c | 14 ++-- >> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++ >> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++--- >> 3 files changed, 22 insertions(+), 29 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c >> b/drivers/gpu/drm/i915/intel_display.c >> index fe8ccbdd4ea1..4df4293a7917 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct >> intel_atomic_state *state, >> * Note that enable_shared_dpll tries to do the right thing, but >> * get_shared_dpll unconditionally resets the pll - we need that to have >> * the right LVDS enable sequence. */ >> -intel_enable_shared_dpll(crtc); >> +intel_enable_shared_dpll(crtc_state); >> >> /* set transcoder timing, panel must allow it */ >> assert_panel_unlocked(dev_priv, pipe); >> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct >> intel_crtc_state *pipe_config, >> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false); >> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false); >> >> -if (intel_crtc->config->has_pch_encoder) >> -intel_prepare_shared_dpll(intel_crtc); >> +if (pipe_config->has_pch_encoder) >> +intel_prepare_shared_dpll(pipe_config); >> >> if (intel_crtc_has_dp_encoder(intel_crtc->config)) >> intel_dp_set_m_n(intel_crtc, M1_N1); >> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct >> intel_crtc_state *pipe_config, >> >> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state); >> >> -if (intel_crtc->config->shared_dpll) >> -intel_enable_shared_dpll(intel_crtc); >> +if (pipe_config->shared_dpll) >> +intel_enable_shared_dpll(pipe_config); >> >> if (INTEL_GEN(dev_priv) >= 11) >> icl_map_plls_to_ports(crtc, pipe_config, old_state); >> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct >> drm_crtc *crtc, >> >> intel_fbc_disable(intel_crtc); >> intel_update_watermarks(intel_crtc); >> -intel_disable_shared_dpll(intel_crtc); >> +intel_disable_shared_dpll(crtc_state); > I guess this is the explosion on i915g/i965g. We've already freed this > crtc state at this point. So I guess s/crtc_state/crtc->state/ and it > should be fine? > No, the explosion is at - if (WARN_ON(pll == NULL)) + if (!WARN_ON(!pll)) return; Oops! Should be fixed in v2 I'm sending now. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add XYUV format support (rev8)
== Series Details ==
Series: Add XYUV format support (rev8)
URL : https://patchwork.freedesktop.org/series/48007/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f58818541bcb drm: Introduce new DRM_FORMAT_XYUV
-:32: WARNING:LONG_LINE: line over 100 characters
#32: FILE: drivers/gpu/drm/drm_fourcc.c:228:
+ { .format = DRM_FORMAT_XYUV,.depth = 0,
.num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
-:44: WARNING:LONG_LINE_COMMENT: line over 100 characters
#44: FILE: include/uapi/drm/drm_fourcc.h:154:
+#define DRM_FORMAT_XYUVfourcc_code('X', 'Y', 'U', 'V') /*
[31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
total: 0 errors, 2 warnings, 0 checks, 14 lines checked
cb70f1ebba22 drm/i915: Adding YUV444 packed format support for skl+
___
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/5] igt/kms_getfb: Check the iface exists before use
On Wed, Oct 03, 2018 at 04:04:20PM +0300, Joonas Lahtinen wrote: > Quoting Antonio Argenziano (2018-10-02 23:27:46) > > > > > > On 02/10/18 01:30, Joonas Lahtinen wrote: > > > Quoting Antonio Argenziano (2018-10-01 22:53:46) > > >> Fair enough. > > >> > > >> Acked-by: Antonio Argenziano > > >> > > >> for the series. > > > > > > Please, read the following chapters (they're applicable for the patch > > > tag meanings in IGT, too): > > > > > > https://www.kernel.org/doc/html/v4.18/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by > > > https://www.kernel.org/doc/html/v4.18/process/submitting-patches.html#using-reported-by-tested-by-reviewed-by-suggested-by-and-fixes > > > > > > If we spend the time to actually review the patches, that should be > > > documented with a proper Reviewed-by and not a vague Acked-by. > > > > KMS is really an area I do not know much about. While I can say the > > patches are looking good on the IGT side, I cannot guarantee they use > > the KMS interface appropriately therefore the 'Acked-by'. After reading > > the documentation you linked I think it fits rather well since the only > > feedback I gave was on a small oversight. > > Fair enough. For future reference, you may want to comment when giving > your Acked-by, the reason for only limited review and not full R-b. Fyi I also did review this one, but an older version, and those comments didn't get addressed. So not the only thing that went slightly sideways here. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
