[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Unwind failure on pinning the gen7 ppgtt
== Series Details ==
Series: drm/i915: Unwind failure on pinning the gen7 ppgtt
URL : https://patchwork.freedesktop.org/series/54433/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5341_full -> Patchwork_11151_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_11151_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@pi-ringfull-blt:
- shard-skl: NOTRUN -> FAIL [fdo#103158] +1
* igt@i915_selftest@live_workarounds:
- shard-iclb: PASS -> DMESG-FAIL [fdo#108954]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_chv_cursor_fail@pipe-a-256x256-left-edge:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +14
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x64-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- shard-iclb: PASS -> WARN [fdo#108336] +5
* igt@kms_flip@basic-flip-vs-wf_vblank:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +20
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-apl: PASS -> FAIL [fdo#103167] +1
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-iclb: PASS -> FAIL [fdo#103167] +4
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-iclb: PASS -> DMESG-FAIL [fdo#107720] / [fdo#107724]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +7
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-skl: NOTRUN -> FAIL [fdo#105683]
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-glk: PASS -> FAIL [fdo#108948]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-iclb: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724] +1
* igt@kms_plane@plane-position-covered-pipe-a-planes:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +2
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-iclb: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@pm_backlight@fade_with_suspend:
- shard-iclb: NOTRUN -> FAIL [fdo#107847]
* igt@pm_rpm@fences:
- shard-iclb: PASS -> DMESG-WARN [fdo#108654] +1
* igt@pm_rpm@i2c:
- shard-skl: NOTRUN -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@system-suspend-execbuf:
- shard-iclb: NOTRUN -> INCOMPLETE [fdo#107713] / [fdo#108840]
* {igt@runner@aborted}:
- shard-iclb: NOTRUN -> FAIL [fdo#108654] / [fdo#108756]
Possible fixes
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_color@pipe-a-ctm-0-25:
- shard-skl: FAIL [fdo#108682] -> PASS
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x64-random:
- shard-apl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_flip@2x-busy-flip:
- shard-hsw: DMESG-WARN [fdo#102614] -> PASS
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: FAIL [fdo#100368] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-iclb: DMESG-FAIL [fdo#107724] -> PASS
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-glk: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-iclb: FAIL [fdo#103167] -> PASS
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
- shard-iclb: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-apl: FAIL [fdo#108948] -> PASS
* igt@kms_plane@plane-panning-bottom-right-pipe-a-planes:
- shard-skl: FAIL [fdo#103166] -> PASS
* igt@kms_plane@plane-position-covered-pipe-b-planes:
- shard-apl: FAIL [fdo#103166] ->
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Unwind failure on pinning the gen7 ppgtt
== Series Details == Series: drm/i915: Unwind failure on pinning the gen7 ppgtt URL : https://patchwork.freedesktop.org/series/54433/ State : success == Summary == CI Bug Log - changes from CI_DRM_5341 -> Patchwork_11151 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11151 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11151, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54433/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11151: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-byt-j1900: PASS -> SKIP Known issues Here are the changes found in Patchwork_11151 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: PASS -> FAIL [fdo#103167] - fi-byt-clapper: PASS -> FAIL [fdo#103167] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@pm_rpm@basic-rte: - fi-byt-j1900: PASS -> FAIL [fdo#108800] Possible fixes * igt@gem_ctx_create@basic-files: - fi-bsw-kefka: FAIL [fdo#108656] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: FAIL [fdo#103167] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u3: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569] - fi-icl-u2: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569] [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108315]: https://bugs.freedesktop.org/show_bug.cgi?id=108315 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108656]: https://bugs.freedesktop.org/show_bug.cgi?id=108656 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 Participating hosts (49 -> 43) -- Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 Build changes - * Linux: CI_DRM_5341 -> Patchwork_11151 CI_DRM_5341: 35ab0477f054cebc4370691690f27fb0589aa2f8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4753: 0bc683ea2dcf270b5287ffb4a6510fdff44e9390 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11151: a1be35247723795a29c098c379307f18b1ce3d74 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a1be35247723 drm/i915: Unwind failure on pinning the gen7 ppgtt == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11151/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Unwind failure on pinning the gen7 ppgtt
If we fail to pin the ggtt vma slot for the ppgtt page tables, we need
to unwind the locals before reporting the error. Or else on subsequent
attempts to bind the page tables into the ggtt, we will already believe
that the vma has been pinned and continue on blithely. If something else
should happen to be at that location, choas ensues.
Fixes: a2bbf7148342 ("drm/i915/gtt: Only keep gen6 page directories pinned
while active")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Mika Kuoppala
Cc: Matthew Auld
Cc: # v4.19+
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6e31745f6156..4ed2f3e61347 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2073,6 +2073,7 @@ static struct i915_vma *pd_vma_create(struct
gen6_hw_ppgtt *ppgtt, int size)
int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
{
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
+ int err;
/*
* Workaround the limited maximum vma->pin_count and the aliasing_ppgtt
@@ -2088,9 +2089,17 @@ int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
* allocator works in address space sizes, so it's multiplied by page
* size. We allocate at the top of the GTT to avoid fragmentation.
*/
- return i915_vma_pin(ppgtt->vma,
- 0, GEN6_PD_ALIGN,
- PIN_GLOBAL | PIN_HIGH);
+ err = i915_vma_pin(ppgtt->vma,
+ 0, GEN6_PD_ALIGN,
+ PIN_GLOBAL | PIN_HIGH);
+ if (err)
+ goto unpin;
+
+ return 0;
+
+unpin:
+ ppgtt->pin_count = 0;
+ return err;
}
void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base)
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for Gen9 Guc and HuC Updates (rev2)
== Series Details ==
Series: Gen9 Guc and HuC Updates (rev2)
URL : https://patchwork.freedesktop.org/series/54431/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5341_full -> Patchwork_11150_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_11150_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11150_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_11150_full:
### IGT changes ###
Possible regressions
* igt@debugfs_test@read_all_entries:
- shard-glk: PASS -> DMESG-WARN +3
* igt@debugfs_test@read_all_entries_display_on:
- shard-skl: PASS -> DMESG-WARN +1
* igt@i915_suspend@debugfs-reader:
- shard-apl: PASS -> DMESG-WARN +3
* igt@pm_rpm@debugfs-read:
- shard-kbl: PASS -> DMESG-WARN +2
Warnings
* igt@perf_pmu@rc6:
- shard-apl: PASS -> SKIP
- shard-glk: PASS -> SKIP
Known issues
Here are the changes found in Patchwork_11150_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@pi-ringfull-blt:
- shard-skl: NOTRUN -> FAIL [fdo#103158] +1
* igt@i915_suspend@fence-restore-untiled:
- shard-iclb: PASS -> INCOMPLETE [fdo#107713]
- shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773]
* igt@i915_suspend@forcewake:
- shard-iclb: NOTRUN -> INCOMPLETE [fdo#107713]
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +18
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_chv_cursor_fail@pipe-a-256x256-left-edge:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +8
* igt@kms_color@pipe-a-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-64x21-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- shard-iclb: PASS -> WARN [fdo#108336] +6
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: NOTRUN -> FAIL [fdo#105363]
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167] +6
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-onoff:
- shard-iclb: PASS -> FAIL [fdo#103167] +3
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-skl: NOTRUN -> FAIL [fdo#108145] +2
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: PASS -> FAIL [fdo#103166] +1
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +3
* igt@pm_backlight@fade_with_suspend:
- shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724]
* igt@pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-iclb: SKIP -> INCOMPLETE [fdo#108840]
* igt@pm_rpm@modeset-stress-extra-wait:
- shard-iclb: PASS -> INCOMPLETE [fdo#108840]
* igt@pm_rpm@universal-planes:
- shard-iclb: PASS -> DMESG-WARN [fdo#108654] / [fdo#108756]
* {igt@runner@aborted}:
- shard-iclb: NOTRUN -> ( 2 FAIL ) [fdo#108315] / [fdo#108654] /
[fdo#108756]
Possible fixes
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_color@pipe-c-ctm-0-25:
- shard-skl: FAIL [fdo#108682] -> PASS +1
* igt@kms_cursor_crc@cursor-128x128-offscreen:
- shard-skl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-glk: FAIL [fdo#103232] -> PASS +2
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_flip@2x-busy-flip:
- shard-hsw: DMESG-WARN [fdo#102614] -> PASS
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: FAIL [fdo#105363] -> PASS
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
[Intel-gfx] ✓ Fi.CI.BAT: success for Gen9 Guc and HuC Updates (rev2)
== Series Details == Series: Gen9 Guc and HuC Updates (rev2) URL : https://patchwork.freedesktop.org/series/54431/ State : success == Summary == CI Bug Log - changes from CI_DRM_5341 -> Patchwork_11150 Summary --- **WARNING** Minor unknown changes coming with Patchwork_11150 need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11150, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54431/revisions/2/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11150: ### IGT changes ### Warnings * igt@pm_rpm@basic-pci-d3-state: - fi-bsw-kefka: PASS -> SKIP Known issues Here are the changes found in Patchwork_11150 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718] * igt@i915_selftest@live_execlists: - fi-glk-j4005: PASS -> INCOMPLETE [fdo#103359] / [k.org#198133] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] * igt@pm_rpm@basic-rte: - fi-bsw-kefka: PASS -> FAIL [fdo#108800] Possible fixes * igt@gem_ctx_create@basic-files: - fi-bsw-kefka: FAIL [fdo#108656] -> PASS * igt@kms_frontbuffer_tracking@basic: - fi-icl-u3: FAIL [fdo#103167] -> PASS * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence: - fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u3: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569] - fi-icl-u2: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569] [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#108315]: https://bugs.freedesktop.org/show_bug.cgi?id=108315 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108656]: https://bugs.freedesktop.org/show_bug.cgi?id=108656 [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800 [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133 Participating hosts (49 -> 42) -- Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-skl-6700hq Build changes - * Linux: CI_DRM_5341 -> Patchwork_11150 CI_DRM_5341: 35ab0477f054cebc4370691690f27fb0589aa2f8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4753: 0bc683ea2dcf270b5287ffb4a6510fdff44e9390 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11150: c3f00137e40ab0b4ed9f7f51034fcc56e5999068 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c3f00137e40a HAX Enable HuC testing without GuC submission ec50cd25a893 drm/i915/guc: Load GuC v13.125 for Geminilake. eb1b6335a75a drm/i915/guc: Update GuC for KBL e8fa55152710 drm/i915/guc: Update GuC for BXT d3b4dd758567 drm/i915/guc: Update GuC for SKL 08f907c36cbe drm/i915/huc: Load HuC for GLK 28591066432b drm/i915/huc: Update HuC for KBL 2db45c49a7c8 drm/i915/huc: Update HuC for SKL == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11150/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/8] drm/i915/guc: Update GuC for BXT
From: Anusha Srivatsa We have an update of GuC for BXT. Load the latest version. Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index d67f119aa52f..6e6163d3e388 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -33,8 +33,8 @@ #define SKL_FW_MAJOR 13 #define SKL_FW_MINOR 125 -#define BXT_FW_MAJOR 9 -#define BXT_FW_MINOR 29 +#define BXT_FW_MAJOR 13 +#define BXT_FW_MINOR 125 #define KBL_FW_MAJOR 9 #define KBL_FW_MINOR 39 -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/8] drm/i915/guc: Update GuC for SKL
From: Anusha Srivatsa We have an update of GuC for SKL. Load the latest version. Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index 4b437e05e2cd..d67f119aa52f 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -30,8 +30,8 @@ #include "intel_guc_fw.h" #include "i915_drv.h" -#define SKL_FW_MAJOR 9 -#define SKL_FW_MINOR 33 +#define SKL_FW_MAJOR 13 +#define SKL_FW_MINOR 125 #define BXT_FW_MAJOR 9 #define BXT_FW_MINOR 29 -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/8] drm/i915/huc: Load HuC for GLK
From: Anusha Srivatsa
Load Huc for GLK.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_huc_fw.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c
b/drivers/gpu/drm/i915/intel_huc_fw.c
index 1fa10e327a2d..634bafb77d79 100644
--- a/drivers/gpu/drm/i915/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/intel_huc_fw.c
@@ -34,6 +34,10 @@
#define KBL_HUC_FW_MINOR 01
#define KBL_BLD_NUM 2893
+#define GLK_HUC_FW_MAJOR 03
+#define GLK_HUC_FW_MINOR 01
+#define GLK_BLD_NUM 2893
+
#define HUC_FW_PATH(platform, major, minor, bld_num) \
"i915/" __stringify(platform) "_huc_ver" __stringify(major) "_" \
__stringify(minor) "_" __stringify(bld_num) ".bin"
@@ -50,6 +54,10 @@ MODULE_FIRMWARE(I915_BXT_HUC_UCODE);
KBL_HUC_FW_MINOR, KBL_BLD_NUM)
MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
+#define I915_GLK_HUC_UCODE HUC_FW_PATH(glk, GLK_HUC_FW_MAJOR, \
+ GLK_HUC_FW_MINOR, GLK_BLD_NUM)
+MODULE_FIRMWARE(I915_GLK_HUC_UCODE);
+
static void huc_fw_select(struct intel_uc_fw *huc_fw)
{
struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
@@ -76,6 +84,10 @@ static void huc_fw_select(struct intel_uc_fw *huc_fw)
huc_fw->path = I915_KBL_HUC_UCODE;
huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
+ } else if (IS_GEMINILAKE(dev_priv)) {
+ huc_fw->path = I915_GLK_HUC_UCODE;
+ huc_fw->major_ver_wanted = GLK_HUC_FW_MAJOR;
+ huc_fw->minor_ver_wanted = GLK_HUC_FW_MINOR;
} else {
DRM_WARN("%s: No firmware known for this platform!\n",
intel_uc_fw_type_repr(huc_fw->type));
--
2.19.2
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[Intel-gfx] [PATCH 8/8] HAX Enable HuC testing without GuC submission
From: Michal Wajdeczko This will let the driver decide where GuC can be used Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_uc.c| 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h index 7e56c516c815..c681537bcb92 100644 --- a/drivers/gpu/drm/i915/i915_params.h +++ b/drivers/gpu/drm/i915/i915_params.h @@ -45,7 +45,7 @@ struct drm_printer; param(int, disable_power_well, -1) \ param(int, enable_ips, 1) \ param(int, invert_brightness, 0) \ - param(int, enable_guc, 0) \ + param(int, enable_guc, -1) \ param(int, guc_log_level, -1) \ param(char *, guc_firmware_path, NULL) \ param(char *, huc_firmware_path, NULL) \ diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 447b1de77cc7..b02930f98ce0 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -64,6 +64,9 @@ static int __get_platform_enable_guc(struct drm_i915_private *i915) /* Any platform specific fine-tuning can be done here */ + /* HAX: Do not enable GuC submission in auto mode */ + enable_guc &= ~ENABLE_GUC_SUBMISSION; + return enable_guc; } -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/8] drm/i915/huc: Update HuC for SKL
From: Anusha Srivatsa We have an update of HuC for SKL. Load the latest version. Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_huc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c b/drivers/gpu/drm/i915/intel_huc_fw.c index 9612227b3c44..4c4f21731d36 100644 --- a/drivers/gpu/drm/i915/intel_huc_fw.c +++ b/drivers/gpu/drm/i915/intel_huc_fw.c @@ -27,8 +27,8 @@ #define BXT_BLD_NUM 2893 #define SKL_HUC_FW_MAJOR 01 -#define SKL_HUC_FW_MINOR 07 -#define SKL_BLD_NUM 1398 +#define SKL_HUC_FW_MINOR 8 +#define SKL_BLD_NUM 2893 #define KBL_HUC_FW_MAJOR 02 #define KBL_HUC_FW_MINOR 00 -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/8] drm/i915/huc: Update HuC for KBL
From: Anusha Srivatsa We have an update of HuC for KBL. Load the latest version. cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_huc_fw.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_huc_fw.c b/drivers/gpu/drm/i915/intel_huc_fw.c index 4c4f21731d36..1fa10e327a2d 100644 --- a/drivers/gpu/drm/i915/intel_huc_fw.c +++ b/drivers/gpu/drm/i915/intel_huc_fw.c @@ -30,9 +30,9 @@ #define SKL_HUC_FW_MINOR 8 #define SKL_BLD_NUM 2893 -#define KBL_HUC_FW_MAJOR 02 -#define KBL_HUC_FW_MINOR 00 -#define KBL_BLD_NUM 1810 +#define KBL_HUC_FW_MAJOR 03 +#define KBL_HUC_FW_MINOR 01 +#define KBL_BLD_NUM 2893 #define HUC_FW_PATH(platform, major, minor, bld_num) \ "i915/" __stringify(platform) "_huc_ver" __stringify(major) "_" \ -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/8] Gen9 Guc and HuC Updates
Adding pull request: The following changes since commit 0f22c8527439eaaf5c3fcf87b31c89445b6fa84d: Revert "amdgpu: update vega10 fw for 18.50 release" (2018-12-18 15:38:53 -0500) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-firmware BXT_HUC for you to fetch changes up to 44a01996d5c9fc7fd05bd57d6eb12785c7a967d2: firmware/huc/kbl: Add HuC v03.01.2893 for KBL. (2018-12-21 15:45:13 -0800) Anusha Srivatsa (7): firmware/guc/bxt: Add GuC v13.125 Update for BXT firmware/guc/skl: Add GuC v13.125 Update for SKL firmware/guc/glk: Add GuC v13.125 for GLK firmware/guc/kbl: Add GuC v13.125 Update for KBL firmware/huc/skl: Add HuC v1.8.2893 Update for SKL firmware/huc/glk: Add HuC v03.01.2893 for GLK. firmware/huc/kbl: Add HuC v03.01.2893 for KBL. WHENCE | 22 ++ i915/bxt_guc_ver13_125.bin | Bin 0 -> 158976 bytes i915/glk_guc_ver13_125.bin | Bin 0 -> 159232 bytes i915/glk_huc_ver03_01_2893.bin | Bin 0 -> 222080 bytes i915/kbl_guc_ver13_125.bin | Bin 0 -> 159232 bytes i915/kbl_huc_ver03_01_2893.bin | Bin 0 -> 222080 bytes i915/skl_guc_ver13_125.bin | Bin 0 -> 158656 bytes i915/skl_huc_ver01_8_2893.bin | Bin 0 -> 133504 bytes 8 files changed, 22 insertions(+) create mode 100644 i915/bxt_guc_ver13_125.bin create mode 100644 i915/glk_guc_ver13_125.bin create mode 100644 i915/glk_huc_ver03_01_2893.bin create mode 100644 i915/kbl_guc_ver13_125.bin create mode 100644 i915/kbl_huc_ver03_01_2893.bin create mode 100644 i915/skl_guc_ver13_125.bin create mode 100644 i915/skl_huc_ver01_8_2893.bin Anusha Srivatsa (7): drm/i915/huc: Update HuC for SKL drm/i915/huc: Update HuC for KBL drm/i915/huc: Load HuC for GLK drm/i915/guc: Update GuC for SKL drm/i915/guc: Update GuC for BXT drm/i915/guc: Update GuC for KBL drm/i915/guc: Load GuC v13.125 for Geminilake. Michal Wajdeczko (1): HAX Enable HuC testing without GuC submission drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/intel_guc_fw.c | 22 -- drivers/gpu/drm/i915/intel_huc_fw.c | 22 +- drivers/gpu/drm/i915/intel_uc.c | 3 +++ 4 files changed, 37 insertions(+), 12 deletions(-) -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 7/8] drm/i915/guc: Load GuC v13.125 for Geminilake.
From: Anusha Srivatsa
Load the v13.125 guC on Geminilake.
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/intel_guc_fw.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index c222bf858ffe..0d18fcde5d67 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -39,6 +39,9 @@
#define KBL_FW_MAJOR 13
#define KBL_FW_MINOR 125
+#define GLK_FW_MAJOR 13
+#define GLK_FW_MINOR 125
+
#define GUC_FW_PATH(platform, major, minor) \
"i915/" __stringify(platform) "_guc_ver" __stringify(major) "_"
__stringify(minor) ".bin"
@@ -51,6 +54,9 @@ MODULE_FIRMWARE(I915_BXT_GUC_UCODE);
#define I915_KBL_GUC_UCODE GUC_FW_PATH(kbl, KBL_FW_MAJOR, KBL_FW_MINOR)
MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
+#define I915_GLK_GUC_UCODE GUC_FW_PATH(glk, GLK_FW_MAJOR, GLK_FW_MINOR)
+MODULE_FIRMWARE(I915_GLK_GUC_UCODE);
+
static void guc_fw_select(struct intel_uc_fw *guc_fw)
{
struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
@@ -77,6 +83,10 @@ static void guc_fw_select(struct intel_uc_fw *guc_fw)
guc_fw->path = I915_KBL_GUC_UCODE;
guc_fw->major_ver_wanted = KBL_FW_MAJOR;
guc_fw->minor_ver_wanted = KBL_FW_MINOR;
+ } else if (IS_GEMINILAKE(dev_priv)) {
+ guc_fw->path = I915_GLK_GUC_UCODE;
+ guc_fw->major_ver_wanted = GLK_FW_MAJOR;
+ guc_fw->minor_ver_wanted = GLK_FW_MINOR;
} else {
dev_info(dev_priv->drm.dev,
"%s: No firmware known for this platform!\n",
--
2.19.2
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[Intel-gfx] [PATCH 6/8] drm/i915/guc: Update GuC for KBL
From: Anusha Srivatsa We have an update of GuC for KBL. Load the latest version. Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index 6e6163d3e388..c222bf858ffe 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -36,8 +36,8 @@ #define BXT_FW_MAJOR 13 #define BXT_FW_MINOR 125 -#define KBL_FW_MAJOR 9 -#define KBL_FW_MINOR 39 +#define KBL_FW_MAJOR 13 +#define KBL_FW_MINOR 125 #define GUC_FW_PATH(platform, major, minor) \ "i915/" __stringify(platform) "_guc_ver" __stringify(major) "_" __stringify(minor) ".bin" -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5)
== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5) URL : https://patchwork.freedesktop.org/series/54127/ State : success == Summary == CI Bug Log - changes from CI_DRM_5339_full -> Patchwork_11149_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11149_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11149_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11149_full: ### IGT changes ### Warnings * igt@pm_rc6_residency@rc6-accuracy: - shard-snb: PASS -> SKIP Known issues Here are the changes found in Patchwork_11149_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-bsd: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_ccs@pipe-a-missing-ccs-buffer: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +13 * igt@kms_cursor_crc@cursor-256x256-random: - shard-apl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x85-onscreen: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions: - shard-iclb: PASS -> FAIL [fdo#103355] * igt@kms_draw_crc@draw-method-xrgb-render-ytiled: - shard-iclb: PASS -> WARN [fdo#108336] * igt@kms_fbcon_fbt@fbc: - shard-iclb: PASS -> DMESG-FAIL [fdo#105681] / [fdo#107724] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: PASS -> FAIL [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +6 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: - shard-glk: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-skl: NOTRUN -> FAIL [fdo#105683] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-iclb: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +5 * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-apl: PASS -> FAIL [fdo#108948] * igt@kms_plane@pixel-format-pipe-c-planes: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-a-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_setmode@basic: - shard-hsw: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-skl: NOTRUN -> FAIL [fdo#100047] * igt@pm_backlight@fade_with_suspend: - shard-skl: NOTRUN -> FAIL [fdo#107847] * igt@pm_rpm@dpms-mode-unset-non-lpsp: - shard-skl: SKIP -> INCOMPLETE [fdo#107807] * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] Possible fixes * igt@kms_atomic_transition@plane-all-transition-fencing: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS * igt@kms_color@pipe-a-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-128x128-offscreen: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-apl: FAIL [fdo#103232] -> PASS +3 * igt@kms_cursor_crc@cursor-64x21-random: - shard-glk: FAIL [fdo#103232] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt: - shard-kbl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +25 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite: -
[Intel-gfx] ✓ Fi.CI.IGT: success for skl+ watermark stuff
== Series Details ==
Series: skl+ watermark stuff
URL : https://patchwork.freedesktop.org/series/54424/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5339_full -> Patchwork_11148_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_11148_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_schedule@pi-ringfull-bsd:
- shard-skl: NOTRUN -> FAIL [fdo#103158]
* igt@gem_exec_whisper@normal:
- shard-skl: PASS -> TIMEOUT [fdo#108592]
* igt@gem_softpin@noreloc-s3:
- shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773]
* igt@i915_selftest@live_workarounds:
- shard-iclb: PASS -> DMESG-FAIL [fdo#108954]
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] +8
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-skl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
- shard-glk: PASS -> FAIL [fdo#108145]
* igt@kms_chv_cursor_fail@pipe-b-256x256-right-edge:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +5
* igt@kms_color@pipe-b-ctm-green-to-red:
- shard-skl: PASS -> FAIL [fdo#107201]
* igt@kms_cursor_crc@cursor-128x42-onscreen:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-skl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions:
- shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +23
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
- shard-iclb: PASS -> WARN [fdo#108336] +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-apl: PASS -> FAIL [fdo#103167] +2
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-skl: PASS -> FAIL [fdo#103167]
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
- shard-glk: PASS -> FAIL [fdo#103167] +3
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: PASS -> FAIL [fdo#105683] / [fdo#108040]
- shard-skl: NOTRUN -> FAIL [fdo#105683]
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
- shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +2
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane@plane-panning-bottom-right-pipe-a-planes:
- shard-skl: PASS -> FAIL [fdo#103166]
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-iclb: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724]
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: PASS -> FAIL [fdo#107815]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
- shard-apl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-kbl: PASS -> DMESG-FAIL [fdo#108950]
* igt@kms_setmode@basic:
- shard-hsw: PASS -> FAIL [fdo#99912]
* igt@kms_sysfs_edid_timing:
- shard-skl: NOTRUN -> FAIL [fdo#100047]
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-hsw: PASS -> FAIL [fdo#104894]
* igt@pm_backlight@fade_with_suspend:
- shard-skl: NOTRUN -> FAIL [fdo#107847]
* igt@pm_rpm@basic-rte:
- shard-skl: PASS -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@gem-execbuf-stress-pc8:
- shard-skl: SKIP -> INCOMPLETE [fdo#107807]
* igt@pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-iclb: SKIP -> INCOMPLETE [fdo#108840]
* igt@pm_rpm@universal-planes:
- shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108654] /
[fdo#108756]
* {igt@runner@aborted}:
- shard-iclb: NOTRUN -> ( 2 FAIL ) [fdo#108654] / [fdo#108756] /
[fdo#108866]
Possible fixes
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-snb: DMESG-WARN [fdo#107956] -> PASS
- shard-glk: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_color@pipe-a-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-128x128-onscreen:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- shard-skl: FAIL [fdo#103167] -> PASS +1
*
[Intel-gfx] ✓ Fi.CI.IGT: success for Move pm_runtime accounted time to raw nsec
== Series Details == Series: Move pm_runtime accounted time to raw nsec URL : https://patchwork.freedesktop.org/series/54404/ State : success == Summary == CI Bug Log - changes from CI_DRM_5337_full -> Patchwork_11144_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11144_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11144_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11144_full: ### IGT changes ### Warnings * igt@pm_rc6_residency@rc6-accuracy: - shard-snb: SKIP -> PASS Known issues Here are the changes found in Patchwork_11144_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-vebox: - shard-iclb: NOTRUN -> FAIL [fdo#103158] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_ccs@pipe-a-missing-ccs-buffer: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +15 * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-skl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-64x64-offscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-xtiled: - shard-iclb: PASS -> WARN [fdo#108336] +2 * igt@kms_draw_crc@draw-method-xrgb-pwrite-ytiled: - shard-iclb: NOTRUN -> WARN [fdo#108336] * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#107882] * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: PASS -> FAIL [fdo#105363] +1 * igt@kms_flip@plain-flip-fb-recreate: - shard-skl: PASS -> FAIL [fdo#100368] * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-gtt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +5 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-skl: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc: - shard-skl: PASS -> FAIL [fdo#103167] / [fdo#105682] * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724] +1 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +9 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-fullscreen: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] / [fdo#108336] +3 * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-apl: PASS -> FAIL [fdo#103166] +3 - shard-iclb: PASS -> FAIL [fdo#103166] +3 * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-glk: PASS -> FAIL [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +1 * igt@kms_setmode@basic: - shard-apl: PASS -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@perf_pmu@event-wait-rcs0: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +23 * igt@pm_rpm@basic-rte: - shard-skl: PASS -> INCOMPLETE [fdo#107807] Possible fixes * igt@gem_exec_fence@basic-busy-default: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@gem_exec_whisper@normal: - shard-skl: TIMEOUT [fdo#108592] -> PASS * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: FAIL [fdo#103232] -> PASS * igt@kms_flip_tiling@flip-to-x-tiled: - shard-iclb: FAIL [fdo#108134] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-apl: FAIL [fdo#103167]
Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: DDI: call intel_psr_ and _edp_drrs_enable() on pipe updates (v2)
On Thu, 2018-12-20 at 15:13 -0800, Dhinakaran Pandiyan wrote:
> On Thu, 2018-12-20 at 09:10 -0800, Rodrigo Vivi wrote:
> > On Thu, Dec 20, 2018 at 02:21:20PM +0100, Hans de Goede wrote:
> > > Call intel_psr_enable() and intel_edp_drrs_enable() on pipe
> > > updates
> > > to make
> > > sure that we enable PSR / DRRS (when applicable) on fastsets.
>
> I am probably missing something, doesn't intel_pipe_config_compare()
> need to check for pipe_config->has_psr? And also read the hardware
> PSR
> state at boot?
Answering my own question here, pipe_config_compare() returns true
lacking a comparison for ->has_psr. And we assume the bios does not
enable PSR, so no need to read the hardware state.
> > >
> > > Note calling these functions when PSR / DRRS has already been
> > > enabled is a
> > > no-op, so it is safe to do this on every encoder->update_pipe
> > > callback.
> > >
> > > Changes in v2:
> > > -Merge the patches adding the intel_psr_enable() and
> > > intel_edp_drrs_enable()
> > > calls into a single patch
> > >
> > > Reviewed-by: Maarten Lankhorst > > >
> > > Signed-off-by: Hans de Goede
> >
> > Cc: Dhinakaran Pandiyan
> > Cc: José Roberto de Souza
> >
> > Acked-by: Rodrigo Vivi
> >
> > > ---
> > > drivers/gpu/drm/i915/intel_ddi.c | 19 +++
> > > 1 file changed, 19 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > index e3cc19e19199..fdf57f451b72 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -3537,6 +3537,24 @@ static void intel_disable_ddi(struct
> > > intel_encoder *encoder,
> > > intel_disable_ddi_dp(encoder, old_crtc_state,
> > > old_conn_state);
> > > }
> > >
> > > +static void intel_ddi_update_pipe_dp(struct intel_encoder
> > > *encoder,
> > > + const struct intel_crtc_state
> > > *crtc_state,
> > > + const struct drm_connector_state
> > > *conn_state)
> > > +{
> > > + struct intel_dp *intel_dp = enc_to_intel_dp(>base);
> > > +
> > > + intel_psr_enable(intel_dp, crtc_state);
> > > + intel_edp_drrs_enable(intel_dp, crtc_state);
> > > +}
> > > +
> > > +static void intel_ddi_update_pipe(struct intel_encoder *encoder,
> > > + const struct intel_crtc_state
> > > *crtc_state,
> > > + const struct drm_connector_state
> > > *conn_state)
> > > +{
> > > + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
>
> We could restrict this to eDP outputs as both PSR and DRRS are eDP
> features.
>
> > > + intel_ddi_update_pipe_dp(encoder, crtc_state,
> > > conn_state);
> > > +}
> > > +
> > > static void intel_ddi_set_fia_lane_count(struct intel_encoder
> > > *encoder,
> > >const struct intel_crtc_state
> > > *pipe_config,
> > >enum port port)
> > > @@ -4169,6 +4187,7 @@ void intel_ddi_init(struct drm_i915_private
> > > *dev_priv, enum port port)
> > > intel_encoder->pre_enable = intel_ddi_pre_enable;
> > > intel_encoder->disable = intel_disable_ddi;
> > > intel_encoder->post_disable = intel_ddi_post_disable;
> > > + intel_encoder->update_pipe = intel_ddi_update_pipe;
> > > intel_encoder->get_hw_state = intel_ddi_get_hw_state;
> > > intel_encoder->get_config = intel_ddi_get_config;
> > > intel_encoder->suspend = intel_ddi_encoder_suspend;
> > > --
> > > 2.20.1
> > >
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/psr: simplify enable_psr handling
On Fri, 2018-12-21 at 10:23 -0700, Ross Zwisler wrote:
> The following commit:
>
> commit 2bdd045e3a30 ("drm/i915/psr: Check if VBT says PSR can be
> enabled.")
>
> added some code with no usable functionality. Regardless of how the
> psr
> default is set up in the BDB_DRIVER_FEATURES section, if the
> enable_psr
> module parameter isn't specified it defaults to 0.
Right, that was intentional and the commit message even makes a note of
it
" Note: The feature currently remains disabled by default for all
platforms irrespective of what VBT says."
Anyway, we've enabled the feature by default now and the current code
should take into account the VBT flag if the module parameter is left
to a default value. Please check git://anongit.freedesktop.org/drm-tip
drm-tip.
-DK
>
> Remove this dead code, simplify the way that enable_psr is handled
> and
> update the module parameter string to match the actual functionality.
>
> Cc: Dhinakaran Pandiyan
> Cc: Rodrigo Vivi
> Signed-off-by: Ross Zwisler
> ---
> drivers/gpu/drm/i915/i915_drv.h| 1 -
> drivers/gpu/drm/i915/i915_params.c | 4 +---
> drivers/gpu/drm/i915/i915_params.h | 2 +-
> drivers/gpu/drm/i915/intel_bios.c | 1 -
> drivers/gpu/drm/i915/intel_psr.c | 7 ---
> 5 files changed, 2 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 872a2e159a5f9..b4c50ba0b22a6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1115,7 +1115,6 @@ struct intel_vbt_data {
> } edp;
>
> struct {
> - bool enable;
> bool full_link;
> bool require_aux_wakeup;
> int idle_frames;
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 295e981e4a398..80ce8758c3c69 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -87,9 +87,7 @@ i915_param_named_unsafe(enable_ppgtt, int, 0400,
> "(-1=auto [default], 0=disabled, 1=aliasing, 2=full, 3=full
> with extended address space)");
>
> i915_param_named_unsafe(enable_psr, int, 0600,
> - "Enable PSR "
> - "(0=disabled, 1=enabled) "
> - "Default: -1 (use per-chip default)");
> + "Enable PSR (default: false)");
>
> i915_param_named_unsafe(alpha_support, bool, 0400,
> "Enable alpha quality driver support for latest hardware. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 6c4d4a21474b5..144572f17a83d 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -42,7 +42,7 @@ struct drm_printer;
> param(int, enable_dc, -1) \
> param(int, enable_fbc, -1) \
> param(int, enable_ppgtt, -1) \
> - param(int, enable_psr, -1) \
> + param(int, enable_psr, 0) \
> param(int, disable_power_well, -1) \
> param(int, enable_ips, 1) \
> param(int, invert_brightness, 0) \
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 1faa494e2bc91..d676d483d5cf1 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -551,7 +551,6 @@ parse_driver_features(struct drm_i915_private
> *dev_priv,
>*/
> if (!driver->drrs_enabled)
> dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
> - dev_priv->vbt.psr.enable = driver->psr_enabled;
> }
>
> static void
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index b6838b525502e..26e7eb318cf07 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -1065,13 +1065,6 @@ void intel_psr_init(struct drm_i915_private
> *dev_priv)
> if (!dev_priv->psr.sink_support)
> return;
>
> - if (i915_modparams.enable_psr == -1) {
> - i915_modparams.enable_psr = dev_priv->vbt.psr.enable;
> -
> - /* Per platform default: all disabled. */
> - i915_modparams.enable_psr = 0;
> - }
> -
> /* Set link_standby x link_off defaults */
> if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> /* HSW and BDW require workarounds that we don't
> implement. */
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5)
== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5) URL : https://patchwork.freedesktop.org/series/54127/ State : success == Summary == CI Bug Log - changes from CI_DRM_5339 -> Patchwork_11149 Summary --- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/54127/revisions/5/mbox/ Known issues Here are the changes found in Patchwork_11149 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_execlists: - fi-apl-guc: PASS -> INCOMPLETE [fdo#103927] / [fdo#108622] * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: PASS -> DMESG-FAIL [fdo#102614] Possible fixes * igt@gem_ctx_create@basic-files: - fi-bsw-kefka: INCOMPLETE [fdo#105876] / [fdo#108714] -> PASS * igt@kms_pipe_crc_basic@read-crc-pipe-a: - fi-byt-clapper: FAIL [fdo#107362] -> PASS * igt@vgem_basic@mmap: - fi-snb-2520m: DMESG-WARN -> PASS Warnings * igt@i915_selftest@live_contexts: - fi-icl-u2: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569] [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876 [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362 [fdo#108315]: https://bugs.freedesktop.org/show_bug.cgi?id=108315 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622 [fdo#108714]: https://bugs.freedesktop.org/show_bug.cgi?id=108714 Participating hosts (49 -> 43) -- Missing(6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 Build changes - * Linux: CI_DRM_5339 -> Patchwork_11149 CI_DRM_5339: c6cfab3d1c61d968f483554fc063faf1ee1063fa @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4753: 0bc683ea2dcf270b5287ffb4a6510fdff44e9390 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_11149: 210c1379c231fbf1081e68b3590bd3340ed1d96e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 210c1379c231 drm/i915: Re-enable fastset by default d4199ef639ca drm/i915: Make HW readout mark CRTC scaler as in use. 5aa6c7598564 drm/i915: Enable fastset for non-boot modesets. 16a369e8ed29 drm/i915/backlight: Restore backlight on resume, v2. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11149/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5)
== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev5) URL : https://patchwork.freedesktop.org/series/54127/ State : warning == Summary == $ dim checkpatch origin/drm-tip 16a369e8ed29 drm/i915/backlight: Restore backlight on resume, v2. 5aa6c7598564 drm/i915: Enable fastset for non-boot modesets. -:37: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #37: FILE: drivers/gpu/drm/i915/intel_display.c:12683: + if (intel_pipe_config_compare(dev_priv, to_intel_crtc_state(old_crtc_state), total: 0 errors, 0 warnings, 1 checks, 20 lines checked d4199ef639ca drm/i915: Make HW readout mark CRTC scaler as in use. 210c1379c231 drm/i915: Re-enable fastset by default ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v9 10/39] drm/i915: Implement HDCP2.2 receiver authentication
On Thu, Dec 20, 2018 at 03:55:27PM +0100, Daniel Vetter wrote:
> On Thu, Dec 20, 2018 at 02:28:55PM +, Winkler, Tomas wrote:
> >
> >
> > > On Wed, 19 Dec 2018, "Winkler, Tomas" wrote:
> > > >>
> > > >> On Wed, 19 Dec 2018, "C, Ramalingam" wrote:
> > > >> > On 12/19/2018 8:05 PM, Daniel Vetter wrote:
> > > >> >> On Thu, Dec 13, 2018 at 09:31:12AM +0530, Ramalingam C wrote:
> > > >> >>> struct intel_hdcp {
> > > >> >>> @@ -414,6 +430,24 @@ struct intel_hdcp {
> > > >> >>> */
> > > >> >>>u8 content_type;
> > > >> >>>struct hdcp_port_data port_data;
> > > >> >>> +
> > > >> >>> + u8 is_paired;
> > > >> >>> + u8 is_repeater;
> > > >> >> Make these two bool, will simplify the code a bunch.
> > > >> >
> > > >> > Seems there is a movement for not to use the bool in structures.
> > > >>
> > > >> No. Please use bools in structs when it makes sense. Avoid bools in
> > > >> structs when you need to care about memory footprint or alignment or
> > > >> packing or the like. This is not one of those cases.
> > > >>
> > > >> > Thats why I have changed these from bool to u8 from v8 onwards.
> > > >> > Checkpatch also complains on this
> > > >>
> > > >> Sorry to say, checkpatch is not the authority although we do send out
> > > >> automated checkpatch results.
> > > >
> > > > I believe it was Linus' call to not use bool in structs at all
> > > > https://lkml.org/lkml/2017/11/21/384
> > >
> > > I don't care. That's a valid judgement in the context referenced, but the
> > > conclusion "no bools in structs at all" isn't. In this case, I think
> > > bools are the
> > > better option, and anything else makes the code worse.
> >
> > The solution was to use bit fields,
> > unsinged int is_paired:1;
> > unsinged int is_repeter:1
>
> This doesn't work with READ_ONCE/WRITE_ONCE, and it generates terrible
> assembly (at least gcc is well known for struggling with these, compared
> to open-coded bitops). So depending upon what you want to do, and where
> youre space/performance tradeoff lies, doing this unconditionally is just
> wrong.
Another annoying downside with non-bool bitfields:
unsigned int foo:1;
foo = 2;
-> foo == 0
So you'll need to remmber to convert everything to
0/1 before the assignment.
--
Ville Syrjälä
Intel
___
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Re: [Intel-gfx] [PATCH v7 3/4] drm/i915/icl: Define MOCS table for Icelake
On 2018-12-21 13:29, Tvrtko Ursulin wrote:
On 14/12/2018 18:20, Lucas De Marchi wrote:
From: Tomasz Lis
The table has been unified across OSes to minimize virtualization
overhead.
The MOCS table is now published as part of bspec, and versioned. Entries
are supposed to never be modified, but new ones can be added. Adding
entries increases table version. The patch includes version 1 entries.
Meaning of each entry is now explained in bspec, and user mode clients
are expected to know what each entry means. The 3 entries used for
previous
platforms are still compatible with their legacy definitions, but
that is
not guaranteed to be true for future platforms.
v2: Fixed SCC values, improved commit comment (Daniele)
v3: Improved MOCS table comment (Daniele)
v4: Moved new entries below gen9 ones. Put common entries into
definition to be used in multiple arrays. (Lucas)
v5: Made defines for or-ing flags. Renamed macros from MOCS_TABLE
to MOCS_ENTRIES. Switched LE_CoS to upper case. (Joonas)
v6: Removed definitions of reserved entries. (Michal)
Increased limit of entries sent to the hardware on gen11+.
v7: Simplify table as done for previou gens (Lucas)
BSpec: 34007
BSpec: 560
Signed-off-by: Tomasz Lis
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 187 ++
1 file changed, 162 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drivers/gpu/drm/i915/intel_mocs.c
index 577633cefb8a..dfc4edea020f 100644
--- a/drivers/gpu/drm/i915/intel_mocs.c
+++ b/drivers/gpu/drm/i915/intel_mocs.c
@@ -44,6 +44,8 @@ struct drm_i915_mocs_table {
#define LE_SCC(value) ((value) << 8)
#define LE_PFM(value) ((value) << 11)
#define LE_SCF(value) ((value) << 14)
+#define LE_COS(value) ((value) << 15)
+#define LE_SSE(value) ((value) << 17)
/* Defines for the tables (LNCFMOCS0 - LNCFMOCS31) - two entries
per word */
#define L3_ESC(value) ((value) << 0)
@@ -52,6 +54,10 @@ struct drm_i915_mocs_table {
/* Helper defines */
#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are
reserved. */
+#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but
configured. */
+
+#define NUM_MOCS_ENTRIES(i915) \
+ (INTEL_GEN(i915) < 11 ? GEN9_NUM_MOCS_ENTRIES :
GEN11_NUM_MOCS_ENTRIES)
/* (e)LLC caching options */
#define LE_0_PAGETABLE _LE_CACHEABILITY(0)
@@ -80,21 +86,21 @@ struct drm_i915_mocs_table {
* LNCFCMOCS0 - LNCFCMOCS32 registers.
*
* These tables are intended to be kept reasonably consistent across
- * platforms. However some of the fields are not applicable to all of
- * them.
+ * HW platforms, and for ICL+, be identical across OSes. To achieve
+ * that, for Icelake and above, list of entries is published as part
+ * of bspec.
*
* Entries not part of the following tables are undefined as far as
- * userspace is concerned and shouldn't be relied upon. For the time
- * being they will be implicitly initialized to the strictest caching
- * configuration (uncached) to guarantee forwards compatibility with
- * userspace programs written against more recent kernels providing
- * additional MOCS entries.
+ * userspace is concerned and shouldn't be relied upon.
+ *
+ * The last two entries are reserved by the hardware. For ICL+ they
+ * should be initialized according to bspec and never used, for older
+ * platforms they should never be written to.
*
- * NOTE: These tables MUST start with being uncached and the length
- * MUST be less than 63 as the last two registers are reserved
- * by the hardware. These tables are part of the kernel ABI and
- * may only be updated incrementally by adding entries at the
- * end.
+ * NOTE: These tables are part of bspec and defined as part of hardware
+ * interface for ICL+. For older platforms, they are part of
kernel
+ * ABI. It is expected that existing entries will remain constant
+ * and the tables will only be updated by adding new entries.
*/
#define GEN9_MOCS_ENTRIES \
@@ -132,6 +138,132 @@ static const struct drm_i915_mocs_entry
broxton_mocs_table[] = {
},
};
+#define GEN11_MOCS_ENTRIES \
+ [0] = { \
+ /* Base - Uncached (Deprecated) */ \
+ .control_value = LE_1_UC | LE_TC_1_LLC, \
+ .l3cc_value = L3_1_UC \
+ }, \
+ [1] = { \
+ /* Base - L3 + LeCC:PAT (Deprecated) */ \
+ .control_value = LE_0_PAGETABLE | LE_TC_1_LLC, \
+ .l3cc_value = L3_3_WB \
+ }, \
+ [2] = { \
+ /* Base - L3 + LLC */ \
+ .control_value = LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
+ .l3cc_value = L3_3_WB \
+ }, \
+ [3] = { \
+ /* Base - Uncached */ \
+ .control_value = LE_1_UC | LE_TC_1_LLC, \
+ .l3cc_value = L3_1_UC \
+ }, \
+ [4] = { \
+ /* Base - L3 */ \
+
[Intel-gfx] ✓ Fi.CI.BAT: success for skl+ watermark stuff
== Series Details ==
Series: skl+ watermark stuff
URL : https://patchwork.freedesktop.org/series/54424/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5339 -> Patchwork_11148
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54424/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_11148 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_contexts:
- fi-kbl-7560u: PASS -> INCOMPLETE [fdo#108767]
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-byt-clapper: PASS -> INCOMPLETE [fdo#102657]
* {igt@runner@aborted}:
- fi-icl-u3: NOTRUN -> FAIL [fdo#108315]
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-bsw-kefka: INCOMPLETE [fdo#105876] / [fdo#108714] -> PASS
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#107362] -> PASS
* igt@vgem_basic@mmap:
- fi-snb-2520m: DMESG-WARN -> PASS
Warnings
* igt@i915_selftest@live_contexts:
- fi-icl-u3: DMESG-FAIL [fdo#108569] -> INCOMPLETE [fdo#108315]
- fi-icl-u2: INCOMPLETE [fdo#108315] -> DMESG-FAIL [fdo#108569]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105876]: https://bugs.freedesktop.org/show_bug.cgi?id=105876
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108315]: https://bugs.freedesktop.org/show_bug.cgi?id=108315
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108714]: https://bugs.freedesktop.org/show_bug.cgi?id=108714
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
Participating hosts (49 -> 42)
--
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-icl-y
Build changes
-
* Linux: CI_DRM_5339 -> Patchwork_11148
CI_DRM_5339: c6cfab3d1c61d968f483554fc063faf1ee1063fa @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4753: 0bc683ea2dcf270b5287ffb4a6510fdff44e9390 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11148: 701f01d8eb8da344f1afcfbe9646b53db89500e1 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
701f01d8eb8d drm/i915: Use IS_GEN9_LP() for the linetime w/a check
aefcbb0f9265 drm/i915: Drop the pointless linetime==0 check
09afa37b1405 drm/i915: Drop the definite article in front of SAGV
fee0ba572c40 drm/i915: Pass dev_priv to skl_needs_memory_bw_wa()
9a6e49f3b92f drm/i915: Account for minimum ddb allocation restrictions
c32a52ac83dc drm/i915: Fix > vs >= mismatch in watermark/ddb calculations
8b4572b9954d drm/i915: Fix bits vs. bytes mixup in dbuf block size computation
b47f650fffe7 drm/i915: Reinstate an early latency==0 check for skl+
367c59fbd99a drm/i915: Don't ignore level 0 lines watermark for glk+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11148/
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for Add support for Gen 11 pipe color features (rev4)
== Series Details == Series: Add support for Gen 11 pipe color features (rev4) URL : https://patchwork.freedesktop.org/series/51408/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5337_full -> Patchwork_11143_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11143_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11143_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11143_full: ### IGT changes ### Possible regressions * igt@kms_color@pipe-b-gamma: - shard-iclb: SKIP -> FAIL +8 Warnings * igt@kms_color@pipe-b-ctm-green-to-red: - shard-iclb: SKIP -> PASS +16 Known issues Here are the changes found in Patchwork_11143_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-vebox: - shard-iclb: NOTRUN -> FAIL [fdo#103158] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@gem_softpin@noreloc-s3: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_busy@extended-modeset-hang-newfb-render-a: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-render-b: - shard-skl: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-a: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +32 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-hsw: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_color@pipe-c-ctm-red-to-blue: - shard-iclb: SKIP -> DMESG-WARN [fdo#107724] / [fdo#108336] +1 * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-xtiled: - shard-iclb: PASS -> WARN [fdo#108336] +1 * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: PASS -> FAIL [fdo#105363] * igt@kms_flip@plain-flip-fb-recreate: - shard-skl: PASS -> FAIL [fdo#100368] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +21 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#103167] +1 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +17 * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_scaling@pipe-a-scaler-with-rotation: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] * igt@kms_setmode@basic: - shard-apl: PASS -> FAIL [fdo#99912] - shard-kbl: PASS -> FAIL [fdo#99912] * igt@pm_backlight@fade_with_dpms: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#107820] Possible fixes * igt@gem_exec_whisper@normal: - shard-skl: TIMEOUT [fdo#108592] -> PASS * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@kms_chv_cursor_fail@pipe-c-64x64-right-edge: - shard-skl: FAIL [fdo#104671] -> PASS +2 * igt@kms_color@pipe-c-ctm-max: - shard-apl: FAIL [fdo#108147] -> PASS * igt@kms_cursor_crc@cursor-256x256-random: - shard-iclb: FAIL [fdo#103232] -> PASS +15 * igt@kms_cursor_crc@cursor-256x85-random: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_flip_tiling@flip-to-x-tiled: - shard-iclb: FAIL [fdo#108134] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: FAIL [fdo#103167] -> PASS +2 * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite: - shard-glk: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-farfromfence: - shard-kbl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +21 *
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for skl+ watermark stuff
== Series Details == Series: skl+ watermark stuff URL : https://patchwork.freedesktop.org/series/54424/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Don't ignore level 0 lines watermark for glk+ Okay! Commit: drm/i915: Reinstate an early latency==0 check for skl+ Okay! Commit: drm/i915: Fix bits vs. bytes mixup in dbuf block size computation Okay! Commit: drm/i915: Fix > vs >= mismatch in watermark/ddb calculations -O:drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) Commit: drm/i915: Account for minimum ddb allocation restrictions -O:drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) -O:drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_pm.c:4892:30: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_pm.c:4892:30: warning: expression using sizeof(void) -drivers/gpu/drm/i915/intel_pm.c:6670:24: warning: too many warnings +drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4413:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4424:25: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4805:33: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4805:33: warning: expression using sizeof(void) +drivers/gpu/drm/i915/intel_pm.c:4892:30: warning: too many warnings -drivers/gpu/drm/i915/selftests/../i915_drv.h:3550:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3551:16: warning: expression using sizeof(void) Commit: drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() Okay! Commit: drm/i915: Drop the definite article in front of SAGV Okay! Commit: drm/i915: Drop the pointless linetime==0 check Okay! Commit: drm/i915: Use IS_GEN9_LP() for the linetime w/a check Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/9] drm/i915: Drop the definite article in front of SAGV
On Fri, Dec 21, 2018 at 07:14:34PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The spec doesn't use a definite article in front of SAGV. The
> rules regarding articles and initialisms are super fuzzy, but
> at least to my ears it sounds much more natural to not have
> the article. Perhaps because I tend to pronounce it as
> "sag-vee" instead of spelling out the letters one at a time.
> Actually I might still prefer to leave out the article if I
> did spell them out.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/intel_pm.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 40cb18c61e11..0843990ebf9f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3667,25 +3667,25 @@ intel_enable_sagv(struct drm_i915_private *dev_priv)
> if (dev_priv->sagv_status == I915_SAGV_ENABLED)
> return 0;
>
> - DRM_DEBUG_KMS("Enabling the SAGV\n");
> + DRM_DEBUG_KMS("Enabling SAGV\n");
> mutex_lock(_priv->pcu_lock);
>
> ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
> GEN9_SAGV_ENABLE);
>
> - /* We don't need to wait for the SAGV when enabling */
> + /* We don't need to wait for SAGV when enabling */
> mutex_unlock(_priv->pcu_lock);
>
> /*
>* Some skl systems, pre-release machines in particular,
> - * don't actually have an SAGV.
> + * don't actually have SAGV.
>*/
> if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
> DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
> dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
> return 0;
> } else if (ret < 0) {
> - DRM_ERROR("Failed to enable the SAGV\n");
> + DRM_ERROR("Failed to enable SAGV\n");
> return ret;
> }
>
> @@ -3704,7 +3704,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
> if (dev_priv->sagv_status == I915_SAGV_DISABLED)
> return 0;
>
> - DRM_DEBUG_KMS("Disabling the SAGV\n");
> + DRM_DEBUG_KMS("Disabling SAGV\n");
> mutex_lock(_priv->pcu_lock);
>
> /* bspec says to keep retrying for at least 1 ms */
> @@ -3716,14 +3716,14 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
>
> /*
>* Some skl systems, pre-release machines in particular,
> - * don't actually have an SAGV.
> + * don't actually have SAGV.
>*/
> if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
> DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
> dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
> return 0;
> } else if (ret < 0) {
> - DRM_ERROR("Failed to disable the SAGV (%d)\n", ret);
> + DRM_ERROR("Failed to disable SAGV (%d)\n", ret);
> return ret;
> }
>
> @@ -3754,7 +3754,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state
> *state)
> sagv_block_time_us = 10;
>
> /*
> - * SKL+ workaround: bspec recommends we disable the SAGV when we have
> + * SKL+ workaround: bspec recommends we disable SAGV when we have
>* more then one pipe enabled
>*
>* If there are no active CRTCs, no additional checks need be performed
> @@ -3795,7 +3795,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state
> *state)
> /*
>* If any of the planes on this pipe don't enable wm levels that
>* incur memory latencies higher than sagv_block_time_us we
> - * can't enable the SAGV.
> + * can't enable SAGV.
>*/
> if (latency < sagv_block_time_us)
> return false;
> --
> 2.19.2
>
> ___
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___
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Re: [Intel-gfx] [PATCH 9/9] drm/i915: Use IS_GEN9_LP() for the linetime w/a check
On Fri, Dec 21, 2018 at 07:14:36PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > IS_GLK||IS_BXT == IS_GEN9_LP > > Signed-off-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi (I wont be able to review the entire series, just quickly glancing the obvious ones before going out on vacation) > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 3c351a21a0fa..b5e8ac51ef1c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4827,9 +4827,8 @@ skl_compute_linetime_wm(const struct intel_crtc_state > *cstate) > linetime_us = intel_get_linetime_us(cstate); > linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); > > - /* Display WA #1135: bxt:ALL GLK:ALL */ > - if ((IS_BROXTON(dev_priv) || IS_GEMINILAKE(dev_priv)) && > - dev_priv->ipc_enabled) > + /* Display WA #1135: BXT:ALL GLK:ALL */ > + if (IS_GEN9_LP(dev_priv) && dev_priv->ipc_enabled) > linetime_wm /= 2; > > return linetime_wm; > -- > 2.19.2 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [v4 2/4] drm/i915/icl: Add icl pipe degamma and gamma support
On Fri, Dec 21, 2018 at 01:29:39AM +0530, Uma Shankar wrote:
> Add support for icl pipe degamma and gamma.
>
> v2: Removed a POSTING_READ and corrected the Bit
> Definition as per Maarten's comments.
>
> v3: Addressed Matt's review comments. Removed rmw patterns
> as suggested by Matt.
>
> v4: Fixed Matt's review comments.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/i915_reg.h| 3 ++
> drivers/gpu/drm/i915/intel_color.c | 67
> ++
> 2 files changed, 70 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 02af9b5..1852c33 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7092,6 +7092,9 @@ enum {
> #define GAMMA_MODE_MODE_12BIT(2 << 0)
> #define GAMMA_MODE_MODE_SPLIT(3 << 0)
>
> +#define PRE_CSC_GAMMA_ENABLE(1 << 31)
> +#define POST_CSC_GAMMA_ENABLE (1 << 30)
> +
> /* DMC/CSR */
> #define CSR_PROGRAM(i) _MMIO(0x8 + (i) * 4)
> #define CSR_SSP_BASE_ADDR_GEN9 0x2FC0
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index f32e4a7..e72d8d6 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -534,6 +534,71 @@ static void glk_load_luts(struct intel_crtc_state
> *crtc_state)
> POSTING_READ(GAMMA_MODE(pipe));
> }
>
> +static void icl_load_degamma_lut(struct intel_crtc_state *crtc_state)
> +{
> + struct drm_device *dev = crtc_state->base.crtc->dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
> + const uint32_t lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
> + uint32_t i;
> +
> + /*
> + * When setting the auto-increment bit, the hardware seems to
> + * ignore the index bits, so we need to reset it to index 0
> + * separately.
> + */
> + I915_WRITE(PRE_CSC_GAMC_INDEX(pipe), 0);
> + I915_WRITE(PRE_CSC_GAMC_INDEX(pipe), PRE_CSC_GAMC_AUTO_INCREMENT);
> +
> + if (crtc_state->base.degamma_lut) {
> + struct drm_color_lut *lut = crtc_state->base.degamma_lut->data;
> +
> + for (i = 0; i < lut_size; i++) {
> + /*
> + * First 33 entries represent range from 0 to 1.0
> + * 34th and 35th entry will represent extended range
> + * inputs 3.0 and 7.0 respectively, currently clamped
> + * at 1.0. Since the precision is 16bit, the user value
> + * can be directly filled to register.
> + * ToDo: Extend to max 7.0.
> + */
> + I915_WRITE(PRE_CSC_GAMC_DATA(pipe), lut[i].red);
red? I would have gone for green.
> + }
> + } else {
> + /* load a linear table. */
> + for (i = 0; i < lut_size; i++) {
> + uint32_t v = (i * (1 << 16)) / (lut_size - 1);
> +
> + I915_WRITE(PRE_CSC_GAMC_DATA(pipe), v);
> + }
> + }
> +
> + /* Clamp values > 1.0. */
> + while (i++ < 35)
> + I915_WRITE(PRE_CSC_GAMC_DATA(pipe), (1 << 16));
This is the glk+ degamma lut is it not? Why is this code
pretending to be icl+ only?
IMO step 1 should be to just reuse the current glk code for icl.
Which I think boils down to just setting the correct bit(s) in
GAMMA_MODE. After that we can think of extending it to support
user provided degamma.
There is a bit of a problem with that on glk/cnl though
since we don't have the output csc. Hence when the pipe csc
is used we need to either reject gamma (which doesn't sound
very prone to work with legacy userspace) or we program the
degamma LUT with the data meant for the gamma LUT which has
its own problems.
> +}
> +
> +static void icl_load_luts(struct intel_crtc_state *crtc_state)
> +{
> + struct drm_crtc *crtc = crtc_state->base.crtc;
> + struct drm_device *dev = crtc_state->base.crtc->dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + enum pipe pipe = to_intel_crtc(crtc)->pipe;
> + u32 gamma_mode = 0;
> +
> + if (crtc_state_is_legacy_gamma(crtc_state)) {
> + haswell_load_luts(crtc_state);
> + return;
> + }
> +
> + icl_load_degamma_lut(crtc_state);
> + bdw_load_gamma_lut(crtc_state, 0);
> +
> + gamma_mode = GAMMA_MODE_MODE_10BIT | PRE_CSC_GAMMA_ENABLE
> + | POST_CSC_GAMMA_ENABLE;
> + I915_WRITE(GAMMA_MODE(pipe), gamma_mode);
> +}
> +
> /* Loads the palette/gamma unit for the CRTC on CherryView. */
> static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
> {
> @@ -649,6 +714,8 @@ void intel_color_init(struct intel_crtc *crtc)
> } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
>
Re: [Intel-gfx] [v4 3/4] drm/i915/icl: Enable ICL Pipe CSC block
On Fri, Dec 21, 2018 at 01:29:40AM +0530, Uma Shankar wrote:
> Enable ICL pipe csc hardware. CSC block is enabled
> in CSC_MODE register instead of PLANE_COLOR_CTL.
>
> ToDO: Extend the ABI to accept 32 bit coefficient values
> instead of 16bit for future platforms.
>
> v2: Addressed Maarten's review comments.
>
> v3: Addressed Matt's review comments. Removed rmw patterns
> as suggested by Matt.
>
> v4: Addressed Matt's review comments.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/i915_reg.h| 4 +++-
> drivers/gpu/drm/i915/intel_color.c | 12 ++--
> 2 files changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1852c33..565ef6a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9861,7 +9861,9 @@ enum skl_power_gate {
> #define _PIPE_A_CSC_COEFF_RV_GV 0x49020
> #define _PIPE_A_CSC_COEFF_BV 0x49024
> #define _PIPE_A_CSC_MODE 0x49028
> -#define CSC_BLACK_SCREEN_OFFSET(1 << 2)
> +#defineCSC_ENABLE(1 << 31)
> +#defineOUTPUT_CSC_ENABLE (1 << 30)
> +#defineCSC_BLACK_SCREEN_OFFSET (1 << 2)
Bogus space->tab change.
We should probably document which bit is for which platforms.
> #define CSC_POSITION_BEFORE_GAMMA (1 << 1)
> #define CSC_MODE_YUV_TO_RGB(1 << 0)
> #define _PIPE_A_CSC_PREOFF_HI0x49030
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index e72d8d6..d5b240c 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -134,7 +134,11 @@ static void ilk_load_ycbcr_conversion_matrix(struct
> intel_crtc *crtc)
> I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), POSTOFF_RGB_TO_YUV_HI);
> I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), POSTOFF_RGB_TO_YUV_ME);
> I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), POSTOFF_RGB_TO_YUV_LO);
> - I915_WRITE(PIPE_CSC_MODE(pipe), 0);
> +
> + if (INTEL_GEN(dev_priv) >= 10)
11
> + I915_WRITE(PIPE_CSC_MODE(pipe), OUTPUT_CSC_ENABLE);
> + else
> + I915_WRITE(PIPE_CSC_MODE(pipe), 0);
> }
>
> static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
> @@ -242,7 +246,10 @@ static void ilk_load_csc_matrix(struct intel_crtc_state
> *crtc_state)
> I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);
> I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff);
>
> - I915_WRITE(PIPE_CSC_MODE(pipe), 0);
> + if (INTEL_GEN(dev_priv) >= 10)
11
> + I915_WRITE(PIPE_CSC_MODE(pipe), CSC_ENABLE);
> + else
> + I915_WRITE(PIPE_CSC_MODE(pipe), 0);
> } else {
> uint32_t mode = CSC_MODE_YUV_TO_RGB;
>
> @@ -715,6 +722,7 @@ void intel_color_init(struct intel_crtc *crtc)
> dev_priv->display.load_csc_matrix = ilk_load_csc_matrix;
> dev_priv->display.load_luts = glk_load_luts;
> } else if (IS_ICELAKE(dev_priv)) {
> + dev_priv->display.load_csc_matrix = ilk_load_csc_matrix;
> dev_priv->display.load_luts = icl_load_luts;
> } else {
> dev_priv->display.load_luts = i9xx_load_luts;
> --
> 1.9.1
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
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Re: [Intel-gfx] [v4 1/4] drm/i915: Remove gamma_mode state variable
On Fri, Dec 21, 2018 at 01:29:38AM +0530, Uma Shankar wrote:
> Removed crtc state variable for gamma mode as it's redundant
> since currently we have fixed modes on respective hardware
> platforms. This was making this state variable irrelevant.
I'm going to add it back at some point.
>
> Credits-to: Matt Roper
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/intel_color.c | 5 +
> drivers/gpu/drm/i915/intel_display.c | 3 ---
> drivers/gpu/drm/i915/intel_drv.h | 3 ---
> 3 files changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c
> b/drivers/gpu/drm/i915/intel_color.c
> index 37fd9dd..f32e4a7 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -370,12 +370,11 @@ static void haswell_load_luts(struct intel_crtc_state
> *crtc_state)
>* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
>*/
> if (IS_HASWELL(dev_priv) && crtc_state->ips_enabled &&
> - (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
> + (I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_SPLIT)) {
> hsw_disable_ips(crtc_state);
> reenable_ips = true;
> }
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
> I915_WRITE(GAMMA_MODE(crtc->pipe), GAMMA_MODE_MODE_8BIT);
>
> i9xx_load_luts(crtc_state);
> @@ -476,7 +475,6 @@ static void broadwell_load_luts(struct intel_crtc_state
> *crtc_state)
> bdw_load_gamma_lut(crtc_state,
> INTEL_INFO(dev_priv)->color.degamma_lut_size);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_SPLIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_SPLIT);
> POSTING_READ(GAMMA_MODE(pipe));
>
> @@ -532,7 +530,6 @@ static void glk_load_luts(struct intel_crtc_state
> *crtc_state)
>
> bdw_load_gamma_lut(crtc_state, 0);
>
> - crtc_state->gamma_mode = GAMMA_MODE_MODE_10BIT;
> I915_WRITE(GAMMA_MODE(pipe), GAMMA_MODE_MODE_10BIT);
> POSTING_READ(GAMMA_MODE(pipe));
> }
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3b70948..704d9d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9679,9 +9679,6 @@ static bool haswell_get_pipe_config(struct intel_crtc
> *crtc,
> intel_get_pipe_src_size(crtc, pipe_config);
> intel_get_crtc_ycbcr_config(crtc, pipe_config);
>
> - pipe_config->gamma_mode =
> - I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
> -
> power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {
> power_domain_mask |= BIT_ULL(power_domain);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 1028af8..7427a36 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -921,9 +921,6 @@ struct intel_crtc_state {
>
> struct intel_crtc_wm_state wm;
>
> - /* Gamma mode programmed on the pipe */
> - uint32_t gamma_mode;
> -
> /* bitmask of visible planes (enum plane_id) */
> u8 active_planes;
> u8 nv12_planes;
> --
> 1.9.1
>
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[Intel-gfx] [PATCH 0/9] skl+ watermark stuff
From: Ville Syrjälä A few fixes to the watermark/ddb stuff. Noticed while trying to fix icl. That one is still busted but at least we should more or less match the spec now. Included a few cleanups etc. at the end as well. Ville Syrjälä (9): drm/i915: Don't ignore level 0 lines watermark for glk+ drm/i915: Reinstate an early latency==0 check for skl+ drm/i915: Fix bits vs. bytes mixup in dbuf block size computation drm/i915: Fix > vs >= mismatch in watermark/ddb calculations drm/i915: Account for minimum ddb allocation restrictions drm/i915: Pass dev_priv to skl_needs_memory_bw_wa() drm/i915: Drop the definite article in front of SAGV drm/i915: Drop the pointless linetime==0 check drm/i915: Use IS_GEN9_LP() for the linetime w/a check drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 123 2 files changed, 79 insertions(+), 45 deletions(-) -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 8/9] drm/i915: Drop the pointless linetime==0 check
From: Ville Syrjälä 0*whatever==0 so this check is pointless. Remove it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0843990ebf9f..3c351a21a0fa 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4825,10 +4825,6 @@ skl_compute_linetime_wm(const struct intel_crtc_state *cstate) uint32_t linetime_wm; linetime_us = intel_get_linetime_us(cstate); - - if (is_fixed16_zero(linetime_us)) - return 0; - linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); /* Display WA #1135: bxt:ALL GLK:ALL */ -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 7/9] drm/i915: Drop the definite article in front of SAGV
From: Ville Syrjälä
The spec doesn't use a definite article in front of SAGV. The
rules regarding articles and initialisms are super fuzzy, but
at least to my ears it sounds much more natural to not have
the article. Perhaps because I tend to pronounce it as
"sag-vee" instead of spelling out the letters one at a time.
Actually I might still prefer to leave out the article if I
did spell them out.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 40cb18c61e11..0843990ebf9f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3667,25 +3667,25 @@ intel_enable_sagv(struct drm_i915_private *dev_priv)
if (dev_priv->sagv_status == I915_SAGV_ENABLED)
return 0;
- DRM_DEBUG_KMS("Enabling the SAGV\n");
+ DRM_DEBUG_KMS("Enabling SAGV\n");
mutex_lock(_priv->pcu_lock);
ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
GEN9_SAGV_ENABLE);
- /* We don't need to wait for the SAGV when enabling */
+ /* We don't need to wait for SAGV when enabling */
mutex_unlock(_priv->pcu_lock);
/*
* Some skl systems, pre-release machines in particular,
-* don't actually have an SAGV.
+* don't actually have SAGV.
*/
if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
return 0;
} else if (ret < 0) {
- DRM_ERROR("Failed to enable the SAGV\n");
+ DRM_ERROR("Failed to enable SAGV\n");
return ret;
}
@@ -3704,7 +3704,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
if (dev_priv->sagv_status == I915_SAGV_DISABLED)
return 0;
- DRM_DEBUG_KMS("Disabling the SAGV\n");
+ DRM_DEBUG_KMS("Disabling SAGV\n");
mutex_lock(_priv->pcu_lock);
/* bspec says to keep retrying for at least 1 ms */
@@ -3716,14 +3716,14 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
/*
* Some skl systems, pre-release machines in particular,
-* don't actually have an SAGV.
+* don't actually have SAGV.
*/
if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
return 0;
} else if (ret < 0) {
- DRM_ERROR("Failed to disable the SAGV (%d)\n", ret);
+ DRM_ERROR("Failed to disable SAGV (%d)\n", ret);
return ret;
}
@@ -3754,7 +3754,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
sagv_block_time_us = 10;
/*
-* SKL+ workaround: bspec recommends we disable the SAGV when we have
+* SKL+ workaround: bspec recommends we disable SAGV when we have
* more then one pipe enabled
*
* If there are no active CRTCs, no additional checks need be performed
@@ -3795,7 +3795,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
/*
* If any of the planes on this pipe don't enable wm levels that
* incur memory latencies higher than sagv_block_time_us we
-* can't enable the SAGV.
+* can't enable SAGV.
*/
if (latency < sagv_block_time_us)
return false;
--
2.19.2
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[Intel-gfx] [PATCH 3/9] drm/i915: Fix bits vs. bytes mixup in dbuf block size computation
From: Ville Syrjälä The spec used to say "8bpp" which someone took to mean 8 bytes per pixel when in fact it was supposed to be 8 bits per pixel. The spec has been updated to make it more clear now. Fix the code to match. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0aac7e7b660f..55a1c577f060 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4618,7 +4618,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate, intel_pstate); if (INTEL_GEN(dev_priv) >= 11 && - fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 8) + fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1) wp->dbuf_block_size = 256; else wp->dbuf_block_size = 512; -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 6/9] drm/i915: Pass dev_priv to skl_needs_memory_bw_wa()
From: Ville Syrjälä
skl_needs_memory_bw_wa() doesn't look at the passed in state at all.
Possibly it should, but for now let's make life simpler by just
passing in dev_priv.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 21 +
1 file changed, 5 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7464552c05f4..40cb18c61e11 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3633,14 +3633,9 @@ static u8 intel_enabled_dbuf_slices_num(struct
drm_i915_private *dev_priv)
* FIXME: We still don't have the proper code detect if we need to apply the
WA,
* so assume we'll always need it in order to avoid underruns.
*/
-static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state)
+static bool skl_needs_memory_bw_wa(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-
- if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv))
- return true;
-
- return false;
+ return IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv);
}
static bool
@@ -3792,7 +3787,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
latency = dev_priv->wm.skl_latency[level];
- if (skl_needs_memory_bw_wa(intel_state) &&
+ if (skl_needs_memory_bw_wa(dev_priv) &&
plane->base.state->fb->modifier ==
I915_FORMAT_MOD_X_TILED)
latency += 15;
@@ -4580,9 +4575,6 @@ skl_compute_plane_wm_params(const struct intel_crtc_state
*cstate,
const struct drm_plane_state *pstate = _pstate->base;
const struct drm_framebuffer *fb = pstate->fb;
uint32_t interm_pbpl;
- struct intel_atomic_state *state =
- to_intel_atomic_state(cstate->base.state);
- bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
/* only NV12 format has two planes */
if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
@@ -4643,7 +4635,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state
*cstate,
wp->y_min_scanlines = 4;
}
- if (apply_memory_bw_wa)
+ if (skl_needs_memory_bw_wa(dev_priv))
wp->y_min_scanlines *= 2;
wp->plane_bytes_per_line = wp->width * wp->cpp;
@@ -4697,9 +4689,6 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
uint32_t res_blocks, res_lines, min_ddb_alloc = 0;
- struct intel_atomic_state *state =
- to_intel_atomic_state(cstate->base.state);
- bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
if (latency == 0)
return;
@@ -4710,7 +4699,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
dev_priv->ipc_enabled)
latency += 4;
- if (apply_memory_bw_wa && wp->x_tiled)
+ if (skl_needs_memory_bw_wa(dev_priv) && wp->x_tiled)
latency += 15;
method1 = skl_wm_method1(dev_priv, wp->plane_pixel_rate,
--
2.19.2
___
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[Intel-gfx] [PATCH 9/9] drm/i915: Use IS_GEN9_LP() for the linetime w/a check
From: Ville Syrjälä IS_GLK||IS_BXT == IS_GEN9_LP Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3c351a21a0fa..b5e8ac51ef1c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4827,9 +4827,8 @@ skl_compute_linetime_wm(const struct intel_crtc_state *cstate) linetime_us = intel_get_linetime_us(cstate); linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); - /* Display WA #1135: bxt:ALL GLK:ALL */ - if ((IS_BROXTON(dev_priv) || IS_GEMINILAKE(dev_priv)) && - dev_priv->ipc_enabled) + /* Display WA #1135: BXT:ALL GLK:ALL */ + if (IS_GEN9_LP(dev_priv) && dev_priv->ipc_enabled) linetime_wm /= 2; return linetime_wm; -- 2.19.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations
From: Ville Syrjälä
Bspec says we have to reject the watermark if it's >= the ddb
allocation. Fix the code to reject the == case as it should.
For transition watermarks we can just use >=, for the rest
we'll do +1 when calculating the minimum ddb allocation size.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 55a1c577f060..3c5cba31f055 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
continue;
wm = >wm.skl.optimal.planes[plane_id];
- blocks += wm->wm[level].plane_res_b;
- blocks += wm->uv_wm[level].plane_res_b;
+ blocks += wm->wm[level].plane_res_b + 1;
+ blocks += wm->uv_wm[level].plane_res_b + 1;
}
if (blocks < alloc_size) {
@@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- total[plane_id] = wm->wm[level].plane_res_b + extra;
+ total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
alloc_size -= extra;
total_data_rate -= rate;
@@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- uv_total[plane_id] = wm->uv_wm[level].plane_res_b + extra;
+ uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
alloc_size -= extra;
total_data_rate -= rate;
}
@@ -4477,7 +4477,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
*/
for_each_plane_id_on_crtc(intel_crtc, plane_id) {
wm = >wm.skl.optimal.planes[plane_id];
- if (wm->trans_wm.plane_res_b > total[plane_id])
+ if (wm->trans_wm.plane_res_b >= total[plane_id])
memset(>trans_wm, 0, sizeof(wm->trans_wm));
}
--
2.19.2
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[Intel-gfx] [PATCH 5/9] drm/i915: Account for minimum ddb allocation restrictions
From: Ville Syrjälä
On icl+ bspec tells us to calculate a separate minimum ddb
allocation from the blocks watermark. Both have to be checked
against the actual ddb allocation, but since we do things the
other way around we'll just calculat the minimum acceptable
ddb allocation by taking the maximum of the two values.
We'll also replace the memcmp() with a full trawl over the
the watermarks so that it'll ignore the min_ddb_alloc
because we can't directly read that out from the hw. I suppose
we could reconstruct it from the other values, but I was
too lazy to do that now.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 53 +++--
2 files changed, 45 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 815db160b966..7668d7197994 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1108,6 +1108,7 @@ struct skl_ddb_values {
};
struct skl_wm_level {
+ uint16_t min_ddb_alloc;
uint16_t plane_res_b;
uint8_t plane_res_l;
bool plane_en;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3c5cba31f055..7464552c05f4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
continue;
wm = >wm.skl.optimal.planes[plane_id];
- blocks += wm->wm[level].plane_res_b + 1;
- blocks += wm->uv_wm[level].plane_res_b + 1;
+ blocks += wm->wm[level].min_ddb_alloc;
+ blocks += wm->uv_wm[level].min_ddb_alloc;
}
if (blocks < alloc_size) {
@@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
+ total[plane_id] = wm->wm[level].min_ddb_alloc + extra;
alloc_size -= extra;
total_data_rate -= rate;
@@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
extra = min_t(u16, alloc_size,
DIV64_U64_ROUND_UP(alloc_size * rate,
total_data_rate));
- uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
+ uv_total[plane_id] = wm->uv_wm[level].min_ddb_alloc + extra;
alloc_size -= extra;
total_data_rate -= rate;
}
@@ -4696,7 +4696,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
uint32_t latency = dev_priv->wm.skl_latency[level];
uint_fixed_16_16_t method1, method2;
uint_fixed_16_16_t selected_result;
- uint32_t res_blocks, res_lines;
+ uint32_t res_blocks, res_lines, min_ddb_alloc = 0;
struct intel_atomic_state *state =
to_intel_atomic_state(cstate->base.state);
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
@@ -4769,6 +4769,24 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
}
}
+ if (INTEL_GEN(dev_priv) >= 11) {
+ if (wp->y_tiled) {
+ int extra_lines;
+
+ if (res_lines % wp->y_min_scanlines == 0)
+ extra_lines = wp->y_min_scanlines;
+ else
+ extra_lines = wp->y_min_scanlines * 2 -
+ res_lines % wp->y_min_scanlines;
+
+ min_ddb_alloc = mul_round_up_u32_fixed16(res_lines +
extra_lines,
+
wp->plane_blocks_per_line);
+ } else {
+ min_ddb_alloc = res_blocks +
+ DIV_ROUND_UP(res_blocks, 10);
+ }
+ }
+
if (!skl_wm_has_lines(dev_priv, level))
res_lines = 0;
@@ -4783,6 +4801,8 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
*/
result->plane_res_b = res_blocks;
result->plane_res_l = res_lines;
+ /* Bspec says: value >= plane ddb allocation -> invalid, hence the +1
here */
+ result->min_ddb_alloc = max(min_ddb_alloc, res_blocks) + 1;
result->plane_en = true;
}
@@ -5133,6 +5153,23 @@ static bool skl_plane_wm_equals(struct drm_i915_private
*dev_priv,
return skl_wm_level_equals(>trans_wm, >trans_wm);
}
+static bool skl_pipe_wm_equals(struct intel_crtc *crtc,
+ const struct
[Intel-gfx] [PATCH 1/9] drm/i915: Don't ignore level 0 lines watermark for glk+
From: Ville Syrjälä
On glk+ the level 0 lines watermark actually matters. Do not ignore it.
And while at it let's change things so that we always program a
consistnet 0 to the register when the lines watermarks is ignored
by the hardware.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2a6ffb8b975a..d132ef10fa60 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4675,6 +4675,15 @@ skl_compute_plane_wm_params(const struct
intel_crtc_state *cstate,
return 0;
}
+static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
+{
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
+ return true;
+
+ /* The number of lines are ignored for the level 0 watermark. */
+ return level > 0;
+}
+
static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
const struct intel_plane_state *intel_pstate,
int level,
@@ -4757,8 +4766,10 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
}
}
- /* The number of lines are ignored for the level 0 watermark. */
- if (level > 0 && res_lines > 31)
+ if (!skl_wm_has_lines(dev_priv, level))
+ res_lines = 0;
+
+ if (res_lines > 31)
return;
/*
--
2.19.2
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[Intel-gfx] [PATCH 2/9] drm/i915: Reinstate an early latency==0 check for skl+
From: Ville Syrjälä
I thought we could remove all the early latency==0 checks
and rely on skl_wm_method{1,2}() checking for it. But
skl_compute_plane_wm() applies a bunch of workarounds to bump
up the latency before calling those guys so clearly it won't
end up doing the right thing. Also not sure if the calculations
based on the method1/2 results are safe agaisnt overflows so
it might not work all that well in any case. Let's put the
early check back.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_pm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d132ef10fa60..0aac7e7b660f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4701,6 +4701,9 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *cstate,
to_intel_atomic_state(cstate->base.state);
bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
+ if (latency == 0)
+ return;
+
/* Display WA #1141: kbl,cfl */
if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) &&
--
2.19.2
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915/ddi: Move DDI port detection to the corresponding helper (rev2)
== Series Details == Series: series starting with [1/3] drm/i915/ddi: Move DDI port detection to the corresponding helper (rev2) URL : https://patchwork.freedesktop.org/series/54341/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11141_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11141_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-blt: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_color@pipe-c-ctm-max: - shard-apl: PASS -> FAIL [fdo#108147] * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-skl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_flip@basic-flip-vs-wf_vblank: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +9 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +4 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-skl: PASS -> FAIL [fdo#103167] +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-glk: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-blt: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +5 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#103167] +2 * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +4 * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-y: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_sysfs_edid_timing: - shard-iclb: PASS -> FAIL [fdo#100047] * igt@pm_rpm@fences: - shard-iclb: NOTRUN -> INCOMPLETE [fdo#108840] * igt@pm_rpm@i2c: - shard-iclb: PASS -> FAIL [fdo#104097] * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108654] / [fdo#108756] * igt@sw_sync@sync_busy_fork: - shard-iclb: PASS -> INCOMPLETE [fdo#108889] Possible fixes * igt@gem_eio@unwedge-stress: - shard-glk: FAIL [fdo#105957] -> PASS * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +10 * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS * igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +11 * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled: - shard-iclb: WARN [fdo#108336] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev4)
== Series Details ==
Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight
on resume, v2. (rev4)
URL : https://patchwork.freedesktop.org/series/54127/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5338 -> Patchwork_11147
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_11147 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11147, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54127/revisions/4/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_11147:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_hangcheck:
- fi-apl-guc: PASS -> DMESG-FAIL
Warnings
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: PASS -> SKIP +2
* igt@pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: SKIP -> PASS
Known issues
Here are the changes found in Patchwork_11147 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: PASS -> DMESG-FAIL [fdo#102614]
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* {igt@runner@aborted}:
- fi-icl-y: NOTRUN -> FAIL [fdo#108915]
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#108622] -> PASS
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: FAIL [fdo#108767] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +2
* igt@pm_rpm@basic-rte:
- fi-bsw-kefka: FAIL [fdo#108800] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
Participating hosts (49 -> 43)
--
Additional (1): fi-icl-y
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5338 -> Patchwork_11147
CI_DRM_5338: 5045a5f1e37e35f2bb7cfa5dff029225e844737b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4752: 321fe77d32fef32ef820f53924045fe6ef0cf6ed @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11147: d5098b2b10c0fe918a30e600f7caeae1fd520b46 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d5098b2b10c0 drm/i915: Re-enable fastset by default
50bb5ca8c8a3 drm/i915: Make HW readout mark CRTC scaler as in use.
cb18b688bdc8 drm/i915: Enable fastset for non-boot modesets.
4e82ad638e91 drm/i915/backlight: Restore backlight on resume, v2.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11147/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/debugfs_crc: Degrade ERROR when overflowing to INFO
== Series Details == Series: drm/debugfs_crc: Degrade ERROR when overflowing to INFO URL : https://patchwork.freedesktop.org/series/54364/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11140_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11140_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11140_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11140_full: ### IGT changes ### Warnings * igt@pm_rc6_residency@rc6-accuracy: - shard-snb: SKIP -> PASS Known issues Here are the changes found in Patchwork_11140_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-blt: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@gem_exec_whisper@normal: - shard-skl: PASS -> TIMEOUT [fdo#108592] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_chv_cursor_fail@pipe-c-64x64-right-edge: - shard-skl: NOTRUN -> FAIL [fdo#104671] +2 * igt@kms_color@pipe-c-ctm-max: - shard-apl: PASS -> FAIL [fdo#108147] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: PASS -> FAIL [fdo#104873] * igt@kms_draw_crc@draw-method-rgb565-render-xtiled: - shard-iclb: PASS -> WARN [fdo#108336] +5 * igt@kms_flip@plain-flip-fb-recreate: - shard-skl: PASS -> FAIL [fdo#100368] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbc-stridechange: - shard-iclb: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbc-tilingchange: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +7 * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +17 * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-iclb: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724] * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: NOTRUN -> FAIL [fdo#107815] * igt@kms_plane_multiple@atomic-pipe-a-tiling-x: - shard-iclb: PASS -> FAIL [fdo#103166] * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_psr@sprite_mmap_cpu: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +46 * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] * igt@kms_vblank@pipe-b-ts-continuation-suspend: - shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@pm_rpm@i2c: - shard-iclb: PASS -> FAIL [fdo#104097] Possible fixes * igt@gem_exec_fence@basic-busy-default: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +4 * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a: - shard-skl: DMESG-WARN [fdo#107956] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_cursor_crc@cursor-64x64-offscreen: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: -
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev4)
== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev4) URL : https://patchwork.freedesktop.org/series/54127/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4e82ad638e91 drm/i915/backlight: Restore backlight on resume, v2. cb18b688bdc8 drm/i915: Enable fastset for non-boot modesets. -:37: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #37: FILE: drivers/gpu/drm/i915/intel_display.c:12683: + if (intel_pipe_config_compare(dev_priv, to_intel_crtc_state(old_crtc_state), total: 0 errors, 0 warnings, 1 checks, 20 lines checked 50bb5ca8c8a3 drm/i915: Make HW readout mark CRTC scaler as in use. d5098b2b10c0 drm/i915: Re-enable fastset by default ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: from module params to device params
== Series Details == Series: drm/i915: from module params to device params URL : https://patchwork.freedesktop.org/series/54414/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5338 -> Patchwork_11146 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_11146 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11146, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/54414/revisions/1/mbox/ Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11146: ### IGT changes ### Possible regressions * igt@gem_busy@basic-busy-default: - fi-apl-guc: PASS -> FAIL +55 * igt@gem_close_race@basic-process: - fi-elk-e7500: PASS -> FAIL +43 * igt@gem_close_race@basic-threads: - fi-skl-6600u: PASS -> FAIL +55 - fi-whl-u: PASS -> FAIL +55 - fi-skl-guc: PASS -> FAIL +55 - fi-kbl-7567u: PASS -> FAIL +63 * igt@gem_ctx_create@basic-files: - fi-kbl-r: PASS -> FAIL +55 * igt@gem_ctx_switch@basic-default: - fi-cfl-8700k: PASS -> FAIL +55 * igt@gem_ctx_switch@basic-default-heavy: - fi-skl-iommu: PASS -> FAIL +55 * igt@gem_exec_basic@basic-bsd: - fi-bdw-gvtdvm: PASS -> FAIL +62 - fi-ivb-3520m: PASS -> FAIL +54 - fi-kbl-7500u: PASS -> FAIL +55 * igt@gem_exec_basic@basic-bsd2: - fi-kbl-7500u: SKIP -> FAIL +7 - fi-bxt-j4205: SKIP -> FAIL +7 * igt@gem_exec_basic@basic-default: - fi-skl-gvtdvm: PASS -> FAIL +62 * igt@gem_exec_basic@basic-render: - fi-ilk-650: PASS -> FAIL +43 - fi-bsw-n3050: PASS -> FAIL +52 * igt@gem_exec_basic@gtt-blt: - fi-hsw-4770:PASS -> FAIL +58 * igt@gem_exec_basic@gtt-bsd: - fi-bwr-2160:SKIP -> FAIL +17 * igt@gem_exec_basic@gtt-bsd1: - fi-ivb-3520m: SKIP -> FAIL +11 - fi-skl-6700hq: SKIP -> FAIL +7 - fi-skl-iommu: SKIP -> FAIL +7 - fi-glk-j4005: SKIP -> FAIL +7 - fi-icl-u3: SKIP -> FAIL +7 * igt@gem_exec_basic@gtt-bsd2: - fi-byt-clapper: SKIP -> FAIL +13 * igt@gem_exec_basic@gtt-default: - fi-bwr-2160:PASS -> FAIL +21 * igt@gem_exec_basic@gtt-render: - fi-snb-2520m: PASS -> FAIL +50 * igt@gem_exec_basic@gtt-vebox: - fi-icl-u3: PASS -> FAIL +55 * igt@gem_exec_basic@readonly-bsd: - fi-hsw-peppy: PASS -> FAIL +56 * igt@gem_exec_basic@readonly-bsd1: - fi-snb-2520m: SKIP -> FAIL +13 - fi-icl-u2: SKIP -> FAIL +7 - fi-ilk-650: SKIP -> FAIL +16 * igt@gem_exec_basic@readonly-bsd2: - fi-pnv-d510:SKIP -> FAIL +20 - fi-kbl-guc: SKIP -> FAIL +10 - fi-hsw-4770r: SKIP -> FAIL +7 - fi-kbl-8809g: SKIP -> FAIL +7 - fi-cfl-guc: SKIP -> FAIL +7 - fi-kbl-x1275: SKIP -> FAIL +7 - fi-hsw-peppy: SKIP -> FAIL +8 * igt@gem_exec_basic@readonly-default: - fi-skl-6700hq: PASS -> FAIL +55 - fi-kbl-guc: PASS -> FAIL +52 * igt@gem_exec_create@basic: - fi-bsw-kefka: PASS -> FAIL +53 * igt@gem_exec_fence@basic-await-default: - fi-skl-6700k2: PASS -> FAIL +55 * igt@gem_exec_fence@basic-busy-default: - fi-blb-e6850: PASS -> FAIL +39 - fi-cfl-guc: PASS -> FAIL +55 * igt@gem_exec_fence@basic-wait-default: - fi-pnv-d510:PASS -> FAIL +39 * igt@gem_exec_gttfill@basic: - fi-skl-gvtdvm: SKIP -> FAIL - fi-kbl-x1275: PASS -> FAIL +55 - fi-bsw-kefka: SKIP -> FAIL +9 - fi-glk-dsi: SKIP -> FAIL +8 - fi-bdw-gvtdvm: SKIP -> FAIL * igt@gem_exec_reloc@basic-cpu: - fi-skl-6600u: PASS -> WARN +30 - fi-pnv-d510:PASS -> WARN +32 - fi-kbl-7560u: PASS -> WARN +30 * igt@gem_exec_reloc@basic-cpu-active: - fi-bsw-kefka: PASS -> WARN +29 - fi-skl-6700hq: PASS -> WARN +30 - fi-cfl-8109u: PASS -> WARN +27 - fi-byt-clapper: PASS -> WARN +29 * igt@gem_exec_reloc@basic-cpu-gtt: - fi-kbl-guc: PASS -> WARN +27 * igt@gem_exec_reloc@basic-cpu-gtt-active: - fi-whl-u: PASS -> WARN +30 - fi-skl-6770hq: PASS -> WARN +30 - fi-bsw-n3050: PASS -> WARN +28 * igt@gem_exec_reloc@basic-cpu-gtt-noreloc: - fi-kbl-7500u: PASS -> WARN +30 - fi-kbl-8809g: PASS -> WARN +27 * igt@gem_exec_reloc@basic-cpu-noreloc: - fi-cfl-guc: PASS -> WARN +30 * igt@gem_exec_reloc@basic-cpu-read: - fi-skl-iommu: PASS -> WARN +30 -
Re: [Intel-gfx] [RFC PATCH 03/11] drm/i915/uc: add dev_priv parameter to intel_uc_is_using_* functions
On Fri, 21 Dec 2018 14:31:38 +0100, Jani Nikula
wrote:
/snip/
diff --git a/drivers/gpu/drm/i915/intel_uc.h
b/drivers/gpu/drm/i915/intel_uc.h
index 25d73ada74ae..24990ade4fb8 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -41,19 +41,19 @@ void intel_uc_fini(struct drm_i915_private
*dev_priv);
int intel_uc_suspend(struct drm_i915_private *dev_priv);
int intel_uc_resume(struct drm_i915_private *dev_priv);
-static inline bool intel_uc_is_using_guc(void)
+static inline bool intel_uc_is_using_guc(struct drm_i915_private
*dev_priv)
please s/dev_priv/i915
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc > 0;
}
-static inline bool intel_uc_is_using_guc_submission(void)
+static inline bool intel_uc_is_using_guc_submission(struct
drm_i915_private *dev_priv)
and here
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION;
}
-static inline bool intel_uc_is_using_huc(void)
+static inline bool intel_uc_is_using_huc(struct drm_i915_private
*dev_priv)
and here
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC;
Thanks,
Michal
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: from module params to device params
== Series Details == Series: drm/i915: from module params to device params URL : https://patchwork.freedesktop.org/series/54414/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: add a helper to make a copy of i915_params Okay! Commit: drm/i915: add a helper to free the members of i915_params Okay! Commit: drm/i915/uc: add dev_priv parameter to intel_uc_is_using_* functions Okay! Commit: drm/i915/params: set i915.enable_hangcheck permissions to 0600 Okay! Commit: drm/i915: move load failure injection to selftests -drivers/gpu/drm/i915/selftests/../i915_drv.h:3550:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3535:16: warning: expression using sizeof(void) Commit: drm/i915/params: document I915_PARAMS_FOR_EACH() Okay! Commit: drm/i915/params: add i915 parameters to debugfs Okay! Commit: drm/i915/debugfs: support bool values for int and uint params Okay! Commit: drm/i915/params: prevent changing module params runtime Okay! Commit: drm/i915/params: switch to device specific parameters -drivers/gpu/drm/i915/selftests/../i915_drv.h:3535:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3538:16: warning: expression using sizeof(void) Commit: drm/i915/params: hide i915_modparams within i915_params.c Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: from module params to device params
== Series Details == Series: drm/i915: from module params to device params URL : https://patchwork.freedesktop.org/series/54414/ State : warning == Summary == $ dim checkpatch origin/drm-tip 586195831aff drm/i915: add a helper to make a copy of i915_params -:53: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues #53: FILE: drivers/gpu/drm/i915/i915_params.c:216: +#define DUP(T, x, ...) dup_param(#T, >x); -:53: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon #53: FILE: drivers/gpu/drm/i915/i915_params.c:216: +#define DUP(T, x, ...) dup_param(#T, >x); total: 0 errors, 1 warnings, 1 checks, 43 lines checked 0812143284ad drm/i915: add a helper to free the members of i915_params -:54: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues #54: FILE: drivers/gpu/drm/i915/i915_params.c:232: +#define FREE(T, x, ...) free_param(#T, >x); -:54: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon #54: FILE: drivers/gpu/drm/i915/i915_params.c:232: +#define FREE(T, x, ...) free_param(#T, >x); total: 0 errors, 1 warnings, 1 checks, 44 lines checked 4509a9377d1c drm/i915/uc: add dev_priv parameter to intel_uc_is_using_* functions 6a59dbd9d959 drm/i915/params: set i915.enable_hangcheck permissions to 0600 -:26: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #26: FILE: drivers/gpu/drm/i915/i915_params.c:81: +i915_param_named_unsafe(enable_hangcheck, bool, 0600, "Periodically check GPU activity for detecting hangs. " total: 0 errors, 0 warnings, 1 checks, 8 lines checked 305ba63bcf19 drm/i915: move load failure injection to selftests a2297526194c drm/i915/params: document I915_PARAMS_FOR_EACH() 53915b3c08cf drm/i915/params: add i915 parameters to debugfs -:88: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #88: FILE: drivers/gpu/drm/i915/i915_debugfs.c:101: +static ssize_t i915_param_uint_write(struct file *file, + const char __user *ubuf, size_t len, -:215: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues #215: FILE: drivers/gpu/drm/i915/i915_debugfs.c:228: +#define REGISTER(T, x, unused, mode, ...) _i915_param_create_file(dir, #x, #T, mode, >x); -:215: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon #215: FILE: drivers/gpu/drm/i915/i915_debugfs.c:228: +#define REGISTER(T, x, unused, mode, ...) _i915_param_create_file(dir, #x, #T, mode, >x); total: 0 errors, 1 warnings, 2 checks, 298 lines checked 80c374cedf12 drm/i915/debugfs: support bool values for int and uint params -:23: WARNING:LINE_SPACING: Missing a blank line after declarations #23: FILE: drivers/gpu/drm/i915/i915_debugfs.c:67: + bool b; + ret = kstrtobool_from_user(ubuf, len, ); -:37: WARNING:LINE_SPACING: Missing a blank line after declarations #37: FILE: drivers/gpu/drm/i915/i915_debugfs.c:119: + bool b; + ret = kstrtobool_from_user(ubuf, len, ); total: 0 errors, 2 warnings, 0 checks, 26 lines checked 29ef2d634ac8 drm/i915/params: prevent changing module params runtime -:52: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #52: FILE: drivers/gpu/drm/i915/i915_params.c:61: +i915_param_named_unsafe(enable_fbc, int, 0400, "Enable frame buffer compression for power savings " -:61: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #61: FILE: drivers/gpu/drm/i915/i915_params.c:69: +i915_param_named_unsafe(panel_use_ssc, int, 0400, "Use Spread Spectrum Clock with panels [LVDS/eDP] " -:70: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #70: FILE: drivers/gpu/drm/i915/i915_params.c:77: +i915_param_named_unsafe(reset, int, 0400, "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])"); -:78: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #78: FILE: drivers/gpu/drm/i915/i915_params.c:84: +i915_param_named(error_capture, bool, 0400, "Record the GPU state following a hang. " -:85: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #85: FILE: drivers/gpu/drm/i915/i915_params.c:90: +i915_param_named_unsafe(enable_hangcheck, bool, 0400, "Periodically check GPU activity for detecting hangs. " -:91: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #91: FILE: drivers/gpu/drm/i915/i915_params.c:95: +i915_param_named_unsafe(enable_psr, int, 0400, "Enable PSR " -:103: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #103: FILE: drivers/gpu/drm/i915/i915_params.c:110: +i915_param_named(fastboot, bool, 0400, "Try to skip unnecessary mode sets at boot time (default: false)"); -:107: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #107: FILE: drivers/gpu/drm/i915/i915_params.c:113:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable FBC on fastset if necessary, v2.
== Series Details == Series: drm/i915: Disable FBC on fastset if necessary, v2. URL : https://patchwork.freedesktop.org/series/54363/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11139_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11139_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11139_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11139_full: ### IGT changes ### Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - shard-snb: PASS -> SKIP +1 Known issues Here are the changes found in Patchwork_11139_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-blt: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@gem_workarounds@suspend-resume-fd: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-a: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +33 * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_color@pipe-c-ctm-max: - shard-apl: PASS -> FAIL [fdo#108147] * igt@kms_cursor_crc@cursor-128x42-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_legacy@pipe-c-torture-bo: - shard-kbl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +6 * igt@kms_draw_crc@draw-method-xrgb-mmap-cpu-untiled: - shard-iclb: PASS -> WARN [fdo#108336] +2 * igt@kms_fbcon_fbt@fbc-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-apl: PASS -> FAIL [fdo#103167] +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +15 * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +19 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#103167] +7 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-iclb: PASS -> DMESG-FAIL [fdo#103166] / [fdo#107724] * igt@kms_plane@plane-position-covered-pipe-b-planes: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max: - shard-skl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf: - shard-iclb: PASS -> FAIL [fdo#103166] +3 * igt@kms_rotation_crc@sprite-rotation-90: - shard-kbl: PASS -> DMESG-FAIL [fdo#103558] / [fdo#105602] * igt@kms_setmode@basic: - shard-kbl: PASS -> FAIL [fdo#99912] * igt@pm_rpm@fences-dpms: - shard-skl: PASS -> INCOMPLETE [fdo#107807] * igt@pm_rpm@modeset-pc8-residency-stress: - shard-iclb: SKIP -> INCOMPLETE [fdo#108840] * igt@pm_rpm@modeset-stress-extra-wait: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] Possible fixes * igt@gem_eio@unwedge-stress: - shard-glk: FAIL [fdo#105957] -> PASS * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +9 * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_cursor_crc@cursor-64x64-offscreen: -
Re: [Intel-gfx] [PATCH 2/3] drm/i915/icl: Detect port F presence via VBT
On Thu, 20 Dec 2018, Imre Deak wrote:
> Registering an output for a non-existent port (on a given SKU) can lead
> to problems when trying to use the port, for instance timeouts during
> power well enabling. Since there are no strap bits for port detection we
> have to rely on VBT for this, so do that here.
>
> There are no known SKUs where any of the A-E ports are non-existent, so
> to reduce the likelihood of breakage due to incorrect VBT information,
> do this detection only for port F (which is known to be missing on some
> ICL SKUs).
Even this one relies on correct VBT... but the code does what it says on
the box, so
Reviewed-by: Jani Nikula
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108915
> Cc: Mika Kahola
> Cc: Jani Nikula
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index a2f8aaf61c61..2b81da068010 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14273,7 +14273,13 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> intel_ddi_init(dev_priv, PORT_C);
> intel_ddi_init(dev_priv, PORT_D);
> intel_ddi_init(dev_priv, PORT_E);
> - intel_ddi_init(dev_priv, PORT_F);
> + /*
> + * On some ICL SKUs port F is not present. No strap bits for
> + * this, so rely on VBT.
> + */
> + if (intel_bios_is_port_present(dev_priv, PORT_F))
> + intel_ddi_init(dev_priv, PORT_F);
> +
> icl_dsi_init(dev_priv);
> } else if (IS_GEN9_LP(dev_priv)) {
> /*
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 1/3] drm/i915/ddi: Move DDI port detection to the corresponding helper
On Thu, 20 Dec 2018, Imre Deak wrote:
> We have already a function to detect DDI ports using VBT, so instead of
> opencoding the DDI specific version of this, move the opencoded part to
> the existing helper.
>
> Cc: Jani Nikula
> Cc: Mika Kahola
> Signed-off-by: Imre Deak
> ---
> drivers/gpu/drm/i915/intel_bios.c| 9 +
> drivers/gpu/drm/i915/intel_display.c | 4 +---
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c
> b/drivers/gpu/drm/i915/intel_bios.c
> index 764d84d4109b..fa4091c0768b 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1947,6 +1947,15 @@ bool intel_bios_is_port_present(struct
> drm_i915_private *dev_priv, enum port por
> };
> int i;
>
> + if (HAS_DDI(dev_priv)) {
> + const struct ddi_vbt_port_info *port_info =
> + _priv->vbt.ddi_port_info[port];
> +
> + return port_info->supports_dp ||
> +port_info->supports_dvi ||
> +port_info->supports_hdmi;
> + }
> +
I think it's pretty silly that we have two ways to parse the child
device info, pre-ddi and post-ddi... but it's not a problem with this
specific patch.
Also this doesn't work for DSI... but not a problem with this specific
patch either...
I guess a bit hesitant
Reviewed-by: Jani Nikula
BR,
Jani.
> /* FIXME maybe deal with port A as well? */
> if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
> return false;
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3b7094822aa9..a2f8aaf61c61 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14315,9 +14315,7 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>* On SKL we don't have a way to detect DDI-E so we rely on VBT.
>*/
> if (IS_GEN9_BC(dev_priv) &&
> - (dev_priv->vbt.ddi_port_info[PORT_E].supports_dp ||
> - dev_priv->vbt.ddi_port_info[PORT_E].supports_dvi ||
> - dev_priv->vbt.ddi_port_info[PORT_E].supports_hdmi))
> + intel_bios_is_port_present(dev_priv, PORT_E))
> intel_ddi_init(dev_priv, PORT_E);
>
> } else if (HAS_PCH_SPLIT(dev_priv)) {
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev3)
== Series Details ==
Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight
on resume, v2. (rev3)
URL : https://patchwork.freedesktop.org/series/54127/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5338 -> Patchwork_11145
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_11145 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11145, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54127/revisions/3/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_11145:
### IGT changes ###
Possible regressions
* igt@pm_rpm@module-reload:
- fi-kbl-guc: PASS -> FAIL
Known issues
Here are the changes found in Patchwork_11145 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: PASS -> DMESG-FAIL [fdo#102614]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* {igt@runner@aborted}:
- fi-icl-y: NOTRUN -> FAIL [fdo#108915]
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] / [fdo#108622] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: FAIL [fdo#103167] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
Warnings
* igt@i915_selftest@live_contexts:
- fi-icl-u3: DMESG-FAIL [fdo#108569] -> INCOMPLETE [fdo#108315]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108315]: https://bugs.freedesktop.org/show_bug.cgi?id=108315
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
Participating hosts (49 -> 43)
--
Additional (1): fi-icl-y
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5338 -> Patchwork_11145
CI_DRM_5338: 5045a5f1e37e35f2bb7cfa5dff029225e844737b @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4752: 321fe77d32fef32ef820f53924045fe6ef0cf6ed @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11145: 5fcb04c258b03d551b39098fab8f0df0f1edce42 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5fcb04c258b0 drm/i915: Re-enable fastset by default
779365325d0f drm/i915: Make HW readout mark CRTC scaler as in use.
027319e3b9f4 drm/i915: Enable fastset for non-boot modesets.
7891fae7c511 drm/i915/backlight: Restore backlight on resume, v2.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11145/
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: add a helper to make a copy of i915_params
== Series Details == Series: drm/i915: add a helper to make a copy of i915_params URL : https://patchwork.freedesktop.org/series/54353/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11138_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11138_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11138_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11138_full: ### IGT changes ### Warnings * igt@kms_chv_cursor_fail@pipe-b-64x64-bottom-edge: - shard-snb: PASS -> SKIP +10 * igt@pm_rc6_residency@rc6-accuracy: - shard-snb: SKIP -> PASS Known issues Here are the changes found in Patchwork_11138_full that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@read_all_entries_display_off: - shard-skl: PASS -> INCOMPLETE [fdo#104108] +1 * igt@gem_exec_schedule@pi-ringfull-blt: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_ccs@pipe-b-crc-sprite-planes-basic: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_color@pipe-c-ctm-max: - shard-apl: PASS -> FAIL [fdo#108147] * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-skl: PASS -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-random: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-64x64-rapid-movement: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@kms_flip@modeset-vs-vblank-race: - shard-snb: PASS -> FAIL [fdo#103060] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: - shard-skl: PASS -> FAIL [fdo#103167] +3 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - shard-iclb: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-glk: PASS -> FAIL [fdo#103167] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] +1 * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-glk: PASS -> FAIL [fdo#108948] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane@plane-position-covered-pipe-c-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: PASS -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-apl: PASS -> FAIL [fdo#103166] * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +1 * igt@pm_rpm@dpms-mode-unset-lpsp: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] * igt@pm_rpm@universal-planes: - shard-iclb: PASS -> DMESG-WARN [fdo#108654] / [fdo#108756] Possible fixes * igt@gem_exec_fence@basic-busy-default: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@gem_userptr_blits@readonly-unsync: - shard-skl: TIMEOUT [fdo#108887] -> PASS * igt@kms_chv_cursor_fail@pipe-b-128x128-bottom-edge: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +11 * igt@kms_cursor_crc@cursor-128x128-dpms: - shard-apl: FAIL [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev3)
== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev3) URL : https://patchwork.freedesktop.org/series/54127/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7891fae7c511 drm/i915/backlight: Restore backlight on resume, v2. 027319e3b9f4 drm/i915: Enable fastset for non-boot modesets. -:37: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #37: FILE: drivers/gpu/drm/i915/intel_display.c:12683: + if (intel_pipe_config_compare(dev_priv, to_intel_crtc_state(old_crtc_state), total: 0 errors, 0 warnings, 1 checks, 20 lines checked 779365325d0f drm/i915: Make HW readout mark CRTC scaler as in use. 5fcb04c258b0 drm/i915: Re-enable fastset by default ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug
Op 17-12-2018 om 12:16 schreef Maarten Lankhorst: > Op 11-12-2018 om 19:16 schreef Souza, Jose: >> On Tue, 2018-12-04 at 13:23 -0800, Dhinakaran Pandiyan wrote: >>> On Tue, 2018-12-04 at 10:52 -0800, Souza, Jose wrote: On Mon, 2018-12-03 at 18:58 -0800, Dhinakaran Pandiyan wrote: > On Mon, 2018-12-03 at 17:54 -0800, Souza, Jose wrote: >> On Mon, 2018-12-03 at 17:33 -0800, Dhinakaran Pandiyan wrote: >>> On Thu, 2018-11-29 at 18:31 -0800, José Roberto de Souza >>> wrote: Changing the i915_edp_psr_debug was enabling, disabling or switching PSR version by directly calling intel_psr_disable_locked() and intel_psr_enable_locked(), what is not the default PSR path that is executed in a regular modesets. So lets force a modeset in the PSR CRTC to trigger the requested PSR state change and really stress the code path that matters for the regular user. Also by doing this way it fixes the issue below, were DRRS was left enabled together with PSR when enabling PSR from debugfs. >>> While this patch does fix the issue, psr_compute_config() not >>> checking >>> crtc_state->has_drrs seems odd. We should change it to not >>> set >>> crtc_state->has_psr if crtc_state->has_drrs happens to be >>> set. >>> Or >>> do >>> it >>> the other way around. >> psr_compute_config() is not called when enabling PSR from >> debugfs, >> this > Right. My suggestion is to allow either ->has_drrs or ->has_psr > being > set (not both) in the kernel and disable DRRS in the IGT before > starting the test. So in case were PSR is disabled by parameter and DRRS is supported we would not enable DRRS? Because has_psr is set even if PSR is disabled. >>> Set ->has_psr = true in psr_compute_config() only if the module >>> parameter and debugfs mode allow it. That is how the code worked >>> earlier. Given that this patch duplicates the atomic state and runs >>> through all state checks, we can move back to the earlier way of >>> completing all checks in psr_compute_config(). >>> Disabling DRRS from IGT is duplicating the code that already do that and also not validating the default code path. >>> Call drrs_compute_config() after psr_compute_config(), don't set >>> has_drrs if has_psr is set. >> What about add a flag to skip modeset so when running IGT tests we set >> that flag and PSR mode will be changed in the next modeset, what is >> already done after every write to i915_edp_psr_debug in IGT tests? This >> way we remove the code duplication and only stress the default code >> path. >> >> Also plus the changes in has_drrs that you mentioned but in other >> patch. > Well the reason we set both is because kernel should decide which one to > enable. The > only way we can have both active is if we mess with debugfs. > > I see the fact you're trying to enable both as a failure from the user. > Anything in > debugfs can be used for advanced debugging, and can possibly brick your > system. If > we really care, then we should disable DRRS when enabling PSR, and the same > when > enabling DRRS, that we disable PSR. > > There's no need to restore it afterwards, because it's debugfs api. > > ~Maarten > .. or we could stop messing around, make a commit which sets crtc_state->mode_changed, it will degrade the modeset to a fastset, and then we can use update_pipe() to make the new settings active: https://patchwork.freedesktop.org/series/54339/ And then only set enable_psr enable_drrs in crtc_state when we plan to use it. This removes the need for separate settings.. ~Maarten ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Local Display Direct Flip Feature Discussion
On Fri, Dec 21, 2018 at 10:52:38AM +0800, Zhenyu Wang wrote: > On 2018.12.20 12:33:35 +0100, Gerd Hoffmann wrote: > > On Thu, Dec 20, 2018 at 08:45:09AM +, Zhang, Tina wrote: > > > > > > > > > > -Original Message- > > > > From: intel-gvt-dev > > > > [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On > > > > Behalf Of Gerd Hoffmann > > > > Sent: Wednesday, December 19, 2018 7:26 PM > > > > To: Zhang, Tina > > > > Cc: Tian, Kevin ; Wang, Zhenyu Z > > > > ; Wang, Zhi A ; He, Min > > > > ; Yuan, Hang ; Alex Williamson > > > > ; Lv, Zhiyuan ; > > > > Vetter, > > > > Daniel ; intel-gvt-dev > > > d...@lists.freedesktop.org>; Wang, Hongbo > > > > Subject: Re: Local Display Direct Flip Feature Discussion > > > > > > > > Hi, > > > > > > > > > > Isn't a framebuffer just a gem object with metadata (fourcc, width, > > > > > > height, stride, ...) attached? So I'm wondering how that works in > > > > > > detail. What happens on page-flip? Do you make the framebuffer > > > > > > reference another gem object then? Or do you blit the guest display > > > > > > to the framebuffer? > > > > > The special DRM framebuffer is transparent to the guest display > > > > > driver. > > > > > We just want to use this object to save the guest framebuffer info in > > > > > host-side. > > > > > > > > Hmm, so this object isn't a normal drm framebuffer. You are just > > > > masquerading it as drm framebuffer, so you can assign it to a drm crtc > > > > or drm > > > > plane. > > > Not so bad actually :-) > > > Host just wants to use a drm framebuffer to describe the drm framebuffer > > > attached on a vGPU's plane. And the only special thing is that this host > > > drm > > > frambuffer has on gem backends, which means host cannot manage the > > > > ... has no gem ... ? > > > > > memory of this drm framebuffer. And it's OK, as the guest does the > > > management. > > > Besides, generic drm framebuffer was designed to be able to deal with > > > this kind > > > of situation. > > > > Hmm, ok. Never dealed with framebuffers not backed by gem objects so > > far, seems to not be very common too. But the doc comments in > > include/drm/drm_framebuffer.h suggest it is fine indeed. Just wanted to jump in here and clarify, since I've originally suggested this: Yup, drm_framebuffer backed by non-gem is perfectly fine for the KMS framework. vmwgfx works like that already. Now we definitely want to standardize on GEM for code sharing reasons (there's really not much you need for a bare-bones display kms driver), but that's all the reasons. Other use-case where we discussed special framebuffers is for connecting drm to v4l, both as input (v4l fb attached to a plane) or special outputs (v4l fb attached to a writeback point). And v4l and gvt use-case both have the special semantics of automatically following to the next buffer (depending upon what the other side does). Cheers, Daniel > > What is the plan for hardware cursor support? Support two framebuffers, > > for primary and cursor? > > > > > > It makes sense to allow mapping guest outputs to host outputs. I think > > > > it is > > > > more useful to handle that at crtc level not plane level, so it'll work > > > > for both > > > > primary and cursor plane. I think it would be cleaner to introduce new > > > > drm > > > > (generic or i915) APIs for that instead of creating special framebuffer > > > > objects > > > > which behave in non-standard ways. > > > The APIs solution is one of our options and we have patch for it. The > > > userspace > > > interface is still under discussion. And here are the three candidates: > > > 1) Through i915 ioctl > > > 2) Through vfio/display ioctl > > > 3) Through GVT-g sys fs or debugfs > > > And option2 is considered as the preferred one, as this drm framebuffer > > > is related > > > to the vGPU. > > > > (3) Having this (in debugfs) would be useful for debugging purposes, > > even in addition to (1) or (2). > > > > (2) Implies qemu must handle it, so support must either be implemented > > in qemu directly, or in another process cooperating with qemu in > > some way (extending spice protocol & spice client comes to mind). > > Given that the input side (mouse and kbd events) need cooperation > > with qemu anyway this might not be much of a limitation though. > > > > (1) Would allow to handle this without having to worry about qemu/vfio > > at all. Needs some infrastructure (drm ioctl to enumerate vgpus for > > example). Possibly the amdgpu guys (which are doing vgpu using > > sr/iov instead of mdev) are interested in this too. > > > > No clear winner, but I tend to agree that (2) looks best. > > > > yeah, that's always my idea on this, because vfio interface would be > only place to align with vGPU/mdev life cycle. GVT specific sysfs should > only contain kind of static configuration or things won't depend on vGPU > open or close, so isn't a good place. Debugfs could be used for
Re: [Intel-gfx] [RFC PATCH 08/11] drm/i915/debugfs: support bool values for int and uint params
Argh, stray file accidentally sent, ignore.
On Fri, 21 Dec 2018, Jani Nikula wrote:
> It's not uncommon for us to switch param types between bools and ints,
> often having otherwise bool semantics but -1 value for platform
> default. Allow bool values for ints.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 33375cf79713..c9e2cf8e071a 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -61,6 +61,13 @@ static ssize_t i915_param_int_write(struct file *file,
> int ret;
>
> ret = kstrtoint_from_user(ubuf, len, 0, value);
> + if (ret) {
> + /* support boolean values too */
> + bool b;
> + ret = kstrtobool_from_user(ubuf, len, );
> + if (!ret)
> + *value = b;
> + }
>
> return ret ?: len;
> }
> @@ -106,6 +113,13 @@ static ssize_t i915_param_uint_write(struct file *file,
> int ret;
>
> ret = kstrtouint_from_user(ubuf, len, 0, value);
> + if (ret) {
> + /* support boolean values too */
> + bool b;
> + ret = kstrtobool_from_user(ubuf, len, );
> + if (!ret)
> + *value = b;
> + }
>
> return ret ?: len;
> }
--
Jani Nikula, Intel Open Source Graphics Center
___
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[Intel-gfx] [PULL] drm-fixes
Hi Linus, drm-fixes-2018-12-21: final drm-fixes for 4.20 array_index_nospec patch, cc: stable Very calm week, so either everything perfect or everyone on holidays already. Same for -next btw, I merged a few things but nothing that should block Dave's main merge window pull, so that one is still good to go. Cheers, Daniel The following changes since commit 7566ec393f4161572ba6f11ad5171fd5d59b0fbd: Linux 4.20-rc7 (2018-12-16 15:46:55 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm tags/drm-fixes-2018-12-21 for you to fetch changes up to b6aac625e579ca684448f8ace632f8dceb972afb: Merge tag 'drm-misc-fixes-2018-12-20' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes (2018-12-20 18:13:53 +0100) final drm-fixes for 4.20 array_index_nospec patch, cc: stable Daniel Vetter (1): Merge tag 'drm-misc-fixes-2018-12-20' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes Gustavo A. R. Silva (1): drm/ioctl: Fix Spectre v1 vulnerabilities drivers/gpu/drm/drm_ioctl.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915: Add an update_pipe callback to intel_encoder and call this on fastsets (v2)
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add an update_pipe callback to intel_encoder and call this on fastsets (v2) URL : https://patchwork.freedesktop.org/series/54339/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11136_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11136_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-blt: - shard-skl: NOTRUN -> FAIL [fdo#103158] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@i915_selftest@live_workarounds: - shard-iclb: PASS -> DMESG-FAIL [fdo#108954] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> DMESG-WARN [fdo#108784] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-random: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-64x64-suspend: - shard-apl: PASS -> INCOMPLETE [fdo#103927] * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: PASS -> FAIL [fdo#105363] - shard-glk: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_flip_tiling@flip-to-x-tiled: - shard-iclb: PASS -> FAIL [fdo#108134] * igt@kms_frontbuffer_tracking@fbcpsr-suspend: - shard-skl: PASS -> INCOMPLETE [fdo#104108] / [fdo#106978] / [fdo#107773] * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-iclb: PASS -> FAIL [fdo#103167] +5 * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-yf: - shard-apl: PASS -> FAIL [fdo#103166] +1 * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-glk: PASS -> FAIL [fdo#103166] +2 * igt@pm_rpm@gem-mmap-gtt: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] Possible fixes * igt@gem_eio@unwedge-stress: - shard-glk: FAIL [fdo#105957] -> PASS * igt@gem_exec_fence@basic-busy-default: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@kms_ccs@pipe-a-crc-sprite-planes-basic: - shard-glk: FAIL [fdo#108145] -> PASS +1 * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-glk: FAIL [fdo#103232] -> PASS +1 * igt@kms_cursor_crc@cursor-64x64-offscreen: - shard-skl: FAIL [fdo#103232] -> PASS * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-skl: FAIL [fdo#105682] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen: - shard-glk: FAIL [fdo#103167] -> PASS +3 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +12 * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-glk: FAIL [fdo#103166] -> PASS +1 - shard-apl: FAIL [fdo#103166] -> PASS +1 * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: FAIL [fdo#107815] -> PASS * igt@kms_plane_multiple@atomic-pipe-c-tiling-x: - shard-iclb: FAIL [fdo#103166] -> PASS * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-glk: DMESG-FAIL [fdo#105763] / [fdo#106538] -> PASS * igt@pm_rpm@debugfs-read: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS * igt@pm_rpm@i2c: - shard-skl: INCOMPLETE [fdo#107807] -> PASS * igt@pm_rpm@sysfs-read: - shard-iclb: INCOMPLETE [fdo#107713] / [fdo#108840] -> PASS * igt@pm_rpm@system-suspend-execbuf: - shard-skl:
[Intel-gfx] [RFC PATCH 08/11] drm/i915/params: support bool values for int and uint params
It's not uncommon for us to switch param types between bools and ints,
often having otherwise bool semantics but -1 value for platform
default. Allow bool values for ints.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 33375cf79713..c9e2cf8e071a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -61,6 +61,13 @@ static ssize_t i915_param_int_write(struct file *file,
int ret;
ret = kstrtoint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+ ret = kstrtobool_from_user(ubuf, len, );
+ if (!ret)
+ *value = b;
+ }
return ret ?: len;
}
@@ -106,6 +113,13 @@ static ssize_t i915_param_uint_write(struct file *file,
int ret;
ret = kstrtouint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+ ret = kstrtobool_from_user(ubuf, len, );
+ if (!ret)
+ *value = b;
+ }
return ret ?: len;
}
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH 08/11] drm/i915/debugfs: support bool values for int and uint params
It's not uncommon for us to switch param types between bools and ints,
often having otherwise bool semantics but -1 value for platform
default. Allow bool values for ints.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 33375cf79713..c9e2cf8e071a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -61,6 +61,13 @@ static ssize_t i915_param_int_write(struct file *file,
int ret;
ret = kstrtoint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+ ret = kstrtobool_from_user(ubuf, len, );
+ if (!ret)
+ *value = b;
+ }
return ret ?: len;
}
@@ -106,6 +113,13 @@ static ssize_t i915_param_uint_write(struct file *file,
int ret;
ret = kstrtouint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+ ret = kstrtobool_from_user(ubuf, len, );
+ if (!ret)
+ *value = b;
+ }
return ret ?: len;
}
--
2.11.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH 07/11] drm/i915/params: add i915 parameters to debugfs
Add a debugfs subdirectory i915_params with all the i915 module
parameters. This is a first step, with lots of boilerplate, and not much
benefit yet.
Add debugfs permissions to I915_PARAMS_FOR_EACH(). This duplicates the
mode with module parameter sysfs, but the goal is to make the module
parameters read-only.
0 mode will bypass debugfs creation. Use it for verbose_state_checks
which will need special attention in follow-up work.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 197
drivers/gpu/drm/i915/i915_params.c | 2 +-
drivers/gpu/drm/i915/i915_params.h | 68 +++--
3 files changed, 233 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index aca26a25ed50..33375cf79713 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -37,6 +37,201 @@ static inline struct drm_i915_private *node_to_i915(struct
drm_info_node *node)
return to_i915(node->minor->dev);
}
+/* int param */
+static int i915_param_int_show(struct seq_file *m, void *data)
+{
+ int *value = m->private;
+
+ seq_printf(m, "%d\n", *value);
+
+ return 0;
+}
+
+static int i915_param_int_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, i915_param_int_show, inode->i_private);
+}
+
+static ssize_t i915_param_int_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int *value = m->private;
+ int ret;
+
+ ret = kstrtoint_from_user(ubuf, len, 0, value);
+
+ return ret ?: len;
+}
+
+static const struct file_operations i915_param_int_fops = {
+ .owner = THIS_MODULE,
+ .open = i915_param_int_open,
+ .read = seq_read,
+ .write = i915_param_int_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations i915_param_int_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = i915_param_int_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+/* unsigned int param */
+static int i915_param_uint_show(struct seq_file *m, void *data)
+{
+ unsigned int *value = m->private;
+
+ seq_printf(m, "%u\n", *value);
+
+ return 0;
+}
+
+static int i915_param_uint_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, i915_param_uint_show, inode->i_private);
+}
+
+static ssize_t i915_param_uint_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ unsigned int *value = m->private;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, len, 0, value);
+
+ return ret ?: len;
+}
+
+static const struct file_operations i915_param_uint_fops = {
+ .owner = THIS_MODULE,
+ .open = i915_param_uint_open,
+ .read = seq_read,
+ .write = i915_param_uint_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations i915_param_uint_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = i915_param_uint_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+/* char * param */
+static int i915_param_charp_show(struct seq_file *m, void *data)
+{
+ const char **s = m->private;
+
+ seq_printf(m, "%s\n", *s);
+
+ return 0;
+}
+
+static int i915_param_charp_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, i915_param_charp_show, inode->i_private);
+}
+
+static ssize_t i915_param_charp_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ char **s = m->private;
+ char *new, *old;
+
+ /* FIXME: racy */
+ old = *s;
+ new = strndup_user(ubuf, PAGE_SIZE);
+ if (IS_ERR(new))
+ return PTR_ERR(new);
+
+ *s = new;
+
+ kfree(old);
+
+ return len;
+}
+
+static const struct file_operations i915_param_charp_fops = {
+ .owner = THIS_MODULE,
+ .open = i915_param_charp_open,
+ .read = seq_read,
+ .write = i915_param_charp_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations i915_param_charp_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = i915_param_charp_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static __always_inline void
+_i915_param_create_file(struct dentry *parent, const char *name,
+
[Intel-gfx] [RFC PATCH 09/11] drm/i915/params: prevent changing module params runtime
Only support runtime changes through the debugfs.
i915.verbose_state_checks remains an exception, and is not exposed via
debugfs.
FIXME: Before this gets applied, IGT needs to be changed to use the
debugfs for modifying the parameters. IGT changes at least the following
through module parameter sysfs:
* enable_fbc
* reset
* enable_hangcheck
* enable_psr
* fastboot
* prefault_disable
* load_detect_test
* force_reset_modeset_test
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_params.c | 40 --
1 file changed, 25 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index b1a8b8f7dac9..61cde445346e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -40,6 +40,15 @@ struct i915_params i915_modparams __read_mostly = {
#undef MEMBER
};
+/*
+ * Note: As a rule, keep module parameter sysfs permissions read-only
+ * 0400. Runtime changes are only supported through i915 debugfs.
+ *
+ * For any exceptions requiring write access and runtime changes through module
+ * parameter sysfs, prevent debugfs file creation by setting the parameter's
+ * debugfs mode to 0.
+ */
+
i915_param_named(modeset, int, 0400,
"Use kernel modesetting [KMS] (0=disable, "
"1=on, -1=force vga console preference [default])");
@@ -48,7 +57,7 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"Enable power-saving display C-states. "
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
-i915_param_named_unsafe(enable_fbc, int, 0600,
+i915_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
@@ -56,7 +65,7 @@ i915_param_named_unsafe(lvds_channel_mode, int, 0400,
"Specify LVDS channel mode "
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
-i915_param_named_unsafe(panel_use_ssc, int, 0600,
+i915_param_named_unsafe(panel_use_ssc, int, 0400,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
"(default: auto from VBT)");
@@ -64,25 +73,25 @@ i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
-i915_param_named_unsafe(reset, int, 0600,
+i915_param_named_unsafe(reset, int, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset
[default])");
i915_param_named_unsafe(vbt_firmware, charp, 0400,
"Load VBT from specified file under /lib/firmware");
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-i915_param_named(error_capture, bool, 0600,
+i915_param_named(error_capture, bool, 0400,
"Record the GPU state following a hang. "
"This information in /sys/class/drm/card/error is vital for "
"triaging and debugging hangs.");
#endif
-i915_param_named_unsafe(enable_hangcheck, bool, 0600,
+i915_param_named_unsafe(enable_hangcheck, bool, 0400,
"Periodically check GPU activity for detecting hangs. "
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
-i915_param_named_unsafe(enable_psr, int, 0600,
+i915_param_named_unsafe(enable_psr, int, 0400,
"Enable PSR "
"(0=disabled, 1=enabled) "
"Default: -1 (use per-chip default)");
@@ -95,24 +104,24 @@ i915_param_named_unsafe(disable_power_well, int, 0400,
"Disable display power wells when possible "
"(-1=auto [default], 0=power wells always on, 1=power wells disabled
when possible)");
-i915_param_named_unsafe(enable_ips, int, 0600, "Enable IPS (default: true)");
+i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
-i915_param_named(fastboot, bool, 0600,
+i915_param_named(fastboot, bool, 0400,
"Try to skip unnecessary mode sets at boot time (default: false)");
-i915_param_named_unsafe(prefault_disable, bool, 0600,
+i915_param_named_unsafe(prefault_disable, bool, 0400,
"Disable page prefaulting for pread/pwrite/reloc (default:false). "
"For developers only.");
-i915_param_named_unsafe(load_detect_test, bool, 0600,
+i915_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
-i915_param_named_unsafe(force_reset_modeset_test, bool, 0600,
+i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
-i915_param_named_unsafe(invert_brightness, int, 0600,
+i915_param_named_unsafe(invert_brightness, int, 0400,
"Invert backlight brightness "
"(-1 force normal, 0 machine defaults, 1 force inversion), please "
"report PCI device ID, subsystem vendor and subsystem device ID "
@@ -122,10 +131,11 @@
[Intel-gfx] [RFC PATCH 05/11] drm/i915: move load failure injection to selftests
Seems like selftests is a better home for everything related to load
failure injection, including the module parameter.
The failure injection code gets moved from under DRM_I915_DEBUG to
DRM_I915_SELFTEST config option. This should be of no consequence, as
the former selects the latter.
With the parameter no longer part of i915_params, its value will not be
recorded in error capture or debugfs param dump. Note that the value
would have been zeroed anyway if a selftest had been hit, so there
should not be meaningful information loss here, especially with all the
logging around failure injection.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c| 25 -
drivers/gpu/drm/i915/i915_drv.h| 15 ---
drivers/gpu/drm/i915/i915_params.c | 5 -
drivers/gpu/drm/i915/i915_params.h | 1 -
drivers/gpu/drm/i915/i915_selftest.h | 10 ++
drivers/gpu/drm/i915/selftests/i915_selftest.c | 26 ++
6 files changed, 36 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index caa055ac9472..559a1b11f3e4 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -57,31 +57,6 @@
static struct drm_driver driver;
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
-static unsigned int i915_load_fail_count;
-
-bool __i915_inject_load_failure(const char *func, int line)
-{
- if (i915_load_fail_count >= i915_modparams.inject_load_failure)
- return false;
-
- if (++i915_load_fail_count == i915_modparams.inject_load_failure) {
- DRM_INFO("Injecting failure at checkpoint %u [%s:%d]\n",
-i915_modparams.inject_load_failure, func, line);
- i915_modparams.inject_load_failure = 0;
- return true;
- }
-
- return false;
-}
-
-bool i915_error_injected(void)
-{
- return i915_load_fail_count && !i915_modparams.inject_load_failure;
-}
-
-#endif
-
#define FDO_BUG_URL "https://bugs.freedesktop.org/enter_bug.cgi?product=DRI;
#define FDO_BUG_MSG "Please file a bug at " FDO_BUG_URL " against DRM/Intel " \
"providing the dmesg log by booting with drm.debug=0xf"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b6158ec21065..fef4da3bddc5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -111,21 +111,6 @@
#define I915_STATE_WARN_ON(x) \
I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")")
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
-
-bool __i915_inject_load_failure(const char *func, int line);
-#define i915_inject_load_failure() \
- __i915_inject_load_failure(__func__, __LINE__)
-
-bool i915_error_injected(void);
-
-#else
-
-#define i915_inject_load_failure() false
-#define i915_error_injected() false
-
-#endif
-
#define i915_load_error(i915, fmt, ...)
\
__i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \
fmt, ##__VA_ARGS__)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 9f0539bdaa39..2853b54570eb 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -159,11 +159,6 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
i915_param_named_unsafe(enable_dp_mst, bool, 0600,
"Enable multi-stream transport (MST) for new DisplayPort sinks.
(default: true)");
-#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
-i915_param_named_unsafe(inject_load_failure, uint, 0400,
- "Force an error after a number of failure check points (0:disabled
(default), N:force failure at the Nth failure check point)");
-#endif
-
i915_param_named(enable_dpcd_backlight, bool, 0600,
"Enable support for DPCD backlight control (default:false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 93f665eced16..85a9007c0ed6 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -53,7 +53,6 @@ struct drm_printer;
param(int, mmio_debug, 0) \
param(int, edp_vswing, 0) \
param(int, reset, 2) \
- param(unsigned int, inject_load_failure, 0) \
/* leave bools at the end to not create holes */ \
param(bool, alpha_support, IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT)) \
param(bool, enable_hangcheck, true) \
diff --git a/drivers/gpu/drm/i915/i915_selftest.h
b/drivers/gpu/drm/i915/i915_selftest.h
index a73472dd12fd..1266cef8bf17 100644
--- a/drivers/gpu/drm/i915/i915_selftest.h
+++ b/drivers/gpu/drm/i915/i915_selftest.h
@@ -33,6 +33,7 @@ struct i915_selftest {
unsigned int random_seed;
int mock;
int live;
+ unsigned int inject_load_failure;
};
#if
[Intel-gfx] [RFC PATCH 10/11] drm/i915/params: switch to device specific parameters
Start using device specific parameters instead of module parameters for
most things. The module parameters become the immutable initial values
for i915 parameters. Any later changes are only reflected in the
debugfs.
The stragglers are:
* i915.alpha_support and i915.modeset. Needed before dev_priv is
available. This is fine because the parameters are read-only and never
modified.
* i915.verbose_state_checks. Passing dev_priv to I915_STATE_WARN and
I915_STATE_WARN_ON would result in massive and ugly churn. This is
handled by not exposing the parameter via debugfs, and leaving the
parameter writable in sysfs.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 ++--
drivers/gpu/drm/i915/i915_drv.c | 12 +++--
drivers/gpu/drm/i915/i915_drv.h | 5 ++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c| 4 +-
drivers/gpu/drm/i915/intel_bios.c| 6 +--
drivers/gpu/drm/i915/intel_crt.c | 4 +-
drivers/gpu/drm/i915/intel_csr.c | 6 +--
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
drivers/gpu/drm/i915/intel_display.c | 10 ++---
drivers/gpu/drm/i915/intel_dp.c | 11 +++--
drivers/gpu/drm/i915/intel_dp_aux_backlight.c| 3 +-
drivers/gpu/drm/i915/intel_fbc.c | 12 ++---
drivers/gpu/drm/i915/intel_guc_fw.c | 4 +-
drivers/gpu/drm/i915/intel_guc_log.c | 3 +-
drivers/gpu/drm/i915/intel_gvt.c | 8 ++--
drivers/gpu/drm/i915/intel_hangcheck.c | 2 +-
drivers/gpu/drm/i915/intel_huc_fw.c | 4 +-
drivers/gpu/drm/i915/intel_lvds.c| 4 +-
drivers/gpu/drm/i915/intel_opregion.c| 2 +-
drivers/gpu/drm/i915/intel_panel.c | 4 +-
drivers/gpu/drm/i915/intel_psr.c | 14 +++---
drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +++---
drivers/gpu/drm/i915/intel_uc.c | 56
drivers/gpu/drm/i915/intel_uc.h | 21 ++---
drivers/gpu/drm/i915/intel_uncore.c | 18
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 4 +-
27 files changed, 131 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index c9e2cf8e071a..29ab4e5967fd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -226,7 +226,7 @@ _i915_param_create_file(struct dentry *parent, const char
*name,
static int i915_debugfs_params(struct drm_i915_private *dev_priv)
{
struct drm_minor *minor = dev_priv->drm.primary;
- struct i915_params *params = _modparams;
+ struct i915_params *params = _priv->params;
struct dentry *dir;
dir = debugfs_create_dir("i915_params", minor->debugfs_root);
@@ -261,7 +261,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
intel_driver_caps_print(_priv->caps, );
kernel_param_lock(THIS_MODULE);
- i915_params_dump(_modparams, );
+ i915_params_dump(_priv->params, );
kernel_param_unlock(THIS_MODULE);
return 0;
@@ -1541,7 +1541,7 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
if (waitqueue_active(_priv->gpu_error.reset_queue))
seq_puts(m, "struct_mutex blocked for reset\n");
- if (!i915_modparams.enable_hangcheck) {
+ if (!dev_priv->params.enable_hangcheck) {
seq_puts(m, "Hangcheck disabled\n");
return 0;
}
@@ -1947,7 +1947,7 @@ static int i915_ips_status(struct seq_file *m, void
*unused)
intel_runtime_pm_get(dev_priv);
seq_printf(m, "Enabled by kernel parameter: %s\n",
- yesno(i915_modparams.enable_ips));
+ yesno(dev_priv->params.enable_ips));
if (INTEL_GEN(dev_priv) >= 8) {
seq_puts(m, "Currently: unknown\n");
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 559a1b11f3e4..cfe1f93f9683 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -343,7 +343,7 @@ static int i915_getparam_ioctl(struct drm_device *dev, void
*data,
return -ENODEV;
break;
case I915_PARAM_HAS_GPU_RESET:
- value = i915_modparams.enable_hangcheck &&
+ value = dev_priv->params.enable_hangcheck &&
intel_has_gpu_reset(dev_priv);
if (value && intel_has_reset_engine(dev_priv))
value = 2;
@@ -1642,6 +1642,9 @@ i915_driver_create(struct pci_dev *pdev, const struct
pci_device_id *ent)
return ERR_PTR(err);
}
+ /* Device parameters start as a copy of module parameters. */
+ i915_params_copy(>params,
[Intel-gfx] [RFC PATCH 06/11] drm/i915/params: document I915_PARAMS_FOR_EACH()
Macros with this much magic in them deserve some explanatory text.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_params.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 85a9007c0ed6..98eba6728095 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -33,6 +33,15 @@ struct drm_printer;
#define ENABLE_GUC_SUBMISSION BIT(0)
#define ENABLE_GUC_LOAD_HUCBIT(1)
+/*
+ * Invoke param, a function-like macro, for each i915 param, with arguments:
+ *
+ * param(type, name, value)
+ *
+ * type: parameter type, one of {bool, int, unsigned int, char *}
+ * name: name of the parameter
+ * value: initial/default value of the parameter
+ */
#define I915_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL) \
param(int, modeset, -1) \
--
2.11.0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH 11/11] drm/i915/params: hide i915_modparams within i915_params.c
Prevent accidental use of i915_modparams throughout the driver by hiding
it in i915_params.c. Add accessors for the legitimate uses.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.c| 2 +-
drivers/gpu/drm/i915/i915_drv.h| 2 +-
drivers/gpu/drm/i915/i915_params.c | 20 +++-
drivers/gpu/drm/i915/i915_params.h | 6 --
drivers/gpu/drm/i915/i915_pci.c| 6 +++---
5 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index cfe1f93f9683..2f03d47c4a1f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1643,7 +1643,7 @@ i915_driver_create(struct pci_dev *pdev, const struct
pci_device_id *ent)
}
/* Device parameters start as a copy of module parameters. */
- i915_params_copy(>params, _modparams);
+ i915_params_copy(>params, NULL);
i915->drm.pdev = pdev;
i915->drm.dev_private = i915;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index baacd37c7259..97ac33ac34c0 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -103,7 +103,7 @@
#define I915_STATE_WARN(condition, format...) ({ \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on))\
- if (!WARN(i915_modparams.verbose_state_checks, format)) \
+ if (!WARN(i915_params_verbose_state_checks(), format)) \
DRM_ERROR(format); \
unlikely(__ret_warn_on);\
})
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 61cde445346e..c14ad496f9ab 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -34,12 +34,27 @@
module_param_named_unsafe(name, i915_modparams.name, T, perm); \
MODULE_PARM_DESC(name, desc)
-struct i915_params i915_modparams __read_mostly = {
+static struct i915_params i915_modparams __read_mostly = {
#define MEMBER(T, member, value, ...) .member = (value),
I915_PARAMS_FOR_EACH(MEMBER)
#undef MEMBER
};
+int i915_params_modeset(void)
+{
+ return i915_modparams.modeset;
+}
+
+bool i915_params_verbose_state_checks(void)
+{
+ return i915_modparams.verbose_state_checks;
+}
+
+bool i915_params_alpha_support(void)
+{
+ return i915_modparams.alpha_support;
+}
+
/*
* Note: As a rule, keep module parameter sysfs permissions read-only
* 0400. Runtime changes are only supported through i915 debugfs.
@@ -217,6 +232,9 @@ static __always_inline void dup_param(const char *type,
void *x)
void i915_params_copy(struct i915_params *dest, const struct i915_params *src)
{
+ if (!src)
+ src = _modparams;
+
*dest = *src;
#define DUP(T, x, ...) dup_param(#T, >x);
I915_PARAMS_FOR_EACH(DUP);
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 30c32e288efe..61de08446c4b 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -85,11 +85,13 @@ struct i915_params {
};
#undef MEMBER
-extern struct i915_params i915_modparams __read_mostly;
-
void i915_params_dump(const struct i915_params *params, struct drm_printer *p);
void i915_params_copy(struct i915_params *dest, const struct i915_params *src);
void i915_params_free(struct i915_params *params);
+int i915_params_modeset(void);
+bool i915_params_verbose_state_checks(void);
+bool i915_params_alpha_support(void);
+
#endif
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6350db5503cd..34ec4d2d23d0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -734,7 +734,7 @@ static int i915_pci_probe(struct pci_dev *pdev, const
struct pci_device_id *ent)
(struct intel_device_info *) ent->driver_data;
int err;
- if (IS_ALPHA_SUPPORT(intel_info) && !i915_modparams.alpha_support) {
+ if (IS_ALPHA_SUPPORT(intel_info) && !i915_params_alpha_support()) {
DRM_INFO("The driver support for your hardware in this kernel
version is alpha quality\n"
"See CONFIG_DRM_I915_ALPHA_SUPPORT or
i915.alpha_support module parameter\n"
"to enable support in this kernel version, or check
for kernel updates.\n");
@@ -797,10 +797,10 @@ static int __init i915_init(void)
* vga_text_mode_force boot option.
*/
- if (i915_modparams.modeset == 0)
+ if (i915_params_modeset() == 0)
use_kms = false;
- if (vgacon_text_force() && i915_modparams.modeset == -1)
+ if (vgacon_text_force() && i915_params_modeset() == -1)
use_kms = false;
if (!use_kms) {
--
2.11.0
[Intel-gfx] [RFC PATCH 01/11] drm/i915: add a helper to make a copy of i915_params
Abstract the one user in anticipation of more.
Reviewed-by: Chris Wilson
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_gpu_error.c | 11 +--
drivers/gpu/drm/i915/i915_params.c| 14 ++
drivers/gpu/drm/i915/i915_params.h| 1 +
3 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 63df41d93379..8c04479c1586 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1834,18 +1834,9 @@ static void capture_gen_state(struct i915_gpu_state
*error)
error->driver_caps = i915->caps;
}
-static __always_inline void dup_param(const char *type, void *x)
-{
- if (!__builtin_strcmp(type, "char *"))
- *(void **)x = kstrdup(*(void **)x, GFP_ATOMIC);
-}
-
static void capture_params(struct i915_gpu_state *error)
{
- error->params = i915_modparams;
-#define DUP(T, x, ...) dup_param(#T, >params.x);
- I915_PARAMS_FOR_EACH(DUP);
-#undef DUP
+ i915_params_copy(>params, _modparams);
}
static unsigned long capture_find_epoch(const struct i915_gpu_state *error)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 2e0356561839..ae3ece4ec7ab 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -203,3 +203,17 @@ void i915_params_dump(const struct i915_params *params,
struct drm_printer *p)
I915_PARAMS_FOR_EACH(PRINT);
#undef PRINT
}
+
+static __always_inline void dup_param(const char *type, void *x)
+{
+ if (!__builtin_strcmp(type, "char *"))
+ *(void **)x = kstrdup(*(void **)x, GFP_ATOMIC);
+}
+
+void i915_params_copy(struct i915_params *dest, const struct i915_params *src)
+{
+ *dest = *src;
+#define DUP(T, x, ...) dup_param(#T, >x);
+ I915_PARAMS_FOR_EACH(DUP);
+#undef DUP
+}
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 7e56c516c815..fd1cf9415e60 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -78,6 +78,7 @@ struct i915_params {
extern struct i915_params i915_modparams __read_mostly;
void i915_params_dump(const struct i915_params *params, struct drm_printer *p);
+void i915_params_copy(struct i915_params *dest, const struct i915_params *src);
#endif
--
2.11.0
___
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[Intel-gfx] [RFC PATCH 04/11] drm/i915/params: set i915.enable_hangcheck permissions to 0600
i915.enable_hangcheck has been an outlier since its introduction in
commit 3e0dc6b01f53 ("drm/i915: hangcheck disable parameter") with 0644
permissions, while all the rest are either 0400 or 0600. Follow suit
with 0600.
IGT never reads the value, so there should be no impact.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_params.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 81c73bfc7991..9f0539bdaa39 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -77,7 +77,7 @@ i915_param_named(error_capture, bool, 0600,
"triaging and debugging hangs.");
#endif
-i915_param_named_unsafe(enable_hangcheck, bool, 0644,
+i915_param_named_unsafe(enable_hangcheck, bool, 0600,
"Periodically check GPU activity for detecting hangs. "
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
--
2.11.0
___
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[Intel-gfx] [RFC PATCH 03/11] drm/i915/uc: add dev_priv parameter to intel_uc_is_using_* functions
Reveals the build fail fixed in the last hunk. Also prep work.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h| 6 +++---
drivers/gpu/drm/i915/intel_uc.c| 12 ++--
drivers/gpu/drm/i915/intel_uc.h| 6 +++---
drivers/gpu/drm/i915/intel_wopcm.c | 2 +-
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 815db160b966..b6158ec21065 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2490,9 +2490,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_HUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
/* Having a GuC is not the same as using a GuC */
-#define USES_GUC(dev_priv) intel_uc_is_using_guc()
-#define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
-#define USES_HUC(dev_priv) intel_uc_is_using_huc()
+#define USES_GUC(dev_priv) intel_uc_is_using_guc(dev_priv)
+#define USES_GUC_SUBMISSION(dev_priv)
intel_uc_is_using_guc_submission(dev_priv)
+#define USES_HUC(dev_priv) intel_uc_is_using_huc(dev_priv)
#define HAS_POOLED_EU(dev_priv)((dev_priv)->info.has_pooled_eu)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 447b1de77cc7..731b82afe636 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -71,7 +71,7 @@ static int __get_default_guc_log_level(struct
drm_i915_private *i915)
{
int guc_log_level;
- if (!HAS_GUC(i915) || !intel_uc_is_using_guc())
+ if (!HAS_GUC(i915) || !intel_uc_is_using_guc(i915))
guc_log_level = GUC_LOG_LEVEL_DISABLED;
else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
@@ -112,11 +112,11 @@ static void sanitize_options_early(struct
drm_i915_private *i915)
DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",
i915_modparams.enable_guc,
-yesno(intel_uc_is_using_guc_submission()),
-yesno(intel_uc_is_using_huc()));
+yesno(intel_uc_is_using_guc_submission(i915)),
+yesno(intel_uc_is_using_huc(i915)));
/* Verify GuC firmware availability */
- if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
+ if (intel_uc_is_using_guc(i915) && !intel_uc_fw_is_selected(guc_fw)) {
DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
"enable_guc", i915_modparams.enable_guc,
!HAS_GUC(i915) ? "no GuC hardware" :
@@ -124,7 +124,7 @@ static void sanitize_options_early(struct drm_i915_private
*i915)
}
/* Verify HuC firmware availability */
- if (intel_uc_is_using_huc() && !intel_uc_fw_is_selected(huc_fw)) {
+ if (intel_uc_is_using_huc(i915) && !intel_uc_fw_is_selected(huc_fw)) {
DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
"enable_guc", i915_modparams.enable_guc,
!HAS_HUC(i915) ? "no HuC hardware" :
@@ -136,7 +136,7 @@ static void sanitize_options_early(struct drm_i915_private
*i915)
i915_modparams.guc_log_level =
__get_default_guc_log_level(i915);
- if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc()) {
+ if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc(i915)) {
DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
"guc_log_level", i915_modparams.guc_log_level,
!HAS_GUC(i915) ? "no GuC hardware" :
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 25d73ada74ae..24990ade4fb8 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -41,19 +41,19 @@ void intel_uc_fini(struct drm_i915_private *dev_priv);
int intel_uc_suspend(struct drm_i915_private *dev_priv);
int intel_uc_resume(struct drm_i915_private *dev_priv);
-static inline bool intel_uc_is_using_guc(void)
+static inline bool intel_uc_is_using_guc(struct drm_i915_private *dev_priv)
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc > 0;
}
-static inline bool intel_uc_is_using_guc_submission(void)
+static inline bool intel_uc_is_using_guc_submission(struct drm_i915_private
*dev_priv)
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION;
}
-static inline bool intel_uc_is_using_huc(void)
+static inline bool intel_uc_is_using_huc(struct drm_i915_private *dev_priv)
{
GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC;
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c
b/drivers/gpu/drm/i915/intel_wopcm.c
index
[Intel-gfx] [RFC PATCH 00/11] drm/i915: from module params to device params
Season's greetings! This series migrates module parameters to per-device parameters in drm_i915_private, accessible via debugfs. Patches 1-6 are fairly straightforward prep work to make the rest easier. After initial reviews I'll probably submit them separately. Patches 7-8 add debugfs access to the current module parameters. They work simultaneously with the module parameter sysfs access. It is expected that at this point we'll have a transition period, as IGT needs to be switched over to using the debugfs, but we don't want to have a flag day. Patch 9 removes module parameter sysfs write access, leaving debugfs the only interface to changing module parameters runtime. This breaks IGT. Patch 10 copies module parameters to dev_priv, and starts using them as device specific parameters from there, leaving module parameters merely initial/default values for the device parameters. Patch 11 makes i915_modparams static to avoid accidental module param use where device parameters should be used. The series is thoroughly untested, and CI will greet it with nice red christmas colors, bringing comfort and joy to us all. Cheers, Jani. Jani Nikula (11): drm/i915: add a helper to make a copy of i915_params drm/i915: add a helper to free the members of i915_params drm/i915/uc: add dev_priv parameter to intel_uc_is_using_* functions drm/i915/params: set i915.enable_hangcheck permissions to 0600 drm/i915: move load failure injection to selftests drm/i915/params: document I915_PARAMS_FOR_EACH() drm/i915/params: add i915 parameters to debugfs drm/i915/params: support bool values for int and uint params drm/i915/params: prevent changing module params runtime drm/i915/params: switch to device specific parameters drm/i915/params: hide i915_modparams within i915_params.c drivers/gpu/drm/i915/i915_debugfs.c | 217 ++- drivers/gpu/drm/i915/i915_drv.c | 37 +--- drivers/gpu/drm/i915/i915_drv.h | 28 +-- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c| 22 +-- drivers/gpu/drm/i915/i915_params.c | 97 +++--- drivers/gpu/drm/i915/i915_params.h | 84 + drivers/gpu/drm/i915/i915_pci.c | 6 +- drivers/gpu/drm/i915/i915_selftest.h | 10 ++ drivers/gpu/drm/i915/intel_bios.c| 6 +- drivers/gpu/drm/i915/intel_crt.c | 4 +- drivers/gpu/drm/i915/intel_csr.c | 6 +- drivers/gpu/drm/i915/intel_device_info.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 10 +- drivers/gpu/drm/i915/intel_dp.c | 11 +- drivers/gpu/drm/i915/intel_dp_aux_backlight.c| 3 +- drivers/gpu/drm/i915/intel_fbc.c | 12 +- drivers/gpu/drm/i915/intel_guc_fw.c | 4 +- drivers/gpu/drm/i915/intel_guc_log.c | 3 +- drivers/gpu/drm/i915/intel_gvt.c | 8 +- drivers/gpu/drm/i915/intel_hangcheck.c | 2 +- drivers/gpu/drm/i915/intel_huc_fw.c | 4 +- drivers/gpu/drm/i915/intel_lvds.c| 4 +- drivers/gpu/drm/i915/intel_opregion.c| 2 +- drivers/gpu/drm/i915/intel_panel.c | 4 +- drivers/gpu/drm/i915/intel_psr.c | 14 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +- drivers/gpu/drm/i915/intel_uc.c | 66 --- drivers/gpu/drm/i915/intel_uc.h | 21 +-- drivers/gpu/drm/i915/intel_uncore.c | 18 +- drivers/gpu/drm/i915/intel_wopcm.c | 2 +- drivers/gpu/drm/i915/selftests/i915_selftest.c | 26 +++ drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 4 +- 33 files changed, 515 insertions(+), 238 deletions(-) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC PATCH 02/11] drm/i915: add a helper to free the members of i915_params
Abstract the one user in anticipation of more. Set the dangling pointers
to NULL while at it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_gpu_error.c | 9 +
drivers/gpu/drm/i915/i915_params.c| 16
drivers/gpu/drm/i915/i915_params.h| 1 +
3 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 8c04479c1586..2bd7991ec9af 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -963,17 +963,10 @@ static void i915_error_object_free(struct
drm_i915_error_object *obj)
kfree(obj);
}
-static __always_inline void free_param(const char *type, void *x)
-{
- if (!__builtin_strcmp(type, "char *"))
- kfree(*(void **)x);
-}
static void cleanup_params(struct i915_gpu_state *error)
{
-#define FREE(T, x, ...) free_param(#T, >params.x);
- I915_PARAMS_FOR_EACH(FREE);
-#undef FREE
+ i915_params_free(>params);
}
static void cleanup_uc_state(struct i915_gpu_state *error)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index ae3ece4ec7ab..81c73bfc7991 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -217,3 +217,19 @@ void i915_params_copy(struct i915_params *dest, const
struct i915_params *src)
I915_PARAMS_FOR_EACH(DUP);
#undef DUP
}
+
+static __always_inline void free_param(const char *type, void *x)
+{
+ if (!__builtin_strcmp(type, "char *")) {
+ kfree(*(void **)x);
+ *(void **)x = NULL;
+ }
+}
+
+/* free the allocated members, *not* the passed in params itself */
+void i915_params_free(struct i915_params *params)
+{
+#define FREE(T, x, ...) free_param(#T, >x);
+ I915_PARAMS_FOR_EACH(FREE);
+#undef FREE
+}
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index fd1cf9415e60..93f665eced16 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -79,6 +79,7 @@ extern struct i915_params i915_modparams __read_mostly;
void i915_params_dump(const struct i915_params *params, struct drm_printer *p);
void i915_params_copy(struct i915_params *dest, const struct i915_params *src);
+void i915_params_free(struct i915_params *params);
#endif
--
2.11.0
___
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Re: [Intel-gfx] [PATCH v5 2/3] drm/i915: Move on the new pm runtime interface
On Fri, 21 Dec 2018 at 12:33, Tvrtko Ursulin
wrote:
>
>
> Hi,
>
> On 21/12/2018 10:33, Vincent Guittot wrote:
> > Use the new pm runtime interface to get the accounted suspended time:
> > pm_runtime_suspended_time().
> > This new interface helps to simplify and cleanup the code that computes
> > __I915_SAMPLE_RC6_ESTIMATED and to remove direct access to internals of
> > PM runtime.
> >
> > Reviewed-by: Ulf Hansson
> > Signed-off-by: Vincent Guittot
> > ---
> > drivers/gpu/drm/i915/i915_pmu.c | 16 ++--
> > drivers/gpu/drm/i915/i915_pmu.h | 4 ++--
> > 2 files changed, 8 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c
> > b/drivers/gpu/drm/i915/i915_pmu.c
> > index d6c8f8f..3f76f60 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -5,6 +5,7 @@
> >*/
> >
> > #include
> > +#include
> > #include "i915_pmu.h"
> > #include "intel_ringbuffer.h"
> > #include "i915_drv.h"
> > @@ -478,7 +479,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
> >* counter value.
> >*/
> > spin_lock_irqsave(>pmu.lock, flags);
> > - spin_lock(>power.lock);
> >
> > /*
> >* After the above branch intel_runtime_pm_get_if_in_use
> > failed
> > @@ -491,16 +491,13 @@ static u64 get_rc6(struct drm_i915_private *i915)
> >* suspended and if not we cannot do better than report the
> > last
> >* known RC6 value.
> >*/
> > - if (kdev->power.runtime_status == RPM_SUSPENDED) {
> > - if
> > (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
> > - i915->pmu.suspended_jiffies_last =
> > -
> > kdev->power.suspended_jiffies;
> > + if (pm_runtime_status_suspended(kdev)) {
> > + val = pm_runtime_suspended_time(kdev);
>
> There is a race condition between the status check and timestamp access
> which the existing code solves by holding the power.lock over it. But I
> don't exactly remember how this issue was manifesting. Is
> kdev->power.suspended_jiffies perhaps reset on exit from runtime
> suspend, which was then underflowing the val, not sure.
>
> Anyways, is the new way of doing this safe with regards to this race? In
AFAICT it is safe.
The current version does:
1-take lock,
2-test if dev is suspended
3-read some internals field to computed an up-to-date suspended time
4-update __I915_SAMPLE_RC6_ESTIMATED
5-release lock
The new version does:
1-test if dev is suspended
2-get an up-to-date suspended time with pm_runtime_suspended_time.
This is atomic and monotonic
3-update __I915_SAMPLE_RC6_ESTIMATED
A change from suspended to another states that happens just before
step 1 is ok for both as we will run the else if
No change of the state can happen after step 1 in current code and the
estimated suspended time will be the time up to step2. In parallel,
Any state change will have to wait step5 to continue
If a change from suspended to another state happens after step 1 in
new code, the suspended time return by PM core will be the time up to
this change. So I would say you don't delay state transition and you
get a more accurate estimated suspended time (even if the difference
should be small).
If a change from suspended to another state happens after step 2 in
new code, the suspended time return by PM core will be the time up to
step 2 so there is no changes
> other words is the value pm_runtime_suspended_time always monotonic,
> even when not suspended? If not we have to handle the race somehow.
Yes pm_runtime_suspended_time is monotonic and stays unchanged when
not suspended
>
> If it is always monotonic, then worst case we report one wrong sample,
> which I guess is still not ideal since someone could be querying the PMU
> with quite low frequency.
>
> There are tests which probably can hit this, but to run them
> automatically your patches would need to be rebased on drm-tip and maybe
> sent to our trybot. I can do that after the holiday break if you are
> okay with having the series waiting until then.
yes looks good to me
Thanks,
Vincent
>
> Regards,
>
> Tvrtko
>
> >
> > - val = kdev->power.suspended_jiffies -
> > - i915->pmu.suspended_jiffies_last;
> > - val += jiffies - kdev->power.accounting_timestamp;
> > + if
> > (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
> > + i915->pmu.suspended_time_last = val;
> >
> > - val = jiffies_to_nsecs(val);
> > + val -= i915->pmu.suspended_time_last;
> > val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
> >
> > i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur =
> > val;
> > @@ -510,7 +507,6 @@ static u64
Re: [Intel-gfx] [PATCH] drm/i915: Disable FBC on fastset if necessary, v2.
Op 20-12-2018 om 19:55 schreef Hans de Goede: > Hi, > > On 20-12-18 16:17, Maarten Lankhorst wrote: >> Without this, we will get a dmesg-warn when enable_fbc is cleared on a >> fastset: >> WARN_ON(!crtc_state->enable_fbc) >> WARNING: CPU: 0 PID: 1090 at drivers/gpu/drm/i915/intel_fbc.c:1091 >> intel_fbc_enable+0x2ce/0x580 [i915] >> RIP: 0010:intel_fbc_enable+0x2ce/0x580 [i915] >> Call Trace: >> ? __mutex_unlock_slowpath+0x46/0x2b0 >> intel_update_crtc+0x6f/0x2b0 [i915] >> skl_update_crtcs+0x1d1/0x2b0 [i915] >> intel_atomic_commit_tail+0x1ea/0xdb0 [i915] >> intel_atomic_commit+0x244/0x330 [i915] >> drm_mode_atomic_ioctl+0x85d/0x950 >> ? drm_atomic_set_property+0x970/0x970 >> drm_ioctl_kernel+0x81/0xf0 >> drm_ioctl+0x2de/0x390 >> ? drm_atomic_set_property+0x970/0x970 >> ? __handle_mm_fault+0x81b/0xfc0 >> do_vfs_ioctl+0xa0/0x6e0 >> ? __do_page_fault+0x2a5/0x550 >> ksys_ioctl+0x35/0x60 >> __x64_sys_ioctl+0x11/0x20 >> do_syscall_64+0x55/0x190 >> entry_SYSCALL_64_after_hwframe+0x49/0xbe >> >> Changes since v1: >> - Move intel_fbc_disable to intel_update_crtc() (Hans) >> >> Cc: Hans de Goede >> Signed-off-by: Maarten Lankhorst > > Patch looks good to me: > > Reviewed-by: Hans de Goede Thanks, pushed. :) ~Maarten ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix ILK-IVB primary plane enable delays (rev2)
== Series Details == Series: drm/i915: Fix ILK-IVB primary plane enable delays (rev2) URL : https://patchwork.freedesktop.org/series/54336/ State : success == Summary == CI Bug Log - changes from CI_DRM_5336_full -> Patchwork_11135_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_11135_full that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@read_all_entries_display_off: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@gem_ppgtt@blt-vs-render-ctxn: - shard-skl: PASS -> TIMEOUT [fdo#108039] * igt@i915_suspend@shrink: - shard-skl: NOTRUN -> INCOMPLETE [fdo#106886] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_busy@extended-pageflip-hang-newfb-render-c: - shard-glk: PASS -> DMESG-WARN [fdo#107956] * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-skl: NOTRUN -> FAIL [fdo#103232] +1 * igt@kms_cursor_crc@cursor-256x256-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] +2 * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-apl: PASS -> FAIL [fdo#103232] * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_flip@flip-vs-expired-vblank: - shard-skl: PASS -> FAIL [fdo#105363] * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-kbl: PASS -> FAIL [fdo#102887] / [fdo#105363] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt: - shard-apl: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render: - shard-iclb: PASS -> FAIL [fdo#103167] +1 * igt@kms_frontbuffer_tracking@fbcpsr-stridechange: - shard-iclb: PASS -> FAIL [fdo#105683] * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping: - shard-skl: NOTRUN -> DMESG-WARN [fdo#106885] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane_alpha_blend@pipe-a-alpha-basic: - shard-skl: NOTRUN -> FAIL [fdo#107815] / [fdo#108145] * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-glk: PASS -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> FAIL [fdo#108145] +1 * igt@kms_plane_multiple@atomic-pipe-b-tiling-y: - shard-glk: PASS -> FAIL [fdo#103166] +2 - shard-iclb: PASS -> FAIL [fdo#103166] +1 * igt@kms_rmfb@rmfb-ioctl: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] +2 * igt@pm_rpm@legacy-planes-dpms: - shard-iclb: PASS -> INCOMPLETE [fdo#108840] Possible fixes * igt@gem_exec_fence@basic-busy-default: - shard-snb: INCOMPLETE [fdo#105411] -> PASS * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-iclb: DMESG-WARN [fdo#107724] -> PASS +11 * igt@kms_available_modes_crc@available_mode_test_crc: - shard-snb: FAIL [fdo#106641] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_cursor_crc@cursor-128x42-offscreen: - shard-glk: INCOMPLETE [fdo#103359] / [k.org#198133] -> PASS * igt@kms_cursor_crc@cursor-256x256-onscreen: - shard-glk: FAIL [fdo#103232] -> PASS +1 * igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled: - shard-iclb: WARN [fdo#108336] -> PASS * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: FAIL [fdo#105363] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-apl: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-skl: FAIL [fdo#105682] -> PASS * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: FAIL [fdo#103167] -> PASS * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff: - shard-glk: FAIL [fdo#103167] -> PASS +1 * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc: - shard-iclb: DMESG-WARN [fdo#107724] / [fdo#108336] -> PASS +8 * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-skl: INCOMPLETE [fdo#104108] / [fdo#107773] -> PASS * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-apl: DMESG-WARN [fdo#103558] / [fdo#105602] -> PASS +12 * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-apl: FAIL [fdo#103166] -> PASS * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb: -
Re: [Intel-gfx] [PATCH v2 1/2] drm: Add color management LUT validation helper (v2)
Hi Matt,
On Thu, Dec 13, 2018 at 01:55:25PM -0800, Matt Roper wrote:
> Some hardware may place additional restrictions on the gamma/degamma
> curves described by our LUT properties. E.g., that a gamma curve never
> decreases or that the red/green/blue channels of a LUT's entries must be
> equal. Let's add a helper function that drivers can use to test that a
> userspace-provided LUT is valid and doesn't violate hardware
> requirements.
>
> v2:
> - Combine into a single helper that just takes a bitmask of the tests
>to apply. (Brian Starkey)
> - Add additional check (always performed) that LUT property blob size
>is always a multiple of the LUT entry size. (stolen from ARM driver)
nit: Technically we're 'Arm' now
>
> Cc: Uma Shankar
> Cc: Swati Sharma
> Cc: Brian Starkey
> Signed-off-by: Matt Roper
> Reviewed-by(v1): Brian Starkey
Looks good to me, feel free to drop the (v1) qualifier. Thanks again!
-Brian
> ---
> drivers/gpu/drm/drm_color_mgmt.c | 64
>
> include/drm/drm_color_mgmt.h | 5
> 2 files changed, 69 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> b/drivers/gpu/drm/drm_color_mgmt.c
> index 07dcf47daafe..5c2a2d228412 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -462,3 +462,67 @@ int drm_plane_create_color_properties(struct drm_plane
> *plane,
> return 0;
> }
> EXPORT_SYMBOL(drm_plane_create_color_properties);
> +
> +/**
> + * drm_color_lut_check - check validity of lookup table
> + * @lut: property blob containing LUT to check
> + * @tests: bitmask of tests to run
> + *
> + * Helper to check whether a userspace-provided lookup table is valid and
> + * satisfies additional hardware requirements. All table sizes should be a
> + * multiple of sizeof(struct drm_color_lut). Drivers pass a bitmask
> indicating
> + * which of the following additional tests should also be performed:
> + *
> + * "DRM_COLOR_LUT_EQUAL_CHANNELS":
> + * Checks whether the entries of a LUT all have equal values for the red,
> + * green, and blue channels. Intended for hardware that only accepts a
> + * single value per LUT entry and assumes that value applies to all three
> + * color components.
> + *
> + * "DRM_COLOR_LUT_INCREASING":
> + * Checks whether the entries of a LUT are always flat or increasing
> + * (never decreasing).
> + *
> + * Returns 0 on success, -EINVAL on failure.
> + */
> +int drm_color_lut_check(struct drm_property_blob *lut,
> + uint32_t tests)
> +{
> + struct drm_color_lut *entry;
> + int i;
> +
> + if (!lut)
> + return 0;
> +
> + if (lut->length % sizeof(struct drm_color_lut)) {
> + DRM_DEBUG_KMS("LUT size (%lu) is not a multiple of LUT entry
> size (%lu)\n",
> + lut->length, sizeof(struct drm_color_lut));
> + return -EINVAL;
> + }
> +
> + if (!tests)
> + return 0;
> +
> + entry = lut->data;
> + for (i = 0; i < drm_color_lut_size(lut); i++) {
> + if (tests & DRM_COLOR_LUT_EQUAL_CHANNELS) {
> + if (entry[i].red != entry[i].blue ||
> + entry[i].red != entry[i].green) {
> + DRM_DEBUG_KMS("All LUT entries must have equal
> r/g/b\n");
> + return -EINVAL;
> + }
> + }
> +
> + if (i > 0 && tests & DRM_COLOR_LUT_INCREASING) {
> + if (entry[i].red < entry[i - 1].red ||
> + entry[i].green < entry[i - 1].green ||
> + entry[i].blue < entry[i - 1].blue) {
> + DRM_DEBUG_KMS("LUT entries must never
> decrease.\n");
> + return -EINVAL;
> + }
> + }
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_color_lut_check);
> diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> index 90ef9996d9a4..7de16f70bcc3 100644
> --- a/include/drm/drm_color_mgmt.h
> +++ b/include/drm/drm_color_mgmt.h
> @@ -69,4 +69,9 @@ int drm_plane_create_color_properties(struct drm_plane
> *plane,
> u32 supported_ranges,
> enum drm_color_encoding default_encoding,
> enum drm_color_range default_range);
> +
> +#define DRM_COLOR_LUT_EQUAL_CHANNELS BIT(0)
> +#define DRM_COLOR_LUT_INCREASING BIT(1)
> +int drm_color_lut_check(struct drm_property_blob *lut,
> + uint32_t tests);
> #endif
> --
> 2.14.4
>
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 10/19] drm/i915: Remove debugfs/i915_ppgtt_info
On 12/12/2018 13:41, Chris Wilson wrote:
The information presented here is not relevant to current development.
We can either use the context information, but more often we want to
inspect the active gpu state.
The ulterior motive is to eradicate dev->filelist.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_debugfs.c | 119
drivers/gpu/drm/i915/i915_gem_gtt.c | 134
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 -
3 files changed, 255 deletions(-)
I said in November, that I gave r-b for this one already back in
September. :)
Reviewed-by: Tvrtko Ursulin
Regards,
Tvrtko
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 21d122024707..06d407d4102d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2046,124 +2046,6 @@ static int i915_swizzle_info(struct seq_file *m, void
*data)
return 0;
}
-static int per_file_ctx(int id, void *ptr, void *data)
-{
- struct i915_gem_context *ctx = ptr;
- struct seq_file *m = data;
- struct i915_hw_ppgtt *ppgtt = ctx->ppgtt;
-
- if (!ppgtt) {
- seq_printf(m, " no ppgtt for context %d\n",
- ctx->user_handle);
- return 0;
- }
-
- if (i915_gem_context_is_default(ctx))
- seq_puts(m, " default context:\n");
- else
- seq_printf(m, " context %d:\n", ctx->user_handle);
- ppgtt->debug_dump(ppgtt, m);
-
- return 0;
-}
-
-static void gen8_ppgtt_info(struct seq_file *m,
- struct drm_i915_private *dev_priv)
-{
- struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
- struct intel_engine_cs *engine;
- enum intel_engine_id id;
- int i;
-
- if (!ppgtt)
- return;
-
- for_each_engine(engine, dev_priv, id) {
- seq_printf(m, "%s\n", engine->name);
- for (i = 0; i < 4; i++) {
- u64 pdp = I915_READ(GEN8_RING_PDP_UDW(engine, i));
- pdp <<= 32;
- pdp |= I915_READ(GEN8_RING_PDP_LDW(engine, i));
- seq_printf(m, "\tPDP%d 0x%016llx\n", i, pdp);
- }
- }
-}
-
-static void gen6_ppgtt_info(struct seq_file *m,
- struct drm_i915_private *dev_priv)
-{
- struct intel_engine_cs *engine;
- enum intel_engine_id id;
-
- if (IS_GEN6(dev_priv))
- seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
-
- for_each_engine(engine, dev_priv, id) {
- seq_printf(m, "%s\n", engine->name);
- if (IS_GEN7(dev_priv))
- seq_printf(m, "GFX_MODE: 0x%08x\n",
- I915_READ(RING_MODE_GEN7(engine)));
- seq_printf(m, "PP_DIR_BASE: 0x%08x\n",
- I915_READ(RING_PP_DIR_BASE(engine)));
- seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n",
- I915_READ(RING_PP_DIR_BASE_READ(engine)));
- seq_printf(m, "PP_DIR_DCLV: 0x%08x\n",
- I915_READ(RING_PP_DIR_DCLV(engine)));
- }
- if (dev_priv->mm.aliasing_ppgtt) {
- struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-
- seq_puts(m, "aliasing PPGTT:\n");
- seq_printf(m, "pd gtt offset: 0x%08x\n",
ppgtt->pd.base.ggtt_offset);
-
- ppgtt->debug_dump(ppgtt, m);
- }
-
- seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
-}
-
-static int i915_ppgtt_info(struct seq_file *m, void *data)
-{
- struct drm_i915_private *dev_priv = node_to_i915(m->private);
- struct drm_device *dev = _priv->drm;
- struct drm_file *file;
- int ret;
-
- mutex_lock(>filelist_mutex);
- ret = mutex_lock_interruptible(>struct_mutex);
- if (ret)
- goto out_unlock;
-
- intel_runtime_pm_get(dev_priv);
-
- if (INTEL_GEN(dev_priv) >= 8)
- gen8_ppgtt_info(m, dev_priv);
- else if (INTEL_GEN(dev_priv) >= 6)
- gen6_ppgtt_info(m, dev_priv);
-
- list_for_each_entry_reverse(file, >filelist, lhead) {
- struct drm_i915_file_private *file_priv = file->driver_priv;
- struct task_struct *task;
-
- task = get_pid_task(file->pid, PIDTYPE_PID);
- if (!task) {
- ret = -ESRCH;
- goto out_rpm;
- }
- seq_printf(m, "\nproc: %s\n", task->comm);
- put_task_struct(task);
- idr_for_each(_priv->context_idr, per_file_ctx,
-(void *)(unsigned long)m);
- }
-
-out_rpm:
- intel_runtime_pm_put(dev_priv);
- mutex_unlock(>struct_mutex);
-out_unlock:
- mutex_unlock(>filelist_mutex);
-
Re: [Intel-gfx] [PATCH v7 3/4] drm/i915/icl: Define MOCS table for Icelake
On 14/12/2018 18:20, Lucas De Marchi wrote:
From: Tomasz Lis
The table has been unified across OSes to minimize virtualization overhead.
The MOCS table is now published as part of bspec, and versioned. Entries
are supposed to never be modified, but new ones can be added. Adding
entries increases table version. The patch includes version 1 entries.
Meaning of each entry is now explained in bspec, and user mode clients
are expected to know what each entry means. The 3 entries used for previous
platforms are still compatible with their legacy definitions, but that is
not guaranteed to be true for future platforms.
v2: Fixed SCC values, improved commit comment (Daniele)
v3: Improved MOCS table comment (Daniele)
v4: Moved new entries below gen9 ones. Put common entries into
definition to be used in multiple arrays. (Lucas)
v5: Made defines for or-ing flags. Renamed macros from MOCS_TABLE
to MOCS_ENTRIES. Switched LE_CoS to upper case. (Joonas)
v6: Removed definitions of reserved entries. (Michal)
Increased limit of entries sent to the hardware on gen11+.
v7: Simplify table as done for previou gens (Lucas)
BSpec: 34007
BSpec: 560
Signed-off-by: Tomasz Lis
Reviewed-by: Daniele Ceraolo Spurio
Reviewed-by: Lucas De Marchi
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 187 ++
1 file changed, 162 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drivers/gpu/drm/i915/intel_mocs.c
index 577633cefb8a..dfc4edea020f 100644
--- a/drivers/gpu/drm/i915/intel_mocs.c
+++ b/drivers/gpu/drm/i915/intel_mocs.c
@@ -44,6 +44,8 @@ struct drm_i915_mocs_table {
#define LE_SCC(value) ((value) << 8)
#define LE_PFM(value) ((value) << 11)
#define LE_SCF(value) ((value) << 14)
+#define LE_COS(value) ((value) << 15)
+#define LE_SSE(value) ((value) << 17)
/* Defines for the tables (LNCFMOCS0 - LNCFMOCS31) - two entries per word */
#define L3_ESC(value) ((value) << 0)
@@ -52,6 +54,10 @@ struct drm_i915_mocs_table {
/* Helper defines */
#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES 64 /* 63-64 are reserved, but configured. */
+
+#define NUM_MOCS_ENTRIES(i915) \
+ (INTEL_GEN(i915) < 11 ? GEN9_NUM_MOCS_ENTRIES : GEN11_NUM_MOCS_ENTRIES)
/* (e)LLC caching options */
#define LE_0_PAGETABLE_LE_CACHEABILITY(0)
@@ -80,21 +86,21 @@ struct drm_i915_mocs_table {
* LNCFCMOCS0 - LNCFCMOCS32 registers.
*
* These tables are intended to be kept reasonably consistent across
- * platforms. However some of the fields are not applicable to all of
- * them.
+ * HW platforms, and for ICL+, be identical across OSes. To achieve
+ * that, for Icelake and above, list of entries is published as part
+ * of bspec.
*
* Entries not part of the following tables are undefined as far as
- * userspace is concerned and shouldn't be relied upon. For the time
- * being they will be implicitly initialized to the strictest caching
- * configuration (uncached) to guarantee forwards compatibility with
- * userspace programs written against more recent kernels providing
- * additional MOCS entries.
+ * userspace is concerned and shouldn't be relied upon.
+ *
+ * The last two entries are reserved by the hardware. For ICL+ they
+ * should be initialized according to bspec and never used, for older
+ * platforms they should never be written to.
*
- * NOTE: These tables MUST start with being uncached and the length
- * MUST be less than 63 as the last two registers are reserved
- * by the hardware. These tables are part of the kernel ABI and
- * may only be updated incrementally by adding entries at the
- * end.
+ * NOTE: These tables are part of bspec and defined as part of hardware
+ * interface for ICL+. For older platforms, they are part of kernel
+ * ABI. It is expected that existing entries will remain constant
+ * and the tables will only be updated by adding new entries.
*/
#define GEN9_MOCS_ENTRIES \
@@ -132,6 +138,132 @@ static const struct drm_i915_mocs_entry
broxton_mocs_table[] = {
},
};
+#define GEN11_MOCS_ENTRIES \
+ [0] = { \
+ /* Base - Uncached (Deprecated) */ \
+ .control_value = LE_1_UC | LE_TC_1_LLC, \
+ .l3cc_value = L3_1_UC \
+ }, \
+ [1] = { \
+ /* Base - L3 + LeCC:PAT (Deprecated) */ \
+ .control_value = LE_0_PAGETABLE | LE_TC_1_LLC, \
+ .l3cc_value = L3_3_WB \
+ }, \
+ [2] = { \
+ /* Base - L3 + LLC */ \
+ .control_value = LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
+ .l3cc_value = L3_3_WB \
+ }, \
+ [3] = { \
+ /* Base - Uncached */ \
+ .control_value = LE_1_UC | LE_TC_1_LLC, \
+ .l3cc_value =
Re: [Intel-gfx] [PATCH v7 4/4] drm/i915: cache number of MOCS entries
On 14/12/2018 18:20, Lucas De Marchi wrote:
Instead of checking the gen number every time we need to know the max
number of entries, just save it into the table struct so we don't need
extra branches throughout the code.
Suggested-by: Tvrtko Ursulin
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_mocs.c | 31 ++-
1 file changed, 14 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_mocs.c
b/drivers/gpu/drm/i915/intel_mocs.c
index dfc4edea020f..22c5f576a3c2 100644
--- a/drivers/gpu/drm/i915/intel_mocs.c
+++ b/drivers/gpu/drm/i915/intel_mocs.c
@@ -32,6 +32,7 @@ struct drm_i915_mocs_entry {
struct drm_i915_mocs_table {
u32 size;
+ u32 n_entries;
While at it I'd convert both counts to normal unsigned int.
Another nitpick: I'd also suggest some more descriptive names since I
read n_entries and size completely opposite than what they are in the
code. Maybe just s/n_entries/max_entries/ to keep the diff small, or
even consider changing s/size/used_entries/ or something?
const struct drm_i915_mocs_entry *table;
};
@@ -56,9 +57,6 @@ struct drm_i915_mocs_table {
#define GEN9_NUM_MOCS_ENTRIES 62 /* 62 out of 64 - 63 & 64 are reserved. */
#define GEN11_NUM_MOCS_ENTRIES64 /* 63-64 are reserved, but
configured. */
-#define NUM_MOCS_ENTRIES(i915) \
- (INTEL_GEN(i915) < 11 ? GEN9_NUM_MOCS_ENTRIES : GEN11_NUM_MOCS_ENTRIES)
-
Do you want to go through patch 3 adds this, patch 4 removes it, or why
not just squash it into one?
/* (e)LLC caching options */
#define LE_0_PAGETABLE_LE_CACHEABILITY(0)
#define LE_1_UC _LE_CACHEABILITY(1)
@@ -283,14 +281,17 @@ static bool get_mocs_settings(struct drm_i915_private
*dev_priv,
if (IS_ICELAKE(dev_priv)) {
table->size = ARRAY_SIZE(icelake_mocs_table);
+ table->n_entries = GEN11_NUM_MOCS_ENTRIES;
table->table = icelake_mocs_table;
result = true;
} else if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
table->size = ARRAY_SIZE(skylake_mocs_table);
+ table->n_entries = GEN9_NUM_MOCS_ENTRIES;
table->table = skylake_mocs_table;
result = true;
} else if (IS_GEN9_LP(dev_priv)) {
table->size = ARRAY_SIZE(broxton_mocs_table);
+ table->n_entries = GEN9_NUM_MOCS_ENTRIES;
table->table = broxton_mocs_table;
result = true;
} else {
@@ -348,8 +349,6 @@ void intel_mocs_init_engine(struct intel_engine_cs *engine)
if (!get_mocs_settings(dev_priv, ))
return;
- GEM_BUG_ON(table.size > NUM_MOCS_ENTRIES(dev_priv));
-
for (index = 0; index < table.size; index++)
I915_WRITE(mocs_register(engine->id, index),
table.table[index].control_value);
@@ -362,7 +361,7 @@ void intel_mocs_init_engine(struct intel_engine_cs *engine)
* Entry 0 in the table is uncached - so we are just writing
* that value to all the used entries.
*/
- for (; index < NUM_MOCS_ENTRIES(dev_priv); index++)
+ for (; index < table.n_entries; index++)
I915_WRITE(mocs_register(engine->id, index),
table.table[0].control_value);
}
@@ -380,19 +379,18 @@ void intel_mocs_init_engine(struct intel_engine_cs
*engine)
static int emit_mocs_control_table(struct i915_request *rq,
const struct drm_i915_mocs_table *table)
{
- struct drm_i915_private *i915 = rq->i915;
enum intel_engine_id engine = rq->engine->id;
unsigned int index;
u32 *cs;
- if (WARN_ON(table->size > NUM_MOCS_ENTRIES(i915)))
+ if (GEM_WARN_ON(table->size > table->n_entries))
return -ENODEV;
This (and another below) could go to get_mocs_settings which is now the
authority to set things up correctly. So fire a warn from there and say
no mocs for you.
- cs = intel_ring_begin(rq, 2 + 2 * NUM_MOCS_ENTRIES(i915));
+ cs = intel_ring_begin(rq, 2 + 2 * table->n_entries);
if (IS_ERR(cs))
return PTR_ERR(cs);
- *cs++ = MI_LOAD_REGISTER_IMM(NUM_MOCS_ENTRIES(i915));
+ *cs++ = MI_LOAD_REGISTER_IMM(table->n_entries);
for (index = 0; index < table->size; index++) {
*cs++ = i915_mmio_reg_offset(mocs_register(engine, index));
@@ -407,7 +405,7 @@ static int emit_mocs_control_table(struct i915_request *rq,
* Entry 0 in the table is uncached - so we are just writing
* that value to all the used entries.
*/
- for (; index < NUM_MOCS_ENTRIES(i915); index++) {
+ for (; index < table->n_entries; index++) {
*cs++ = i915_mmio_reg_offset(mocs_register(engine, index));
*cs++ = table->table[0].control_value;
}
@@
Re: [Intel-gfx] [PATCH v5 2/3] drm/i915: Move on the new pm runtime interface
Hi,
On 21/12/2018 10:33, Vincent Guittot wrote:
Use the new pm runtime interface to get the accounted suspended time:
pm_runtime_suspended_time().
This new interface helps to simplify and cleanup the code that computes
__I915_SAMPLE_RC6_ESTIMATED and to remove direct access to internals of
PM runtime.
Reviewed-by: Ulf Hansson
Signed-off-by: Vincent Guittot
---
drivers/gpu/drm/i915/i915_pmu.c | 16 ++--
drivers/gpu/drm/i915/i915_pmu.h | 4 ++--
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index d6c8f8f..3f76f60 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include "i915_pmu.h"
#include "intel_ringbuffer.h"
#include "i915_drv.h"
@@ -478,7 +479,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
* counter value.
*/
spin_lock_irqsave(>pmu.lock, flags);
- spin_lock(>power.lock);
/*
* After the above branch intel_runtime_pm_get_if_in_use failed
@@ -491,16 +491,13 @@ static u64 get_rc6(struct drm_i915_private *i915)
* suspended and if not we cannot do better than report the last
* known RC6 value.
*/
- if (kdev->power.runtime_status == RPM_SUSPENDED) {
- if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
- i915->pmu.suspended_jiffies_last =
- kdev->power.suspended_jiffies;
+ if (pm_runtime_status_suspended(kdev)) {
+ val = pm_runtime_suspended_time(kdev);
There is a race condition between the status check and timestamp access
which the existing code solves by holding the power.lock over it. But I
don't exactly remember how this issue was manifesting. Is
kdev->power.suspended_jiffies perhaps reset on exit from runtime
suspend, which was then underflowing the val, not sure.
Anyways, is the new way of doing this safe with regards to this race? In
other words is the value pm_runtime_suspended_time always monotonic,
even when not suspended? If not we have to handle the race somehow.
If it is always monotonic, then worst case we report one wrong sample,
which I guess is still not ideal since someone could be querying the PMU
with quite low frequency.
There are tests which probably can hit this, but to run them
automatically your patches would need to be rebased on drm-tip and maybe
sent to our trybot. I can do that after the holiday break if you are
okay with having the series waiting until then.
Regards,
Tvrtko
- val = kdev->power.suspended_jiffies -
- i915->pmu.suspended_jiffies_last;
- val += jiffies - kdev->power.accounting_timestamp;
+ if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
+ i915->pmu.suspended_time_last = val;
- val = jiffies_to_nsecs(val);
+ val -= i915->pmu.suspended_time_last;
val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;
@@ -510,7 +507,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;
}
- spin_unlock(>power.lock);
spin_unlock_irqrestore(>pmu.lock, flags);
}
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index 7f164ca..3dc2a30 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -95,9 +95,9 @@ struct i915_pmu {
*/
struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
/**
-* @suspended_jiffies_last: Cached suspend time from PM core.
+* @suspended_time_last: Cached suspend time from PM core.
*/
- unsigned long suspended_jiffies_last;
+ u64 suspended_time_last;
/**
* @i915_attr: Memory block holding device attributes.
*/
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for Move pm_runtime accounted time to raw nsec
== Series Details ==
Series: Move pm_runtime accounted time to raw nsec
URL : https://patchwork.freedesktop.org/series/54404/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5337 -> Patchwork_11144
Summary
---
**WARNING**
Minor unknown changes coming with Patchwork_11144 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_11144, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/54404/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_11144:
### IGT changes ###
Warnings
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6770hq: PASS -> SKIP +36
Known issues
Here are the changes found in Patchwork_11144 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965]
* igt@i915_selftest@live_hangcheck:
- fi-bwr-2160:PASS -> DMESG-FAIL [fdo#108735]
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#108767]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* {igt@runner@aborted}:
- fi-icl-y: NOTRUN -> FAIL [fdo#108915]
Possible fixes
* igt@kms_flip@basic-flip-vs-dpms:
- fi-skl-6700hq: DMESG-WARN [fdo#105998] -> PASS
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: FAIL [fdo#103167] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108735]: https://bugs.freedesktop.org/show_bug.cgi?id=108735
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
Participating hosts (48 -> 41)
--
Additional (1): fi-icl-y
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-gdg-551 fi-icl-u3 fi-byt-n2820
Build changes
-
* Linux: CI_DRM_5337 -> Patchwork_11144
CI_DRM_5337: 3ac901085a9fae8699716ac44579dab1dec546c3 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4752: 321fe77d32fef32ef820f53924045fe6ef0cf6ed @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_11144: 223e162d09bfae095c6f988c5c9031560228ada6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
223e162d09bf PM/runtime:Replace jiffies based accounting with ktime based
accounting
b055afbb789b drm/i915: Move on the new pm runtime interface
c92f56748cd1 PM/runtime: Add a new interface to get accounted time
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11144/
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v4,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements
== Series Details == Series: series starting with [v4,1/3] ACPI / PMIC: Add support for executing PMIC MIPI sequence elements URL : https://patchwork.freedesktop.org/series/54003/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311_full -> Patchwork_11089_full Summary --- **WARNING** Minor unknown changes coming with Patchwork_11089_full need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_11089_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_11089_full: ### IGT changes ### Warnings * igt@pm_rc6_residency@rc6-accuracy: - shard-kbl: SKIP -> PASS Known issues Here are the changes found in Patchwork_11089_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_schedule@pi-ringfull-bsd: - shard-apl: NOTRUN -> FAIL [fdo#103158] * igt@gem_exec_schedule@pi-ringfull-render: - shard-skl: NOTRUN -> FAIL [fdo#103158] - shard-iclb: NOTRUN -> FAIL [fdo#103158] * igt@gem_userptr_blits@readonly-unsync: - shard-skl: NOTRUN -> TIMEOUT [fdo#108887] - shard-kbl: PASS -> TIMEOUT [fdo#108887] * igt@gem_workarounds@suspend-resume: - shard-skl: NOTRUN -> INCOMPLETE [fdo#104108] / [fdo#107773] +1 * igt@i915_suspend@debugfs-reader: - shard-skl: PASS -> INCOMPLETE [fdo#104108] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: - shard-iclb: PASS -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b: - shard-snb: NOTRUN -> DMESG-WARN [fdo#107956] * igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c: - shard-skl: NOTRUN -> DMESG-WARN [fdo#107956] +1 * igt@kms_ccs@pipe-a-crc-primary-rotation-180: - shard-iclb: NOTRUN -> FAIL [fdo#107725] +1 * igt@kms_ccs@pipe-b-crc-primary-basic: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] / [fdo#108336] +3 * igt@kms_color@pipe-b-ctm-0-75: - shard-apl: PASS -> DMESG-WARN [fdo#103558] / [fdo#105602] +4 * igt@kms_cursor_crc@cursor-128x128-onscreen: - shard-apl: PASS -> FAIL [fdo#103232] +3 * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-glk: PASS -> FAIL [fdo#103232] * igt@kms_cursor_crc@cursor-256x85-sliding: - shard-iclb: NOTRUN -> FAIL [fdo#103232] * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-iclb: PASS -> FAIL [fdo#103355] * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-untiled: - shard-iclb: NOTRUN -> WARN [fdo#108336] * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-gtt-untiled: - shard-iclb: PASS -> WARN [fdo#108336] +2 * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: PASS -> FAIL [fdo#105363] * igt@kms_flip@dpms-off-confusion: - shard-iclb: NOTRUN -> DMESG-WARN [fdo#107724] +4 * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-render: - shard-snb: NOTRUN -> INCOMPLETE [fdo#105411] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu: - shard-apl: PASS -> FAIL [fdo#103167] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt: - shard-iclb: PASS -> DMESG-FAIL [fdo#107720] / [fdo#107724] * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move: - shard-iclb: PASS -> DMESG-FAIL [fdo#107724] +5 * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-iclb: PASS -> FAIL [fdo#103167] +2 * igt@kms_frontbuffer_tracking@fbc-1p-rte: - shard-apl: PASS -> FAIL [fdo#103167] / [fdo#105682] * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-gtt: - shard-iclb: NOTRUN -> DMESG-FAIL [fdo#107724] * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-iclb: NOTRUN -> FAIL [fdo#108948] * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-iclb: PASS -> INCOMPLETE [fdo#107713] * igt@kms_plane@plane-position-covered-pipe-a-planes: - shard-iclb: PASS -> FAIL [fdo#103166] +2 * igt@kms_plane@plane-position-covered-pipe-c-planes: - shard-apl: PASS -> FAIL [fdo#103166] +1 - shard-glk: PASS -> FAIL [fdo#103166] * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb: - shard-skl: NOTRUN -> FAIL [fdo#108145] +3 * igt@kms_plane_lowres@pipe-c-tiling-y: - shard-iclb: PASS -> DMESG-WARN [fdo#107724] / [fdo#108336] +17 * igt@kms_psr@cursor_mmap_gtt:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Move pm_runtime accounted time to raw nsec
== Series Details == Series: Move pm_runtime accounted time to raw nsec URL : https://patchwork.freedesktop.org/series/54404/ State : warning == Summary == $ dim checkpatch origin/drm-tip c92f56748cd1 PM/runtime: Add a new interface to get accounted time -:48: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files #48: FILE: include/linux/pm_runtime.h:116: +extern u64 pm_runtime_suspended_time(struct device *dev); total: 0 errors, 0 warnings, 1 checks, 30 lines checked b055afbb789b drm/i915: Move on the new pm runtime interface 223e162d09bf PM/runtime:Replace jiffies based accounting with ktime based accounting ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting
On Fri, 21 Dec 2018 at 11:34, Vincent Guittot
wrote:
>
> From: Thara Gopinath
>
> This patch replaces jiffies based accounting for runtime_active_time
> and runtime_suspended_time with ktime base accounting. This makes the
> runtime debug counters inline with genpd and other pm subsytems which
> uses ktime based accounting.
>
> timekeeping is initialized before pm_runtime_init() so ktime_get() will
> be ready before first call. In fact, timekeeping_init() is called early
> in start_kernel() which is way before driver_init() (and that's when
> devices can start to be initialized) called from rest_init() via
> kernel_init_freeable() and do_basic_setup().
>
> Signed-off-by: Thara Gopinath
> [move from ktime to raw nsec]
> Signed-off-by: Vincent Guittot
Reviewed-by: Ulf Hansson
Kind regards
Uffe
> ---
> drivers/base/power/runtime.c | 17 +
> drivers/base/power/sysfs.c | 11 ---
> include/linux/pm.h | 6 +++---
> 3 files changed, 20 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> index e695544..f700524 100644
> --- a/drivers/base/power/runtime.c
> +++ b/drivers/base/power/runtime.c
> @@ -64,8 +64,8 @@ static int rpm_suspend(struct device *dev, int rpmflags);
> */
> void update_pm_runtime_accounting(struct device *dev)
> {
> - unsigned long now = jiffies;
> - unsigned long delta;
> + u64 now = ktime_to_ns(ktime_get());
> + u64 delta;
>
> delta = now - dev->power.accounting_timestamp;
>
> @@ -75,9 +75,9 @@ void update_pm_runtime_accounting(struct device *dev)
> return;
>
> if (dev->power.runtime_status == RPM_SUSPENDED)
> - dev->power.suspended_jiffies += delta;
> + dev->power.suspended_time += delta;
> else
> - dev->power.active_jiffies += delta;
> + dev->power.active_time += delta;
> }
>
> static void __update_runtime_status(struct device *dev, enum rpm_status
> status)
> @@ -88,17 +88,18 @@ static void __update_runtime_status(struct device *dev,
> enum rpm_status status)
>
> u64 pm_runtime_suspended_time(struct device *dev)
> {
> - unsigned long flags, time;
> + u64 time;
> + unsigned long flags;
>
> spin_lock_irqsave(>power.lock, flags);
>
> update_pm_runtime_accounting(dev);
>
> - time = dev->power.suspended_jiffies;
> + time = dev->power.suspended_time;
>
> spin_unlock_irqrestore(>power.lock, flags);
>
> - return jiffies_to_nsecs(time);
> + return time;
> }
> EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
>
> @@ -1503,7 +1504,7 @@ void pm_runtime_init(struct device *dev)
> dev->power.request_pending = false;
> dev->power.request = RPM_REQ_NONE;
> dev->power.deferred_resume = false;
> - dev->power.accounting_timestamp = jiffies;
> + dev->power.accounting_timestamp = ktime_to_ns(ktime_get());
> INIT_WORK(>power.work, pm_runtime_work);
>
> dev->power.timer_expires = 0;
> diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
> index d713738..96c8a22 100644
> --- a/drivers/base/power/sysfs.c
> +++ b/drivers/base/power/sysfs.c
> @@ -125,9 +125,12 @@ static ssize_t runtime_active_time_show(struct device
> *dev,
> struct device_attribute *attr, char *buf)
> {
> int ret;
> + u64 tmp;
> spin_lock_irq(>power.lock);
> update_pm_runtime_accounting(dev);
> - ret = sprintf(buf, "%i\n",
> jiffies_to_msecs(dev->power.active_jiffies));
> + tmp = dev->power.active_time;
> + do_div(tmp, NSEC_PER_MSEC);
> + ret = sprintf(buf, "%llu\n", tmp);
> spin_unlock_irq(>power.lock);
> return ret;
> }
> @@ -138,10 +141,12 @@ static ssize_t runtime_suspended_time_show(struct
> device *dev,
> struct device_attribute *attr, char *buf)
> {
> int ret;
> + u64 tmp;
> spin_lock_irq(>power.lock);
> update_pm_runtime_accounting(dev);
> - ret = sprintf(buf, "%i\n",
> - jiffies_to_msecs(dev->power.suspended_jiffies));
> + tmp = dev->power.suspended_time;
> + do_div(tmp, NSEC_PER_MSEC);
> + ret = sprintf(buf, "%llu\n", tmp);
> spin_unlock_irq(>power.lock);
> return ret;
> }
> diff --git a/include/linux/pm.h b/include/linux/pm.h
> index e723b78..e5a34e2 100644
> --- a/include/linux/pm.h
> +++ b/include/linux/pm.h
> @@ -632,9 +632,9 @@ struct dev_pm_info {
> int runtime_error;
> int autosuspend_delay;
> unsigned long last_busy;
> - unsigned long active_jiffies;
> - unsigned long suspended_jiffies;
> - unsigned long accounting_timestamp;
> + u64 active_time;
> + u64 suspended_time;
> + u64
[Intel-gfx] [PATCH v5 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting
From: Thara Gopinath
This patch replaces jiffies based accounting for runtime_active_time
and runtime_suspended_time with ktime base accounting. This makes the
runtime debug counters inline with genpd and other pm subsytems which
uses ktime based accounting.
timekeeping is initialized before pm_runtime_init() so ktime_get() will
be ready before first call. In fact, timekeeping_init() is called early
in start_kernel() which is way before driver_init() (and that's when
devices can start to be initialized) called from rest_init() via
kernel_init_freeable() and do_basic_setup().
Signed-off-by: Thara Gopinath
[move from ktime to raw nsec]
Signed-off-by: Vincent Guittot
---
drivers/base/power/runtime.c | 17 +
drivers/base/power/sysfs.c | 11 ---
include/linux/pm.h | 6 +++---
3 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index e695544..f700524 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -64,8 +64,8 @@ static int rpm_suspend(struct device *dev, int rpmflags);
*/
void update_pm_runtime_accounting(struct device *dev)
{
- unsigned long now = jiffies;
- unsigned long delta;
+ u64 now = ktime_to_ns(ktime_get());
+ u64 delta;
delta = now - dev->power.accounting_timestamp;
@@ -75,9 +75,9 @@ void update_pm_runtime_accounting(struct device *dev)
return;
if (dev->power.runtime_status == RPM_SUSPENDED)
- dev->power.suspended_jiffies += delta;
+ dev->power.suspended_time += delta;
else
- dev->power.active_jiffies += delta;
+ dev->power.active_time += delta;
}
static void __update_runtime_status(struct device *dev, enum rpm_status status)
@@ -88,17 +88,18 @@ static void __update_runtime_status(struct device *dev,
enum rpm_status status)
u64 pm_runtime_suspended_time(struct device *dev)
{
- unsigned long flags, time;
+ u64 time;
+ unsigned long flags;
spin_lock_irqsave(>power.lock, flags);
update_pm_runtime_accounting(dev);
- time = dev->power.suspended_jiffies;
+ time = dev->power.suspended_time;
spin_unlock_irqrestore(>power.lock, flags);
- return jiffies_to_nsecs(time);
+ return time;
}
EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
@@ -1503,7 +1504,7 @@ void pm_runtime_init(struct device *dev)
dev->power.request_pending = false;
dev->power.request = RPM_REQ_NONE;
dev->power.deferred_resume = false;
- dev->power.accounting_timestamp = jiffies;
+ dev->power.accounting_timestamp = ktime_to_ns(ktime_get());
INIT_WORK(>power.work, pm_runtime_work);
dev->power.timer_expires = 0;
diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index d713738..96c8a22 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c
@@ -125,9 +125,12 @@ static ssize_t runtime_active_time_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ret;
+ u64 tmp;
spin_lock_irq(>power.lock);
update_pm_runtime_accounting(dev);
- ret = sprintf(buf, "%i\n", jiffies_to_msecs(dev->power.active_jiffies));
+ tmp = dev->power.active_time;
+ do_div(tmp, NSEC_PER_MSEC);
+ ret = sprintf(buf, "%llu\n", tmp);
spin_unlock_irq(>power.lock);
return ret;
}
@@ -138,10 +141,12 @@ static ssize_t runtime_suspended_time_show(struct device
*dev,
struct device_attribute *attr, char *buf)
{
int ret;
+ u64 tmp;
spin_lock_irq(>power.lock);
update_pm_runtime_accounting(dev);
- ret = sprintf(buf, "%i\n",
- jiffies_to_msecs(dev->power.suspended_jiffies));
+ tmp = dev->power.suspended_time;
+ do_div(tmp, NSEC_PER_MSEC);
+ ret = sprintf(buf, "%llu\n", tmp);
spin_unlock_irq(>power.lock);
return ret;
}
diff --git a/include/linux/pm.h b/include/linux/pm.h
index e723b78..e5a34e2 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -632,9 +632,9 @@ struct dev_pm_info {
int runtime_error;
int autosuspend_delay;
unsigned long last_busy;
- unsigned long active_jiffies;
- unsigned long suspended_jiffies;
- unsigned long accounting_timestamp;
+ u64 active_time;
+ u64 suspended_time;
+ u64 accounting_timestamp;
#endif
struct pm_subsys_data *subsys_data; /* Owned by the subsystem. */
void (*set_latency_tolerance)(struct device *, s32);
--
2.7.4
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[Intel-gfx] [PATCH v5 1/3] PM/runtime: Add a new interface to get accounted time
Some drivers (like i915/drm) needs to get the accounted suspended time.
pm_runtime_suspended_time() will return the suspended accounted time
in ns unit.
Reviewed-by: Ulf Hansson
Signed-off-by: Vincent Guittot
---
drivers/base/power/runtime.c | 16
include/linux/pm_runtime.h | 2 ++
2 files changed, 18 insertions(+)
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index beb85c3..e695544 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -86,6 +86,22 @@ static void __update_runtime_status(struct device *dev, enum
rpm_status status)
dev->power.runtime_status = status;
}
+u64 pm_runtime_suspended_time(struct device *dev)
+{
+ unsigned long flags, time;
+
+ spin_lock_irqsave(>power.lock, flags);
+
+ update_pm_runtime_accounting(dev);
+
+ time = dev->power.suspended_jiffies;
+
+ spin_unlock_irqrestore(>power.lock, flags);
+
+ return jiffies_to_nsecs(time);
+}
+EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
+
/**
* pm_runtime_deactivate_timer - Deactivate given device's suspend timer.
* @dev: Device to handle.
diff --git a/include/linux/pm_runtime.h b/include/linux/pm_runtime.h
index f0fc470..d479707 100644
--- a/include/linux/pm_runtime.h
+++ b/include/linux/pm_runtime.h
@@ -113,6 +113,8 @@ static inline bool pm_runtime_is_irq_safe(struct device
*dev)
return dev->power.irq_safe;
}
+extern u64 pm_runtime_suspended_time(struct device *dev);
+
#else /* !CONFIG_PM */
static inline bool queue_pm_work(struct work_struct *work) { return false; }
--
2.7.4
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[Intel-gfx] [PATCH v5 0/3] Move pm_runtime accounted time to raw nsec
Move pm_runtime accounted time to raw nsec. The subject of the patchset has changed as the 1st patch of the previous version has been queued by Rafael. Patch 1 adds a new pm_runtime interface to get accounted suspended time Patch 2 moves drm/i915 driver on the new interface and removes access to internal fields. Patch 3 moves time accounting on raw ns. This patch initially used ktime instead of raw ns but it was easier to move i915 driver on raw ns than on ktime. Changes since v4: -Update commit message Changes since v3: - Rebase on v4.20-rc7 without patch that has been queued by Rafael - Simplify the new interface pm_runtime_suspended_time() Changes since v2: - remove patch1 that has been queued by rafael - add new interface in pm_runtime to get accounted time - reorder patchset to prevent compilation error Changes since v1: - updated commit message of patch 1 - Added patches 2 & 3 to move runtime_pm accounting on raw ns Thara Gopinath (1): PM/runtime:Replace jiffies based accounting with ktime based accounting Vincent Guittot (2): PM/runtime: Add a new interface to get accounted time drm/i915: Move on the new pm runtime interface drivers/base/power/runtime.c| 27 ++- drivers/base/power/sysfs.c | 11 --- drivers/gpu/drm/i915/i915_pmu.c | 16 ++-- drivers/gpu/drm/i915/i915_pmu.h | 4 ++-- include/linux/pm.h | 6 +++--- include/linux/pm_runtime.h | 2 ++ 6 files changed, 43 insertions(+), 23 deletions(-) -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 2/3] drm/i915: Move on the new pm runtime interface
Use the new pm runtime interface to get the accounted suspended time:
pm_runtime_suspended_time().
This new interface helps to simplify and cleanup the code that computes
__I915_SAMPLE_RC6_ESTIMATED and to remove direct access to internals of
PM runtime.
Reviewed-by: Ulf Hansson
Signed-off-by: Vincent Guittot
---
drivers/gpu/drm/i915/i915_pmu.c | 16 ++--
drivers/gpu/drm/i915/i915_pmu.h | 4 ++--
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index d6c8f8f..3f76f60 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include "i915_pmu.h"
#include "intel_ringbuffer.h"
#include "i915_drv.h"
@@ -478,7 +479,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
* counter value.
*/
spin_lock_irqsave(>pmu.lock, flags);
- spin_lock(>power.lock);
/*
* After the above branch intel_runtime_pm_get_if_in_use failed
@@ -491,16 +491,13 @@ static u64 get_rc6(struct drm_i915_private *i915)
* suspended and if not we cannot do better than report the last
* known RC6 value.
*/
- if (kdev->power.runtime_status == RPM_SUSPENDED) {
- if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
- i915->pmu.suspended_jiffies_last =
- kdev->power.suspended_jiffies;
+ if (pm_runtime_status_suspended(kdev)) {
+ val = pm_runtime_suspended_time(kdev);
- val = kdev->power.suspended_jiffies -
- i915->pmu.suspended_jiffies_last;
- val += jiffies - kdev->power.accounting_timestamp;
+ if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
+ i915->pmu.suspended_time_last = val;
- val = jiffies_to_nsecs(val);
+ val -= i915->pmu.suspended_time_last;
val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;
@@ -510,7 +507,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;
}
- spin_unlock(>power.lock);
spin_unlock_irqrestore(>pmu.lock, flags);
}
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index 7f164ca..3dc2a30 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -95,9 +95,9 @@ struct i915_pmu {
*/
struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
/**
-* @suspended_jiffies_last: Cached suspend time from PM core.
+* @suspended_time_last: Cached suspend time from PM core.
*/
- unsigned long suspended_jiffies_last;
+ u64 suspended_time_last;
/**
* @i915_attr: Memory block holding device attributes.
*/
--
2.7.4
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Re: [Intel-gfx] [PATCH v4 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting
Hi Rafael,
On Fri, 21 Dec 2018 at 09:58, Rafael J. Wysocki wrote:
>
> On Thu, Dec 20, 2018 at 11:03 PM Ulf Hansson wrote:
> >
> > On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> > wrote:
> > >
> > > From: Thara Gopinath
> > >
> > > This patch replaces jiffies based accounting for runtime_active_time
> > > and runtime_suspended_time with ktime base accounting. This makes the
> > > runtime debug counters inline with genpd and other pm subsytems which
> > > uses ktime based accounting.
> > >
> > > Signed-off-by: Thara Gopinath
> > > [move from ktime to raw nsec]
> > > Signed-off-by: Vincent Guittot
> > > ---
> > > drivers/base/power/runtime.c | 17 +
> > > drivers/base/power/sysfs.c | 11 ---
> > > include/linux/pm.h | 6 +++---
> > > 3 files changed, 20 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> > > index e695544..f700524 100644
> > > --- a/drivers/base/power/runtime.c
> > > +++ b/drivers/base/power/runtime.c
> > > @@ -64,8 +64,8 @@ static int rpm_suspend(struct device *dev, int
> > > rpmflags);
> > > */
> > > void update_pm_runtime_accounting(struct device *dev)
> > > {
> > > - unsigned long now = jiffies;
> > > - unsigned long delta;
> > > + u64 now = ktime_to_ns(ktime_get());
> > > + u64 delta;
> > >
> > > delta = now - dev->power.accounting_timestamp;
> > >
> > > @@ -75,9 +75,9 @@ void update_pm_runtime_accounting(struct device *dev)
> > > return;
> > >
> > > if (dev->power.runtime_status == RPM_SUSPENDED)
> > > - dev->power.suspended_jiffies += delta;
> > > + dev->power.suspended_time += delta;
> > > else
> > > - dev->power.active_jiffies += delta;
> > > + dev->power.active_time += delta;
> > > }
> > >
> > > static void __update_runtime_status(struct device *dev, enum rpm_status
> > > status)
> > > @@ -88,17 +88,18 @@ static void __update_runtime_status(struct device
> > > *dev, enum rpm_status status)
> > >
> > > u64 pm_runtime_suspended_time(struct device *dev)
> > > {
> > > - unsigned long flags, time;
> > > + u64 time;
> > > + unsigned long flags;
> > >
> > > spin_lock_irqsave(>power.lock, flags);
> > >
> > > update_pm_runtime_accounting(dev);
> > >
> > > - time = dev->power.suspended_jiffies;
> > > + time = dev->power.suspended_time;
> > >
> > > spin_unlock_irqrestore(>power.lock, flags);
> > >
> > > - return jiffies_to_nsecs(time);
> > > + return time;
> > > }
> > > EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
> > >
> > > @@ -1503,7 +1504,7 @@ void pm_runtime_init(struct device *dev)
> > > dev->power.request_pending = false;
> > > dev->power.request = RPM_REQ_NONE;
> > > dev->power.deferred_resume = false;
> > > - dev->power.accounting_timestamp = jiffies;
> > > + dev->power.accounting_timestamp = ktime_to_ns(ktime_get());
> >
> > This change worries me a bit, but it may not be a problem in practice.
> >
> > pm_runtime_init() is called when devices get initialized, via
> > device_initialize(). If timekeeping has not been initialized prior a
> > call to ktime_get() is done, it will fail and causing a NULL pointer
> > deference or something along those lines.
> >
> > In other words, do we know that device_initialize() is always called
> > after timekeeping has been initialized during boot?
>
> We do.
>
> timekeeping_init() is called early in start_kernel() which is way
> before driver_init() (and that's when devices can start to be
> initialized) called from rest_init() via kernel_init_freeable() and
> do_basic_setup().
Thanks for the confirmation. I'm going to add your answer in the
commit message so we will have the answer next time someone will
wonder
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Re: [Intel-gfx] [v2 14/14] drivers/video: Constantify function argument for HDMI infoframe log
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
Function argument for hdmi_drm_infoframe_log is made constant.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/video/hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 0937c8c..7ab8086 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -1383,8 +1383,8 @@ static void hdmi_audio_infoframe_log(const char *level,
* @frame: HDMI DRM infoframe
*/
static void hdmi_drm_infoframe_log(const char *level,
- struct device *dev,
- struct hdmi_drm_infoframe *frame)
+ struct device *dev,
+ const struct hdmi_drm_infoframe *frame)
Why not merge this patch with 8/14 drm: Enable HDR infoframe support ?
- Shashank
{
int i;
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Re: [Intel-gfx] [PATCH v4 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting
On Thu, Dec 20, 2018 at 11:03 PM Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > From: Thara Gopinath
> >
> > This patch replaces jiffies based accounting for runtime_active_time
> > and runtime_suspended_time with ktime base accounting. This makes the
> > runtime debug counters inline with genpd and other pm subsytems which
> > uses ktime based accounting.
> >
> > Signed-off-by: Thara Gopinath
> > [move from ktime to raw nsec]
> > Signed-off-by: Vincent Guittot
> > ---
> > drivers/base/power/runtime.c | 17 +
> > drivers/base/power/sysfs.c | 11 ---
> > include/linux/pm.h | 6 +++---
> > 3 files changed, 20 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> > index e695544..f700524 100644
> > --- a/drivers/base/power/runtime.c
> > +++ b/drivers/base/power/runtime.c
> > @@ -64,8 +64,8 @@ static int rpm_suspend(struct device *dev, int rpmflags);
> > */
> > void update_pm_runtime_accounting(struct device *dev)
> > {
> > - unsigned long now = jiffies;
> > - unsigned long delta;
> > + u64 now = ktime_to_ns(ktime_get());
> > + u64 delta;
> >
> > delta = now - dev->power.accounting_timestamp;
> >
> > @@ -75,9 +75,9 @@ void update_pm_runtime_accounting(struct device *dev)
> > return;
> >
> > if (dev->power.runtime_status == RPM_SUSPENDED)
> > - dev->power.suspended_jiffies += delta;
> > + dev->power.suspended_time += delta;
> > else
> > - dev->power.active_jiffies += delta;
> > + dev->power.active_time += delta;
> > }
> >
> > static void __update_runtime_status(struct device *dev, enum rpm_status
> > status)
> > @@ -88,17 +88,18 @@ static void __update_runtime_status(struct device *dev,
> > enum rpm_status status)
> >
> > u64 pm_runtime_suspended_time(struct device *dev)
> > {
> > - unsigned long flags, time;
> > + u64 time;
> > + unsigned long flags;
> >
> > spin_lock_irqsave(>power.lock, flags);
> >
> > update_pm_runtime_accounting(dev);
> >
> > - time = dev->power.suspended_jiffies;
> > + time = dev->power.suspended_time;
> >
> > spin_unlock_irqrestore(>power.lock, flags);
> >
> > - return jiffies_to_nsecs(time);
> > + return time;
> > }
> > EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
> >
> > @@ -1503,7 +1504,7 @@ void pm_runtime_init(struct device *dev)
> > dev->power.request_pending = false;
> > dev->power.request = RPM_REQ_NONE;
> > dev->power.deferred_resume = false;
> > - dev->power.accounting_timestamp = jiffies;
> > + dev->power.accounting_timestamp = ktime_to_ns(ktime_get());
>
> This change worries me a bit, but it may not be a problem in practice.
>
> pm_runtime_init() is called when devices get initialized, via
> device_initialize(). If timekeeping has not been initialized prior a
> call to ktime_get() is done, it will fail and causing a NULL pointer
> deference or something along those lines.
>
> In other words, do we know that device_initialize() is always called
> after timekeeping has been initialized during boot?
We do.
timekeeping_init() is called early in start_kernel() which is way
before driver_init() (and that's when devices can start to be
initialized) called from rest_init() via kernel_init_freeable() and
do_basic_setup().
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Re: [Intel-gfx] [v2 12/14] drm/i915: Enable infoframes on GLK+ for HDR
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
This patch enables infoframes on GLK+ to be
used to send HDR metadata to HDMI sink.
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/i915_reg.h | 4
drivers/gpu/drm/i915/intel_hdmi.c | 12 +---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0a7d605..6f44d02 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4591,6 +4591,7 @@ enum {
#define VIDEO_DIP_FREQ_MASK (3 << 16)
/* HSW and later: */
#define DRM_DIP_ENABLE (1 << 28)
+#define VIDEO_DIP_ENABLE_DRM_GLK (1 << 28)
#define PSR_VSC_BIT_7_SET (1 << 27)
#define VSC_SELECT_MASK (0x3 << 25)
#define VSC_SELECT_SHIFT25
@@ -8015,6 +8016,7 @@ enum {
#define _HSW_VIDEO_DIP_SPD_DATA_A 0x602A0
#define _HSW_VIDEO_DIP_GMP_DATA_A 0x602E0
#define _HSW_VIDEO_DIP_VSC_DATA_A 0x60320
+#define _GLK_VIDEO_DIP_DRM_DATA_A 0x60440
#define _HSW_VIDEO_DIP_AVI_ECC_A 0x60240
#define _HSW_VIDEO_DIP_VS_ECC_A 0x60280
#define _HSW_VIDEO_DIP_SPD_ECC_A 0x602C0
@@ -8028,6 +8030,7 @@ enum {
#define _HSW_VIDEO_DIP_SPD_DATA_B 0x612A0
#define _HSW_VIDEO_DIP_GMP_DATA_B 0x612E0
#define _HSW_VIDEO_DIP_VSC_DATA_B 0x61320
+#define _GLK_VIDEO_DIP_DRM_DATA_B 0x61440
#define _HSW_VIDEO_DIP_BVI_ECC_B 0x61240
#define _HSW_VIDEO_DIP_VS_ECC_B 0x61280
#define _HSW_VIDEO_DIP_SPD_ECC_B 0x612C0
@@ -8052,6 +8055,7 @@ enum {
#define HSW_TVIDEO_DIP_SPD_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_SPD_DATA_A + (i) * 4)
#define HSW_TVIDEO_DIP_GCP(trans) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_GCP_A)
#define HSW_TVIDEO_DIP_VSC_DATA(trans, i) _MMIO_TRANS2(trans,
_HSW_VIDEO_DIP_VSC_DATA_A + (i) * 4)
+#define GLK_TVIDEO_DIP_DRM_DATA(trans, i) _MMIO_TRANS2(trans,
_GLK_VIDEO_DIP_DRM_DATA_A + (i) * 4)
#define ICL_VIDEO_DIP_PPS_DATA(trans, i) _MMIO_TRANS2(trans,
_ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)
#define ICL_VIDEO_DIP_PPS_ECC(trans, i) _MMIO_TRANS2(trans,
_ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 6286c4a..5c2e3c9 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -123,6 +123,8 @@ static u32 hsw_infoframe_enable(unsigned int type)
return VIDEO_DIP_ENABLE_SPD_HSW;
case HDMI_INFOFRAME_TYPE_VENDOR:
return VIDEO_DIP_ENABLE_VS_HSW;
+ case HDMI_INFOFRAME_TYPE_DRM:
+ return VIDEO_DIP_ENABLE_DRM_GLK;
default:
MISSING_CASE(type);
return 0;
@@ -146,6 +148,8 @@ static u32 hsw_infoframe_enable(unsigned int type)
return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder, i);
case HDMI_INFOFRAME_TYPE_VENDOR:
return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i);
+ case HDMI_INFOFRAME_TYPE_DRM:
+ return GLK_TVIDEO_DIP_DRM_DATA(cpu_transcoder, i);
default:
MISSING_CASE(type);
return INVALID_MMIO_REG;
@@ -432,7 +436,8 @@ static bool hsw_infoframe_enabled(struct intel_encoder
*encoder,
return val & (VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |
- VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW);
+ VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW |
+ VIDEO_DIP_ENABLE_DRM_GLK);
}
/*
@@ -889,7 +894,8 @@ static void hsw_set_infoframes(struct intel_encoder
*encoder,
val &= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW |
VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |
-VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW);
+VIDEO_DIP_ENABLE_GMP_HSW | VIDEO_DIP_ENABLE_SPD_HSW |
+VIDEO_DIP_ENABLE_DRM_GLK);
if (!enable) {
I915_WRITE(reg, val);
@@ -908,7 +914,7 @@ static void hsw_set_infoframes(struct intel_encoder
*encoder,
intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);
/* Set Dynamic Range and Mastering Infoframe if supported and changed */
- if (conn_state->hdr_metadata_changed)
+ if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
Shouldn't this be
if ((INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) &&
conn_state->hdr_metadata_changed) ?
intel_hdmi_set_drm_infoframe(encoder, crtc_state, conn_state);
}
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Re: [Intel-gfx] [v2 11/14] drm/i915: Add HLG EOTF
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
From: Ville Syrjälä
ADD HLG EOTF to the list of EOTF transfer functions
supported.
Would it be possible to add some details about HLG ?
Signed-off-by: Ville Syrjälä
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 4 ++--
include/linux/hdmi.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5a7fc9b..fa86494 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3857,8 +3857,8 @@ static uint16_t eotf_supported(const u8 *edid_ext)
return edid_ext[2] &
(BIT(HDMI_EOTF_TRADITIONAL_GAMMA_SDR) |
BIT(HDMI_EOTF_TRADITIONAL_GAMMA_HDR) |
-BIT(HDMI_EOTF_SMPTE_ST2084));
-
+BIT(HDMI_EOTF_SMPTE_ST2084) |
+BIT(HDMI_EOTF_BT_2100_HLG));
}
static uint16_t hdr_metadata_type(const u8 *edid_ext)
diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
index ce00e1e..b5346c3 100644
--- a/include/linux/hdmi.h
+++ b/include/linux/hdmi.h
@@ -146,6 +146,7 @@ enum hdmi_eotf {
HDMI_EOTF_TRADITIONAL_GAMMA_SDR,
HDMI_EOTF_TRADITIONAL_GAMMA_HDR,
HDMI_EOTF_SMPTE_ST2084,
+ HDMI_EOTF_BT_2100_HLG,
};
struct hdmi_avi_infoframe {
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Re: [Intel-gfx] [v2 09/14] drm/i915: Write HDR infoframe and send to panel
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable writing of HDR metadata infoframe to panel.
The data will be provid by usersapace compositors, based
on blending policies and passsed to driver through a blob
property.
v2: Rebase
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_hdmi.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 8a1e5cb..6286c4a 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -475,6 +475,29 @@ static void intel_write_infoframe(struct intel_encoder
*encoder,
frame->any.type, buffer, len);
}
+/* Set Dynamic Range and Mastering Infoframe */
+static void intel_hdmi_set_drm_infoframe(struct drm_encoder *encoder,
+const struct intel_crtc_state
+*crtc_state,
+const struct drm_connector_state
+
We will need this function for lspcon too, if you want to add in a
different series, please add a TODO: here.
*conn_state)
+{
+ union hdmi_infoframe frame;
+ struct hdr_static_metadata *hdr_metadata;
+ int ret;
+
+ hdr_metadata = (struct hdr_static_metadata *)
+ conn_state->hdr_source_metadata_blob_ptr->data;
+
+ ret = drm_hdmi_infoframe_set_hdr_metadata(, hdr_metadata);
+ if (ret < 0) {
+ DRM_ERROR("couldn't set HDR metadata in infoframe\n");
+ return;
+ }
+
+ intel_write_infoframe(encoder, crtc_state, );
+}
+
static void intel_hdmi_set_avi_infoframe(struct intel_encoder *encoder,
const struct intel_crtc_state
*crtc_state,
const struct drm_connector_state
*conn_state)
@@ -883,6 +906,10 @@ static void hsw_set_infoframes(struct intel_encoder
*encoder,
intel_hdmi_set_avi_infoframe(encoder, crtc_state, conn_state);
intel_hdmi_set_spd_infoframe(encoder, crtc_state);
intel_hdmi_set_hdmi_infoframe(encoder, crtc_state, conn_state);
+
+ /* Set Dynamic Range and Mastering Infoframe if supported and changed */
+ if (conn_state->hdr_metadata_changed)
+ intel_hdmi_set_drm_infoframe(encoder, crtc_state, conn_state);
}
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable)
- Shashank
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Re: [Intel-gfx] [v2 08/14] drm: Enable HDR infoframe support
Regards
Shashank
On 12/12/2018 2:08 AM, Uma Shankar wrote:
Enable Dynamic Range and Mastering Infoframe for HDR
content, which is defined in CEA 861.3 spec.
The metadata will be computed based on blending
policy in userspace compositors and passed as a connector
property blob to driver. The same will be sent as infoframe
to panel which support HDR.
v2: Rebase and added Ville's POC changes.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_edid.c | 58
drivers/video/hdmi.c | 129 +
include/drm/drm_edid.h | 4 ++
include/linux/hdmi.h | 22
4 files changed, 213 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 344d8c1..5a7fc9b 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4916,6 +4916,64 @@ void drm_set_preferred_mode(struct drm_connector
*connector,
EXPORT_SYMBOL(drm_set_preferred_mode);
/**
+ * drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI AVI infoframe with
+ * HDR metadata from userspace
+ * @frame: HDMI AVI infoframe
+ * @hdr_source_metadata: hdr_source_metadata info from userspace
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int
+drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame,
+ void *hdr_metadata)
+{
+ struct hdr_static_metadata *hdr_source_metadata;
+ int err, i;
+
+ if (!frame || !hdr_metadata)
+ return -EINVAL;
+
+ err = hdmi_drm_infoframe_init(frame);
+ if (err < 0)
+ return err;
+
+ DRM_DEBUG_KMS("type = %x\n", frame->type);
+
+ hdr_source_metadata = (struct hdr_static_metadata *)hdr_metadata;
+
+ frame->length = sizeof(struct hdr_static_metadata);
+
+
+ frame->eotf = hdr_source_metadata->eotf;
+ frame->metadata_type = hdr_source_metadata->metadata_type;
+
+ for (i = 0; i < 3; i++) {
+ frame->display_primaries[i].x =
+ hdr_source_metadata->display_primaries[i].x;
+ frame->display_primaries[i].y =
+ hdr_source_metadata->display_primaries[i].y;
+ }
+
+ frame->white_point.x = hdr_source_metadata->white_point.x;
+ frame->white_point.y = hdr_source_metadata->white_point.y;
+
+ frame->max_mastering_display_luminance =
+ hdr_source_metadata->max_mastering_display_luminance;
+ frame->min_mastering_display_luminance =
+ hdr_source_metadata->min_mastering_display_luminance;
+
+ frame->max_cll = hdr_source_metadata->max_cll;
+ frame->max_fall = hdr_source_metadata->max_fall;
+
+ hdmi_infoframe_log(KERN_CRIT, NULL,
+ (union hdmi_infoframe *)frame);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata);
+
+
+/**
* drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe
with
* data from a DRM display mode
* @frame: HDMI AVI infoframe
diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
index 799ae49..0937c8c 100644
--- a/drivers/video/hdmi.c
+++ b/drivers/video/hdmi.c
@@ -650,6 +650,93 @@ ssize_t hdmi_vendor_infoframe_pack(struct
hdmi_vendor_infoframe *frame,
return 0;
}
+/**
+ * hdmi_drm_infoframe_init() - initialize an HDMI Dynaminc Range and
+ * mastering infoframe
+ * @frame: HDMI DRM infoframe
+ *
+ * Returns 0 on success or a negative error code on failure.
+ */
+int hdmi_drm_infoframe_init(struct hdmi_drm_infoframe *frame)
+{
+ memset(frame, 0, sizeof(*frame));
+
+ frame->type = HDMI_INFOFRAME_TYPE_DRM;
+ frame->version = 1;
+
+ return 0;
+}
+EXPORT_SYMBOL(hdmi_drm_infoframe_init);
+
+/**
+ * hdmi_drm_infoframe_pack() - write HDMI DRM infoframe to binary buffer
+ * @frame: HDMI DRM infoframe
+ * @buffer: destination buffer
+ * @size: size of buffer
+ *
+ * Packs the information contained in the @frame structure into a binary
+ * representation that can be written into the corresponding controller
+ * registers. Also computes the checksum as required by section 5.3.5 of
+ * the HDMI 1.4 specification.
+ *
+ * Returns the number of bytes packed into the binary buffer or a negative
+ * error code on failure.
+ */
+ssize_t hdmi_drm_infoframe_pack(struct hdmi_drm_infoframe *frame, void *buffer,
+ size_t size)
+{
+ u8 *ptr = buffer;
+ size_t length;
+ int i;
+
+ length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
+
+ if (size < length)
+ return -ENOSPC;
+
+ memset(buffer, 0, size);
+
+ ptr[0] = frame->type;
+ ptr[1] = frame->version;
+ ptr[2] = frame->length;
+ ptr[3] = 0; /* checksum */
+
+ /* start infoframe payload */
+ ptr += HDMI_INFOFRAME_HEADER_SIZE;
+
+ *ptr++ =
Re: [Intel-gfx] [PATCH v4 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting
On Thu, 20 Dec 2018 at 23:03, Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > From: Thara Gopinath
> >
> > This patch replaces jiffies based accounting for runtime_active_time
> > and runtime_suspended_time with ktime base accounting. This makes the
> > runtime debug counters inline with genpd and other pm subsytems which
> > uses ktime based accounting.
> >
> > Signed-off-by: Thara Gopinath
> > [move from ktime to raw nsec]
> > Signed-off-by: Vincent Guittot
> > ---
> > drivers/base/power/runtime.c | 17 +
> > drivers/base/power/sysfs.c | 11 ---
> > include/linux/pm.h | 6 +++---
> > 3 files changed, 20 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
> > index e695544..f700524 100644
> > --- a/drivers/base/power/runtime.c
> > +++ b/drivers/base/power/runtime.c
> > @@ -64,8 +64,8 @@ static int rpm_suspend(struct device *dev, int rpmflags);
> > */
> > void update_pm_runtime_accounting(struct device *dev)
> > {
> > - unsigned long now = jiffies;
> > - unsigned long delta;
> > + u64 now = ktime_to_ns(ktime_get());
> > + u64 delta;
> >
> > delta = now - dev->power.accounting_timestamp;
> >
> > @@ -75,9 +75,9 @@ void update_pm_runtime_accounting(struct device *dev)
> > return;
> >
> > if (dev->power.runtime_status == RPM_SUSPENDED)
> > - dev->power.suspended_jiffies += delta;
> > + dev->power.suspended_time += delta;
> > else
> > - dev->power.active_jiffies += delta;
> > + dev->power.active_time += delta;
> > }
> >
> > static void __update_runtime_status(struct device *dev, enum rpm_status
> > status)
> > @@ -88,17 +88,18 @@ static void __update_runtime_status(struct device *dev,
> > enum rpm_status status)
> >
> > u64 pm_runtime_suspended_time(struct device *dev)
> > {
> > - unsigned long flags, time;
> > + u64 time;
> > + unsigned long flags;
> >
> > spin_lock_irqsave(>power.lock, flags);
> >
> > update_pm_runtime_accounting(dev);
> >
> > - time = dev->power.suspended_jiffies;
> > + time = dev->power.suspended_time;
> >
> > spin_unlock_irqrestore(>power.lock, flags);
> >
> > - return jiffies_to_nsecs(time);
> > + return time;
> > }
> > EXPORT_SYMBOL_GPL(pm_runtime_suspended_time);
> >
> > @@ -1503,7 +1504,7 @@ void pm_runtime_init(struct device *dev)
> > dev->power.request_pending = false;
> > dev->power.request = RPM_REQ_NONE;
> > dev->power.deferred_resume = false;
> > - dev->power.accounting_timestamp = jiffies;
> > + dev->power.accounting_timestamp = ktime_to_ns(ktime_get());
>
> This change worries me a bit, but it may not be a problem in practice.
>
> pm_runtime_init() is called when devices get initialized, via
> device_initialize(). If timekeeping has not been initialized prior a
> call to ktime_get() is done, it will fail and causing a NULL pointer
> deference or something along those lines.
>
> In other words, do we know that device_initialize() is always called
> after timekeeping has been initialized during boot?
That something we discussed at lpc and we should be safe
>
> [...]
>
> Kind regards
> Uffe
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Re: [Intel-gfx] [PATCH v4 2/3] drm/i915: Move on the new pm runtime interface
On Thu, 20 Dec 2018 at 23:04, Ulf Hansson wrote:
>
> On Thu, 20 Dec 2018 at 15:17, Vincent Guittot
> wrote:
> >
> > Use the new pm runtime interface to get the accounted suspended time:
> > pm_runtime_accounted_time_get()
>
> pm_runtime_suspended_time()
>
> This change also makes quite some nice cleanups to the code, which is
> mostly because of converting to the new runtime PM API. I think the
> changelog deserves to state that, in some simple way.
ok
>
> >
> > Signed-off-by: Vincent Guittot
>
> Other than the minor things above:
>
> Reviewed-by: Ulf Hansson
>
> Kind regards
> Uffe
>
>
> > ---
> > drivers/gpu/drm/i915/i915_pmu.c | 16 ++--
> > drivers/gpu/drm/i915/i915_pmu.h | 4 ++--
> > 2 files changed, 8 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c
> > b/drivers/gpu/drm/i915/i915_pmu.c
> > index d6c8f8f..3f76f60 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -5,6 +5,7 @@
> > */
> >
> > #include
> > +#include
> > #include "i915_pmu.h"
> > #include "intel_ringbuffer.h"
> > #include "i915_drv.h"
> > @@ -478,7 +479,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
> > * counter value.
> > */
> > spin_lock_irqsave(>pmu.lock, flags);
> > - spin_lock(>power.lock);
> >
> > /*
> > * After the above branch intel_runtime_pm_get_if_in_use
> > failed
> > @@ -491,16 +491,13 @@ static u64 get_rc6(struct drm_i915_private *i915)
> > * suspended and if not we cannot do better than report the
> > last
> > * known RC6 value.
> > */
> > - if (kdev->power.runtime_status == RPM_SUSPENDED) {
> > - if
> > (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
> > - i915->pmu.suspended_jiffies_last =
> > -
> > kdev->power.suspended_jiffies;
> > + if (pm_runtime_status_suspended(kdev)) {
> > + val = pm_runtime_suspended_time(kdev);
> >
> > - val = kdev->power.suspended_jiffies -
> > - i915->pmu.suspended_jiffies_last;
> > - val += jiffies - kdev->power.accounting_timestamp;
> > + if
> > (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
> > + i915->pmu.suspended_time_last = val;
> >
> > - val = jiffies_to_nsecs(val);
> > + val -= i915->pmu.suspended_time_last;
> > val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
> >
> > i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur =
> > val;
> > @@ -510,7 +507,6 @@ static u64 get_rc6(struct drm_i915_private *i915)
> > val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;
> > }
> >
> > - spin_unlock(>power.lock);
> > spin_unlock_irqrestore(>pmu.lock, flags);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.h
> > b/drivers/gpu/drm/i915/i915_pmu.h
> > index 7f164ca..3dc2a30 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.h
> > +++ b/drivers/gpu/drm/i915/i915_pmu.h
> > @@ -95,9 +95,9 @@ struct i915_pmu {
> > */
> > struct i915_pmu_sample sample[__I915_NUM_PMU_SAMPLERS];
> > /**
> > -* @suspended_jiffies_last: Cached suspend time from PM core.
> > +* @suspended_time_last: Cached suspend time from PM core.
> > */
> > - unsigned long suspended_jiffies_last;
> > + u64 suspended_time_last;
> > /**
> > * @i915_attr: Memory block holding device attributes.
> > */
> > --
> > 2.7.4
> >
___
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