Re: [Intel-gfx] [v8 2/2] drm/i915: Attach colorspace property and enable modeset
Hello Ville,
On 1/29/2019 9:33 PM, Ville Syrjälä wrote:
On Tue, Jan 29, 2019 at 03:57:29PM +, Shankar, Uma wrote:
-Original Message-
From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
Ville Syrjälä
Sent: Tuesday, January 29, 2019 9:14 PM
To: Shankar, Uma
Cc: emil.l.veli...@gmail.com; intel-gfx@lists.freedesktop.org; Syrjala, Ville
; Lankhorst, Maarten ;
dri-de...@lists.freedesktop.org
Subject: Re: [v8 2/2] drm/i915: Attach colorspace property and enable modeset
On Tue, Jan 29, 2019 at 09:22:56PM +0530, Uma Shankar wrote:
This patch attaches the colorspace connector property to the hdmi
connector. Based on colorspace change, modeset will be triggered to
switch to new colorspace.
Based on colorspace property value create an infoframe with
appropriate colorspace. This can be used to send an infoframe packet
with proper colorspace value set which will help to enable wider color
gamut like BT2020 on sink.
This patch attaches and enables HDMI colorspace, DP will be taken care
separately.
v2: Merged the changes of creating infoframe as well to this patch as
per Maarten's suggestion.
v3: Addressed review comments from Shashank. Separated HDMI and DP
colorspaces as suggested by Ville and Maarten.
v4: Addressed Chris and Ville's review comments, and created a common
colorspace property for DP and HDMI, filtered the list based on the
colorspaces supported by the respective protocol standard. Handle the
default case properly.
v5: Added Platform specific colorspace enums and called the property
creation helper using the same.
v6: Addressed Shashank's review comments.
v7: Rebase
v8: Addressed Maarten's review comments.
Signed-off-by: Uma Shankar
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/i915/intel_atomic.c| 1 +
drivers/gpu/drm/i915/intel_connector.c | 63
++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdmi.c | 24 +
4 files changed, 89 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 16263ad..76b7114 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -124,6 +124,7 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
*/
if (new_conn_state->force_audio != old_conn_state->force_audio ||
new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb
||
+ new_state->colorspace != old_state->colorspace ||
new_conn_state->base.picture_aspect_ratio != old_conn_state-
base.picture_aspect_ratio ||
new_conn_state->base.content_type != old_conn_state-
base.content_type ||
new_conn_state->base.scaling_mode !=
old_conn_state->base.scaling_mode)
diff --git a/drivers/gpu/drm/i915/intel_connector.c
b/drivers/gpu/drm/i915/intel_connector.c
index ee16758..9a12d5e 100644
--- a/drivers/gpu/drm/i915/intel_connector.c
+++ b/drivers/gpu/drm/i915/intel_connector.c
@@ -30,6 +30,48 @@
#include "intel_drv.h"
#include "i915_drv.h"
+static const struct drm_prop_enum_list gen10_hdmi_colorspaces[] = {
+ /* For Default case, driver will set the colorspace */
+ { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+ /* Standard Definition Colorimetry based on CEA 861 */
+ { DRM_MODE_COLORIMETRY_ITU_601, "ITU_601" },
+ { DRM_MODE_COLORIMETRY_ITU_709, "ITU_709" },
+ /* Standard Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_601, "XV_YCC_601" },
+ /* High Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_709, "XV_YCC_709" },
+ /* Colorimetry based on IEC 61966-2-1/Amendment 1 */
+ { DRM_MODE_COLORIMETRY_S_YCC_601, "S_YCC_601" },
+ /* Colorimetry based on IEC 61966-2-5 [33] */
+ { DRM_MODE_COLORIMETRY_OPYCC_601, "opYCC_601" },
+ /* Colorimetry based on IEC 61966-2-5 */
+ { DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
+ /* Colorimetry based on ITU-R BT.2020 */
+ { DRM_MODE_COLORIMETRY_BT2020_RGB, "BT2020_RGB" },
+ /* Colorimetry based on ITU-R BT.2020 */
+ { DRM_MODE_COLORIMETRY_BT2020_YCC, "BT2020_YCC" },
+ /* Colorimetry based on ITU-R BT.2020 */
+ { DRM_MODE_COLORIMETRY_BT2020_CYCC, "BT2020_CYCC" }, };
+
+static const struct drm_prop_enum_list legacy_hdmi_colorspaces[] = {
+ /* For Default case, driver will set the colorspace */
+ { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+ /* Standard Definition Colorimetry based on CEA 861 */
+ { DRM_MODE_COLORIMETRY_ITU_601, "ITU_601" },
+ { DRM_MODE_COLORIMETRY_ITU_709, "ITU_709" },
+ /* Standard Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_601, "XV_YCC_601" },
+ /* High Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_709, "XV_YCC_709" },
+ /* Colorimetry ba
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] i915/selftest: Allow filtering of individual subtests
Quoting Chris Wilson (2019-01-30 01:44:58) > Take an environment variable, SELFTESTS=foo,bar, and pass that along to > the kernel (as i915.st_filter=foo,bar) to provide fine grained test > selection. This can be either as an exact match to select only that > test, or to exclude only test. For example, > > SELFTESTS=igt_vma_create,igt_vma_pin1 i915_selftest --run mock_vma > SELFTESTS=!igt_vma_create i915_selftest --run mock_vma > > v2: Replace NULL with the empty string. > > Signed-off-by: Chris Wilson Reviewed-by: Joonas Lahtinen Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset
== Series Details ==
Series: series starting with [01/11] drm/i915: Revoke mmaps and prevent access
to fence registers across reset
URL : https://patchwork.freedesktop.org/series/55956/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5506_full -> Patchwork_12083_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_12083_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12083_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_12083_full:
### IGT changes ###
Possible regressions
* igt@gem_eio@unwedge-stress:
- shard-glk: PASS -> FAIL +6
- shard-snb: PASS -> FAIL +1
- shard-apl: PASS -> FAIL +1
* igt@gem_eio@wait-wedge-1us:
- shard-kbl: PASS -> FAIL +1
Known issues
Here are the changes found in Patchwork_12083_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@in-flight-contexts-10ms:
- shard-snb: PASS -> FAIL [fdo#107799] +6
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: PASS -> FAIL [fdo#103232] +4
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@rc6-runtime-pm-long:
- shard-kbl: PASS -> FAIL [fdo#105010]
Possible fixes
* igt@gem_mmap_gtt@hang:
- shard-kbl: FAIL [fdo#109469] -> PASS
- shard-hsw: FAIL [fdo#109469] -> PASS
- shard-snb: FAIL [fdo#109469] -> PASS
- shard-glk: FAIL [fdo#109469] -> PASS
- shard-apl: FAIL [fdo#109469] -> PASS
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x64-dpms:
- shard-apl: FAIL [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: FAIL [fdo#108948] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS +1
- shard-apl: FAIL [fdo#103166] -> PASS +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#107799]: https://bugs.freedesktop.org/show_bug.cgi?id=107799
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109469]: https://bugs.freedesktop.org/show_bug.cgi?id=109469
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5506 -> Patchwork_12083
CI_DRM_5506: 864d26b6a3e3b28515324f330b2240391f86f458 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12083: 3a880e78d53731890ab3f0d64afef8c217a8c52c @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12083/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Apply LUT validation checks to platforms more accurately (rev2)
== Series Details ==
Series: drm/i915: Apply LUT validation checks to platforms more accurately
(rev2)
URL : https://patchwork.freedesktop.org/series/55765/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5506_full -> Patchwork_12082_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12082_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232] +4
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_flip@flip-vs-blocking-wf-vblank:
- shard-apl: PASS -> INCOMPLETE [fdo#103927]
* igt@kms_flip@flip-vs-modeset-interruptible:
- shard-kbl: PASS -> DMESG-WARN [fdo#103313] / [fdo#105345]
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@multiplane-rotation-cropping-top:
- shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
* igt@perf_pmu@rc6-runtime-pm-long:
- shard-kbl: PASS -> FAIL [fdo#105010]
Possible fixes
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-snb: INCOMPLETE [fdo#105411] -> PASS
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: FAIL [fdo#108948] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS
- shard-apl: FAIL [fdo#103166] -> PASS +2
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105345]: https://bugs.freedesktop.org/show_bug.cgi?id=105345
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5506 -> Patchwork_12082
CI_DRM_5506: 864d26b6a3e3b28515324f330b2240391f86f458 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12082: b09041f843be63c46d4098be4237f01ca77f0c6d @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12082/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset
== Series Details ==
Series: series starting with [01/11] drm/i915: Revoke mmaps and prevent access
to fence registers across reset
URL : https://patchwork.freedesktop.org/series/55956/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5506 -> Patchwork_12083
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55956/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12083 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_execlists:
- fi-apl-guc: NOTRUN -> INCOMPLETE [fdo#103927]
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: PASS -> FAIL [fdo#103182]
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#109485]
* igt@kms_flip@basic-flip-vs-modeset:
- fi-skl-6700hq: PASS -> DMESG-WARN [fdo#105998] +1
* igt@pm_rpm@module-reload:
- fi-skl-6770hq: PASS -> DMESG-WARN [fdo#105541]
Possible fixes
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: WARN [fdo#109380] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- fi-hsw-4770:{SKIP} [fdo#109271] -> PASS +3
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105541]: https://bugs.freedesktop.org/show_bug.cgi?id=105541
[fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (44 -> 41)
--
Additional (2): fi-byt-j1900 fi-apl-guc
Missing(5): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5506 -> Patchwork_12083
CI_DRM_5506: 864d26b6a3e3b28515324f330b2240391f86f458 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12083: 3a880e78d53731890ab3f0d64afef8c217a8c52c @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
3a880e78d537 drm/i915: Prioritise non-busywait semaphore workloads
136b83dc2f9c drm/i915: Use HW semaphores for inter-engine synchronisation on
gen8+
ad99d8227d36 drm/i915/execlists: Refactor out can_merge_rq()
69af025cbfc5 drm/i915: Keep timeline HWSP allocated until the system is idle
2dc94f068a5e drm/i915: Pull i915_gem_active into the i915_active family
c1155360bb39 drm/i915: Allocate active tracking nodes from a slabcache
31ec4b8fd5cb drm/i915: Add timeline barrier support
298a346378c9 drm/i915: Generalise GPU activity tracking
70551aa2b8d3 drm/i915/selftests: Exercise some AB...BA preemption chains
2c67b547d327 drm/i915/execlists: Suppress redundant preemption
45b1ecb63e1a drm/i915: Revoke mmaps and prevent access to fence registers
across reset
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12083/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset
== Series Details == Series: series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset URL : https://patchwork.freedesktop.org/series/55956/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Revoke mmaps and prevent access to fence registers across reset -drivers/gpu/drm/i915/i915_gem.c:986:39: warning: expression using sizeof(void) -drivers/gpu/drm/i915/i915_gem.c:986:39: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem.c:986:39: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_gem.c:986:39: warning: expression using sizeof(void) +drivers/gpu/drm/i915/i915_reset.c:1301:5: warning: context imbalance in 'i915_reset_lock' - different lock contexts for basic block +drivers/gpu/drm/i915/i915_reset.c:1322:6: warning: context imbalance in 'i915_reset_unlock' - unexpected unlock -drivers/gpu/drm/i915/selftests/../i915_drv.h:3548:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3542:16: warning: expression using sizeof(void) Commit: drm/i915/execlists: Suppress redundant preemption Okay! Commit: drm/i915/selftests: Exercise some AB...BA preemption chains Okay! Commit: drm/i915: Generalise GPU activity tracking +./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000 becomes 0) Commit: drm/i915: Add timeline barrier support Okay! Commit: drm/i915: Allocate active tracking nodes from a slabcache -drivers/gpu/drm/i915/selftests/../i915_drv.h:3542:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3544:16: warning: expression using sizeof(void) Commit: drm/i915: Pull i915_gem_active into the i915_active family Okay! Commit: drm/i915: Keep timeline HWSP allocated until the system is idle Okay! Commit: drm/i915/execlists: Refactor out can_merge_rq() Okay! Commit: drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+ Okay! Commit: drm/i915: Prioritise non-busywait semaphore workloads Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset
== Series Details == Series: series starting with [01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset URL : https://patchwork.freedesktop.org/series/55956/ State : warning == Summary == $ dim checkpatch origin/drm-tip 45b1ecb63e1a drm/i915: Revoke mmaps and prevent access to fence registers across reset 2c67b547d327 drm/i915/execlists: Suppress redundant preemption 70551aa2b8d3 drm/i915/selftests: Exercise some AB...BA preemption chains 298a346378c9 drm/i915: Generalise GPU activity tracking -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 -:36: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #36: FILE: drivers/gpu/drm/i915/i915_active.c:1: +/* -:268: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #268: FILE: drivers/gpu/drm/i915/i915_active.h:1: +/* -:340: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #340: FILE: drivers/gpu/drm/i915/i915_active_types.h:1: +/* -:695: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1 #695: FILE: drivers/gpu/drm/i915/selftests/i915_active.c:1: +/* total: 0 errors, 5 warnings, 0 checks, 793 lines checked 31ec4b8fd5cb drm/i915: Add timeline barrier support c1155360bb39 drm/i915: Allocate active tracking nodes from a slabcache 2dc94f068a5e drm/i915: Pull i915_gem_active into the i915_active family -:699: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #699: FILE: drivers/gpu/drm/i915/i915_gem_fence_reg.c:227: + ret = i915_active_request_retire(&vma->last_fence, &vma->obj->base.dev->struct_mutex); -:708: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #708: FILE: drivers/gpu/drm/i915/i915_gem_fence_reg.c:236: + ret = i915_active_request_retire(&old->last_fence, &old->obj->base.dev->struct_mutex); -:1415: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #1415: FILE: drivers/gpu/drm/i915/i915_vma.c:991: + ret = i915_active_request_retire(&vma->last_fence, + &vma->vm->i915->drm.struct_mutex); total: 0 errors, 0 warnings, 3 checks, 1398 lines checked 69af025cbfc5 drm/i915: Keep timeline HWSP allocated until the system is idle ad99d8227d36 drm/i915/execlists: Refactor out can_merge_rq() 136b83dc2f9c drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+ -:310: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #310: FILE: drivers/gpu/drm/i915/intel_gpu_commands.h:109: +#define MI_SEMAPHORE_SAD_GT_SDD (0<<12) ^ -:312: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #312: FILE: drivers/gpu/drm/i915/intel_gpu_commands.h:111: +#define MI_SEMAPHORE_SAD_LT_SDD (2<<12) ^ -:313: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #313: FILE: drivers/gpu/drm/i915/intel_gpu_commands.h:112: +#define MI_SEMAPHORE_SAD_LTE_SDD (3<<12) ^ -:314: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #314: FILE: drivers/gpu/drm/i915/intel_gpu_commands.h:113: +#define MI_SEMAPHORE_SAD_EQ_SDD (4<<12) ^ -:315: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV) #315: FILE: drivers/gpu/drm/i915/intel_gpu_commands.h:114: +#define MI_SEMAPHORE_SAD_NEQ_SDD (5<<12) ^ total: 0 errors, 0 warnings, 5 checks, 274 lines checked 3a880e78d537 drm/i915: Prioritise non-busywait semaphore workloads ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/11] drm/i915/execlists: Suppress redundant preemption
On unwinding the active request we give it a small (limited to internal
priority levels) boost to prevent it from being gazumped a second time.
However, this means that it can be promoted to above the request that
triggered the preemption request, causing a preempt-to-idle cycle for no
change. We can avoid this if we take the boost into account when
checking if the preemption request is valid.
v2: After preemption the active request will be after the preemptee if
they end up with equal priority.
v3: Tvrtko pointed out that this, the existing logic, makes
I915_PRIORITY_WAIT non-preemptible. Document this interesting quirk!
v4: Prove Tvrtko was right about WAIT being non-preemptible and test it.
v5: Except not all priorities were made equal, and the WAIT not preempting
is only if we start off as !NEWCLIENT.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 45 +-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 9 +-
drivers/gpu/drm/i915/selftests/intel_lrc.c | 159 +++
3 files changed, 208 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a9eb0211ce77..2616b0b3e8d5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -164,6 +164,8 @@
#define WA_TAIL_DWORDS 2
#define WA_TAIL_BYTES (sizeof(u32) * WA_TAIL_DWORDS)
+#define ACTIVE_PRIORITY (I915_PRIORITY_NEWCLIENT)
+
static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
struct intel_engine_cs *engine,
struct intel_context *ce);
@@ -188,6 +190,34 @@ static inline int rq_prio(const struct i915_request *rq)
return rq->sched.attr.priority;
}
+static inline int active_prio(const struct i915_request *rq)
+{
+ int prio = rq_prio(rq);
+
+ /*
+* On unwinding the active request, we give it a priority bump
+* equivalent to a freshly submitted request. This protects it from
+* being gazumped again, but it would be preferable if we didn't
+* let it be gazumped in the first place!
+*
+* See __unwind_incomplete_requests()
+*/
+ if ((prio & ACTIVE_PRIORITY) != ACTIVE_PRIORITY &&
+ i915_request_started(rq)) {
+ /*
+* After preemption, we insert the active request at the
+* end of the new priority level. This means that we will be
+* _lower_ priority than the preemptee all things equal (and
+* so the preemption is valid), so adjust our comparison
+* accordingly.
+*/
+ prio |= ACTIVE_PRIORITY;
+ prio--;
+ }
+
+ return prio;
+}
+
static int queue_prio(const struct intel_engine_execlists *execlists)
{
struct i915_priolist *p;
@@ -208,7 +238,7 @@ static int queue_prio(const struct intel_engine_execlists
*execlists)
static inline bool need_preempt(const struct intel_engine_cs *engine,
const struct i915_request *rq)
{
- const int last_prio = rq_prio(rq);
+ int last_prio;
if (!intel_engine_has_preemption(engine))
return false;
@@ -228,6 +258,7 @@ static inline bool need_preempt(const struct
intel_engine_cs *engine,
* preempt. If that hint is stale or we may be trying to preempt
* ourselves, ignore the request.
*/
+ last_prio = active_prio(rq);
if (!__execlists_need_preempt(engine->execlists.queue_priority_hint,
last_prio))
return false;
@@ -353,7 +384,7 @@ __unwind_incomplete_requests(struct intel_engine_cs *engine)
{
struct i915_request *rq, *rn, *active = NULL;
struct list_head *uninitialized_var(pl);
- int prio = I915_PRIORITY_INVALID | I915_PRIORITY_NEWCLIENT;
+ int prio = I915_PRIORITY_INVALID | ACTIVE_PRIORITY;
lockdep_assert_held(&engine->timeline.lock);
@@ -384,9 +415,15 @@ __unwind_incomplete_requests(struct intel_engine_cs
*engine)
* The active request is now effectively the start of a new client
* stream, so give it the equivalent small priority bump to prevent
* it being gazumped a second time by another peer.
+*
+* One consequence of this preemption boost is that we may jump
+* over lesser priorities (such as I915_PRIORITY_WAIT), effectively
+* making those priorities non-preemptible. They will be moved forward
+* in the priority queue, but they will not gain immediate access to
+* the GPU.
*/
- if (!(prio & I915_PRIORITY_NEWCLIENT)) {
- prio |= I915_PRIORITY_NEWCLIENT;
+ if ((prio & ACTIVE_PRIORITY) != ACTIVE_PRIORITY) {
+ prio |= ACTIVE_PRIORITY;
active->sched.attr.priority = prio;
[Intel-gfx] [PATCH 01/11] drm/i915: Revoke mmaps and prevent access to fence registers across reset
Previously, we were able to rely on the recursive properties of
struct_mutex to allow us to serialise revoking mmaps and reacquiring the
FENCE registers with them being clobbered over a global device reset.
I then proceeded to throw out the baby with the bath water in order to
pursue a struct_mutex-less reset.
Perusing LWN for alternative strategies, the dilemma on how to serialise
access to a global resource on one side was answered by
https://lwn.net/Articles/202847/ -- Sleepable RCU:
1 int readside(void) {
2 int idx;
3 rcu_read_lock();
4 if (nomoresrcu) {
5 rcu_read_unlock();
6 return -EINVAL;
7 }
8 idx = srcu_read_lock(&ss);
9 rcu_read_unlock();
10 /* SRCU read-side critical section. */
11 srcu_read_unlock(&ss, idx);
12 return 0;
13 }
14
15 void cleanup(void)
16 {
17 nomoresrcu = 1;
18 synchronize_rcu();
19 synchronize_srcu(&ss);
20 cleanup_srcu_struct(&ss);
21 }
No more worrying about stop_machine, just an uber-complex mutex,
optimised for reads, with the overhead pushed to the rare reset path.
However, we do run the risk of a deadlock as we allocate underneath the
SRCU read lock, and the allocation may require a GPU reset, causing a
dependency cycle via the in-flight requests. We resolve that by declaring
the driver wedged and cancelling all in-flight rendering.
Testcase: igt/gem_mmap_gtt/hang
Fixes: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 +--
drivers/gpu/drm/i915/i915_drv.h | 18 ++--
drivers/gpu/drm/i915/i915_gem.c | 56 +++
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 26 -
drivers/gpu/drm/i915/i915_gpu_error.h | 12 +--
drivers/gpu/drm/i915/i915_reset.c | 96 ---
drivers/gpu/drm/i915/i915_reset.h | 4 +
.../gpu/drm/i915/selftests/mock_gem_device.c | 1 +
8 files changed, 93 insertions(+), 132 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index fa2c226fc779..2cea263b4d79 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1281,14 +1281,11 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
intel_wakeref_t wakeref;
enum intel_engine_id id;
+ seq_printf(m, "Reset flags: %lx\n", dev_priv->gpu_error.flags);
if (test_bit(I915_WEDGED, &dev_priv->gpu_error.flags))
- seq_puts(m, "Wedged\n");
+ seq_puts(m, "\tWedged\n");
if (test_bit(I915_RESET_BACKOFF, &dev_priv->gpu_error.flags))
- seq_puts(m, "Reset in progress: struct_mutex backoff\n");
- if (waitqueue_active(&dev_priv->gpu_error.wait_queue))
- seq_puts(m, "Waiter holding struct mutex\n");
- if (waitqueue_active(&dev_priv->gpu_error.reset_queue))
- seq_puts(m, "struct_mutex blocked for reset\n");
+ seq_puts(m, "\tDevice (global) reset in progress\n");
if (!i915_modparams.enable_hangcheck) {
seq_puts(m, "Hangcheck disabled\n");
@@ -3885,9 +3882,6 @@ i915_wedged_set(void *data, u64 val)
* while it is writing to 'i915_wedged'
*/
- if (i915_reset_backoff(&i915->gpu_error))
- return -EAGAIN;
-
i915_handle_error(i915, val, I915_ERROR_CAPTURE,
"Manually set wedged engine mask = %llx", val);
return 0;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d072f3369ee1..8ec28a7f5452 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2986,7 +2986,12 @@ i915_gem_obj_finish_shmem_access(struct
drm_i915_gem_object *obj)
i915_gem_object_unpin_pages(obj);
}
-int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
+static inline int __must_check
+i915_mutex_lock_interruptible(struct drm_device *dev)
+{
+ return mutex_lock_interruptible(&dev->struct_mutex);
+}
+
int i915_gem_dumb_create(struct drm_file *file_priv,
struct drm_device *dev,
struct drm_mode_create_dumb *args);
@@ -3003,21 +3008,11 @@ int __must_check i915_gem_set_global_seqno(struct
drm_device *dev, u32 seqno);
struct i915_request *
i915_gem_find_active_request(struct intel_engine_cs *engine);
-static inline bool i915_reset_backoff(struct i915_gpu_error *error)
-{
- return unlikely(test_bit(I915_RESET_BACKOFF, &error->flags));
-}
-
static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
{
return unlikely(test_bit(I915_WEDGED, &error->flags));
}
-static inline bool i915_reset_backoff_or_wedged(struct i915_gpu_error *error)
-{
- return i915_reset_backoff(error) | i915_termi
[Intel-gfx] [PATCH 09/11] drm/i915/execlists: Refactor out can_merge_rq()
In the next patch, we add another user that wants to check whether
requests can be merge into a single HW execution, and in the future we
want to add more conditions under which requests from the same context
cannot be merge. In preparation, extract out can_merge_rq().
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_lrc.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 2616b0b3e8d5..e97ce54138d3 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -285,12 +285,11 @@ static inline bool need_preempt(const struct
intel_engine_cs *engine,
}
__maybe_unused static inline bool
-assert_priority_queue(const struct intel_engine_execlists *execlists,
- const struct i915_request *prev,
+assert_priority_queue(const struct i915_request *prev,
const struct i915_request *next)
{
- if (!prev)
- return true;
+ const struct intel_engine_execlists *execlists =
+ &prev->engine->execlists;
/*
* Without preemption, the prev may refer to the still active element
@@ -601,6 +600,17 @@ static bool can_merge_ctx(const struct intel_context *prev,
return true;
}
+static bool can_merge_rq(const struct i915_request *prev,
+const struct i915_request *next)
+{
+ GEM_BUG_ON(!assert_priority_queue(prev, next));
+
+ if (!can_merge_ctx(prev->hw_context, next->hw_context))
+ return false;
+
+ return true;
+}
+
static void port_assign(struct execlist_port *port, struct i915_request *rq)
{
GEM_BUG_ON(rq == port_request(port));
@@ -753,8 +763,6 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
int i;
priolist_for_each_request_consume(rq, rn, p, i) {
- GEM_BUG_ON(!assert_priority_queue(execlists, last, rq));
-
/*
* Can we combine this request with the current port?
* It has to be the same context/ringbuffer and not
@@ -766,8 +774,10 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
* second request, and so we never need to tell the
* hardware about the first.
*/
- if (last &&
- !can_merge_ctx(rq->hw_context, last->hw_context)) {
+ if (last && !can_merge_rq(last, rq)) {
+ if (last->hw_context == rq->hw_context)
+ goto done;
+
/*
* If we are on the second port and cannot
* combine this request with the last, then we
@@ -787,7 +797,6 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
ctx_single_port_submission(rq->hw_context))
goto done;
- GEM_BUG_ON(last->hw_context == rq->hw_context);
if (submit)
port_assign(port, last);
@@ -827,8 +836,7 @@ static void execlists_dequeue(struct intel_engine_cs
*engine)
* request triggering preemption on the next dequeue (or subsequent
* interrupt for secondary ports).
*/
- execlists->queue_priority_hint =
- port != execlists->port ? rq_prio(last) : INT_MIN;
+ execlists->queue_priority_hint = queue_prio(execlists);
if (submit) {
port_assign(port, last);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 10/11] drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+
Having introduced per-context seqno, we now have a means to identity
progress across the system without feel of rollback as befell the
global_seqno. That is we can program a MI_SEMAPHORE_WAIT operation in
advance of submission safe in the knowledge that our target seqno and
address is stable.
However, since we are telling the GPU to busy-spin on the target address
until it matches the signaling seqno, we only want to do so when we are
sure that busy-spin will be completed quickly. To achieve this we only
submit the request to HW once the signaler is itself executing (modulo
preemption causing us to wait longer), and we only do so for default and
above priority requests (so that idle priority tasks never themselves
hog the GPU waiting for others).
But what AB-BA deadlocks? If you remove B, there can be no deadlock...
The issue is that with a deep ELSP queue, we can queue up a pair of
AB-BA on different engines, thus forming a classic mutual exclusion
deadlock. We side-step that issue by restricting the queue depth to
avoid having multiple semaphores in flight and so we only ever take one
set of locks at a time.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 153 +-
drivers/gpu/drm/i915/i915_request.h | 1 +
drivers/gpu/drm/i915/i915_scheduler.c | 1 +
drivers/gpu/drm/i915/i915_scheduler.h | 1 +
drivers/gpu/drm/i915/i915_sw_fence.c | 4 +-
drivers/gpu/drm/i915/i915_sw_fence.h | 3 +
drivers/gpu/drm/i915/intel_gpu_commands.h | 5 +
drivers/gpu/drm/i915/intel_lrc.c | 14 +-
8 files changed, 178 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 07e4c3c68ecd..6d825cd28ae6 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -22,8 +22,9 @@
*
*/
-#include
#include
+#include
+#include
#include
#include
#include
@@ -326,6 +327,76 @@ void i915_request_retire_upto(struct i915_request *rq)
} while (tmp != rq);
}
+struct execute_cb {
+ struct list_head link;
+ struct irq_work work;
+ struct i915_sw_fence *fence;
+};
+
+static void irq_execute_cb(struct irq_work *wrk)
+{
+ struct execute_cb *cb = container_of(wrk, typeof(*cb), work);
+
+ i915_sw_fence_complete(cb->fence);
+ kfree(cb);
+}
+
+static void __notify_execute_cb(struct i915_request *rq)
+{
+ struct execute_cb *cb;
+
+ lockdep_assert_held(&rq->lock);
+
+ if (list_empty(&rq->execute_cb))
+ return;
+
+ list_for_each_entry(cb, &rq->execute_cb, link)
+ irq_work_queue(&cb->work);
+
+ /*
+* XXX Rollback on __i915_request_unsubmit()
+*
+* In the future, perhaps when we have an active time-slicing scheduler,
+* it will be interesting to unsubmit parallel execution and remove
+* busywaits from the GPU until their master is restarted. This is
+* quite hairy, we have to carefully rollback the fence and do a
+* preempt-to-idle cycle on the target engine, all the while the
+* master execute_cb may refire.
+*/
+ INIT_LIST_HEAD(&rq->execute_cb);
+}
+
+static int
+i915_request_await_execution(struct i915_request *rq,
+struct i915_request *signal,
+gfp_t gfp)
+{
+ struct execute_cb *cb;
+ unsigned long flags;
+
+ if (test_bit(I915_FENCE_FLAG_ACTIVE, &signal->fence.flags))
+ return 0;
+
+ cb = kmalloc(sizeof(*cb), gfp);
+ if (!cb)
+ return -ENOMEM;
+
+ cb->fence = &rq->submit;
+ i915_sw_fence_await(cb->fence);
+ init_irq_work(&cb->work, irq_execute_cb);
+
+ spin_lock_irqsave(&signal->lock, flags);
+ if (test_bit(I915_FENCE_FLAG_ACTIVE, &signal->fence.flags)) {
+ i915_sw_fence_complete(cb->fence);
+ kfree(cb);
+ } else {
+ list_add_tail(&cb->link, &signal->execute_cb);
+ }
+ spin_unlock_irqrestore(&signal->lock, flags);
+
+ return 0;
+}
+
static void move_to_timeline(struct i915_request *request,
struct i915_timeline *timeline)
{
@@ -373,6 +444,7 @@ void __i915_request_submit(struct i915_request *request)
if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags) &&
!i915_request_enable_breadcrumb(request))
intel_engine_queue_breadcrumbs(engine);
+ __notify_execute_cb(request);
spin_unlock(&request->lock);
engine->emit_fini_breadcrumb(request,
@@ -613,6 +685,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
}
INIT_LIST_HEAD(&rq->active_list);
+ INIT_LIST_HEAD(&rq->execute_cb);
tl = ce->ring->timeline;
ret = i915_timeline_get_seqno(tl, rq, &seqno);
@@ -700,6 +773,81 @@ i915_request_alloc(s
[Intel-gfx] [PATCH 08/11] drm/i915: Keep timeline HWSP allocated until the system is idle
In preparation for enabling HW semaphores, we need to keep in flight
timeline HWSP alive until the entire system is idle, as any other
timeline active on the GPU may still refer back to the already retired
timeline. We both have to delay recycling available cachelines and
unpinning old HWSP until the next idle point (i.e. on parking).
That we have to keep the HWSP alive for external references on HW raises
an interesting conundrum. On a busy system, we may never see a global
idle point, essentially meaning the resource will be leaking until we
are forced to sleep. What we need is a set of RCU primitives for the GPU!
This should also help mitigate the resource starvation issues
promulgating from keeping all logical state pinned until idle (instead
of as currently handled until the next context switch).
v2: Use idle barriers to free stale HWSP as soon as all current requests
are idle, rather than rely on the system reaching a global idle point.
(Tvrtko)
v3: Replace the idle barrier with read locks.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 30 ++--
drivers/gpu/drm/i915/i915_timeline.c | 229 +--
drivers/gpu/drm/i915/i915_timeline.h | 9 +-
3 files changed, 237 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index a09f47ccc703..07e4c3c68ecd 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -326,11 +326,6 @@ void i915_request_retire_upto(struct i915_request *rq)
} while (tmp != rq);
}
-static u32 timeline_get_seqno(struct i915_timeline *tl)
-{
- return tl->seqno += 1 + tl->has_initial_breadcrumb;
-}
-
static void move_to_timeline(struct i915_request *request,
struct i915_timeline *timeline)
{
@@ -539,8 +534,10 @@ struct i915_request *
i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context
*ctx)
{
struct drm_i915_private *i915 = engine->i915;
- struct i915_request *rq;
struct intel_context *ce;
+ struct i915_timeline *tl;
+ struct i915_request *rq;
+ u32 seqno;
int ret;
lockdep_assert_held(&i915->drm.struct_mutex);
@@ -615,24 +612,26 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
}
}
- rq->rcustate = get_state_synchronize_rcu();
-
INIT_LIST_HEAD(&rq->active_list);
+
+ tl = ce->ring->timeline;
+ ret = i915_timeline_get_seqno(tl, rq, &seqno);
+ if (ret)
+ goto err_free;
+
rq->i915 = i915;
rq->engine = engine;
rq->gem_context = ctx;
rq->hw_context = ce;
rq->ring = ce->ring;
- rq->timeline = ce->ring->timeline;
+ rq->timeline = tl;
GEM_BUG_ON(rq->timeline == &engine->timeline);
- rq->hwsp_seqno = rq->timeline->hwsp_seqno;
+ rq->hwsp_seqno = tl->hwsp_seqno;
+ rq->rcustate = get_state_synchronize_rcu(); /* acts as smp_mb() */
spin_lock_init(&rq->lock);
- dma_fence_init(&rq->fence,
- &i915_fence_ops,
- &rq->lock,
- rq->timeline->fence_context,
- timeline_get_seqno(rq->timeline));
+ dma_fence_init(&rq->fence, &i915_fence_ops, &rq->lock,
+ tl->fence_context, seqno);
/* We bump the ref for the fence chain */
i915_sw_fence_init(&i915_request_get(rq)->submit, submit_notify);
@@ -693,6 +692,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
GEM_BUG_ON(!list_empty(&rq->sched.signalers_list));
GEM_BUG_ON(!list_empty(&rq->sched.waiters_list));
+err_free:
kmem_cache_free(i915->requests, rq);
err_unreserve:
unreserve_gt(i915);
diff --git a/drivers/gpu/drm/i915/i915_timeline.c
b/drivers/gpu/drm/i915/i915_timeline.c
index b2202d2e58a2..fd1a92a3663d 100644
--- a/drivers/gpu/drm/i915/i915_timeline.c
+++ b/drivers/gpu/drm/i915/i915_timeline.c
@@ -6,19 +6,28 @@
#include "i915_drv.h"
-#include "i915_timeline.h"
+#include "i915_active.h"
#include "i915_syncmap.h"
+#include "i915_timeline.h"
struct i915_timeline_hwsp {
- struct i915_vma *vma;
+ struct i915_gt_timelines *gt;
struct list_head free_link;
+ struct i915_vma *vma;
u64 free_bitmap;
};
-static inline struct i915_timeline_hwsp *
-i915_timeline_hwsp(const struct i915_timeline *tl)
+struct i915_timeline_cacheline {
+ struct i915_active active;
+ struct i915_timeline_hwsp *hwsp;
+ unsigned int cacheline : 6;
+ unsigned int free : 1;
+};
+
+static inline struct drm_i915_private *
+hwsp_to_i915(struct i915_timeline_hwsp *hwsp)
{
- return tl->hwsp_ggtt->private;
+ return container_of(hwsp->gt, struct drm_i915_private, gt.timelines);
}
static struct i915_vma *__hwsp_alloc(struct drm_i915_private *i915)
@
[Intel-gfx] [PATCH 05/11] drm/i915: Add timeline barrier support
From: Tvrtko Ursulin
Timeline barrier allows serialization between different timelines.
After calling i915_timeline_set_barrier with a request, all following
submissions on this timeline will be set up as depending on this request,
or barrier. Once the barrier has been completed it automatically gets
cleared and things continue as normal.
This facility will be used by the upcoming context SSEU code.
v2:
* Assert barrier has been retired on timeline_fini. (Chris Wilson)
* Fix mock_timeline.
v3:
* Improved comment language. (Chris Wilson)
v4:
* Maintain ordering with previous barriers set on the timeline.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
Cc: Chris Wilson
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 17 ++
drivers/gpu/drm/i915/i915_timeline.c | 21 ++
drivers/gpu/drm/i915/i915_timeline.h | 22 +++
.../gpu/drm/i915/selftests/mock_timeline.c| 1 +
4 files changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 9ed5baf157a3..4b1869295362 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -526,6 +526,19 @@ i915_request_alloc_slow(struct intel_context *ce)
return kmem_cache_alloc(ce->gem_context->i915->requests, GFP_KERNEL);
}
+static int add_barrier(struct i915_request *rq, struct i915_gem_active *active)
+{
+ struct i915_request *barrier =
+ i915_gem_active_raw(active, &rq->i915->drm.struct_mutex);
+
+ return barrier ? i915_request_await_dma_fence(rq, &barrier->fence) : 0;
+}
+
+static int add_timeline_barrier(struct i915_request *rq)
+{
+ return add_barrier(rq, &rq->timeline->barrier);
+}
+
/**
* i915_request_alloc - allocate a request structure
*
@@ -668,6 +681,10 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
*/
rq->head = rq->ring->emit;
+ ret = add_timeline_barrier(rq);
+ if (ret)
+ goto err_unwind;
+
ret = engine->request_alloc(rq);
if (ret)
goto err_unwind;
diff --git a/drivers/gpu/drm/i915/i915_timeline.c
b/drivers/gpu/drm/i915/i915_timeline.c
index 5ea3af393ffe..b354843a5040 100644
--- a/drivers/gpu/drm/i915/i915_timeline.c
+++ b/drivers/gpu/drm/i915/i915_timeline.c
@@ -163,6 +163,7 @@ int i915_timeline_init(struct drm_i915_private *i915,
spin_lock_init(&timeline->lock);
+ init_request_active(&timeline->barrier, NULL);
init_request_active(&timeline->last_request, NULL);
INIT_LIST_HEAD(&timeline->requests);
@@ -235,6 +236,7 @@ void i915_timeline_fini(struct i915_timeline *timeline)
{
GEM_BUG_ON(timeline->pin_count);
GEM_BUG_ON(!list_empty(&timeline->requests));
+ GEM_BUG_ON(i915_gem_active_isset(&timeline->barrier));
i915_syncmap_free(&timeline->sync);
hwsp_free(timeline);
@@ -266,6 +268,25 @@ i915_timeline_create(struct drm_i915_private *i915,
return timeline;
}
+int i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request
*rq)
+{
+ struct i915_request *old;
+ int err;
+
+ lockdep_assert_held(&rq->i915->drm.struct_mutex);
+
+ /* Must maintain ordering wrt existing barriers */
+ old = i915_gem_active_raw(&tl->barrier, &rq->i915->drm.struct_mutex);
+ if (old) {
+ err = i915_request_await_dma_fence(rq, &old->fence);
+ if (err)
+ return err;
+ }
+
+ i915_gem_active_set(&tl->barrier, rq);
+ return 0;
+}
+
int i915_timeline_pin(struct i915_timeline *tl)
{
int err;
diff --git a/drivers/gpu/drm/i915/i915_timeline.h
b/drivers/gpu/drm/i915/i915_timeline.h
index 8caeb66d1cd5..d167e04073c5 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -74,6 +74,16 @@ struct i915_timeline {
*/
struct i915_syncmap *sync;
+ /**
+* Barrier provides the ability to serialize ordering between different
+* timelines.
+*
+* Users can call i915_timeline_set_barrier which will make all
+* subsequent submissions to this timeline be executed only after the
+* barrier has been completed.
+*/
+ struct i915_gem_active barrier;
+
struct list_head link;
const char *name;
struct drm_i915_private *i915;
@@ -155,4 +165,16 @@ void i915_timelines_init(struct drm_i915_private *i915);
void i915_timelines_park(struct drm_i915_private *i915);
void i915_timelines_fini(struct drm_i915_private *i915);
+/**
+ * i915_timeline_set_barrier - orders submission between different timelines
+ * @timeline: timeline to set the barrier on
+ * @rq: request after which new submissions can proceed
+ *
+ * Sets the passed in request as the serialization point for all subsequent
+ * submissions
[Intel-gfx] [PATCH 07/11] drm/i915: Pull i915_gem_active into the i915_active family
Looking forward, we need to break the struct_mutex dependency on
i915_gem_active. In the meantime, external use of i915_gem_active is
quite beguiling, little do new users suspect that it implies a barrier
as each request it tracks must be ordered wrt the previous one. As one
of many, it can be used to track activity across multiple timelines, a
shared fence, which fits our unordered request submission much better. We
need to steer external users away from the singular, exclusive fence
imposed by i915_gem_active to i915_active instead. As part of that
process, we move i915_gem_active out of i915_request.c into
i915_active.c to start separating the two concepts, and rename it to
i915_active_request (both to tie it to the concept of tracking just one
request, and to give it a longer, less appealing name).
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c| 64 ++-
drivers/gpu/drm/i915/i915_active.h| 348
drivers/gpu/drm/i915/i915_active_types.h | 13 +-
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 10 +-
drivers/gpu/drm/i915/i915_gem_context.c | 4 +-
drivers/gpu/drm/i915/i915_gem_fence_reg.c | 4 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_gem_object.h| 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 10 +-
drivers/gpu/drm/i915/i915_request.c | 35 +-
drivers/gpu/drm/i915/i915_request.h | 383 --
drivers/gpu/drm/i915/i915_reset.c | 2 +-
drivers/gpu/drm/i915/i915_timeline.c | 25 +-
drivers/gpu/drm/i915/i915_timeline.h | 14 +-
drivers/gpu/drm/i915/i915_vma.c | 12 +-
drivers/gpu/drm/i915/i915_vma.h | 2 +-
drivers/gpu/drm/i915/intel_engine_cs.c| 2 +-
drivers/gpu/drm/i915/intel_overlay.c | 33 +-
drivers/gpu/drm/i915/selftests/intel_lrc.c| 4 +-
.../gpu/drm/i915/selftests/mock_timeline.c| 4 +-
21 files changed, 473 insertions(+), 502 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
index 3c7abbde42ac..007098e44959 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -12,7 +12,7 @@
#define BKL(ref) (&i915_from_gt((ref)->gt)->drm.struct_mutex)
struct active_node {
- struct i915_gem_active base;
+ struct i915_active_request base;
struct i915_active *ref;
struct rb_node node;
u64 timeline;
@@ -27,18 +27,18 @@ __active_retire(struct i915_active *ref)
}
static void
-node_retire(struct i915_gem_active *base, struct i915_request *rq)
+node_retire(struct i915_active_request *base, struct i915_request *rq)
{
__active_retire(container_of(base, struct active_node, base)->ref);
}
static void
-last_retire(struct i915_gem_active *base, struct i915_request *rq)
+last_retire(struct i915_active_request *base, struct i915_request *rq)
{
__active_retire(container_of(base, struct i915_active, last));
}
-static struct i915_gem_active *
+static struct i915_active_request *
active_instance(struct i915_active *ref, u64 idx)
{
struct active_node *node;
@@ -59,7 +59,7 @@ active_instance(struct i915_active *ref, u64 idx)
* twice for the same timeline (as the older rbtree element will be
* retired before the new request added to last).
*/
- old = i915_gem_active_raw(&ref->last, BKL(ref));
+ old = i915_active_request_raw(&ref->last, BKL(ref));
if (!old || old->fence.context == idx)
goto out;
@@ -84,7 +84,7 @@ active_instance(struct i915_active *ref, u64 idx)
node = kmem_cache_alloc(ref->gt->slab_cache, GFP_KERNEL);
/* kmalloc may retire the ref->last (thanks shrinker)! */
- if (unlikely(!i915_gem_active_raw(&ref->last, BKL(ref {
+ if (unlikely(!i915_active_request_raw(&ref->last, BKL(ref {
kmem_cache_free(ref->gt->slab_cache, node);
goto out;
}
@@ -92,7 +92,7 @@ active_instance(struct i915_active *ref, u64 idx)
if (unlikely(!node))
return ERR_PTR(-ENOMEM);
- init_request_active(&node->base, node_retire);
+ i915_active_request_init(&node->base, NULL, node_retire);
node->ref = ref;
node->timeline = idx;
@@ -110,7 +110,7 @@ active_instance(struct i915_active *ref, u64 idx)
* callback not two, and so much undo the active counting for the
* overwritten slot.
*/
- if (i915_gem_active_isset(&node->base)) {
+ if (i915_active_request_isset(&node->base)) {
/* Retire ourselves from the old rq->active_list */
__list_del_entry(&node->base.link);
ref->count--;
@@ -131,7 +131,7 @@ void i915_active_init(struct i915_gt_active *gt,
ref->gt = gt;
ref->retire = retir
[Intel-gfx] [PATCH 03/11] drm/i915/selftests: Exercise some AB...BA preemption chains
Build a chain using 2 contexts (A, B) then request a preemption such
that a later A request runs before the spinner in B.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/selftests/intel_lrc.c | 103 +
1 file changed, 103 insertions(+)
diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c
b/drivers/gpu/drm/i915/selftests/intel_lrc.c
index 8774a3ca5a97..1151c54d2acf 100644
--- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
@@ -4,6 +4,8 @@
* Copyright © 2018 Intel Corporation
*/
+#include
+
#include "../i915_reset.h"
#include "../i915_selftest.h"
@@ -563,6 +565,106 @@ static int live_suppress_wait_preempt(void *arg)
goto err_client_3;
}
+static int live_chain_preempt(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct intel_engine_cs *engine;
+ struct preempt_client hi, lo;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ int err = -ENOMEM;
+
+ /*
+* Build a chain AB...BA between two contexts (A, B) and request
+* preemption of the last request. It should then complete before
+* the previously submitted spinner in B.
+*/
+
+ if (!HAS_LOGICAL_RING_PREEMPTION(i915))
+ return 0;
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(i915);
+
+ if (preempt_client_init(i915, &hi))
+ goto err_unlock;
+
+ if (preempt_client_init(i915, &lo))
+ goto err_client_hi;
+
+ for_each_engine(engine, i915, id) {
+ struct i915_sched_attr attr = {
+ .priority = I915_USER_PRIORITY(I915_PRIORITY_MAX),
+ };
+ int count, i;
+
+ for_each_prime_number_from(count, 1, 32) { /* must fit ring! */
+ struct i915_request *rq;
+
+ rq = igt_spinner_create_request(&hi.spin,
+ hi.ctx, engine,
+ MI_ARB_CHECK);
+ if (IS_ERR(rq))
+ goto err_wedged;
+ i915_request_add(rq);
+ if (!igt_wait_for_spinner(&hi.spin, rq))
+ goto err_wedged;
+
+ rq = igt_spinner_create_request(&lo.spin,
+ lo.ctx, engine,
+ MI_ARB_CHECK);
+ if (IS_ERR(rq))
+ goto err_wedged;
+ i915_request_add(rq);
+
+ for (i = 0; i < count; i++) {
+ rq = i915_request_alloc(engine, lo.ctx);
+ if (IS_ERR(rq))
+ goto err_wedged;
+ i915_request_add(rq);
+ }
+
+ rq = i915_request_alloc(engine, hi.ctx);
+ if (IS_ERR(rq))
+ goto err_wedged;
+ i915_request_add(rq);
+ engine->schedule(rq, &attr);
+
+ igt_spinner_end(&hi.spin);
+ if (i915_request_wait(rq, I915_WAIT_LOCKED, HZ / 5) <
0) {
+ struct drm_printer p =
+ drm_info_printer(i915->drm.dev);
+
+ pr_err("Failed to preempt over chain of %d\n",
+ count);
+ intel_engine_dump(engine, &p,
+ "%s\n", engine->name);
+ goto err_wedged;
+ }
+ igt_spinner_end(&lo.spin);
+ }
+ }
+
+ err = 0;
+err_client_lo:
+ preempt_client_fini(&lo);
+err_client_hi:
+ preempt_client_fini(&hi);
+err_unlock:
+ if (igt_flush_test(i915, I915_WAIT_LOCKED))
+ err = -EIO;
+ intel_runtime_pm_put(i915, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+
+err_wedged:
+ igt_spinner_end(&hi.spin);
+ igt_spinner_end(&lo.spin);
+ i915_gem_set_wedged(i915);
+ err = -EIO;
+ goto err_client_lo;
+}
+
static int live_preempt_hang(void *arg)
{
struct drm_i915_private *i915 = arg;
@@ -944,6 +1046,7 @@ int intel_execlists_live_selftests(struct drm_i915_private
*i915)
SUBTEST(live_late_preempt),
SUBTEST(live_suppress_self_preempt),
SUBTEST(live_suppress_wait_preempt),
+ SUBTEST(live_chain_preempt),
SUBTEST(live_preempt_hang),
SUBTEST(live_preempt_smoke),
};
--
2.20.1
___
[Intel-gfx] [PATCH 06/11] drm/i915: Allocate active tracking nodes from a slabcache
Wrap the active tracking for a GPU references in a slabcache for faster
allocations, and keep track of inflight nodes so we can reap the
stale entries upon parking (thereby trimming our memory usage).
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_active.c| 55 ---
drivers/gpu/drm/i915/i915_active.h| 21 +--
drivers/gpu/drm/i915/i915_active_types.h | 12 +++-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_gem.c | 16 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_vma.c | 3 +-
drivers/gpu/drm/i915/selftests/i915_active.c | 3 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 6 ++
9 files changed, 100 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
index e0182e19cb8b..3c7abbde42ac 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -7,7 +7,9 @@
#include "i915_drv.h"
#include "i915_active.h"
-#define BKL(ref) (&(ref)->i915->drm.struct_mutex)
+#define i915_from_gt(x) \
+ container_of(x, struct drm_i915_private, gt.active_refs)
+#define BKL(ref) (&i915_from_gt((ref)->gt)->drm.struct_mutex)
struct active_node {
struct i915_gem_active base;
@@ -79,11 +81,11 @@ active_instance(struct i915_active *ref, u64 idx)
p = &parent->rb_left;
}
- node = kmalloc(sizeof(*node), GFP_KERNEL);
+ node = kmem_cache_alloc(ref->gt->slab_cache, GFP_KERNEL);
/* kmalloc may retire the ref->last (thanks shrinker)! */
if (unlikely(!i915_gem_active_raw(&ref->last, BKL(ref {
- kfree(node);
+ kmem_cache_free(ref->gt->slab_cache, node);
goto out;
}
@@ -94,6 +96,9 @@ active_instance(struct i915_active *ref, u64 idx)
node->ref = ref;
node->timeline = idx;
+ if (RB_EMPTY_ROOT(&ref->tree))
+ list_add(&ref->active_link, &ref->gt->active_refs);
+
rb_link_node(&node->node, parent, p);
rb_insert_color(&node->node, &ref->tree);
@@ -119,11 +124,11 @@ active_instance(struct i915_active *ref, u64 idx)
return &ref->last;
}
-void i915_active_init(struct drm_i915_private *i915,
+void i915_active_init(struct i915_gt_active *gt,
struct i915_active *ref,
void (*retire)(struct i915_active *ref))
{
- ref->i915 = i915;
+ ref->gt = gt;
ref->retire = retire;
ref->tree = RB_ROOT;
init_request_active(&ref->last, last_retire);
@@ -161,6 +166,7 @@ void i915_active_release(struct i915_active *ref)
int i915_active_wait(struct i915_active *ref)
{
+ struct kmem_cache *slab = ref->gt->slab_cache;
struct active_node *it, *n;
int ret;
@@ -168,15 +174,19 @@ int i915_active_wait(struct i915_active *ref)
if (ret)
return ret;
+ if (RB_EMPTY_ROOT(&ref->tree))
+ return 0;
+
rbtree_postorder_for_each_entry_safe(it, n, &ref->tree, node) {
ret = i915_gem_active_retire(&it->base, BKL(ref));
if (ret)
return ret;
GEM_BUG_ON(i915_gem_active_isset(&it->base));
- kfree(it);
+ kmem_cache_free(slab, it);
}
ref->tree = RB_ROOT;
+ list_del(&ref->active_link);
return 0;
}
@@ -210,15 +220,46 @@ int i915_request_await_active(struct i915_request *rq,
struct i915_active *ref)
void i915_active_fini(struct i915_active *ref)
{
+ struct kmem_cache *slab = ref->gt->slab_cache;
struct active_node *it, *n;
+ lockdep_assert_held(BKL(ref));
GEM_BUG_ON(i915_gem_active_isset(&ref->last));
+ if (RB_EMPTY_ROOT(&ref->tree))
+ return;
+
rbtree_postorder_for_each_entry_safe(it, n, &ref->tree, node) {
GEM_BUG_ON(i915_gem_active_isset(&it->base));
- kfree(it);
+ kmem_cache_free(slab, it);
}
ref->tree = RB_ROOT;
+ list_del(&ref->active_link);
+}
+
+int i915_gt_active_init(struct i915_gt_active *gt)
+{
+ gt->slab_cache = KMEM_CACHE(active_node, SLAB_HWCACHE_ALIGN);
+ if (!gt->slab_cache)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(>->active_refs);
+
+ return 0;
+}
+
+void i915_gt_active_park(struct i915_gt_active *gt)
+{
+ struct i915_active *it, *n;
+
+ list_for_each_entry_safe(it, n, >->active_refs, active_link)
+ i915_active_fini(it);
+}
+
+void i915_gt_active_fini(struct i915_gt_active *gt)
+{
+ GEM_BUG_ON(!list_empty(>->active_refs));
+ kmem_cache_destroy(gt->slab_cache);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/i915_active.h
b/drivers/gpu/drm/i915/i915_active.h
index c0729a046f98..41c4a5da84c8 100644
-
[Intel-gfx] [PATCH 04/11] drm/i915: Generalise GPU activity tracking
We currently track GPU memory usage inside VMA, such that we never
release memory used by the GPU until after it has finished accessing it.
However, we may want to track other resources aside from VMA, or we may
want to split a VMA into multiple independent regions and track each
separately. For this purpose, generalise our request tracking (akin to
struct reservation_object) so that we can embed it into other objects.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/Makefile | 4 +-
drivers/gpu/drm/i915/i915_active.c| 226 ++
drivers/gpu/drm/i915/i915_active.h| 66 +
drivers/gpu/drm/i915/i915_active_types.h | 26 ++
drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +-
drivers/gpu/drm/i915/i915_vma.c | 173 +++---
drivers/gpu/drm/i915/i915_vma.h | 9 +-
drivers/gpu/drm/i915/selftests/i915_active.c | 158
.../drm/i915/selftests/i915_live_selftests.h | 3 +-
9 files changed, 514 insertions(+), 154 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_active.c
create mode 100644 drivers/gpu/drm/i915/i915_active.h
create mode 100644 drivers/gpu/drm/i915/i915_active_types.h
create mode 100644 drivers/gpu/drm/i915/selftests/i915_active.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 210d0e8777b6..1787e1299b1b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -57,7 +57,9 @@ i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o
i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
# GEM code
-i915-y += i915_cmd_parser.o \
+i915-y += \
+ i915_active.o \
+ i915_cmd_parser.o \
i915_gem_batch_pool.o \
i915_gem_clflush.o \
i915_gem_context.o \
diff --git a/drivers/gpu/drm/i915/i915_active.c
b/drivers/gpu/drm/i915/i915_active.c
new file mode 100644
index ..e0182e19cb8b
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -0,0 +1,226 @@
+/*
+ * SPDX-License-Identifier: MIT
+ *
+ * Copyright © 2019 Intel Corporation
+ */
+
+#include "i915_drv.h"
+#include "i915_active.h"
+
+#define BKL(ref) (&(ref)->i915->drm.struct_mutex)
+
+struct active_node {
+ struct i915_gem_active base;
+ struct i915_active *ref;
+ struct rb_node node;
+ u64 timeline;
+};
+
+static void
+__active_retire(struct i915_active *ref)
+{
+ GEM_BUG_ON(!ref->count);
+ if (!--ref->count)
+ ref->retire(ref);
+}
+
+static void
+node_retire(struct i915_gem_active *base, struct i915_request *rq)
+{
+ __active_retire(container_of(base, struct active_node, base)->ref);
+}
+
+static void
+last_retire(struct i915_gem_active *base, struct i915_request *rq)
+{
+ __active_retire(container_of(base, struct i915_active, last));
+}
+
+static struct i915_gem_active *
+active_instance(struct i915_active *ref, u64 idx)
+{
+ struct active_node *node;
+ struct rb_node **p, *parent;
+ struct i915_request *old;
+
+ /*
+* We track the most recently used timeline to skip a rbtree search
+* for the common case, under typical loads we never need the rbtree
+* at all. We can reuse the last slot if it is empty, that is
+* after the previous activity has been retired, or if it matches the
+* current timeline.
+*
+* Note that we allow the timeline to be active simultaneously in
+* the rbtree and the last cache. We do this to avoid having
+* to search and replace the rbtree element for a new timeline, with
+* the cost being that we must be aware that the ref may be retired
+* twice for the same timeline (as the older rbtree element will be
+* retired before the new request added to last).
+*/
+ old = i915_gem_active_raw(&ref->last, BKL(ref));
+ if (!old || old->fence.context == idx)
+ goto out;
+
+ /* Move the currently active fence into the rbtree */
+ idx = old->fence.context;
+
+ parent = NULL;
+ p = &ref->tree.rb_node;
+ while (*p) {
+ parent = *p;
+
+ node = rb_entry(parent, struct active_node, node);
+ if (node->timeline == idx)
+ goto replace;
+
+ if (node->timeline < idx)
+ p = &parent->rb_right;
+ else
+ p = &parent->rb_left;
+ }
+
+ node = kmalloc(sizeof(*node), GFP_KERNEL);
+
+ /* kmalloc may retire the ref->last (thanks shrinker)! */
+ if (unlikely(!i915_gem_active_raw(&ref->last, BKL(ref {
+ kfree(node);
+ goto out;
+ }
+
+ if (unlikely(!node))
+ return ERR_PTR(-ENOMEM);
+
+ init_request_active(&node->base, node_retire);
+ node->ref = ref;
+ node->timeline = idx;
+
+ rb_link_node(&node->node, parent, p);
+ rb_insert_color(&nod
[Intel-gfx] [PATCH 11/11] drm/i915: Prioritise non-busywait semaphore workloads
We don't want to busywait on the GPU if we have other work to do. If we
give non-busywaiting workloads higher (initial) priority than workloads
that require a busywait, we will prioritise work that is ready to run
immediately.
Testcase: igt/gem_exec_schedule/semaphore
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 8 +++-
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
drivers/gpu/drm/i915/i915_scheduler.h | 11 +++
drivers/gpu/drm/i915/intel_lrc.c | 5 +++--
4 files changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 6d825cd28ae6..30cd8724d39f 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -844,7 +844,7 @@ emit_semaphore_wait(struct i915_request *to,
intel_ring_advance(to, cs);
}
- to->sched.semaphore = true;
+ to->sched.semaphore |= I915_SCHED_HAS_SEMAPHORE;
return 0;
}
@@ -867,6 +867,9 @@ i915_request_await_request(struct i915_request *to, struct
i915_request *from)
return ret;
}
+ if (from->sched.semaphore && !i915_request_started(from))
+ to->sched.semaphore |= I915_SCHED_CHAIN_SEMAPHORE;
+
if (to->engine == from->engine) {
ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
&from->submit,
@@ -1117,6 +1120,9 @@ void i915_request_add(struct i915_request *request)
if (engine->schedule) {
struct i915_sched_attr attr = request->gem_context->sched;
+ if (!request->sched.semaphore)
+ attr.priority |= I915_PRIORITY_NOSEMAPHORE;
+
/*
* Boost priorities to new clients (new request flows).
*
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c
b/drivers/gpu/drm/i915/i915_scheduler.c
index aa6c663dca09..4394763d10d8 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -29,7 +29,7 @@ void i915_sched_node_init(struct i915_sched_node *node)
INIT_LIST_HEAD(&node->waiters_list);
INIT_LIST_HEAD(&node->link);
node->attr.priority = I915_PRIORITY_INVALID;
- node->semaphore = false;
+ node->semaphore = 0;
}
static struct i915_dependency *
diff --git a/drivers/gpu/drm/i915/i915_scheduler.h
b/drivers/gpu/drm/i915/i915_scheduler.h
index d764cf10536f..d84f09e8c248 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.h
+++ b/drivers/gpu/drm/i915/i915_scheduler.h
@@ -24,14 +24,15 @@ enum {
I915_PRIORITY_INVALID = INT_MIN
};
-#define I915_USER_PRIORITY_SHIFT 2
+#define I915_USER_PRIORITY_SHIFT 3
#define I915_USER_PRIORITY(x) ((x) << I915_USER_PRIORITY_SHIFT)
#define I915_PRIORITY_COUNT BIT(I915_USER_PRIORITY_SHIFT)
#define I915_PRIORITY_MASK (I915_PRIORITY_COUNT - 1)
-#define I915_PRIORITY_WAIT ((u8)BIT(0))
-#define I915_PRIORITY_NEWCLIENT((u8)BIT(1))
+#define I915_PRIORITY_WAIT ((u8)BIT(0))
+#define I915_PRIORITY_NEWCLIENT((u8)BIT(1))
+#define I915_PRIORITY_NOSEMAPHORE ((u8)BIT(2))
struct i915_sched_attr {
/**
@@ -72,7 +73,9 @@ struct i915_sched_node {
struct list_head waiters_list; /* those after us, they depend upon us */
struct list_head link;
struct i915_sched_attr attr;
- bool semaphore;
+ unsigned long semaphore;
+#define I915_SCHED_HAS_SEMAPHORE BIT(0)
+#define I915_SCHED_CHAIN_SEMAPHORE BIT(1)
};
struct i915_dependency {
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 80d17b75b2e6..5bb3964bb202 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -164,7 +164,7 @@
#define WA_TAIL_DWORDS 2
#define WA_TAIL_BYTES (sizeof(u32) * WA_TAIL_DWORDS)
-#define ACTIVE_PRIORITY (I915_PRIORITY_NEWCLIENT)
+#define ACTIVE_PRIORITY (I915_PRIORITY_NEWCLIENT | I915_PRIORITY_NOSEMAPHORE)
static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
struct intel_engine_cs *engine,
@@ -614,7 +614,8 @@ static bool can_merge_rq(const struct i915_request *prev,
* rules should mean that if this semaphore is preempted, its
* dependency chain is preserved and suitably promoted via PI.
*/
- if (prev->sched.semaphore && !i915_request_started(prev))
+ if (prev->sched.semaphore & I915_SCHED_HAS_SEMAPHORE &&
+ !i915_request_started(prev))
return false;
if (!can_merge_ctx(prev->hw_context, next->hw_context))
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply LUT validation checks to platforms more accurately (rev2)
== Series Details ==
Series: drm/i915: Apply LUT validation checks to platforms more accurately
(rev2)
URL : https://patchwork.freedesktop.org/series/55765/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5506 -> Patchwork_12082
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55765/revisions/2/mbox/
Known issues
Here are the changes found in Patchwork_12082 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_execlists:
- fi-apl-guc: NOTRUN -> INCOMPLETE [fdo#103927]
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: PASS -> FAIL [fdo#103182]
* igt@kms_pipe_crc_basic@read-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@prime_vgem@basic-fence-flip:
- fi-ilk-650: PASS -> FAIL [fdo#104008]
Possible fixes
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: WARN [fdo#109380] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- fi-hsw-4770:{SKIP} [fdo#109271] -> PASS +3
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104008]: https://bugs.freedesktop.org/show_bug.cgi?id=104008
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
Participating hosts (44 -> 39)
--
Additional (2): fi-byt-j1900 fi-apl-guc
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan
fi-skl-6260u fi-icl-y fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5506 -> Patchwork_12082
CI_DRM_5506: 864d26b6a3e3b28515324f330b2240391f86f458 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12082: b09041f843be63c46d4098be4237f01ca77f0c6d @
git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12082/build_32bit.log
CALLscripts/checksyscalls.sh
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_color.o
In file included from ./include/drm/drm_mm.h:49:0,
from ./include/drm/drm_vma_manager.h:26,
from ./include/drm/drm_gem.h:39,
from drivers/gpu/drm/i915/i915_drv.h:52,
from drivers/gpu/drm/i915/intel_drv.h:34,
from drivers/gpu/drm/i915/intel_color.c:25:
drivers/gpu/drm/i915/intel_color.c: In function ‘check_lut_size’:
drivers/gpu/drm/i915/intel_color.c:617:17: error: format ‘%lu’ expects argument
of type ‘long unsigned int’, but argument 3 has type ‘size_t {aka unsigned
int}’ [-Werror=format=]
DRM_DEBUG_KMS("Invalid LUT size; got %lu, expected %lu\n",
^
./include/drm/drm_print.h:362:22: note: in definition of macro ‘DRM_DEBUG_KMS’
drm_dbg(DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
drivers/gpu/drm/i915/intel_color.c:617:17: error: format ‘%lu’ expects argument
of type ‘long unsigned int’, but argument 4 has type ‘size_t {aka unsigned
int}’ [-Werror=format=]
DRM_DEBUG_KMS("Invalid LUT size; got %lu, expected %lu\n",
^
./include/drm/drm_print.h:362:22: note: in definition of macro ‘DRM_DEBUG_KMS’
drm_dbg(DRM_UT_KMS, fmt, ##__VA_ARGS__)
^~~
cc1: all warnings being treated as errors
scripts/Makefile.build:276: recipe for target
'drivers/gpu/drm/i915/intel_color.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_color.o] Error 1
scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:492: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:492: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1043: recipe for target 'drivers' failed
make: *** [drivers] Error 2
== Linux commits ==
b09041f843be drm/i915: Apply LUT validation checks to platforms more accurately
(v2)
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Apply LUT validation checks to platforms more accurately (rev2)
== Series Details == Series: drm/i915: Apply LUT validation checks to platforms more accurately (rev2) URL : https://patchwork.freedesktop.org/series/55765/ State : warning == Summary == $ dim checkpatch origin/drm-tip b09041f843be drm/i915: Apply LUT validation checks to platforms more accurately (v2) -:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #27: References: https://lists.freedesktop.org/archives/intel-gfx/2019-January/187634.html total: 0 errors, 1 warnings, 0 checks, 102 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify tracepoint
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify
tracepoint
URL : https://patchwork.freedesktop.org/series/55939/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5503_full -> Patchwork_12081_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_12081_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_flip@flip-vs-suspend}:
- shard-kbl: PASS -> DMESG-WARN
Known issues
Here are the changes found in Patchwork_12081_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_busy@basic-modeset-b:
- shard-apl: NOTRUN -> FAIL [fdo#109490]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-hsw: PASS -> DMESG-WARN [fdo#107956]
* igt@kms_busy@extended-pageflip-hang-newfb-render-a:
- shard-glk: PASS -> DMESG-WARN [fdo#107956]
- shard-apl: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: PASS -> FAIL [fdo#108147]
* igt@kms_cursor_crc@cursor-256x256-dpms:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-apl: PASS -> FAIL [fdo#102887] / [fdo#105363]
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166] +2
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_alpha_blend@pipe-b-alpha-transparant-fb:
- shard-apl: NOTRUN -> FAIL [fdo#108145]
* igt@kms_setmode@basic:
- shard-apl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing:
- shard-apl: INCOMPLETE [fdo#103927] / [fdo#109225] -> PASS
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
- shard-apl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_color@pipe-a-legacy-gamma:
- shard-apl: FAIL [fdo#104782] / [fdo#108145] -> PASS
* igt@kms_color@pipe-b-degamma:
- shard-apl: FAIL [fdo#104782] -> PASS +1
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-glk: FAIL [fdo#103232] -> PASS
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@kms_vblank@invalid:
- shard-snb: {SKIP} [fdo#109271] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#109225]: https://bugs.freedesktop.org/show_bug.cgi?id=109225
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109490]: https://bugs.freedesktop.org/show_bug.cgi?id=109490
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5503 -> Patchwork_12081
CI_DRM_5503: 1c30ec189dd769bf9ca28ee63f658d2e2cd23311 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12081: eb1a54866d4dc4d769a7cdbd1096d49eaf3e631d @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12081/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Apply LUT validation checks to platforms more accurately (v2)
Use of the new DRM_COLOR_LUT_NON_DECREASING test was a bit over-zealous;
it doesn't actually need to be applied to the degamma on "bdw-style"
platforms. Likewise, we overlooked the fact that CHV should have that
test applied to the gamma LUT as well as the degamma LUT.
Rather than adding more complicated platform checking to
intel_color_check(), let's just store the appropriate set of LUT
validation flags for each platform in the intel_device_info structure.
v2:
- Shuffle around LUT size tests so that the hardware-specific tests
won't be applied to legacy gamma tables. (Ville)
- Add a debug message so that it will be easier to understand why an
atomic transaction involving incorrectly-sized LUT's got rejected
by the driver.
Fixes: 85e2d61e4976 ("drm/i915: Validate userspace-provided color management
LUT's (v4)")
References:
https://lists.freedesktop.org/archives/intel-gfx/2019-January/187634.html
Cc: Ville Syrjälä
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_pci.c | 10 --
drivers/gpu/drm/i915/intel_color.c | 58
drivers/gpu/drm/i915/intel_device_info.h | 2 ++
3 files changed, 39 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 44c23ac60347..17f5a605b0b3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -69,9 +69,15 @@
#define BDW_COLORS \
.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
#define CHV_COLORS \
- .color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
+ .color = { .degamma_lut_size = 65, .gamma_lut_size = 257, \
+ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
+ .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
+ }
#define GLK_COLORS \
- .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
+ .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024, \
+ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
+ DRM_COLOR_LUT_EQUAL_CHANNELS, \
+ }
/* Keep in gen based order, and chronological order within a gen */
diff --git a/drivers/gpu/drm/i915/intel_color.c
b/drivers/gpu/drm/i915/intel_color.c
index bc7589656a8f..59b8a644b218 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -605,48 +605,48 @@ void intel_color_load_luts(struct intel_crtc_state
*crtc_state)
dev_priv->display.load_luts(crtc_state);
}
+static int check_lut_size(const struct drm_property_blob *lut, size_t expected)
+{
+ size_t len;
+
+ if (!lut)
+ return 0;
+
+ len = drm_color_lut_size(lut);
+ if (len != expected) {
+ DRM_DEBUG_KMS("Invalid LUT size; got %lu, expected %lu\n",
+ len, expected);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
int intel_color_check(struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
size_t gamma_length, degamma_length;
- uint32_t tests = DRM_COLOR_LUT_NON_DECREASING;
+ u32 gamma_tests, degamma_tests;
degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size;
gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ degamma_tests = INTEL_INFO(dev_priv)->color.degamma_lut_tests;
+ gamma_tests = INTEL_INFO(dev_priv)->color.gamma_lut_tests;
- /*
-* All of our platforms mandate that the degamma curve be
-* non-decreasing. Additionally, GLK and gen11 only accept a single
-* value for red, green, and blue in the degamma table. Make sure
-* userspace didn't try to pass us something we can't handle.
-*
-* We don't have any extra hardware constraints on the gamma table,
-* so no need to explicitly check it.
-*/
- if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10)
- tests |= DRM_COLOR_LUT_EQUAL_CHANNELS;
+ /* Always allow legacy gamma LUT with no further checking. */
+ if (crtc_state_is_legacy_gamma(crtc_state))
+ return 0;
- if (drm_color_lut_check(crtc_state->base.degamma_lut, tests) != 0)
+ if (check_lut_size(crtc_state->base.degamma_lut, degamma_length) ||
+ check_lut_size(crtc_state->base.gamma_lut, gamma_length))
return -EINVAL;
- /*
-* We allow both degamma & gamma luts at the right size or
-* NULL.
-*/
- if ((!crtc_state->base.degamma_lut ||
-drm_color_lut_size(crtc_state->base.degamma_lut) ==
degamma_length) &&
- (!crtc_state->base.gamma_lut ||
-drm_color_lut_size(crtc_state->base.gamma_lut) == gamma_length))
- return 0;
+ if (drm_color_lut_check(crtc_state->base.degamma_lut, degamma_tests) ||
+ drm_color_lut_c
Re: [Intel-gfx] [PATCH 6/9] drm/i915: Pass dev_priv to skl_needs_memory_bw_wa()
On Fri, Dec 21, 2018 at 07:14:33PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> skl_needs_memory_bw_wa() doesn't look at the passed in state at all.
> Possibly it should, but for now let's make life simpler by just
> passing in dev_priv.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c | 21 +
> 1 file changed, 5 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 7464552c05f4..40cb18c61e11 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3633,14 +3633,9 @@ static u8 intel_enabled_dbuf_slices_num(struct
> drm_i915_private *dev_priv)
> * FIXME: We still don't have the proper code detect if we need to apply the
> WA,
> * so assume we'll always need it in order to avoid underruns.
> */
> -static bool skl_needs_memory_bw_wa(struct intel_atomic_state *state)
> +static bool skl_needs_memory_bw_wa(struct drm_i915_private *dev_priv)
> {
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -
> - if (IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv))
> - return true;
> -
> - return false;
> + return IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv);
> }
>
> static bool
> @@ -3792,7 +3787,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state
> *state)
>
> latency = dev_priv->wm.skl_latency[level];
>
> - if (skl_needs_memory_bw_wa(intel_state) &&
> + if (skl_needs_memory_bw_wa(dev_priv) &&
> plane->base.state->fb->modifier ==
> I915_FORMAT_MOD_X_TILED)
> latency += 15;
> @@ -4580,9 +4575,6 @@ skl_compute_plane_wm_params(const struct
> intel_crtc_state *cstate,
> const struct drm_plane_state *pstate = &intel_pstate->base;
> const struct drm_framebuffer *fb = pstate->fb;
> uint32_t interm_pbpl;
> - struct intel_atomic_state *state =
> - to_intel_atomic_state(cstate->base.state);
> - bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
>
> /* only NV12 format has two planes */
> if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
> @@ -4643,7 +4635,7 @@ skl_compute_plane_wm_params(const struct
> intel_crtc_state *cstate,
> wp->y_min_scanlines = 4;
> }
>
> - if (apply_memory_bw_wa)
> + if (skl_needs_memory_bw_wa(dev_priv))
> wp->y_min_scanlines *= 2;
>
> wp->plane_bytes_per_line = wp->width * wp->cpp;
> @@ -4697,9 +4689,6 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> uint_fixed_16_16_t method1, method2;
> uint_fixed_16_16_t selected_result;
> uint32_t res_blocks, res_lines, min_ddb_alloc = 0;
> - struct intel_atomic_state *state =
> - to_intel_atomic_state(cstate->base.state);
> - bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
>
> if (latency == 0)
> return;
> @@ -4710,7 +4699,7 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> dev_priv->ipc_enabled)
> latency += 4;
>
> - if (apply_memory_bw_wa && wp->x_tiled)
> + if (skl_needs_memory_bw_wa(dev_priv) && wp->x_tiled)
> latency += 15;
>
> method1 = skl_wm_method1(dev_priv, wp->plane_pixel_rate,
> --
> 2.19.2
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 9/9] drm/i915: Use IS_GEN9_LP() for the linetime w/a check
On Fri, Dec 21, 2018 at 07:14:36PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > IS_GLK||IS_BXT == IS_GEN9_LP > > Signed-off-by: Ville Syrjälä Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 3c351a21a0fa..b5e8ac51ef1c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4827,9 +4827,8 @@ skl_compute_linetime_wm(const struct intel_crtc_state > *cstate) > linetime_us = intel_get_linetime_us(cstate); > linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); > > - /* Display WA #1135: bxt:ALL GLK:ALL */ > - if ((IS_BROXTON(dev_priv) || IS_GEMINILAKE(dev_priv)) && > - dev_priv->ipc_enabled) > + /* Display WA #1135: BXT:ALL GLK:ALL */ > + if (IS_GEN9_LP(dev_priv) && dev_priv->ipc_enabled) > linetime_wm /= 2; > > return linetime_wm; > -- > 2.19.2 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/9] drm/i915: Fix bits vs. bytes mixup in dbuf block size computation
On Fri, Dec 21, 2018 at 07:14:30PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > The spec used to say "8bpp" which someone took to mean 8 bytes per > pixel when in fact it was supposed to be 8 bits per pixel. The > spec has been updated to make it more clear now. Fix the code > to match. > > Signed-off-by: Ville Syrjälä Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 0aac7e7b660f..55a1c577f060 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4618,7 +4618,7 @@ skl_compute_plane_wm_params(const struct > intel_crtc_state *cstate, >intel_pstate); > > if (INTEL_GEN(dev_priv) >= 11 && > - fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 8) > + fb->modifier == I915_FORMAT_MOD_Yf_TILED && wp->cpp == 1) > wp->dbuf_block_size = 256; > else > wp->dbuf_block_size = 512; > -- > 2.19.2 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations
On Fri, Dec 21, 2018 at 07:14:31PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Bspec says we have to reject the watermark if it's >= the ddb
> allocation. Fix the code to reject the == case as it should.
> For transition watermarks we can just use >=, for the rest
> we'll do +1 when calculating the minimum ddb allocation size.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 55a1c577f060..3c5cba31f055 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> continue;
>
> wm = &cstate->wm.skl.optimal.planes[plane_id];
> - blocks += wm->wm[level].plane_res_b;
> - blocks += wm->uv_wm[level].plane_res_b;
> + blocks += wm->wm[level].plane_res_b + 1;
> + blocks += wm->uv_wm[level].plane_res_b + 1;
> }
>
> if (blocks < alloc_size) {
> @@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> extra = min_t(u16, alloc_size,
> DIV64_U64_ROUND_UP(alloc_size * rate,
>total_data_rate));
> - total[plane_id] = wm->wm[level].plane_res_b + extra;
> + total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
> alloc_size -= extra;
> total_data_rate -= rate;
>
> @@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> extra = min_t(u16, alloc_size,
> DIV64_U64_ROUND_UP(alloc_size * rate,
>total_data_rate));
> - uv_total[plane_id] = wm->uv_wm[level].plane_res_b + extra;
> + uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
> alloc_size -= extra;
> total_data_rate -= rate;
> }
> @@ -4477,7 +4477,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>*/
> for_each_plane_id_on_crtc(intel_crtc, plane_id) {
> wm = &cstate->wm.skl.optimal.planes[plane_id];
> - if (wm->trans_wm.plane_res_b > total[plane_id])
> + if (wm->trans_wm.plane_res_b >= total[plane_id])
> memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
> }
>
> --
> 2.19.2
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
___
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Re: [Intel-gfx] [PATCH 8/9] drm/i915: Drop the pointless linetime==0 check
On Fri, Dec 21, 2018 at 07:14:35PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > 0*whatever==0 so this check is pointless. Remove it. > > Signed-off-by: Ville Syrjälä Reviewed-by: Matt Roper > --- > drivers/gpu/drm/i915/intel_pm.c | 4 > 1 file changed, 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 0843990ebf9f..3c351a21a0fa 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4825,10 +4825,6 @@ skl_compute_linetime_wm(const struct intel_crtc_state > *cstate) > uint32_t linetime_wm; > > linetime_us = intel_get_linetime_us(cstate); > - > - if (is_fixed16_zero(linetime_us)) > - return 0; > - > linetime_wm = fixed16_to_u32_round_up(mul_u32_fixed16(8, linetime_us)); > > /* Display WA #1135: bxt:ALL GLK:ALL */ > -- > 2.19.2 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/9] drm/i915: Reinstate an early latency==0 check for skl+
On Fri, Dec 21, 2018 at 07:14:29PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> I thought we could remove all the early latency==0 checks
> and rely on skl_wm_method{1,2}() checking for it. But
> skl_compute_plane_wm() applies a bunch of workarounds to bump
> up the latency before calling those guys so clearly it won't
> end up doing the right thing. Also not sure if the calculations
> based on the method1/2 results are safe agaisnt overflows so
> it might not work all that well in any case. Let's put the
> early check back.
>
> Signed-off-by: Ville Syrjälä
Should we remove the tests from skl_wm_method{1,2}() now? I suppose
someone could still use the debugfs interface to set a latency value of
exactly (UINT32_MAX - workaround amount) to make latency wrap around and
hit 0, but I'm not sure if that's really any worse than if they shoot
themselves in the foot by setting a too-low non-zero latency. I don't
think we divide by latency anywhere.
Either way,
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d132ef10fa60..0aac7e7b660f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4701,6 +4701,9 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> to_intel_atomic_state(cstate->base.state);
> bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
>
> + if (latency == 0)
> + return;
> +
> /* Display WA #1141: kbl,cfl */
> if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
> IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) &&
> --
> 2.19.2
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
___
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Re: [Intel-gfx] [PATCH 5/9] drm/i915: Account for minimum ddb allocation restrictions
On Fri, Dec 21, 2018 at 07:14:32PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> On icl+ bspec tells us to calculate a separate minimum ddb
> allocation from the blocks watermark. Both have to be checked
> against the actual ddb allocation, but since we do things the
> other way around we'll just calculat the minimum acceptable
> ddb allocation by taking the maximum of the two values.
>
> We'll also replace the memcmp() with a full trawl over the
> the watermarks so that it'll ignore the min_ddb_alloc
> because we can't directly read that out from the hw. I suppose
> we could reconstruct it from the other values, but I was
> too lazy to do that now.
>
> Signed-off-by: Ville Syrjälä
Matches the bspec.
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 53 +++--
> 2 files changed, 45 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 815db160b966..7668d7197994 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1108,6 +1108,7 @@ struct skl_ddb_values {
> };
>
> struct skl_wm_level {
> + uint16_t min_ddb_alloc;
> uint16_t plane_res_b;
> uint8_t plane_res_l;
> bool plane_en;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3c5cba31f055..7464552c05f4 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> continue;
>
> wm = &cstate->wm.skl.optimal.planes[plane_id];
> - blocks += wm->wm[level].plane_res_b + 1;
> - blocks += wm->uv_wm[level].plane_res_b + 1;
> + blocks += wm->wm[level].min_ddb_alloc;
> + blocks += wm->uv_wm[level].min_ddb_alloc;
> }
>
> if (blocks < alloc_size) {
> @@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> extra = min_t(u16, alloc_size,
> DIV64_U64_ROUND_UP(alloc_size * rate,
>total_data_rate));
> - total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
> + total[plane_id] = wm->wm[level].min_ddb_alloc + extra;
> alloc_size -= extra;
> total_data_rate -= rate;
>
> @@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
> extra = min_t(u16, alloc_size,
> DIV64_U64_ROUND_UP(alloc_size * rate,
>total_data_rate));
> - uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
> + uv_total[plane_id] = wm->uv_wm[level].min_ddb_alloc + extra;
> alloc_size -= extra;
> total_data_rate -= rate;
> }
> @@ -4696,7 +4696,7 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> uint32_t latency = dev_priv->wm.skl_latency[level];
> uint_fixed_16_16_t method1, method2;
> uint_fixed_16_16_t selected_result;
> - uint32_t res_blocks, res_lines;
> + uint32_t res_blocks, res_lines, min_ddb_alloc = 0;
> struct intel_atomic_state *state =
> to_intel_atomic_state(cstate->base.state);
> bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
> @@ -4769,6 +4769,24 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> }
> }
>
> + if (INTEL_GEN(dev_priv) >= 11) {
> + if (wp->y_tiled) {
> + int extra_lines;
> +
> + if (res_lines % wp->y_min_scanlines == 0)
> + extra_lines = wp->y_min_scanlines;
> + else
> + extra_lines = wp->y_min_scanlines * 2 -
> + res_lines % wp->y_min_scanlines;
> +
> + min_ddb_alloc = mul_round_up_u32_fixed16(res_lines +
> extra_lines,
> +
> wp->plane_blocks_per_line);
> + } else {
> + min_ddb_alloc = res_blocks +
> + DIV_ROUND_UP(res_blocks, 10);
> + }
> + }
> +
> if (!skl_wm_has_lines(dev_priv, level))
> res_lines = 0;
>
> @@ -4783,6 +4801,8 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
>*/
> result->plane_res_b = res_blocks;
> result->plane_res_l = res_lines;
> + /* Bspec says: value >= plane ddb allocation -> invalid, hence the +1
> here */
> + result->min_ddb_alloc = max(min_ddb_alloc, res_blocks) + 1;
> result->plane_en = true;
> }
>
> @@ -5133,6 +5153,23 @@ static boo
Re: [Intel-gfx] [PATCH 1/9] drm/i915: Don't ignore level 0 lines watermark for glk+
On Fri, Dec 21, 2018 at 07:14:28PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> On glk+ the level 0 lines watermark actually matters. Do not ignore it.
> And while at it let's change things so that we always program a
> consistnet 0 to the register when the lines watermarks is ignored
> by the hardware.
>
> Signed-off-by: Ville Syrjälä
Looks like this just got added to the bspec on Dec 18th, 2018.
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/intel_pm.c | 15 +--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2a6ffb8b975a..d132ef10fa60 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4675,6 +4675,15 @@ skl_compute_plane_wm_params(const struct
> intel_crtc_state *cstate,
> return 0;
> }
>
> +static bool skl_wm_has_lines(struct drm_i915_private *dev_priv, int level)
> +{
> + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + return true;
> +
> + /* The number of lines are ignored for the level 0 watermark. */
> + return level > 0;
> +}
> +
> static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
>const struct intel_plane_state *intel_pstate,
>int level,
> @@ -4757,8 +4766,10 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *cstate,
> }
> }
>
> - /* The number of lines are ignored for the level 0 watermark. */
> - if (level > 0 && res_lines > 31)
> + if (!skl_wm_has_lines(dev_priv, level))
> + res_lines = 0;
> +
> + if (res_lines > 31)
> return;
>
> /*
> --
> 2.19.2
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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[Intel-gfx] [PATCH i-g-t v2] i915/selftest: Allow filtering of individual subtests
Take an environment variable, SELFTESTS=foo,bar, and pass that along to
the kernel (as i915.st_filter=foo,bar) to provide fine grained test
selection. This can be either as an exact match to select only that
test, or to exclude only test. For example,
SELFTESTS=igt_vma_create,igt_vma_pin1 i915_selftest --run mock_vma
SELFTESTS=!igt_vma_create i915_selftest --run mock_vma
v2: Replace NULL with the empty string.
Signed-off-by: Chris Wilson
---
tests/i915/selftest.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/tests/i915/selftest.c b/tests/i915/selftest.c
index 80e515c61..6d597e682 100644
--- a/tests/i915/selftest.c
+++ b/tests/i915/selftest.c
@@ -28,10 +28,16 @@ IGT_TEST_DESCRIPTION("Basic unit tests for i915.ko");
igt_main
{
- igt_kselftests("i915",
- "mock_selftests=-1 disable_display=1",
- NULL, "mock");
- igt_kselftests("i915",
- "live_selftests=-1 disable_display=1",
- "live_selftests", "live");
+ const char *env = getenv("SELFTESTS") ?: "";
+ char opts[1024];
+
+ igt_assert(snprintf(opts, sizeof(opts),
+ "mock_selftests=-1 disable_display=1 st_filter=%s",
+ env) < sizeof(opts));
+ igt_kselftests("i915", opts, NULL, "mock");
+
+ igt_assert(snprintf(opts, sizeof(opts),
+ "live_selftests=-1 disable_display=1 st_filter=%s",
+ env) < sizeof(opts));
+ igt_kselftests("i915", opts, "live_selftests", "live");
}
--
2.20.1
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_eio: Check for allow-hang prior to issuing a reset
Quoting Antonio Argenziano (2019-01-29 23:36:38) > > > On 27/01/19 04:49, Chris Wilson wrote: > > Check that we are allowed to hang/reset the GPU before we actually do so > > for the first time. > > > > Signed-off-by: Chris Wilson > > --- > > tests/i915/gem_eio.c | 8 > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c > > index 5250a414c..09059c311 100644 > > --- a/tests/i915/gem_eio.c > > +++ b/tests/i915/gem_eio.c > > @@ -745,14 +745,14 @@ igt_main > > fd = drm_open_driver(DRIVER_INTEL); > > igt_device_drop_master(fd); > > > > - igt_require(i915_reset_control(true)); > > - igt_force_gpu_reset(fd); > > - igt_install_exit_handler(exit_handler); > > - > > gem_submission_print_method(fd); > > igt_require_gem(fd); > > > > igt_allow_hang(fd, 0, 0); > > + > > + igt_require(i915_reset_control(true)); > > Don't we do this already in allow_hang? Not quite. There we set reset=INT_MAX (aka 2), here it's just reset=1. Not much in it tbh; this allows us to check the pattern used by the tests, but we explicitly require reset=1 in order to trigger the wedging/EIO. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t] i915/gem_exec_capture: Check the strlen() for an empty file
On 29/01/19 03:24, Chris Wilson wrote:
igt_sysfs_get() only returns NULL if the open() fails, and a valid
string otherwise. So if the read() fails with ENODEV (because sysfs
doesn't provide the driver with an ->open() callback), we return an
empty string, and "No error captured" otherwise.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109481
Signed-off-by: Chris Wilson
LGTM.
Reviwed-by: Antonio Argenziano
---
tests/i915/gem_exec_capture.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_exec_capture.c b/tests/i915/gem_exec_capture.c
index eca73ab11..56837dfca 100644
--- a/tests/i915/gem_exec_capture.c
+++ b/tests/i915/gem_exec_capture.c
@@ -519,6 +519,11 @@ static bool has_capture(int fd)
return async > 0;
}
+static size_t safer_strlen(const char *s)
+{
+ return s ? strlen(s) : 0;
+}
+
igt_main
{
const struct intel_execution_engine *e;
@@ -544,7 +549,7 @@ igt_main
dir = igt_sysfs_open(fd, NULL);
igt_require(igt_sysfs_set(dir, "error", "Begone!"));
- igt_require(igt_sysfs_get(dir, "error"));
+ igt_require(safer_strlen(igt_sysfs_get(dir, "error")) > 0);
}
for (e = intel_execution_engines; e->name; e++) {
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/gem_eio: Check for allow-hang prior to issuing a reset
On 27/01/19 04:49, Chris Wilson wrote:
Check that we are allowed to hang/reset the GPU before we actually do so
for the first time.
Signed-off-by: Chris Wilson
---
tests/i915/gem_eio.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 5250a414c..09059c311 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -745,14 +745,14 @@ igt_main
fd = drm_open_driver(DRIVER_INTEL);
igt_device_drop_master(fd);
- igt_require(i915_reset_control(true));
- igt_force_gpu_reset(fd);
- igt_install_exit_handler(exit_handler);
-
gem_submission_print_method(fd);
igt_require_gem(fd);
igt_allow_hang(fd, 0, 0);
+
+ igt_require(i915_reset_control(true));
Don't we do this already in allow_hang?
Antnoio
+ igt_force_gpu_reset(fd);
+ igt_install_exit_handler(exit_handler);
}
igt_subtest("throttle")
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Re: [Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree
On Tue, Jan 29, 2019 at 2:39 PM Stephen Rothwell wrote:
>
> Hi all,
>
> After merging the drm-intel-fixes tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/gpu/drm/i915/intel_display.c: In function 'has_bogus_dpll_config':
> drivers/gpu/drm/i915/intel_display.c:15432:27: error: macro "IS_GEN" requires
> 3 arguments, but only 2 given
> return IS_GEN(dev_priv, 6) &&
>^
>
> Caused by commit
>
> a49a17226feb ("drm/i915: Try to sanitize bogus DPLL state left over by
> broken SNB BIOSen")
>
> It seems this was cherry-picked incorrectly :-(
while the cherry-pick was correct, the macro is different on
drm-intel-fixes. IS_GEN(dev_priv, 6) needs to be converted to
IS_GEN6(dev_priv).
Lucas De Marchi
>
> I have reverted that commit for today.
>
> --
> Cheers,
> Stephen Rothwell
> ___
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--
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: MST and wakeref leak fixes (rev2)
== Series Details ==
Series: drm/i915: MST and wakeref leak fixes (rev2)
URL : https://patchwork.freedesktop.org/series/55868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12080_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12080_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@reset-stress:
- shard-hsw: PASS -> INCOMPLETE [fdo#103540]
* igt@gem_workarounds@suspend-resume-fd:
- shard-apl: PASS -> DMESG-WARN [fdo#108566]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-a-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782] / [fdo#108145]
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166] +1
Possible fixes
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: FAIL [fdo#105454] / [fdo#106509] -> PASS
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105454]: https://bugs.freedesktop.org/show_bug.cgi?id=105454
[fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12080
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12080: d2dcf0a4f1004a999f325171740fffd50cbdf31a @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12080/
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[Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree
Hi all,
After merging the drm-intel-fixes tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/i915/intel_display.c: In function 'has_bogus_dpll_config':
drivers/gpu/drm/i915/intel_display.c:15432:27: error: macro "IS_GEN" requires 3
arguments, but only 2 given
return IS_GEN(dev_priv, 6) &&
^
Caused by commit
a49a17226feb ("drm/i915: Try to sanitize bogus DPLL state left over by broken
SNB BIOSen")
It seems this was cherry-picked incorrectly :-(
I have reverted that commit for today.
--
Cheers,
Stephen Rothwell
pgpTciB626Jwr.pgp
Description: OpenPGP digital signature
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp_mst: Fix regressions from new atomic VCPI helpers
== Series Details ==
Series: drm/dp_mst: Fix regressions from new atomic VCPI helpers
URL : https://patchwork.freedesktop.org/series/55933/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12078_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12078_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@wait-wedge-1us:
- shard-glk: PASS -> FAIL [fdo#105957]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
- shard-apl: PASS -> FAIL [fdo#106510] / [fdo#108145]
* igt@kms_color@pipe-c-legacy-gamma:
- shard-apl: PASS -> FAIL [fdo#104782] +1
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232] +3
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-64x64-suspend:
- shard-apl: PASS -> FAIL [fdo#103191] / [fdo#103232]
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166] +2
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-hsw: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: FAIL [fdo#103232] -> PASS +3
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS +2
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105957]: https://bugs.freedesktop.org/show_bug.cgi?id=105957
[fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12078
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12078: 8650b15d482b21cca0073b796f131ff26f19bdba @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12078/
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
On Tue, Jan 29, 2019 at 08:04:18PM +0100, Daniel Vetter wrote:
> On Tue, Jan 29, 2019 at 07:58:56PM +0200, Ville Syrjälä wrote:
> > On Tue, Jan 29, 2019 at 06:52:51PM +0100, Sam Ravnborg wrote:
> > > Hi Ville.
> > >
> > > On Tue, Jan 29, 2019 at 07:06:09PM +0200, Ville Syrjala wrote:
> > > > From: Ville Syrjälä
> > > >
> > > > drm_color_lut_check() doens't modify the passed in blob so
> > > > let's make it const.
> > > >
> > > > Also s/uint32_y/u32/ while at it.
> > > >
> > > > Cc: Matt Roper
> > > > Signed-off-by: Ville Syrjälä
> > > > ---
> > > > drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
> > > > include/drm/drm_color_mgmt.h | 4 ++--
> > > > 2 files changed, 5 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> > > > b/drivers/gpu/drm/drm_color_mgmt.c
> > > > index 968ca7c91ad8..3c8826a91a03 100644
> > > > --- a/drivers/gpu/drm/drm_color_mgmt.c
> > > > +++ b/drivers/gpu/drm/drm_color_mgmt.c
> > > > @@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
> > > > *
> > > > * Returns 0 on success, -EINVAL on failure.
> > > > */
> > > > -int drm_color_lut_check(struct drm_property_blob *lut,
> > > > - uint32_t tests)
> > > > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > > > + u32 tests)
> > >
> > > No need to linewrap this line.
> > > > {
> > > > - struct drm_color_lut *entry;
> > > > + const struct drm_color_lut *entry;
> > > > int i;
> > > >
> > > > if (!lut || !tests)
> > > > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> > > > index 6affbda6d9cb..58d4b20b5b97 100644
> > > > --- a/include/drm/drm_color_mgmt.h
> > > > +++ b/include/drm/drm_color_mgmt.h
> > > > @@ -96,6 +96,6 @@ enum drm_color_lut_tests {
> > > > DRM_COLOR_LUT_NON_DECREASING = BIT(1),
> > > > };
> > > >
> > > > -int drm_color_lut_check(struct drm_property_blob *lut,
> > > > - uint32_t tests);
> > > > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > > > + u32 tests);
> > > Likewise.
> > >
> > > With the linewrap fixed:
> > > Reviewed-by: Sam Ravnborg
> >
> > Thanks.
> >
> > >
> > > Note: does not apply to my drm-misc tree. Anything I miss here?
> >
> > I think it was merged via drm-intel.
>
> Acked-by: Daniel Vetter
>
> for merging through drm-intel then (assuming it goes in before the merge
> cutoff), with Sam's suggestions ofc.
Fixed up and pushed to dinq. Thanks for the review.
--
Ville Syrjälä
Intel
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify tracepoint
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify
tracepoint
URL : https://patchwork.freedesktop.org/series/55939/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5503 -> Patchwork_12081
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55939/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12081 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#109485]
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: NOTRUN -> DMESG-FAIL [fdo#102614]
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_busy@basic-flip-c:
- fi-kbl-7500u: {SKIP} [fdo#109271] / [fdo#109278] -> PASS +2
* igt@kms_chamelium@dp-hpd-fast:
- fi-kbl-7500u: DMESG-WARN [fdo#102505] / [fdo#103558] / [fdo#105602]
-> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-byt-clapper: FAIL [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (44 -> 39)
--
Additional (2): fi-hsw-peppy fi-pnv-d510
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan
fi-glk-j4005 fi-skl-6700hq fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5503 -> Patchwork_12081
CI_DRM_5503: 1c30ec189dd769bf9ca28ee63f658d2e2cd23311 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12081: eb1a54866d4dc4d769a7cdbd1096d49eaf3e631d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
eb1a54866d4d drm/i915: Drop fake breadcrumb irq
025c1ce0fd8f drm/i915: Replace global breadcrumbs with per-context interrupt
tracking
8f31dfb2f578 drm/i915: Remove the intel_engine_notify tracepoint
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12081/
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for Add Colorspace connector property interface (rev9)
== Series Details ==
Series: Add Colorspace connector property interface (rev9)
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12077_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12077_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@reset-stress:
- shard-snb: PASS -> INCOMPLETE [fdo#105411]
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-b-degamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232]
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_flip@basic-flip-vs-modeset:
- shard-hsw: PASS -> INCOMPLETE [fdo#103540]
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_rotation_crc@multiplane-rotation:
- shard-glk: PASS -> DMESG-FAIL [fdo#105763] / [fdo#106538]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_busy@extended-modeset-hang-newfb-render-b:
- shard-snb: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a:
- shard-kbl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-c:
- shard-hsw: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12077
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12077: 7510be7c09f566b5f28a08a54789ef421f13964a @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12077/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify tracepoint
== Series Details == Series: series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify tracepoint URL : https://patchwork.freedesktop.org/series/55939/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Remove the intel_engine_notify tracepoint Okay! Commit: drm/i915: Replace global breadcrumbs with per-context interrupt tracking +drivers/gpu/drm/i915/selftests/i915_request.c:280:40: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/i915_request.c:280:40: warning: expression using sizeof(void) -./include/linux/mm.h:619:13: error: not a function -./include/linux/mm.h:619:13: error: not a function -./include/linux/mm.h:619:13: error: undefined identifier '__builtin_mul_overflow' -./include/linux/mm.h:619:13: warning: call with no type! +./include/linux/slab.h:664:13: error: not a function +./include/linux/slab.h:664:13: error: not a function Commit: drm/i915: Drop fake breadcrumb irq Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify tracepoint
== Series Details ==
Series: series starting with [CI,1/3] drm/i915: Remove the intel_engine_notify
tracepoint
URL : https://patchwork.freedesktop.org/series/55939/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8f31dfb2f578 drm/i915: Remove the intel_engine_notify tracepoint
025c1ce0fd8f drm/i915: Replace global breadcrumbs with per-context interrupt
tracking
-:18: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#18:
Before commit 688e6c725816, the solution was simple. Every client
-:21: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#21:
688e6c725816 introduced an rbtree so that only the earliest waiter on
-:56: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#56:
References: 688e6c725816 ("drm/i915: Slaughter the thundering i915_wait_request
herd")
-:56: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#56:
References: 688e6c725816 ("drm/i915: Slaughter the thundering i915_wait_request
herd")
-:2178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
i915_gem_context *' should also have an identifier name
#2178: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:258:
+ struct i915_request *(*request_alloc)(struct i915_gem_context *,
-:2178: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
intel_engine_cs *' should also have an identifier name
#2178: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:258:
+ struct i915_request *(*request_alloc)(struct i915_gem_context *,
-:2204: WARNING:LINE_SPACING: Missing a blank line after declarations
#2204: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:284:
+ struct i915_request **requests;
+ I915_RND_STATE(prng);
-:2636: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#2636:
deleted file mode 100644
total: 3 errors, 5 warnings, 0 checks, 2570 lines checked
eb1a54866d4d drm/i915: Drop fake breadcrumb irq
___
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[Intel-gfx] [CI 2/3] drm/i915: Replace global breadcrumbs with per-context interrupt tracking
A few years ago, see commit 688e6c725816 ("drm/i915: Slaughter the
thundering i915_wait_request herd"), the issue of handling multiple
clients waiting in parallel was brought to our attention. The
requirement was that every client should be woken immediately upon its
request being signaled, without incurring any cpu overhead.
To handle certain fragility of our hw meant that we could not do a
simple check inside the irq handler (some generations required almost
unbounded delays before we could be sure of seqno coherency) and so
request completion checking required delegation.
Before commit 688e6c725816, the solution was simple. Every client
waiting on a request would be woken on every interrupt and each would do
a heavyweight check to see if their request was complete. Commit
688e6c725816 introduced an rbtree so that only the earliest waiter on
the global timeline would woken, and would wake the next and so on.
(Along with various complications to handle requests being reordered
along the global timeline, and also a requirement for kthread to provide
a delegate for fence signaling that had no process context.)
The global rbtree depends on knowing the execution timeline (and global
seqno). Without knowing that order, we must instead check all contexts
queued to the HW to see which may have advanced. We trim that list by
only checking queued contexts that are being waited on, but still we
keep a list of all active contexts and their active signalers that we
inspect from inside the irq handler. By moving the waiters onto the fence
signal list, we can combine the client wakeup with the dma_fence
signaling (a dramatic reduction in complexity, but does require the HW
being coherent, the seqno must be visible from the cpu before the
interrupt is raised - we keep a timer backup just in case).
Having previously fixed all the issues with irq-seqno serialisation (by
inserting delays onto the GPU after each request instead of random delays
on the CPU after each interrupt), we can rely on the seqno state to
perfom direct wakeups from the interrupt handler. This allows us to
preserve our single context switch behaviour of the current routine,
with the only downside that we lose the RT priority sorting of wakeups.
In general, direct wakeup latency of multiple clients is about the same
(about 10% better in most cases) with a reduction in total CPU time spent
in the waiter (about 20-50% depending on gen). Average herd behaviour is
improved, but at the cost of not delegating wakeups on task_prio.
v2: Capture fence signaling state for error state and add comments to
warm even the most cold of hearts.
v3: Check if the request is still active before busywaiting
v4: Reduce the amount of pointer misdirection with list_for_each_safe
and using a local i915_request variable inside the loops
v5: Add a missing pluralisation to a purely informative selftest message.
References: 688e6c725816 ("drm/i915: Slaughter the thundering i915_wait_request
herd")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 28 +-
drivers/gpu/drm/i915/i915_gem_context.c | 3 +
drivers/gpu/drm/i915/i915_gem_context.h | 2 +
drivers/gpu/drm/i915/i915_gpu_error.c | 83 +-
drivers/gpu/drm/i915/i915_gpu_error.h | 9 +-
drivers/gpu/drm/i915/i915_irq.c | 82 +-
drivers/gpu/drm/i915/i915_request.c | 142 ++-
drivers/gpu/drm/i915/i915_request.h | 72 +-
drivers/gpu/drm/i915/i915_reset.c | 16 +-
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
drivers/gpu/drm/i915/intel_breadcrumbs.c | 818 +-
drivers/gpu/drm/i915/intel_engine_cs.c| 35 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 94 +-
.../drm/i915/selftests/i915_mock_selftests.h | 1 -
drivers/gpu/drm/i915/selftests/i915_request.c | 425 +
drivers/gpu/drm/i915/selftests/igt_spinner.c | 5 -
.../drm/i915/selftests/intel_breadcrumbs.c| 470 --
.../gpu/drm/i915/selftests/intel_hangcheck.c | 2 +-
drivers/gpu/drm/i915/selftests/lib_sw_fence.c | 54 ++
drivers/gpu/drm/i915/selftests/lib_sw_fence.h | 3 +
drivers/gpu/drm/i915/selftests/mock_engine.c | 17 +-
drivers/gpu/drm/i915/selftests/mock_engine.h | 6 -
23 files changed, 890 insertions(+), 1481 deletions(-)
delete mode 100644 drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index f5ac03f06e26..b1ac0f78cb42 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1316,29 +1316,16 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
seq_printf(m, "GT active? %s\n", yesno(dev_priv->gt.awake));
for_each_engine(engine, dev_priv, id) {
- struct intel_breadcrumbs *b = &engine->breadcrumbs;
-
[Intel-gfx] [CI 1/3] drm/i915: Remove the intel_engine_notify tracepoint
The global seqno is defunct and so we have no meaningful indicator of
forward progress for an engine. You need to listen to the request
signaling tracepoints instead.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_irq.c | 2 --
drivers/gpu/drm/i915/i915_trace.h | 25 -
2 files changed, 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index caade521c174..e1d2312ec937 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1229,8 +1229,6 @@ static void notify_ring(struct intel_engine_cs *engine)
wake_up_process(tsk);
rcu_read_unlock();
-
- trace_intel_engine_notify(engine, wait);
}
static void vlv_c0_read(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_trace.h
b/drivers/gpu/drm/i915/i915_trace.h
index 43da14f08dc0..eab313c3163c 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -752,31 +752,6 @@ trace_i915_request_out(struct i915_request *rq)
#endif
#endif
-TRACE_EVENT(intel_engine_notify,
- TP_PROTO(struct intel_engine_cs *engine, bool waiters),
- TP_ARGS(engine, waiters),
-
- TP_STRUCT__entry(
-__field(u32, dev)
-__field(u16, class)
-__field(u16, instance)
-__field(u32, seqno)
-__field(bool, waiters)
-),
-
- TP_fast_assign(
- __entry->dev = engine->i915->drm.primary->index;
- __entry->class = engine->uabi_class;
- __entry->instance = engine->instance;
- __entry->seqno = intel_engine_get_seqno(engine);
- __entry->waiters = waiters;
- ),
-
- TP_printk("dev=%u, engine=%u:%u, seqno=%u, waiters=%u",
- __entry->dev, __entry->class, __entry->instance,
- __entry->seqno, __entry->waiters)
-);
-
DEFINE_EVENT(i915_request, i915_request_retire,
TP_PROTO(struct i915_request *rq),
TP_ARGS(rq)
--
2.20.1
___
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[Intel-gfx] [CI 3/3] drm/i915: Drop fake breadcrumb irq
Missed breadcrumb detection is defunct due to the tight coupling with
dma_fence signaling and the myriad ways we may signal fences from
everywhere but from an interrupt, i.e. we frequently signal a fence
before we even see its interrupt. This means that even if we miss an
interrupt for a fence, it still is signaled before our breadcrumb
hangcheck fires, so simplify the breadcrumb hangchecking by moving it
into the GPU hangcheck and forgo fake interrupts.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_debugfs.c | 93 ---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 -
drivers/gpu/drm/i915/i915_gpu_error.h | 5 -
drivers/gpu/drm/i915/intel_breadcrumbs.c | 147 +-
drivers/gpu/drm/i915/intel_hangcheck.c| 2 +
drivers/gpu/drm/i915/intel_ringbuffer.h | 5 -
.../gpu/drm/i915/selftests/igt_live_test.c| 7 -
7 files changed, 5 insertions(+), 256 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index b1ac0f78cb42..fa2c226fc779 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1322,9 +1322,6 @@ static int i915_hangcheck_info(struct seq_file *m, void
*unused)
intel_engine_last_submit(engine),
jiffies_to_msecs(jiffies -
engine->hangcheck.action_timestamp));
- seq_printf(m, "\tfake irq active? %s\n",
- yesno(test_bit(engine->id,
-
&dev_priv->gpu_error.missed_irq_rings)));
seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n",
(long long)engine->hangcheck.acthd,
@@ -3900,94 +3897,6 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
i915_wedged_get, i915_wedged_set,
"%llu\n");
-static int
-fault_irq_set(struct drm_i915_private *i915,
- unsigned long *irq,
- unsigned long val)
-{
- int err;
-
- err = mutex_lock_interruptible(&i915->drm.struct_mutex);
- if (err)
- return err;
-
- err = i915_gem_wait_for_idle(i915,
-I915_WAIT_LOCKED |
-I915_WAIT_INTERRUPTIBLE,
-MAX_SCHEDULE_TIMEOUT);
- if (err)
- goto err_unlock;
-
- *irq = val;
- mutex_unlock(&i915->drm.struct_mutex);
-
- /* Flush idle worker to disarm irq */
- drain_delayed_work(&i915->gt.idle_work);
-
- return 0;
-
-err_unlock:
- mutex_unlock(&i915->drm.struct_mutex);
- return err;
-}
-
-static int
-i915_ring_missed_irq_get(void *data, u64 *val)
-{
- struct drm_i915_private *dev_priv = data;
-
- *val = dev_priv->gpu_error.missed_irq_rings;
- return 0;
-}
-
-static int
-i915_ring_missed_irq_set(void *data, u64 val)
-{
- struct drm_i915_private *i915 = data;
-
- return fault_irq_set(i915, &i915->gpu_error.missed_irq_rings, val);
-}
-
-DEFINE_SIMPLE_ATTRIBUTE(i915_ring_missed_irq_fops,
- i915_ring_missed_irq_get, i915_ring_missed_irq_set,
- "0x%08llx\n");
-
-static int
-i915_ring_test_irq_get(void *data, u64 *val)
-{
- struct drm_i915_private *dev_priv = data;
-
- *val = dev_priv->gpu_error.test_irq_rings;
-
- return 0;
-}
-
-static int
-i915_ring_test_irq_set(void *data, u64 val)
-{
- struct drm_i915_private *i915 = data;
-
- /* GuC keeps the user interrupt permanently enabled for submission */
- if (USES_GUC_SUBMISSION(i915))
- return -ENODEV;
-
- /*
-* From icl, we can no longer individually mask interrupt generation
-* from each engine.
-*/
- if (INTEL_GEN(i915) >= 11)
- return -ENODEV;
-
- val &= INTEL_INFO(i915)->ring_mask;
- DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val);
-
- return fault_irq_set(i915, &i915->gpu_error.test_irq_rings, val);
-}
-
-DEFINE_SIMPLE_ATTRIBUTE(i915_ring_test_irq_fops,
- i915_ring_test_irq_get, i915_ring_test_irq_set,
- "0x%08llx\n");
-
#define DROP_UNBOUND BIT(0)
#define DROP_BOUND BIT(1)
#define DROP_RETIREBIT(2)
@@ -4751,8 +4660,6 @@ static const struct i915_debugfs_files {
} i915_debugfs_files[] = {
{"i915_wedged", &i915_wedged_fops},
{"i915_cache_sharing", &i915_cache_sharing_fops},
- {"i915_ring_missed_irq", &i915_ring_missed_irq_fops},
- {"i915_ring_test_irq", &i915_ring_test_irq_fops},
{"i915_gem_drop_caches", &i915_drop_caches_fops},
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
{"i915_error_state", &i915_error_state_fops},
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
in
[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Constify drm_color_lut_check()
== Series Details ==
Series: drm: Constify drm_color_lut_check()
URL : https://patchwork.freedesktop.org/series/55924/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12076_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12076_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_color@pipe-b-degamma:
- shard-apl: PASS -> FAIL [fdo#104782]
* igt@kms_cursor_crc@cursor-256x85-sliding:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232] +1
* igt@kms_plane@pixel-format-pipe-a-planes:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166] +2
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-apl: PASS -> FAIL [fdo#108145]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_color@pipe-b-ctm-max:
- shard-apl: FAIL [fdo#108147] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-64x21-random:
- shard-apl: FAIL [fdo#103232] -> PASS +5
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS +1
* igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@kms_setmode@basic:
- shard-apl: FAIL [fdo#99912] -> PASS
* igt@perf_pmu@rc6-runtime-pm-long:
- shard-apl: FAIL [fdo#105010] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
Warnings
* igt@i915_suspend@shrink:
- shard-glk: DMESG-WARN [fdo#109244] -> INCOMPLETE [fdo#103359] /
[fdo#106886] / [k.org#198133]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106886]: https://bugs.freedesktop.org/show_bug.cgi?id=106886
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109244]: https://bugs.freedesktop.org/show_bug.cgi?id=109244
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12076
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12076: 4c5ebfc18c9220e99fa8eac8a5abcaec8c0e2ba6 @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12076/
___
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Re: [Intel-gfx] [PATCH 1/3] drm/dp_mst: Fix unbalanced malloc ref in drm_dp_mst_deallocate_vcpi()
On Tue, Jan 29, 2019 at 01:39:25PM -0500, Lyude Paul wrote: > In drm_dp_mst_deallocate_vcpi(), we currently unconditionally call > drm_dp_mst_put_port_malloc() on the port that's passed to us, even if we > never successfully allocated VCPI to it. This is contrary to what we do > in drm_dp_mst_allocate_vcpi(), where we only call > drm_dp_mst_get_port_malloc() on the passed port if we successfully > allocated VCPI to it. > > As a result, if drm_dp_mst_allocate_vcpi() fails during a modeset and > another successive modeset calls drm_dp_mst_deallocate_vcpi() we will > end up dropping someone else's malloc reference to the port. Example: > > [ 962.309260] > == > [ 962.309290] BUG: KASAN: use-after-free in > drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309296] Read of size 4 at addr 888416c30004 by task > kworker/0:1H/500 > > [ 962.309308] CPU: 0 PID: 500 Comm: kworker/0:1H Tainted: GW O > 5.0.0-rc2Lyude-Test+ #1 > [ 962.309313] Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W > (1.12 ) 04/09/2018 > [ 962.309428] Workqueue: events_highpri intel_atomic_cleanup_work [i915] > [ 962.309434] Call Trace: > [ 962.309452] dump_stack+0xad/0x150 > [ 962.309462] ? dump_stack_print_info.cold.0+0x1b/0x1b > [ 962.309472] ? kmsg_dump_rewind_nolock+0xd9/0xd9 > [ 962.309504] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309515] print_address_description+0x6c/0x23c > [ 962.309542] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309568] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309577] kasan_report.cold.3+0x1a/0x32 > [ 962.309605] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309631] drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] > [ 962.309658] ? drm_dp_mst_put_mstb_malloc+0x180/0x180 [drm_kms_helper] > [ 962.309687] drm_dp_mst_destroy_state+0xcd/0x120 [drm_kms_helper] > [ 962.309745] drm_atomic_state_default_clear+0x6ee/0xcc0 [drm] > [ 962.309864] intel_atomic_state_clear+0xe/0x80 [i915] > [ 962.309928] __drm_atomic_state_free+0x35/0xd0 [drm] > [ 962.310044] intel_atomic_cleanup_work+0x56/0x70 [i915] > [ 962.310057] process_one_work+0x884/0x1400 > [ 962.310067] ? drain_workqueue+0x5a0/0x5a0 > [ 962.310075] ? __schedule+0x87f/0x1e80 > [ 962.310086] ? __sched_text_start+0x8/0x8 > [ 962.310095] ? run_rebalance_domains+0x400/0x400 > [ 962.310110] ? deref_stack_reg+0xb4/0x120 > [ 962.310117] ? __read_once_size_nocheck.constprop.7+0x10/0x10 > [ 962.310124] ? worker_enter_idle+0x47f/0x6a0 > [ 962.310134] ? schedule+0xd7/0x2e0 > [ 962.310141] ? __schedule+0x1e80/0x1e80 > [ 962.310148] ? _raw_spin_lock_irq+0x9f/0x130 > [ 962.310155] ? _raw_write_unlock_irqrestore+0x110/0x110 > [ 962.310164] worker_thread+0x196/0x11e0 > [ 962.310175] ? set_load_weight+0x2e0/0x2e0 > [ 962.310181] ? __switch_to_asm+0x34/0x70 > [ 962.310187] ? __switch_to_asm+0x40/0x70 > [ 962.310194] ? process_one_work+0x1400/0x1400 > [ 962.310199] ? __switch_to_asm+0x40/0x70 > [ 962.310205] ? __switch_to_asm+0x34/0x70 > [ 962.310211] ? __switch_to_asm+0x34/0x70 > [ 962.310216] ? __switch_to_asm+0x40/0x70 > [ 962.310221] ? __switch_to_asm+0x34/0x70 > [ 962.310226] ? __switch_to_asm+0x40/0x70 > [ 962.310231] ? __switch_to_asm+0x34/0x70 > [ 962.310236] ? __switch_to_asm+0x40/0x70 > [ 962.310242] ? syscall_return_via_sysret+0xf/0x7f > [ 962.310248] ? __switch_to_asm+0x34/0x70 > [ 962.310253] ? __switch_to_asm+0x40/0x70 > [ 962.310258] ? __switch_to_asm+0x34/0x70 > [ 962.310263] ? __switch_to_asm+0x40/0x70 > [ 962.310268] ? __switch_to_asm+0x34/0x70 > [ 962.310273] ? __switch_to_asm+0x40/0x70 > [ 962.310281] ? __schedule+0x87f/0x1e80 > [ 962.310292] ? __sched_text_start+0x8/0x8 > [ 962.310300] ? save_stack+0x8c/0xb0 > [ 962.310308] ? __kasan_kmalloc.constprop.6+0xc6/0xd0 > [ 962.310313] ? kthread+0x98/0x3a0 > [ 962.310318] ? ret_from_fork+0x35/0x40 > [ 962.310334] ? __wake_up_common+0x178/0x6f0 > [ 962.310343] ? _raw_spin_lock_irqsave+0xa4/0x140 > [ 962.310349] ? __lock_text_start+0x8/0x8 > [ 962.310355] ? _raw_write_lock_irqsave+0x70/0x130 > [ 962.310360] ? __lock_text_start+0x8/0x8 > [ 962.310371] ? process_one_work+0x1400/0x1400 > [ 962.310376] kthread+0x2e2/0x3a0 > [ 962.310383] ? kthread_create_on_node+0xc0/0xc0 > [ 962.310389] ret_from_fork+0x35/0x40 > > [ 962.310401] Allocated by task 1462: > [ 962.310410] __kasan_kmalloc.constprop.6+0xc6/0xd0 > [ 962.310437] drm_dp_add_port+0xd60/0x1960 [drm_kms_helper] > [ 962.310464] drm_dp_send_link_address+0x4b0/0x770 [drm_kms_helper] > [ 962.310491] drm_dp_check_and_send_link_address+0x197/0x1f0 > [drm_kms_helper] > [ 962.310515] drm_dp_mst_link_probe_work+0x2b6/0x330 [drm_kms_helper] > [ 962.310522] process_one_work+0x884/0x1400 > [ 962.310529] worker_thread+0x196/0x11e0 > [ 962.310
Re: [Intel-gfx] [PATCH 3/3] drm/i915: Always allocate VCPI during system resume
On Tue, Jan 29, 2019 at 01:39:27PM -0500, Lyude Paul wrote: > Since there's a chance MST topologies can be removed while the system is > in suspend, there's also a chance that the connectors in the atomic > state which we try to restore on system resume will have been > unregistered if they were part of an MST topology that was removed > mid-suspend. In such situations, we'll currently skip recalculating the > VCPI. Normally this would be safe since we don't expect to be allowed to > enable displays on unregistered connections, but since we need to try > our best to restore even partially invalid atomic states on system > resume we end up introducing the chance that we try enabling a display > on a now-unregistered connector. This of course results on a blow up > during system resume: > > [ 1894.177788] [drm:pipe_config_err [i915]] *ERROR* mismatch in dp_m_n > (expected tu 0 gmch 1730150/8388608 link 288358/1048576, or tu 0 gmch 0/0 > link 0/0, found tu 64, gmch 1730150/8388608 link 288358/1048576) > [ 1894.177795] [ cut here ] > [ 1894.177799] pipe state doesn't match! > [ 1894.177905] WARNING: CPU: 2 PID: 1894 at > drivers/gpu/drm/i915/intel_display.c:12292 > intel_atomic_commit_tail+0xd5e/0xdd0 [i915] > [ 1894.177909] Modules linked in: i915(O) drm_kms_helper(O) drm(O) vfat fat > joydev iTCO_wdt wmi_bmof btusb btrtl btbcm intel_rapl btintel i2c_algo_bit > x86_pkg_temp_thermal bluetooth syscopyarea coretemp sysfillrect sysimgblt > crc32_pclmul fb_sys_fops ucsi_acpi psmouse ecdh_generic pcspkr typec_ucsi > i2c_i801 typec mei_me mei i2c_core wmi thinkpad_acpi ledtrig_audio snd > soundcore rfkill tpm_tis tpm_tis_core video pcc_cpufreq tpm acpi_pad uas > usb_storage crc32c_intel nvme serio_raw nvme_core xhci_pci xhci_hcd [last > unloaded: drm] > [ 1894.177990] CPU: 2 PID: 1894 Comm: kworker/u16:8 Tainted: G O > 5.0.0-rc4Lyude-Test+ #9 > [ 1894.177994] Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W > (1.12 ) 04/09/2018 > [ 1894.178005] Workqueue: events_unbound async_run_entry_fn > [ 1894.178079] RIP: 0010:intel_atomic_commit_tail+0xd5e/0xdd0 [i915] > [ 1894.178085] Code: ba 01 00 00 00 4c 89 4c 24 10 e8 3d 46 01 00 4c 8b 4c 24 > 10 e9 a4 fb ff ff e8 b2 18 bd e0 0f 0b e9 a5 fd ff ff e8 a6 18 bd e0 <0f> 0b > e9 f1 f9 ff ff e8 9a 18 bd e0 0f 0b 0f b6 44 24 18 e9 23 f9 > [ 1894.178090] RSP: :c9553c08 EFLAGS: 00010286 > [ 1894.178096] RAX: RBX: 888459edc000 RCX: > 0006 > [ 1894.178101] RDX: 0007 RSI: 8884591e2f90 RDI: > 88845e295690 > [ 1894.178105] RBP: 888454e27000 R08: R09: > > [ 1894.178108] R10: R11: R12: > 888454e22000 > [ 1894.178112] R13: 888454e21000 R14: 8883ca680750 R15: > 8883ca680758 > [ 1894.178118] FS: () GS:88845e28() > knlGS: > [ 1894.178123] CS: 0010 DS: ES: CR0: 80050033 > [ 1894.178127] CR2: CR3: 02214001 CR4: > 003606e0 > [ 1894.178131] DR0: DR1: DR2: > > [ 1894.178135] DR3: DR6: fffe0ff0 DR7: > 0400 > [ 1894.178139] Call Trace: > [ 1894.178224] intel_atomic_commit+0x240/0x320 [i915] > [ 1894.178251] drm_atomic_helper_commit_duplicated_state+0xc9/0xe0 > [drm_kms_helper] > [ 1894.178321] __intel_display_resume+0x82/0xd0 [i915] > [ 1894.178391] intel_display_resume+0xcf/0x120 [i915] > [ 1894.178453] i915_drm_resume+0xb1/0x100 [i915] > [ 1894.178465] ? pci_pm_suspend_late+0x30/0x30 > [ 1894.178473] dpm_run_callback+0x70/0x210 > [ 1894.178484] device_resume+0xae/0x1f0 > [ 1894.178493] async_resume+0x19/0x30 > [ 1894.178502] async_run_entry_fn+0x39/0x160 > [ 1894.178513] process_one_work+0x23c/0x590 > [ 1894.178529] worker_thread+0x30/0x380 > [ 1894.178539] ? rescuer_thread+0x340/0x340 > [ 1894.178545] kthread+0x112/0x130 > [ 1894.178552] ? kthread_create_on_node+0x60/0x60 > [ 1894.178563] ret_from_fork+0x3a/0x50 > [ 1894.178582] irq event stamp: 76782 > [ 1894.178591] hardirqs last enabled at (76781): [] > vprintk_emit+0x2c5/0x2d0 > [ 1894.178600] hardirqs last disabled at (76782): [] > trace_hardirqs_off_thunk+0x1a/0x1c > [ 1894.178609] softirqs last enabled at (76734): [] > __do_softirq+0x35d/0x412 > [ 1894.178618] softirqs last disabled at (76727): [] > irq_exit+0xe0/0xf0 > [ 1894.178687] WARNING: CPU: 2 PID: 1894 at > drivers/gpu/drm/i915/intel_display.c:12292 > intel_atomic_commit_tail+0xd5e/0xdd0 [i915] > [ 1894.178692] ---[ end trace 0df08c0b9a67376e ]--- > > So, fix this by using the new drm_atomic_state.suspend_or_resume hook in > order to force us to retrieve a VCPI allocation when restoring a pipe's > atomic state. This is safe, since drm_dp_atomic_find_vcpi_slots() will > just return the VCPI allocation we had pre-suspend. > > Signed-off-by: Lyude
Re: [Intel-gfx] [PATCH 2/3] drm/atomic: Add drm_atomic_state->suspend_or_resume
On Tue, Jan 29, 2019 at 01:39:26PM -0500, Lyude Paul wrote:
> Since
>
> commit 39b50c603878 ("drm/atomic_helper: Stop modesets on unregistered
> connectors harder")
>
> We've been failing atomic checks if they try to enable new displays on
> unregistered connectors. This is fine except for the one situation that
> breaks atomic assumptions: suspend/resume. If a connector is
> unregistered before we attempt to restore the atomic state, something we
> end up failing the atomic check that happens when trying to restore the
> state during resume.
>
> Normally this would be OK: we try our best to make sure that the atomic
> state pre-suspend can be restored post-suspend, but failures at that
> point usually don't cause problems. That is of course, until we
> introduced the new atomic MST VCPI helpers:
>
> [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:65:pipe B]
> active changed
> [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for
> [CONNECTOR:123:DP-5]
> [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling
> [CONNECTOR:123:DP-5]
> [drm:drm_atomic_get_private_obj_state [drm]] Added new private object
> 25844636 state 9fd2899a to 3a13d7b8
> WARNING: CPU: 6 PID: 1070 at drivers/gpu/drm/drm_dp_mst_topology.c:3153
> drm_dp_atomic_release_vcpi_slots+0xb9/0x200 [drm_kms_helper]
> Modules linked in: fuse vfat fat snd_hda_codec_hdmi snd_hda_codec_realtek
> snd_hda_codec_generic joydev iTCO_wdt i915(O) wmi_bmof intel_rapl btusb btrtl
> x86_pkg_temp_thermal btbcm btintel coretemp i2c_algo_bit drm_kms_helper(O)
> crc32_pclmul snd_hda_intel syscopyarea sysfillrect snd_hda_codec sysimgblt
> snd_hda_core bluetooth fb_sys_fops snd_pcm pcspkr drm(O) psmouse snd_timer
> mei_me ecdh_generic i2c_i801 mei i2c_core ucsi_acpi typec_ucsi typec wmi
> thinkpad_acpi ledtrig_audio snd soundcore tpm_tis rfkill tpm_tis_core video
> tpm acpi_pad pcc_cpufreq uas usb_storage crc32c_intel nvme serio_raw xhci_pci
> nvme_core xhci_hcd
> CPU: 6 PID: 1070 Comm: gnome-shell Tainted: GW O
> 5.0.0-rc2Lyude-Test+ #1
> Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W (1.12 ) 04/09/2018
> RIP: 0010:drm_dp_atomic_release_vcpi_slots+0xb9/0x200 [drm_kms_helper]
> Code: 00 4c 39 6d f0 74 49 48 8d 7b 10 48 89 f9 48 c1 e9 03 42 80 3c 21 00 0f
> 85 d2 00 00 00 48 8b 6b 10 48 8d 5d f0 49 39 ee 75 c5 <0f> 0b 48 c7 c7 c0 78
> b3 a0 48 89 c2 4c 89 ee e8 03 6c aa ff b8 ea
> RSP: 0018:88841235f268 EFLAGS: 00010246
> RAX: 88841bf12ab0 RBX: 88841bf12aa8 RCX: 1110837e2557
> RDX: dc00 RSI: RDI: ed108246bde0
> RBP: 88841bf12ab8 R08: ed1083db3c93 R09: ed1083db3c92
> R10: ed1083db3c92 R11: 88841ed9e497 R12: 888419555d80
> R13: 8883bc499100 R14: 88841bf12ab8 R15:
> FS: 7f16fbd4cd00() GS:88841ed8() knlGS:
> CS: 0010 DS: ES: CR0: 80050033
> CR2: 7f1687c9f000 CR3: 0003ba3cc003 CR4: 003606e0
> DR0: DR1: DR2:
> DR3: DR6: fffe0ff0 DR7: 0400
> Call Trace:
> drm_atomic_helper_check_modeset+0xf21/0x2f50 [drm_kms_helper]
> ? drm_atomic_helper_commit_modeset_enables+0xa90/0xa90 [drm_kms_helper]
> ? __printk_safe_exit+0x10/0x10
> ? save_stack+0x8c/0xb0
> ? vprintk_func+0x96/0x1bf
> ? __printk_safe_exit+0x10/0x10
> intel_atomic_check+0x234/0x4750 [i915]
> ? printk+0x9f/0xc5
> ? kmsg_dump_rewind_nolock+0xd9/0xd9
> ? _raw_spin_lock_irqsave+0xa4/0x140
> ? drm_atomic_check_only+0xb1/0x28b0 [drm]
> ? drm_dbg+0x186/0x1b0 [drm]
> ? drm_dev_dbg+0x200/0x200 [drm]
> ? intel_link_compute_m_n+0xb0/0xb0 [i915]
> ? drm_mode_put_tile_group+0x20/0x20 [drm]
> ? skl_plane_format_mod_supported+0x17f/0x1b0 [i915]
> ? drm_plane_check_pixel_format+0x14a/0x310 [drm]
> drm_atomic_check_only+0x13c4/0x28b0 [drm]
> ? drm_state_info+0x220/0x220 [drm]
> ? drm_atomic_helper_disable_plane+0x1d0/0x1d0 [drm_kms_helper]
> ? pick_single_encoder_for_connector+0xe0/0xe0 [drm_kms_helper]
> ? kasan_unpoison_shadow+0x35/0x40
> drm_atomic_commit+0x3b/0x100 [drm]
> drm_atomic_helper_set_config+0xd5/0x100 [drm_kms_helper]
> drm_mode_setcrtc+0x636/0x1660 [drm]
> ? vprintk_func+0x96/0x1bf
> ? drm_dev_dbg+0x200/0x200 [drm]
> ? drm_mode_getcrtc+0x790/0x790 [drm]
> ? printk+0x9f/0xc5
> ? mutex_unlock+0x1d/0x40
> ? drm_mode_addfb2+0x2e9/0x3a0 [drm]
> ? rcu_sync_dtor+0x2e0/0x2e0
> ? drm_dbg+0x186/0x1b0 [drm]
> ? set_page_dirty+0x271/0x4d0
> drm_ioctl_kernel+0x203/0x290 [drm]
> ? drm_mode_getcrtc+0x790/0x790 [drm]
> ? drm_setversion+0x7f0/0x7f0 [drm]
> ? __switch_to_asm+0x34/0x70
> ? __switch_to_asm+0x34/0x70
> drm_ioctl+0x445/0x950 [drm]
> ? drm_mode_getcrtc+0x790/0x790 [drm]
> ? drm_getunique+0x220/0x220 [drm]
> ? expand_files.part.10+0x920/0x920
> do_vfs_ioctl+0x1a1/0x13d0
> ? ioctl_preallocate+0x2b0/0x2b0
> ? __fget_l
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: MST and wakeref leak fixes (rev2)
== Series Details ==
Series: drm/i915: MST and wakeref leak fixes (rev2)
URL : https://patchwork.freedesktop.org/series/55868/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12080
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55868/revisions/2/mbox/
Known issues
Here are the changes found in Patchwork_12080 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-FAIL [fdo#105079] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
Participating hosts (46 -> 39)
--
Additional (1): fi-icl-y
Missing(8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-pnv-d510 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12080
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12080: d2dcf0a4f1004a999f325171740fffd50cbdf31a @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d2dcf0a4f100 drm/i915: Don't send hotplug in intel_dp_check_mst_status()
649fabd15d65 drm/i915: Don't send MST hotplugs during resume
13be9527c910 drm/i915: Block fbdev HPD processing during suspend
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12080/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/2] drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC set
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: Prevent a race during
I915_GEM_MMAP ioctl with WC set
URL : https://patchwork.freedesktop.org/series/55919/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12074_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12074_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-128x128-dpms:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-64x21-onscreen:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: PASS -> FAIL [fdo#105363]
* igt@kms_flip@dpms-vs-vblank-race:
- shard-hsw: PASS -> INCOMPLETE [fdo#103540]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166] +2
Possible fixes
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-apl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-apl: FAIL [fdo#103191] / [fdo#103232] -> PASS
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
- shard-glk: FAIL [fdo#103166] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12074
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12074: 80c1956210721a57e49cbfcae05082181d756d8d @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12074/
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable fastboot by default on VLV and CHV
== Series Details ==
Series: drm/i915: Enable fastboot by default on VLV and CHV
URL : https://patchwork.freedesktop.org/series/55911/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12071_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12071_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-128x128-random:
- shard-apl: PASS -> FAIL [fdo#103232] +1
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: PASS -> FAIL [fdo#105363] +1
* igt@kms_plane@plane-position-covered-pipe-c-planes:
- shard-apl: PASS -> FAIL [fdo#103166]
- shard-glk: PASS -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
- shard-apl: DMESG-WARN [fdo#107956] -> PASS
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-64x64-dpms:
- shard-apl: FAIL [fdo#103232] -> PASS +1
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-glk: FAIL [fdo#103166] -> PASS +1
* igt@perf_pmu@rc6-runtime-pm-long:
- shard-apl: FAIL [fdo#105010] -> PASS
* igt@prime_busy@hang-bsd:
- shard-hsw: FAIL [fdo#108807] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108807]: https://bugs.freedesktop.org/show_bug.cgi?id=108807
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12071
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12071: e62714cbe893deec958c6ee91b95f407ae8d2132 @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12071/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: MST and wakeref leak fixes (rev2)
== Series Details == Series: drm/i915: MST and wakeref leak fixes (rev2) URL : https://patchwork.freedesktop.org/series/55868/ State : warning == Summary == $ dim checkpatch origin/drm-tip 13be9527c910 drm/i915: Block fbdev HPD processing during suspend -:77: WARNING:BOOL_BITFIELD: Avoid using bool as bitfield. Prefer bool bitfields as unsigned int or u<8|16|32> #77: FILE: drivers/gpu/drm/i915/intel_drv.h:218: + bool hpd_suspended : 1; -:81: WARNING:BOOL_BITFIELD: Avoid using bool as bitfield. Prefer bool bitfields as unsigned int or u<8|16|32> #81: FILE: drivers/gpu/drm/i915/intel_drv.h:222: + bool hpd_waiting : 1; total: 0 errors, 2 warnings, 0 checks, 83 lines checked 649fabd15d65 drm/i915: Don't send MST hotplugs during resume d2dcf0a4f100 drm/i915: Don't send hotplug in intel_dp_check_mst_status() ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter
URL : https://patchwork.freedesktop.org/series/55934/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12079
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_12079 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12079, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55934/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_12079:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_hangcheck:
- fi-whl-u: PASS -> INCOMPLETE
Known issues
Here are the changes found in Patchwork_12079 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: NOTRUN -> FAIL [fdo#103182]
* igt@kms_flip@basic-flip-vs-modeset:
- fi-skl-6700hq: PASS -> DMESG-WARN [fdo#105998]
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-FAIL [fdo#105079] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#105998]: https://bugs.freedesktop.org/show_bug.cgi?id=105998
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (46 -> 37)
--
Additional (1): fi-gdg-551
Missing(10): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-6770hq
fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-glk-j4005 fi-bdw-samus fi-kbl-r
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12079
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12079: 38c4163ab83188a8a9d3e0622d180c2a8d082701 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
38c4163ab831 drm/i915/execlists: Suppress preempting self
50343cce1f17 drm/i915: Rename execlists->queue_priority to queue_priority_hint
aea480e69b0b drm/i915: Identify active requests
0d88b17969c3 drm/i915/selftests: Apply a subtest filter
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12079/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter
== Series Details == Series: series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter URL : https://patchwork.freedesktop.org/series/55934/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/selftests: Apply a subtest filter Okay! Commit: drm/i915: Identify active requests Okay! Commit: drm/i915: Rename execlists->queue_priority to queue_priority_hint Okay! Commit: drm/i915/execlists: Suppress preempting self -drivers/gpu/drm/i915/intel_ringbuffer.h:602:23: warning: expression using sizeof(void) ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/selftests: Apply a subtest filter
URL : https://patchwork.freedesktop.org/series/55934/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0d88b17969c3 drm/i915/selftests: Apply a subtest filter
aea480e69b0b drm/i915: Identify active requests
50343cce1f17 drm/i915: Rename execlists->queue_priority to queue_priority_hint
38c4163ab831 drm/i915/execlists: Suppress preempting self
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
value as it may match a second preemption request within the same time period
-:34: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit a2bf92e8cc16
("drm/i915/execlists: Avoid kicking priority on the current context")'
#34:
References: a2bf92e8cc16 ("drm/i915/execlists: Avoid kicking priority on the
current context")
total: 1 errors, 1 warnings, 0 checks, 338 lines checked
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp_mst: Fix regressions from new atomic VCPI helpers
== Series Details ==
Series: drm/dp_mst: Fix regressions from new atomic VCPI helpers
URL : https://patchwork.freedesktop.org/series/55933/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12078
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55933/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12078 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: NOTRUN -> FAIL [fdo#103182] +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-blb-e6850: PASS -> INCOMPLETE [fdo#107718]
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-FAIL [fdo#105079] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (46 -> 41)
--
Additional (2): fi-icl-y fi-gdg-551
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12078
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12078: 8650b15d482b21cca0073b796f131ff26f19bdba @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8650b15d482b drm/i915: Always allocate VCPI during system resume
e8ee56a00aab drm/atomic: Add drm_atomic_state->suspend_or_resume
5eace8601b7f drm/dp_mst: Fix unbalanced malloc ref in
drm_dp_mst_deallocate_vcpi()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12078/
___
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Re: [Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
On Tue, Jan 29, 2019 at 07:06:09PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_color_lut_check() doens't modify the passed in blob so
s/doens't/doesn't/
Otherwise, LGTM.
Reviewed-by:
> let's make it const.
>
> Also s/uint32_y/u32/ while at it.
>
> Cc: Matt Roper
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
> include/drm/drm_color_mgmt.h | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> b/drivers/gpu/drm/drm_color_mgmt.c
> index 968ca7c91ad8..3c8826a91a03 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
> *
> * Returns 0 on success, -EINVAL on failure.
> */
> -int drm_color_lut_check(struct drm_property_blob *lut,
> - uint32_t tests)
> +int drm_color_lut_check(const struct drm_property_blob *lut,
> + u32 tests)
> {
> - struct drm_color_lut *entry;
> + const struct drm_color_lut *entry;
> int i;
>
> if (!lut || !tests)
> diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> index 6affbda6d9cb..58d4b20b5b97 100644
> --- a/include/drm/drm_color_mgmt.h
> +++ b/include/drm/drm_color_mgmt.h
> @@ -96,6 +96,6 @@ enum drm_color_lut_tests {
> DRM_COLOR_LUT_NON_DECREASING = BIT(1),
> };
>
> -int drm_color_lut_check(struct drm_property_blob *lut,
> - uint32_t tests);
> +int drm_color_lut_check(const struct drm_property_blob *lut,
> + u32 tests);
> #endif
> --
> 2.19.2
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Block fbdev HPD processing during suspend
Quoting Lyude Paul (2019-01-29 19:09:59)
> When resuming, we check whether or not any previously connected
> MST topologies are still present and if so, attempt to resume them. If
> this fails, we disable said MST topologies and fire off a hotplug event
> so that userspace knows to reprobe.
>
> However, sending a hotplug event involves calling
> drm_fb_helper_hotplug_event(), which in turn results in fbcon doing a
> connector reprobe in the caller's thread - something we can't do at the
> point in which i915 calls drm_dp_mst_topology_mgr_resume() since
> hotplugging hasn't been fully initialized yet.
>
> This currently causes some rather subtle but fatal issues. For example,
> on my T480s the laptop dock connected to it usually disappears during a
> suspend cycle, and comes back up a short while after the system has been
> resumed. This guarantees pretty much every suspend and resume cycle,
> drm_dp_mst_topology_mgr_set_mst(mgr, false); will be caused and in turn,
> a connector hotplug will occur. Now it's Rute Goldberg time: when the
> connector hotplug occurs, i915 reprobes /all/ of the connectors,
> including eDP. However, eDP probing requires that we power on the panel
> VDD which in turn, grabs a wakeref to the appropriate power domain on
> the GPU (on my T480s, this is the PORT_DDI_A_IO domain). This is where
> things start breaking, since this all happens before
> intel_power_domains_enable() is called we end up leaking the wakeref
> that was acquired and never releasing it later. Come next suspend/resume
> cycle, this causes us to fail to shut down the GPU properly, which
> causes it not to resume properly and die a horrible complicated death.
>
> (as a note: this only happens when there's both an eDP panel and MST
> topology connected which is removed mid-suspend. One or the other seems
> to always be OK).
>
> We could try to fix the VDD wakeref leak, but this doesn't seem like
> it's worth it at all since we aren't able to handle hotplug detection
> while resuming anyway. So, let's go with a more robust solution inspired
> by nouveau: block fbdev from handling hotplug events until we resume
> fbdev. This allows us to still send sysfs hotplug events to be handled
> later by user space while we're resuming, while also preventing us from
> actually processing any hotplug events we receive until it's safe.
>
> This fixes the wakeref leak observed on the T480s and as such, also
> fixes suspend/resume with MST topologies connected on this machine.
>
> Changes since v2:
> * Don't call drm_fb_helper_hotplug_event() under lock, do it after lock
> (Chris Wilson)
> * Don't call drm_fb_helper_hotplug_event() in
> intel_fbdev_output_poll_changed() under lock (Chris Wilson)
> * Always set ifbdev->hpd_waiting (Chris Wilson)
>
> Signed-off-by: Lyude Paul
> Fixes: 0e32b39ceed6 ("drm/i915: add DP 1.2 MST support (v0.7)")
> Cc: Todd Previte
> Cc: Dave Airlie
> Cc: Jani Nikula
> Cc: Joonas Lahtinen
> Cc: Rodrigo Vivi
> Cc: Imre Deak
> Cc: intel-gfx@lists.freedesktop.org
> Cc: # v3.17+
I suspect the locking is overkill, but certainly easier to reason than
trying to remember all the ins and outs of fbdev with its dubious async
initialisation.
Reviewed-by: Chris Wilson
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for Add Colorspace connector property interface (rev9)
== Series Details ==
Series: Add Colorspace connector property interface (rev9)
URL : https://patchwork.freedesktop.org/series/47132/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12077
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/47132/revisions/9/mbox/
Known issues
Here are the changes found in Patchwork_12077 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: NOTRUN -> FAIL [fdo#103182]
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-7567u: DMESG-WARN [fdo#105602] / [fdo#108529] -> PASS +1
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: DMESG-FAIL [fdo#105079] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-c:
- fi-kbl-7567u: {SKIP} [fdo#109271] -> PASS +33
* igt@pm_rpm@module-reload:
- fi-kbl-7567u: DMESG-WARN [fdo#108529] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#105079]: https://bugs.freedesktop.org/show_bug.cgi?id=105079
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108529]: https://bugs.freedesktop.org/show_bug.cgi?id=108529
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (46 -> 39)
--
Additional (2): fi-icl-y fi-gdg-551
Missing(9): fi-kbl-soraka fi-hsw-4770r fi-ilk-m540 fi-hsw-4200u
fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-glk-j4005 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12077
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12077: 7510be7c09f566b5f28a08a54789ef421f13964a @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
7510be7c09f5 drm/i915: Attach colorspace property and enable modeset
058bb0ff8389 drm: Add DP colorspace property
2966dae600a0 drm: Add HDMI colorspace property
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12077/
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp_mst: Fix regressions from new atomic VCPI helpers
== Series Details == Series: drm/dp_mst: Fix regressions from new atomic VCPI helpers URL : https://patchwork.freedesktop.org/series/55933/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5eace8601b7f drm/dp_mst: Fix unbalanced malloc ref in drm_dp_mst_deallocate_vcpi() e8ee56a00aab drm/atomic: Add drm_atomic_state->suspend_or_resume -:23: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #23: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:65:pipe B] active changed -:309: WARNING:BOOL_BITFIELD: Avoid using bool as bitfield. Prefer bool bitfields as unsigned int or u<8|16|32> #309: FILE: include/drm/drm_atomic.h:342: + bool suspend_or_resume : 1; total: 0 errors, 2 warnings, 0 checks, 155 lines checked 8650b15d482b drm/i915: Always allocate VCPI during system resume ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/tv: Fix adjusted_mode dotclock for interlaced modes
== Series Details ==
Series: series starting with [1/2] drm/i915/tv: Fix adjusted_mode dotclock for
interlaced modes
URL : https://patchwork.freedesktop.org/series/55909/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501_full -> Patchwork_12070_full
Summary
---
**SUCCESS**
No regressions found.
Known issues
Here are the changes found in Patchwork_12070_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-b:
- shard-snb: NOTRUN -> DMESG-WARN [fdo#107956]
* igt@kms_cursor_crc@cursor-128x128-dpms:
- shard-apl: PASS -> FAIL [fdo#103232] +2
* igt@kms_cursor_crc@cursor-256x256-suspend:
- shard-glk: PASS -> FAIL [fdo#103232]
* igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
- shard-apl: PASS -> FAIL [fdo#108948]
* igt@kms_plane_multiple@atomic-pipe-a-tiling-none:
- shard-glk: PASS -> FAIL [fdo#103166] +1
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- shard-apl: PASS -> FAIL [fdo#103166]
* igt@kms_setmode@basic:
- shard-kbl: PASS -> FAIL [fdo#99912]
Possible fixes
* igt@kms_cursor_crc@cursor-256x256-random:
- shard-glk: FAIL [fdo#103232] -> PASS +1
* igt@kms_cursor_crc@cursor-256x85-random:
- shard-apl: FAIL [fdo#103232] -> PASS +2
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: FAIL [fdo#105454] / [fdo#106509] -> PASS
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: FAIL [fdo#102887] / [fdo#105363] -> PASS
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
- shard-glk: FAIL [fdo#108145] -> PASS
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-apl: FAIL [fdo#103166] -> PASS
* igt@kms_setmode@basic:
- shard-hsw: FAIL [fdo#99912] -> PASS
* igt@perf_pmu@rc6-runtime-pm-long:
- shard-kbl: FAIL [fdo#105010] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105454]: https://bugs.freedesktop.org/show_bug.cgi?id=105454
[fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
[fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (7 -> 5)
--
Missing(2): shard-skl shard-iclb
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12070
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12070: fe55f3b839716809aee23e27affade135cc6dded @
git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12070/
___
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[Intel-gfx] [PATCH v3 2/3] drm/i915: Don't send MST hotplugs during resume
We have a bad habit of calling drm_fb_helper_hotplug_event() far more
then we actually need to. MST appears to be one of these cases, where we
call drm_fb_helper_hotplug_event() if we fail to resume a connected MST
topology in intel_dp_mst_resume(). We don't actually need to do this at
all though since hotplug events are already sent from
drm_dp_connector_destroy_work() every time connectors are unregistered
from userspace's PoV. Additionally, extra calls to
drm_fb_helper_hotplug_event() also just mean more of a chance of doing a
connector probe somewhere we shouldn't.
So, don't send any hotplug events during resume if the MST topology
fails to come up. Just rely on the DP MST helpers to send them for us.
Signed-off-by: Lyude Paul
Cc: Imre Deak
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/intel_dp.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 681e88405ada..c2399acf177b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -7096,7 +7096,10 @@ void intel_dp_mst_resume(struct drm_i915_private
*dev_priv)
continue;
ret = drm_dp_mst_topology_mgr_resume(&intel_dp->mst_mgr);
- if (ret)
- intel_dp_check_mst_status(intel_dp);
+ if (ret) {
+ intel_dp->is_mst = false;
+ drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
+ false);
+ }
}
}
--
2.20.1
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[Intel-gfx] [PATCH v3 1/3] drm/i915: Block fbdev HPD processing during suspend
When resuming, we check whether or not any previously connected
MST topologies are still present and if so, attempt to resume them. If
this fails, we disable said MST topologies and fire off a hotplug event
so that userspace knows to reprobe.
However, sending a hotplug event involves calling
drm_fb_helper_hotplug_event(), which in turn results in fbcon doing a
connector reprobe in the caller's thread - something we can't do at the
point in which i915 calls drm_dp_mst_topology_mgr_resume() since
hotplugging hasn't been fully initialized yet.
This currently causes some rather subtle but fatal issues. For example,
on my T480s the laptop dock connected to it usually disappears during a
suspend cycle, and comes back up a short while after the system has been
resumed. This guarantees pretty much every suspend and resume cycle,
drm_dp_mst_topology_mgr_set_mst(mgr, false); will be caused and in turn,
a connector hotplug will occur. Now it's Rute Goldberg time: when the
connector hotplug occurs, i915 reprobes /all/ of the connectors,
including eDP. However, eDP probing requires that we power on the panel
VDD which in turn, grabs a wakeref to the appropriate power domain on
the GPU (on my T480s, this is the PORT_DDI_A_IO domain). This is where
things start breaking, since this all happens before
intel_power_domains_enable() is called we end up leaking the wakeref
that was acquired and never releasing it later. Come next suspend/resume
cycle, this causes us to fail to shut down the GPU properly, which
causes it not to resume properly and die a horrible complicated death.
(as a note: this only happens when there's both an eDP panel and MST
topology connected which is removed mid-suspend. One or the other seems
to always be OK).
We could try to fix the VDD wakeref leak, but this doesn't seem like
it's worth it at all since we aren't able to handle hotplug detection
while resuming anyway. So, let's go with a more robust solution inspired
by nouveau: block fbdev from handling hotplug events until we resume
fbdev. This allows us to still send sysfs hotplug events to be handled
later by user space while we're resuming, while also preventing us from
actually processing any hotplug events we receive until it's safe.
This fixes the wakeref leak observed on the T480s and as such, also
fixes suspend/resume with MST topologies connected on this machine.
Changes since v2:
* Don't call drm_fb_helper_hotplug_event() under lock, do it after lock
(Chris Wilson)
* Don't call drm_fb_helper_hotplug_event() in
intel_fbdev_output_poll_changed() under lock (Chris Wilson)
* Always set ifbdev->hpd_waiting (Chris Wilson)
Signed-off-by: Lyude Paul
Fixes: 0e32b39ceed6 ("drm/i915: add DP 1.2 MST support (v0.7)")
Cc: Todd Previte
Cc: Dave Airlie
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Cc: Imre Deak
Cc: intel-gfx@lists.freedesktop.org
Cc: # v3.17+
---
drivers/gpu/drm/i915/intel_drv.h | 10 +
drivers/gpu/drm/i915/intel_fbdev.c | 33 +-
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 90ba5436370e..9ec3d00fbd19 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -213,6 +213,16 @@ struct intel_fbdev {
unsigned long vma_flags;
async_cookie_t cookie;
int preferred_bpp;
+
+ /* Whether or not fbdev hpd processing is temporarily suspended */
+ bool hpd_suspended : 1;
+ /* Set when a hotplug was received while HPD processing was
+* suspended
+*/
+ bool hpd_waiting : 1;
+
+ /* Protects hpd_suspended */
+ struct mutex hpd_lock;
};
struct intel_encoder {
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c
b/drivers/gpu/drm/i915/intel_fbdev.c
index 8cf3efe88f02..376ffe842e26 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -681,6 +681,7 @@ int intel_fbdev_init(struct drm_device *dev)
if (ifbdev == NULL)
return -ENOMEM;
+ mutex_init(&ifbdev->hpd_lock);
drm_fb_helper_prepare(dev, &ifbdev->helper, &intel_fb_helper_funcs);
if (!intel_fbdev_init_bios(dev, ifbdev))
@@ -754,6 +755,26 @@ void intel_fbdev_fini(struct drm_i915_private *dev_priv)
intel_fbdev_destroy(ifbdev);
}
+/* Suspends/resumes fbdev processing of incoming HPD events. When resuming HPD
+ * processing, fbdev will perform a full connector reprobe if a hotplug event
+ * was received while HPD was suspended.
+ */
+static void intel_fbdev_hpd_set_suspend(struct intel_fbdev *ifbdev, int state)
+{
+ bool send_hpd = false;
+
+ mutex_lock(&ifbdev->hpd_lock);
+ ifbdev->hpd_suspended = state == FBINFO_STATE_SUSPENDED;
+ send_hpd = !ifbdev->hpd_suspended && ifbdev->hpd_waiting;
+ ifbdev->hpd_waiting = false;
+ mutex_unlock(&ifbdev->hpd_lock);
+
+ if (send_hpd) {
+ DRM_DEBUG_KMS("Handling d
[Intel-gfx] [PATCH v3 3/3] drm/i915: Don't send hotplug in intel_dp_check_mst_status()
This hotplug also isn't needed: drm_dp_mst_topology_mgr_set_mst()
already sends a hotplug on its own from drm_dp_destroy_connector_work()
after destroying connectors in the MST topology.
Signed-off-by: Lyude Paul
Cc: Imre Deak
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/intel_dp.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c2399acf177b..f9113c0cdfcd 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4608,12 +4608,10 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
return ret;
} else {
- struct intel_digital_port *intel_dig_port =
dp_to_dig_port(intel_dp);
DRM_DEBUG_KMS("failed to get ESI - device may have
failed\n");
intel_dp->is_mst = false;
- drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
intel_dp->is_mst);
- /* send a hotplug event */
-
drm_kms_helper_hotplug_event(intel_dig_port->base.base.dev);
+ drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
+ intel_dp->is_mst);
}
}
return -EINVAL;
--
2.20.1
___
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[Intel-gfx] [PATCH v3 0/3] drm/i915: MST and wakeref leak fixes
While trying to fix a problem with suspend/resume that I introduced in the atomic VCPI helpers for MST, I also ran into some issues with i915 varying from "not that bad" to "oh wow that's very bad". Here are the fixes for those issues. This series was originally just one patch, "drm/i915: Don't send MST hotplugs during resume" Lyude Paul (3): drm/i915: Block fbdev HPD processing during suspend drm/i915: Don't send MST hotplugs during resume drm/i915: Don't send hotplug in intel_dp_check_mst_status() drivers/gpu/drm/i915/intel_dp.c| 13 ++-- drivers/gpu/drm/i915/intel_drv.h | 10 + drivers/gpu/drm/i915/intel_fbdev.c | 33 +- 3 files changed, 49 insertions(+), 7 deletions(-) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
On Tue, Jan 29, 2019 at 07:58:56PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 29, 2019 at 06:52:51PM +0100, Sam Ravnborg wrote:
> > Hi Ville.
> >
> > On Tue, Jan 29, 2019 at 07:06:09PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > drm_color_lut_check() doens't modify the passed in blob so
> > > let's make it const.
> > >
> > > Also s/uint32_y/u32/ while at it.
> > >
> > > Cc: Matt Roper
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
> > > include/drm/drm_color_mgmt.h | 4 ++--
> > > 2 files changed, 5 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> > > b/drivers/gpu/drm/drm_color_mgmt.c
> > > index 968ca7c91ad8..3c8826a91a03 100644
> > > --- a/drivers/gpu/drm/drm_color_mgmt.c
> > > +++ b/drivers/gpu/drm/drm_color_mgmt.c
> > > @@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
> > > *
> > > * Returns 0 on success, -EINVAL on failure.
> > > */
> > > -int drm_color_lut_check(struct drm_property_blob *lut,
> > > - uint32_t tests)
> > > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > > + u32 tests)
> >
> > No need to linewrap this line.
> > > {
> > > - struct drm_color_lut *entry;
> > > + const struct drm_color_lut *entry;
> > > int i;
> > >
> > > if (!lut || !tests)
> > > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> > > index 6affbda6d9cb..58d4b20b5b97 100644
> > > --- a/include/drm/drm_color_mgmt.h
> > > +++ b/include/drm/drm_color_mgmt.h
> > > @@ -96,6 +96,6 @@ enum drm_color_lut_tests {
> > > DRM_COLOR_LUT_NON_DECREASING = BIT(1),
> > > };
> > >
> > > -int drm_color_lut_check(struct drm_property_blob *lut,
> > > - uint32_t tests);
> > > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > > + u32 tests);
> > Likewise.
> >
> > With the linewrap fixed:
> > Reviewed-by: Sam Ravnborg
>
> Thanks.
>
> >
> > Note: does not apply to my drm-misc tree. Anything I miss here?
>
> I think it was merged via drm-intel.
Acked-by: Daniel Vetter
for merging through drm-intel then (assuming it goes in before the merge
cutoff), with Sam's suggestions ofc.
-Daniel
>
> --
> Ville Syrjälä
> Intel
> ___
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH i-g-t] i915/gem_workarounds: Require GPU resets
Quoting Tvrtko Ursulin (2019-01-28 13:47:02)
>
> On 28/01/2019 11:23, Chris Wilson wrote:
> > Check that we are allowed to reset the GPU prior to execution.
> >
> > v2: Push the require checking up into a subgroup
> >
> > Signed-off-by: Chris Wilson
> > ---
> > tests/i915/gem_workarounds.c | 29 ++---
> > 1 file changed, 26 insertions(+), 3 deletions(-)
> >
> > diff --git a/tests/i915/gem_workarounds.c b/tests/i915/gem_workarounds.c
> > index 78478ad2c..44e3dce8a 100644
> > --- a/tests/i915/gem_workarounds.c
> > +++ b/tests/i915/gem_workarounds.c
> > @@ -282,9 +282,32 @@ igt_main
> > }
> >
> > for (op = ops; op->name; op++) {
> > - for (m = modes; m->name; m++) {
> > - igt_subtest_f("%s%s", op->name, m->name)
> > - check_workarounds(device, op->op, m->flags);
> > + igt_subtest_group {
> > + igt_hang_t hang = {};
> > +
> > + igt_fixture {
> > + switch (op->op) {
> > + case GPU_RESET:
> > + hang = igt_allow_hang(device, 0, 0);
> > + break;
> > + default:
> > + break;
> > + }
> > + }
> > +
> > + for (m = modes; m->name; m++)
> > + igt_subtest_f("%s%s", op->name, m->name)
> > + check_workarounds(device, op->op,
> > m->flags);
> > +
> > + igt_fixture {
> > + switch (op->op) {
> > + case GPU_RESET:
> > + igt_disallow_hang(device, hang);
> > + break;
> > + default:
> > + break;
> > + }
> > + }
> > }
> > }
> > }
> >
>
> Why the verbose switch and not just:
>
> it (op->op == GPU_RESET)
> hand = igt_allow_hang(...)
It matched the lower level and I thought would be easier to extend in
future.
-Chris
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[Intel-gfx] [CI 2/4] drm/i915: Identify active requests
To allow requests to forgo a common execution timeline, one question we
need to be able to answer is "is this request running?". To track
whether a request has started on HW, we can emit a breadcrumb at the
beginning of the request and check its timeline's HWSP to see if the
breadcrumb has advanced past the start of this request. (This is in
contrast to the global timeline where we need only ask if we are on the
global timeline and if the timeline has advanced past the end of the
previous request.)
There is still confusion from a preempted request, which has already
started but relinquished the HW to a high priority request. For the
common case, this discrepancy should be negligible. However, for
identification of hung requests, knowing which one was running at the
time of the hang will be much more important.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 15
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 ++
drivers/gpu/drm/i915/i915_request.c | 10 ++---
drivers/gpu/drm/i915/i915_request.h | 1 +
drivers/gpu/drm/i915/i915_timeline.c | 1 +
drivers/gpu/drm/i915/i915_timeline.h | 2 +
drivers/gpu/drm/i915/intel_engine_cs.c | 8 ++--
drivers/gpu/drm/i915/intel_lrc.c | 39 +---
drivers/gpu/drm/i915/intel_ringbuffer.c | 25 -
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++-
drivers/gpu/drm/i915/selftests/mock_engine.c | 2 +-
11 files changed, 96 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 05627000b77d..e802af64d628 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2873,6 +2873,14 @@ i915_gem_object_pwrite_gtt(struct drm_i915_gem_object
*obj,
return 0;
}
+static bool match_ring(struct i915_request *rq)
+{
+ struct drm_i915_private *dev_priv = rq->i915;
+ u32 ring = I915_READ(RING_START(rq->engine->mmio_base));
+
+ return ring == i915_ggtt_offset(rq->ring->vma);
+}
+
struct i915_request *
i915_gem_find_active_request(struct intel_engine_cs *engine)
{
@@ -2895,6 +2903,13 @@ i915_gem_find_active_request(struct intel_engine_cs
*engine)
if (i915_request_completed(request))
continue;
+ if (!i915_request_started(request))
+ break;
+
+ /* More than one preemptible request may match! */
+ if (!match_ring(request))
+ break;
+
active = request;
break;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f250109e1f66..8eedf7cac493 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1976,6 +1976,18 @@ static int eb_submit(struct i915_execbuffer *eb)
return err;
}
+ /*
+* After we completed waiting for other engines (using HW semaphores)
+* then we can signal that this request/batch is ready to run. This
+* allows us to determine if the batch is still waiting on the GPU
+* or actually running by checking the breadcrumb.
+*/
+ if (eb->engine->emit_init_breadcrumb) {
+ err = eb->engine->emit_init_breadcrumb(eb->request);
+ if (err)
+ return err;
+ }
+
err = eb->engine->emit_bb_start(eb->request,
eb->batch->node.start +
eb->batch_start_offset,
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 4d58770e6a8c..7db15b7b3de8 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -333,7 +333,7 @@ void i915_request_retire_upto(struct i915_request *rq)
static u32 timeline_get_seqno(struct i915_timeline *tl)
{
- return ++tl->seqno;
+ return tl->seqno += 1 + tl->has_initial_breadcrumb;
}
static void move_to_timeline(struct i915_request *request,
@@ -382,8 +382,8 @@ void __i915_request_submit(struct i915_request *request)
intel_engine_enable_signaling(request, false);
spin_unlock(&request->lock);
- engine->emit_breadcrumb(request,
- request->ring->vaddr + request->postfix);
+ engine->emit_fini_breadcrumb(request,
+request->ring->vaddr + request->postfix);
/* Transfer from per-context onto the global per-engine timeline */
move_to_timeline(request, &engine->timeline);
@@ -657,7 +657,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
* around inside i915_request_add() there is sufficient space at
* the beginning of the ring as well.
*/
-
[Intel-gfx] [CI 3/4] drm/i915: Rename execlists->queue_priority to queue_priority_hint
After noticing that we trigger preemption events for currently executing
requests, as well as requests that complete before the preemption and
attempting to suppress those preemption events, it is wise to not
consider the queue_priority to be authoritative. As we only track the
maximum priority seen between dequeue passes, if the maximum priority
request is no longer available for dequeuing (it completed or is even
executing on another engine), we have no knowledge of the previous
queue_priority as it would require us to keep a full history of enqueued
requests -- but we already have that history in the priolists!
Rename the queue_priority to queue_priority_hint so that we do not
confuse it as being exactly the maximum priority in the queue, but merely
an indication that we have seen a new maximum priority value and as such
we should check whether it should preempt the currently running request.
v2: s/preempt_priority_hint/queue_priority_hint/ as preempt implies it
being only used for the singular task of preemption and not the wider
question of waking up due to a change in the queue.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_scheduler.c | 11 +--
drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/intel_guc_submission.c | 5 +++--
drivers/gpu/drm/i915/intel_lrc.c| 20 +++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 8 ++--
5 files changed, 27 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c
b/drivers/gpu/drm/i915/i915_scheduler.c
index 340faea6c08a..4eeba588b996 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -127,8 +127,7 @@ static inline struct i915_priolist *to_priolist(struct
rb_node *rb)
return rb_entry(rb, struct i915_priolist, node);
}
-static void assert_priolists(struct intel_engine_execlists * const execlists,
-long queue_priority)
+static void assert_priolists(struct intel_engine_execlists * const execlists)
{
struct rb_node *rb;
long last_prio, i;
@@ -139,7 +138,7 @@ static void assert_priolists(struct intel_engine_execlists
* const execlists,
GEM_BUG_ON(rb_first_cached(&execlists->queue) !=
rb_first(&execlists->queue.rb_root));
- last_prio = (queue_priority >> I915_USER_PRIORITY_SHIFT) + 1;
+ last_prio = (INT_MAX >> I915_USER_PRIORITY_SHIFT) + 1;
for (rb = rb_first_cached(&execlists->queue); rb; rb = rb_next(rb)) {
const struct i915_priolist *p = to_priolist(rb);
@@ -166,7 +165,7 @@ i915_sched_lookup_priolist(struct intel_engine_cs *engine,
int prio)
int idx, i;
lockdep_assert_held(&engine->timeline.lock);
- assert_priolists(execlists, INT_MAX);
+ assert_priolists(execlists);
/* buckets sorted from highest [in slot 0] to lowest priority */
idx = I915_PRIORITY_COUNT - (prio & I915_PRIORITY_MASK) - 1;
@@ -353,7 +352,7 @@ static void __i915_schedule(struct i915_request *rq,
continue;
}
- if (prio <= engine->execlists.queue_priority)
+ if (prio <= engine->execlists.queue_priority_hint)
continue;
/*
@@ -366,7 +365,7 @@ static void __i915_schedule(struct i915_request *rq,
continue;
/* Defer (tasklet) submission until after all of our updates. */
- engine->execlists.queue_priority = prio;
+ engine->execlists.queue_priority_hint = prio;
tasklet_hi_schedule(&engine->execlists.tasklet);
}
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 8dca76f6315d..0a610c9691fd 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -480,7 +480,7 @@ static void intel_engine_init_execlist(struct
intel_engine_cs *engine)
GEM_BUG_ON(!is_power_of_2(execlists_num_ports(execlists)));
GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
- execlists->queue_priority = INT_MIN;
+ execlists->queue_priority_hint = INT_MIN;
execlists->queue = RB_ROOT_CACHED;
}
@@ -1178,7 +1178,7 @@ void intel_engines_park(struct drm_i915_private *i915)
}
/* Must be reset upon idling, or we may miss the busy wakeup. */
- GEM_BUG_ON(engine->execlists.queue_priority != INT_MIN);
+ GEM_BUG_ON(engine->execlists.queue_priority_hint != INT_MIN);
if (engine->park)
engine->park(engine);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 4295ade0d613..f12ecc8dec6b 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/
[Intel-gfx] [CI 1/4] drm/i915/selftests: Apply a subtest filter
In bringup on simulated HW even rudimentary tests are slow, and so many
may fail that we want to be able to filter out the noise to focus on the
specific problem. Even just the tests groups provided for igt is not
specific enough, and we would like to isolate one particular subtest
(and probably subsubtests!). For simplicity, allow the user to provide a
command line parameter such as
i915.st_filter=i915_timeline_mock_selftests/igt_sync
to restrict ourselves to only running on subtest. The exact name to use
is given during a normal run, highlighted as an error if it failed,
debug otherwise. The test group is optional, and then all subtests are
compared for an exact match with the filter (most subtests have unique
names). The filter can be negated, e.g. i915.st_filter=!igt_sync and
then all tests but those that match will be run. More than one match can
be supplied separated by a comma, e.g.
i915.st_filter=igt_vma_create,igt_vma_pin1
to only run those specified, or
i915.st_filter=!igt_vma_create,!igt_vma_pin1
to run all but those named. Mixing a blacklist and whitelist will only
execute those subtests matching the whitelist so long as they are
previously excluded in the blacklist.
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_selftest.h | 1 +
.../gpu/drm/i915/selftests/i915_selftest.c| 47 +++
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_selftest.h
b/drivers/gpu/drm/i915/i915_selftest.h
index a73472dd12fd..207e21b478f2 100644
--- a/drivers/gpu/drm/i915/i915_selftest.h
+++ b/drivers/gpu/drm/i915/i915_selftest.h
@@ -31,6 +31,7 @@ struct i915_selftest {
unsigned long timeout_jiffies;
unsigned int timeout_ms;
unsigned int random_seed;
+ char *filter;
int mock;
int live;
};
diff --git a/drivers/gpu/drm/i915/selftests/i915_selftest.c
b/drivers/gpu/drm/i915/selftests/i915_selftest.c
index 86c54ea37f48..10ef0e636a24 100644
--- a/drivers/gpu/drm/i915/selftests/i915_selftest.c
+++ b/drivers/gpu/drm/i915/selftests/i915_selftest.c
@@ -197,6 +197,49 @@ int i915_live_selftests(struct pci_dev *pdev)
return 0;
}
+static bool apply_subtest_filter(const char *caller, const char *name)
+{
+ char *filter, *sep, *tok;
+ bool result = true;
+
+ filter = kstrdup(i915_selftest.filter, GFP_KERNEL);
+ for (sep = filter; (tok = strsep(&sep, ","));) {
+ bool allow = true;
+ char *sl;
+
+ if (*tok == '!') {
+ allow = false;
+ tok++;
+ }
+
+ if (*tok == '\0')
+ continue;
+
+ sl = strchr(tok, '/');
+ if (sl) {
+ *sl++ = '\0';
+ if (strcmp(tok, caller)) {
+ if (allow)
+ result = false;
+ continue;
+ }
+ tok = sl;
+ }
+
+ if (strcmp(tok, name)) {
+ if (allow)
+ result = false;
+ continue;
+ }
+
+ result = allow;
+ break;
+ }
+ kfree(filter);
+
+ return result;
+}
+
int __i915_subtests(const char *caller,
const struct i915_subtest *st,
unsigned int count,
@@ -209,6 +252,9 @@ int __i915_subtests(const char *caller,
if (signal_pending(current))
return -EINTR;
+ if (!apply_subtest_filter(caller, st->name))
+ continue;
+
pr_debug(DRIVER_NAME ": Running %s/%s\n", caller, st->name);
GEM_TRACE("Running %s/%s\n", caller, st->name);
@@ -244,6 +290,7 @@ bool __igt_timeout(unsigned long timeout, const char *fmt,
...)
module_param_named(st_random_seed, i915_selftest.random_seed, uint, 0400);
module_param_named(st_timeout, i915_selftest.timeout_ms, uint, 0400);
+module_param_named(st_filter, i915_selftest.filter, charp, 0400);
module_param_named_unsafe(mock_selftests, i915_selftest.mock, int, 0400);
MODULE_PARM_DESC(mock_selftests, "Run selftests before loading, using mock
hardware (0:disabled [default], 1:run tests then load driver, -1:run tests then
exit module)");
--
2.20.1
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[Intel-gfx] [CI 4/4] drm/i915/execlists: Suppress preempting self
In order to avoid preempting ourselves, we currently refuse to schedule
the tasklet if we reschedule an inflight context. However, this glosses
over a few issues such as what happens after a CS completion event and
we then preempt the newly executing context with itself, or if something
else causes a tasklet_schedule triggering the same evaluation to
preempt the active context with itself.
However, when we avoid preempting ELSP[0], we still retain the preemption
value as it may match a second preemption request within the same time period
that we need to resolve after the next CS event. However, since we only
store the maximum preemption priority seen, it may not match the
subsequent event and so we should double check whether or not we
actually do need to trigger a preempt-to-idle by comparing the top
priorities from each queue. Later, this gives us a hook for finer
control over deciding whether the preempt-to-idle is justified.
The sequence of events where we end up preempting for no avail is:
1. Queue requests/contexts A, B
2. Priority boost A; no preemption as it is executing, but keep hint
3. After CS switch, B is less than hint, force preempt-to-idle
4. Resubmit B after idling
v2: We can simplify a bunch of tests based on the knowledge that PI will
ensure that earlier requests along the same context will have the highest
priority.
v3: Demonstrate the stale preemption hint with a selftest
References: a2bf92e8cc16 ("drm/i915/execlists: Avoid kicking priority on the
current context")
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_scheduler.c | 20 ++-
drivers/gpu/drm/i915/intel_guc_submission.c | 2 +
drivers/gpu/drm/i915/intel_lrc.c| 96 --
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
drivers/gpu/drm/i915/selftests/intel_lrc.c | 138
5 files changed, 245 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c
b/drivers/gpu/drm/i915/i915_scheduler.c
index 4eeba588b996..2d172991024f 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -238,6 +238,18 @@ sched_lock_engine(struct i915_sched_node *node, struct
intel_engine_cs *locked)
return engine;
}
+static bool inflight(const struct i915_request *rq,
+const struct intel_engine_cs *engine)
+{
+ const struct i915_request *active;
+
+ if (!rq->global_seqno)
+ return false;
+
+ active = port_request(engine->execlists.port);
+ return active->hw_context == rq->hw_context;
+}
+
static void __i915_schedule(struct i915_request *rq,
const struct i915_sched_attr *attr)
{
@@ -327,6 +339,7 @@ static void __i915_schedule(struct i915_request *rq,
INIT_LIST_HEAD(&dep->dfs_link);
engine = sched_lock_engine(node, engine);
+ lockdep_assert_held(&engine->timeline.lock);
/* Recheck after acquiring the engine->timeline.lock */
if (prio <= node->attr.priority || node_signaled(node))
@@ -355,17 +368,16 @@ static void __i915_schedule(struct i915_request *rq,
if (prio <= engine->execlists.queue_priority_hint)
continue;
+ engine->execlists.queue_priority_hint = prio;
+
/*
* If we are already the currently executing context, don't
* bother evaluating if we should preempt ourselves.
*/
- if (node_to_request(node)->global_seqno &&
-
i915_seqno_passed(port_request(engine->execlists.port)->global_seqno,
- node_to_request(node)->global_seqno))
+ if (inflight(node_to_request(node), engine))
continue;
/* Defer (tasklet) submission until after all of our updates. */
- engine->execlists.queue_priority_hint = prio;
tasklet_hi_schedule(&engine->execlists.tasklet);
}
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index f12ecc8dec6b..8bc8aa54aa35 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -629,6 +629,8 @@ static void inject_preempt_context(struct work_struct *work)
EXECLISTS_ACTIVE_PREEMPT);
tasklet_schedule(&engine->execlists.tasklet);
}
+
+ (void)I915_SELFTEST_ONLY(engine->execlists.preempt_hang.count++);
}
/*
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index a1034f7069aa..a9eb0211ce77 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -188,13 +188,90 @@ static inline int rq_prio(const struct i915_request *rq)
return rq->sched.attr.priority;
}
+static int
Re: [Intel-gfx] [PATCH] drm/i915: Don't send MST hotplugs until after resume
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96, v4.9.153,
v4.4.172, v3.18.133.
v4.20.5: Build OK!
v4.19.18: Build OK!
v4.14.96: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
v4.9.153: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
v4.4.172: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
61642ff03523 ("drm/i915: Inspect subunit states on hangcheck")
ca82580c9cea ("drm/i915: Do not call API requiring struct_mutex where it is
not available")
cbdc12a9fc9d ("drm/i915: make A0 wa's applied to A1")
e28e404c3e93 ("drm/i915: tidy up a few leftovers")
e2f80391478a ("drm/i915: Rename local struct intel_engine_cs variables")
e87a005d90c3 ("drm/i915: add helpers for platform specific revision id
range checks")
ed54c1a1d11c ("drm/i915: abolish separate per-ring default_context
pointers")
ef712bb4b700 ("drm/i915: remove parens around revision ids")
fac5e23e3c38 ("drm/i915: Mass convert dev->dev_private to to_i915(dev)")
fffda3f4fb49 ("drm/i915/bxt: add revision id for A1 stepping and use it")
v3.18.133: Failed to apply! Possible dependencies:
08524a9ffa39 ("drm/i915/skl: Restore pipe B/C interrupts")
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
2363d8c97f87 ("drm/i915: Restore resume irq ordering comment")
2aeb7d3a4d42 ("drm/i915: s/pm._irqs_disabled/pm.irqs_enabled/")
2eb5252e2fff ("drm/i915: disable rps irqs earlier during suspend/unload")
8a8b009d1337 ("drm/i915/skl: Skylake shares the interrupt logic with
Broadwell")
970104fac6ca ("drm/i915: Remove intel_modeset_suspend_hw")
9c065a7d5b67 ("drm/i915: Extract intel_runtime_pm.c")
b963291cf9af ("drm/i915: Use dev_priv instead of dev in irq setup
functions")
d2dee86cece9 ("drm/i915: extract intel_init_fbc()")
fac6adb06a53 ("drm/i915: fix RPS on runtime suspend")
How should we proceed with this patch?
--
Thanks,
Sasha
___
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Re: [Intel-gfx] [PATCH 0/3] gcc-plugins: Introduce stackinit plugin
On 23.01.2019 14:03, Kees Cook wrote: > This adds a new plugin "stackinit" that attempts to perform unconditional > initialization of all stack variables Hello Kees! Hello everyone! I was curious about the performance impact of the initialization of all stack variables. So I did a very brief test with this plugin on top of 4.20.5. hackbench on Intel Core i7-4770 showed ~0.7% slowdown. hackbench on Kirin 620 (ARM Cortex-A53 Octa-core 1.2GHz) showed ~1.3% slowdown. This test involves the kernel scheduler and allocator. I can't say whether they use stack aggressively. Maybe performance tests of other subsystems (e.g. network subsystem) can show different numbers. Did you try? I've heard a hypothesis that the initialization of all stack variables would pollute CPU caches, which is critical for some types of computations. Maybe some micro-benchmarks can disprove/confirm that? Thanks! Best regards, Alexander ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Don't send MST hotplugs until after resume
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 0e32b39ceed6 drm/i915: add DP 1.2 MST support (v0.7).
The bot has tested the following trees: v4.20.5, v4.19.18, v4.14.96, v4.9.153,
v4.4.172, v3.18.133.
v4.20.5: Build OK!
v4.19.18: Build OK!
v4.14.96: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
v4.9.153: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
v4.4.172: Failed to apply! Possible dependencies:
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
61642ff03523 ("drm/i915: Inspect subunit states on hangcheck")
ca82580c9cea ("drm/i915: Do not call API requiring struct_mutex where it is
not available")
cbdc12a9fc9d ("drm/i915: make A0 wa's applied to A1")
e28e404c3e93 ("drm/i915: tidy up a few leftovers")
e2f80391478a ("drm/i915: Rename local struct intel_engine_cs variables")
e87a005d90c3 ("drm/i915: add helpers for platform specific revision id
range checks")
ed54c1a1d11c ("drm/i915: abolish separate per-ring default_context
pointers")
ef712bb4b700 ("drm/i915: remove parens around revision ids")
fac5e23e3c38 ("drm/i915: Mass convert dev->dev_private to to_i915(dev)")
fffda3f4fb49 ("drm/i915/bxt: add revision id for A1 stepping and use it")
v3.18.133: Failed to apply! Possible dependencies:
08524a9ffa39 ("drm/i915/skl: Restore pipe B/C interrupts")
1a4313d13b69 ("drm/i915: Rewrite mst suspend/resume in terms of encoders")
2363d8c97f87 ("drm/i915: Restore resume irq ordering comment")
2aeb7d3a4d42 ("drm/i915: s/pm._irqs_disabled/pm.irqs_enabled/")
2eb5252e2fff ("drm/i915: disable rps irqs earlier during suspend/unload")
8a8b009d1337 ("drm/i915/skl: Skylake shares the interrupt logic with
Broadwell")
970104fac6ca ("drm/i915: Remove intel_modeset_suspend_hw")
9c065a7d5b67 ("drm/i915: Extract intel_runtime_pm.c")
b963291cf9af ("drm/i915: Use dev_priv instead of dev in irq setup
functions")
d2dee86cece9 ("drm/i915: extract intel_init_fbc()")
fac6adb06a53 ("drm/i915: fix RPS on runtime suspend")
How should we proceed with this patch?
--
Thanks,
Sasha
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add Colorspace connector property interface (rev9)
== Series Details == Series: Add Colorspace connector property interface (rev9) URL : https://patchwork.freedesktop.org/series/47132/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm: Add HDMI colorspace property + ~~~^~ + connector->colorspace_property = prop; +drivers/gpu/drm/drm_connector.c:1617:33: warning: ‘prop’ may be used uninitialized in this function [-Wmaybe-uninitialized] +drivers/gpu/drm/drm_connector.c: In function ‘drm_mode_create_colorspace_property’: Commit: drm: Add DP colorspace property -O:drivers/gpu/drm/drm_connector.c:1617:33: warning: ‘prop’ may be used uninitialized in this function [-Wmaybe-uninitialized] +drivers/gpu/drm/drm_connector.c:1648:33: warning: ‘prop’ may be used uninitialized in this function [-Wmaybe-uninitialized] Commit: drm/i915: Attach colorspace property and enable modeset Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Colorspace connector property interface (rev9)
== Series Details ==
Series: Add Colorspace connector property interface (rev9)
URL : https://patchwork.freedesktop.org/series/47132/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
2966dae600a0 drm: Add HDMI colorspace property
-:159: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#159: FILE: drivers/gpu/drm/drm_connector.c:1607:
+ if (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
+ connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
-:160: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#160: FILE: drivers/gpu/drm/drm_connector.c:1608:
+ connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
+
total: 0 errors, 0 warnings, 2 checks, 171 lines checked
058bb0ff8389 drm: Add DP colorspace property
-:60: CHECK:LINE_SPACING: Please don't use multiple blank lines
#60: FILE: drivers/gpu/drm/drm_connector.c:875:
+
+
-:70: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#70: FILE: drivers/gpu/drm/drm_connector.c:1640:
+ connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+
total: 0 errors, 0 warnings, 2 checks, 43 lines checked
7510be7c09f5 drm/i915: Attach colorspace property and enable modeset
-:66: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#66: FILE: drivers/gpu/drm/i915/intel_connector.c:274:
+ drm_object_attach_property(&connector->base,
+ connector->colorspace_property, 0);
total: 0 errors, 0 warnings, 1 checks, 66 lines checked
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[Intel-gfx] [PATCH 3/3] drm/i915: Always allocate VCPI during system resume
Since there's a chance MST topologies can be removed while the system is
in suspend, there's also a chance that the connectors in the atomic
state which we try to restore on system resume will have been
unregistered if they were part of an MST topology that was removed
mid-suspend. In such situations, we'll currently skip recalculating the
VCPI. Normally this would be safe since we don't expect to be allowed to
enable displays on unregistered connections, but since we need to try
our best to restore even partially invalid atomic states on system
resume we end up introducing the chance that we try enabling a display
on a now-unregistered connector. This of course results on a blow up
during system resume:
[ 1894.177788] [drm:pipe_config_err [i915]] *ERROR* mismatch in dp_m_n
(expected tu 0 gmch 1730150/8388608 link 288358/1048576, or tu 0 gmch 0/0 link
0/0, found tu 64, gmch 1730150/8388608 link 288358/1048576)
[ 1894.177795] [ cut here ]
[ 1894.177799] pipe state doesn't match!
[ 1894.177905] WARNING: CPU: 2 PID: 1894 at
drivers/gpu/drm/i915/intel_display.c:12292 intel_atomic_commit_tail+0xd5e/0xdd0
[i915]
[ 1894.177909] Modules linked in: i915(O) drm_kms_helper(O) drm(O) vfat fat
joydev iTCO_wdt wmi_bmof btusb btrtl btbcm intel_rapl btintel i2c_algo_bit
x86_pkg_temp_thermal bluetooth syscopyarea coretemp sysfillrect sysimgblt
crc32_pclmul fb_sys_fops ucsi_acpi psmouse ecdh_generic pcspkr typec_ucsi
i2c_i801 typec mei_me mei i2c_core wmi thinkpad_acpi ledtrig_audio snd
soundcore rfkill tpm_tis tpm_tis_core video pcc_cpufreq tpm acpi_pad uas
usb_storage crc32c_intel nvme serio_raw nvme_core xhci_pci xhci_hcd [last
unloaded: drm]
[ 1894.177990] CPU: 2 PID: 1894 Comm: kworker/u16:8 Tainted: G O
5.0.0-rc4Lyude-Test+ #9
[ 1894.177994] Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W (1.12
) 04/09/2018
[ 1894.178005] Workqueue: events_unbound async_run_entry_fn
[ 1894.178079] RIP: 0010:intel_atomic_commit_tail+0xd5e/0xdd0 [i915]
[ 1894.178085] Code: ba 01 00 00 00 4c 89 4c 24 10 e8 3d 46 01 00 4c 8b 4c 24
10 e9 a4 fb ff ff e8 b2 18 bd e0 0f 0b e9 a5 fd ff ff e8 a6 18 bd e0 <0f> 0b e9
f1 f9 ff ff e8 9a 18 bd e0 0f 0b 0f b6 44 24 18 e9 23 f9
[ 1894.178090] RSP: :c9553c08 EFLAGS: 00010286
[ 1894.178096] RAX: RBX: 888459edc000 RCX: 0006
[ 1894.178101] RDX: 0007 RSI: 8884591e2f90 RDI: 88845e295690
[ 1894.178105] RBP: 888454e27000 R08: R09:
[ 1894.178108] R10: R11: R12: 888454e22000
[ 1894.178112] R13: 888454e21000 R14: 8883ca680750 R15: 8883ca680758
[ 1894.178118] FS: () GS:88845e28()
knlGS:
[ 1894.178123] CS: 0010 DS: ES: CR0: 80050033
[ 1894.178127] CR2: CR3: 02214001 CR4: 003606e0
[ 1894.178131] DR0: DR1: DR2:
[ 1894.178135] DR3: DR6: fffe0ff0 DR7: 0400
[ 1894.178139] Call Trace:
[ 1894.178224] intel_atomic_commit+0x240/0x320 [i915]
[ 1894.178251] drm_atomic_helper_commit_duplicated_state+0xc9/0xe0
[drm_kms_helper]
[ 1894.178321] __intel_display_resume+0x82/0xd0 [i915]
[ 1894.178391] intel_display_resume+0xcf/0x120 [i915]
[ 1894.178453] i915_drm_resume+0xb1/0x100 [i915]
[ 1894.178465] ? pci_pm_suspend_late+0x30/0x30
[ 1894.178473] dpm_run_callback+0x70/0x210
[ 1894.178484] device_resume+0xae/0x1f0
[ 1894.178493] async_resume+0x19/0x30
[ 1894.178502] async_run_entry_fn+0x39/0x160
[ 1894.178513] process_one_work+0x23c/0x590
[ 1894.178529] worker_thread+0x30/0x380
[ 1894.178539] ? rescuer_thread+0x340/0x340
[ 1894.178545] kthread+0x112/0x130
[ 1894.178552] ? kthread_create_on_node+0x60/0x60
[ 1894.178563] ret_from_fork+0x3a/0x50
[ 1894.178582] irq event stamp: 76782
[ 1894.178591] hardirqs last enabled at (76781): []
vprintk_emit+0x2c5/0x2d0
[ 1894.178600] hardirqs last disabled at (76782): []
trace_hardirqs_off_thunk+0x1a/0x1c
[ 1894.178609] softirqs last enabled at (76734): []
__do_softirq+0x35d/0x412
[ 1894.178618] softirqs last disabled at (76727): []
irq_exit+0xe0/0xf0
[ 1894.178687] WARNING: CPU: 2 PID: 1894 at
drivers/gpu/drm/i915/intel_display.c:12292 intel_atomic_commit_tail+0xd5e/0xdd0
[i915]
[ 1894.178692] ---[ end trace 0df08c0b9a67376e ]---
So, fix this by using the new drm_atomic_state.suspend_or_resume hook in
order to force us to retrieve a VCPI allocation when restoring a pipe's
atomic state. This is safe, since drm_dp_atomic_find_vcpi_slots() will
just return the VCPI allocation we had pre-suspend.
Signed-off-by: Lyude Paul
Cc: Daniel Vetter
Fixes: eceae1472467 ("drm/dp_mst: Start tracking per-port VCPI allocations")
---
drivers/gpu/drm/i915/intel_dp_mst.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b
[Intel-gfx] [PATCH 0/3] drm/dp_mst: Fix regressions from new atomic VCPI helpers
This fixes the extra issues I discovered upstream after the introduction of my rework of the atomic VCPI helpers that occur during suspend/resume. Lyude Paul (3): drm/dp_mst: Fix unbalanced malloc ref in drm_dp_mst_deallocate_vcpi() drm/atomic: Add drm_atomic_state->suspend_or_resume drm/i915: Always allocate VCPI during system resume drivers/gpu/drm/drm_atomic_helper.c | 16 -- drivers/gpu/drm/drm_dp_mst_topology.c | 44 ++- drivers/gpu/drm/i915/intel_display.c | 4 +-- drivers/gpu/drm/i915/intel_dp_mst.c | 9 -- include/drm/drm_atomic.h | 11 +++ include/drm/drm_atomic_helper.h | 3 +- 6 files changed, 71 insertions(+), 16 deletions(-) -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/3] drm/atomic: Add drm_atomic_state->suspend_or_resume
Since
commit 39b50c603878 ("drm/atomic_helper: Stop modesets on unregistered
connectors harder")
We've been failing atomic checks if they try to enable new displays on
unregistered connectors. This is fine except for the one situation that
breaks atomic assumptions: suspend/resume. If a connector is
unregistered before we attempt to restore the atomic state, something we
end up failing the atomic check that happens when trying to restore the
state during resume.
Normally this would be OK: we try our best to make sure that the atomic
state pre-suspend can be restored post-suspend, but failures at that
point usually don't cause problems. That is of course, until we
introduced the new atomic MST VCPI helpers:
[drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CRTC:65:pipe B] active
changed
[drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for
[CONNECTOR:123:DP-5]
[drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Disabling
[CONNECTOR:123:DP-5]
[drm:drm_atomic_get_private_obj_state [drm]] Added new private object
25844636 state 9fd2899a to 3a13d7b8
WARNING: CPU: 6 PID: 1070 at drivers/gpu/drm/drm_dp_mst_topology.c:3153
drm_dp_atomic_release_vcpi_slots+0xb9/0x200 [drm_kms_helper]
Modules linked in: fuse vfat fat snd_hda_codec_hdmi snd_hda_codec_realtek
snd_hda_codec_generic joydev iTCO_wdt i915(O) wmi_bmof intel_rapl btusb btrtl
x86_pkg_temp_thermal btbcm btintel coretemp i2c_algo_bit drm_kms_helper(O)
crc32_pclmul snd_hda_intel syscopyarea sysfillrect snd_hda_codec sysimgblt
snd_hda_core bluetooth fb_sys_fops snd_pcm pcspkr drm(O) psmouse snd_timer
mei_me ecdh_generic i2c_i801 mei i2c_core ucsi_acpi typec_ucsi typec wmi
thinkpad_acpi ledtrig_audio snd soundcore tpm_tis rfkill tpm_tis_core video tpm
acpi_pad pcc_cpufreq uas usb_storage crc32c_intel nvme serio_raw xhci_pci
nvme_core xhci_hcd
CPU: 6 PID: 1070 Comm: gnome-shell Tainted: GW O
5.0.0-rc2Lyude-Test+ #1
Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W (1.12 ) 04/09/2018
RIP: 0010:drm_dp_atomic_release_vcpi_slots+0xb9/0x200 [drm_kms_helper]
Code: 00 4c 39 6d f0 74 49 48 8d 7b 10 48 89 f9 48 c1 e9 03 42 80 3c 21 00 0f
85 d2 00 00 00 48 8b 6b 10 48 8d 5d f0 49 39 ee 75 c5 <0f> 0b 48 c7 c7 c0 78 b3
a0 48 89 c2 4c 89 ee e8 03 6c aa ff b8 ea
RSP: 0018:88841235f268 EFLAGS: 00010246
RAX: 88841bf12ab0 RBX: 88841bf12aa8 RCX: 1110837e2557
RDX: dc00 RSI: RDI: ed108246bde0
RBP: 88841bf12ab8 R08: ed1083db3c93 R09: ed1083db3c92
R10: ed1083db3c92 R11: 88841ed9e497 R12: 888419555d80
R13: 8883bc499100 R14: 88841bf12ab8 R15:
FS: 7f16fbd4cd00() GS:88841ed8() knlGS:
CS: 0010 DS: ES: CR0: 80050033
CR2: 7f1687c9f000 CR3: 0003ba3cc003 CR4: 003606e0
DR0: DR1: DR2:
DR3: DR6: fffe0ff0 DR7: 0400
Call Trace:
drm_atomic_helper_check_modeset+0xf21/0x2f50 [drm_kms_helper]
? drm_atomic_helper_commit_modeset_enables+0xa90/0xa90 [drm_kms_helper]
? __printk_safe_exit+0x10/0x10
? save_stack+0x8c/0xb0
? vprintk_func+0x96/0x1bf
? __printk_safe_exit+0x10/0x10
intel_atomic_check+0x234/0x4750 [i915]
? printk+0x9f/0xc5
? kmsg_dump_rewind_nolock+0xd9/0xd9
? _raw_spin_lock_irqsave+0xa4/0x140
? drm_atomic_check_only+0xb1/0x28b0 [drm]
? drm_dbg+0x186/0x1b0 [drm]
? drm_dev_dbg+0x200/0x200 [drm]
? intel_link_compute_m_n+0xb0/0xb0 [i915]
? drm_mode_put_tile_group+0x20/0x20 [drm]
? skl_plane_format_mod_supported+0x17f/0x1b0 [i915]
? drm_plane_check_pixel_format+0x14a/0x310 [drm]
drm_atomic_check_only+0x13c4/0x28b0 [drm]
? drm_state_info+0x220/0x220 [drm]
? drm_atomic_helper_disable_plane+0x1d0/0x1d0 [drm_kms_helper]
? pick_single_encoder_for_connector+0xe0/0xe0 [drm_kms_helper]
? kasan_unpoison_shadow+0x35/0x40
drm_atomic_commit+0x3b/0x100 [drm]
drm_atomic_helper_set_config+0xd5/0x100 [drm_kms_helper]
drm_mode_setcrtc+0x636/0x1660 [drm]
? vprintk_func+0x96/0x1bf
? drm_dev_dbg+0x200/0x200 [drm]
? drm_mode_getcrtc+0x790/0x790 [drm]
? printk+0x9f/0xc5
? mutex_unlock+0x1d/0x40
? drm_mode_addfb2+0x2e9/0x3a0 [drm]
? rcu_sync_dtor+0x2e0/0x2e0
? drm_dbg+0x186/0x1b0 [drm]
? set_page_dirty+0x271/0x4d0
drm_ioctl_kernel+0x203/0x290 [drm]
? drm_mode_getcrtc+0x790/0x790 [drm]
? drm_setversion+0x7f0/0x7f0 [drm]
? __switch_to_asm+0x34/0x70
? __switch_to_asm+0x34/0x70
drm_ioctl+0x445/0x950 [drm]
? drm_mode_getcrtc+0x790/0x790 [drm]
? drm_getunique+0x220/0x220 [drm]
? expand_files.part.10+0x920/0x920
do_vfs_ioctl+0x1a1/0x13d0
? ioctl_preallocate+0x2b0/0x2b0
? __fget_light+0x2d6/0x390
? schedule+0xd7/0x2e0
? fget_raw+0x10/0x10
? apic_timer_interrupt+0xa/0x20
? apic_timer_interrupt+0xa/0x20
? rcu_cleanup_dead_rnp+0x2c0/0x2c0
ksys_ioctl+0x60/0x90
__x64_sys_ioctl+0x6f/0xb0
do_syscall_64+0x136/0x440
? syscall_return_slow
[Intel-gfx] [PATCH 1/3] drm/dp_mst: Fix unbalanced malloc ref in drm_dp_mst_deallocate_vcpi()
In drm_dp_mst_deallocate_vcpi(), we currently unconditionally call drm_dp_mst_put_port_malloc() on the port that's passed to us, even if we never successfully allocated VCPI to it. This is contrary to what we do in drm_dp_mst_allocate_vcpi(), where we only call drm_dp_mst_get_port_malloc() on the passed port if we successfully allocated VCPI to it. As a result, if drm_dp_mst_allocate_vcpi() fails during a modeset and another successive modeset calls drm_dp_mst_deallocate_vcpi() we will end up dropping someone else's malloc reference to the port. Example: [ 962.309260] == [ 962.309290] BUG: KASAN: use-after-free in drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309296] Read of size 4 at addr 888416c30004 by task kworker/0:1H/500 [ 962.309308] CPU: 0 PID: 500 Comm: kworker/0:1H Tainted: GW O 5.0.0-rc2Lyude-Test+ #1 [ 962.309313] Hardware name: LENOVO 20L8S2N800/20L8S2N800, BIOS N22ET35W (1.12 ) 04/09/2018 [ 962.309428] Workqueue: events_highpri intel_atomic_cleanup_work [i915] [ 962.309434] Call Trace: [ 962.309452] dump_stack+0xad/0x150 [ 962.309462] ? dump_stack_print_info.cold.0+0x1b/0x1b [ 962.309472] ? kmsg_dump_rewind_nolock+0xd9/0xd9 [ 962.309504] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309515] print_address_description+0x6c/0x23c [ 962.309542] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309568] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309577] kasan_report.cold.3+0x1a/0x32 [ 962.309605] ? drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309631] drm_dp_mst_put_port_malloc+0x72/0x180 [drm_kms_helper] [ 962.309658] ? drm_dp_mst_put_mstb_malloc+0x180/0x180 [drm_kms_helper] [ 962.309687] drm_dp_mst_destroy_state+0xcd/0x120 [drm_kms_helper] [ 962.309745] drm_atomic_state_default_clear+0x6ee/0xcc0 [drm] [ 962.309864] intel_atomic_state_clear+0xe/0x80 [i915] [ 962.309928] __drm_atomic_state_free+0x35/0xd0 [drm] [ 962.310044] intel_atomic_cleanup_work+0x56/0x70 [i915] [ 962.310057] process_one_work+0x884/0x1400 [ 962.310067] ? drain_workqueue+0x5a0/0x5a0 [ 962.310075] ? __schedule+0x87f/0x1e80 [ 962.310086] ? __sched_text_start+0x8/0x8 [ 962.310095] ? run_rebalance_domains+0x400/0x400 [ 962.310110] ? deref_stack_reg+0xb4/0x120 [ 962.310117] ? __read_once_size_nocheck.constprop.7+0x10/0x10 [ 962.310124] ? worker_enter_idle+0x47f/0x6a0 [ 962.310134] ? schedule+0xd7/0x2e0 [ 962.310141] ? __schedule+0x1e80/0x1e80 [ 962.310148] ? _raw_spin_lock_irq+0x9f/0x130 [ 962.310155] ? _raw_write_unlock_irqrestore+0x110/0x110 [ 962.310164] worker_thread+0x196/0x11e0 [ 962.310175] ? set_load_weight+0x2e0/0x2e0 [ 962.310181] ? __switch_to_asm+0x34/0x70 [ 962.310187] ? __switch_to_asm+0x40/0x70 [ 962.310194] ? process_one_work+0x1400/0x1400 [ 962.310199] ? __switch_to_asm+0x40/0x70 [ 962.310205] ? __switch_to_asm+0x34/0x70 [ 962.310211] ? __switch_to_asm+0x34/0x70 [ 962.310216] ? __switch_to_asm+0x40/0x70 [ 962.310221] ? __switch_to_asm+0x34/0x70 [ 962.310226] ? __switch_to_asm+0x40/0x70 [ 962.310231] ? __switch_to_asm+0x34/0x70 [ 962.310236] ? __switch_to_asm+0x40/0x70 [ 962.310242] ? syscall_return_via_sysret+0xf/0x7f [ 962.310248] ? __switch_to_asm+0x34/0x70 [ 962.310253] ? __switch_to_asm+0x40/0x70 [ 962.310258] ? __switch_to_asm+0x34/0x70 [ 962.310263] ? __switch_to_asm+0x40/0x70 [ 962.310268] ? __switch_to_asm+0x34/0x70 [ 962.310273] ? __switch_to_asm+0x40/0x70 [ 962.310281] ? __schedule+0x87f/0x1e80 [ 962.310292] ? __sched_text_start+0x8/0x8 [ 962.310300] ? save_stack+0x8c/0xb0 [ 962.310308] ? __kasan_kmalloc.constprop.6+0xc6/0xd0 [ 962.310313] ? kthread+0x98/0x3a0 [ 962.310318] ? ret_from_fork+0x35/0x40 [ 962.310334] ? __wake_up_common+0x178/0x6f0 [ 962.310343] ? _raw_spin_lock_irqsave+0xa4/0x140 [ 962.310349] ? __lock_text_start+0x8/0x8 [ 962.310355] ? _raw_write_lock_irqsave+0x70/0x130 [ 962.310360] ? __lock_text_start+0x8/0x8 [ 962.310371] ? process_one_work+0x1400/0x1400 [ 962.310376] kthread+0x2e2/0x3a0 [ 962.310383] ? kthread_create_on_node+0xc0/0xc0 [ 962.310389] ret_from_fork+0x35/0x40 [ 962.310401] Allocated by task 1462: [ 962.310410] __kasan_kmalloc.constprop.6+0xc6/0xd0 [ 962.310437] drm_dp_add_port+0xd60/0x1960 [drm_kms_helper] [ 962.310464] drm_dp_send_link_address+0x4b0/0x770 [drm_kms_helper] [ 962.310491] drm_dp_check_and_send_link_address+0x197/0x1f0 [drm_kms_helper] [ 962.310515] drm_dp_mst_link_probe_work+0x2b6/0x330 [drm_kms_helper] [ 962.310522] process_one_work+0x884/0x1400 [ 962.310529] worker_thread+0x196/0x11e0 [ 962.310533] kthread+0x2e2/0x3a0 [ 962.310538] ret_from_fork+0x35/0x40 [ 962.310543] Freed by task 500: [ 962.310550] __kasan_slab_free+0x133/0x180 [ 962.310555] kfree+0x92/0x1a0 [ 962.310581] drm_dp_mst_put_port_malloc+0x14d/0x180 [drm_kms_helper] [ 962
[Intel-gfx] [v9 0/3] Add Colorspace connector property interface
This patch series creates a new connector property to program colorspace to sink devices. Modern sink devices support more than 1 type of colorspace like 601, 709, BT2020 etc. This helps to switch based on content type which is to be displayed. The decision lies with compositors as to in which scenarios, a particular colorspace will be picked. This will be helpful mostly to switch to higher gamut colorspaces like BT2020 when the media content is encoded as BT2020. Thereby giving a good visual experience to users. The expectation from userspace is that it should parse the EDID and get supported colorspaces. Use this property and switch to the one supported. Sink supported colorspaces should be retrieved by userspace from EDID and driver will not explicitly expose them. Basically the expectation from userspace is: - Set up CRTC DEGAMMA/CTM/GAMMA to convert to some sink colorspace - Set this new property to let the sink know what it converted the CRTC output to. - This property is just to inform sink what colorspace source is trying to drive. Have tested this using xrandr by using below command: xrandr --output HDMI2 --set "Colorspace" "BT2020_rgb" v2: Addressed Ville and Maarten's review comments. Merged the 2nd and 3rd patch into one common logical patch. v3: Removed Adobe references from enum definitions as per Ville, Hans Verkuil and Jonas Karlman suggestions. Changed default to an unset state where driver will assign the colorspace when not chosen by user, suggested by Ville and Maarten. Addressed other misc review comments from Maarten. Split the changes to have separate colorspace property for DP and HDMI. v4: Addressed Chris and Ville's review comments, and created a common colorspace property for DP and HDMI, filtered the list v5: Modified the colorspace property creation helper to take platform specific enum list based on the capabilities of the platform as suggested by Shashank. With this there is no need for segregation between DP and HDMI. v6: Addressed Shashank's review comments. v7: Added defines instead of enum in uapi as per Brian Starkey's suggestion in order to go with string matching at userspace. Updated the kernel doc as well with more details. v8: Addressed Maarten's review comments. v9: Removed macro defines from uapi as per Brian Starkey and Daniel Stone's comments and moved to drm include file. Moved back to older design with exposing all HDMI colorspaces to userspace since infoframe capability is there even on legacy platforms, as per Ville's review comments. Uma Shankar (3): drm: Add HDMI colorspace property drm: Add DP colorspace property drm/i915: Attach colorspace property and enable modeset drivers/gpu/drm/drm_atomic_uapi.c | 4 ++ drivers/gpu/drm/drm_connector.c| 104 + drivers/gpu/drm/i915/intel_atomic.c| 1 + drivers/gpu/drm/i915/intel_connector.c | 8 +++ drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_hdmi.c | 25 include/drm/drm_connector.h| 46 +++ 7 files changed, 189 insertions(+) -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [v9 2/3] drm: Add DP colorspace property
This patch adds a DP colorspace property, enabling
userspace to switch to various supported colorspaces.
This will help enable BT2020 along with other colorspaces.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
colorspaces. Also, added a default option for colorspace.
v3: Split the changes to have separate colorspace property for
DP and HDMI.
v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard.
v5: Merged the DP handling along with platform colorspace
handling as per Shashank's comments.
v6: Reverted to old design of exposing all colorspaces to
userspace as per Ville's review comment
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/drm_connector.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 3a61a38..d0175e7b 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -850,6 +850,29 @@ int drm_display_info_set_bus_formats(struct
drm_display_info *info,
{ DRM_MODE_COLORIMETRY_BT2020_CYCC, "BT2020_CYCC" },
};
+static const struct drm_prop_enum_list dp_colorspaces[] = {
+ /* For Default case, driver will set the colorspace */
+ { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+ /* Standard Definition Colorimetry based on CEA 861 */
+ { DRM_MODE_COLORIMETRY_ITU_601, "ITU_601" },
+ { DRM_MODE_COLORIMETRY_ITU_709, "ITU_709" },
+ /* Standard Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_601, "XV_YCC_601" },
+ /* High Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_709, "XV_YCC_709" },
+ /* Colorimetry based on IEC 61966-2-5 */
+ { DRM_MODE_COLORIMETRY_OPRGB, "opRGB" },
+ /* DP MSA Colorimetry */
+ { DRM_MODE_DP_COLORIMETRY_Y_CBCR_ITU_601, "YCBCR_ITU_601" },
+ { DRM_MODE_DP_COLORIMETRY_Y_CBCR_ITU_709, "YCBCR_ITU_709" },
+ { DRM_MODE_DP_COLORIMETRY_SRGB, "sRGB" },
+ { DRM_MODE_DP_COLORIMETRY_RGB_WIDE_GAMUT, "RGB Wide Gamut" },
+ { DRM_MODE_DP_COLORIMETRY_SCRGB, "scRGB" },
+ { DRM_MODE_DP_COLORIMETRY_DCI_P3, "DCI-P3" },
+ { DRM_MODE_DP_COLORIMETRY_CUSTOM_COLOR_PROFILE, "Custom Profile" },
+};
+
+
/**
* DOC: standard connector properties
*
@@ -1612,6 +1635,14 @@ int drm_mode_create_colorspace_property(struct
drm_connector *connector)
ARRAY_SIZE(hdmi_colorspaces));
if (!prop)
return -ENOMEM;
+ } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
+ connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM,
+ "Colorspace", dp_colorspaces,
+ ARRAY_SIZE(dp_colorspaces));
+ if (!prop)
+ return -ENOMEM;
}
connector->colorspace_property = prop;
--
1.9.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [v9 3/3] drm/i915: Attach colorspace property and enable modeset
This patch attaches the colorspace connector property to the
hdmi connector. Based on colorspace change, modeset will be
triggered to switch to new colorspace.
Based on colorspace property value create an infoframe
with appropriate colorspace. This can be used to send an
infoframe packet with proper colorspace value set which
will help to enable wider color gamut like BT2020 on sink.
This patch attaches and enables HDMI colorspace, DP will be
taken care separately.
v2: Merged the changes of creating infoframe as well to this
patch as per Maarten's suggestion.
v3: Addressed review comments from Shashank. Separated HDMI
and DP colorspaces as suggested by Ville and Maarten.
v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard. Handle the default case properly.
v5: Merged the DP handling along with platform colorspace
handling as per Shashank's comments.
v6: Addressed Maarten's review comment and limited this currently
to non lspcon based devices.
v7: Reverted to old design of exposing all colorspaces to
userspace as per Ville's review comment
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/intel_atomic.c| 1 +
drivers/gpu/drm/i915/intel_connector.c | 8
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdmi.c | 25 +
4 files changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index 16263ad..76b7114 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -124,6 +124,7 @@ int intel_digital_connector_atomic_check(struct
drm_connector *conn,
*/
if (new_conn_state->force_audio != old_conn_state->force_audio ||
new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
+ new_state->colorspace != old_state->colorspace ||
new_conn_state->base.picture_aspect_ratio !=
old_conn_state->base.picture_aspect_ratio ||
new_conn_state->base.content_type !=
old_conn_state->base.content_type ||
new_conn_state->base.scaling_mode !=
old_conn_state->base.scaling_mode)
diff --git a/drivers/gpu/drm/i915/intel_connector.c
b/drivers/gpu/drm/i915/intel_connector.c
index ee16758..ac2aed7 100644
--- a/drivers/gpu/drm/i915/intel_connector.c
+++ b/drivers/gpu/drm/i915/intel_connector.c
@@ -265,3 +265,11 @@ int intel_ddc_get_modes(struct drm_connector *connector,
connector->dev->mode_config.aspect_ratio_property,
DRM_MODE_PICTURE_ASPECT_NONE);
}
+
+void
+intel_attach_colorspace_property(struct drm_connector *connector)
+{
+ if (!drm_mode_create_colorspace_property(connector))
+ drm_object_attach_property(&connector->base,
+ connector->colorspace_property, 0);
+}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 85b913e..5178a9a 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1783,6 +1783,7 @@ int intel_connector_update_modes(struct drm_connector
*connector,
void intel_attach_force_audio_property(struct drm_connector *connector);
void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
void intel_attach_aspect_ratio_property(struct drm_connector *connector);
+void intel_attach_colorspace_property(struct drm_connector *connector);
/* intel_csr.c */
void intel_csr_ucode_init(struct drm_i915_private *);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 97a98e1..5c5009d 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -498,6 +498,24 @@ static void intel_hdmi_set_avi_infoframe(struct
intel_encoder *encoder,
else
frame.avi.colorspace = HDMI_COLORSPACE_RGB;
+ if (conn_state->colorspace == DRM_MODE_COLORIMETRY_DEFAULT) {
+ /* Set ITU 709 as default for HDMI */
+ frame.avi.colorimetry = DRM_MODE_COLORIMETRY_ITU_709;
+ } else if (conn_state->colorspace < DRM_MODE_COLORIMETRY_XV_YCC_601) {
+ frame.avi.colorimetry = conn_state->colorspace;
+ } else {
+ frame.avi.colorimetry = HDMI_COLORIMETRY_EXTENDED;
+ /*
+* Starting from extended list where COLORIMETRY_XV_YCC_601
+* is the first extended mode and its value is 0 as per HDMI
+* specification.
+* TODO: This needs to be extended for LSPCON implementation
+* as well. Will be implemented separately.
+*/
+ frame.avi.extended_colorimetry = conn_state->colorspace -
+ DRM_MODE_COLORIMETRY_XV_YCC_601;
+ }
+
drm_hdmi_avi_infoframe_quant_range(&frame.avi,
[Intel-gfx] [v9 1/3] drm: Add HDMI colorspace property
Create a new connector property to program colorspace to sink
devices. Modern sink devices support more than 1 type of
colorspace like 601, 709, BT2020 etc. This helps to switch
based on content type which is to be displayed. The decision
lies with compositors as to in which scenarios, a particular
colorspace will be picked.
This will be helpful mostly to switch to higher gamut colorspaces
like BT2020 when the media content is encoded as BT2020. Thereby
giving a good visual experience to users.
The expectation from userspace is that it should parse the EDID
and get supported colorspaces. Use this property and switch to the
one supported. Sink supported colorspaces should be retrieved by
userspace from EDID and driver will not explicitly expose them.
Basically the expectation from userspace is:
- Set up CRTC DEGAMMA/CTM/GAMMA to convert to some sink
colorspace
- Set this new property to let the sink know what it
converted the CRTC output to.
v2: Addressed Maarten and Ville's review comments. Enhanced
the colorspace enum to incorporate both HDMI and DP supported
colorspaces. Also, added a default option for colorspace.
v3: Removed Adobe references from enum definitions as per
Ville, Hans Verkuil and Jonas Karlman suggestions. Changed
Default to an unset state where driver will assign the colorspace
is not chosen by user, suggested by Ville and Maarten. Addressed
other misc review comments from Maarten. Split the changes to
have separate colorspace property for DP and HDMI.
v4: Addressed Chris and Ville's review comments, and created a
common colorspace property for DP and HDMI, filtered the list
based on the colorspaces supported by the respective protocol
standard.
v5: Made the property creation helper accept enum list based on
platform capabilties as suggested by Shashank. Consolidated HDMI
and DP property creation in the common helper.
v6: Addressed Shashank's review comments.
v7: Added defines instead of enum in uapi as per Brian Starkey's
suggestion in order to go with string matching at userspace. Updated
the commit message to add more details as well kernel docs.
v8: Addressed Maarten's review comments.
v9: Removed macro defines from uapi as per Brian Starkey and Daniel
Stone's comments and moved to drm include file. Moved back to older
design with exposing all HDMI colorspaces to userspace since infoframe
capability is there even on legacy platforms, as per Ville's review
comments.
Signed-off-by: Uma Shankar
Reviewed-by: Shashank Sharma
---
drivers/gpu/drm/drm_atomic_uapi.c | 4 +++
drivers/gpu/drm/drm_connector.c | 73 +++
include/drm/drm_connector.h | 46
3 files changed, 123 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
b/drivers/gpu/drm/drm_atomic_uapi.c
index 9a1f41a..9b5d44f 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -746,6 +746,8 @@ static int drm_atomic_connector_set_property(struct
drm_connector *connector,
return -EINVAL;
}
state->content_protection = val;
+ } else if (property == connector->colorspace_property) {
+ state->colorspace = val;
} else if (property == config->writeback_fb_id_property) {
struct drm_framebuffer *fb = drm_framebuffer_lookup(dev, NULL,
val);
int ret = drm_atomic_set_writeback_fb_for_connector(state, fb);
@@ -814,6 +816,8 @@ static int drm_atomic_connector_set_property(struct
drm_connector *connector,
*val = state->picture_aspect_ratio;
} else if (property == config->content_type_property) {
*val = state->content_type;
+ } else if (property == connector->colorspace_property) {
+ *val = state->colorspace;
} else if (property == connector->scaling_mode_property) {
*val = state->scaling_mode;
} else if (property == connector->content_protection_property) {
diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
index 8475396..3a61a38 100644
--- a/drivers/gpu/drm/drm_connector.c
+++ b/drivers/gpu/drm/drm_connector.c
@@ -826,6 +826,30 @@ int drm_display_info_set_bus_formats(struct
drm_display_info *info,
};
DRM_ENUM_NAME_FN(drm_get_content_protection_name, drm_cp_enum_list)
+static const struct drm_prop_enum_list hdmi_colorspaces[] = {
+ /* For Default case, driver will set the colorspace */
+ { DRM_MODE_COLORIMETRY_DEFAULT, "Default" },
+ /* Standard Definition Colorimetry based on CEA 861 */
+ { DRM_MODE_COLORIMETRY_ITU_601, "ITU_601" },
+ { DRM_MODE_COLORIMETRY_ITU_709, "ITU_709" },
+ /* Standard Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_601, "XV_YCC_601" },
+ /* High Definition Colorimetry based on IEC 61966-2-4 */
+ { DRM_MODE_COLORIMETRY_XV_YCC_709, "XV_YCC_709" },
+ /* Colorimetr
[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Constify drm_color_lut_check()
== Series Details ==
Series: drm: Constify drm_color_lut_check()
URL : https://patchwork.freedesktop.org/series/55924/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12076
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55924/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12076 that come from known issues:
### IGT changes ###
Issues hit
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: PASS -> DMESG-WARN [fdo#108965]
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: NOTRUN -> FAIL [fdo#103182] +1
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-byt-clapper: PASS -> FAIL [fdo#107362]
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362]
Possible fixes
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (46 -> 41)
--
Additional (2): fi-icl-y fi-gdg-551
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12076
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12076: 4c5ebfc18c9220e99fa8eac8a5abcaec8c0e2ba6 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4c5ebfc18c92 drm: Constify drm_color_lut_check()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12076/
___
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] i915/gem_exec_latency: Normalize results into ns
Quoting Antonio Argenziano (2019-01-29 17:55:45) > > > On 29/01/19 01:55, Chris Wilson wrote: > > Present the latency results in nanoseconds not RCS cycles. > > > > Signed-off-by: Chris Wilson > > --- > > tests/i915/gem_exec_latency.c | 38 +++ > > 1 file changed, 34 insertions(+), 4 deletions(-) > > > > diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c > > index de16322a6..ea44adc14 100644 > > --- a/tests/i915/gem_exec_latency.c > > +++ b/tests/i915/gem_exec_latency.c > > @@ -59,6 +59,7 @@ > > #define PREEMPT 0x2 > > > > static unsigned int ring_size; > > +static double rcs_clock; > > > > static void > > poll_ring(int fd, unsigned ring, const char *name) > > @@ -207,7 +208,7 @@ static void latency_on_ring(int fd, > > igt_cork_unplug(&c); > > > > gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0); > > - gpu_latency = (results[repeats-1] - results[0]) / (double)(repeats-1); > > + gpu_latency = (results[repeats-1] - results[1]) / (double)(repeats-2); > > How come you don't like the value at 0? Maybe adding a comment would > make it clearer. I was thinking of trying to reduce some context warmup latency, but it doesn't matter and the spinner in the second patch is much more effective overall. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
On Tue, Jan 29, 2019 at 06:52:51PM +0100, Sam Ravnborg wrote:
> Hi Ville.
>
> On Tue, Jan 29, 2019 at 07:06:09PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > drm_color_lut_check() doens't modify the passed in blob so
> > let's make it const.
> >
> > Also s/uint32_y/u32/ while at it.
> >
> > Cc: Matt Roper
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
> > include/drm/drm_color_mgmt.h | 4 ++--
> > 2 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> > b/drivers/gpu/drm/drm_color_mgmt.c
> > index 968ca7c91ad8..3c8826a91a03 100644
> > --- a/drivers/gpu/drm/drm_color_mgmt.c
> > +++ b/drivers/gpu/drm/drm_color_mgmt.c
> > @@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
> > *
> > * Returns 0 on success, -EINVAL on failure.
> > */
> > -int drm_color_lut_check(struct drm_property_blob *lut,
> > - uint32_t tests)
> > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > + u32 tests)
>
> No need to linewrap this line.
> > {
> > - struct drm_color_lut *entry;
> > + const struct drm_color_lut *entry;
> > int i;
> >
> > if (!lut || !tests)
> > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> > index 6affbda6d9cb..58d4b20b5b97 100644
> > --- a/include/drm/drm_color_mgmt.h
> > +++ b/include/drm/drm_color_mgmt.h
> > @@ -96,6 +96,6 @@ enum drm_color_lut_tests {
> > DRM_COLOR_LUT_NON_DECREASING = BIT(1),
> > };
> >
> > -int drm_color_lut_check(struct drm_property_blob *lut,
> > - uint32_t tests);
> > +int drm_color_lut_check(const struct drm_property_blob *lut,
> > + u32 tests);
> Likewise.
>
> With the linewrap fixed:
> Reviewed-by: Sam Ravnborg
Thanks.
>
> Note: does not apply to my drm-misc tree. Anything I miss here?
I think it was merged via drm-intel.
--
Ville Syrjälä
Intel
___
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 1/2] i915/gem_exec_latency: Normalize results into ns
On 29/01/19 01:55, Chris Wilson wrote:
Present the latency results in nanoseconds not RCS cycles.
Signed-off-by: Chris Wilson
---
tests/i915/gem_exec_latency.c | 38 +++
1 file changed, 34 insertions(+), 4 deletions(-)
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..ea44adc14 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
#define PREEMPT 0x2
static unsigned int ring_size;
+static double rcs_clock;
static void
poll_ring(int fd, unsigned ring, const char *name)
@@ -207,7 +208,7 @@ static void latency_on_ring(int fd,
igt_cork_unplug(&c);
gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
- gpu_latency = (results[repeats-1] - results[0]) / (double)(repeats-1);
+ gpu_latency = (results[repeats-1] - results[1]) / (double)(repeats-2);
How come you don't like the value at 0? Maybe adding a comment would
make it clearer.
gem_set_domain(fd, obj[2].handle,
I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
igt_assert(offset == obj[2].offset);
gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
- igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target
%.2f)\n",
+ igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target
%.1fns)\n",
name,
-(end - start) / (double)repeats,
-gpu_latency, (results[repeats - 1] - results[0]) /
(double)(repeats - 1));
+(end - start) / (double)repeats * rcs_clock,
+gpu_latency * rcs_clock,
+(results[repeats - 1] - results[0]) / (double)(repeats - 1) *
rcs_clock);
munmap(map, 64*1024);
munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const
char *name, unsigned in
munmap(results, MMAP_SZ);
}
+static double clockrate(void)
+{
+ volatile uint32_t *reg;
+ uint32_t r_start, r_end;
+ struct timespec tv;
+ uint64_t t_start, t_end;
+ uint64_t elapsed;
+
+ reg = (volatile uint32_t *)((volatile char *)igt_global_mmio +
RCS_TIMESTAMP);
+
+ t_start = igt_nsec_elapsed(&tv);
+ r_start = *reg;
+ elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+ usleep(1000);
+
+ t_end = igt_nsec_elapsed(&tv);
+ r_end = *reg;
+ elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+ elapsed = (t_end - t_start) + elapsed / 2;
+ return (r_end - r_start) * 1e9 / elapsed;
+}
+
igt_main
{
const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
ring_size = 1024;
intel_register_access_init(intel_get_pci_device(), false, device);
+ rcs_clock = clockrate();
+ igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+rcs_clock / 1e3, 1e9 / rcs_clock);
+ rcs_clock = 1e9 / rcs_clock;
}
igt_subtest("all-rtidle-submit")
___
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Re: [Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
Hi Ville.
On Tue, Jan 29, 2019 at 07:06:09PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> drm_color_lut_check() doens't modify the passed in blob so
> let's make it const.
>
> Also s/uint32_y/u32/ while at it.
>
> Cc: Matt Roper
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
> include/drm/drm_color_mgmt.h | 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c
> b/drivers/gpu/drm/drm_color_mgmt.c
> index 968ca7c91ad8..3c8826a91a03 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
> *
> * Returns 0 on success, -EINVAL on failure.
> */
> -int drm_color_lut_check(struct drm_property_blob *lut,
> - uint32_t tests)
> +int drm_color_lut_check(const struct drm_property_blob *lut,
> + u32 tests)
No need to linewrap this line.
> {
> - struct drm_color_lut *entry;
> + const struct drm_color_lut *entry;
> int i;
>
> if (!lut || !tests)
> diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> index 6affbda6d9cb..58d4b20b5b97 100644
> --- a/include/drm/drm_color_mgmt.h
> +++ b/include/drm/drm_color_mgmt.h
> @@ -96,6 +96,6 @@ enum drm_color_lut_tests {
> DRM_COLOR_LUT_NON_DECREASING = BIT(1),
> };
>
> -int drm_color_lut_check(struct drm_property_blob *lut,
> - uint32_t tests);
> +int drm_color_lut_check(const struct drm_property_blob *lut,
> + u32 tests);
Likewise.
With the linewrap fixed:
Reviewed-by: Sam Ravnborg
Note: does not apply to my drm-misc tree. Anything I miss here?
Sam
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/9] drm/i915/selftests: Apply a subtest filter
== Series Details ==
Series: series starting with [1/9] drm/i915/selftests: Apply a subtest filter
URL : https://patchwork.freedesktop.org/series/55923/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12075
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_12075 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12075, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55923/revisions/1/mbox/
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_12075:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_execlists:
- fi-cfl-8700k: PASS -> DMESG-FAIL
- fi-kbl-7567u: PASS -> DMESG-FAIL
- fi-skl-guc: PASS -> DMESG-FAIL
- fi-glk-j4005: PASS -> DMESG-FAIL
- fi-cfl-guc: PASS -> DMESG-FAIL
- fi-skl-iommu: PASS -> DMESG-FAIL
- fi-skl-gvtdvm: PASS -> DMESG-FAIL
- fi-whl-u: PASS -> DMESG-FAIL
- fi-bxt-j4205: PASS -> DMESG-FAIL
- fi-skl-6700hq: PASS -> DMESG-FAIL
- fi-kbl-7500u: PASS -> DMESG-FAIL
- fi-kbl-guc: PASS -> DMESG-FAIL
- fi-kbl-8809g: PASS -> DMESG-FAIL
- fi-kbl-x1275: PASS -> DMESG-FAIL
- fi-skl-6700k2: PASS -> DMESG-FAIL
- fi-skl-6260u: PASS -> DMESG-FAIL
- fi-kbl-7560u: PASS -> DMESG-FAIL
- fi-skl-6770hq: PASS -> DMESG-FAIL
- fi-kbl-r: PASS -> DMESG-FAIL
- fi-cfl-8109u: PASS -> DMESG-FAIL
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_execlists:
- {fi-icl-u2}:PASS -> DMESG-FAIL
- {fi-icl-u3}:PASS -> DMESG-FAIL
Known issues
Here are the changes found in Patchwork_12075 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_busy@basic-flip-a:
- fi-gdg-551: NOTRUN -> FAIL [fdo#103182]
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: PASS -> FAIL [fdo#109485]
* igt@pm_rpm@module-reload:
- fi-skl-6770hq: PASS -> FAIL [fdo#108511]
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-apl-guc: INCOMPLETE [fdo#103927] -> PASS
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS +1
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108511]: https://bugs.freedesktop.org/show_bug.cgi?id=108511
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (46 -> 40)
--
Additional (1): fi-gdg-551
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12075
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12075: 41e1b6fcbcabb7f58d62aab54e61d85020eda7df @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
41e1b6fcbcab drm/i915: Drop fake breadcrumb irq
662de53b448a drm/i915: Replace global breadcrumbs with per-context interrupt
tracking
f4488a12f17a drm/i915: Remove the intel_engine_notify tracepoint
3c32aa64c5df drm/i915: Identify active requests
17d3de9cb9b6 drm/i915/selftests: Exercise some AB...BA preemption chains
5fa53ada9788 drm/i915/execlists: Suppress redundant preemption
aa5da3130aae drm/i915/execlists: Suppress preempting self
6d8ec8621635 drm/i915: Rename execlists->queue_priority to queue_priority_hint
f2bdc9bb090c drm/i915/selftests: Apply a subtest filter
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12075/
___
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/i915/selftests: Apply a subtest filter
== Series Details == Series: series starting with [1/9] drm/i915/selftests: Apply a subtest filter URL : https://patchwork.freedesktop.org/series/55923/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915/selftests: Apply a subtest filter Okay! Commit: drm/i915: Rename execlists->queue_priority to queue_priority_hint Okay! Commit: drm/i915/execlists: Suppress preempting self -drivers/gpu/drm/i915/intel_ringbuffer.h:600:23: warning: expression using sizeof(void) Commit: drm/i915/execlists: Suppress redundant preemption Okay! Commit: drm/i915/selftests: Exercise some AB...BA preemption chains Okay! Commit: drm/i915: Identify active requests Okay! Commit: drm/i915: Remove the intel_engine_notify tracepoint Okay! Commit: drm/i915: Replace global breadcrumbs with per-context interrupt tracking +drivers/gpu/drm/i915/selftests/i915_request.c:280:40: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/i915_request.c:280:40: warning: expression using sizeof(void) -./include/linux/mm.h:619:13: error: not a function -./include/linux/mm.h:619:13: error: not a function -./include/linux/mm.h:619:13: error: undefined identifier '__builtin_mul_overflow' -./include/linux/mm.h:619:13: warning: call with no type! +./include/linux/slab.h:664:13: error: not a function +./include/linux/slab.h:664:13: error: not a function Commit: drm/i915: Drop fake breadcrumb irq Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/selftests: Apply a subtest filter
== Series Details ==
Series: series starting with [1/9] drm/i915/selftests: Apply a subtest filter
URL : https://patchwork.freedesktop.org/series/55923/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f2bdc9bb090c drm/i915/selftests: Apply a subtest filter
6d8ec8621635 drm/i915: Rename execlists->queue_priority to queue_priority_hint
aa5da3130aae drm/i915/execlists: Suppress preempting self
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#14:
value as it may match a second preemption request within the same time period
-:34: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit a2bf92e8cc16
("drm/i915/execlists: Avoid kicking priority on the current context")'
#34:
References: a2bf92e8cc16 ("drm/i915/execlists: Avoid kicking priority on the
current context")
total: 1 errors, 1 warnings, 0 checks, 338 lines checked
5fa53ada9788 drm/i915/execlists: Suppress redundant preemption
17d3de9cb9b6 drm/i915/selftests: Exercise some AB...BA preemption chains
3c32aa64c5df drm/i915: Identify active requests
f4488a12f17a drm/i915: Remove the intel_engine_notify tracepoint
662de53b448a drm/i915: Replace global breadcrumbs with per-context interrupt
tracking
-:18: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#18:
Before commit 688e6c725816, the solution was simple. Every client
-:21: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#21:
688e6c725816 introduced an rbtree so that only the earliest waiter on
-:56: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#56:
References: 688e6c725816 ("drm/i915: Slaughter the thundering i915_wait_request
herd")
-:56: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 688e6c725816 ("drm/i915:
Slaughter the thundering i915_wait_request herd")'
#56:
References: 688e6c725816 ("drm/i915: Slaughter the thundering i915_wait_request
herd")
-:2195: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
i915_gem_context *' should also have an identifier name
#2195: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:258:
+ struct i915_request *(*request_alloc)(struct i915_gem_context *,
-:2195: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct
intel_engine_cs *' should also have an identifier name
#2195: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:258:
+ struct i915_request *(*request_alloc)(struct i915_gem_context *,
-:2221: WARNING:LINE_SPACING: Missing a blank line after declarations
#2221: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:284:
+ struct i915_request **requests;
+ I915_RND_STATE(prng);
-:2653: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#2653:
deleted file mode 100644
total: 3 errors, 5 warnings, 0 checks, 2586 lines checked
41e1b6fcbcab drm/i915: Drop fake breadcrumb irq
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC set
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: Prevent a race during
I915_GEM_MMAP ioctl with WC set
URL : https://patchwork.freedesktop.org/series/55919/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_5501 -> Patchwork_12074
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://patchwork.freedesktop.org/api/1.0/series/55919/revisions/1/mbox/
Known issues
Here are the changes found in Patchwork_12074 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- fi-byt-clapper: PASS -> FAIL [fdo#103191] / [fdo#107362] +1
Possible fixes
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
- fi-byt-clapper: FAIL [fdo#103191] / [fdo#107362] -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
[fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
Participating hosts (46 -> 41)
--
Additional (2): fi-icl-y fi-gdg-551
Missing(7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks
fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-
* Linux: CI_DRM_5501 -> Patchwork_12074
CI_DRM_5501: 5aac0b69f3a3085b9b8a9924cb19cb94f7860dbe @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_4798: 998e0a4aedf10fb5f7c271018cd80d874668bf55 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12074: 80c1956210721a57e49cbfcae05082181d756d8d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
80c195621072 drm/i915: Handle vm_mmap error during I915_GEM_MMAP ioctl with WC
set
6de8da42fb84 drm/i915: Prevent a race during I915_GEM_MMAP ioctl with WC set
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12074/
___
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Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] i915/pm_rpm: Check for functional GEM before use
On 27/01/19 05:13, Chris Wilson wrote:
Check the GPU (using GEM) is up an operational before submitting
commands.
Always a good idea.
Reviewed-by: Antonio Argenziano
Signed-off-by: Chris Wilson
---
tests/pm_rpm.c | 4
1 file changed, 4 insertions(+)
diff --git a/tests/pm_rpm.c b/tests/pm_rpm.c
index 7dcb5586d..be296f525 100644
--- a/tests/pm_rpm.c
+++ b/tests/pm_rpm.c
@@ -1220,6 +1220,8 @@ static void gem_execbuf_subtest(void)
int sq_x = 5, sq_y = 10, sq_w = 15, sq_h = 20;
uint32_t color;
+ igt_require_gem(drm_fd);
+
/* Create and set data while the device is active. */
enable_one_screen_and_wait(&ms_data);
@@ -1308,6 +1310,8 @@ static void gem_execbuf_stress_subtest(int rounds, int wait_flags)
struct drm_i915_gem_execbuffer2 execbuf = {};
struct drm_i915_gem_exec_object2 objs[1] = {{}};
+ igt_require_gem(drm_fd);
+
if (wait_flags & WAIT_PC8_RES)
igt_require(has_pc8);
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Re: [Intel-gfx] [PATCH 5/9] drm/i915/selftests: Exercise some AB...BA preemption chains
Quoting Chris Wilson (2019-01-29 17:02:03) > Build a chain using 2 contexts (A, B) then request a preemption such > that a later A request runs before the spinner in B. > > Signed-off-by: Chris Wilson Already, Reviewed-by: Tvrtko Ursulin -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/9] drm/i915: Rename execlists->queue_priority to queue_priority_hint
Quoting Chris Wilson (2019-01-29 17:02:00) > After noticing that we trigger preemption events for currently executing > requests, as well as requests that complete before the preemption and > attempting to suppress those preemption events, it is wise to not > consider the queue_priority to be authoritative. As we only track the > maximum priority seen between dequeue passes, if the maximum priority > request is no longer available for dequeuing (it completed or is even > executing on another engine), we have no knowledge of the previous > queue_priority as it would require us to keep a full history of enqueued > requests -- but we already have that history in the priolists! > > Rename the queue_priority to queue_priority_hint so that we do not > confuse it as being exactly the maximum priority in the queue, but merely > an indication that we have seen a new maximum priority value and as such > we should check whether it should preempt the currently running request. > > v2: s/preempt_priority_hint/queue_priority_hint/ as preempt implies it > being only used for the singular task of preemption and not the wider > question of waking up due to a change in the queue. > > Signed-off-by: Chris Wilson > Cc: Tvrtko Ursulin Twas, Reviewed-by: Tvrtko Ursulin -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm: Constify drm_color_lut_check()
From: Ville Syrjälä
drm_color_lut_check() doens't modify the passed in blob so
let's make it const.
Also s/uint32_y/u32/ while at it.
Cc: Matt Roper
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/drm_color_mgmt.c | 6 +++---
include/drm/drm_color_mgmt.h | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 968ca7c91ad8..3c8826a91a03 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -474,10 +474,10 @@ EXPORT_SYMBOL(drm_plane_create_color_properties);
*
* Returns 0 on success, -EINVAL on failure.
*/
-int drm_color_lut_check(struct drm_property_blob *lut,
- uint32_t tests)
+int drm_color_lut_check(const struct drm_property_blob *lut,
+ u32 tests)
{
- struct drm_color_lut *entry;
+ const struct drm_color_lut *entry;
int i;
if (!lut || !tests)
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index 6affbda6d9cb..58d4b20b5b97 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -96,6 +96,6 @@ enum drm_color_lut_tests {
DRM_COLOR_LUT_NON_DECREASING = BIT(1),
};
-int drm_color_lut_check(struct drm_property_blob *lut,
- uint32_t tests);
+int drm_color_lut_check(const struct drm_property_blob *lut,
+ u32 tests);
#endif
--
2.19.2
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[Intel-gfx] [PATCH 6/9] drm/i915: Identify active requests
To allow requests to forgo a common execution timeline, one question we
need to be able to answer is "is this request running?". To track
whether a request has started on HW, we can emit a breadcrumb at the
beginning of the request and check its timeline's HWSP to see if the
breadcrumb has advanced past the start of this request. (This is in
contrast to the global timeline where we need only ask if we are on the
global timeline and if the timeline has advanced past the end of the
previous request.)
There is still confusion from a preempted request, which has already
started but relinquished the HW to a high priority request. For the
common case, this discrepancy should be negligible. However, for
identification of hung requests, knowing which one was running at the
time of the hang will be much more important.
Signed-off-by: Chris Wilson
Reviewed-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/i915_gem.c | 15
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 ++
drivers/gpu/drm/i915/i915_request.c | 10 ++---
drivers/gpu/drm/i915/i915_request.h | 1 +
drivers/gpu/drm/i915/i915_timeline.c | 1 +
drivers/gpu/drm/i915/i915_timeline.h | 2 +
drivers/gpu/drm/i915/intel_engine_cs.c | 8 ++--
drivers/gpu/drm/i915/intel_lrc.c | 39 +---
drivers/gpu/drm/i915/intel_ringbuffer.c | 25 -
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++-
drivers/gpu/drm/i915/selftests/mock_engine.c | 2 +-
11 files changed, 96 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 05627000b77d..e802af64d628 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2873,6 +2873,14 @@ i915_gem_object_pwrite_gtt(struct drm_i915_gem_object
*obj,
return 0;
}
+static bool match_ring(struct i915_request *rq)
+{
+ struct drm_i915_private *dev_priv = rq->i915;
+ u32 ring = I915_READ(RING_START(rq->engine->mmio_base));
+
+ return ring == i915_ggtt_offset(rq->ring->vma);
+}
+
struct i915_request *
i915_gem_find_active_request(struct intel_engine_cs *engine)
{
@@ -2895,6 +2903,13 @@ i915_gem_find_active_request(struct intel_engine_cs
*engine)
if (i915_request_completed(request))
continue;
+ if (!i915_request_started(request))
+ break;
+
+ /* More than one preemptible request may match! */
+ if (!match_ring(request))
+ break;
+
active = request;
break;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f250109e1f66..8eedf7cac493 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1976,6 +1976,18 @@ static int eb_submit(struct i915_execbuffer *eb)
return err;
}
+ /*
+* After we completed waiting for other engines (using HW semaphores)
+* then we can signal that this request/batch is ready to run. This
+* allows us to determine if the batch is still waiting on the GPU
+* or actually running by checking the breadcrumb.
+*/
+ if (eb->engine->emit_init_breadcrumb) {
+ err = eb->engine->emit_init_breadcrumb(eb->request);
+ if (err)
+ return err;
+ }
+
err = eb->engine->emit_bb_start(eb->request,
eb->batch->node.start +
eb->batch_start_offset,
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index 4d58770e6a8c..7db15b7b3de8 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -333,7 +333,7 @@ void i915_request_retire_upto(struct i915_request *rq)
static u32 timeline_get_seqno(struct i915_timeline *tl)
{
- return ++tl->seqno;
+ return tl->seqno += 1 + tl->has_initial_breadcrumb;
}
static void move_to_timeline(struct i915_request *request,
@@ -382,8 +382,8 @@ void __i915_request_submit(struct i915_request *request)
intel_engine_enable_signaling(request, false);
spin_unlock(&request->lock);
- engine->emit_breadcrumb(request,
- request->ring->vaddr + request->postfix);
+ engine->emit_fini_breadcrumb(request,
+request->ring->vaddr + request->postfix);
/* Transfer from per-context onto the global per-engine timeline */
move_to_timeline(request, &engine->timeline);
@@ -657,7 +657,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
* around inside i915_request_add() there is sufficient space at
* the beginning of the ring as well.
*/
-
