[Intel-gfx] ✗ Fi.CI.BAT: failure for Workaround updates (rev2)
== Series Details ==
Series: Workaround updates (rev2)
URL : https://patchwork.freedesktop.org/series/71337/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15912
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15912 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15912, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15912:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6600u: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: [PASS][3] -> [FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-skl-6600u/igt@i915_pm_...@module-reload.html
Known issues
Here are the changes found in Patchwork_15912 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2: [PASS][5] -> [INCOMPLETE][6] ([i915#671])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-lmem:[PASS][7] -> [INCOMPLETE][8] ([i915#671])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-icl-u2: [PASS][9] -> [FAIL][10] ([i915#217])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@kms_chamel...@hdmi-edid-read.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-icl-u2/igt@kms_chamel...@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][11] -> [FAIL][12] ([fdo#111407])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][13] ([fdo#111736]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][15] ([i915#725]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-hsw-4770/igt@i915_selftest@live_blt.html
Warnings
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][18] ([i915#62] / [i915#92]) +9 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) ->
[DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +6 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15912/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[i915#217]:
Re: [Intel-gfx] [PATCH v2] drm/i915/lmem: debugfs for LMEM details
Hi Ramalingam,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip v5.5-rc3 next-20191220]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-lmem-debugfs-for-LMEM-details/20191223-230416
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-defconfig (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All warnings (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_gem_object_info':
>> drivers/gpu/drm/i915/i915_debugfs.c:377:33: warning: format '%llu' expects
>> argument of type 'long long unsigned int', but argument 3 has type
>> 'resource_size_t {aka unsigned int}' [-Wformat=]
seq_printf(m, "LMEM total: %llu bytes, available %llu bytes\n",
~~~^
%u
drivers/gpu/drm/i915/i915_debugfs.c:377:55: warning: format '%llu' expects
argument of type 'long long unsigned int', but argument 4 has type
'resource_size_t {aka unsigned int}' [-Wformat=]
seq_printf(m, "LMEM total: %llu bytes, available %llu bytes\n",
~~~^
%u
vim +377 drivers/gpu/drm/i915/i915_debugfs.c
366
367 static int i915_gem_object_info(struct seq_file *m, void *data)
368 {
369 struct drm_i915_private *i915 = node_to_i915(m->private);
370
371 seq_printf(m, "%u shrinkable [%u free] objects, %llu bytes\n",
372 i915->mm.shrink_count,
373 atomic_read(>mm.free_count),
374 i915->mm.shrink_memory);
375
376 if (HAS_LMEM(i915)) {
> 377 seq_printf(m, "LMEM total: %llu bytes, available %llu
> bytes\n",
378
READ_ONCE(i915->mm.regions[INTEL_REGION_LMEM]->total),
379
READ_ONCE(i915->mm.regions[INTEL_REGION_LMEM]->avail));
380 }
381
382 print_context_stats(m, i915);
383
384 return 0;
385 }
386
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org Intel Corporation
.config.gz
Description: application/gzip
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset (rev3)
== Series Details == Series: series starting with [v5,1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset (rev3) URL : https://patchwork.freedesktop.org/series/71335/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15911 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15911 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15911, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15911: ### IGT changes ### Possible regressions * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6600u: [PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html Known issues Here are the changes found in Patchwork_15911 that come from known issues: ### IGT changes ### Issues hit * igt@gem_close_race@basic-threads: - fi-byt-n2820: [PASS][3] -> [TIMEOUT][4] ([i915#816]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-byt-n2820/igt@gem_close_r...@basic-threads.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-byt-n2820/igt@gem_close_r...@basic-threads.html * igt@gem_exec_suspend@basic-s3: - fi-icl-guc: [PASS][5] -> [INCOMPLETE][6] ([i915#140] / [i915#184]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-guc/igt@gem_exec_susp...@basic-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-icl-guc/igt@gem_exec_susp...@basic-s3.html * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-guc: [PASS][7] -> [INCOMPLETE][8] ([i915#505] / [i915#671]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_pm_rpm@module-reload: - fi-skl-6600u: [PASS][9] -> [INCOMPLETE][10] ([i915#151]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_pm_...@module-reload.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-skl-6600u/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live_gt_heartbeat: - fi-kbl-guc: [PASS][11] -> [DMESG-FAIL][12] ([fdo#112406]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-guc/igt@i915_selftest@live_gt_heartbeat.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-kbl-guc/igt@i915_selftest@live_gt_heartbeat.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][13] -> [DMESG-WARN][14] ([i915#44]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html Possible fixes * igt@i915_selftest@live_memory_region: - fi-bwr-2160:[FAIL][15] -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-bwr-2160/igt@i915_selftest@live_memory_region.html Warnings * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][17] ([i915#725]) -> [DMESG-FAIL][18] ([i915#563]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@kms_busy@basic-flip-pipe-b: - fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][20] ([i915#62] / [i915#92]) +4 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15911/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html * igt@kms_flip@basic-flip-vs-modeset: - fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) -> [DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) +6 similar issues [21]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for Workaround updates
== Series Details ==
Series: Workaround updates
URL : https://patchwork.freedesktop.org/series/71337/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15910
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15910 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15910, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15910:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6600u: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: [PASS][3] -> [FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6600u/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-skl-6600u/igt@i915_pm_...@module-reload.html
Known issues
Here are the changes found in Patchwork_15910 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][5] ([i915#725]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][7] ([i915#656]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][9] -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-x1275: [DMESG-WARN][11] ([fdo#107139] / [i915#62] /
[i915#92] / [i915#95]) -> [DMESG-WARN][12] ([fdo#107139] / [i915#62] /
[i915#92])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][14] ([i915#62] / [i915#92]) +6 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) ->
[DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15910/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (43 -> 42)
--
Additional (7): fi-hsw-4770r fi-byt-j1900 fi-glk-dsi fi-whl-u fi-ivb-3770
fi-bsw-nick fi-snb-2600
Missing(8): fi-ilk-m540 fi-bdw-5557u fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-tgl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset (rev2)
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/dp: Make sure all tiled
connectors get added to the state with full modeset (rev2)
URL : https://patchwork.freedesktop.org/series/71335/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15909
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15909 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15909, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15909:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-lmem:[PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-lmem:[PASS][3] -> [FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-lmem/igt@i915_pm_...@module-reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-skl-lmem/igt@i915_pm_...@module-reload.html
Known issues
Here are the changes found in Patchwork_15909 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][5] ([fdo#111736]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][7] ([i915#725]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][9] ([i915#656]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@i915_module_load@reload-with-fault-injection:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) ->
[INCOMPLETE][14] ([i915#879])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-kbl-x1275/igt@i915_module_l...@reload-with-fault-injection.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][16] ([i915#62] / [i915#92]) +7 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15909/fi-kbl-x1275/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879
[i915#92]:
[Intel-gfx] [PATCH 2/3] drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl, ehl
Workaround database indicates we should disable clock gating of both the
vsunit and hsunit.
Bspec: 33450
Bspec: 33451
Cc: Lucas De Marchi
Cc: Matt Atwood
Cc: Radhakrishna Sripada
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++-
drivers/gpu/drm/i915/intel_pm.c | 8
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bbfedeb00b7f..968a43f7cd98 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4177,7 +4177,9 @@ enum {
#define CPSSUNIT_CLKGATE_DIS REG_BIT(9)
#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
-#define VFUNIT_CLKGATE_DIS(1 << 20)
+#define VFUNIT_CLKGATE_DIS REG_BIT(20)
+#define HSUNIT_CLKGATE_DIS REG_BIT(8)
+#define VSUNIT_CLKGATE_DIS REG_BIT(3)
#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
#define CGPSF_CLKGATE_DIS(1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..58ba6cbf9a57 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6590,6 +6590,14 @@ static void icl_init_clock_gating(struct
drm_i915_private *dev_priv)
/* WaEnable32PlaneMode:icl */
I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
_MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
+
+ /*
+* Wa_1408615072:icl,ehl (vsunit)
+* Wa_1407596294:icl,ehl (hsunit)
+*/
+ intel_uncore_rmw(_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
+0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
+
}
static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/3] drm/i915/tgl: Extend Wa_1408615072 to tgl
Although the workaround number and description are the same, the vsunit
clock gate disable bit has moved to a new register and location on
gen12.
Bspec: 52890
Bspec: 52758
Cc: Lucas De Marchi
Cc: Radhakrishna Sripada
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 4
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 968a43f7cd98..030a3f3e69af 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4181,6 +4181,9 @@ enum {
#define HSUNIT_CLKGATE_DIS REG_BIT(8)
#define VSUNIT_CLKGATE_DIS REG_BIT(3)
+#define UNSLICE_UNIT_LEVEL_CLKGATE2_MMIO(0x94e4)
+#define VSUNIT_CLKGATE_DIS_TGL REG_BIT(19)
+
#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
#define CGPSF_CLKGATE_DIS(1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 58ba6cbf9a57..fe02ac3a3674 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6605,6 +6605,10 @@ static void tgl_init_clock_gating(struct
drm_i915_private *dev_priv)
u32 vd_pg_enable = 0;
unsigned int i;
+ /* Wa_1408615072:tgl */
+ intel_uncore_rmw(_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
+0, VSUNIT_CLKGATE_DIS_TGL);
+
/* This is not a WA. Enable VD HCP & MFX_ENC powergate */
for (i = 0; i < I915_MAX_VCS; i++) {
if (HAS_ENGINE(dev_priv, _VCS(i)))
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/3] Workaround updates
A quick drive-by update for some workarounds I noticed that were added/extended to additional platforms. Cc: Lucas De Marchi Cc: Matt Atwood Cc: Radhakrishna Sripada Matt Roper (3): drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl drm/i915/tgl: Extend Wa_1408615072 to tgl drivers/gpu/drm/i915/display/intel_display.c | 7 +-- drivers/gpu/drm/i915/i915_reg.h | 7 ++- drivers/gpu/drm/i915/intel_pm.c | 12 3 files changed, 23 insertions(+), 3 deletions(-) -- 2.23.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/i915: Extend WaDisableDARBFClkGating to icl, ehl, tgl
WaDisableDARBFClkGating, now known as Wa_14010480278, has been added to
the workaround tables for ICL, EHL, and TGL so we need to extend our
platform test accordingly.
Bspec: 33450
Bspec: 33451
Bspec: 52890
Cc: Lucas De Marchi
Cc: Matt Atwood
Cc: Radhakrishna Sripada
Signed-off-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 1860da0a493e..0944b56c8f04 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17827,8 +17827,11 @@ get_encoder_power_domains(struct drm_i915_private
*dev_priv)
static void intel_early_display_was(struct drm_i915_private *dev_priv)
{
- /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
- if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
+ /*
+* Display WA #1185 WaDisableDARBFClkGating:cnl,glk,icl,ehl,tgl
+* Also known as Wa_14010480278.
+*/
+ if (IS_GEN_RANGE(dev_priv, 10, 12) || IS_GEMINILAKE(dev_priv))
I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
DARBF_GATING_DIS);
--
2.23.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v5,1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
== Series Details ==
Series: series starting with [v5,1/3] drm/i915/dp: Make sure all tiled
connectors get added to the state with full modeset
URL : https://patchwork.freedesktop.org/series/71335/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15907
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15907 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15907, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15907:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_gt_pm:
- fi-icl-u3: [PASS][1] -> [DMESG-FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u3/igt@i915_selftest@live_gt_pm.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-icl-u3/igt@i915_selftest@live_gt_pm.html
Known issues
Here are the changes found in Patchwork_15907 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_flip@basic-flip-vs-wf_vblank:
- fi-bsw-n3050: [PASS][3] -> [FAIL][4] ([i915#34])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][5] ([fdo#111736]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][7] ([i915#725]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][9] ([i915#656]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
Warnings
* igt@kms_busy@basic-flip-pipe-b:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][12] ([i915#62] / [i915#92]) +5 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) ->
[DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15907/fi-kbl-x1275/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (43 -> 40)
--
Additional (8): fi-hsw-4770r fi-byt-j1900 fi-skl-6770hq fi-gdg-551
fi-ivb-3770 fi-kbl-7560u fi-bsw-nick fi-snb-2600
Missing(11): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-bwr-2160
fi-cfl-8700k fi-kbl-7500u fi-ctg-p8600 fi-skl-lmem fi-bdw-samus fi-byt-clapper
fi-skl-6600u
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7630 -> Patchwork_15907
CI-20190529: 20190529
CI_DRM_7630: 28a2aa0ebf1520ea8a0dd89299f7ceea80dfd96f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15907:
[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [v4,01/10] drm/i915: simplify prefixes on device_info
== Series Details == Series: series starting with [v4,01/10] drm/i915: simplify prefixes on device_info URL : https://patchwork.freedesktop.org/series/71336/ State : failure == Summary == Patch is empty. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4 02/10] drm/i915: prefer 3-letter acronym for pineview
On Mon, Dec 23, 2019 at 04:05:20PM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts pineview to pnv where appropriate.
>
> v2: Add missing conversions in intel_pm.c (Matt Roper). While at it, fix
> missing blank lines between structs that would otherwise trigger
> checkpatch errors (Lucas)
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++--
> drivers/gpu/drm/i915/intel_pm.c | 41
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 652b8800d585..930362124808 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -370,7 +370,7 @@ static const struct intel_limit
> intel_limits_g4x_dual_channel_lvds = {
> },
> };
>
> -static const struct intel_limit intel_limits_pineview_sdvo = {
> +static const struct intel_limit pnv_limits_sdvo = {
> .dot = { .min = 2, .max = 40},
> .vco = { .min = 170, .max = 350 },
> /* Pineview's Ncounter is a ring counter */
> @@ -385,7 +385,7 @@ static const struct intel_limit
> intel_limits_pineview_sdvo = {
> .p2_slow = 10, .p2_fast = 5 },
> };
>
> -static const struct intel_limit intel_limits_pineview_lvds = {
> +static const struct intel_limit pnv_limits_lvds = {
> .dot = { .min = 2, .max = 40 },
> .vco = { .min = 170, .max = 350 },
> .n = { .min = 3, .max = 6 },
> @@ -8779,9 +8779,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc
> *crtc,
> DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n",
> refclk);
> }
>
> - limit = _limits_pineview_lvds;
> + limit = _limits_lvds;
> } else {
> - limit = _limits_pineview_sdvo;
> + limit = _limits_sdvo;
> }
>
> if (!crtc_state->clock_set &&
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 31ec82337e4f..b55e9d2d2a83 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private
> *dev_priv)
>
> }
>
> -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
> +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv)
> {
> u32 tmp;
>
> @@ -549,34 +549,38 @@ static int i845_get_fifo_size(struct drm_i915_private
> *dev_priv,
> }
>
> /* Pineview has different values for various configs */
> -static const struct intel_watermark_params pineview_display_wm = {
> +static const struct intel_watermark_params pnv_display_wm = {
> .fifo_size = PINEVIEW_DISPLAY_FIFO,
> .max_wm = PINEVIEW_MAX_WM,
> .default_wm = PINEVIEW_DFT_WM,
> .guard_size = PINEVIEW_GUARD_WM,
> .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
> };
> -static const struct intel_watermark_params pineview_display_hplloff_wm = {
> +
> +static const struct intel_watermark_params pnv_display_hplloff_wm = {
> .fifo_size = PINEVIEW_DISPLAY_FIFO,
> .max_wm = PINEVIEW_MAX_WM,
> .default_wm = PINEVIEW_DFT_HPLLOFF_WM,
> .guard_size = PINEVIEW_GUARD_WM,
> .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
> };
> -static const struct intel_watermark_params pineview_cursor_wm = {
> +
> +static const struct intel_watermark_params pnv_cursor_wm = {
> .fifo_size = PINEVIEW_CURSOR_FIFO,
> .max_wm = PINEVIEW_CURSOR_MAX_WM,
> .default_wm = PINEVIEW_CURSOR_DFT_WM,
> .guard_size = PINEVIEW_CURSOR_GUARD_WM,
> .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
> };
> -static const struct intel_watermark_params pineview_cursor_hplloff_wm = {
> +
> +static const struct intel_watermark_params pnv_cursor_hplloff_wm = {
> .fifo_size = PINEVIEW_CURSOR_FIFO,
> .max_wm = PINEVIEW_CURSOR_MAX_WM,
> .default_wm = PINEVIEW_CURSOR_DFT_WM,
> .guard_size = PINEVIEW_CURSOR_GUARD_WM,
> .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
> };
> +
> static const struct intel_watermark_params i965_cursor_wm_info = {
> .fifo_size = I965_CURSOR_FIFO,
> .max_wm = I965_CURSOR_MAX_WM,
> @@ -584,6 +588,7 @@ static const struct intel_watermark_params
> i965_cursor_wm_info = {
> .guard_size = 2,
> .cacheline_size = I915_FIFO_LINE_SIZE,
> };
> +
> static const struct intel_watermark_params i945_wm_info = {
> .fifo_size = I945_FIFO_SIZE,
> .max_wm = I915_MAX_WM,
> @@ -591,6 +596,7 @@ static const struct intel_watermark_params i945_wm_info =
> {
>
Re: [Intel-gfx] [PATCH 7/9] drm/i915/display: add phy, vbt and ddi indexes
On Mon, Dec 23, 2019 at 04:10:44PM -0800, Matt Roper wrote:
On Mon, Dec 23, 2019 at 11:58:48AM -0800, Lucas De Marchi wrote:
Identify 3 possible cases in which the index numbers can be different
from the "port" and add them to the description-based ddi initialization
table. This can be used in place of additional functions mapping from
on to the other. Right now we already cover part of this by creating kind of
virtual phy numbering, but that comes with downsides:
a) there's not really a "phy numbering" in the spec, this is purely a
software thing; hardware uses whatever they want thinking mapping from
one to the other arbitrarily is easy in software.
b) currently the mapping occurs on "leaf" functions, making the decision
based on the platform.
With this new table the approach will be: the port as defined by the
enum port is purely a driver convention and won't be used anymore to
define the register offset or register bits. For that we have the other
3 indexes, identified as being possibly different from the current usage
of register bits: ddi, vbt and phy. The phy type is also added here,
meant to replace the checks for combo vs tc (although the helper
functions can remain so we may differentiate between, e.g. Dekel and MG
phys).
While at it, also give names to the ports so they can be easily
identified.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 54 +--
drivers/gpu/drm/i915/display/intel_display.h | 7 +++
.../drm/i915/display/intel_display_types.h| 5 ++
3 files changed, 39 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index ad85cf75c815..219f180fa395 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16277,14 +16277,14 @@ static bool ddi_is_port_present(struct
drm_i915_private *i915,
static const struct intel_output tgl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_D },
- { .port = PORT_E },
- { .port = PORT_F },
- { .port = PORT_G },
- { .port = PORT_H },
- { .port = PORT_I },
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
+ { .name = "DDI TC1", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x0, .vbt_idx = 0x2, },
+ { .name = "DDI TC2", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x1, .vbt_idx = 0x3, },
+ { .name = "DDI TC3", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x2, .vbt_idx = 0x4, },
+ { .name = "DDI TC4", .port = PORT_G, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x6, .phy_idx = 0x3, .vbt_idx = 0x5, },
+ { .name = "DDI TC5", .port = PORT_H, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x7, .phy_idx = 0x4, .vbt_idx = 0x6, },
+ { .name = "DDI TC6", .port = PORT_I, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x8, .phy_idx = 0x5, .vbt_idx = 0x7, },
{ .port = PORT_NONE }
}
};
@@ -16293,12 +16293,12 @@ static const struct intel_output icl_output = {
.dsi_init = icl_dsi_init,
.is_port_present = icl_is_port_present,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_C },
- { .port = PORT_D },
- { .port = PORT_E },
- { .port = PORT_F },
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
+ { .name = "DDI TC1", .port = PORT_C, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x2, .phy_idx = 0x0, .vbt_idx = 0x2, },
+ { .name = "DDI TC2", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x1, .vbt_idx = 0x3, },
+ { .name = "DDI TC3", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x2, .vbt_idx = 0x4, },
+ { .name = "DDI TC4", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x3, .vbt_idx = 0x5, },
{ .port = PORT_NONE }
}
};
@@ -16306,10 +16306,10 @@ static const struct intel_output icl_output = {
static const struct intel_output ehl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_C },
-
Re: [Intel-gfx] [PATCH 9/9] drm/i915/display: use port_info on intel_ddi_init
On Mon, Dec 23, 2019 at 11:58:50AM -0800, Lucas De Marchi wrote:
> Now that we have tables for all platforms using ddi, keep the port_info
> around so we can use it for decisions like "what phy does it have?"
> instead of keep checking the platform/gen everywhere.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 36 ---
> drivers/gpu/drm/i915/display/intel_ddi.h | 8 -
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> .../drm/i915/display/intel_display_types.h| 3 ++
> 4 files changed, 35 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a1b7075ea6be..9d06a34f5f8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4782,14 +4782,25 @@ intel_ddi_max_lanes(struct intel_digital_port
> *dig_port)
> return max_lanes;
> }
>
> -void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> +bool __pure intel_ddi_has_tc_phy(const struct intel_digital_port *dig_port)
> {
> + return dig_port->port_info->phy_type == PHY_TYPE_TC;
> +}
> +
> +bool __pure intel_ddi_has_combo_phy(const struct intel_digital_port
> *dig_port)
> +{
> + return dig_port->port_info->phy_type == PHY_TYPE_COMBO;
> +}
> +
> +void intel_ddi_init(struct drm_i915_private *dev_priv,
> + const struct intel_ddi_port_info *port_info)
> +{
> + enum port port = port_info->port;
> struct ddi_vbt_port_info *vbt_port_info =
> _priv->vbt.ddi_port_info[port];
> struct intel_digital_port *intel_dig_port;
> struct intel_encoder *encoder;
> bool init_hdmi, init_dp, init_lspcon = false;
> - enum phy phy = intel_port_to_phy(dev_priv, port);
>
> init_hdmi = vbt_port_info->supports_dvi || vbt_port_info->supports_hdmi;
> init_dp = vbt_port_info->supports_dp;
> @@ -4803,12 +4814,12 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
> init_dp = true;
> init_lspcon = true;
> init_hdmi = false;
> - DRM_DEBUG_KMS("VBT says port %c has lspcon\n", port_name(port));
> + DRM_DEBUG_KMS("VBT says port %s has lspcon\n", port_info->name);
> }
>
> if (!init_dp && !init_hdmi) {
> - DRM_DEBUG_KMS("VBT says port %c is not DVI/HDMI/DP compatible,
> respect it\n",
> - port_name(port));
> + DRM_DEBUG_KMS("VBT says %s is not DVI/HDMI/DP compatible,
> respect it\n",
> + port_info->name);
> return;
> }
>
> @@ -4819,7 +4830,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
> enum port port)
> encoder = _dig_port->base;
>
> drm_encoder_init(_priv->drm, >base, _ddi_funcs,
> - DRM_MODE_ENCODER_TMDS, "DDI %c", port_name(port));
> + DRM_MODE_ENCODER_TMDS, port_info->name);
>
> encoder->hotplug = intel_ddi_hotplug;
> encoder->compute_output_type = intel_ddi_compute_output_type;
> @@ -4837,7 +4848,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
> enum port port)
>
> encoder->type = INTEL_OUTPUT_DDI;
> encoder->power_domain = intel_port_to_power_domain(port);
> - encoder->port = port;
> + encoder->port = port_info->port;
In theory, shouldn't we be able to drop encoder->port completely once
we've converted everything over to the proper ddi/phy/vbt namespace?
Overall I like the direction this series is going. The continued use of
'port' terminology, both in the driver and in the hardware specs has
become increasingly confusing as things get chopped up and indexed
differently. I think this will help clarify exactly what a platform is
expecting and force people to think about which namespace is correct for
the part of the hardware they're working with.
Matt
> encoder->cloneable = 0;
> encoder->pipe_mask = ~0;
>
> @@ -4851,8 +4862,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
> enum port port)
> intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
> intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
> intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
> + intel_dig_port->port_info = port_info;
>
> - if (intel_phy_is_tc(dev_priv, phy)) {
> + if (intel_ddi_has_tc_phy(intel_dig_port)) {
> bool is_legacy = !vbt_port_info->supports_typec_usb &&
>!vbt_port_info->supports_tbt;
>
> @@ -4883,15 +4895,15 @@ void intel_ddi_init(struct drm_i915_private
> *dev_priv, enum port port)
> if (init_lspcon) {
> if (lspcon_init(intel_dig_port))
> /* TODO: handle hdmi info frame part */
> - DRM_DEBUG_KMS("LSPCON init success on port %c\n",
> -
Re: [Intel-gfx] [PATCH 7/9] drm/i915/display: add phy, vbt and ddi indexes
On Mon, Dec 23, 2019 at 11:58:48AM -0800, Lucas De Marchi wrote:
> Identify 3 possible cases in which the index numbers can be different
> from the "port" and add them to the description-based ddi initialization
> table. This can be used in place of additional functions mapping from
> on to the other. Right now we already cover part of this by creating kind of
> virtual phy numbering, but that comes with downsides:
>
> a) there's not really a "phy numbering" in the spec, this is purely a
> software thing; hardware uses whatever they want thinking mapping from
> one to the other arbitrarily is easy in software.
>
> b) currently the mapping occurs on "leaf" functions, making the decision
> based on the platform.
>
> With this new table the approach will be: the port as defined by the
> enum port is purely a driver convention and won't be used anymore to
> define the register offset or register bits. For that we have the other
> 3 indexes, identified as being possibly different from the current usage
> of register bits: ddi, vbt and phy. The phy type is also added here,
> meant to replace the checks for combo vs tc (although the helper
> functions can remain so we may differentiate between, e.g. Dekel and MG
> phys).
>
> While at it, also give names to the ports so they can be easily
> identified.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 54 +--
> drivers/gpu/drm/i915/display/intel_display.h | 7 +++
> .../drm/i915/display/intel_display_types.h| 5 ++
> 3 files changed, 39 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index ad85cf75c815..219f180fa395 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16277,14 +16277,14 @@ static bool ddi_is_port_present(struct
> drm_i915_private *i915,
> static const struct intel_output tgl_output = {
> .dsi_init = icl_dsi_init,
> .ddi_ports = {
> - { .port = PORT_A },
> - { .port = PORT_B },
> - { .port = PORT_D },
> - { .port = PORT_E },
> - { .port = PORT_F },
> - { .port = PORT_G },
> - { .port = PORT_H },
> - { .port = PORT_I },
> + { .name = "DDI A", .port = PORT_A, .phy_type =
> PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
> + { .name = "DDI B", .port = PORT_B, .phy_type =
> PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
> + { .name = "DDI TC1", .port = PORT_D, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x3, .phy_idx = 0x0, .vbt_idx = 0x2, },
> + { .name = "DDI TC2", .port = PORT_E, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x4, .phy_idx = 0x1, .vbt_idx = 0x3, },
> + { .name = "DDI TC3", .port = PORT_F, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x5, .phy_idx = 0x2, .vbt_idx = 0x4, },
> + { .name = "DDI TC4", .port = PORT_G, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x6, .phy_idx = 0x3, .vbt_idx = 0x5, },
> + { .name = "DDI TC5", .port = PORT_H, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x7, .phy_idx = 0x4, .vbt_idx = 0x6, },
> + { .name = "DDI TC6", .port = PORT_I, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x8, .phy_idx = 0x5, .vbt_idx = 0x7, },
> { .port = PORT_NONE }
> }
> };
> @@ -16293,12 +16293,12 @@ static const struct intel_output icl_output = {
> .dsi_init = icl_dsi_init,
> .is_port_present = icl_is_port_present,
> .ddi_ports = {
> - { .port = PORT_A },
> - { .port = PORT_B },
> - { .port = PORT_C },
> - { .port = PORT_D },
> - { .port = PORT_E },
> - { .port = PORT_F },
> + { .name = "DDI A", .port = PORT_A, .phy_type =
> PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
> + { .name = "DDI B", .port = PORT_B, .phy_type =
> PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
> + { .name = "DDI TC1", .port = PORT_C, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x2, .phy_idx = 0x0, .vbt_idx = 0x2, },
> + { .name = "DDI TC2", .port = PORT_D, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x3, .phy_idx = 0x1, .vbt_idx = 0x3, },
> + { .name = "DDI TC3", .port = PORT_E, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x4, .phy_idx = 0x2, .vbt_idx = 0x4, },
> + { .name = "DDI TC4", .port = PORT_F, .phy_type = PHY_TYPE_TC,
> .ddi_idx = 0x5, .phy_idx = 0x3, .vbt_idx = 0x5, },
> { .port = PORT_NONE }
> }
> };
> @@ -16306,10 +16306,10 @@ static const struct intel_output icl_output = {
> static const struct intel_output ehl_output = {
> .dsi_init = icl_dsi_init,
> .ddi_ports = {
> - { .port = PORT_A },
> - { .port
[Intel-gfx] [PATCH v4 07/10] drm/i915: prefer 3-letter acronym for ironlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts ironlake to ilk where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_crt.c | 8 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 168 +-
drivers/gpu/drm/i915/display/intel_display.h | 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 34 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
.../drm/i915/display/intel_fifo_underrun.c| 6 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gpu/drm/i915/intel_pm.c | 4 +-
11 files changed, 125 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index b2b1336ecdb6..cbe5978e7fb5 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -247,7 +247,7 @@ static void hsw_post_disable_crt(struct intel_encoder
*encoder,
intel_ddi_disable_transcoder_func(old_crtc_state);
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
intel_ddi_disable_pipe_clock(old_crtc_state);
@@ -351,7 +351,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
if (HAS_PCH_LPT(dev_priv) &&
- (ironlake_get_lanes_required(mode->clock, 27, 24) > 2))
+ ilk_get_lanes_required(mode->clock, 27, 24) > 2)
return MODE_CLOCK_HIGH;
/* HSW/BDW FDI limited to 4k */
@@ -427,7 +427,7 @@ static int hsw_crt_compute_config(struct intel_encoder
*encoder,
return 0;
}
-static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
+static bool ilk_crt_detect_hotplug(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct intel_crt *crt = intel_attached_crt(connector);
@@ -535,7 +535,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector
*connector)
int i, tries = 0;
if (HAS_PCH_SPLIT(dev_priv))
- return intel_ironlake_crt_detect_hotplug(connector);
+ return ilk_crt_detect_hotplug(connector);
if (IS_VALLEYVIEW(dev_priv))
return valleyview_crt_detect_hotplug(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 7e8e20ff008d..23f091e64498 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3916,7 +3916,7 @@ static void intel_ddi_post_disable(struct intel_encoder
*encoder,
if (INTEL_GEN(dev_priv) >= 9)
skl_scaler_disable(old_crtc_state);
else
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
/*
* When called from DP MST code:
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3b18686844b1..61783afe9e08 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -146,8 +146,8 @@ static const u64 cursor_format_modifiers[] = {
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
-static void ironlake_pch_clock_get(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config);
+static void ilk_pch_clock_get(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config);
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
@@ -158,7 +158,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
intel_crtc_state *crtc_sta
const struct intel_link_m_n *m_n,
const struct intel_link_m_n *m2_n2);
static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
static void vlv_prepare_pll(struct intel_crtc *crtc,
@@ -166,7 +166,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
static void chv_prepare_pll(struct intel_crtc
[Intel-gfx] [PATCH v4 10/10] drm/i915: prefer 3-letter acronym for tigerlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts tigerlake to tgl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 95f1bc45953b..eeef90b55c64 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -233,7 +233,7 @@ static const struct drm_i915_mocs_entry
broxton_mocs_table[] = {
LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
L3_1_UC)
-static const struct drm_i915_mocs_entry tigerlake_mocs_table[] = {
+static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
/* Base - Error (Reserved for Non-Use) */
MOCS_ENTRY(0, 0x0, 0x0),
/* Base - Reserved */
@@ -284,8 +284,8 @@ static bool get_mocs_settings(const struct drm_i915_private
*i915,
struct drm_i915_mocs_table *table)
{
if (INTEL_GEN(i915) >= 12) {
- table->size = ARRAY_SIZE(tigerlake_mocs_table);
- table->table = tigerlake_mocs_table;
+ table->size = ARRAY_SIZE(tgl_mocs_table);
+ table->table = tgl_mocs_table;
table->n_entries = GEN11_NUM_MOCS_ENTRIES;
} else if (IS_GEN(i915, 11)) {
table->size = ARRAY_SIZE(icl_mocs_table);
--
2.24.0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 06/10] drm/i915: prefer 3-letter acronym for icelake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts icelake to icl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 11 +--
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 +++---
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 6ab9a2ef170a..3b18686844b1 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10439,9 +10439,8 @@ static void cnl_get_ddi_pll(struct drm_i915_private
*dev_priv, enum port port,
pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
}
-static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv,
- enum port port,
- struct intel_crtc_state *pipe_config)
+static void icl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
+ struct intel_crtc_state *pipe_config)
{
enum phy phy = intel_port_to_phy(dev_priv, port);
enum icl_port_dpll_id port_dpll_id;
@@ -10725,7 +10724,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc
*crtc,
}
if (INTEL_GEN(dev_priv) >= 11)
- icelake_get_ddi_pll(dev_priv, port, pipe_config);
+ icl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_CANNONLAKE(dev_priv))
cnl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_GEN9_BC(dev_priv))
@@ -10776,7 +10775,7 @@ static enum transcoder transcoder_master_readout(struct
drm_i915_private *dev_pr
return master_select - 1;
}
-static void icelake_get_trans_port_sync_config(struct intel_crtc_state
*crtc_state)
+static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
u32 transcoders;
@@ -10932,7 +10931,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
if (INTEL_GEN(dev_priv) >= 11 &&
!transcoder_is_dsi(pipe_config->cpu_transcoder))
- icelake_get_trans_port_sync_config(pipe_config);
+ icl_get_trans_port_sync_config(pipe_config);
out:
for_each_power_domain(power_domain, power_domain_mask)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index cbdeda608359..95f1bc45953b 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -267,7 +267,7 @@ static const struct drm_i915_mocs_entry
tigerlake_mocs_table[] = {
L3_3_WB),
};
-static const struct drm_i915_mocs_entry icelake_mocs_table[] = {
+static const struct drm_i915_mocs_entry icl_mocs_table[] = {
/* Base - Uncached (Deprecated) */
MOCS_ENTRY(I915_MOCS_UNCACHED,
LE_1_UC | LE_TC_1_LLC,
@@ -288,8 +288,8 @@ static bool get_mocs_settings(const struct drm_i915_private
*i915,
table->table = tigerlake_mocs_table;
table->n_entries = GEN11_NUM_MOCS_ENTRIES;
} else if (IS_GEN(i915, 11)) {
- table->size = ARRAY_SIZE(icelake_mocs_table);
- table->table = icelake_mocs_table;
+ table->size = ARRAY_SIZE(icl_mocs_table);
+ table->table = icl_mocs_table;
table->n_entries = GEN11_NUM_MOCS_ENTRIES;
} else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) {
table->size = ARRAY_SIZE(skl_mocs_table);
--
2.24.0
___
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[Intel-gfx] [PATCH v4 02/10] drm/i915: prefer 3-letter acronym for pineview
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts pineview to pnv where appropriate.
v2: Add missing conversions in intel_pm.c (Matt Roper). While at it, fix
missing blank lines between structs that would otherwise trigger
checkpatch errors (Lucas)
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 8 ++--
drivers/gpu/drm/i915/intel_pm.c | 41
2 files changed, 29 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 652b8800d585..930362124808 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -370,7 +370,7 @@ static const struct intel_limit
intel_limits_g4x_dual_channel_lvds = {
},
};
-static const struct intel_limit intel_limits_pineview_sdvo = {
+static const struct intel_limit pnv_limits_sdvo = {
.dot = { .min = 2, .max = 40},
.vco = { .min = 170, .max = 350 },
/* Pineview's Ncounter is a ring counter */
@@ -385,7 +385,7 @@ static const struct intel_limit intel_limits_pineview_sdvo
= {
.p2_slow = 10, .p2_fast = 5 },
};
-static const struct intel_limit intel_limits_pineview_lvds = {
+static const struct intel_limit pnv_limits_lvds = {
.dot = { .min = 2, .max = 40 },
.vco = { .min = 170, .max = 350 },
.n = { .min = 3, .max = 6 },
@@ -8779,9 +8779,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc,
DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n",
refclk);
}
- limit = _limits_pineview_lvds;
+ limit = _limits_lvds;
} else {
- limit = _limits_pineview_sdvo;
+ limit = _limits_sdvo;
}
if (!crtc_state->clock_set &&
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..b55e9d2d2a83 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private
*dev_priv)
}
-static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
+static void pnv_get_mem_freq(struct drm_i915_private *dev_priv)
{
u32 tmp;
@@ -549,34 +549,38 @@ static int i845_get_fifo_size(struct drm_i915_private
*dev_priv,
}
/* Pineview has different values for various configs */
-static const struct intel_watermark_params pineview_display_wm = {
+static const struct intel_watermark_params pnv_display_wm = {
.fifo_size = PINEVIEW_DISPLAY_FIFO,
.max_wm = PINEVIEW_MAX_WM,
.default_wm = PINEVIEW_DFT_WM,
.guard_size = PINEVIEW_GUARD_WM,
.cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
};
-static const struct intel_watermark_params pineview_display_hplloff_wm = {
+
+static const struct intel_watermark_params pnv_display_hplloff_wm = {
.fifo_size = PINEVIEW_DISPLAY_FIFO,
.max_wm = PINEVIEW_MAX_WM,
.default_wm = PINEVIEW_DFT_HPLLOFF_WM,
.guard_size = PINEVIEW_GUARD_WM,
.cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
};
-static const struct intel_watermark_params pineview_cursor_wm = {
+
+static const struct intel_watermark_params pnv_cursor_wm = {
.fifo_size = PINEVIEW_CURSOR_FIFO,
.max_wm = PINEVIEW_CURSOR_MAX_WM,
.default_wm = PINEVIEW_CURSOR_DFT_WM,
.guard_size = PINEVIEW_CURSOR_GUARD_WM,
.cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
};
-static const struct intel_watermark_params pineview_cursor_hplloff_wm = {
+
+static const struct intel_watermark_params pnv_cursor_hplloff_wm = {
.fifo_size = PINEVIEW_CURSOR_FIFO,
.max_wm = PINEVIEW_CURSOR_MAX_WM,
.default_wm = PINEVIEW_CURSOR_DFT_WM,
.guard_size = PINEVIEW_CURSOR_GUARD_WM,
.cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
};
+
static const struct intel_watermark_params i965_cursor_wm_info = {
.fifo_size = I965_CURSOR_FIFO,
.max_wm = I965_CURSOR_MAX_WM,
@@ -584,6 +588,7 @@ static const struct intel_watermark_params
i965_cursor_wm_info = {
.guard_size = 2,
.cacheline_size = I915_FIFO_LINE_SIZE,
};
+
static const struct intel_watermark_params i945_wm_info = {
.fifo_size = I945_FIFO_SIZE,
.max_wm = I915_MAX_WM,
@@ -591,6 +596,7 @@ static const struct intel_watermark_params i945_wm_info = {
.guard_size = 2,
.cacheline_size = I915_FIFO_LINE_SIZE,
};
+
static const struct intel_watermark_params i915_wm_info = {
.fifo_size = I915_FIFO_SIZE,
.max_wm = I915_MAX_WM,
@@ -598,6 +604,7 @@ static const struct intel_watermark_params
[Intel-gfx] [PATCH v4 03/10] drm/i915: prefer 3-letter acronym for haswell
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts haswell to hsw where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 57 ++--
drivers/gpu/drm/i915/intel_device_info.c | 4 +-
3 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3a538789c585..e05ed00af9fc 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3465,14 +3465,14 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder
*encoder,
* (DFLEXDPSP.DPX4TXLATC)
*
* This was done before tgl_ddi_pre_enable_dp by
-* haswell_crtc_enable()->intel_encoders_pre_pll_enable().
+* hsw_crtc_enable()->intel_encoders_pre_pll_enable().
*/
/*
* 4. Enable the port PLL.
*
* The PLL enabling itself was already done before this function by
-* haswell_crtc_enable()->intel_enable_shared_dpll(). We need only
+* hsw_crtc_enable()->intel_enable_shared_dpll(). We need only
* configure the PLL to port mapping here.
*/
intel_ddi_clk_select(encoder, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 930362124808..07bd7289143f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -159,7 +159,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
intel_crtc_state *crtc_sta
const struct intel_link_m_n *m2_n2);
static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
static void vlv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
@@ -6771,8 +6771,8 @@ static void hsw_set_frame_start_delay(const struct
intel_crtc_state *crtc_state)
I915_WRITE(reg, val);
}
-static void haswell_crtc_enable(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static void hsw_crtc_enable(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
@@ -6813,7 +6813,7 @@ static void haswell_crtc_enable(struct intel_atomic_state
*state,
if (!transcoder_is_dsi(cpu_transcoder)) {
hsw_set_frame_start_delay(new_crtc_state);
- haswell_set_pipeconf(new_crtc_state);
+ hsw_set_pipeconf(new_crtc_state);
}
if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
@@ -6951,8 +6951,8 @@ static void ironlake_crtc_disable(struct
intel_atomic_state *state,
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
}
-static void haswell_crtc_disable(struct intel_atomic_state *state,
-struct intel_crtc *crtc)
+static void hsw_crtc_disable(struct intel_atomic_state *state,
+struct intel_crtc *crtc)
{
/*
* FIXME collapse everything to one hook.
@@ -9767,7 +9767,7 @@ static void ironlake_set_pipeconf(const struct
intel_crtc_state *crtc_state)
POSTING_READ(PIPECONF(pipe));
}
-static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state)
+static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -10401,8 +10401,9 @@ static bool ironlake_get_pipe_config(struct intel_crtc
*crtc,
return ret;
}
-static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
- struct intel_crtc_state *crtc_state)
+
+static int hsw_crtc_compute_clock(struct intel_crtc *crtc,
+ struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_atomic_state *state =
@@ -10516,9 +10517,8 @@ static void skylake_get_ddi_pll(struct drm_i915_private
*dev_priv,
pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
}
-static void
[Intel-gfx] [PATCH v4 08/10] drm/i915: prefer 3-letter acronym for broadwell
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts broadwell to bdw where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_workarounds.c| 2 +-
drivers/gpu/drm/i915/gvt/handlers.c| 8
drivers/gpu/drm/i915/i915_debugfs.c| 6 +++---
drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
5 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index d6e0d0be842e..1f80f275f3f2 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -180,8 +180,8 @@ static void ivybridge_set_fifo_underrun_reporting(struct
drm_device *dev,
}
}
-static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev,
- enum pipe pipe, bool enable)
+static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
+ enum pipe pipe, bool enable)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -268,7 +268,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct
drm_device *dev,
else if (IS_GEN(dev_priv, 7))
ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
else if (INTEL_GEN(dev_priv) >= 8)
- broadwell_set_fifo_underrun_reporting(dev, pipe, enable);
+ bdw_set_fifo_underrun_reporting(dev, pipe, enable);
return old;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 195ccf7db272..4e292d4bf7b9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -254,7 +254,7 @@ static void bdw_ctx_workarounds_init(struct intel_engine_cs
*engine,
/* WaDisableDopClockGating:bdw
*
-* Also see the related UCGTCL1 write in broadwell_init_clock_gating()
+* Also see the related UCGTCL1 write in bdw_init_clock_gating()
* to disable EUTC clock gating.
*/
WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index 1043e6d564df..6d28d72e6c7e 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -2691,7 +2691,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
return 0;
}
-static int init_broadwell_mmio_info(struct intel_gvt *gvt)
+static int init_bdw_mmio_info(struct intel_gvt *gvt)
{
struct drm_i915_private *dev_priv = gvt->dev_priv;
int ret;
@@ -3380,20 +3380,20 @@ int intel_gvt_setup_mmio_info(struct intel_gvt *gvt)
goto err;
if (IS_BROADWELL(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
} else if (IS_SKYLAKE(dev_priv)
|| IS_KABYLAKE(dev_priv)
|| IS_COFFEELAKE(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
ret = init_skl_mmio_info(gvt);
if (ret)
goto err;
} else if (IS_BROXTON(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
ret = init_skl_mmio_info(gvt);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0407229251bc..cb34e8c31511 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3815,8 +3815,8 @@ static void gen9_sseu_device_status(struct
drm_i915_private *dev_priv,
#undef SS_MAX
}
-static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
-struct sseu_dev_info *sseu)
+static void bdw_sseu_device_status(struct drm_i915_private *dev_priv,
+ struct sseu_dev_info *sseu)
{
const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO);
@@ -3901,7 +3901,7 @@ static int i915_sseu_status(struct seq_file *m, void
*unused)
if (IS_CHERRYVIEW(dev_priv))
cherryview_sseu_device_status(dev_priv, );
else if (IS_BROADWELL(dev_priv))
-
[Intel-gfx] [PATCH v4 05/10] drm/i915: prefer 3-letter acronym for cannonlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts cannonlake to cnl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 7f3bdb270840..6ab9a2ef170a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10424,9 +10424,8 @@ static int hsw_crtc_compute_clock(struct intel_crtc
*crtc,
return 0;
}
-static void cannonlake_get_ddi_pll(struct drm_i915_private *dev_priv,
- enum port port,
- struct intel_crtc_state *pipe_config)
+static void cnl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
+ struct intel_crtc_state *pipe_config)
{
enum intel_dpll_id id;
u32 temp;
@@ -10728,7 +10727,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc
*crtc,
if (INTEL_GEN(dev_priv) >= 11)
icelake_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_CANNONLAKE(dev_priv))
- cannonlake_get_ddi_pll(dev_priv, port, pipe_config);
+ cnl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_GEN9_BC(dev_priv))
skl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_GEN9_LP(dev_priv))
--
2.24.0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 09/10] drm/i915: prefer 3-letter acronym for ivybridge
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts ivybridge to ivb where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 12 ++--
drivers/gpu/drm/i915/i915_irq.c| 6 +++---
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 61783afe9e08..b9d2d88b85c0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5541,7 +5541,7 @@ static void cpt_set_fdi_bc_bifurcation(struct
drm_i915_private *dev_priv, bool e
POSTING_READ(SOUTH_CHICKEN1);
}
-static void ivybridge_update_fdi_bc_bifurcation(const struct intel_crtc_state
*crtc_state)
+static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state
*crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -5614,7 +5614,7 @@ static void ilk_pch_enable(const struct
intel_atomic_state *state,
assert_pch_transcoder_disabled(dev_priv, pipe);
if (IS_IVYBRIDGE(dev_priv))
- ivybridge_update_fdi_bc_bifurcation(crtc_state);
+ ivb_update_fdi_bc_bifurcation(crtc_state);
/* Write the TU size bits before fdi link training, so that error
* detection works. */
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 1f80f275f3f2..6c83b350525d 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -139,7 +139,7 @@ static void ilk_set_fifo_underrun_reporting(struct
drm_device *dev,
ilk_disable_display_irq(dev_priv, bit);
}
-static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)
+static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
@@ -157,9 +157,9 @@ static void ivybridge_check_fifo_underruns(struct
intel_crtc *crtc)
DRM_ERROR("fifo underrun on pipe %c\n", pipe_name(pipe));
}
-static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
- enum pipe pipe,
- bool enable, bool old)
+static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
+ enum pipe pipe, bool enable,
+ bool old)
{
struct drm_i915_private *dev_priv = to_i915(dev);
if (enable) {
@@ -266,7 +266,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct
drm_device *dev,
else if (IS_GEN_RANGE(dev_priv, 5, 6))
ilk_set_fifo_underrun_reporting(dev, pipe, enable);
else if (IS_GEN(dev_priv, 7))
- ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
+ ivb_set_fifo_underrun_reporting(dev, pipe, enable, old);
else if (INTEL_GEN(dev_priv) >= 8)
bdw_set_fifo_underrun_reporting(dev, pipe, enable);
@@ -427,7 +427,7 @@ void intel_check_cpu_fifo_underruns(struct drm_i915_private
*dev_priv)
if (HAS_GMCH(dev_priv))
i9xx_check_fifo_underruns(crtc);
else if (IS_GEN(dev_priv, 7))
- ivybridge_check_fifo_underruns(crtc);
+ ivb_check_fifo_underruns(crtc);
}
spin_unlock_irq(_priv->irq_lock);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2d6324d2922a..afc6aad9bf8c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -893,7 +893,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
}
/**
- * ivybridge_parity_work - Workqueue called when a parity error interrupt
+ * ivb_parity_work - Workqueue called when a parity error interrupt
* occurred.
* @work: workqueue struct
*
@@ -901,7 +901,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
* this event, userspace should try to remap the bad rows since statistically
* it is likely the same row is more likely to go bad again.
*/
-static void ivybridge_parity_work(struct work_struct *work)
+static void ivb_parity_work(struct work_struct *work)
{
struct drm_i915_private *dev_priv =
container_of(work, typeof(*dev_priv), l3_parity.error_work);
@@ -3899,7 +3899,7 @@ void intel_irq_init(struct drm_i915_private
[Intel-gfx] [PATCH v4 00/10]
v4 of https://patchwork.freedesktop.org/series/71224/ Changes from v2: - Also remove gen from device_info on first patch - Rebase - Collect a-b for the entire series Changes from v3: - Collect r-b and add missing conversions for pineview Lucas De Marchi (10): drm/i915: simplify prefixes on device_info drm/i915: prefer 3-letter acronym for pineview drm/i915: prefer 3-letter acronym for haswell drm/i915: prefer 3-letter acronym for skylake drm/i915: prefer 3-letter acronym for cannonlake drm/i915: prefer 3-letter acronym for icelake drm/i915: prefer 3-letter acronym for ironlake drm/i915: prefer 3-letter acronym for broadwell drm/i915: prefer 3-letter acronym for ivybridge drm/i915: prefer 3-letter acronym for tigerlake drivers/gpu/drm/i915/display/icl_dsi.c| 2 +- drivers/gpu/drm/i915/display/intel_crt.c | 8 +- drivers/gpu/drm/i915/display/intel_ddi.c | 8 +- drivers/gpu/drm/i915/display/intel_display.c | 284 +- drivers/gpu/drm/i915/display/intel_display.h | 6 +- drivers/gpu/drm/i915/display/intel_dp.c | 34 +-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 +- .../drm/i915/display/intel_fifo_underrun.c| 24 +- drivers/gpu/drm/i915/display/vlv_dsi.c| 2 +- drivers/gpu/drm/i915/gt/intel_mocs.c | 18 +- drivers/gpu/drm/i915/gt/intel_reset.c | 7 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- drivers/gpu/drm/i915/gvt/handlers.c | 8 +- drivers/gpu/drm/i915/i915_debugfs.c | 10 +- drivers/gpu/drm/i915/i915_irq.c | 18 +- drivers/gpu/drm/i915/i915_pci.c | 230 +++--- drivers/gpu/drm/i915/intel_device_info.c | 8 +- drivers/gpu/drm/i915/intel_pm.c | 45 +-- 18 files changed, 361 insertions(+), 357 deletions(-) -- 2.24.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4 04/10] drm/i915: prefer 3-letter acronym for skylake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts skylake to skl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 29 ++--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++--
7 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 006b1a297e6f..8435bc5a7a74 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1259,7 +1259,7 @@ static void gen11_dsi_post_disable(struct intel_encoder
*encoder,
intel_dsc_disable(old_crtc_state);
- skylake_scaler_disable(old_crtc_state);
+ skl_scaler_disable(old_crtc_state);
}
static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector
*connector,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index e05ed00af9fc..7e8e20ff008d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3914,7 +3914,7 @@ static void intel_ddi_post_disable(struct intel_encoder
*encoder,
intel_dsc_disable(old_crtc_state);
if (INTEL_GEN(dev_priv) >= 9)
- skylake_scaler_disable(old_crtc_state);
+ skl_scaler_disable(old_crtc_state);
else
ironlake_pfit_disable(old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 07bd7289143f..7f3bdb270840 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -165,7 +165,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
static void chv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state);
static void intel_modeset_setup_hw_state(struct drm_device *dev,
struct drm_modeset_acquire_ctx *ctx);
@@ -6002,7 +6002,7 @@ static int skl_update_scaler_plane(struct
intel_crtc_state *crtc_state,
return 0;
}
-void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state)
+void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
int i;
@@ -6011,7 +6011,7 @@ void skylake_scaler_disable(const struct intel_crtc_state
*old_crtc_state)
skl_detach_scaler(crtc, i);
}
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -6828,7 +6828,7 @@ static void hsw_crtc_enable(struct intel_atomic_state
*state,
glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
if (INTEL_GEN(dev_priv) >= 9)
- skylake_pfit_enable(new_crtc_state);
+ skl_pfit_enable(new_crtc_state);
else
ironlake_pfit_enable(new_crtc_state);
@@ -10100,8 +10100,8 @@ static void ironlake_get_fdi_m_n_config(struct
intel_crtc *crtc,
_config->fdi_m_n, NULL);
}
-static void skylake_get_pfit_config(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void skl_get_pfit_config(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -10132,8 +10132,8 @@ static void skylake_get_pfit_config(struct intel_crtc
*crtc,
}
static void
-skylake_get_initial_plane_config(struct intel_crtc *crtc,
-struct intel_initial_plane_config
*plane_config)
+skl_get_initial_plane_config(struct intel_crtc *crtc,
+struct intel_initial_plane_config *plane_config)
{
struct drm_device *dev = crtc->base.dev;
struct
[Intel-gfx] [PATCH v4 01/10] drm/i915: simplify prefixes on device_info
Drop the intel prefix since all these structs are static and prefer
using the 3-letter prefix for each platform.
v2: also remove gen from the device info (Ville)
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
---
drivers/gpu/drm/i915/i915_pci.c | 230
1 file changed, 115 insertions(+), 115 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9571611b4b16..83f01401b8b5 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -193,23 +193,23 @@
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
-static const struct intel_device_info intel_i830_info = {
+static const struct intel_device_info i830_info = {
I830_FEATURES,
PLATFORM(INTEL_I830),
};
-static const struct intel_device_info intel_i845g_info = {
+static const struct intel_device_info i845g_info = {
I845_FEATURES,
PLATFORM(INTEL_I845G),
};
-static const struct intel_device_info intel_i85x_info = {
+static const struct intel_device_info i85x_info = {
I830_FEATURES,
PLATFORM(INTEL_I85X),
.display.has_fbc = 1,
};
-static const struct intel_device_info intel_i865g_info = {
+static const struct intel_device_info i865g_info = {
I845_FEATURES,
PLATFORM(INTEL_I865G),
};
@@ -228,7 +228,7 @@ static const struct intel_device_info intel_i865g_info = {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
-static const struct intel_device_info intel_i915g_info = {
+static const struct intel_device_info i915g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I915G),
.has_coherent_ggtt = false,
@@ -239,7 +239,7 @@ static const struct intel_device_info intel_i915g_info = {
.unfenced_needs_alignment = 1,
};
-static const struct intel_device_info intel_i915gm_info = {
+static const struct intel_device_info i915gm_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I915GM),
.is_mobile = 1,
@@ -252,7 +252,7 @@ static const struct intel_device_info intel_i915gm_info = {
.unfenced_needs_alignment = 1,
};
-static const struct intel_device_info intel_i945g_info = {
+static const struct intel_device_info i945g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I945G),
.display.has_hotplug = 1,
@@ -263,7 +263,7 @@ static const struct intel_device_info intel_i945g_info = {
.unfenced_needs_alignment = 1,
};
-static const struct intel_device_info intel_i945gm_info = {
+static const struct intel_device_info i945gm_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I945GM),
.is_mobile = 1,
@@ -277,21 +277,21 @@ static const struct intel_device_info intel_i945gm_info =
{
.unfenced_needs_alignment = 1,
};
-static const struct intel_device_info intel_g33_info = {
+static const struct intel_device_info g33_info = {
GEN3_FEATURES,
PLATFORM(INTEL_G33),
.display.has_hotplug = 1,
.display.has_overlay = 1,
};
-static const struct intel_device_info intel_pineview_g_info = {
+static const struct intel_device_info pnv_g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_PINEVIEW),
.display.has_hotplug = 1,
.display.has_overlay = 1,
};
-static const struct intel_device_info intel_pineview_m_info = {
+static const struct intel_device_info pnv_m_info = {
GEN3_FEATURES,
PLATFORM(INTEL_PINEVIEW),
.is_mobile = 1,
@@ -314,7 +314,7 @@ static const struct intel_device_info intel_pineview_m_info
= {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
-static const struct intel_device_info intel_i965g_info = {
+static const struct intel_device_info i965g_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965G),
.display.has_overlay = 1,
@@ -322,7 +322,7 @@ static const struct intel_device_info intel_i965g_info = {
.has_snoop = false,
};
-static const struct intel_device_info intel_i965gm_info = {
+static const struct intel_device_info i965gm_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965GM),
.is_mobile = 1,
@@ -333,14 +333,14 @@ static const struct intel_device_info intel_i965gm_info =
{
.has_snoop = false,
};
-static const struct intel_device_info intel_g45_info = {
+static const struct intel_device_info g45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_G45),
.engine_mask = BIT(RCS0) | BIT(VCS0),
.gpu_reset_clobbers_display = false,
};
-static const struct intel_device_info intel_gm45_info = {
+static const struct intel_device_info gm45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_GM45),
.is_mobile = 1,
@@ -365,12 +365,12 @@ static const struct intel_device_info intel_gm45_info = {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
-static const struct intel_device_info intel_ironlake_d_info = {
+static const struct intel_device_info
Re: [Intel-gfx] [PATCH 5/9] drm/i915/display: move icl to description-based ddi init
On Mon, Dec 23, 2019 at 11:58:46AM -0800, Lucas De Marchi wrote:
> By adding a hook that determines if a port is present, we are able to
> support Ice Lake in the new description-based DDI initialization.
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 61 ++--
> 1 file changed, 42 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b3fb1e03cb0b..6b4d320ff92c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16224,9 +16224,28 @@ static void intel_pps_init(struct drm_i915_private
> *dev_priv)
> struct intel_output {
> /* Initialize DSI if present */
> void (*dsi_init)(struct drm_i915_private *i915);
> +
> + /*
> + * Check if port is present before trying to initialize; if not provided
> + * it's assumed the port is present (or we can't check and fail
> + * gracefully
> + */
> + bool (*is_port_present)(struct drm_i915_private *i915,
> + const struct intel_ddi_port_info *port_info);
> +
> struct intel_ddi_port_info ddi_ports[];
> };
>
> +static bool icl_is_port_present(struct drm_i915_private *i915,
> + const struct intel_ddi_port_info *port_info)
> +{
> + if (port_info->port != PORT_F)
> + return true;
> +
> + return IS_ICL_WITH_PORT_F(i915) &&
> + intel_bios_is_port_present(i915, PORT_F);
> +}
> +
> static const struct intel_output tgl_output = {
> .dsi_init = icl_dsi_init,
> .ddi_ports = {
> @@ -16242,6 +16261,20 @@ static const struct intel_output tgl_output = {
> }
> };
>
> +static const struct intel_output icl_output = {
> + .dsi_init = icl_dsi_init,
> + .is_port_present = icl_is_port_present,
> + .ddi_ports = {
> + { .port = PORT_A },
> + { .port = PORT_B },
> + { .port = PORT_C },
> + { .port = PORT_D },
> + { .port = PORT_E },
> + { .port = PORT_F },
> + { .port = PORT_NONE }
> + }
As we add more platforms, I could see there being multiple reasons to
disqualify outputs that we mix and match across platforms (e.g.,
dedicated fuse + hw workaround + some new platform thing). Maybe rather
than adding a per-platform detection funtion pointer at the top level,
we could add a detect_flags variable to .ddi_ports that indicates which
style(s) of detection should be applied? Only if we satisfy the test
associated with each flag would the output get initialized.
But I might be overthinking this. Up to you.
Matt
> +};
> +
> static const struct intel_output ehl_output = {
> .dsi_init = icl_dsi_init,
> .ddi_ports = {
> @@ -16276,12 +16309,19 @@ static void setup_ddi_outputs_desc(struct
> drm_i915_private *i915)
> output = _output;
> else if (IS_ELKHARTLAKE(i915))
> output = _output;
> + else if (IS_GEN(i915, 11))
> + output = _output;
> else if (IS_GEN9_LP(i915))
> output = _output;
>
> for (port_info = output->ddi_ports;
> - port_info->port != PORT_NONE; port_info++)
> + port_info->port != PORT_NONE; port_info++) {
> + if (output->is_port_present &&
> + !output->is_port_present(i915, port_info))
> + continue;
> +
> intel_ddi_init(i915, port_info->port);
> + }
>
> if (output->dsi_init)
> output->dsi_init(i915);
> @@ -16297,25 +16337,8 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
> return;
>
> - if (INTEL_GEN(dev_priv) >= 12 || IS_ELKHARTLAKE(dev_priv) ||
> - IS_GEN9_LP(dev_priv)) {
> + if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
> setup_ddi_outputs_desc(dev_priv);
> - } else if (IS_GEN(dev_priv, 11)) {
> - intel_ddi_init(dev_priv, PORT_A);
> - intel_ddi_init(dev_priv, PORT_B);
> - intel_ddi_init(dev_priv, PORT_C);
> - intel_ddi_init(dev_priv, PORT_D);
> - intel_ddi_init(dev_priv, PORT_E);
> - /*
> - * On some ICL SKUs port F is not present. No strap bits for
> - * this, so rely on VBT.
> - * Work around broken VBTs on SKUs known to have no port F.
> - */
> - if (IS_ICL_WITH_PORT_F(dev_priv) &&
> - intel_bios_is_port_present(dev_priv, PORT_F))
> - intel_ddi_init(dev_priv, PORT_F);
> -
> - icl_dsi_init(dev_priv);
> } else if (HAS_DDI(dev_priv)) {
> int found;
>
> --
> 2.24.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: nuke skl workaround for pre-production hw (rev2)
== Series Details ==
Series: drm/i915/display: nuke skl workaround for pre-production hw (rev2)
URL : https://patchwork.freedesktop.org/series/71230/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15906
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/index.html
Known issues
Here are the changes found in Patchwork_15906 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#505] / [i915#671])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][3] ([fdo#111736]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][5] ([i915#656]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][7] -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][9] ([i915#725]) -> [DMESG-FAIL][10]
([i915#553] / [i915#725])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-pipe-b:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][12] ([i915#62] / [i915#92]) +6 similar issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) ->
[DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +6 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (43 -> 38)
--
Additional (6): fi-hsw-4770r fi-skl-6770hq fi-glk-dsi fi-whl-u fi-ivb-3770
fi-bsw-nick
Missing(11): fi-ilk-m540 fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-tgl-y
fi-ctg-p8600 fi-blb-e6850 fi-byt-n2820 fi-byt-clapper fi-bdw-samus fi-kbl-r
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7630 -> Patchwork_15906
CI-20190529: 20190529
CI_DRM_7630: 28a2aa0ebf1520ea8a0dd89299f7ceea80dfd96f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15906: 4e4667cba36744fe229627ebd76b0d3298a79b33 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4e4667cba367 drm/i915/display: nuke skl workaround for pre-production hw
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15906/index.html
Re: [Intel-gfx] [PATCH v3 07/10] drm/i915: prefer 3-letter acronym for ironlake
On Mon, Dec 23, 2019 at 03:22:55PM -0800, Lucas De Marchi wrote:
> On Mon, Dec 23, 2019 at 03:13:30PM -0800, Matt Roper wrote:
> > On Mon, Dec 23, 2019 at 09:32:41AM -0800, Lucas De Marchi wrote:
> > > We are currently using a mix of platform name and acronym to name the
> > > functions. Let's prefer the acronym as it should be clear what platform
> > > it's about and it's shorter, so it doesn't go over 80 columns in a few
> > > cases. This converts ironlake to ilk where appropriate.
> >
> > DP_SCRAMBLING_DISABLE_IRONLAKE could be shortened, but afaics it's never
> > used anywhere so you might as well just remove it.
> >
> > It can also be removed from the gma500 driver too. :-)
>
> yeah... it followed on the "I'm not converting constants" case. I will
> review how many constants like those we have and decide on next
> iteration.
>
> thanks
> Lucas De Marchi
>
Okay, you can consider this patch
Reviewed-by: Matt Roper
too.
> >
> >
> > Matt
> >
> > >
> > > Signed-off-by: Lucas De Marchi
> > > Acked-by: Jani Nikula
> > > Acked-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/i915/display/intel_crt.c | 8 +-
> > > drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> > > drivers/gpu/drm/i915/display/intel_display.c | 168 +-
> > > drivers/gpu/drm/i915/display/intel_display.h | 4 +-
> > > drivers/gpu/drm/i915/display/intel_dp.c | 34 ++--
> > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> > > .../drm/i915/display/intel_fifo_underrun.c| 6 +-
> > > drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
> > > drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> > > drivers/gpu/drm/i915/i915_irq.c | 12 +-
> > > drivers/gpu/drm/i915/intel_pm.c | 4 +-
> > > 11 files changed, 125 insertions(+), 126 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> > > b/drivers/gpu/drm/i915/display/intel_crt.c
> > > index b2b1336ecdb6..cbe5978e7fb5 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_crt.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> > > @@ -247,7 +247,7 @@ static void hsw_post_disable_crt(struct intel_encoder
> > > *encoder,
> > >
> > > intel_ddi_disable_transcoder_func(old_crtc_state);
> > >
> > > - ironlake_pfit_disable(old_crtc_state);
> > > + ilk_pfit_disable(old_crtc_state);
> > >
> > > intel_ddi_disable_pipe_clock(old_crtc_state);
> > >
> > > @@ -351,7 +351,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
> > >
> > > /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
> > > if (HAS_PCH_LPT(dev_priv) &&
> > > - (ironlake_get_lanes_required(mode->clock, 27, 24) > 2))
> > > + ilk_get_lanes_required(mode->clock, 27, 24) > 2)
> > > return MODE_CLOCK_HIGH;
> > >
> > > /* HSW/BDW FDI limited to 4k */
> > > @@ -427,7 +427,7 @@ static int hsw_crt_compute_config(struct
> > > intel_encoder *encoder,
> > > return 0;
> > > }
> > >
> > > -static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
> > > *connector)
> > > +static bool ilk_crt_detect_hotplug(struct drm_connector *connector)
> > > {
> > > struct drm_device *dev = connector->dev;
> > > struct intel_crt *crt = intel_attached_crt(connector);
> > > @@ -535,7 +535,7 @@ static bool intel_crt_detect_hotplug(struct
> > > drm_connector *connector)
> > > int i, tries = 0;
> > >
> > > if (HAS_PCH_SPLIT(dev_priv))
> > > - return intel_ironlake_crt_detect_hotplug(connector);
> > > + return ilk_crt_detect_hotplug(connector);
> > >
> > > if (IS_VALLEYVIEW(dev_priv))
> > > return valleyview_crt_detect_hotplug(connector);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index b52c31721755..62fa73815d8a 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -3898,7 +3898,7 @@ static void intel_ddi_post_disable(struct
> > > intel_encoder *encoder,
> > > if (INTEL_GEN(dev_priv) >= 9)
> > > skl_scaler_disable(old_crtc_state);
> > > else
> > > - ironlake_pfit_disable(old_crtc_state);
> > > + ilk_pfit_disable(old_crtc_state);
> > >
> > > /*
> > >* When called from DP MST code:
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 461691cc2f62..5093fd08f381 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -145,8 +145,8 @@ static const u64 cursor_format_modifiers[] = {
> > >
> > > static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
> > > struct intel_crtc_state *pipe_config);
> > > -static void ironlake_pch_clock_get(struct intel_crtc *crtc,
> > > -struct intel_crtc_state *pipe_config);
> > > +static void
Re: [Intel-gfx] [PATCH v3 07/10] drm/i915: prefer 3-letter acronym for ironlake
On Mon, Dec 23, 2019 at 03:13:30PM -0800, Matt Roper wrote:
On Mon, Dec 23, 2019 at 09:32:41AM -0800, Lucas De Marchi wrote:
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts ironlake to ilk where appropriate.
DP_SCRAMBLING_DISABLE_IRONLAKE could be shortened, but afaics it's never
used anywhere so you might as well just remove it.
It can also be removed from the gma500 driver too. :-)
yeah... it followed on the "I'm not converting constants" case. I will
review how many constants like those we have and decide on next
iteration.
thanks
Lucas De Marchi
Matt
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 8 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 168 +-
drivers/gpu/drm/i915/display/intel_display.h | 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 34 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
.../drm/i915/display/intel_fifo_underrun.c| 6 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gpu/drm/i915/intel_pm.c | 4 +-
11 files changed, 125 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index b2b1336ecdb6..cbe5978e7fb5 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -247,7 +247,7 @@ static void hsw_post_disable_crt(struct intel_encoder
*encoder,
intel_ddi_disable_transcoder_func(old_crtc_state);
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
intel_ddi_disable_pipe_clock(old_crtc_state);
@@ -351,7 +351,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
if (HAS_PCH_LPT(dev_priv) &&
- (ironlake_get_lanes_required(mode->clock, 27, 24) > 2))
+ ilk_get_lanes_required(mode->clock, 27, 24) > 2)
return MODE_CLOCK_HIGH;
/* HSW/BDW FDI limited to 4k */
@@ -427,7 +427,7 @@ static int hsw_crt_compute_config(struct intel_encoder
*encoder,
return 0;
}
-static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
+static bool ilk_crt_detect_hotplug(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct intel_crt *crt = intel_attached_crt(connector);
@@ -535,7 +535,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector
*connector)
int i, tries = 0;
if (HAS_PCH_SPLIT(dev_priv))
- return intel_ironlake_crt_detect_hotplug(connector);
+ return ilk_crt_detect_hotplug(connector);
if (IS_VALLEYVIEW(dev_priv))
return valleyview_crt_detect_hotplug(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index b52c31721755..62fa73815d8a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3898,7 +3898,7 @@ static void intel_ddi_post_disable(struct intel_encoder
*encoder,
if (INTEL_GEN(dev_priv) >= 9)
skl_scaler_disable(old_crtc_state);
else
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
/*
* When called from DP MST code:
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 461691cc2f62..5093fd08f381 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -145,8 +145,8 @@ static const u64 cursor_format_modifiers[] = {
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
-static void ironlake_pch_clock_get(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config);
+static void ilk_pch_clock_get(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config);
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
@@ -157,7 +157,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
intel_crtc_state *crtc_sta
const struct intel_link_m_n *m_n,
const struct intel_link_m_n *m2_n2);
static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void
Re: [Intel-gfx] [PATCH v3 02/10] drm/i915: prefer 3-letter acronym for pineview
On Mon, Dec 23, 2019 at 03:20:57PM -0800, Lucas De Marchi wrote:
> On Mon, Dec 23, 2019 at 02:58:31PM -0800, Matt Roper wrote:
> > On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote:
> > > We are currently using a mix of platform name and acronym to name the
> > > functions. Let's prefer the acronym as it should be clear what platform
> > > it's about and it's shorter, so it doesn't go over 80 columns in a few
> > > cases. This converts pineview to pnv where appropriate.
> >
> > Do you also want to convert watermark stuff in intel_pm.c like
> > pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.?
>
> pineview_display_wm, yes. I missed that.
>
> I tried to avoid the constants and IS_ macros as it would make
> it too ugly to review. Those can be done on top.
Okay. There's also:
pineview_display_hplloff_wm
pineview_cursor_wm
pineview_cursor_hplloff_wm
pineview_update_wm
too.
Matt
>
> Thanks
> Lucas De Marchi
>
> >
> >
> > Matt
> >
> > >
> > > Signed-off-by: Lucas De Marchi
> > > Acked-by: Jani Nikula
> > > Acked-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 8
> > > drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> > > 2 files changed, 6 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 1860da0a493e..5d43024f35aa 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -369,7 +369,7 @@ static const struct intel_limit
> > > intel_limits_g4x_dual_channel_lvds = {
> > > },
> > > };
> > >
> > > -static const struct intel_limit intel_limits_pineview_sdvo = {
> > > +static const struct intel_limit pnv_limits_sdvo = {
> > > .dot = { .min = 2, .max = 40},
> > > .vco = { .min = 170, .max = 350 },
> > > /* Pineview's Ncounter is a ring counter */
> > > @@ -384,7 +384,7 @@ static const struct intel_limit
> > > intel_limits_pineview_sdvo = {
> > > .p2_slow = 10, .p2_fast = 5 },
> > > };
> > >
> > > -static const struct intel_limit intel_limits_pineview_lvds = {
> > > +static const struct intel_limit pnv_limits_lvds = {
> > > .dot = { .min = 2, .max = 40 },
> > > .vco = { .min = 170, .max = 350 },
> > > .n = { .min = 3, .max = 6 },
> > > @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc
> > > *crtc,
> > > DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n",
> > > refclk);
> > > }
> > >
> > > - limit = _limits_pineview_lvds;
> > > + limit = _limits_lvds;
> > > } else {
> > > - limit = _limits_pineview_sdvo;
> > > + limit = _limits_sdvo;
> > > }
> > >
> > > if (!crtc_state->clock_set &&
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > > b/drivers/gpu/drm/i915/intel_pm.c
> > > index 31ec82337e4f..eab3b029e98a 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct
> > > drm_i915_private *dev_priv)
> > >
> > > }
> > >
> > > -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
> > > +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv)
> > > {
> > > u32 tmp;
> > >
> > > @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private
> > > *dev_priv)
> > > {
> > > /* For cxsr */
> > > if (IS_PINEVIEW(dev_priv))
> > > - i915_pineview_get_mem_freq(dev_priv);
> > > + pnv_get_mem_freq(dev_priv);
> > > else if (IS_GEN(dev_priv, 5))
> > > i915_ironlake_get_mem_freq(dev_priv);
> > >
> > > --
> > > 2.24.0
> > >
> > > ___
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> >
> > --
> > Matt Roper
> > Graphics Software Engineer
> > VTT-OSGC Platform Enablement
> > Intel Corporation
> > (916) 356-2795
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 02/10] drm/i915: prefer 3-letter acronym for pineview
On Mon, Dec 23, 2019 at 02:58:31PM -0800, Matt Roper wrote:
On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote:
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts pineview to pnv where appropriate.
Do you also want to convert watermark stuff in intel_pm.c like
pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.?
pineview_display_wm, yes. I missed that.
I tried to avoid the constants and IS_ macros as it would make
it too ugly to review. Those can be done on top.
Thanks
Lucas De Marchi
Matt
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 8
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 1860da0a493e..5d43024f35aa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -369,7 +369,7 @@ static const struct intel_limit
intel_limits_g4x_dual_channel_lvds = {
},
};
-static const struct intel_limit intel_limits_pineview_sdvo = {
+static const struct intel_limit pnv_limits_sdvo = {
.dot = { .min = 2, .max = 40},
.vco = { .min = 170, .max = 350 },
/* Pineview's Ncounter is a ring counter */
@@ -384,7 +384,7 @@ static const struct intel_limit intel_limits_pineview_sdvo
= {
.p2_slow = 10, .p2_fast = 5 },
};
-static const struct intel_limit intel_limits_pineview_lvds = {
+static const struct intel_limit pnv_limits_lvds = {
.dot = { .min = 2, .max = 40 },
.vco = { .min = 170, .max = 350 },
.n = { .min = 3, .max = 6 },
@@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc,
DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n",
refclk);
}
- limit = _limits_pineview_lvds;
+ limit = _limits_lvds;
} else {
- limit = _limits_pineview_sdvo;
+ limit = _limits_sdvo;
}
if (!crtc_state->clock_set &&
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 31ec82337e4f..eab3b029e98a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private
*dev_priv)
}
-static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
+static void pnv_get_mem_freq(struct drm_i915_private *dev_priv)
{
u32 tmp;
@@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
{
/* For cxsr */
if (IS_PINEVIEW(dev_priv))
- i915_pineview_get_mem_freq(dev_priv);
+ pnv_get_mem_freq(dev_priv);
else if (IS_GEN(dev_priv, 5))
i915_ironlake_get_mem_freq(dev_priv);
--
2.24.0
___
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--
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Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
___
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Re: [Intel-gfx] [PATCH v3 10/10] drm/i915: prefer 3-letter acronym for tigerlake
On Mon, Dec 23, 2019 at 09:32:44AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts tigerlake to tgl where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/gt/intel_mocs.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
> b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index 95f1bc45953b..eeef90b55c64 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -233,7 +233,7 @@ static const struct drm_i915_mocs_entry
> broxton_mocs_table[] = {
> LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
> L3_1_UC)
>
> -static const struct drm_i915_mocs_entry tigerlake_mocs_table[] = {
> +static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
> /* Base - Error (Reserved for Non-Use) */
> MOCS_ENTRY(0, 0x0, 0x0),
> /* Base - Reserved */
> @@ -284,8 +284,8 @@ static bool get_mocs_settings(const struct
> drm_i915_private *i915,
> struct drm_i915_mocs_table *table)
> {
> if (INTEL_GEN(i915) >= 12) {
> - table->size = ARRAY_SIZE(tigerlake_mocs_table);
> - table->table = tigerlake_mocs_table;
> + table->size = ARRAY_SIZE(tgl_mocs_table);
> + table->table = tgl_mocs_table;
> table->n_entries = GEN11_NUM_MOCS_ENTRIES;
> } else if (IS_GEN(i915, 11)) {
> table->size = ARRAY_SIZE(icl_mocs_table);
> --
> 2.24.0
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
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Intel Corporation
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Re: [Intel-gfx] [PATCH v3 09/10] drm/i915: prefer 3-letter acronym for ivybridge
On Mon, Dec 23, 2019 at 09:32:43AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts ivybridge to ivb where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 12 ++--
> drivers/gpu/drm/i915/i915_irq.c| 6 +++---
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5093fd08f381..faf6d2527a50 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5540,7 +5540,7 @@ static void cpt_set_fdi_bc_bifurcation(struct
> drm_i915_private *dev_priv, bool e
> POSTING_READ(SOUTH_CHICKEN1);
> }
>
> -static void ivybridge_update_fdi_bc_bifurcation(const struct
> intel_crtc_state *crtc_state)
> +static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state
> *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -5613,7 +5613,7 @@ static void ilk_pch_enable(const struct
> intel_atomic_state *state,
> assert_pch_transcoder_disabled(dev_priv, pipe);
>
> if (IS_IVYBRIDGE(dev_priv))
> - ivybridge_update_fdi_bc_bifurcation(crtc_state);
> + ivb_update_fdi_bc_bifurcation(crtc_state);
>
> /* Write the TU size bits before fdi link training, so that error
>* detection works. */
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index 1f80f275f3f2..6c83b350525d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -139,7 +139,7 @@ static void ilk_set_fifo_underrun_reporting(struct
> drm_device *dev,
> ilk_disable_display_irq(dev_priv, bit);
> }
>
> -static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)
> +static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
> @@ -157,9 +157,9 @@ static void ivybridge_check_fifo_underruns(struct
> intel_crtc *crtc)
> DRM_ERROR("fifo underrun on pipe %c\n", pipe_name(pipe));
> }
>
> -static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
> - enum pipe pipe,
> - bool enable, bool old)
> +static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
> + enum pipe pipe, bool enable,
> + bool old)
> {
> struct drm_i915_private *dev_priv = to_i915(dev);
> if (enable) {
> @@ -266,7 +266,7 @@ static bool
> __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
> else if (IS_GEN_RANGE(dev_priv, 5, 6))
> ilk_set_fifo_underrun_reporting(dev, pipe, enable);
> else if (IS_GEN(dev_priv, 7))
> - ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
> + ivb_set_fifo_underrun_reporting(dev, pipe, enable, old);
> else if (INTEL_GEN(dev_priv) >= 8)
> bdw_set_fifo_underrun_reporting(dev, pipe, enable);
>
> @@ -427,7 +427,7 @@ void intel_check_cpu_fifo_underruns(struct
> drm_i915_private *dev_priv)
> if (HAS_GMCH(dev_priv))
> i9xx_check_fifo_underruns(crtc);
> else if (IS_GEN(dev_priv, 7))
> - ivybridge_check_fifo_underruns(crtc);
> + ivb_check_fifo_underruns(crtc);
> }
>
> spin_unlock_irq(_priv->irq_lock);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2d6324d2922a..afc6aad9bf8c 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -893,7 +893,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
> }
>
> /**
> - * ivybridge_parity_work - Workqueue called when a parity error interrupt
> + * ivb_parity_work - Workqueue called when a parity error interrupt
> * occurred.
> * @work: workqueue struct
> *
> @@ -901,7 +901,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
> * this event, userspace should try to remap the bad rows since statistically
> * it is likely the same row is more likely to go bad again.
> */
> -static void ivybridge_parity_work(struct work_struct *work)
> +static void
Re: [Intel-gfx] [PATCH v3 08/10] drm/i915: prefer 3-letter acronym for broadwell
On Mon, Dec 23, 2019 at 09:32:42AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts broadwell to bdw where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 6 +++---
> drivers/gpu/drm/i915/gt/intel_workarounds.c| 2 +-
> drivers/gpu/drm/i915/gvt/handlers.c| 8
> drivers/gpu/drm/i915/i915_debugfs.c| 6 +++---
> drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
> 5 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index d6e0d0be842e..1f80f275f3f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -180,8 +180,8 @@ static void ivybridge_set_fifo_underrun_reporting(struct
> drm_device *dev,
> }
> }
>
> -static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev,
> - enum pipe pipe, bool enable)
> +static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
> + enum pipe pipe, bool enable)
> {
> struct drm_i915_private *dev_priv = to_i915(dev);
>
> @@ -268,7 +268,7 @@ static bool
> __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
> else if (IS_GEN(dev_priv, 7))
> ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
> else if (INTEL_GEN(dev_priv) >= 8)
> - broadwell_set_fifo_underrun_reporting(dev, pipe, enable);
> + bdw_set_fifo_underrun_reporting(dev, pipe, enable);
>
> return old;
> }
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 195ccf7db272..4e292d4bf7b9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -254,7 +254,7 @@ static void bdw_ctx_workarounds_init(struct
> intel_engine_cs *engine,
>
> /* WaDisableDopClockGating:bdw
>*
> - * Also see the related UCGTCL1 write in broadwell_init_clock_gating()
> + * Also see the related UCGTCL1 write in bdw_init_clock_gating()
>* to disable EUTC clock gating.
>*/
> WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index 1043e6d564df..6d28d72e6c7e 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -2691,7 +2691,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
> return 0;
> }
>
> -static int init_broadwell_mmio_info(struct intel_gvt *gvt)
> +static int init_bdw_mmio_info(struct intel_gvt *gvt)
> {
> struct drm_i915_private *dev_priv = gvt->dev_priv;
> int ret;
> @@ -3380,20 +3380,20 @@ int intel_gvt_setup_mmio_info(struct intel_gvt *gvt)
> goto err;
>
> if (IS_BROADWELL(dev_priv)) {
> - ret = init_broadwell_mmio_info(gvt);
> + ret = init_bdw_mmio_info(gvt);
> if (ret)
> goto err;
> } else if (IS_SKYLAKE(dev_priv)
> || IS_KABYLAKE(dev_priv)
> || IS_COFFEELAKE(dev_priv)) {
> - ret = init_broadwell_mmio_info(gvt);
> + ret = init_bdw_mmio_info(gvt);
> if (ret)
> goto err;
> ret = init_skl_mmio_info(gvt);
> if (ret)
> goto err;
> } else if (IS_BROXTON(dev_priv)) {
> - ret = init_broadwell_mmio_info(gvt);
> + ret = init_bdw_mmio_info(gvt);
> if (ret)
> goto err;
> ret = init_skl_mmio_info(gvt);
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 0407229251bc..cb34e8c31511 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3815,8 +3815,8 @@ static void gen9_sseu_device_status(struct
> drm_i915_private *dev_priv,
> #undef SS_MAX
> }
>
> -static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
> - struct sseu_dev_info *sseu)
> +static void bdw_sseu_device_status(struct drm_i915_private *dev_priv,
> +struct sseu_dev_info *sseu)
> {
> const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
> u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO);
> @@ -3901,7 +3901,7 @@ static int i915_sseu_status(struct
Re: [Intel-gfx] [PATCH v3 07/10] drm/i915: prefer 3-letter acronym for ironlake
On Mon, Dec 23, 2019 at 09:32:41AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts ironlake to ilk where appropriate.
DP_SCRAMBLING_DISABLE_IRONLAKE could be shortened, but afaics it's never
used anywhere so you might as well just remove it.
It can also be removed from the gma500 driver too. :-)
Matt
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 8 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 168 +-
> drivers/gpu/drm/i915/display/intel_display.h | 4 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 34 ++--
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> .../drm/i915/display/intel_fifo_underrun.c| 6 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +-
> drivers/gpu/drm/i915/intel_pm.c | 4 +-
> 11 files changed, 125 insertions(+), 126 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index b2b1336ecdb6..cbe5978e7fb5 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -247,7 +247,7 @@ static void hsw_post_disable_crt(struct intel_encoder
> *encoder,
>
> intel_ddi_disable_transcoder_func(old_crtc_state);
>
> - ironlake_pfit_disable(old_crtc_state);
> + ilk_pfit_disable(old_crtc_state);
>
> intel_ddi_disable_pipe_clock(old_crtc_state);
>
> @@ -351,7 +351,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
>
> /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
> if (HAS_PCH_LPT(dev_priv) &&
> - (ironlake_get_lanes_required(mode->clock, 27, 24) > 2))
> + ilk_get_lanes_required(mode->clock, 27, 24) > 2)
> return MODE_CLOCK_HIGH;
>
> /* HSW/BDW FDI limited to 4k */
> @@ -427,7 +427,7 @@ static int hsw_crt_compute_config(struct intel_encoder
> *encoder,
> return 0;
> }
>
> -static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
> *connector)
> +static bool ilk_crt_detect_hotplug(struct drm_connector *connector)
> {
> struct drm_device *dev = connector->dev;
> struct intel_crt *crt = intel_attached_crt(connector);
> @@ -535,7 +535,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector
> *connector)
> int i, tries = 0;
>
> if (HAS_PCH_SPLIT(dev_priv))
> - return intel_ironlake_crt_detect_hotplug(connector);
> + return ilk_crt_detect_hotplug(connector);
>
> if (IS_VALLEYVIEW(dev_priv))
> return valleyview_crt_detect_hotplug(connector);
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index b52c31721755..62fa73815d8a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3898,7 +3898,7 @@ static void intel_ddi_post_disable(struct intel_encoder
> *encoder,
> if (INTEL_GEN(dev_priv) >= 9)
> skl_scaler_disable(old_crtc_state);
> else
> - ironlake_pfit_disable(old_crtc_state);
> + ilk_pfit_disable(old_crtc_state);
>
> /*
>* When called from DP MST code:
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 461691cc2f62..5093fd08f381 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -145,8 +145,8 @@ static const u64 cursor_format_modifiers[] = {
>
> static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
> struct intel_crtc_state *pipe_config);
> -static void ironlake_pch_clock_get(struct intel_crtc *crtc,
> -struct intel_crtc_state *pipe_config);
> +static void ilk_pch_clock_get(struct intel_crtc *crtc,
> + struct intel_crtc_state *pipe_config);
>
> static int intel_framebuffer_init(struct intel_framebuffer *ifb,
> struct drm_i915_gem_object *obj,
> @@ -157,7 +157,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
> intel_crtc_state *crtc_sta
>const struct intel_link_m_n *m_n,
>const struct intel_link_m_n *m2_n2);
> static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
> -static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
> +static void
Re: [Intel-gfx] [PATCH v3 06/10] drm/i915: prefer 3-letter acronym for icelake
On Mon, Dec 23, 2019 at 09:32:40AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts icelake to icl where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 11 +--
> drivers/gpu/drm/i915/gt/intel_mocs.c | 6 +++---
> 2 files changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 98d6bcb4c761..461691cc2f62 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10455,9 +10455,8 @@ static void cnl_get_ddi_pll(struct drm_i915_private
> *dev_priv, enum port port,
> pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
> }
>
> -static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv,
> - enum port port,
> - struct intel_crtc_state *pipe_config)
> +static void icl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port
> port,
> + struct intel_crtc_state *pipe_config)
> {
> enum phy phy = intel_port_to_phy(dev_priv, port);
> enum icl_port_dpll_id port_dpll_id;
> @@ -10741,7 +10740,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc
> *crtc,
> }
>
> if (INTEL_GEN(dev_priv) >= 11)
> - icelake_get_ddi_pll(dev_priv, port, pipe_config);
> + icl_get_ddi_pll(dev_priv, port, pipe_config);
> else if (IS_CANNONLAKE(dev_priv))
> cnl_get_ddi_pll(dev_priv, port, pipe_config);
> else if (IS_GEN9_BC(dev_priv))
> @@ -10792,7 +10791,7 @@ static enum transcoder
> transcoder_master_readout(struct drm_i915_private *dev_pr
> return master_select - 1;
> }
>
> -static void icelake_get_trans_port_sync_config(struct intel_crtc_state
> *crtc_state)
> +static void icl_get_trans_port_sync_config(struct intel_crtc_state
> *crtc_state)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> u32 transcoders;
> @@ -10948,7 +10947,7 @@ static bool hsw_get_pipe_config(struct intel_crtc
> *crtc,
>
> if (INTEL_GEN(dev_priv) >= 11 &&
> !transcoder_is_dsi(pipe_config->cpu_transcoder))
> - icelake_get_trans_port_sync_config(pipe_config);
> + icl_get_trans_port_sync_config(pipe_config);
>
> out:
> for_each_power_domain(power_domain, power_domain_mask)
> diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
> b/drivers/gpu/drm/i915/gt/intel_mocs.c
> index cbdeda608359..95f1bc45953b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_mocs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
> @@ -267,7 +267,7 @@ static const struct drm_i915_mocs_entry
> tigerlake_mocs_table[] = {
> L3_3_WB),
> };
>
> -static const struct drm_i915_mocs_entry icelake_mocs_table[] = {
> +static const struct drm_i915_mocs_entry icl_mocs_table[] = {
> /* Base - Uncached (Deprecated) */
> MOCS_ENTRY(I915_MOCS_UNCACHED,
> LE_1_UC | LE_TC_1_LLC,
> @@ -288,8 +288,8 @@ static bool get_mocs_settings(const struct
> drm_i915_private *i915,
> table->table = tigerlake_mocs_table;
> table->n_entries = GEN11_NUM_MOCS_ENTRIES;
> } else if (IS_GEN(i915, 11)) {
> - table->size = ARRAY_SIZE(icelake_mocs_table);
> - table->table = icelake_mocs_table;
> + table->size = ARRAY_SIZE(icl_mocs_table);
> + table->table = icl_mocs_table;
> table->n_entries = GEN11_NUM_MOCS_ENTRIES;
> } else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) {
> table->size = ARRAY_SIZE(skl_mocs_table);
> --
> 2.24.0
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
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Intel Corporation
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Re: [Intel-gfx] [PATCH v3 05/10] drm/i915: prefer 3-letter acronym for cannonlake
On Mon, Dec 23, 2019 at 09:32:39AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts cannonlake to cnl where appropriate.
Reviewed-by: Matt Roper
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 18ac15df91c7..98d6bcb4c761 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10440,9 +10440,8 @@ static int hsw_crtc_compute_clock(struct intel_crtc
> *crtc,
> return 0;
> }
>
> -static void cannonlake_get_ddi_pll(struct drm_i915_private *dev_priv,
> -enum port port,
> -struct intel_crtc_state *pipe_config)
> +static void cnl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port
> port,
> + struct intel_crtc_state *pipe_config)
> {
> enum intel_dpll_id id;
> u32 temp;
> @@ -10744,7 +10743,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc
> *crtc,
> if (INTEL_GEN(dev_priv) >= 11)
> icelake_get_ddi_pll(dev_priv, port, pipe_config);
> else if (IS_CANNONLAKE(dev_priv))
> - cannonlake_get_ddi_pll(dev_priv, port, pipe_config);
> + cnl_get_ddi_pll(dev_priv, port, pipe_config);
> else if (IS_GEN9_BC(dev_priv))
> skl_get_ddi_pll(dev_priv, port, pipe_config);
> else if (IS_GEN9_LP(dev_priv))
> --
> 2.24.0
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [Intel-gfx] [PATCH v3 04/10] drm/i915: prefer 3-letter acronym for skylake
On Mon, Dec 23, 2019 at 09:32:38AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts skylake to skl where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 29 ++--
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++--
> 7 files changed, 22 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 006b1a297e6f..8435bc5a7a74 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1259,7 +1259,7 @@ static void gen11_dsi_post_disable(struct intel_encoder
> *encoder,
>
> intel_dsc_disable(old_crtc_state);
>
> - skylake_scaler_disable(old_crtc_state);
> + skl_scaler_disable(old_crtc_state);
> }
>
> static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector
> *connector,
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index d687c9503025..b52c31721755 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3896,7 +3896,7 @@ static void intel_ddi_post_disable(struct intel_encoder
> *encoder,
> intel_dsc_disable(old_crtc_state);
>
> if (INTEL_GEN(dev_priv) >= 9)
> - skylake_scaler_disable(old_crtc_state);
> + skl_scaler_disable(old_crtc_state);
> else
> ironlake_pfit_disable(old_crtc_state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 14726a293171..18ac15df91c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -164,7 +164,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> static void chv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> -static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
> +static void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
> static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state);
> static void intel_modeset_setup_hw_state(struct drm_device *dev,
>struct drm_modeset_acquire_ctx *ctx);
> @@ -6001,7 +6001,7 @@ static int skl_update_scaler_plane(struct
> intel_crtc_state *crtc_state,
> return 0;
> }
>
> -void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state)
> +void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> int i;
> @@ -6010,7 +6010,7 @@ void skylake_scaler_disable(const struct
> intel_crtc_state *old_crtc_state)
> skl_detach_scaler(crtc, i);
> }
>
> -static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
> +static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -6844,7 +6844,7 @@ static void hsw_crtc_enable(struct intel_atomic_state
> *state,
> glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
>
> if (INTEL_GEN(dev_priv) >= 9)
> - skylake_pfit_enable(new_crtc_state);
> + skl_pfit_enable(new_crtc_state);
> else
> ironlake_pfit_enable(new_crtc_state);
>
> @@ -10116,8 +10116,8 @@ static void ironlake_get_fdi_m_n_config(struct
> intel_crtc *crtc,
>_config->fdi_m_n, NULL);
> }
>
> -static void skylake_get_pfit_config(struct intel_crtc *crtc,
> - struct intel_crtc_state *pipe_config)
> +static void skl_get_pfit_config(struct intel_crtc *crtc,
> + struct intel_crtc_state *pipe_config)
> {
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -10148,8 +10148,8 @@ static void skylake_get_pfit_config(struct intel_crtc
> *crtc,
> }
>
> static void
> -skylake_get_initial_plane_config(struct intel_crtc *crtc,
> - struct
Re: [Intel-gfx] [PATCH v3 03/10] drm/i915: prefer 3-letter acronym for haswell
On Mon, Dec 23, 2019 at 09:32:37AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts haswell to hsw where appropriate.
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
> drivers/gpu/drm/i915/display/intel_display.c | 57 ++--
> drivers/gpu/drm/i915/intel_device_info.c | 4 +-
> 3 files changed, 32 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c9ba7d7f3787..d687c9503025 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3458,14 +3458,14 @@ static void tgl_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
>* (DFLEXDPSP.DPX4TXLATC)
>*
>* This was done before tgl_ddi_pre_enable_dp by
> - * haswell_crtc_enable()->intel_encoders_pre_pll_enable().
> + * hsw_crtc_enable()->intel_encoders_pre_pll_enable().
>*/
>
> /*
>* 4. Enable the port PLL.
>*
>* The PLL enabling itself was already done before this function by
> - * haswell_crtc_enable()->intel_enable_shared_dpll(). We need only
> + * hsw_crtc_enable()->intel_enable_shared_dpll(). We need only
>* configure the PLL to port mapping here.
>*/
> intel_ddi_clk_select(encoder, crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5d43024f35aa..14726a293171 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -158,7 +158,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
> intel_crtc_state *crtc_sta
>const struct intel_link_m_n *m2_n2);
> static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
> static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
> -static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state);
> +static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
> static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
> static void vlv_prepare_pll(struct intel_crtc *crtc,
> const struct intel_crtc_state *pipe_config);
> @@ -6787,8 +6787,8 @@ static void hsw_set_frame_start_delay(const struct
> intel_crtc_state *crtc_state)
> I915_WRITE(reg, val);
> }
>
> -static void haswell_crtc_enable(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> +static void hsw_crtc_enable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> @@ -6829,7 +6829,7 @@ static void haswell_crtc_enable(struct
> intel_atomic_state *state,
>
> if (!transcoder_is_dsi(cpu_transcoder)) {
> hsw_set_frame_start_delay(new_crtc_state);
> - haswell_set_pipeconf(new_crtc_state);
> + hsw_set_pipeconf(new_crtc_state);
> }
>
> if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
> @@ -6967,8 +6967,8 @@ static void ironlake_crtc_disable(struct
> intel_atomic_state *state,
> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
> }
>
> -static void haswell_crtc_disable(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> +static void hsw_crtc_disable(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> /*
>* FIXME collapse everything to one hook.
> @@ -9783,7 +9783,7 @@ static void ironlake_set_pipeconf(const struct
> intel_crtc_state *crtc_state)
> POSTING_READ(PIPECONF(pipe));
> }
>
> -static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state)
> +static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -10417,8 +10417,9 @@ static bool ironlake_get_pipe_config(struct
> intel_crtc *crtc,
>
> return ret;
> }
> -static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
> - struct intel_crtc_state *crtc_state)
> +
> +static int hsw_crtc_compute_clock(struct intel_crtc *crtc,
> + struct intel_crtc_state *crtc_state)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct intel_atomic_state *state
Re: [Intel-gfx] [PATCH v3 02/10] drm/i915: prefer 3-letter acronym for pineview
On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts pineview to pnv where appropriate.
Do you also want to convert watermark stuff in intel_pm.c like
pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.?
Matt
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8
> drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 1860da0a493e..5d43024f35aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -369,7 +369,7 @@ static const struct intel_limit
> intel_limits_g4x_dual_channel_lvds = {
> },
> };
>
> -static const struct intel_limit intel_limits_pineview_sdvo = {
> +static const struct intel_limit pnv_limits_sdvo = {
> .dot = { .min = 2, .max = 40},
> .vco = { .min = 170, .max = 350 },
> /* Pineview's Ncounter is a ring counter */
> @@ -384,7 +384,7 @@ static const struct intel_limit
> intel_limits_pineview_sdvo = {
> .p2_slow = 10, .p2_fast = 5 },
> };
>
> -static const struct intel_limit intel_limits_pineview_lvds = {
> +static const struct intel_limit pnv_limits_lvds = {
> .dot = { .min = 2, .max = 40 },
> .vco = { .min = 170, .max = 350 },
> .n = { .min = 3, .max = 6 },
> @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc
> *crtc,
> DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n",
> refclk);
> }
>
> - limit = _limits_pineview_lvds;
> + limit = _limits_lvds;
> } else {
> - limit = _limits_pineview_sdvo;
> + limit = _limits_sdvo;
> }
>
> if (!crtc_state->clock_set &&
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 31ec82337e4f..eab3b029e98a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private
> *dev_priv)
>
> }
>
> -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
> +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv)
> {
> u32 tmp;
>
> @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
> {
> /* For cxsr */
> if (IS_PINEVIEW(dev_priv))
> - i915_pineview_get_mem_freq(dev_priv);
> + pnv_get_mem_freq(dev_priv);
> else if (IS_GEN(dev_priv, 5))
> i915_ironlake_get_mem_freq(dev_priv);
>
> --
> 2.24.0
>
> ___
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> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Intel Corporation
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Re: [Intel-gfx] [PATCH v3 01/10] drm/i915: simplify prefixes on device_info
On Mon, Dec 23, 2019 at 09:32:35AM -0800, Lucas De Marchi wrote:
> Drop the intel prefix since all these structs are static and prefer
> using the 3-letter prefix for each platform.
>
> v2: also remove gen from the device info (Ville)
>
> Signed-off-by: Lucas De Marchi
> Acked-by: Jani Nikula
> Acked-by: Ville Syrjälä
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/i915_pci.c | 230
> 1 file changed, 115 insertions(+), 115 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 9571611b4b16..83f01401b8b5 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -193,23 +193,23 @@
> GEN_DEFAULT_PAGE_SIZES, \
> GEN_DEFAULT_REGIONS
>
> -static const struct intel_device_info intel_i830_info = {
> +static const struct intel_device_info i830_info = {
> I830_FEATURES,
> PLATFORM(INTEL_I830),
> };
>
> -static const struct intel_device_info intel_i845g_info = {
> +static const struct intel_device_info i845g_info = {
> I845_FEATURES,
> PLATFORM(INTEL_I845G),
> };
>
> -static const struct intel_device_info intel_i85x_info = {
> +static const struct intel_device_info i85x_info = {
> I830_FEATURES,
> PLATFORM(INTEL_I85X),
> .display.has_fbc = 1,
> };
>
> -static const struct intel_device_info intel_i865g_info = {
> +static const struct intel_device_info i865g_info = {
> I845_FEATURES,
> PLATFORM(INTEL_I865G),
> };
> @@ -228,7 +228,7 @@ static const struct intel_device_info intel_i865g_info = {
> GEN_DEFAULT_PAGE_SIZES, \
> GEN_DEFAULT_REGIONS
>
> -static const struct intel_device_info intel_i915g_info = {
> +static const struct intel_device_info i915g_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_I915G),
> .has_coherent_ggtt = false,
> @@ -239,7 +239,7 @@ static const struct intel_device_info intel_i915g_info = {
> .unfenced_needs_alignment = 1,
> };
>
> -static const struct intel_device_info intel_i915gm_info = {
> +static const struct intel_device_info i915gm_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_I915GM),
> .is_mobile = 1,
> @@ -252,7 +252,7 @@ static const struct intel_device_info intel_i915gm_info =
> {
> .unfenced_needs_alignment = 1,
> };
>
> -static const struct intel_device_info intel_i945g_info = {
> +static const struct intel_device_info i945g_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_I945G),
> .display.has_hotplug = 1,
> @@ -263,7 +263,7 @@ static const struct intel_device_info intel_i945g_info = {
> .unfenced_needs_alignment = 1,
> };
>
> -static const struct intel_device_info intel_i945gm_info = {
> +static const struct intel_device_info i945gm_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_I945GM),
> .is_mobile = 1,
> @@ -277,21 +277,21 @@ static const struct intel_device_info intel_i945gm_info
> = {
> .unfenced_needs_alignment = 1,
> };
>
> -static const struct intel_device_info intel_g33_info = {
> +static const struct intel_device_info g33_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_G33),
> .display.has_hotplug = 1,
> .display.has_overlay = 1,
> };
>
> -static const struct intel_device_info intel_pineview_g_info = {
> +static const struct intel_device_info pnv_g_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_PINEVIEW),
> .display.has_hotplug = 1,
> .display.has_overlay = 1,
> };
>
> -static const struct intel_device_info intel_pineview_m_info = {
> +static const struct intel_device_info pnv_m_info = {
> GEN3_FEATURES,
> PLATFORM(INTEL_PINEVIEW),
> .is_mobile = 1,
> @@ -314,7 +314,7 @@ static const struct intel_device_info
> intel_pineview_m_info = {
> GEN_DEFAULT_PAGE_SIZES, \
> GEN_DEFAULT_REGIONS
>
> -static const struct intel_device_info intel_i965g_info = {
> +static const struct intel_device_info i965g_info = {
> GEN4_FEATURES,
> PLATFORM(INTEL_I965G),
> .display.has_overlay = 1,
> @@ -322,7 +322,7 @@ static const struct intel_device_info intel_i965g_info = {
> .has_snoop = false,
> };
>
> -static const struct intel_device_info intel_i965gm_info = {
> +static const struct intel_device_info i965gm_info = {
> GEN4_FEATURES,
> PLATFORM(INTEL_I965GM),
> .is_mobile = 1,
> @@ -333,14 +333,14 @@ static const struct intel_device_info intel_i965gm_info
> = {
> .has_snoop = false,
> };
>
> -static const struct intel_device_info intel_g45_info = {
> +static const struct intel_device_info g45_info = {
> GEN4_FEATURES,
> PLATFORM(INTEL_G45),
> .engine_mask = BIT(RCS0) | BIT(VCS0),
> .gpu_reset_clobbers_display = false,
> };
>
> -static const struct intel_device_info intel_gm45_info = {
> +static const struct intel_device_info gm45_info = {
> GEN4_FEATURES,
> PLATFORM(INTEL_GM45),
> .is_mobile = 1,
> @@
Re: [Intel-gfx] [PATCH v4 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
On Mon, Dec 23, 2019 at 02:40:04PM -0800, Manasi Navare wrote:
> In case of tiled displays, all the tiles are linke dto each other
> for transcoder port sync. So in intel_atomic_check() we need to make
> sure that we add all the tiles to the modeset and if one of the
> tiles needs a full modeset then mark all other tiles for a full modeset.
>
> We also need to force modeset for all synced crtcs after fastset check.
>
> v5:
> * Rebase
> v4:
> * Fix logic for modeset_synced_crtcs (Ville)
> v3:
> * Add tile checks only for Gen >11
> v2:
> * Change crtc_state scope, remove tile_grp_id (Ville)
> * Use intel_connector_needs_modeset() (Ville)
> * Add modeset_synced_crtcs (Ville)
> * Make sure synced crtcs are forced full modeset
> after fastset check (Ville)
>
> Suggested-by: Ville Syrjälä
> Cc: Ville Syrjälä
> Cc: José Roberto de Souza
> Cc: Matt Roper
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
> Signed-off-by: Manasi Navare
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 123 +++
> 1 file changed, 123 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 94fc4b5bacc0..45a699bac34a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14304,6 +14304,118 @@ static bool
> intel_cpu_transcoder_needs_modeset(struct intel_atomic_state *state,
> return false;
> }
>
> +static void
> +intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> +u8 transcoders)
> +{
> + struct intel_crtc_state *new_crtc_state;
> + struct intel_crtc *crtc;
> + int i;
> +
> + for_each_new_intel_crtc_in_state(state, crtc,
> + new_crtc_state, i) {
> + if (transcoders & BIT(new_crtc_state->cpu_transcoder)) {
> + new_crtc_state->uapi.mode_changed = true;
> + new_crtc_state->update_pipe = false;
> + }
> + }
> +}
> +
> +static void
> +intel_atomic_check_synced_crtcs(struct intel_atomic_state *state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + struct intel_crtc_state *new_crtc_state;
> + struct intel_crtc *crtc;
> + int i;
> +
> + if (INTEL_GEN(dev_priv) < 11)
> + return;
> +
> + for_each_new_intel_crtc_in_state(state, crtc,
> + new_crtc_state, i) {
> + if (is_trans_port_sync_master(new_crtc_state) &&
> + needs_modeset(new_crtc_state)) {
> + intel_modeset_synced_crtcs(state,
> +
> new_crtc_state->sync_mode_slaves_mask);
> + } else if (is_trans_port_sync_slave(new_crtc_state) &&
> +needs_modeset(new_crtc_state)) {
> + intel_modeset_synced_crtcs(state,
> +
> BIT(new_crtc_state->master_transcoder));
> + }
> + }
> +}
> +
> +static int
> +intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + struct drm_connector *connector;
> + struct drm_connector_list_iter conn_iter;
> + int ret = 0;
> +
> + drm_connector_list_iter_begin(_priv->drm, _iter);
> + drm_for_each_connector_iter(connector, _iter) {
> + struct drm_connector_state *conn_state;
> + struct drm_crtc_state *crtc_state;
> +
> + if (!connector->has_tile ||
> + connector->tile_group->id != tile_grp_id)
> + continue;
> + conn_state = drm_atomic_get_connector_state(>base,
> + connector);
> + if (IS_ERR(conn_state)) {
> + ret = PTR_ERR(conn_state);
> + break;
> + }
> +
> + if (!conn_state->crtc)
> + continue;
> +
> + crtc_state = drm_atomic_get_crtc_state(>base,
> +conn_state->crtc);
> + if (IS_ERR(crtc_state)) {
> + ret = PTR_ERR(conn_state);
> + break;
> + }
> + crtc_state->mode_changed = true;
> + ret = drm_atomic_add_affected_connectors(>base,
> + conn_state->crtc);
> + if (ret)
> + break;
> + }
> + drm_connector_list_iter_end(_iter);
> +
> + return ret;
> +}
This feels like it could be pulled out to a DRM-level helper since
there's nothing really Intel-specific here. I imagine other drivers
with port sync capabilities will need pretty much exactly the same
logic? But that can wait until a future patch.
> +
> +static int
>
[Intel-gfx] [PATCH v5 2/3] drm/i915/dp: Make port sync mode assignments only if all tiles present
Add an extra check before making master slave assignments for tiled
displays to make sure we make these assignments only if all tiled
connectors are present. If not then initialize the state to defaults
so it does a normal non tiled modeset without transcoder port sync.
v4:
deafulat port sync values in prepare_cleared_state (Ville)
v3:
* Default master trans to INVALID to avoid pipe mismatch
v2:
* Rename icl_add_sync_mode_crtcs
* Move this function just before .compute_config hook
* Check if DP before master slave assignments (Ville)
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Cc: Ville Syrjälä
Signed-off-by: Manasi Navare
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 182 ---
1 file changed, 117 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 45a699bac34a..1eae8e08c740 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12263,88 +12263,121 @@ static bool c8_planes_changed(const struct
intel_crtc_state *new_crtc_state)
return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
}
-static int icl_add_sync_mode_crtcs(struct intel_crtc_state *crtc_state)
+static bool
+intel_atomic_is_master_connector(struct intel_crtc_state *crtc_state)
+{
+ struct drm_crtc *crtc = crtc_state->uapi.crtc;
+ struct drm_atomic_state *state = crtc_state->uapi.state;
+ struct drm_connector *connector;
+ struct drm_connector_state *connector_state;
+ int i;
+
+ for_each_new_connector_in_state(state, connector, connector_state, i) {
+ if (connector_state->crtc != crtc)
+ continue;
+ if (connector->has_tile &&
+ connector->tile_h_loc == connector->num_h_tile - 1 &&
+ connector->tile_v_loc == connector->num_v_tile - 1)
+ return true;
+ }
+
+ return false;
+}
+
+static void reset_port_sync_mode_state(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->master_transcoder = INVALID_TRANSCODER;
+ crtc_state->sync_mode_slaves_mask = 0;
+}
+
+static int icl_compute_port_sync_crtc_state(struct drm_connector *connector,
+ struct intel_crtc_state *crtc_state,
+ int num_tiled_conns)
{
struct drm_crtc *crtc = crtc_state->uapi.crtc;
struct intel_atomic_state *state =
to_intel_atomic_state(crtc_state->uapi.state);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- struct drm_connector *master_connector, *connector;
- struct drm_connector_state *connector_state;
+ struct drm_connector *master_connector;
struct drm_connector_list_iter conn_iter;
struct drm_crtc *master_crtc = NULL;
struct drm_crtc_state *master_crtc_state;
struct intel_crtc_state *master_pipe_config;
- int i, tile_group_id;
if (INTEL_GEN(dev_priv) < 11)
return 0;
+ if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
+ return 0;
+
/*
* In case of tiled displays there could be one or more slaves but
there is
* only one master. Lets make the CRTC used by the connector
corresponding
* to the last horizonal and last vertical tile a master/genlock CRTC.
* All the other CRTCs corresponding to other tiles of the same Tile
group
* are the slave CRTCs and hold a pointer to their genlock CRTC.
+* If all tiles not present do not make master slave assignments.
*/
- for_each_new_connector_in_state(>base, connector,
connector_state, i) {
- if (connector_state->crtc != crtc)
- continue;
- if (!connector->has_tile)
+ if (!connector->has_tile ||
+ crtc_state->hw.mode.hdisplay != connector->tile_h_size ||
+ crtc_state->hw.mode.vdisplay != connector->tile_v_size ||
+ num_tiled_conns < connector->num_h_tile * connector->num_v_tile) {
+ reset_port_sync_mode_state(crtc_state);
+ return 0;
+ }
+ /* Last Horizontal and last vertical tile connector is a master
+* Master's crtc state is already populated in slave for port sync
+*/
+ if (connector->tile_h_loc == connector->num_h_tile - 1 &&
+ connector->tile_v_loc == connector->num_v_tile - 1)
+ return 0;
+
+ /* Loop through all connectors and configure the Slave crtc_state
+* to point to the correct master.
+*/
+ drm_connector_list_iter_begin(_priv->drm, _iter);
+ drm_for_each_connector_iter(master_connector, _iter) {
+ struct drm_connector_state *master_conn_state = NULL;
+
+ if (!(master_connector->has_tile &&
[Intel-gfx] [PATCH v5 3/3] drm/i915/dp: Disable Port sync mode correctly on teardown
While clearing the Ports ync mode enable and master select bits
we need to clear the register completely instead of using disable masks
v3:
* Remove reg variable (Matt)
v2:
* Just write 0 to the reg (Ville)
* Rebase
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Cc: Ville Syrjälä
Cc: Jani Nikula
Fixes: 51528afe7c5e ("drm/i915/display/icl: Disable transcoder port sync as
part of crtc_disable() sequence")
Signed-off-by: Manasi Navare
Reviewed-by: Matt Roper
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3a538789c585..3838b37185de 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3878,8 +3878,6 @@ static void icl_disable_transcoder_port_sync(const struct
intel_crtc_state *old_
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- i915_reg_t reg;
- u32 trans_ddi_func_ctl2_val;
if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
return;
@@ -3887,10 +3885,7 @@ static void icl_disable_transcoder_port_sync(const
struct intel_crtc_state *old_
DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
transcoder_name(old_crtc_state->cpu_transcoder));
- reg = TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder);
- trans_ddi_func_ctl2_val = ~(PORT_SYNC_MODE_ENABLE |
- PORT_SYNC_MODE_MASTER_SELECT_MASK);
- I915_WRITE(reg, trans_ddi_func_ctl2_val);
+ I915_WRITE(TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
}
static void intel_ddi_post_disable(struct intel_encoder *encoder,
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v5 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
In case of tiled displays, all the tiles are linke dto each other
for transcoder port sync. So in intel_atomic_check() we need to make
sure that we add all the tiles to the modeset and if one of the
tiles needs a full modeset then mark all other tiles for a full modeset.
We also need to force modeset for all synced crtcs after fastset check.
v5:
* Rebase
v4:
* Fix logic for modeset_synced_crtcs (Ville)
v3:
* Add tile checks only for Gen >11
v2:
* Change crtc_state scope, remove tile_grp_id (Ville)
* Use intel_connector_needs_modeset() (Ville)
* Add modeset_synced_crtcs (Ville)
* Make sure synced crtcs are forced full modeset
after fastset check (Ville)
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Cc: José Roberto de Souza
Cc: Matt Roper
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 123 +++
1 file changed, 123 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 94fc4b5bacc0..45a699bac34a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14304,6 +14304,118 @@ static bool intel_cpu_transcoder_needs_modeset(struct
intel_atomic_state *state,
return false;
}
+static void
+intel_modeset_synced_crtcs(struct intel_atomic_state *state,
+ u8 transcoders)
+{
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_new_intel_crtc_in_state(state, crtc,
+new_crtc_state, i) {
+ if (transcoders & BIT(new_crtc_state->cpu_transcoder)) {
+ new_crtc_state->uapi.mode_changed = true;
+ new_crtc_state->update_pipe = false;
+ }
+ }
+}
+
+static void
+intel_atomic_check_synced_crtcs(struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ if (INTEL_GEN(dev_priv) < 11)
+ return;
+
+ for_each_new_intel_crtc_in_state(state, crtc,
+new_crtc_state, i) {
+ if (is_trans_port_sync_master(new_crtc_state) &&
+ needs_modeset(new_crtc_state)) {
+ intel_modeset_synced_crtcs(state,
+
new_crtc_state->sync_mode_slaves_mask);
+ } else if (is_trans_port_sync_slave(new_crtc_state) &&
+ needs_modeset(new_crtc_state)) {
+ intel_modeset_synced_crtcs(state,
+
BIT(new_crtc_state->master_transcoder));
+ }
+ }
+}
+
+static int
+intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
+ int ret = 0;
+
+ drm_connector_list_iter_begin(_priv->drm, _iter);
+ drm_for_each_connector_iter(connector, _iter) {
+ struct drm_connector_state *conn_state;
+ struct drm_crtc_state *crtc_state;
+
+ if (!connector->has_tile ||
+ connector->tile_group->id != tile_grp_id)
+ continue;
+ conn_state = drm_atomic_get_connector_state(>base,
+ connector);
+ if (IS_ERR(conn_state)) {
+ ret = PTR_ERR(conn_state);
+ break;
+ }
+
+ if (!conn_state->crtc)
+ continue;
+
+ crtc_state = drm_atomic_get_crtc_state(>base,
+ conn_state->crtc);
+ if (IS_ERR(crtc_state)) {
+ ret = PTR_ERR(conn_state);
+ break;
+ }
+ crtc_state->mode_changed = true;
+ ret = drm_atomic_add_affected_connectors(>base,
+conn_state->crtc);
+ if (ret)
+ break;
+ }
+ drm_connector_list_iter_end(_iter);
+
+ return ret;
+}
+
+static int
+intel_atomic_check_tiled_conns(struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct drm_connector *connector;
+ struct drm_connector_state *old_conn_state, *new_conn_state;
+ int i, ret;
+
+ if (INTEL_GEN(dev_priv) < 11)
+ return 0;
+
+ /* Is tiled, mark all other tiled CRTCs as needing a modeset */
+ for_each_oldnew_connector_in_state(>base,
[Intel-gfx] [PATCH v4 1/3] drm/i915/dp: Make sure all tiled connectors get added to the state with full modeset
In case of tiled displays, all the tiles are linke dto each other
for transcoder port sync. So in intel_atomic_check() we need to make
sure that we add all the tiles to the modeset and if one of the
tiles needs a full modeset then mark all other tiles for a full modeset.
We also need to force modeset for all synced crtcs after fastset check.
v5:
* Rebase
v4:
* Fix logic for modeset_synced_crtcs (Ville)
v3:
* Add tile checks only for Gen >11
v2:
* Change crtc_state scope, remove tile_grp_id (Ville)
* Use intel_connector_needs_modeset() (Ville)
* Add modeset_synced_crtcs (Ville)
* Make sure synced crtcs are forced full modeset
after fastset check (Ville)
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Cc: José Roberto de Souza
Cc: Matt Roper
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Signed-off-by: Manasi Navare
---
drivers/gpu/drm/i915/display/intel_display.c | 123 +++
1 file changed, 123 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 94fc4b5bacc0..45a699bac34a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14304,6 +14304,118 @@ static bool intel_cpu_transcoder_needs_modeset(struct
intel_atomic_state *state,
return false;
}
+static void
+intel_modeset_synced_crtcs(struct intel_atomic_state *state,
+ u8 transcoders)
+{
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_new_intel_crtc_in_state(state, crtc,
+new_crtc_state, i) {
+ if (transcoders & BIT(new_crtc_state->cpu_transcoder)) {
+ new_crtc_state->uapi.mode_changed = true;
+ new_crtc_state->update_pipe = false;
+ }
+ }
+}
+
+static void
+intel_atomic_check_synced_crtcs(struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ if (INTEL_GEN(dev_priv) < 11)
+ return;
+
+ for_each_new_intel_crtc_in_state(state, crtc,
+new_crtc_state, i) {
+ if (is_trans_port_sync_master(new_crtc_state) &&
+ needs_modeset(new_crtc_state)) {
+ intel_modeset_synced_crtcs(state,
+
new_crtc_state->sync_mode_slaves_mask);
+ } else if (is_trans_port_sync_slave(new_crtc_state) &&
+ needs_modeset(new_crtc_state)) {
+ intel_modeset_synced_crtcs(state,
+
BIT(new_crtc_state->master_transcoder));
+ }
+ }
+}
+
+static int
+intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct drm_connector *connector;
+ struct drm_connector_list_iter conn_iter;
+ int ret = 0;
+
+ drm_connector_list_iter_begin(_priv->drm, _iter);
+ drm_for_each_connector_iter(connector, _iter) {
+ struct drm_connector_state *conn_state;
+ struct drm_crtc_state *crtc_state;
+
+ if (!connector->has_tile ||
+ connector->tile_group->id != tile_grp_id)
+ continue;
+ conn_state = drm_atomic_get_connector_state(>base,
+ connector);
+ if (IS_ERR(conn_state)) {
+ ret = PTR_ERR(conn_state);
+ break;
+ }
+
+ if (!conn_state->crtc)
+ continue;
+
+ crtc_state = drm_atomic_get_crtc_state(>base,
+ conn_state->crtc);
+ if (IS_ERR(crtc_state)) {
+ ret = PTR_ERR(conn_state);
+ break;
+ }
+ crtc_state->mode_changed = true;
+ ret = drm_atomic_add_affected_connectors(>base,
+conn_state->crtc);
+ if (ret)
+ break;
+ }
+ drm_connector_list_iter_end(_iter);
+
+ return ret;
+}
+
+static int
+intel_atomic_check_tiled_conns(struct intel_atomic_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ struct drm_connector *connector;
+ struct drm_connector_state *old_conn_state, *new_conn_state;
+ int i, ret;
+
+ if (INTEL_GEN(dev_priv) < 11)
+ return 0;
+
+ /* Is tiled, mark all other tiled CRTCs as needing a modeset */
+ for_each_oldnew_connector_in_state(>base,
[Intel-gfx] [PATCH v4 2/3] drm/i915/dp: Make port sync mode assignments only if all tiles present
Add an extra check before making master slave assignments for tiled
displays to make sure we make these assignments only if all tiled
connectors are present. If not then initialize the state to defaults
so it does a normal non tiled modeset without transcoder port sync.
v4:
deafulat port sync values in prepare_cleared_state (Ville)
v3:
* Default master trans to INVALID to avoid pipe mismatch
v2:
* Rename icl_add_sync_mode_crtcs
* Move this function just before .compute_config hook
* Check if DP before master slave assignments (Ville)
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Cc: Ville Syrjälä
Signed-off-by: Manasi Navare
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 182 ---
1 file changed, 117 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 45a699bac34a..1eae8e08c740 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12263,88 +12263,121 @@ static bool c8_planes_changed(const struct
intel_crtc_state *new_crtc_state)
return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
}
-static int icl_add_sync_mode_crtcs(struct intel_crtc_state *crtc_state)
+static bool
+intel_atomic_is_master_connector(struct intel_crtc_state *crtc_state)
+{
+ struct drm_crtc *crtc = crtc_state->uapi.crtc;
+ struct drm_atomic_state *state = crtc_state->uapi.state;
+ struct drm_connector *connector;
+ struct drm_connector_state *connector_state;
+ int i;
+
+ for_each_new_connector_in_state(state, connector, connector_state, i) {
+ if (connector_state->crtc != crtc)
+ continue;
+ if (connector->has_tile &&
+ connector->tile_h_loc == connector->num_h_tile - 1 &&
+ connector->tile_v_loc == connector->num_v_tile - 1)
+ return true;
+ }
+
+ return false;
+}
+
+static void reset_port_sync_mode_state(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->master_transcoder = INVALID_TRANSCODER;
+ crtc_state->sync_mode_slaves_mask = 0;
+}
+
+static int icl_compute_port_sync_crtc_state(struct drm_connector *connector,
+ struct intel_crtc_state *crtc_state,
+ int num_tiled_conns)
{
struct drm_crtc *crtc = crtc_state->uapi.crtc;
struct intel_atomic_state *state =
to_intel_atomic_state(crtc_state->uapi.state);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- struct drm_connector *master_connector, *connector;
- struct drm_connector_state *connector_state;
+ struct drm_connector *master_connector;
struct drm_connector_list_iter conn_iter;
struct drm_crtc *master_crtc = NULL;
struct drm_crtc_state *master_crtc_state;
struct intel_crtc_state *master_pipe_config;
- int i, tile_group_id;
if (INTEL_GEN(dev_priv) < 11)
return 0;
+ if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
+ return 0;
+
/*
* In case of tiled displays there could be one or more slaves but
there is
* only one master. Lets make the CRTC used by the connector
corresponding
* to the last horizonal and last vertical tile a master/genlock CRTC.
* All the other CRTCs corresponding to other tiles of the same Tile
group
* are the slave CRTCs and hold a pointer to their genlock CRTC.
+* If all tiles not present do not make master slave assignments.
*/
- for_each_new_connector_in_state(>base, connector,
connector_state, i) {
- if (connector_state->crtc != crtc)
- continue;
- if (!connector->has_tile)
+ if (!connector->has_tile ||
+ crtc_state->hw.mode.hdisplay != connector->tile_h_size ||
+ crtc_state->hw.mode.vdisplay != connector->tile_v_size ||
+ num_tiled_conns < connector->num_h_tile * connector->num_v_tile) {
+ reset_port_sync_mode_state(crtc_state);
+ return 0;
+ }
+ /* Last Horizontal and last vertical tile connector is a master
+* Master's crtc state is already populated in slave for port sync
+*/
+ if (connector->tile_h_loc == connector->num_h_tile - 1 &&
+ connector->tile_v_loc == connector->num_v_tile - 1)
+ return 0;
+
+ /* Loop through all connectors and configure the Slave crtc_state
+* to point to the correct master.
+*/
+ drm_connector_list_iter_begin(_priv->drm, _iter);
+ drm_for_each_connector_iter(master_connector, _iter) {
+ struct drm_connector_state *master_conn_state = NULL;
+
+ if (!(master_connector->has_tile &&
[Intel-gfx] [PATCH v4 3/3] drm/i915/dp: Disable Port sync mode correctly on teardown
While clearing the Ports ync mode enable and master select bits
we need to clear the register completely instead of using disable masks
v3:
* Remove reg variable (Matt)
v2:
* Just write 0 to the reg (Ville)
* Rebase
Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/5
Cc: Ville Syrjälä
Cc: Jani Nikula
Fixes: 51528afe7c5e ("drm/i915/display/icl: Disable transcoder port sync as
part of crtc_disable() sequence")
Signed-off-by: Manasi Navare
Reviewed-by: Matt Roper
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3a538789c585..3838b37185de 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3878,8 +3878,6 @@ static void icl_disable_transcoder_port_sync(const struct
intel_crtc_state *old_
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- i915_reg_t reg;
- u32 trans_ddi_func_ctl2_val;
if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
return;
@@ -3887,10 +3885,7 @@ static void icl_disable_transcoder_port_sync(const
struct intel_crtc_state *old_
DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
transcoder_name(old_crtc_state->cpu_transcoder));
- reg = TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder);
- trans_ddi_func_ctl2_val = ~(PORT_SYNC_MODE_ENABLE |
- PORT_SYNC_MODE_MASTER_SELECT_MASK);
- I915_WRITE(reg, trans_ddi_func_ctl2_val);
+ I915_WRITE(TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
}
static void intel_ddi_post_disable(struct intel_encoder *encoder,
--
2.19.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Apply sanitiization just before resume
== Series Details == Series: drm/i915/gt: Apply sanitiization just before resume URL : https://patchwork.freedesktop.org/series/71334/ State : success == Summary == CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15905 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/index.html Known issues Here are the changes found in Patchwork_15905 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-guc: [PASS][1] -> [INCOMPLETE][2] ([i915#505] / [i915#671]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][3] -> [FAIL][4] ([fdo#111096] / [i915#323]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [INCOMPLETE][5] ([i915#505]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][7] ([i915#725]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_execlists: - fi-kbl-soraka: [DMESG-FAIL][9] ([i915#656]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-kbl-soraka/igt@i915_selftest@live_execlists.html Warnings * igt@kms_busy@basic-flip-pipe-b: - fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][12] ([i915#62] / [i915#92]) +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][13] ([i915#62] / [i915#92]) -> [DMESG-WARN][14] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html * igt@runner@aborted: - fi-kbl-8809g: [FAIL][15] ([i915#858]) -> [FAIL][16] ([i915#192] / [i915#193] / [i915#194]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-8809g/igt@run...@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15905/fi-kbl-8809g/igt@run...@aborted.html [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [i915#192]: https://gitlab.freedesktop.org/drm/intel/issues/192 [i915#193]: https://gitlab.freedesktop.org/drm/intel/issues/193 [i915#194]: https://gitlab.freedesktop.org/drm/intel/issues/194 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#858]: https://gitlab.freedesktop.org/drm/intel/issues/858 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95 Participating hosts (43 -> 39) -- Additional (8): fi-byt-j1900 fi-skl-6770hq fi-glk-dsi fi-whl-u fi-gdg-551 fi-ivb-3770 fi-bsw-nick fi-snb-2600 Missing(12): fi-ilk-m540 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-ilk-650 fi-snb-2520m fi-ctg-p8600 fi-skl-lmem fi-bdw-samus fi-byt-clapper fi-skl-6600u Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7630 -> Patchwork_15905 CI-20190529: 20190529 CI_DRM_7630:
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add spaces before compound GEM_TRACE
On Mon, Dec 23, 2019 at 09:54:55PM +, Chris Wilson wrote:
Quoting Lucas De Marchi (2019-12-23 21:23:36)
On Mon, Dec 23, 2019 at 08:44:10PM +, Chris Wilson wrote:
>Add a space between the prefixed format and the users format so that the
>join are not mistakenly combined into one long word.
>
>Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
>Signed-off-by: Chris Wilson
>Cc: Venkata Sandeep Dhanalakota
>---
> drivers/gpu/drm/i915/gt/intel_context.h | 2 +-
> drivers/gpu/drm/i915/i915_request.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
>index 1d4a1b1357cf..0f5ae4ff3b10 100644
>--- a/drivers/gpu/drm/i915/gt/intel_context.h
>+++ b/drivers/gpu/drm/i915/gt/intel_context.h
>@@ -19,7 +19,7 @@
>
> #define CE_TRACE(ce, fmt, ...) do { \
> const struct intel_context *ce__ = (ce);\
>- ENGINE_TRACE(ce__->engine, "context:%llx" fmt, \
>+ ENGINE_TRACE(ce__->engine, "context:%llx " fmt, \
>ce__->timeline->fence_context, \
>##__VA_ARGS__);\
> } while (0)
>diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
>index 565322640378..9784421a3b4d 100644
>--- a/drivers/gpu/drm/i915/i915_request.h
>+++ b/drivers/gpu/drm/i915/i915_request.h
>@@ -51,7 +51,7 @@ struct i915_capture_list {
>
> #define RQ_TRACE(rq, fmt, ...) do { \
> const struct i915_request *rq__ = (rq); \
>- ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d" fmt, \
>+ ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
do we care about the trailing space if fmt is "\n"?
No. An extra space in a debug log, which you only see when something
blows up and only compiled in for CI, is the last of your worries.
oh, ok. This in the end uses trace_printk().
Reviewed-by: Lucas De Marchi
Lucas De Marchi
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
== Series Details ==
Series: drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
URL : https://patchwork.freedesktop.org/series/71333/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15904
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/index.html
Known issues
Here are the changes found in Patchwork_15904 that come from known issues:
### IGT changes ###
Possible fixes
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][1] ([i915#656]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][3] -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][5] ([i915#725]) -> [DMESG-FAIL][6]
([i915#553] / [i915#725])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][7] ([i915#62] / [i915#92]) ->
[DMESG-WARN][8] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][10] ([i915#62] / [i915#92]) +6 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (43 -> 38)
--
Additional (6): fi-hsw-4770r fi-skl-6770hq fi-glk-dsi fi-whl-u fi-gdg-551
fi-bsw-nick
Missing(11): fi-ilk-m540 fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan
fi-ctg-p8600 fi-elk-e7500 fi-bsw-kefka fi-blb-e6850 fi-tgl-y fi-byt-clapper
fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7630 -> Patchwork_15904
CI-20190529: 20190529
CI_DRM_7630: 28a2aa0ebf1520ea8a0dd89299f7ceea80dfd96f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5352: 0586d205f651674e575351c2d5a7d0760716c9f1 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15904: 2b0d3ef83ecb2836ee9d264a1fa9ebcd4c68649b @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2b0d3ef83ecb drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15904/index.html
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Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add spaces before compound GEM_TRACE
Quoting Lucas De Marchi (2019-12-23 21:23:36)
> On Mon, Dec 23, 2019 at 08:44:10PM +, Chris Wilson wrote:
> >Add a space between the prefixed format and the users format so that the
> >join are not mistakenly combined into one long word.
> >
> >Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
> >Signed-off-by: Chris Wilson
> >Cc: Venkata Sandeep Dhanalakota
> >---
> > drivers/gpu/drm/i915/gt/intel_context.h | 2 +-
> > drivers/gpu/drm/i915/i915_request.h | 2 +-
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
> >b/drivers/gpu/drm/i915/gt/intel_context.h
> >index 1d4a1b1357cf..0f5ae4ff3b10 100644
> >--- a/drivers/gpu/drm/i915/gt/intel_context.h
> >+++ b/drivers/gpu/drm/i915/gt/intel_context.h
> >@@ -19,7 +19,7 @@
> >
> > #define CE_TRACE(ce, fmt, ...) do { \
> > const struct intel_context *ce__ = (ce);\
> >- ENGINE_TRACE(ce__->engine, "context:%llx" fmt, \
> >+ ENGINE_TRACE(ce__->engine, "context:%llx " fmt, \
> >ce__->timeline->fence_context, \
> >##__VA_ARGS__);\
> > } while (0)
> >diff --git a/drivers/gpu/drm/i915/i915_request.h
> >b/drivers/gpu/drm/i915/i915_request.h
> >index 565322640378..9784421a3b4d 100644
> >--- a/drivers/gpu/drm/i915/i915_request.h
> >+++ b/drivers/gpu/drm/i915/i915_request.h
> >@@ -51,7 +51,7 @@ struct i915_capture_list {
> >
> > #define RQ_TRACE(rq, fmt, ...) do { \
> > const struct i915_request *rq__ = (rq); \
> >- ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d" fmt, \
> >+ ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
>
> do we care about the trailing space if fmt is "\n"?
No. An extra space in a debug log, which you only see when something
blows up and only compiled in for CI, is the last of your worries.
-Chris
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[Intel-gfx] [PATCH] drm/i915/gt: Apply sanitiization just before resume
Bring sanitization completely underneath the umbrella of intel_gt, and
perform it exclusively after suspend and before the next resume.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt.c| 2 --
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 15 +++
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 2 --
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 --
5 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index ec84b5e62fef..28a9bea5b4fa 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -38,8 +38,6 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)
{
gt->ggtt = ggtt;
-
- intel_gt_sanitize(gt, false);
}
static void init_unused_ring(struct intel_gt *gt, u32 base)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 45b68a17da4d..9fb4752c38dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -126,17 +126,7 @@ static bool reset_engines(struct intel_gt *gt)
return __intel_gt_reset(gt, ALL_ENGINES) == 0;
}
-/**
- * intel_gt_sanitize: called after the GPU has lost power
- * @gt: the i915 GT container
- * @force: ignore a failed reset and sanitize engine state anyway
- *
- * Anytime we reset the GPU, either with an explicit GPU reset or through a
- * PCI power cycle, the GPU loses state and we must reset our state tracking
- * to match. Note that calling intel_gt_sanitize() if the GPU has not
- * been reset results in much confusion!
- */
-void intel_gt_sanitize(struct intel_gt *gt, bool force)
+static void gt_sanitize(struct intel_gt *gt, bool force)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -201,6 +191,7 @@ int intel_gt_resume(struct intel_gt *gt)
intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
intel_rc6_sanitize(>rc6);
+ gt_sanitize(gt, true);
/* Only when the HW is re-initialised, can we replay the requests */
err = intel_gt_init_hw(gt);
@@ -315,7 +306,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
intel_llc_disable(>llc);
}
- intel_gt_sanitize(gt, false);
+ gt_sanitize(gt, false);
GT_TRACE(gt, "\n");
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index 4a9e48c12bd4..60f0e2fbe55c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -51,8 +51,6 @@ void intel_gt_pm_init_early(struct intel_gt *gt);
void intel_gt_pm_init(struct intel_gt *gt);
void intel_gt_pm_fini(struct intel_gt *gt);
-void intel_gt_sanitize(struct intel_gt *gt, bool force);
-
void intel_gt_suspend_prepare(struct intel_gt *gt);
void intel_gt_suspend_late(struct intel_gt *gt);
int intel_gt_resume(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 59525094d0e3..9f75e03368c4 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1817,8 +1817,6 @@ static int i915_drm_resume(struct drm_device *dev)
disable_rpm_wakeref_asserts(_priv->runtime_pm);
- intel_gt_sanitize(_priv->gt, true);
-
ret = i915_ggtt_enable_hw(dev_priv);
if (ret)
DRM_ERROR("failed to re-enable GGTT\n");
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c
b/drivers/gpu/drm/i915/selftests/i915_gem.c
index b37fc53973cc..78f36faf2bbe 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -124,8 +124,6 @@ static void pm_resume(struct drm_i915_private *i915)
* that runtime-pm just works.
*/
with_intel_runtime_pm(>runtime_pm, wakeref) {
- intel_gt_sanitize(>gt, false);
-
i915_gem_restore_gtt_mappings(i915);
i915_gem_restore_fences(>ggtt);
--
2.24.1
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Re: [Intel-gfx] [PATCH 3/9] drm/i915/display: prefer the more common dig_port name
On Mon, Dec 23, 2019 at 01:16:56PM -0800, Matt Roper wrote:
On Mon, Dec 23, 2019 at 11:58:44AM -0800, Lucas De Marchi wrote:
intel_ddi.c uses a mix of dport and dig_port as variable for
intel_digital_port, with the latter being more frequent. In some cases
we were also using intel_dport to make it worse. intel_dpio_phy.c had
standardized on dport, but overall dig_port is much more common.
Standardize on dig_port.
This is the only place in the driver where we refer to a
intel_digital_port as intel_dport. Let's use the same name everywhere:
dig_port.
The second paragraph here seems redundant (and sounds like it might have
been the commit message for a second commit you squashed into the first
since the "This" is ambigous).
yes, I reworded the commit message and forgot to remove this part.
Thanks for catching it.
Also, there are still a bunch of remaining intel_dig_port
parameters/variables. Maybe we want an additional patch to drop the
intel_ prefix from those and make everything consistent? At this point
I think we've dropped the intel_ prefix from most/all of our crtcs,
planes, etc. so it probably makes sense to do the same here with
dig_ports.
Agreed.
thanks
Lucas De Marchi
Matt
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 30 +++
drivers/gpu/drm/i915/display/intel_display.c | 6 +--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../drm/i915/display/intel_display_power.c| 4 +-
.../drm/i915/display/intel_display_types.h| 8 ++--
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 38 +--
drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +-
7 files changed, 54 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index f054c82214c0..1bdf63845472 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2900,9 +2900,9 @@ static u32 intel_ddi_dp_level(struct intel_dp *intel_dp)
u32 bxt_signal_levels(struct intel_dp *intel_dp)
{
- struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
- struct intel_encoder *encoder = >base;
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ struct intel_encoder *encoder = _port->base;
int level = intel_ddi_dp_level(intel_dp);
if (INTEL_GEN(dev_priv) >= 12)
@@ -2921,9 +2921,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp)
u32 ddi_signal_levels(struct intel_dp *intel_dp)
{
- struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
- struct intel_encoder *encoder = >base;
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ struct intel_encoder *encoder = _port->base;
int level = intel_ddi_dp_level(intel_dp);
if (IS_GEN9_BC(dev_priv))
@@ -4721,14 +4721,14 @@ intel_ddi_init_hdmi_connector(struct intel_digital_port
*intel_dig_port)
return connector;
}
-static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
+static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
- if (dport->base.port != PORT_A)
+ if (dig_port->base.port != PORT_A)
return false;
- if (dport->saved_port_bits & DDI_A_4_LANES)
+ if (dig_port->saved_port_bits & DDI_A_4_LANES)
return false;
/* Broxton/Geminilake: Bspec says that DDI_A_4_LANES is the only
@@ -4750,10 +4750,10 @@ static bool intel_ddi_a_force_4_lanes(struct
intel_digital_port *dport)
}
static int
-intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
+intel_ddi_max_lanes(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *dev_priv = to_i915(intel_dport->base.base.dev);
- enum port port = intel_dport->base.port;
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ enum port port = dig_port->base.port;
int max_lanes = 4;
if (INTEL_GEN(dev_priv) >= 11)
@@ -4772,9 +4772,9 @@ intel_ddi_max_lanes(struct intel_digital_port
*intel_dport)
* wasn't lit up at boot. Force this bit set when needed
* so we use the proper lane count for our calculations.
*/
- if (intel_ddi_a_force_4_lanes(intel_dport)) {
+ if (intel_ddi_a_force_4_lanes(dig_port)) {
DRM_DEBUG_KMS("Forcing DDI_A_4_LANES for port A\n");
- intel_dport->saved_port_bits |= DDI_A_4_LANES;
+
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Add spaces before compound GEM_TRACE
On Mon, Dec 23, 2019 at 08:44:10PM +, Chris Wilson wrote:
Add a space between the prefixed format and the users format so that the
join are not mistakenly combined into one long word.
Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
Signed-off-by: Chris Wilson
Cc: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_context.h | 2 +-
drivers/gpu/drm/i915/i915_request.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 1d4a1b1357cf..0f5ae4ff3b10 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -19,7 +19,7 @@
#define CE_TRACE(ce, fmt, ...) do { \
const struct intel_context *ce__ = (ce);\
- ENGINE_TRACE(ce__->engine, "context:%llx" fmt, \
+ ENGINE_TRACE(ce__->engine, "context:%llx " fmt,\
ce__->timeline->fence_context, \
##__VA_ARGS__);\
} while (0)
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index 565322640378..9784421a3b4d 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -51,7 +51,7 @@ struct i915_capture_list {
#define RQ_TRACE(rq, fmt, ...) do { \
const struct i915_request *rq__ = (rq); \
- ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d" fmt, \
+ ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
do we care about the trailing space if fmt is "\n"?
Lucas De Marchi
rq__->fence.context, rq__->fence.seqno, \
hwsp_seqno(rq__), ##__VA_ARGS__); \
} while (0)
--
2.24.1
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Add spaces before compound GEM_TRACE
== Series Details ==
Series: series starting with [1/2] drm/i915: Add spaces before compound
GEM_TRACE
URL : https://patchwork.freedesktop.org/series/71331/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15903
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/index.html
Known issues
Here are the changes found in Patchwork_15903 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@basic:
- fi-tgl-y: [PASS][1] -> [INCOMPLETE][2] ([fdo#111593])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-y/igt@gem_exec_gttf...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-tgl-y/igt@gem_exec_gttf...@basic.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2: [PASS][3] -> [INCOMPLETE][4] ([i915#671])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111407])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [PASS][7] -> [DMESG-WARN][8] ([i915#44])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][9] ([fdo#111736]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-8700k: [INCOMPLETE][11] ([i915#505]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][13] ([i915#656]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
Warnings
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][15] ([i915#725]) -> [DMESG-FAIL][16]
([i915#563])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][18] ([i915#62] / [i915#92]) +5 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) ->
[DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15903/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-legacy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
[fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
Re: [Intel-gfx] [PATCH 3/9] drm/i915/display: prefer the more common dig_port name
On Mon, Dec 23, 2019 at 11:58:44AM -0800, Lucas De Marchi wrote:
> intel_ddi.c uses a mix of dport and dig_port as variable for
> intel_digital_port, with the latter being more frequent. In some cases
> we were also using intel_dport to make it worse. intel_dpio_phy.c had
> standardized on dport, but overall dig_port is much more common.
> Standardize on dig_port.
>
> This is the only place in the driver where we refer to a
> intel_digital_port as intel_dport. Let's use the same name everywhere:
> dig_port.
The second paragraph here seems redundant (and sounds like it might have
been the commit message for a second commit you squashed into the first
since the "This" is ambigous).
Also, there are still a bunch of remaining intel_dig_port
parameters/variables. Maybe we want an additional patch to drop the
intel_ prefix from those and make everything consistent? At this point
I think we've dropped the intel_ prefix from most/all of our crtcs,
planes, etc. so it probably makes sense to do the same here with
dig_ports.
Matt
>
> Signed-off-by: Lucas De Marchi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 30 +++
> drivers/gpu/drm/i915/display/intel_display.c | 6 +--
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> .../drm/i915/display/intel_display_power.c| 4 +-
> .../drm/i915/display/intel_display_types.h| 8 ++--
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 38 +--
> drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +-
> 7 files changed, 54 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index f054c82214c0..1bdf63845472 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2900,9 +2900,9 @@ static u32 intel_ddi_dp_level(struct intel_dp *intel_dp)
>
> u32 bxt_signal_levels(struct intel_dp *intel_dp)
> {
> - struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
> - struct intel_encoder *encoder = >base;
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> + struct intel_encoder *encoder = _port->base;
> int level = intel_ddi_dp_level(intel_dp);
>
> if (INTEL_GEN(dev_priv) >= 12)
> @@ -2921,9 +2921,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp)
>
> u32 ddi_signal_levels(struct intel_dp *intel_dp)
> {
> - struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
> - struct intel_encoder *encoder = >base;
> + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> + struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> + struct intel_encoder *encoder = _port->base;
> int level = intel_ddi_dp_level(intel_dp);
>
> if (IS_GEN9_BC(dev_priv))
> @@ -4721,14 +4721,14 @@ intel_ddi_init_hdmi_connector(struct
> intel_digital_port *intel_dig_port)
> return connector;
> }
>
> -static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
> +static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dig_port)
> {
> - struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
> + struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
>
> - if (dport->base.port != PORT_A)
> + if (dig_port->base.port != PORT_A)
> return false;
>
> - if (dport->saved_port_bits & DDI_A_4_LANES)
> + if (dig_port->saved_port_bits & DDI_A_4_LANES)
> return false;
>
> /* Broxton/Geminilake: Bspec says that DDI_A_4_LANES is the only
> @@ -4750,10 +4750,10 @@ static bool intel_ddi_a_force_4_lanes(struct
> intel_digital_port *dport)
> }
>
> static int
> -intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
> +intel_ddi_max_lanes(struct intel_digital_port *dig_port)
> {
> - struct drm_i915_private *dev_priv = to_i915(intel_dport->base.base.dev);
> - enum port port = intel_dport->base.port;
> + struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> + enum port port = dig_port->base.port;
> int max_lanes = 4;
>
> if (INTEL_GEN(dev_priv) >= 11)
> @@ -4772,9 +4772,9 @@ intel_ddi_max_lanes(struct intel_digital_port
> *intel_dport)
>* wasn't lit up at boot. Force this bit set when needed
>* so we use the proper lane count for our calculations.
>*/
> - if (intel_ddi_a_force_4_lanes(intel_dport)) {
> + if (intel_ddi_a_force_4_lanes(dig_port)) {
> DRM_DEBUG_KMS("Forcing DDI_A_4_LANES for port A\n");
> - intel_dport->saved_port_bits |= DDI_A_4_LANES;
> + dig_port->saved_port_bits |= DDI_A_4_LANES;
> max_lanes = 4;
> }
>
[Intel-gfx] [PATCH] drm/i915/gt: Flush other retirees inside intel_gt_retire_requests()
Our goal in wait_for_idle (intel_gt_retire_requests) is to the current
workload *and* their idle barriers. This requires us to notice the late
arrival of those, which is done by inspecting the list of active
timelines. However, if a concurrent retirer is running that new timeline
may not be added until after we drop the lock -- so flush concurrent
retirers before we take the lock and inspect the list.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/878
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 9e75fa1b6bc1..fc691c130ba6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -26,21 +26,18 @@ static bool retire_requests(struct intel_timeline *tl)
return !i915_active_fence_isset(>last_request);
}
-static bool flush_submission(struct intel_gt *gt)
+static void flush_submission(struct intel_gt *gt)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
- bool active = false;
if (!intel_gt_pm_is_awake(gt))
- return false;
+ return;
for_each_engine(engine, gt, id) {
- active |= intel_engine_flush_submission(engine);
- active |= flush_work(>retire_work);
+ intel_engine_flush_submission(engine);
+ flush_work(>retire_work);
}
-
- return active;
}
static void engine_retire(struct work_struct *work)
@@ -126,7 +123,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
timeout = -timeout, interruptible = false;
flush_submission(gt); /* kick the ksoftirqd tasklets */
-
spin_lock(>lock);
list_for_each_entry_safe(tl, tn, >active_list, link) {
if (!mutex_trylock(>mutex)) {
@@ -153,6 +149,7 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
active_count += !retire_requests(tl);
+ flush_submission(gt); /* sync with concurrent retirees */
spin_lock(>lock);
/* Resume iteration after dropping lock */
@@ -173,9 +170,6 @@ long intel_gt_retire_requests_timeout(struct intel_gt *gt,
long timeout)
list_for_each_entry_safe(tl, tn, , link)
__intel_timeline_free(>kref);
- if (flush_submission(gt))
- active_count++;
-
return active_count ? timeout : 0;
}
--
2.24.1
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Re: [Intel-gfx] [PATCH 2/9] drm/i915/display: remove alias to dig_port
On Mon, Dec 23, 2019 at 11:58:43AM -0800, Lucas De Marchi wrote:
> We don't need intel_dig_port and dig_port to refer to the same thing.
> Prefer the latter.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c9ba7d7f3787..f054c82214c0 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3674,12 +3674,11 @@ static void intel_ddi_pre_enable_hdmi(struct
> intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> - struct intel_digital_port *intel_dig_port =
> enc_to_dig_port(>base);
> - struct intel_hdmi *intel_hdmi = _dig_port->hdmi;
> + struct intel_digital_port *dig_port = enc_to_dig_port(>base);
> + struct intel_hdmi *intel_hdmi = _port->hdmi;
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> enum port port = encoder->port;
> int level = intel_ddi_hdmi_level(dev_priv, port);
> - struct intel_digital_port *dig_port = enc_to_dig_port(>base);
>
> intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
> intel_ddi_clk_select(encoder, crtc_state);
> @@ -3709,9 +3708,8 @@ static void intel_ddi_pre_enable_hdmi(struct
> intel_encoder *encoder,
>
> intel_ddi_enable_pipe_clock(crtc_state);
>
> - intel_dig_port->set_infoframes(encoder,
> -crtc_state->has_infoframe,
> -crtc_state, conn_state);
> + dig_port->set_infoframes(encoder, crtc_state->has_infoframe,
> + crtc_state, conn_state);
> }
>
> static void intel_ddi_pre_enable(struct intel_encoder *encoder,
> --
> 2.24.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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Re: [Intel-gfx] [PATCH] drm/i915/display: nuke skl workaround for pre-production hw
On Fri, Dec 20, 2019 at 10:11:15PM +, Chris Wilson wrote:
Quoting Lucas De Marchi (2019-12-20 22:06:50)
According to intel_detect_preproduction_hw(), the SKL steeping D0 is
still pre-preproduction so we can nuke the additional workaround.
While at it, nuke dangling new line.
Signed-off-by: Lucas De Marchi
Ville and Jani are more likely to know if the pre-production comment is
telling porkies.
Bspec 7534 says "The DDIA port presence strap is not connected on the SKL A-C
steppings."
I would expect to catch a failure in CI if the spec was wrong. I can add
the bspec # to the commit message while fixing up the typos there.
Lucas De Marchi
-Chris
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index e6702b9b9117..4aa7dfa88c7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16018,14 +16018,8 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
if (intel_ddi_crt_present(dev_priv))
intel_crt_init(dev_priv);
- /*
-* Haswell uses DDI functions to detect digital outputs.
-* On SKL pre-D0 the strap isn't connected, so we assume
-* it's there.
-*/
found = I915_READ(DDI_BUF_CTL(PORT_A)) &
DDI_INIT_DISPLAY_DETECTED;
- /* WaIgnoreDDIAStrap: skl */
- if (found || IS_GEN9_BC(dev_priv))
+ if (found)
intel_ddi_init(dev_priv, PORT_A);
/* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
@@ -16046,7 +16040,6 @@ static void intel_setup_outputs(struct drm_i915_private
*dev_priv)
if (IS_GEN9_BC(dev_priv) &&
intel_bios_is_port_present(dev_priv, PORT_E))
intel_ddi_init(dev_priv, PORT_E);
-
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
--
2.24.0
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[Intel-gfx] ✗ Fi.CI.BAT: failure for RFC: display/ddi: keep register indexes in a table
== Series Details ==
Series: RFC: display/ddi: keep register indexes in a table
URL : https://patchwork.freedesktop.org/series/71330/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15902
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15902 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15902, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15902:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live_blt:
- fi-snb-2520m: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-snb-2520m/igt@i915_selftest@live_blt.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-snb-2520m/igt@i915_selftest@live_blt.html
Known issues
Here are the changes found in Patchwork_15902 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][3] -> [INCOMPLETE][4] ([i915#505] / [i915#671])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-6700k2: [PASS][5] -> [INCOMPLETE][6] ([i915#671])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
Possible fixes
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-8700k: [INCOMPLETE][7] ([i915#505]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [DMESG-FAIL][9] ([i915#656]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][13] ([i915#725]) -> [DMESG-FAIL][14]
([i915#563])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@kms_busy@basic-flip-pipe-b:
- fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][16] ([i915#62] / [i915#92]) +5 similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-kbl-x1275/igt@kms_b...@basic-flip-pipe-b.html
* igt@kms_flip@basic-flip-vs-modeset:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92]) ->
[DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15902/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#435]: https://gitlab.freedesktop.org/drm/intel/issues/435
[i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
[i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
[i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
[i915#92]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Add spaces before compound GEM_TRACE
== Series Details == Series: drm/i915: Add spaces before compound GEM_TRACE URL : https://patchwork.freedesktop.org/series/71328/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15901 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15901 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15901, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15901: ### IGT changes ### Possible regressions * igt@gem_exec_basic@basic-all: - fi-byt-n2820: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-byt-n2820/igt@gem_exec_ba...@basic-all.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-byt-n2820/igt@gem_exec_ba...@basic-all.html * igt@i915_selftest@live_execlists: - fi-whl-u: NOTRUN -> [FAIL][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-whl-u/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_gt_pm: - fi-bwr-2160:[PASS][4] -> [FAIL][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-bwr-2160/igt@i915_selftest@live_gt_pm.html Known issues Here are the changes found in Patchwork_15901 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-bxt-dsi: [PASS][6] -> [INCOMPLETE][7] ([fdo#103927]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_gem_contexts: - fi-byt-n2820: [PASS][8] -> [DMESG-FAIL][9] ([i915#722]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html * igt@kms_chamelium@dp-hpd-fast: - fi-icl-u2: [PASS][10] -> [DMESG-WARN][11] ([i915#289]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@kms_chamel...@dp-hpd-fast.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-icl-u2/igt@kms_chamel...@dp-hpd-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][12] -> [FAIL][13] ([fdo#111096] / [i915#323]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@i915_selftest@live_execlists: - fi-kbl-soraka: [DMESG-FAIL][14] ([i915#656]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-soraka/igt@i915_selftest@live_execlists.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-kbl-soraka/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_memory_region: - fi-bwr-2160:[FAIL][16] -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-bwr-2160/igt@i915_selftest@live_memory_region.html Warnings * igt@i915_selftest@live_blt: - fi-hsw-4770:[DMESG-FAIL][18] ([i915#725]) -> [DMESG-FAIL][19] ([i915#553] / [i915#725]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][21] ([i915#62] / [i915#92]) +5 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15901/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@basic-flip-after-cursor-legacy: - fi-kbl-x1275: [DMESG-WARN][22] ([i915#62] / [i915#92]) -> [DMESG-WARN][23] ([i915#62] / [i915#92]
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Add spaces before compound GEM_TRACE
== Series Details ==
Series: series starting with [1/2] drm/i915: Add spaces before compound
GEM_TRACE
URL : https://patchwork.freedesktop.org/series/71331/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a793707d6e12 drm/i915: Add spaces before compound GEM_TRACE
0e8083f32b63 drm/i915/gt: Convert the final GEM_TRACE to GT_TRACE and co
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+
chars of sha1> ("")' - ie: 'commit 639f2f24895f ("drm/i915:
Introduce new macros for tracing")'
#9:
References: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
total: 1 errors, 0 warnings, 0 checks, 69 lines checked
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[Intel-gfx] [PATCH 1/2] drm/i915: Add spaces before compound GEM_TRACE
Add a space between the prefixed format and the users format so that the
join are not mistakenly combined into one long word.
Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
Signed-off-by: Chris Wilson
Cc: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_context.h | 2 +-
drivers/gpu/drm/i915/i915_request.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 1d4a1b1357cf..0f5ae4ff3b10 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -19,7 +19,7 @@
#define CE_TRACE(ce, fmt, ...) do {\
const struct intel_context *ce__ = (ce);\
- ENGINE_TRACE(ce__->engine, "context:%llx" fmt, \
+ ENGINE_TRACE(ce__->engine, "context:%llx " fmt, \
ce__->timeline->fence_context, \
##__VA_ARGS__);\
} while (0)
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index 565322640378..9784421a3b4d 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -51,7 +51,7 @@ struct i915_capture_list {
#define RQ_TRACE(rq, fmt, ...) do {\
const struct i915_request *rq__ = (rq); \
- ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d" fmt, \
+ ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
rq__->fence.context, rq__->fence.seqno,\
hwsp_seqno(rq__), ##__VA_ARGS__); \
} while (0)
--
2.24.1
___
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[Intel-gfx] [PATCH 2/2] drm/i915/gt: Convert the final GEM_TRACE to GT_TRACE and co
Convert the few remaining GEM_TRACE() used for debugging over to the
appropriate GT_TRACE or RQ_TRACE.
References: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
Signed-off-by: Chris Wilson
Cc: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_reset.c | 21 -
1 file changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 1c51296646e0..5cade72c7701 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -147,11 +147,7 @@ static void mark_innocent(struct i915_request *rq)
void __i915_request_reset(struct i915_request *rq, bool guilty)
{
- GEM_TRACE("%s rq=%llx:%lld, guilty? %s\n",
- rq->engine->name,
- rq->fence.context,
- rq->fence.seqno,
- yesno(guilty));
+ RQ_TRACE(rq, "guilty? %s\n", yesno(guilty));
GEM_BUG_ON(i915_request_completed(rq));
@@ -625,7 +621,7 @@ int __intel_gt_reset(struct intel_gt *gt,
intel_engine_mask_t engine_mask)
*/
intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
for (retry = 0; ret == -ETIMEDOUT && retry < retries; retry++) {
- GEM_TRACE("engine_mask=%x\n", engine_mask);
+ GT_TRACE(gt, "engine_mask=%x\n", engine_mask);
preempt_disable();
ret = reset(gt, engine_mask, retry);
preempt_enable();
@@ -785,8 +781,7 @@ static void nop_submit_request(struct i915_request *request)
struct intel_engine_cs *engine = request->engine;
unsigned long flags;
- GEM_TRACE("%s fence %llx:%lld -> -EIO\n",
- engine->name, request->fence.context, request->fence.seqno);
+ RQ_TRACE(request, "-EIO\n");
dma_fence_set_error(>fence, -EIO);
spin_lock_irqsave(>active.lock, flags);
@@ -813,7 +808,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
intel_engine_dump(engine, , "%s\n", engine->name);
}
- GEM_TRACE("start\n");
+ GT_TRACE(gt, "start\n");
/*
* First, stop submission to hw, but do not yet complete requests by
@@ -844,7 +839,7 @@ static void __intel_gt_set_wedged(struct intel_gt *gt)
reset_finish(gt, awake);
- GEM_TRACE("end\n");
+ GT_TRACE(gt, "end\n");
}
void intel_gt_set_wedged(struct intel_gt *gt)
@@ -870,7 +865,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
if (test_bit(I915_WEDGED_ON_INIT, >reset.flags))
return false;
- GEM_TRACE("start\n");
+ GT_TRACE(gt, "start\n");
/*
* Before unwedging, make sure that all pending operations
@@ -932,7 +927,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
*/
intel_engines_reset_default_submission(gt);
- GEM_TRACE("end\n");
+ GT_TRACE(gt, "end\n");
smp_mb__before_atomic(); /* complete takeover before enabling execbuf */
clear_bit(I915_WEDGED, >reset.flags);
@@ -1007,7 +1002,7 @@ void intel_gt_reset(struct intel_gt *gt,
intel_engine_mask_t awake;
int ret;
- GEM_TRACE("flags=%lx\n", gt->reset.flags);
+ GT_TRACE(gt, "flags=%lx\n", gt->reset.flags);
might_sleep();
GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, >reset.flags));
--
2.24.1
___
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Re: [Intel-gfx] [PATCH] drm/i915/display: nuke skl workaround for pre-production hw
On Fri, Dec 20, 2019 at 02:06:50PM -0800, Lucas De Marchi wrote:
> According to intel_detect_preproduction_hw(), the SKL steeping D0 is
> still pre-preproduction so we can nuke the additional workaround.
>
> While at it, nuke dangling new line.
>
> Signed-off-by: Lucas De Marchi
Bspec 13626 agrees that everything up to and including F0 is
pre-production.
s/steeping/stepping/ in the commit message, but otherwise
Reviewed-by: Matt Roper
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 9 +
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e6702b9b9117..4aa7dfa88c7c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -16018,14 +16018,8 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> if (intel_ddi_crt_present(dev_priv))
> intel_crt_init(dev_priv);
>
> - /*
> - * Haswell uses DDI functions to detect digital outputs.
> - * On SKL pre-D0 the strap isn't connected, so we assume
> - * it's there.
> - */
> found = I915_READ(DDI_BUF_CTL(PORT_A)) &
> DDI_INIT_DISPLAY_DETECTED;
> - /* WaIgnoreDDIAStrap: skl */
> - if (found || IS_GEN9_BC(dev_priv))
> + if (found)
> intel_ddi_init(dev_priv, PORT_A);
>
> /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
> @@ -16046,7 +16040,6 @@ static void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> if (IS_GEN9_BC(dev_priv) &&
> intel_bios_is_port_present(dev_priv, PORT_E))
> intel_ddi_init(dev_priv, PORT_E);
> -
> } else if (HAS_PCH_SPLIT(dev_priv)) {
> int found;
>
> --
> 2.24.0
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
___
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Re-init lspcon after HPD if lspcon probe failed (rev2)
== Series Details ==
Series: drm/i915: Re-init lspcon after HPD if lspcon probe failed (rev2)
URL : https://patchwork.freedesktop.org/series/71314/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7630 -> Patchwork_15898
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15898 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15898, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15898:
### IGT changes ###
Possible regressions
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][1] -> [DMESG-WARN][2] +5 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] +5 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
Warnings
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [DMESG-WARN][5] ([IGT#4] / [i915#263]) ->
[DMESG-FAIL][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
Known issues
Here are the changes found in Patchwork_15898 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-dsi: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-lmem:[PASS][9] -> [INCOMPLETE][10] ([i915#671])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_gem_contexts:
- fi-byt-n2820: [PASS][11] -> [DMESG-FAIL][12] ([i915#722])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [PASS][13] -> [DMESG-WARN][14] ([i915#263])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
Possible fixes
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][15] ([fdo#111736]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-tgl-u/igt@gem_exec_cre...@basic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_module_load@reload:
- fi-icl-u2: [DMESG-WARN][17] ([i915#289]) -> [PASS][18] +2
similar issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-icl-u2/igt@i915_module_l...@reload.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-icl-u2/igt@i915_module_l...@reload.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][19] ([i915#725]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-hsw-4770/igt@i915_selftest@live_blt.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_memory_region:
- fi-bwr-2160:[FAIL][21] -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7630/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15898/fi-bwr-2160/igt@i915_selftest@live_memory_region.html
Warnings
* igt@gem_exec_suspend@basic-s4-devices:
-
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for RFC: display/ddi: keep register indexes in a table
== Series Details ==
Series: RFC: display/ddi: keep register indexes in a table
URL : https://patchwork.freedesktop.org/series/71330/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f9993b30fcc2 drm/i915/display: nuke skl workaround for pre-production hw
4ed40d08b95f drm/i915/display: remove alias to dig_port
ea2ec826034a drm/i915/display: prefer the more common dig_port name
7a1e8b409ea0 drm/i915/display: start description-based ddi initialization
409c886b29d7 drm/i915/display: move icl to description-based ddi init
ac1ca5913330 drm/i915/display: description-based initialization for remaining
ddi platforms
f385d919929d drm/i915/display: add phy, vbt and ddi indexes
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#9:
on to the other. Right now we already cover part of this by creating kind of
-:49: WARNING:LONG_LINE: line over 100 characters
#49: FILE: drivers/gpu/drm/i915/display/intel_display.c:16381:
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
-:50: WARNING:LONG_LINE: line over 100 characters
#50: FILE: drivers/gpu/drm/i915/display/intel_display.c:16382:
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
-:51: WARNING:LONG_LINE: line over 100 characters
#51: FILE: drivers/gpu/drm/i915/display/intel_display.c:16383:
+ { .name = "DDI TC1", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x0, .vbt_idx = 0x2, },
-:52: WARNING:LONG_LINE: line over 100 characters
#52: FILE: drivers/gpu/drm/i915/display/intel_display.c:16384:
+ { .name = "DDI TC2", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x1, .vbt_idx = 0x3, },
-:53: WARNING:LONG_LINE: line over 100 characters
#53: FILE: drivers/gpu/drm/i915/display/intel_display.c:16385:
+ { .name = "DDI TC3", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x2, .vbt_idx = 0x4, },
-:54: WARNING:LONG_LINE: line over 100 characters
#54: FILE: drivers/gpu/drm/i915/display/intel_display.c:16386:
+ { .name = "DDI TC4", .port = PORT_G, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x6, .phy_idx = 0x3, .vbt_idx = 0x5, },
-:55: WARNING:LONG_LINE: line over 100 characters
#55: FILE: drivers/gpu/drm/i915/display/intel_display.c:16387:
+ { .name = "DDI TC5", .port = PORT_H, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x7, .phy_idx = 0x4, .vbt_idx = 0x6, },
-:56: WARNING:LONG_LINE: line over 100 characters
#56: FILE: drivers/gpu/drm/i915/display/intel_display.c:16388:
+ { .name = "DDI TC6", .port = PORT_I, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x8, .phy_idx = 0x5, .vbt_idx = 0x7, },
-:70: WARNING:LONG_LINE: line over 100 characters
#70: FILE: drivers/gpu/drm/i915/display/intel_display.c:16397:
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
-:71: WARNING:LONG_LINE: line over 100 characters
#71: FILE: drivers/gpu/drm/i915/display/intel_display.c:16398:
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
-:72: WARNING:LONG_LINE: line over 100 characters
#72: FILE: drivers/gpu/drm/i915/display/intel_display.c:16399:
+ { .name = "DDI TC1", .port = PORT_C, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x2, .phy_idx = 0x0, .vbt_idx = 0x2, },
-:73: WARNING:LONG_LINE: line over 100 characters
#73: FILE: drivers/gpu/drm/i915/display/intel_display.c:16400:
+ { .name = "DDI TC2", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x1, .vbt_idx = 0x3, },
-:74: WARNING:LONG_LINE: line over 100 characters
#74: FILE: drivers/gpu/drm/i915/display/intel_display.c:16401:
+ { .name = "DDI TC3", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x2, .vbt_idx = 0x4, },
-:75: WARNING:LONG_LINE: line over 100 characters
#75: FILE: drivers/gpu/drm/i915/display/intel_display.c:16402:
+ { .name = "DDI TC4", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x3, .vbt_idx = 0x5, },
-:87: WARNING:LONG_LINE: line over 100 characters
#87: FILE: drivers/gpu/drm/i915/display/intel_display.c:16410:
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
-:88: WARNING:LONG_LINE: line over 100 characters
#88: FILE: drivers/gpu/drm/i915/display/intel_display.c:16411:
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
-:89: WARNING:LONG_LINE: line over 100 characters
#89: FILE: drivers/gpu/drm/i915/display/intel_display.c:16412:
+ { .name = "DDI C", .port
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for Prefer acronym for prefixes (rev2)
On Mon, Dec 23, 2019 at 07:34:16PM +, Patchwork wrote: == Series Details == Series: Prefer acronym for prefixes (rev2) URL : https://patchwork.freedesktop.org/series/71224/ State : failure == Summary == Applying: drm/i915: simplify prefixes on device_info Applying: drm/i915: prefer 3-letter acronym for pineview Applying: drm/i915: prefer 3-letter acronym for haswell Applying: drm/i915: prefer 3-letter acronym for skylake Applying: drm/i915: prefer 3-letter acronym for cannonlake Applying: drm/i915: prefer 3-letter acronym for icelake Applying: drm/i915: prefer 3-letter acronym for ironlake error: sha1 information is lacking or useless (drivers/gpu/drm/i915/display/intel_display.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0007 drm/i915: prefer 3-letter acronym for ironlake When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". poor bot, dim retip works ok here. I will wait to see if I get r-b before sending another rebase of these trivial changes. Lucas De Marchi ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/9] drm/i915/display: remove alias to dig_port
We don't need intel_dig_port and dig_port to refer to the same thing.
Prefer the latter.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index c9ba7d7f3787..f054c82214c0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3674,12 +3674,11 @@ static void intel_ddi_pre_enable_hdmi(struct
intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state
*conn_state)
{
- struct intel_digital_port *intel_dig_port =
enc_to_dig_port(>base);
- struct intel_hdmi *intel_hdmi = _dig_port->hdmi;
+ struct intel_digital_port *dig_port = enc_to_dig_port(>base);
+ struct intel_hdmi *intel_hdmi = _port->hdmi;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
int level = intel_ddi_hdmi_level(dev_priv, port);
- struct intel_digital_port *dig_port = enc_to_dig_port(>base);
intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
intel_ddi_clk_select(encoder, crtc_state);
@@ -3709,9 +3708,8 @@ static void intel_ddi_pre_enable_hdmi(struct
intel_encoder *encoder,
intel_ddi_enable_pipe_clock(crtc_state);
- intel_dig_port->set_infoframes(encoder,
- crtc_state->has_infoframe,
- crtc_state, conn_state);
+ dig_port->set_infoframes(encoder, crtc_state->has_infoframe,
+crtc_state, conn_state);
}
static void intel_ddi_pre_enable(struct intel_encoder *encoder,
--
2.24.0
___
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[Intel-gfx] [PATCH 0/9] RFC: display/ddi: keep register indexes in a table
First 3 commits are more or less independent from this RFC and pretty harmless "drive-by changes". For the others: my intention is to get rid of the never ending checks for platform to decide what to depending on the port and phy, conversions from port to phy, port to tc_port, etc. For that I decided to create a table-based initialization approach in which I keep the useful indexes for each platform: these indexes work similarly to what we have on the pll part. "enum port" is mostly a "driver thing" and when all the conversions take place, it would allow us to stop using the port as indexes to register or register bits. "enum tc_port", "enum phy", etc are not meaningful numbers from the spec POV and change with every other platform. I'm doing the conversion to use the new indexes, but the effort is paramount as the port <-> tc_port <-> phy, paired with the checks intel_phy_is_combo(), are everywhere, hence this RFC on the idea before I continue the conversions. Right now I'm keeping a intel_ddi_port_info inside intel_digital_port (see last commit). I first imagined I could ignore the dsi part and let it leave on its own world, but upon converting icl_dpclka_cfgcr0_clk_off() and icl_sanitize_encoder_pll_mapping() I noticed this is probably not true, since it re-uses the phy mapping. So, I would probably have to move the port_info to intel_encoder and make let the dsi init also fill it up or let the dsi init() call be part of the ddi init. IMO the latter is better, but pulls another great amount of work to complete. RFC: do you see other shortcomings? I think this provides a nice cleanup but others may disagree. Lucas De Marchi (9): drm/i915/display: nuke skl workaround for pre-production hw drm/i915/display: remove alias to dig_port drm/i915/display: prefer the more common dig_port name drm/i915/display: start description-based ddi initialization drm/i915/display: move icl to description-based ddi init drm/i915/display: description-based initialization for remaining ddi platforms drm/i915/display: add phy, vbt and ddi indexes drm/i915/display: refer to vbt info as vbt_port_info drm/i915/display: use port_info on intel_ddi_init drivers/gpu/drm/i915/display/intel_ddi.c | 93 +++ drivers/gpu/drm/i915/display/intel_ddi.h | 8 +- drivers/gpu/drm/i915/display/intel_display.c | 232 -- drivers/gpu/drm/i915/display/intel_display.h | 9 +- .../drm/i915/display/intel_display_power.c| 4 +- .../drm/i915/display/intel_display_types.h| 20 +- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 38 +-- drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +- 8 files changed, 269 insertions(+), 155 deletions(-) -- 2.24.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/9] drm/i915/display: prefer the more common dig_port name
intel_ddi.c uses a mix of dport and dig_port as variable for
intel_digital_port, with the latter being more frequent. In some cases
we were also using intel_dport to make it worse. intel_dpio_phy.c had
standardized on dport, but overall dig_port is much more common.
Standardize on dig_port.
This is the only place in the driver where we refer to a
intel_digital_port as intel_dport. Let's use the same name everywhere:
dig_port.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 30 +++
drivers/gpu/drm/i915/display/intel_display.c | 6 +--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../drm/i915/display/intel_display_power.c| 4 +-
.../drm/i915/display/intel_display_types.h| 8 ++--
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 38 +--
drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +-
7 files changed, 54 insertions(+), 54 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index f054c82214c0..1bdf63845472 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2900,9 +2900,9 @@ static u32 intel_ddi_dp_level(struct intel_dp *intel_dp)
u32 bxt_signal_levels(struct intel_dp *intel_dp)
{
- struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
- struct intel_encoder *encoder = >base;
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ struct intel_encoder *encoder = _port->base;
int level = intel_ddi_dp_level(intel_dp);
if (INTEL_GEN(dev_priv) >= 12)
@@ -2921,9 +2921,9 @@ u32 bxt_signal_levels(struct intel_dp *intel_dp)
u32 ddi_signal_levels(struct intel_dp *intel_dp)
{
- struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
- struct intel_encoder *encoder = >base;
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ struct intel_encoder *encoder = _port->base;
int level = intel_ddi_dp_level(intel_dp);
if (IS_GEN9_BC(dev_priv))
@@ -4721,14 +4721,14 @@ intel_ddi_init_hdmi_connector(struct intel_digital_port
*intel_dig_port)
return connector;
}
-static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dport)
+static bool intel_ddi_a_force_4_lanes(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
- if (dport->base.port != PORT_A)
+ if (dig_port->base.port != PORT_A)
return false;
- if (dport->saved_port_bits & DDI_A_4_LANES)
+ if (dig_port->saved_port_bits & DDI_A_4_LANES)
return false;
/* Broxton/Geminilake: Bspec says that DDI_A_4_LANES is the only
@@ -4750,10 +4750,10 @@ static bool intel_ddi_a_force_4_lanes(struct
intel_digital_port *dport)
}
static int
-intel_ddi_max_lanes(struct intel_digital_port *intel_dport)
+intel_ddi_max_lanes(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *dev_priv = to_i915(intel_dport->base.base.dev);
- enum port port = intel_dport->base.port;
+ struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+ enum port port = dig_port->base.port;
int max_lanes = 4;
if (INTEL_GEN(dev_priv) >= 11)
@@ -4772,9 +4772,9 @@ intel_ddi_max_lanes(struct intel_digital_port
*intel_dport)
* wasn't lit up at boot. Force this bit set when needed
* so we use the proper lane count for our calculations.
*/
- if (intel_ddi_a_force_4_lanes(intel_dport)) {
+ if (intel_ddi_a_force_4_lanes(dig_port)) {
DRM_DEBUG_KMS("Forcing DDI_A_4_LANES for port A\n");
- intel_dport->saved_port_bits |= DDI_A_4_LANES;
+ dig_port->saved_port_bits |= DDI_A_4_LANES;
max_lanes = 4;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 3b9011fd086c..04819b0bd494 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1606,13 +1606,13 @@ static void chv_disable_pll(struct drm_i915_private
*dev_priv, enum pipe pipe)
}
void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
-struct intel_digital_port *dport,
+struct intel_digital_port *dig_port,
unsigned int expected_mask)
{
u32 port_mask;
i915_reg_t dpll_reg;
- switch (dport->base.port) {
+ switch
[Intel-gfx] [PATCH 9/9] drm/i915/display: use port_info on intel_ddi_init
Now that we have tables for all platforms using ddi, keep the port_info
around so we can use it for decisions like "what phy does it have?"
instead of keep checking the platform/gen everywhere.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 36 ---
drivers/gpu/drm/i915/display/intel_ddi.h | 8 -
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_types.h| 3 ++
4 files changed, 35 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index a1b7075ea6be..9d06a34f5f8e 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4782,14 +4782,25 @@ intel_ddi_max_lanes(struct intel_digital_port *dig_port)
return max_lanes;
}
-void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
+bool __pure intel_ddi_has_tc_phy(const struct intel_digital_port *dig_port)
{
+ return dig_port->port_info->phy_type == PHY_TYPE_TC;
+}
+
+bool __pure intel_ddi_has_combo_phy(const struct intel_digital_port *dig_port)
+{
+ return dig_port->port_info->phy_type == PHY_TYPE_COMBO;
+}
+
+void intel_ddi_init(struct drm_i915_private *dev_priv,
+ const struct intel_ddi_port_info *port_info)
+{
+ enum port port = port_info->port;
struct ddi_vbt_port_info *vbt_port_info =
_priv->vbt.ddi_port_info[port];
struct intel_digital_port *intel_dig_port;
struct intel_encoder *encoder;
bool init_hdmi, init_dp, init_lspcon = false;
- enum phy phy = intel_port_to_phy(dev_priv, port);
init_hdmi = vbt_port_info->supports_dvi || vbt_port_info->supports_hdmi;
init_dp = vbt_port_info->supports_dp;
@@ -4803,12 +4814,12 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
init_dp = true;
init_lspcon = true;
init_hdmi = false;
- DRM_DEBUG_KMS("VBT says port %c has lspcon\n", port_name(port));
+ DRM_DEBUG_KMS("VBT says port %s has lspcon\n", port_info->name);
}
if (!init_dp && !init_hdmi) {
- DRM_DEBUG_KMS("VBT says port %c is not DVI/HDMI/DP compatible,
respect it\n",
- port_name(port));
+ DRM_DEBUG_KMS("VBT says %s is not DVI/HDMI/DP compatible,
respect it\n",
+ port_info->name);
return;
}
@@ -4819,7 +4830,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
encoder = _dig_port->base;
drm_encoder_init(_priv->drm, >base, _ddi_funcs,
-DRM_MODE_ENCODER_TMDS, "DDI %c", port_name(port));
+DRM_MODE_ENCODER_TMDS, port_info->name);
encoder->hotplug = intel_ddi_hotplug;
encoder->compute_output_type = intel_ddi_compute_output_type;
@@ -4837,7 +4848,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
encoder->type = INTEL_OUTPUT_DDI;
encoder->power_domain = intel_port_to_power_domain(port);
- encoder->port = port;
+ encoder->port = port_info->port;
encoder->cloneable = 0;
encoder->pipe_mask = ~0;
@@ -4851,8 +4862,9 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
intel_dig_port->dp.output_reg = INVALID_MMIO_REG;
intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port);
intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
+ intel_dig_port->port_info = port_info;
- if (intel_phy_is_tc(dev_priv, phy)) {
+ if (intel_ddi_has_tc_phy(intel_dig_port)) {
bool is_legacy = !vbt_port_info->supports_typec_usb &&
!vbt_port_info->supports_tbt;
@@ -4883,15 +4895,15 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
if (init_lspcon) {
if (lspcon_init(intel_dig_port))
/* TODO: handle hdmi info frame part */
- DRM_DEBUG_KMS("LSPCON init success on port %c\n",
- port_name(port));
+ DRM_DEBUG_KMS("LSPCON init success on port %s\n",
+ port_info->name);
else
/*
* LSPCON init faied, but DP init was success, so
* lets try to drive as DP++ port.
*/
- DRM_ERROR("LSPCON init failed on port %c\n",
- port_name(port));
+ DRM_ERROR("LSPCON init failed on port %s\n",
+ port_info->name);
}
intel_infoframe_init(intel_dig_port);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
[Intel-gfx] [PATCH 5/9] drm/i915/display: move icl to description-based ddi init
By adding a hook that determines if a port is present, we are able to
support Ice Lake in the new description-based DDI initialization.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 61 ++--
1 file changed, 42 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index b3fb1e03cb0b..6b4d320ff92c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16224,9 +16224,28 @@ static void intel_pps_init(struct drm_i915_private
*dev_priv)
struct intel_output {
/* Initialize DSI if present */
void (*dsi_init)(struct drm_i915_private *i915);
+
+ /*
+* Check if port is present before trying to initialize; if not provided
+* it's assumed the port is present (or we can't check and fail
+* gracefully
+*/
+ bool (*is_port_present)(struct drm_i915_private *i915,
+ const struct intel_ddi_port_info *port_info);
+
struct intel_ddi_port_info ddi_ports[];
};
+static bool icl_is_port_present(struct drm_i915_private *i915,
+ const struct intel_ddi_port_info *port_info)
+{
+ if (port_info->port != PORT_F)
+ return true;
+
+ return IS_ICL_WITH_PORT_F(i915) &&
+ intel_bios_is_port_present(i915, PORT_F);
+}
+
static const struct intel_output tgl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
@@ -16242,6 +16261,20 @@ static const struct intel_output tgl_output = {
}
};
+static const struct intel_output icl_output = {
+ .dsi_init = icl_dsi_init,
+ .is_port_present = icl_is_port_present,
+ .ddi_ports = {
+ { .port = PORT_A },
+ { .port = PORT_B },
+ { .port = PORT_C },
+ { .port = PORT_D },
+ { .port = PORT_E },
+ { .port = PORT_F },
+ { .port = PORT_NONE }
+ }
+};
+
static const struct intel_output ehl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
@@ -16276,12 +16309,19 @@ static void setup_ddi_outputs_desc(struct
drm_i915_private *i915)
output = _output;
else if (IS_ELKHARTLAKE(i915))
output = _output;
+ else if (IS_GEN(i915, 11))
+ output = _output;
else if (IS_GEN9_LP(i915))
output = _output;
for (port_info = output->ddi_ports;
-port_info->port != PORT_NONE; port_info++)
+port_info->port != PORT_NONE; port_info++) {
+ if (output->is_port_present &&
+ !output->is_port_present(i915, port_info))
+ continue;
+
intel_ddi_init(i915, port_info->port);
+ }
if (output->dsi_init)
output->dsi_init(i915);
@@ -16297,25 +16337,8 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return;
- if (INTEL_GEN(dev_priv) >= 12 || IS_ELKHARTLAKE(dev_priv) ||
- IS_GEN9_LP(dev_priv)) {
+ if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
setup_ddi_outputs_desc(dev_priv);
- } else if (IS_GEN(dev_priv, 11)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D);
- intel_ddi_init(dev_priv, PORT_E);
- /*
-* On some ICL SKUs port F is not present. No strap bits for
-* this, so rely on VBT.
-* Work around broken VBTs on SKUs known to have no port F.
-*/
- if (IS_ICL_WITH_PORT_F(dev_priv) &&
- intel_bios_is_port_present(dev_priv, PORT_F))
- intel_ddi_init(dev_priv, PORT_F);
-
- icl_dsi_init(dev_priv);
} else if (HAS_DDI(dev_priv)) {
int found;
--
2.24.0
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[Intel-gfx] [PATCH 7/9] drm/i915/display: add phy, vbt and ddi indexes
Identify 3 possible cases in which the index numbers can be different
from the "port" and add them to the description-based ddi initialization
table. This can be used in place of additional functions mapping from
on to the other. Right now we already cover part of this by creating kind of
virtual phy numbering, but that comes with downsides:
a) there's not really a "phy numbering" in the spec, this is purely a
software thing; hardware uses whatever they want thinking mapping from
one to the other arbitrarily is easy in software.
b) currently the mapping occurs on "leaf" functions, making the decision
based on the platform.
With this new table the approach will be: the port as defined by the
enum port is purely a driver convention and won't be used anymore to
define the register offset or register bits. For that we have the other
3 indexes, identified as being possibly different from the current usage
of register bits: ddi, vbt and phy. The phy type is also added here,
meant to replace the checks for combo vs tc (although the helper
functions can remain so we may differentiate between, e.g. Dekel and MG
phys).
While at it, also give names to the ports so they can be easily
identified.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 54 +--
drivers/gpu/drm/i915/display/intel_display.h | 7 +++
.../drm/i915/display/intel_display_types.h| 5 ++
3 files changed, 39 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index ad85cf75c815..219f180fa395 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16277,14 +16277,14 @@ static bool ddi_is_port_present(struct
drm_i915_private *i915,
static const struct intel_output tgl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_D },
- { .port = PORT_E },
- { .port = PORT_F },
- { .port = PORT_G },
- { .port = PORT_H },
- { .port = PORT_I },
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
+ { .name = "DDI TC1", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x0, .vbt_idx = 0x2, },
+ { .name = "DDI TC2", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x1, .vbt_idx = 0x3, },
+ { .name = "DDI TC3", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x2, .vbt_idx = 0x4, },
+ { .name = "DDI TC4", .port = PORT_G, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x6, .phy_idx = 0x3, .vbt_idx = 0x5, },
+ { .name = "DDI TC5", .port = PORT_H, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x7, .phy_idx = 0x4, .vbt_idx = 0x6, },
+ { .name = "DDI TC6", .port = PORT_I, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x8, .phy_idx = 0x5, .vbt_idx = 0x7, },
{ .port = PORT_NONE }
}
};
@@ -16293,12 +16293,12 @@ static const struct intel_output icl_output = {
.dsi_init = icl_dsi_init,
.is_port_present = icl_is_port_present,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_C },
- { .port = PORT_D },
- { .port = PORT_E },
- { .port = PORT_F },
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0, .phy_idx = 0x0, .vbt_idx = 0x0, },
+ { .name = "DDI B", .port = PORT_B, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x1, .phy_idx = 0x1, .vbt_idx = 0x1, },
+ { .name = "DDI TC1", .port = PORT_C, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x2, .phy_idx = 0x0, .vbt_idx = 0x2, },
+ { .name = "DDI TC2", .port = PORT_D, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x3, .phy_idx = 0x1, .vbt_idx = 0x3, },
+ { .name = "DDI TC3", .port = PORT_E, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x4, .phy_idx = 0x2, .vbt_idx = 0x4, },
+ { .name = "DDI TC4", .port = PORT_F, .phy_type = PHY_TYPE_TC,
.ddi_idx = 0x5, .phy_idx = 0x3, .vbt_idx = 0x5, },
{ .port = PORT_NONE }
}
};
@@ -16306,10 +16306,10 @@ static const struct intel_output icl_output = {
static const struct intel_output ehl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
- { .port = PORT_A },
- { .port = PORT_B },
- { .port = PORT_C },
- { .port = PORT_D },
+ { .name = "DDI A", .port = PORT_A, .phy_type =
PHY_TYPE_COMBO, .ddi_idx = 0x0,
[Intel-gfx] [PATCH 6/9] drm/i915/display: description-based initialization for remaining ddi platforms
Support remaining platforms under HAS_DDI() by providing a slightly more
complex is_port_present() hook. The downside is that now we call
I915_READ(SFUSE_STRAP) for each port being initialized, but that's only
on initialization: a few more mmio reads won't hurt.
Alternatives would be to provide one hook per port, or to have a
"pre_init()" hook that takes care of the mmio read. However I think this
is simpler - we may need to adapt if future platforms don't follow the
same initialization "template".
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 72 +---
1 file changed, 46 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 6b4d320ff92c..ad85cf75c815 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16246,6 +16246,34 @@ static bool icl_is_port_present(struct
drm_i915_private *i915,
intel_bios_is_port_present(i915, PORT_F);
}
+static bool ddi_is_port_present(struct drm_i915_private *i915,
+ const struct intel_ddi_port_info *port_info)
+{
+ /* keep I915_READ() happy */
+ struct drm_i915_private *dev_priv = i915;
+
+ if (port_info->port == PORT_A)
+ return I915_READ(DDI_BUF_CTL(PORT_A))
+ & DDI_INIT_DISPLAY_DETECTED;
+
+ if (port_info->port == PORT_E)
+ return IS_GEN9_BC(dev_priv) &&
+ intel_bios_is_port_present(i915, PORT_E);
+
+ switch (port_info->port) {
+ case PORT_B:
+ return I915_READ(SFUSE_STRAP) & SFUSE_STRAP_DDIB_DETECTED;
+ case PORT_C:
+ return I915_READ(SFUSE_STRAP) & SFUSE_STRAP_DDIC_DETECTED;
+ case PORT_D:
+ return I915_READ(SFUSE_STRAP) & SFUSE_STRAP_DDID_DETECTED;
+ case PORT_F:
+ return I915_READ(SFUSE_STRAP) & SFUSE_STRAP_DDIF_DETECTED;
+ default:
+ return false;
+ }
+}
+
static const struct intel_output tgl_output = {
.dsi_init = icl_dsi_init,
.ddi_ports = {
@@ -16296,11 +16324,24 @@ static const struct intel_output gen9lp_output = {
},
};
+static const struct intel_output ddi_output = {
+ .is_port_present = ddi_is_port_present,
+ .ddi_ports = {
+ { .port = PORT_A },
+ { .port = PORT_B },
+ { .port = PORT_C },
+ { .port = PORT_D },
+ { .port = PORT_E },
+ { .port = PORT_F },
+ { .port = PORT_NONE }
+ }
+};
+
/*
* Use a description-based approach for platforms that can be supported with a
* static table
*/
-static void setup_ddi_outputs_desc(struct drm_i915_private *i915)
+static void setup_ddi_outputs(struct drm_i915_private *i915)
{
const struct intel_output *output;
const struct intel_ddi_port_info *port_info;
@@ -16313,6 +16354,8 @@ static void setup_ddi_outputs_desc(struct
drm_i915_private *i915)
output = _output;
else if (IS_GEN9_LP(i915))
output = _output;
+ else
+ output = _output;
for (port_info = output->ddi_ports;
port_info->port != PORT_NONE; port_info++) {
@@ -16338,35 +16381,12 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
return;
if (INTEL_GEN(dev_priv) >= 11 || IS_GEN9_LP(dev_priv)) {
- setup_ddi_outputs_desc(dev_priv);
+ setup_ddi_outputs(dev_priv);
} else if (HAS_DDI(dev_priv)) {
- int found;
-
if (intel_ddi_crt_present(dev_priv))
intel_crt_init(dev_priv);
- found = I915_READ(DDI_BUF_CTL(PORT_A)) &
DDI_INIT_DISPLAY_DETECTED;
- if (found)
- intel_ddi_init(dev_priv, PORT_A);
-
- /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
-* register */
- found = I915_READ(SFUSE_STRAP);
-
- if (found & SFUSE_STRAP_DDIB_DETECTED)
- intel_ddi_init(dev_priv, PORT_B);
- if (found & SFUSE_STRAP_DDIC_DETECTED)
- intel_ddi_init(dev_priv, PORT_C);
- if (found & SFUSE_STRAP_DDID_DETECTED)
- intel_ddi_init(dev_priv, PORT_D);
- if (found & SFUSE_STRAP_DDIF_DETECTED)
- intel_ddi_init(dev_priv, PORT_F);
- /*
-* On SKL we don't have a way to detect DDI-E so we rely on VBT.
-*/
- if (IS_GEN9_BC(dev_priv) &&
- intel_bios_is_port_present(dev_priv, PORT_E))
- intel_ddi_init(dev_priv, PORT_E);
+ setup_ddi_outputs(dev_priv);
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
[Intel-gfx] [PATCH 4/9] drm/i915/display: start description-based ddi initialization
For the latest platforms we can share the logic to initialize the the
ddi, so start moving the most trivial ones to a new setup_outputs_desc()
function that will be responsible for initialization according to a
static const table.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 96 +--
.../drm/i915/display/intel_display_types.h| 4 +
2 files changed, 73 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 04819b0bd494..b3fb1e03cb0b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16221,6 +16221,72 @@ static void intel_pps_init(struct drm_i915_private
*dev_priv)
intel_pps_unlock_regs_wa(dev_priv);
}
+struct intel_output {
+ /* Initialize DSI if present */
+ void (*dsi_init)(struct drm_i915_private *i915);
+ struct intel_ddi_port_info ddi_ports[];
+};
+
+static const struct intel_output tgl_output = {
+ .dsi_init = icl_dsi_init,
+ .ddi_ports = {
+ { .port = PORT_A },
+ { .port = PORT_B },
+ { .port = PORT_D },
+ { .port = PORT_E },
+ { .port = PORT_F },
+ { .port = PORT_G },
+ { .port = PORT_H },
+ { .port = PORT_I },
+ { .port = PORT_NONE }
+ }
+};
+
+static const struct intel_output ehl_output = {
+ .dsi_init = icl_dsi_init,
+ .ddi_ports = {
+ { .port = PORT_A },
+ { .port = PORT_B },
+ { .port = PORT_C },
+ { .port = PORT_D },
+ { .port = PORT_NONE }
+ }
+};
+
+static const struct intel_output gen9lp_output = {
+ .dsi_init = vlv_dsi_init,
+ .ddi_ports = {
+ { .port = PORT_A },
+ { .port = PORT_B },
+ { .port = PORT_C },
+ { .port = PORT_NONE }
+ },
+};
+
+/*
+ * Use a description-based approach for platforms that can be supported with a
+ * static table
+ */
+static void setup_ddi_outputs_desc(struct drm_i915_private *i915)
+{
+ const struct intel_output *output;
+ const struct intel_ddi_port_info *port_info;
+
+ if (INTEL_GEN(i915) >= 12)
+ output = _output;
+ else if (IS_ELKHARTLAKE(i915))
+ output = _output;
+ else if (IS_GEN9_LP(i915))
+ output = _output;
+
+ for (port_info = output->ddi_ports;
+port_info->port != PORT_NONE; port_info++)
+ intel_ddi_init(i915, port_info->port);
+
+ if (output->dsi_init)
+ output->dsi_init(i915);
+}
+
static void intel_setup_outputs(struct drm_i915_private *dev_priv)
{
struct intel_encoder *encoder;
@@ -16231,22 +16297,9 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
return;
- if (INTEL_GEN(dev_priv) >= 12) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_D);
- intel_ddi_init(dev_priv, PORT_E);
- intel_ddi_init(dev_priv, PORT_F);
- intel_ddi_init(dev_priv, PORT_G);
- intel_ddi_init(dev_priv, PORT_H);
- intel_ddi_init(dev_priv, PORT_I);
- icl_dsi_init(dev_priv);
- } else if (IS_ELKHARTLAKE(dev_priv)) {
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
- intel_ddi_init(dev_priv, PORT_D);
- icl_dsi_init(dev_priv);
+ if (INTEL_GEN(dev_priv) >= 12 || IS_ELKHARTLAKE(dev_priv) ||
+ IS_GEN9_LP(dev_priv)) {
+ setup_ddi_outputs_desc(dev_priv);
} else if (IS_GEN(dev_priv, 11)) {
intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_B);
@@ -16263,17 +16316,6 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
intel_ddi_init(dev_priv, PORT_F);
icl_dsi_init(dev_priv);
- } else if (IS_GEN9_LP(dev_priv)) {
- /*
-* FIXME: Broxton doesn't support port detection via the
-* DDI_BUF_CTL_A or SFUSE_STRAP registers, find another way to
-* detect the ports.
-*/
- intel_ddi_init(dev_priv, PORT_A);
- intel_ddi_init(dev_priv, PORT_B);
- intel_ddi_init(dev_priv, PORT_C);
-
- vlv_dsi_init(dev_priv);
} else if (HAS_DDI(dev_priv)) {
int found;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index a3a067dacf84..4d2f4ee35812 100644
[Intel-gfx] [PATCH 1/9] drm/i915/display: nuke skl workaround for pre-production hw
According to intel_detect_preproduction_hw(), the SKL steeping D0 is
still pre-production so we can nuke the additional workaround.
While at it, nuke dangling new line.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_display.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 1860da0a493e..3b9011fd086c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16280,14 +16280,8 @@ static void intel_setup_outputs(struct
drm_i915_private *dev_priv)
if (intel_ddi_crt_present(dev_priv))
intel_crt_init(dev_priv);
- /*
-* Haswell uses DDI functions to detect digital outputs.
-* On SKL pre-D0 the strap isn't connected, so we assume
-* it's there.
-*/
found = I915_READ(DDI_BUF_CTL(PORT_A)) &
DDI_INIT_DISPLAY_DETECTED;
- /* WaIgnoreDDIAStrap: skl */
- if (found || IS_GEN9_BC(dev_priv))
+ if (found)
intel_ddi_init(dev_priv, PORT_A);
/* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP
@@ -16308,7 +16302,6 @@ static void intel_setup_outputs(struct drm_i915_private
*dev_priv)
if (IS_GEN9_BC(dev_priv) &&
intel_bios_is_port_present(dev_priv, PORT_E))
intel_ddi_init(dev_priv, PORT_E);
-
} else if (HAS_PCH_SPLIT(dev_priv)) {
int found;
--
2.24.0
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 8/9] drm/i915/display: refer to vbt info as vbt_port_info
Now that we maintain our static port info, rename the places that refer
to the port_info from vbt to use the vbt prefix. This is just a
preparation step for a following change in which we will use the
port_info variable name.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_ddi.c | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 1bdf63845472..a1b7075ea6be 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -902,7 +902,8 @@ icl_get_combo_buf_trans(struct drm_i915_private *dev_priv,
int type, int rate,
static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port
port)
{
- struct ddi_vbt_port_info *port_info =
_priv->vbt.ddi_port_info[port];
+ struct ddi_vbt_port_info *vbt_port_info =
+ _priv->vbt.ddi_port_info[port];
int n_entries, level, default_entry;
enum phy phy = intel_port_to_phy(dev_priv, port);
@@ -943,8 +944,8 @@ static int intel_ddi_hdmi_level(struct drm_i915_private
*dev_priv, enum port por
if (WARN_ON_ONCE(n_entries == 0))
return 0;
- if (port_info->hdmi_level_shift_set)
- level = port_info->hdmi_level_shift;
+ if (vbt_port_info->hdmi_level_shift_set)
+ level = vbt_port_info->hdmi_level_shift;
else
level = default_entry;
@@ -4783,15 +4784,15 @@ intel_ddi_max_lanes(struct intel_digital_port *dig_port)
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
{
- struct ddi_vbt_port_info *port_info =
+ struct ddi_vbt_port_info *vbt_port_info =
_priv->vbt.ddi_port_info[port];
struct intel_digital_port *intel_dig_port;
struct intel_encoder *encoder;
bool init_hdmi, init_dp, init_lspcon = false;
enum phy phy = intel_port_to_phy(dev_priv, port);
- init_hdmi = port_info->supports_dvi || port_info->supports_hdmi;
- init_dp = port_info->supports_dp;
+ init_hdmi = vbt_port_info->supports_dvi || vbt_port_info->supports_hdmi;
+ init_dp = vbt_port_info->supports_dp;
if (intel_bios_is_lspcon_present(dev_priv, port)) {
/*
@@ -4852,8 +4853,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv,
enum port port)
intel_dig_port->aux_ch = intel_bios_port_aux_ch(dev_priv, port);
if (intel_phy_is_tc(dev_priv, phy)) {
- bool is_legacy = !port_info->supports_typec_usb &&
-!port_info->supports_tbt;
+ bool is_legacy = !vbt_port_info->supports_typec_usb &&
+!vbt_port_info->supports_tbt;
intel_tc_port_init(intel_dig_port, is_legacy);
--
2.24.0
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[Intel-gfx] ✗ Fi.CI.BUILD: failure for Prefer acronym for prefixes (rev2)
== Series Details == Series: Prefer acronym for prefixes (rev2) URL : https://patchwork.freedesktop.org/series/71224/ State : failure == Summary == Applying: drm/i915: simplify prefixes on device_info Applying: drm/i915: prefer 3-letter acronym for pineview Applying: drm/i915: prefer 3-letter acronym for haswell Applying: drm/i915: prefer 3-letter acronym for skylake Applying: drm/i915: prefer 3-letter acronym for cannonlake Applying: drm/i915: prefer 3-letter acronym for icelake Applying: drm/i915: prefer 3-letter acronym for ironlake error: sha1 information is lacking or useless (drivers/gpu/drm/i915/display/intel_display.c). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0007 drm/i915: prefer 3-letter acronym for ironlake When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for DP Phy compliance auto test (rev4)
== Series Details == Series: DP Phy compliance auto test (rev4) URL : https://patchwork.freedesktop.org/series/71121/ State : failure == Summary == Applying: drm/dp: get/set phy compliance pattern Applying: drm/dp: get/set phy compliance pattern error: sha1 information is lacking or useless (include/drm/drm_dp_helper.h). error: could not build fake ancestor hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0002 drm/dp: get/set phy compliance pattern When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Plans for i915 GuC Submission with regards to IPTS/ME
On 12/18/19 10:01 AM, Maximilian Luz wrote: Hi, On 12/16/19 11:40 PM, Daniele Ceraolo Spurio wrote: Hi, I can't comment on the ITPS side since I have never looked at that side of things, but I can give you an overview of why we turned off GuC submission and what are the short/medium term plans for it. By any chance, do you have any idea if it's possible/who we could ask to get some more information or some sort of documentation about the IPTS/ME/touch-controller interfaces? This could maybe allow us to find some sort of work-around not involving GuC. Unfortunately I have no idea about the docs in this area since it is outside the graphics core. TL;DR: The GuC submission interface is changed enough that the code you have is no longer applicable. We're now focused on implementing support for the new interface to re-enable guc submission (gen12+), which is a prerequisite for what you need. IMO any ITPS support on the current tree will have to be postponed until then. The disabling of GuC submission was done because recent binaries (v30+) introduced significant non-backward compatible changes in the interface; given that GuC submission was still not an "official" feature and that even more intrusive interface changes are coming with the upcoming GuC v40+, we decided to just disable the feature for now and wait for all the changes to land on the GuC side before adding support back in. The plan is to re-enable support from either gen11 or gen12, so the gen9 platform will not have it, at least initially. It shouldn't bee too hard to add it in though since the great majority of the code is shared on both the GuC and the i915 side, so I wouldn't exclude us adding it in if there is demand for it. Thank you, this is quite helpful. As all devices that I know of using IPTS are gen9, GuC support for that generation would be great to have. In the mean-time however, I think we will have to try and figure out if we can find a work-around, maybe bypassing GuC somehow. If you only care about gen9, a possible solution would be to forward-port just the old GuC submission (instead of the whole i915) from a know working kernel. It shouldn't be too bad since the GuC code is relatively self-contained, but given the speed at which our submission code evolves there might be issue in the interactions between the old GuC code and the other parts of the submission flow. Just out of curiosity: Are the firmware-changes also done on Windows or is this purely Linux specific? Would be interesting to know if they have the same problem. No idea about the details of what goes on on Windows. The firmware is OS-agnostic, but they might be using a different version compared to us, especially on older platforms. Daniele The v40 firmware includes an almost complete rework of the submission interface, which is why, in preparation, we removed support from the driver for the legacy structures that are no longer used; we're also not going to use HW doorbells anymore and that's why those have been removed as well. I've had a look at the code in your github tree and most of the things you use are either gone from the interface or have been significantly updated, so I don't think there is an easy way to just port the patch to the new blobs and a significant rewrite is probably going to be required. Re-enabling GuC submission on the new interface, which is our current focus on the i915/GuC integration side, is a prerequisite for that, so IMO unfortunately you'll have to wait until the new interface support lands before any ITPS changes can be considered. I suspected that we'll likely have to do a substantial re-write of the driver, but it's nice to have confirmation for that so we can at least plan a bit ahead. Thank you again, Maximilian ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev12)
== Series Details ==
Series: Enable second DBuf slice for ICL and TGL (rev12)
URL : https://patchwork.freedesktop.org/series/70059/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7628 -> Patchwork_15897
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/index.html
Known issues
Here are the changes found in Patchwork_15897 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[PASS][1] -> [DMESG-FAIL][2] ([i915#553] / [i915#725])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-4770/igt@i915_selftest@live_blt.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-hsw-4770/igt@i915_selftest@live_blt.html
Possible fixes
* igt@gem_close_race@basic-threads:
- {fi-tgl-guc}: [INCOMPLETE][3] ([i915#435]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
- fi-byt-j1900: [TIMEOUT][5] ([i915#816]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
* igt@gem_exec_create@basic:
- {fi-tgl-u}: [INCOMPLETE][7] ([fdo#111736]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-tgl-u/igt@gem_exec_cre...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-tgl-u/igt@gem_exec_cre...@basic.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-dsi: [INCOMPLETE][9] ([fdo#103927]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770r: [DMESG-FAIL][11] ([i915#725]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-4770r/igt@i915_selftest@live_blt.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-hsw-4770r/igt@i915_selftest@live_blt.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][13] ([fdo#111407]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][15] ([i915#44]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Warnings
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-x1275: [DMESG-WARN][17] ([fdo#107139] / [i915#62] /
[i915#92]) -> [DMESG-WARN][18] ([fdo#107139] / [i915#62] / [i915#92] /
[i915#95])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][20] ([i915#62] / [i915#92]) +1 similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-kbl-x1275/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) ->
[DMESG-WARN][22] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15897/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#111407]:
Re: [Intel-gfx] [PATCH v2] drm/i915/lmem: debugfs for LMEM details
Hi Ramalingam,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[cannot apply to drm-tip/drm-tip v5.5-rc3 next-20191220]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Ramalingam-C/drm-i915-lmem-debugfs-for-LMEM-details/20191223-230416
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-g003-20191223 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-3) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_gem_object_info':
>> drivers/gpu/drm/i915/i915_debugfs.c:377:33: error: format '%llu' expects
>> argument of type 'long long unsigned int', but argument 3 has type
>> 'resource_size_t {aka unsigned int}' [-Werror=format=]
seq_printf(m, "LMEM total: %llu bytes, available %llu bytes\n",
~~~^
%u
drivers/gpu/drm/i915/i915_debugfs.c:377:55: error: format '%llu' expects
argument of type 'long long unsigned int', but argument 4 has type
'resource_size_t {aka unsigned int}' [-Werror=format=]
seq_printf(m, "LMEM total: %llu bytes, available %llu bytes\n",
~~~^
%u
cc1: all warnings being treated as errors
vim +377 drivers/gpu/drm/i915/i915_debugfs.c
366
367 static int i915_gem_object_info(struct seq_file *m, void *data)
368 {
369 struct drm_i915_private *i915 = node_to_i915(m->private);
370
371 seq_printf(m, "%u shrinkable [%u free] objects, %llu bytes\n",
372 i915->mm.shrink_count,
373 atomic_read(>mm.free_count),
374 i915->mm.shrink_memory);
375
376 if (HAS_LMEM(i915)) {
> 377 seq_printf(m, "LMEM total: %llu bytes, available %llu
> bytes\n",
378
READ_ONCE(i915->mm.regions[INTEL_REGION_LMEM]->total),
379
READ_ONCE(i915->mm.regions[INTEL_REGION_LMEM]->avail));
380 }
381
382 print_context_stats(m, i915);
383
384 return 0;
385 }
386
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org Intel Corporation
.config.gz
Description: application/gzip
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Tidy up checking active timelines during retirement (rev7)
== Series Details == Series: drm/i915/gt: Tidy up checking active timelines during retirement (rev7) URL : https://patchwork.freedesktop.org/series/71266/ State : success == Summary == CI Bug Log - changes from CI_DRM_7628 -> Patchwork_15896 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/index.html Known issues Here are the changes found in Patchwork_15896 that come from known issues: ### IGT changes ### Issues hit * igt@gem_close_race@basic-threads: - fi-byt-n2820: [PASS][1] -> [TIMEOUT][2] ([i915#816]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-byt-n2820/igt@gem_close_r...@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-byt-n2820/igt@gem_close_r...@basic-threads.html * igt@i915_module_load@reload-with-fault-injection: - fi-cfl-8700k: [PASS][3] -> [INCOMPLETE][4] ([i915#505]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-cfl-8700k/igt@i915_module_l...@reload-with-fault-injection.html - fi-skl-lmem:[PASS][5] -> [INCOMPLETE][6] ([i915#671]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-skl-lmem/igt@i915_module_l...@reload-with-fault-injection.html Possible fixes * igt@gem_close_race@basic-threads: - fi-byt-j1900: [TIMEOUT][7] ([i915#816]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][9] ([fdo#111407]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][11] ([i915#44]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html Warnings * igt@gem_exec_suspend@basic-s4-devices: - fi-kbl-x1275: [DMESG-WARN][13] ([fdo#107139] / [i915#62] / [i915#92]) -> [DMESG-WARN][14] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html * igt@i915_module_load@reload: - fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@i915_module_l...@reload.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-kbl-x1275/igt@i915_module_l...@reload.html * igt@i915_selftest@live_blt: - fi-hsw-4770r: [DMESG-FAIL][17] ([i915#725]) -> [DMESG-FAIL][18] ([i915#563]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-4770r/igt@i915_selftest@live_blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-hsw-4770r/igt@i915_selftest@live_blt.html * igt@kms_flip@basic-flip-vs-modeset: - fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][20] ([i915#62] / [i915#92]) +6 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15896/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44 [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505 [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62 [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671 [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725 [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816 [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92 [i915#95]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/2] drm/i915: Avoid cross-contanimation of intel_wakeref.work lockdep
== Series Details == Series: series starting with [CI,1/2] drm/i915: Avoid cross-contanimation of intel_wakeref.work lockdep URL : https://patchwork.freedesktop.org/series/71318/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7628 -> Patchwork_15895 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15895 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15895, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15895: ### IGT changes ### Possible regressions * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6600u: NOTRUN -> [DMESG-WARN][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_pm_rpm@module-reload: - fi-skl-6600u: NOTRUN -> [FAIL][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-skl-6600u/igt@i915_pm_...@module-reload.html Known issues Here are the changes found in Patchwork_15895 that come from known issues: ### IGT changes ### Issues hit * igt@i915_module_load@reload-with-fault-injection: - fi-skl-6700k2: [PASS][3] -> [INCOMPLETE][4] ([i915#671]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html * igt@i915_selftest@live_blt: - fi-hsw-4770:[PASS][5] -> [DMESG-FAIL][6] ([i915#725]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-4770/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-hsw-4770/igt@i915_selftest@live_blt.html * igt@i915_selftest@live_hangcheck: - fi-icl-u3: [PASS][7] -> [INCOMPLETE][8] ([fdo#108569] / [i915#140]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-icl-u3/igt@i915_selftest@live_hangcheck.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-icl-u3/igt@i915_selftest@live_hangcheck.html Possible fixes * igt@gem_close_race@basic-threads: - fi-byt-j1900: [TIMEOUT][9] ([i915#816]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-byt-j1900/igt@gem_close_r...@basic-threads.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-byt-j1900/igt@gem_close_r...@basic-threads.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][11] ([i915#44]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html Warnings * igt@gem_exec_suspend@basic-s4-devices: - fi-kbl-x1275: [DMESG-WARN][13] ([fdo#107139] / [i915#62] / [i915#92]) -> [DMESG-WARN][14] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-kbl-x1275: [DMESG-WARN][15] ([i915#62] / [i915#92]) -> [DMESG-WARN][16] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html * igt@kms_flip@basic-flip-vs-modeset: - fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][18] ([i915#62] / [i915#92]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15895/fi-kbl-x1275/igt@kms_f...@basic-flip-vs-modeset.html [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140 [i915#44]: https://gitlab.freedesktop.org/drm/intel/issues/44 [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v6,rebased,1/7] drm/i915/display: Share intel_connector_needs_modeset()
On Mon, 2019-12-23 at 17:03 +, Patchwork wrote: > == Series Details == > > Series: series starting with [v6,rebased,1/7] drm/i915/display: Share > intel_connector_needs_modeset() > URL : https://patchwork.freedesktop.org/series/71280/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_7623_full -> Patchwork_15891_full > > > Summary > --- > > **SUCCESS** > > No regressions found. Thanks for the reviews Ville, pushed to dinq. > > > > Known issues > > > Here are the changes found in Patchwork_15891_full that come from > known issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_ctx_shared@q-smoketest-bsd: > - shard-tglb: [PASS][1] -> [INCOMPLETE][2] ([i915#461]) >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb4/igt@gem_ctx_sha...@q-smoketest-bsd.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb3/igt@gem_ctx_sha...@q-smoketest-bsd.html > > * igt@gem_eio@reset-stress: > - shard-snb: [PASS][3] -> [FAIL][4] ([i915#232]) >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-snb4/igt@gem_...@reset-stress.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-snb6/igt@gem_...@reset-stress.html > > * igt@gem_exec_schedule@preempt-queue-chain-bsd2: > - shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([fdo#111677]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@gem_exec_sched...@preempt-queue-chain-bsd2.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb6/igt@gem_exec_sched...@preempt-queue-chain-bsd2.html > > * igt@gem_exec_schedule@preempt-queue-contexts-blt: > - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([fdo#111606] > / [fdo#111677]) >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@gem_exec_sched...@preempt-queue-contexts-blt.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb6/igt@gem_exec_sched...@preempt-queue-contexts-blt.html > > * igt@gem_exec_schedule@smoketest-all: > - shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#463]) >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb2/igt@gem_exec_sched...@smoketest-all.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb7/igt@gem_exec_sched...@smoketest-all.html > > * igt@gem_exec_schedule@smoketest-bsd2: > - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#707]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb2/igt@gem_exec_sched...@smoketest-bsd2.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb3/igt@gem_exec_sched...@smoketest-bsd2.html > > * igt@gem_sync@basic-each: > - shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([i915#472] > / [i915#707]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb1/igt@gem_s...@basic-each.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb4/igt@gem_s...@basic-each.html > > * igt@gem_sync@basic-store-all: > - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#472]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb5/igt@gem_s...@basic-store-all.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb3/igt@gem_s...@basic-store-all.html > > * igt@gem_workarounds@suspend-resume-context: > - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) > +2 similar issues >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-apl6/igt@gem_workarou...@suspend-resume-context.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-apl4/igt@gem_workarou...@suspend-resume-context.html > > * igt@i915_pm_backlight@fade_with_suspend: > - shard-tglb: [PASS][19] -> [INCOMPLETE][20] ([i915#456] > / [i915#460]) +1 similar issue >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb4/igt@i915_pm_backlight@fade_with_suspend.html >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb4/igt@i915_pm_backlight@fade_with_suspend.html > > * igt@i915_pm_rpm@sysfs-read: > - shard-tglb: [PASS][21] -> [DMESG-WARN][22] ([i915#766]) >[21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7623/shard-tglb4/igt@i915_pm_...@sysfs-read.html >[22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15891/shard-tglb4/igt@i915_pm_...@sysfs-read.html > > * igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding: > - shard-skl: [PASS][23] -> [FAIL][24] ([i915#54]) +3 > similar issues >[23]: >
[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable second DBuf slice for ICL and TGL (rev11)
== Series Details ==
Series: Enable second DBuf slice for ICL and TGL (rev11)
URL : https://patchwork.freedesktop.org/series/70059/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7628 -> Patchwork_15894
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15894 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15894, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15894:
### IGT changes ###
Possible regressions
* igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6600u: NOTRUN -> [DMESG-WARN][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-skl-6600u/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: NOTRUN -> [FAIL][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-skl-6600u/igt@i915_pm_...@module-reload.html
* igt@i915_selftest@live_gt_lrc:
- fi-bwr-2160:NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-bwr-2160/igt@i915_selftest@live_gt_lrc.html
Known issues
Here are the changes found in Patchwork_15894 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [PASS][4] -> [INCOMPLETE][5] ([i915#505] / [i915#671])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
* igt@i915_selftest@live_blt:
- fi-hsw-4770:[PASS][6] -> [DMESG-FAIL][7] ([i915#553] / [i915#725])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-4770/igt@i915_selftest@live_blt.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-hsw-4770/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-kbl-soraka: [PASS][8] -> [DMESG-FAIL][9] ([i915#656])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
Possible fixes
* igt@gem_close_race@basic-threads:
- {fi-tgl-guc}: [INCOMPLETE][10] ([i915#435]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-tgl-guc/igt@gem_close_r...@basic-threads.html
* igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-dsi: [INCOMPLETE][12] ([fdo#103927]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][14] ([fdo#111407]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][16] ([i915#44]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
Warnings
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-x1275: [DMESG-WARN][18] ([fdo#107139] / [i915#62] /
[i915#92]) -> [DMESG-WARN][19] ([fdo#107139] / [i915#62] / [i915#92] /
[i915#95])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15894/fi-kbl-x1275/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- fi-kbl-x1275: [DMESG-WARN][20] ([i915#62] / [i915#92]) ->
[DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7628/fi-kbl-x1275/igt@kms_cursor_leg...@basic-flip-after-cursor-varying-size.html
[21]:
Re: [Intel-gfx] [PATCH v2] drm/i915: Re-init lspcon after HPD if lspcon probe failed
> On Dec 24, 2019, at 01:36, Jani Nikula wrote:
>
> On Tue, 24 Dec 2019, Kai-Heng Feng wrote:
>> On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
>> becomes useless and never responds to cable hotplugging:
>> [3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon
>> [3.031945] [drm:intel_ddi_init [i915]] *ERROR* LSPCON init failed on
>> port D
>>
>> Seems like the lspcon chip on the system in question only gets powered
>> after the cable is plugged.
>>
>> So let's call lspcon_init() dynamically to properly initialize the
>> lspcon chip and make HDMI port work.
>>
>> Signed-off-by: Kai-Heng Feng
>> ---
>> v2:
>> - Move lspcon_init() inside of intel_dp_hpd_pulse().
>>
>> drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
>> 1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> b/drivers/gpu/drm/i915/display/intel_dp.c
>> index fe31bbfd6c62..eb395b45527e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -6573,6 +6573,7 @@ enum irqreturn
>> intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
>> {
>> struct intel_dp *intel_dp = _dig_port->dp;
>> +struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>>
>> if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {
>> /*
>> @@ -6592,11 +6593,14 @@ intel_dp_hpd_pulse(struct intel_digital_port
>> *intel_dig_port, bool long_hpd)
>>intel_dig_port->base.base.name,
>>long_hpd ? "long" : "short");
>>
>> -if (long_hpd) {
>> +if (long_hpd && intel_dig_port->base.type != INTEL_OUTPUT_DDI) {
>
> With this change, long hpd handling for DDI on platforms that do not
> have LSPCON, or has an active LSPCON, falls through to the short hpd
> handling. That's not what you're after, is it?
You are right, no :(
I'll send a V3.
Kai-Heng
>
>
> BR,
> Jani.
>
>
>> intel_dp->reset_link_params = true;
>> return IRQ_NONE;
>> }
>>
>> +if (long_hpd && HAS_LSPCON(dev_priv) && !intel_dig_port->lspcon.active)
>> +lspcon_init(intel_dig_port);
>> +
>> if (intel_dp->is_mst) {
>> if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
>> /*
>
> --
> Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] [PULL] drm-intel-next
Hi Dave & Daniel - The first, and huge, i915 feature pull for v5.6. We really need to fix dim to allow continuous tagging, and properly handle multiple tags in a single pull request. Writing changelogs for pulls like this becomes daunting. Consequently, the changelog below is more like a haphazard collection of notes, I'm afraid. Content-wise it's mostly all right for i915 core and display, but I fail at even attempting to adequately describe Chris' amazing 200+ commits in gem/gt. A lot of it is tying loose ends after the vulnerability fixes landed directly to v5.4. Anyway, if you're not happy with the gifts, you're going to have to wait until after the holidays for gift returns. Santa is busy now. Seasons greetings, Jani. drm-intel-next-2019-12-23: i915 features for v5.6: - Separate hardware and uapi state (Maarten) - Expose a number of sprite and plane formats (Ville) - DDC symlink in HDMI connector sysfs directory (Andrzej Pietrasiewicz) - Improve obj->mm.lock nesting lock annotation (Daniel) (Includes lockdep changes) - Selftest improvements across the board (Chris) - ICL/TGL VDSC support on DSI (Jani, Vandita) - TGL DSB fixes (Animesh, Lucas, Tvrtko) - VBT parsing improvements and fixes (Lucas, Matt, José, Jani, Dan Carpenter) - Fix LPSS vs. PMIC PWM backlight use on BYT/CHT (Hans) (Includes ACPI+MFD changes) - Display state, crtc, plane code refactoring (Ville) - Set opregion chpd value to indicate the driver handles hotplug (Hans de Goede) - DSI updates and fixes, TGL pipe D support, port mapping (José, Jani, Vandita) - Make HDCP 2.2 support cover CFL (Juston Li) - Fix CML PCI IDs and ULT (Shawn Lee) - CMP-V PCH fix (Imre) - TGL: Add another TGL PCH ID (James) - EHL/JSL: Add new PCI IDs (James) - Rename pipe update tracepoints (Ville) - Fix FBC on GLK+ (Ville) - GuC fixes and improvements (Daniele, Don Hiatt, Stuart Summers, Matthew Brost) - Display debugfs improvements (Ville) - Hotplug/irq fixes (Matt) - PSR fixes and improvements (José) - DRM_I915_GEM_MMAP_OFFSET ioctl (Abdiel) - Static analysis fixes (Colin Ian King) - Register sysctl path globally (Venkata Sandeep Dhanalakota) - Introduce new macros for tracing (Venkata Sandeep Dhanalakota) - Migrate gt towards intel_uncore_read/write (Andi) - Add rps frequency translation helpers (Andi) - Fix TGL transcoder clock off sequence (José) - Fix TGL port A audio (Kai Vehmanen) - TGL render decompression (DK) - GEM/GT improvements and fixes across the board (Chris) - Couple of backmerges (Jani) BR, Jani. The following changes since commit e42617b825f8073569da76dc4510bfa019b1c35a: Linux 5.5-rc1 (2019-12-08 14:57:55 -0800) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2019-12-23 for you to fetch changes up to 3446c63a0f2a691fdc6fffaddc6e0c1285efc80c: drm/i915: Update DRIVER_DATE to 20191223 (2019-12-23 19:08:14 +0200) i915 features for v5.6: - Separate hardware and uapi state (Maarten) - Expose a number of sprite and plane formats (Ville) - DDC symlink in HDMI connector sysfs directory (Andrzej Pietrasiewicz) - Improve obj->mm.lock nesting lock annotation (Daniel) (Includes lockdep changes) - Selftest improvements across the board (Chris) - ICL/TGL VDSC support on DSI (Jani, Vandita) - TGL DSB fixes (Animesh, Lucas, Tvrtko) - VBT parsing improvements and fixes (Lucas, Matt, José, Jani, Dan Carpenter) - Fix LPSS vs. PMIC PWM backlight use on BYT/CHT (Hans) (Includes ACPI+MFD changes) - Display state, crtc, plane code refactoring (Ville) - Set opregion chpd value to indicate the driver handles hotplug (Hans de Goede) - DSI updates and fixes, TGL pipe D support, port mapping (José, Jani, Vandita) - Make HDCP 2.2 support cover CFL (Juston Li) - Fix CML PCI IDs and ULT (Shawn Lee) - CMP-V PCH fix (Imre) - TGL: Add another TGL PCH ID (James) - EHL/JSL: Add new PCI IDs (James) - Rename pipe update tracepoints (Ville) - Fix FBC on GLK+ (Ville) - GuC fixes and improvements (Daniele, Don Hiatt, Stuart Summers, Matthew Brost) - Display debugfs improvements (Ville) - Hotplug/irq fixes (Matt) - PSR fixes and improvements (José) - DRM_I915_GEM_MMAP_OFFSET ioctl (Abdiel) - Static analysis fixes (Colin Ian King) - Register sysctl path globally (Venkata Sandeep Dhanalakota) - Introduce new macros for tracing (Venkata Sandeep Dhanalakota) - Migrate gt towards intel_uncore_read/write (Andi) - Add rps frequency translation helpers (Andi) - Fix TGL transcoder clock off sequence (José) - Fix TGL port A audio (Kai Vehmanen) - TGL render decompression (DK) - GEM/GT improvements and fixes across the board (Chris) - Couple of backmerges (Jani) Abdiel Janulgue (1): drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET Andi Shyti (4): drm/i915/gt: Replace I915_READ with intel_u
[Intel-gfx] [PATCH] drm/i915: Add spaces before compound GEM_TRACE
Add a space between the prefixed format and the users format so that the
join are not mistakenly combined into one long word.
Fixes: 639f2f24895f ("drm/i915: Introduce new macros for tracing")
Signed-off-by: Chris Wilson
Cc: Venkata Sandeep Dhanalakota
---
drivers/gpu/drm/i915/gt/intel_context.h | 2 +-
drivers/gpu/drm/i915/i915_request.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 1d4a1b1357cf..0f5ae4ff3b10 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -19,7 +19,7 @@
#define CE_TRACE(ce, fmt, ...) do {\
const struct intel_context *ce__ = (ce);\
- ENGINE_TRACE(ce__->engine, "context:%llx" fmt, \
+ ENGINE_TRACE(ce__->engine, "context:%llx " fmt, \
ce__->timeline->fence_context, \
##__VA_ARGS__);\
} while (0)
diff --git a/drivers/gpu/drm/i915/i915_request.h
b/drivers/gpu/drm/i915/i915_request.h
index 565322640378..9784421a3b4d 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -51,7 +51,7 @@ struct i915_capture_list {
#define RQ_TRACE(rq, fmt, ...) do {\
const struct i915_request *rq__ = (rq); \
- ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d" fmt, \
+ ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
rq__->fence.context, rq__->fence.seqno,\
hwsp_seqno(rq__), ##__VA_ARGS__); \
} while (0)
--
2.24.1
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Re: [Intel-gfx] [PATCH v2] drm/i915: Re-init lspcon after HPD if lspcon probe failed
On Tue, 24 Dec 2019, Kai-Heng Feng wrote:
> On HP 800 G4 DM, if HDMI cable isn't plugged before boot, the HDMI port
> becomes useless and never responds to cable hotplugging:
> [3.031904] [drm:lspcon_init [i915]] *ERROR* Failed to probe lspcon
> [3.031945] [drm:intel_ddi_init [i915]] *ERROR* LSPCON init failed on port
> D
>
> Seems like the lspcon chip on the system in question only gets powered
> after the cable is plugged.
>
> So let's call lspcon_init() dynamically to properly initialize the
> lspcon chip and make HDMI port work.
>
> Signed-off-by: Kai-Heng Feng
> ---
> v2:
> - Move lspcon_init() inside of intel_dp_hpd_pulse().
>
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index fe31bbfd6c62..eb395b45527e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6573,6 +6573,7 @@ enum irqreturn
> intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd)
> {
> struct intel_dp *intel_dp = _dig_port->dp;
> + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> if (long_hpd && intel_dig_port->base.type == INTEL_OUTPUT_EDP) {
> /*
> @@ -6592,11 +6593,14 @@ intel_dp_hpd_pulse(struct intel_digital_port
> *intel_dig_port, bool long_hpd)
> intel_dig_port->base.base.name,
> long_hpd ? "long" : "short");
>
> - if (long_hpd) {
> + if (long_hpd && intel_dig_port->base.type != INTEL_OUTPUT_DDI) {
With this change, long hpd handling for DDI on platforms that do not
have LSPCON, or has an active LSPCON, falls through to the short hpd
handling. That's not what you're after, is it?
BR,
Jani.
> intel_dp->reset_link_params = true;
> return IRQ_NONE;
> }
>
> + if (long_hpd && HAS_LSPCON(dev_priv) && !intel_dig_port->lspcon.active)
> + lspcon_init(intel_dig_port);
> +
> if (intel_dp->is_mst) {
> if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {
> /*
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] [PATCH v3 09/10] drm/i915: prefer 3-letter acronym for ivybridge
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts ivybridge to ivb where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 12 ++--
drivers/gpu/drm/i915/i915_irq.c| 6 +++---
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 5093fd08f381..faf6d2527a50 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5540,7 +5540,7 @@ static void cpt_set_fdi_bc_bifurcation(struct
drm_i915_private *dev_priv, bool e
POSTING_READ(SOUTH_CHICKEN1);
}
-static void ivybridge_update_fdi_bc_bifurcation(const struct intel_crtc_state
*crtc_state)
+static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state
*crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -5613,7 +5613,7 @@ static void ilk_pch_enable(const struct
intel_atomic_state *state,
assert_pch_transcoder_disabled(dev_priv, pipe);
if (IS_IVYBRIDGE(dev_priv))
- ivybridge_update_fdi_bc_bifurcation(crtc_state);
+ ivb_update_fdi_bc_bifurcation(crtc_state);
/* Write the TU size bits before fdi link training, so that error
* detection works. */
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 1f80f275f3f2..6c83b350525d 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -139,7 +139,7 @@ static void ilk_set_fifo_underrun_reporting(struct
drm_device *dev,
ilk_disable_display_irq(dev_priv, bit);
}
-static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)
+static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
@@ -157,9 +157,9 @@ static void ivybridge_check_fifo_underruns(struct
intel_crtc *crtc)
DRM_ERROR("fifo underrun on pipe %c\n", pipe_name(pipe));
}
-static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
- enum pipe pipe,
- bool enable, bool old)
+static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
+ enum pipe pipe, bool enable,
+ bool old)
{
struct drm_i915_private *dev_priv = to_i915(dev);
if (enable) {
@@ -266,7 +266,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct
drm_device *dev,
else if (IS_GEN_RANGE(dev_priv, 5, 6))
ilk_set_fifo_underrun_reporting(dev, pipe, enable);
else if (IS_GEN(dev_priv, 7))
- ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
+ ivb_set_fifo_underrun_reporting(dev, pipe, enable, old);
else if (INTEL_GEN(dev_priv) >= 8)
bdw_set_fifo_underrun_reporting(dev, pipe, enable);
@@ -427,7 +427,7 @@ void intel_check_cpu_fifo_underruns(struct drm_i915_private
*dev_priv)
if (HAS_GMCH(dev_priv))
i9xx_check_fifo_underruns(crtc);
else if (IS_GEN(dev_priv, 7))
- ivybridge_check_fifo_underruns(crtc);
+ ivb_check_fifo_underruns(crtc);
}
spin_unlock_irq(_priv->irq_lock);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2d6324d2922a..afc6aad9bf8c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -893,7 +893,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
}
/**
- * ivybridge_parity_work - Workqueue called when a parity error interrupt
+ * ivb_parity_work - Workqueue called when a parity error interrupt
* occurred.
* @work: workqueue struct
*
@@ -901,7 +901,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
* this event, userspace should try to remap the bad rows since statistically
* it is likely the same row is more likely to go bad again.
*/
-static void ivybridge_parity_work(struct work_struct *work)
+static void ivb_parity_work(struct work_struct *work)
{
struct drm_i915_private *dev_priv =
container_of(work, typeof(*dev_priv), l3_parity.error_work);
@@ -3899,7 +3899,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
[Intel-gfx] [PATCH v3 05/10] drm/i915: prefer 3-letter acronym for cannonlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts cannonlake to cnl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 18ac15df91c7..98d6bcb4c761 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10440,9 +10440,8 @@ static int hsw_crtc_compute_clock(struct intel_crtc
*crtc,
return 0;
}
-static void cannonlake_get_ddi_pll(struct drm_i915_private *dev_priv,
- enum port port,
- struct intel_crtc_state *pipe_config)
+static void cnl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
+ struct intel_crtc_state *pipe_config)
{
enum intel_dpll_id id;
u32 temp;
@@ -10744,7 +10743,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc
*crtc,
if (INTEL_GEN(dev_priv) >= 11)
icelake_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_CANNONLAKE(dev_priv))
- cannonlake_get_ddi_pll(dev_priv, port, pipe_config);
+ cnl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_GEN9_BC(dev_priv))
skl_get_ddi_pll(dev_priv, port, pipe_config);
else if (IS_GEN9_LP(dev_priv))
--
2.24.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 07/10] drm/i915: prefer 3-letter acronym for ironlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts ironlake to ilk where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_crt.c | 8 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 168 +-
drivers/gpu/drm/i915/display/intel_display.h | 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 34 ++--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
.../drm/i915/display/intel_fifo_underrun.c| 6 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 7 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_irq.c | 12 +-
drivers/gpu/drm/i915/intel_pm.c | 4 +-
11 files changed, 125 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index b2b1336ecdb6..cbe5978e7fb5 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -247,7 +247,7 @@ static void hsw_post_disable_crt(struct intel_encoder
*encoder,
intel_ddi_disable_transcoder_func(old_crtc_state);
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
intel_ddi_disable_pipe_clock(old_crtc_state);
@@ -351,7 +351,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
/* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
if (HAS_PCH_LPT(dev_priv) &&
- (ironlake_get_lanes_required(mode->clock, 27, 24) > 2))
+ ilk_get_lanes_required(mode->clock, 27, 24) > 2)
return MODE_CLOCK_HIGH;
/* HSW/BDW FDI limited to 4k */
@@ -427,7 +427,7 @@ static int hsw_crt_compute_config(struct intel_encoder
*encoder,
return 0;
}
-static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
+static bool ilk_crt_detect_hotplug(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct intel_crt *crt = intel_attached_crt(connector);
@@ -535,7 +535,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector
*connector)
int i, tries = 0;
if (HAS_PCH_SPLIT(dev_priv))
- return intel_ironlake_crt_detect_hotplug(connector);
+ return ilk_crt_detect_hotplug(connector);
if (IS_VALLEYVIEW(dev_priv))
return valleyview_crt_detect_hotplug(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index b52c31721755..62fa73815d8a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3898,7 +3898,7 @@ static void intel_ddi_post_disable(struct intel_encoder
*encoder,
if (INTEL_GEN(dev_priv) >= 9)
skl_scaler_disable(old_crtc_state);
else
- ironlake_pfit_disable(old_crtc_state);
+ ilk_pfit_disable(old_crtc_state);
/*
* When called from DP MST code:
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 461691cc2f62..5093fd08f381 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -145,8 +145,8 @@ static const u64 cursor_format_modifiers[] = {
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
-static void ironlake_pch_clock_get(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config);
+static void ilk_pch_clock_get(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config);
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
@@ -157,7 +157,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
intel_crtc_state *crtc_sta
const struct intel_link_m_n *m_n,
const struct intel_link_m_n *m2_n2);
static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
static void vlv_prepare_pll(struct intel_crtc *crtc,
@@ -165,7 +165,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
static void chv_prepare_pll(struct intel_crtc *crtc,
[Intel-gfx] [PATCH v3 08/10] drm/i915: prefer 3-letter acronym for broadwell
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts broadwell to bdw where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_workarounds.c| 2 +-
drivers/gpu/drm/i915/gvt/handlers.c| 8
drivers/gpu/drm/i915/i915_debugfs.c| 6 +++---
drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
5 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index d6e0d0be842e..1f80f275f3f2 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -180,8 +180,8 @@ static void ivybridge_set_fifo_underrun_reporting(struct
drm_device *dev,
}
}
-static void broadwell_set_fifo_underrun_reporting(struct drm_device *dev,
- enum pipe pipe, bool enable)
+static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
+ enum pipe pipe, bool enable)
{
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -268,7 +268,7 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct
drm_device *dev,
else if (IS_GEN(dev_priv, 7))
ivybridge_set_fifo_underrun_reporting(dev, pipe, enable, old);
else if (INTEL_GEN(dev_priv) >= 8)
- broadwell_set_fifo_underrun_reporting(dev, pipe, enable);
+ bdw_set_fifo_underrun_reporting(dev, pipe, enable);
return old;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 195ccf7db272..4e292d4bf7b9 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -254,7 +254,7 @@ static void bdw_ctx_workarounds_init(struct intel_engine_cs
*engine,
/* WaDisableDopClockGating:bdw
*
-* Also see the related UCGTCL1 write in broadwell_init_clock_gating()
+* Also see the related UCGTCL1 write in bdw_init_clock_gating()
* to disable EUTC clock gating.
*/
WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c
b/drivers/gpu/drm/i915/gvt/handlers.c
index 1043e6d564df..6d28d72e6c7e 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -2691,7 +2691,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt)
return 0;
}
-static int init_broadwell_mmio_info(struct intel_gvt *gvt)
+static int init_bdw_mmio_info(struct intel_gvt *gvt)
{
struct drm_i915_private *dev_priv = gvt->dev_priv;
int ret;
@@ -3380,20 +3380,20 @@ int intel_gvt_setup_mmio_info(struct intel_gvt *gvt)
goto err;
if (IS_BROADWELL(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
} else if (IS_SKYLAKE(dev_priv)
|| IS_KABYLAKE(dev_priv)
|| IS_COFFEELAKE(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
ret = init_skl_mmio_info(gvt);
if (ret)
goto err;
} else if (IS_BROXTON(dev_priv)) {
- ret = init_broadwell_mmio_info(gvt);
+ ret = init_bdw_mmio_info(gvt);
if (ret)
goto err;
ret = init_skl_mmio_info(gvt);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0407229251bc..cb34e8c31511 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3815,8 +3815,8 @@ static void gen9_sseu_device_status(struct
drm_i915_private *dev_priv,
#undef SS_MAX
}
-static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv,
-struct sseu_dev_info *sseu)
+static void bdw_sseu_device_status(struct drm_i915_private *dev_priv,
+ struct sseu_dev_info *sseu)
{
const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO);
@@ -3901,7 +3901,7 @@ static int i915_sseu_status(struct seq_file *m, void
*unused)
if (IS_CHERRYVIEW(dev_priv))
cherryview_sseu_device_status(dev_priv, );
else if (IS_BROADWELL(dev_priv))
-
[Intel-gfx] [PATCH v3 04/10] drm/i915: prefer 3-letter acronym for skylake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts skylake to skl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 29 ++--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 ++--
7 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 006b1a297e6f..8435bc5a7a74 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1259,7 +1259,7 @@ static void gen11_dsi_post_disable(struct intel_encoder
*encoder,
intel_dsc_disable(old_crtc_state);
- skylake_scaler_disable(old_crtc_state);
+ skl_scaler_disable(old_crtc_state);
}
static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector
*connector,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index d687c9503025..b52c31721755 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3896,7 +3896,7 @@ static void intel_ddi_post_disable(struct intel_encoder
*encoder,
intel_dsc_disable(old_crtc_state);
if (INTEL_GEN(dev_priv) >= 9)
- skylake_scaler_disable(old_crtc_state);
+ skl_scaler_disable(old_crtc_state);
else
ironlake_pfit_disable(old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 14726a293171..18ac15df91c7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -164,7 +164,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
static void chv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state);
static void intel_modeset_setup_hw_state(struct drm_device *dev,
struct drm_modeset_acquire_ctx *ctx);
@@ -6001,7 +6001,7 @@ static int skl_update_scaler_plane(struct
intel_crtc_state *crtc_state,
return 0;
}
-void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state)
+void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
int i;
@@ -6010,7 +6010,7 @@ void skylake_scaler_disable(const struct intel_crtc_state
*old_crtc_state)
skl_detach_scaler(crtc, i);
}
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -6844,7 +6844,7 @@ static void hsw_crtc_enable(struct intel_atomic_state
*state,
glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
if (INTEL_GEN(dev_priv) >= 9)
- skylake_pfit_enable(new_crtc_state);
+ skl_pfit_enable(new_crtc_state);
else
ironlake_pfit_enable(new_crtc_state);
@@ -10116,8 +10116,8 @@ static void ironlake_get_fdi_m_n_config(struct
intel_crtc *crtc,
_config->fdi_m_n, NULL);
}
-static void skylake_get_pfit_config(struct intel_crtc *crtc,
- struct intel_crtc_state *pipe_config)
+static void skl_get_pfit_config(struct intel_crtc *crtc,
+ struct intel_crtc_state *pipe_config)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
@@ -10148,8 +10148,8 @@ static void skylake_get_pfit_config(struct intel_crtc
*crtc,
}
static void
-skylake_get_initial_plane_config(struct intel_crtc *crtc,
-struct intel_initial_plane_config
*plane_config)
+skl_get_initial_plane_config(struct intel_crtc *crtc,
+struct intel_initial_plane_config *plane_config)
{
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv =
[Intel-gfx] [PATCH v3 10/10] drm/i915: prefer 3-letter acronym for tigerlake
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts tigerlake to tgl where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 95f1bc45953b..eeef90b55c64 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -233,7 +233,7 @@ static const struct drm_i915_mocs_entry
broxton_mocs_table[] = {
LE_3_WB | LE_TC_1_LLC | LE_LRUM(3), \
L3_1_UC)
-static const struct drm_i915_mocs_entry tigerlake_mocs_table[] = {
+static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
/* Base - Error (Reserved for Non-Use) */
MOCS_ENTRY(0, 0x0, 0x0),
/* Base - Reserved */
@@ -284,8 +284,8 @@ static bool get_mocs_settings(const struct drm_i915_private
*i915,
struct drm_i915_mocs_table *table)
{
if (INTEL_GEN(i915) >= 12) {
- table->size = ARRAY_SIZE(tigerlake_mocs_table);
- table->table = tigerlake_mocs_table;
+ table->size = ARRAY_SIZE(tgl_mocs_table);
+ table->table = tgl_mocs_table;
table->n_entries = GEN11_NUM_MOCS_ENTRIES;
} else if (IS_GEN(i915, 11)) {
table->size = ARRAY_SIZE(icl_mocs_table);
--
2.24.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 03/10] drm/i915: prefer 3-letter acronym for haswell
We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts haswell to hsw where appropriate.
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Acked-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 57 ++--
drivers/gpu/drm/i915/intel_device_info.c | 4 +-
3 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index c9ba7d7f3787..d687c9503025 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3458,14 +3458,14 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder
*encoder,
* (DFLEXDPSP.DPX4TXLATC)
*
* This was done before tgl_ddi_pre_enable_dp by
-* haswell_crtc_enable()->intel_encoders_pre_pll_enable().
+* hsw_crtc_enable()->intel_encoders_pre_pll_enable().
*/
/*
* 4. Enable the port PLL.
*
* The PLL enabling itself was already done before this function by
-* haswell_crtc_enable()->intel_enable_shared_dpll(). We need only
+* hsw_crtc_enable()->intel_enable_shared_dpll(). We need only
* configure the PLL to port mapping here.
*/
intel_ddi_clk_select(encoder, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 5d43024f35aa..14726a293171 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -158,7 +158,7 @@ static void intel_cpu_transcoder_set_m_n(const struct
intel_crtc_state *crtc_sta
const struct intel_link_m_n *m2_n2);
static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
-static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
static void vlv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
@@ -6787,8 +6787,8 @@ static void hsw_set_frame_start_delay(const struct
intel_crtc_state *crtc_state)
I915_WRITE(reg, val);
}
-static void haswell_crtc_enable(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static void hsw_crtc_enable(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
@@ -6829,7 +6829,7 @@ static void haswell_crtc_enable(struct intel_atomic_state
*state,
if (!transcoder_is_dsi(cpu_transcoder)) {
hsw_set_frame_start_delay(new_crtc_state);
- haswell_set_pipeconf(new_crtc_state);
+ hsw_set_pipeconf(new_crtc_state);
}
if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
@@ -6967,8 +6967,8 @@ static void ironlake_crtc_disable(struct
intel_atomic_state *state,
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
}
-static void haswell_crtc_disable(struct intel_atomic_state *state,
-struct intel_crtc *crtc)
+static void hsw_crtc_disable(struct intel_atomic_state *state,
+struct intel_crtc *crtc)
{
/*
* FIXME collapse everything to one hook.
@@ -9783,7 +9783,7 @@ static void ironlake_set_pipeconf(const struct
intel_crtc_state *crtc_state)
POSTING_READ(PIPECONF(pipe));
}
-static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state)
+static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -10417,8 +10417,9 @@ static bool ironlake_get_pipe_config(struct intel_crtc
*crtc,
return ret;
}
-static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
- struct intel_crtc_state *crtc_state)
+
+static int hsw_crtc_compute_clock(struct intel_crtc *crtc,
+ struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_atomic_state *state =
@@ -10532,9 +10533,8 @@ static void skylake_get_ddi_pll(struct drm_i915_private
*dev_priv,
pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
}
-static void haswell_get_ddi_pll(struct
