Re: [Intel-gfx] [PATCH] drm/i915: fix gen4 digital port hotplug definitions
Hi list, Am 26.07.2013 21:46, schrieb Daniel Vetter: On Fri, Jul 26, 2013 at 07:54:22PM +0200, Daniel Vetter wrote: On Fri, Jul 26, 2013 at 01:21:48PM +0300, Jani Nikula wrote: On Fri, 26 Jul 2013, Daniel Vetter daniel.vet...@ffwll.ch wrote: Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Would a comment about this near the #defines be in order? To avoid the these values are all wrong per bspec patches. Yeah, good idea, I'll add a comment when merging this. Done and merged with your irc-ack. this made it in 3.11, is there any chance GKH will also merge this into 3.10 longterm? I'm too new in kernel development... What would need to be done to achieve that? Regards Jan ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: fix gen4 digital port hotplug definitions
Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Also tested on my gm45 which has two DP+ ports, and everything seems to still work as expected. References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg23054.html Cc: Egbert Eich e...@suse.com Cc: Jan Niggemann j...@hz6.de Tested-by: Jan Niggemann j...@hz6.de Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6caa748..2d4c884 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1925,9 +1925,9 @@ #define PORT_HOTPLUG_STAT (dev_priv-info-display_mmio_offset + 0x61114) /* HDMI/DP bits are gen4+ */ -#define PORTB_HOTPLUG_LIVE_STATUS (1 29) +#define PORTD_HOTPLUG_LIVE_STATUS (1 29) #define PORTC_HOTPLUG_LIVE_STATUS (1 28) -#define PORTD_HOTPLUG_LIVE_STATUS (1 27) +#define PORTB_HOTPLUG_LIVE_STATUS (1 27) #define PORTD_HOTPLUG_INT_STATUS (3 21) #define PORTC_HOTPLUG_INT_STATUS (3 19) #define PORTB_HOTPLUG_INT_STATUS (3 17) -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix gen4 digital port hotplug definitions
On Fri, 26 Jul 2013, Daniel Vetter daniel.vet...@ffwll.ch wrote: Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Would a comment about this near the #defines be in order? To avoid the these values are all wrong per bspec patches. Cheers, Jani. Also tested on my gm45 which has two DP+ ports, and everything seems to still work as expected. References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg23054.html Cc: Egbert Eich e...@suse.com Cc: Jan Niggemann j...@hz6.de Tested-by: Jan Niggemann j...@hz6.de Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6caa748..2d4c884 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1925,9 +1925,9 @@ #define PORT_HOTPLUG_STAT(dev_priv-info-display_mmio_offset + 0x61114) /* HDMI/DP bits are gen4+ */ -#define PORTB_HOTPLUG_LIVE_STATUS (1 29) +#define PORTD_HOTPLUG_LIVE_STATUS (1 29) #define PORTC_HOTPLUG_LIVE_STATUS (1 28) -#define PORTD_HOTPLUG_LIVE_STATUS (1 27) +#define PORTB_HOTPLUG_LIVE_STATUS (1 27) #define PORTD_HOTPLUG_INT_STATUS (3 21) #define PORTC_HOTPLUG_INT_STATUS (3 19) #define PORTB_HOTPLUG_INT_STATUS (3 17) -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix gen4 digital port hotplug definitions
On Fri, Jul 26, 2013 at 01:21:48PM +0300, Jani Nikula wrote: On Fri, 26 Jul 2013, Daniel Vetter daniel.vet...@ffwll.ch wrote: Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Would a comment about this near the #defines be in order? To avoid the these values are all wrong per bspec patches. Yeah, good idea, I'll add a comment when merging this. -Daniel Cheers, Jani. Also tested on my gm45 which has two DP+ ports, and everything seems to still work as expected. References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg23054.html Cc: Egbert Eich e...@suse.com Cc: Jan Niggemann j...@hz6.de Tested-by: Jan Niggemann j...@hz6.de Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 6caa748..2d4c884 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1925,9 +1925,9 @@ #define PORT_HOTPLUG_STAT (dev_priv-info-display_mmio_offset + 0x61114) /* HDMI/DP bits are gen4+ */ -#define PORTB_HOTPLUG_LIVE_STATUS (1 29) +#define PORTD_HOTPLUG_LIVE_STATUS (1 29) #define PORTC_HOTPLUG_LIVE_STATUS (1 28) -#define PORTD_HOTPLUG_LIVE_STATUS (1 27) +#define PORTB_HOTPLUG_LIVE_STATUS (1 27) #define PORTD_HOTPLUG_INT_STATUS (3 21) #define PORTC_HOTPLUG_INT_STATUS (3 19) #define PORTB_HOTPLUG_INT_STATUS (3 17) -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix gen4 digital port hotplug definitions
On Fri, Jul 26, 2013 at 07:54:22PM +0200, Daniel Vetter wrote: On Fri, Jul 26, 2013 at 01:21:48PM +0300, Jani Nikula wrote: On Fri, 26 Jul 2013, Daniel Vetter daniel.vet...@ffwll.ch wrote: Apparently Bspec is wrong in this case here even for gm45. Note that Bspec is horribly misguided on i965g/gm, so we don't have any other data points besides that it seems to make machines work better. With this changes all the bits in PORT_HOTPLUG_STAT for the digital ports are ordered the same way. This seems to agree with what register dumps from the hpd storm handling code shows, where the LIVE bit and the short/long pulse STATUS bits light up at the same time with this enumeration (but no with the one from Bspec). Would a comment about this near the #defines be in order? To avoid the these values are all wrong per bspec patches. Yeah, good idea, I'll add a comment when merging this. Done and merged with your irc-ack. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
