[Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

2012-10-15 Thread Paulo Zanoni
From: Paulo Zanoni 

Much simpler and looks more like the M/N code inside intel_display.c.

Signed-off-by: Paulo Zanoni 
---
 drivers/gpu/drm/i915/intel_dp.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b10f35b..52b5453 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -794,9 +794,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct 
drm_display_mode *mode,
 mode->clock, adjusted_mode->clock, &m_n);
 
if (HAS_PCH_SPLIT(dev)) {
-   I915_WRITE(TRANSDATA_M1(pipe),
-  ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
-  m_n.gmch_m);
+   I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n.tu) | m_n.gmch_m);
I915_WRITE(TRANSDATA_N1(pipe), m_n.gmch_n);
I915_WRITE(TRANSDPLINK_M1(pipe), m_n.link_m);
I915_WRITE(TRANSDPLINK_N1(pipe), m_n.link_n);
@@ -807,8 +805,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct 
drm_display_mode *mode,
I915_WRITE(PIPE_LINK_N1(pipe), m_n.link_n);
} else {
I915_WRITE(PIPE_GMCH_DATA_M(pipe),
-  ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
-  m_n.gmch_m);
+  TU_SIZE(m_n.tu) | m_n.gmch_m);
I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n.gmch_n);
I915_WRITE(PIPE_DP_LINK_M(pipe), m_n.link_m);
I915_WRITE(PIPE_DP_LINK_N(pipe), m_n.link_n);
-- 
1.7.11.4

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

2012-10-16 Thread Jani Nikula
On Mon, 15 Oct 2012, Paulo Zanoni  wrote:
> From: Paulo Zanoni 
>
> Much simpler and looks more like the M/N code inside intel_display.c.

Reviewed-by: Jani Nikula 

>
> Signed-off-by: Paulo Zanoni 
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 7 ++-
>  1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b10f35b..52b5453 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -794,9 +794,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct 
> drm_display_mode *mode,
>mode->clock, adjusted_mode->clock, &m_n);
>  
>   if (HAS_PCH_SPLIT(dev)) {
> - I915_WRITE(TRANSDATA_M1(pipe),
> -((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
> -m_n.gmch_m);
> + I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n.tu) | m_n.gmch_m);
>   I915_WRITE(TRANSDATA_N1(pipe), m_n.gmch_n);
>   I915_WRITE(TRANSDPLINK_M1(pipe), m_n.link_m);
>   I915_WRITE(TRANSDPLINK_N1(pipe), m_n.link_n);
> @@ -807,8 +805,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct 
> drm_display_mode *mode,
>   I915_WRITE(PIPE_LINK_N1(pipe), m_n.link_n);
>   } else {
>   I915_WRITE(PIPE_GMCH_DATA_M(pipe),
> -((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
> -m_n.gmch_m);
> +TU_SIZE(m_n.tu) | m_n.gmch_m);
>   I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n.gmch_n);
>   I915_WRITE(PIPE_DP_LINK_M(pipe), m_n.link_m);
>   I915_WRITE(PIPE_DP_LINK_N(pipe), m_n.link_n);
> -- 
> 1.7.11.4
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

2012-10-17 Thread Daniel Vetter
On Tue, Oct 16, 2012 at 02:49:58PM +0300, Jani Nikula wrote:
> On Mon, 15 Oct 2012, Paulo Zanoni  wrote:
> > From: Paulo Zanoni 
> >
> > Much simpler and looks more like the M/N code inside intel_display.c.
> 
> Reviewed-by: Jani Nikula 

Merged up to this patch, thanks.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

2012-10-18 Thread Paulo Zanoni
Hi

2012/10/17 Daniel Vetter :
> On Tue, Oct 16, 2012 at 02:49:58PM +0300, Jani Nikula wrote:
>> On Mon, 15 Oct 2012, Paulo Zanoni  wrote:
>> > From: Paulo Zanoni 
>> >
>> > Much simpler and looks more like the M/N code inside intel_display.c.
>>
>> Reviewed-by: Jani Nikula 
>
> Merged up to this patch, thanks.

No. Actually I think we're missing patches 4 and 5. Patch 4 has a R-B,
but 5 doesn't.

After this, we still need 9 (just resent), then 13 and 14.

> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 
Paulo Zanoni
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


Re: [Intel-gfx] [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n

2012-10-18 Thread Daniel Vetter
On Thu, Oct 18, 2012 at 02:14:52PM -0300, Paulo Zanoni wrote:
> Hi
> 
> 2012/10/17 Daniel Vetter :
> > On Tue, Oct 16, 2012 at 02:49:58PM +0300, Jani Nikula wrote:
> >> On Mon, 15 Oct 2012, Paulo Zanoni  wrote:
> >> > From: Paulo Zanoni 
> >> >
> >> > Much simpler and looks more like the M/N code inside intel_display.c.
> >>
> >> Reviewed-by: Jani Nikula 
> >
> > Merged up to this patch, thanks.
> 
> No. Actually I think we're missing patches 4 and 5. Patch 4 has a R-B,
> but 5 doesn't.

Yeah, I've made a bit a mess ;-) Should be all merged now, thanks for
patches and review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx