This has been discussed elsewhere, but I summarize here for
transparency:
This makes some of the display registers take the NEEDS_FORCE_WAKE path
in reg reads and writes, breaking things. Rebased on top of recent
drm-intel-next-queued with Ville's IS_DISPLAYREG nuking commits this
works all right, though.
BR,
Jani.
On Sat, 02 Feb 2013, Jesse Barnes jbar...@virtuousgeek.org wrote:
Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org
---
drivers/gpu/drm/i915/i915_drv.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 13b9b4f..b35b479 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -276,6 +276,8 @@ static const struct intel_device_info
intel_valleyview_m_info = {
.has_bsd_ring = 1,
.has_blt_ring = 1,
.is_valleyview = 1,
+ .has_force_wake = 1,
+ .has_llc = 0,
};
static const struct intel_device_info intel_valleyview_d_info = {
@@ -285,6 +287,8 @@ static const struct intel_device_info
intel_valleyview_d_info = {
.has_bsd_ring = 1,
.has_blt_ring = 1,
.is_valleyview = 1,
+ .has_force_wake = 1,
+ .has_llc = 0,
};
static const struct intel_device_info intel_haswell_d_info = {
--
1.7.9.5
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