Re: jaihouse porting on arm64 board

2018-10-15 Thread Jan Kiszka 

On 12.10.18 06:33, Vladimir Neyelov wrote:

Hi Jan,
Great advice it helped me. Now we have a working root cell on our board. Next 
step inmate cell.


Good to hear that this helped.

In case the board is commonly available, we would be looking forward to receive 
some patches against upstream eventually! The new uart drivers (63xx) would 
definitely be upstream candidates.


Jan

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Re: jaihouse porting on arm64 board

2018-10-11 Thread 'Vladimir Neyelov' via Jailhouse 
Hi Jan,
Great advice it helped me. Now we have a working root cell on our board.
Next step inmate cell.
Thanks,
Vladimir

On Thursday, October 11, 2018, Jan Kiszka  wrote:

> On 11.10.18 16:14, Vladimir Neyelov wrote:
>
>> Hi Jan,
>>
>> .mem_regions = {
>>>   {
>>>  .phys_start = 0x80008000,
>>>  .virt_start = 0x80008000,
>>>  .size = 0x34DD000,
>>>  .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
>>> JAILHOUSE_MEM_IO,
>>>
>>
>> This grants the root cell direct access to the GIC - not good...
>>>
>>
>> Do you mean - remove gic registers from memory regions ?
>>
>
> Yes. Those need to be handled by the hypervisor. That one is already
> ensuring the that GICC is mapped for the guest (to the GICV), but the GICD
> requires trapping. And GICH is surely no guest business.
>
> Jan
>
> --
> Siemens AG, Corporate Technology, CT RDA IOT SES-DE
> Corporate Competence Center Embedded Linux
>

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Re: jaihouse porting on arm64 board

2018-10-11 Thread Jan Kiszka 

On 11.10.18 16:14, Vladimir Neyelov wrote:

Hi Jan,


.mem_regions = {
  {
 .phys_start = 0x80008000,
 .virt_start = 0x80008000,
 .size = 0x34DD000,
 .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,



This grants the root cell direct access to the GIC - not good...


Do you mean - remove gic registers from memory regions ?


Yes. Those need to be handled by the hypervisor. That one is already ensuring 
the that GICC is mapped for the guest (to the GICV), but the GICD requires 
trapping. And GICH is surely no guest business.


Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

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RE: jaihouse porting on arm64 board

2018-10-11 Thread 'Vladimir Neyelov' via Jailhouse 
Hi Jan,

>   .mem_regions = {
>  {
> .phys_start = 0x80008000,
> .virt_start = 0x80008000,
> .size = 0x34DD000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
>   JAILHOUSE_MEM_IO,

> This grants the root cell direct access to the GIC - not good...

Do you mean - remove gic registers from memory regions ?

Vladimir


-Original Message-
From: Jan Kiszka [mailto:jan.kis...@siemens.com]
Sent: Thursday, October 11, 2018 4:22 PM
To: Vladimir Neyelov ; Ralf Ramsauer
; jailhouse-dev@googlegroups.com
Subject: Re: jaihouse porting on arm64 board

On 11.10.18 14:59, 'Vladimir Neyelov' via Jailhouse wrote:
> This is my configuration file based on other examples of arm64 boards
> configurations.
> I tried to remove virtual PCI device but it doesn’t influence on this
> issue.
>
> #include 
> #include 
>
> #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
>
> struct {
>   struct jailhouse_system header;
>   __u64 cpus[1];
>   struct jailhouse_memory mem_regions[4];
>   struct jailhouse_irqchip irqchips[1];
>   struct jailhouse_pci_device pci_devices[1]; } __attribute__((packed))
> config = {
>   .header = {
>   .signature = JAILHOUSE_SYSTEM_SIGNATURE,
>   .revision = JAILHOUSE_CONFIG_REVISION,
>   .flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
>   .hypervisor_memory = {
>   .phys_start = 0x1900,
>   .size =   0x0040,
>   },
>   .debug_console = {
>   .address = 0xff800640,
>   .size = 0x40,
>   .type = JAILHOUSE_CON_TYPE_63XX,
>   .flags = JAILHOUSE_CON_ACCESS_MMIO |
>JAILHOUSE_CON_REGDIST_4,
>   },
>   .platform_info = {
>   .pci_mmconfig_base = 0x8004,
>   .pci_mmconfig_end_bus = 0,
>   .pci_is_virtual = 1,
>   .pci_domain = -1,
>   .arm = {
>   .gic_version = 2,
>   .gicd_base = 0x81001000,
>   .gicc_base = 0x81002000,
>   .gich_base = 0x81004000,
>   .gicv_base = 0x81006000,
>   .maintenance_irq = 25,
>   },
>   },
>   .root_cell = {
>   .name = "bcell",
>
>   .cpu_set_size = sizeof(config.cpus),
>   .num_memory_regions = ARRAY_SIZE(config.mem_regions),
>   .num_irqchips = ARRAY_SIZE(config.irqchips),
>   .num_pci_devices = ARRAY_SIZE(config.pci_devices),
>
>   .vpci_irq_base = 128-32,
>   },
>   },
>
>   .cpus = {
>   0xf,
>   },
>
>   .mem_regions = {
>  {
> .phys_start = 0x80008000,
> .virt_start = 0x80008000,
> .size = 0x34DD000,
> .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
>   JAILHOUSE_MEM_IO,

This grants the root cell direct access to the GIC - not good...

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE Corporate Competence
Center Embedded Linux

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Re: jaihouse porting on arm64 board

2018-10-11 Thread Jan Kiszka 

On 11.10.18 14:59, 'Vladimir Neyelov' via Jailhouse wrote:

This is my configuration file based on other examples of arm64 boards
configurations.
I tried to remove virtual PCI device but it doesn’t influence on this issue.

#include 
#include 

#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))

struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[4];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x1900,
.size =   0x0040,
},
.debug_console = {
.address = 0xff800640,
.size = 0x40,
.type = JAILHOUSE_CON_TYPE_63XX,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
 JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0x8004,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.pci_domain = -1,
.arm = {
.gic_version = 2,
.gicd_base = 0x81001000,
.gicc_base = 0x81002000,
.gich_base = 0x81004000,
.gicv_base = 0x81006000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "bcell",

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 128-32,
},
},

.cpus = {
0xf,
},

.mem_regions = {
 {
.phys_start = 0x80008000,
.virt_start = 0x80008000,
.size = 0x34DD000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,


This grants the root cell direct access to the GIC - not good...

Jan

--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux

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RE: jaihouse porting on arm64 board

2018-10-11 Thread 'Vladimir Neyelov' via Jailhouse 
This is my configuration file based on other examples of arm64 boards
configurations.
I tried to remove virtual PCI device but it doesn’t influence on this issue.

#include 
#include 

#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))

struct {
struct jailhouse_system header;
__u64 cpus[1];
struct jailhouse_memory mem_regions[4];
struct jailhouse_irqchip irqchips[1];
struct jailhouse_pci_device pci_devices[1];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.revision = JAILHOUSE_CONFIG_REVISION,
.flags = JAILHOUSE_SYS_VIRTUAL_DEBUG_CONSOLE,
.hypervisor_memory = {
.phys_start = 0x1900,
.size =   0x0040,
},
.debug_console = {
.address = 0xff800640,
.size = 0x40,
.type = JAILHOUSE_CON_TYPE_63XX,
.flags = JAILHOUSE_CON_ACCESS_MMIO |
 JAILHOUSE_CON_REGDIST_4,
},
.platform_info = {
.pci_mmconfig_base = 0x8004,
.pci_mmconfig_end_bus = 0,
.pci_is_virtual = 1,
.pci_domain = -1,
.arm = {
.gic_version = 2,
.gicd_base = 0x81001000,
.gicc_base = 0x81002000,
.gich_base = 0x81004000,
.gicv_base = 0x81006000,
.maintenance_irq = 25,
},
},
.root_cell = {
.name = "bcell",

.cpu_set_size = sizeof(config.cpus),
.num_memory_regions = ARRAY_SIZE(config.mem_regions),
.num_irqchips = ARRAY_SIZE(config.irqchips),
.num_pci_devices = ARRAY_SIZE(config.pci_devices),

.vpci_irq_base = 128-32,
},
},

.cpus = {
0xf,
},

.mem_regions = {
{
   .phys_start = 0x80008000,
   .virt_start = 0x80008000,
   .size = 0x34DD000,
   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
{
   .phys_start = 0xff80,
   .virt_start = 0xff80,
   .size = 0x80,
   .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_IO,
},
 /* RAM */ {
.phys_start = 0x0,
.virt_start = 0x0,
.size = 0x2000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE,
},
/* IVSHMEM shared memory region for 00:00.0 */ {
.phys_start = 0x3fb0,
.virt_start = 0x3fb0,
.size = 0x10,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
},

.irqchips = {
/* GIC */ {
.address = 0x81001000,
.pin_base = 32,
.pin_bitmap = {
0x, 0x, 0x, 0x,
},
},
},

.pci_devices = {
/* 0001:00:00.0 */ {
.type = JAILHOUSE_PCI_TYPE_IVSHMEM,
.domain = 1,
.bdf = 0 << 3,
.bar_mask = {
0xff00, 0x, 0x,
0x, 0x, 0x,
},
.shmem_region = 3,
.shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH,
},
},
};

-Original Message-
From: Ralf Ramsauer [mailto:ralf.ramsa...@oth-regensburg.de]
Sent: Thursday, October 11, 2018 3:45 PM
To: Vladimir Neyelov ;
jailhouse-dev@googlegroups.com
Subject: Re: jaihouse porting on arm64 board



On 10/11/18 2:30 PM, 'Vladimir Neyelov' via Jailhouse wrote:
> Hello all,
>
> I am trying to porting jailhouse on our arm64 base board. I created
> configuration for root cell and
>
> trying to launch root cell.
>
>
>
> This is output form uart:
>
>
>
> Initializing Jailhouse hypervisor v0.9.1 (134-g006918ca-dirty) on CPU
> 3
>
>

Re: jaihouse porting on arm64 board

2018-10-11 Thread Ralf Ramsauer 



On 10/11/18 2:30 PM, 'Vladimir Neyelov' via Jailhouse wrote:
> Hello all,
> 
> I am trying to porting jailhouse on our arm64 base board. I created
> configuration for root cell and
> 
> trying to launch root cell.
> 
>  
> 
> This is output form uart:
> 
>  
> 
> Initializing Jailhouse hypervisor v0.9.1 (134-g006918ca-dirty) on CPU 3
> 
> Code location: 0xc0200800
> 
> Page pool usage after early setup: mem 39/996, remap 0/131072
> 
> Initializing processors:
> 
> CPU 3... OK
> 
> CPU 0... OK
> 
> CPU 2... OK
> 
> CPU 1... OK
> 
> Initializing unit: irqchip
> 
> Initializing unit: PCI
> 
> Adding virtual PCI device 00:00.0 to cell "bcell"

You're using ivshmem-net? I'd suggest to leave out the virtual PCI
device when enabling a new bord. You can add it again once everything
else works.

> 
> Page pool usage after late setup: mem 58/996, remap 5/131072
> 
> JAIL: exit loop
> 
> JAIL: exit loop
> 
> JAIL: exit loop
> 
> Activating hypervisor
> 
> JAIL: exit loop
> 
>  
> 
> JAIL: exit loop -> is my print in jailhouse driver in function
> enter_hypervisor after exiting from entry to hypervisor.
> 
> But after it linux stuck. Serial input/output doesn’t work. Debugger
> shows that linux run in el1_irg and received non stop   

So Linux is using the serial line as well?

> 
> spurious interrupt 1023. Why it happen. As I understand all interrupt
> firstly received by jailhouse and after forwarded to
> 
> linux(EL1). Spurious interrupt must not forwarded to linux.

Could you share your system configuration?

  Ralf

> 
> Thanks,
> 
> Vladimir
> 
>  
> 
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