Re: [j-nsp] juniper trinity
Why didn't they name it 'Turbo' ? Joe McGuckin ViaNet Communications j...@via.net 650-207-0372 cell 650-213-1302 office 650-969-2124 fax On Oct 31, 2009, at 2:32 PM, Richard A Steenbergen wrote: On Fri, Oct 30, 2009 at 05:35:45PM -0700, Judah Scott wrote: The datasheet for the new MX 3D line cards is a little strange. Assuming that a find-and-replace of KB to K will make it more coherent, this is Oh and on the subject of technical fail, what's up with the naming scheme of the 16x10GE card? MPC-3D-16XGE-SFPP 16 port 10 GbE MPC requires small form factor pluggable transceiver (SFP+) interfaces The 16 port 10GbE fixed configuration MPC for the MX Series 3D routers provide unprecedented port density and performance for the metro core and for large enterprises. What idiot thought hey I know, let's call this a fixed-configuration modular port concentrator, instead of a DPC like all the other fixed config cards we have? Probably the same one who thought throwing 3D into the part numbers made everything cooler. I wonder if the cards come with glasses that make the logo pop out at you or something. :) -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
It looks like you're right. This Trio chipset is a 30G chipset (full duplex) and they have 4 of them per a 120G line card. It makes sense, they have a 50G (full duplex) chipset on the T1600 core box and then the 30G one for the MX. Of course they are totally different chipsets, the former being not programmable and the latter being programmable. But I was hoping that Juniper would come up with something better than just a 30G chipset. EZChip NP4 will have better throughput than this. Marlon On Fri, Oct 30, 2009 at 5:35 PM, Judah Scott judah.scott@gmail.comwrote: The datasheet for the new MX 3D line cards is a little strange. Assuming that a find-and-replace of KB to K will make it more coherent, this is an awesome amount of queues when comparing to competitors. However, the new FPC/PIC-like card strategy is in 30Gb/s and 60Gb/s flavors. Given that the 16x10GE card is oversubscribed this looks like the old DPC 4x10Gb/s stacked complex design (except now it is 4x30Gb/s?). I guess this because the numbering is much like the DPC in that they are 0/0-3 1/0-3 2/0-3 3/0-3. Would Juniper really come out with a 30Gb/s (full duplex) chipset? With no 40GE announcement I can only assume this chipset is going to be damn hard (or expensive) to do 40GE interfaces. Am I just missing something? -J Scott On Mon, Oct 26, 2009 at 12:16 AM, magno massimo.magn...@gmail.com wrote: I agree, and I am pretty sure the new chipset will encompass and largely extend all the qos functionalities provided today by ez-chip chip. Cheers. Max On 24/10/2009, Richard A Steenbergen r...@e-gerbil.net wrote: On Sat, Oct 24, 2009 at 06:38:53PM +0200, magno wrote: I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. I believe the original question was do the new asics integrate the functionality of ezchip, thus eliminating the need for it, and from what I've heard I believe the answer is yes. That is why we're talking about the ezchip in the first place. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
On Fri, Oct 30, 2009 at 05:35:45PM -0700, Judah Scott wrote: The datasheet for the new MX 3D line cards is a little strange. Assuming that a find-and-replace of KB to K will make it more coherent, this is an awesome amount of queues when comparing to competitors. However, the new FPC/PIC-like card strategy is in 30Gb/s and 60Gb/s flavors. Given that the 16x10GE card is oversubscribed this looks like the old DPC 4x10Gb/s stacked complex design (except now it is 4x30Gb/s?). I guess this because the numbering is much like the DPC in that they are 0/0-3 1/0-3 2/0-3 3/0-3. Would Juniper really come out with a 30Gb/s (full duplex) chipset? With no 40GE announcement I can only assume this chipset is going to be damn hard (or expensive) to do 40GE interfaces. My understanding is that Trinity is more of an architecture than a single chip, so while the initial MX release will be 30Gbps per PFE the architecture itself is intended to support 40GE and 100GE in the future. The story I've heard is the 16x10GE card will be powered by (4) 30Gbps PFEs, with each group of 4 ports landing on a PFE. Each existing SCBs will be able to provide 10Gbps of fabric capacity to each PFE, and on MX960 you'll be able to run all 3 SCBs in parallel (instead of the current configuration of 2 active plus 1 in standby) to get your 30Gbps of fabric capacity per group of 4 ports. I'm not sure if there will be any benefits to local switching on the same PFE or not, but even if there are it seems like this will just help fabric redundancy not provide 30Gbps of forwarding capacity. Of course the biggest problem with the 16x10GE card is that it is SFP+ and can't do WAN PHY, so it will only be useful for simple datacenter SR/LR configurations and not in any carrier roles. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
On Fri, Oct 30, 2009 at 05:35:45PM -0700, Judah Scott wrote: The datasheet for the new MX 3D line cards is a little strange. Assuming that a find-and-replace of KB to K will make it more coherent, this is Oh and on the subject of technical fail, what's up with the naming scheme of the 16x10GE card? MPC-3D-16XGE-SFPP 16 port 10 GbE MPC requires small form factor pluggable transceiver (SFP+) interfaces The 16 port 10GbE fixed configuration MPC for the MX Series 3D routers provide unprecedented port density and performance for the metro core and for large enterprises. What idiot thought hey I know, let's call this a fixed-configuration modular port concentrator, instead of a DPC like all the other fixed config cards we have? Probably the same one who thought throwing 3D into the part numbers made everything cooler. I wonder if the cards come with glasses that make the logo pop out at you or something. :) -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
On Sunday 01 November 2009 04:09:51 am Richard A Steenbergen wrote: Of course the biggest problem with the 16x10GE card is that it is SFP+ and can't do WAN PHY, so it will only be useful for simple datacenter SR/LR configurations and not in any carrier roles. Unless you're extending coverage over DWDM, of course. Cheers, Mark. signature.asc Description: This is a digitally signed message part. ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
The datasheet for the new MX 3D line cards is a little strange. Assuming that a find-and-replace of KB to K will make it more coherent, this is an awesome amount of queues when comparing to competitors. However, the new FPC/PIC-like card strategy is in 30Gb/s and 60Gb/s flavors. Given that the 16x10GE card is oversubscribed this looks like the old DPC 4x10Gb/s stacked complex design (except now it is 4x30Gb/s?). I guess this because the numbering is much like the DPC in that they are 0/0-3 1/0-3 2/0-3 3/0-3. Would Juniper really come out with a 30Gb/s (full duplex) chipset? With no 40GE announcement I can only assume this chipset is going to be damn hard (or expensive) to do 40GE interfaces. Am I just missing something? -J Scott On Mon, Oct 26, 2009 at 12:16 AM, magno massimo.magn...@gmail.com wrote: I agree, and I am pretty sure the new chipset will encompass and largely extend all the qos functionalities provided today by ez-chip chip. Cheers. Max On 24/10/2009, Richard A Steenbergen r...@e-gerbil.net wrote: On Sat, Oct 24, 2009 at 06:38:53PM +0200, magno wrote: I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. I believe the original question was do the new asics integrate the functionality of ezchip, thus eliminating the need for it, and from what I've heard I believe the answer is yes. That is why we're talking about the ezchip in the first place. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
I agree, and I am pretty sure the new chipset will encompass and largely extend all the qos functionalities provided today by ez-chip chip. Cheers. Max On 24/10/2009, Richard A Steenbergen r...@e-gerbil.net wrote: On Sat, Oct 24, 2009 at 06:38:53PM +0200, magno wrote: I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. I believe the original question was do the new asics integrate the functionality of ezchip, thus eliminating the need for it, and from what I've heard I believe the answer is yes. That is why we're talking about the ezchip in the first place. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
http://www.amazon.com/Network-Processors-Architecture-Programming-Implementation/dp/0123708915/ref=sr_1_1?ie=UTF8qid=1256469141sr=8-1 Not to stray too off topic, but this book looks interesting... From: Nahrux M nah...@gmail.com To: Richard A Steenbergen r...@e-gerbil.net Cc: Juniper-Nsp juniper-nsp@puck.nether.net Sent: Sunday, October 25, 2009 1:00:49 AM Subject: Re: [j-nsp] juniper trinity Please have look at the below link EZchip Talks Juniper http://www.lightreading.com/document.asp?doc_id=179122 http://www.lightreading.com/document.asp?doc_id=179122 On Sat, Oct 24, 2009 at 11:19 PM, Richard A Steenbergen r...@e-gerbil.netwrote: On Sat, Oct 24, 2009 at 06:38:53PM +0200, magno wrote: I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. I believe the original question was do the new asics integrate the functionality of ezchip, thus eliminating the need for it, and from what I've heard I believe the answer is yes. That is why we're talking about the ezchip in the first place. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. My 2 cents. Max On 24/10/2009, Richard A Steenbergen r...@e-gerbil.net wrote: On Sat, Oct 24, 2009 at 11:56:18AM +0200, Roger Gabarit wrote: I'm sorry not to agree on this one. Unless you can prove me that I'm wrong :) - Juniper uses the chips on the MX series only in -Q- Line Cards. So when you use something only in advanced QoS line cards, there's something related to QoS, definitely. - Check the description of EZChip NPs on their website ( http://www.ezchip.com), they are built to provide the Ethernet framing and MAC lookup AND traffic management). Neither Cisco nor Juniper would buy a chip to have it do only 20% of what it could do. Cisco uses the chip in the ES+/ES40 and in ASR 9k cards. Juniper uses EZChips on all MX series line cards, not just -Q. In fact, the distinction between the original MX DPCs and the -E models is the rev of EZChip, with the -E's having support for larger microcode (1.5KB vs 6KB). On regular switching/routing cards the EZChip is used only for framing and MAC lookup, all of the IP routing and QoS is handled by the I-Chip. I think you're actually right about the -Q cards, there is some EZChip QoS functionality used there to implement the per-VLAN features, but I (and one would assume most sane people with a budget :P) don't touch the -Q cards. :) All that stuff makes me think that the 2 vendors will not release any 100G ports (*with advanced QoS*) on MX or ASR until the EZChip NP4 is produced (not only prototypes). That gives by the way 2 years advance to Alcatel-Lucent from that point of view, because their 100G NP has been ready since last year. Funny market :) But well, let's wait for Juniper's next week announcement. I don't think the Trinity announcement has anything to do with 100G, but I could be wrong. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
On Sat, Oct 24, 2009 at 06:38:53PM +0200, magno wrote: I repeat, Trinity has nothing to do with ez-chip. My advice is to stop elucubrating around any ez-chip whatever. Ez-chip proved to be quite limited for some qos functions, so I really don't think juniper wants to be qos feature limited by a third-party chip anymore. I believe the original question was do the new asics integrate the functionality of ezchip, thus eliminating the need for it, and from what I've heard I believe the answer is yes. That is why we're talking about the ezchip in the first place. -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
[j-nsp] juniper trinity
Hi, does anyone know what is this all about: http://www.forbes.com/2009/10/21/cisco-hardware-software-technology-cio-network-juniper.html They say ...will reveal a new chipset it says is capable of twice the data-pushing capacity of the current industry record Juniper already has a 100G (half duplex) chip set on T1600 (ASIC) , and so does Alcatel-Lucent on 7750/7450 platforms (true network processor) . Does this announcement means that this new chip set will be a 200G (half duplex) chip set or is it all a marketing hype? Will it be an ASIC or a true NP? And why would they change their logo? Marlon ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
Re: [j-nsp] juniper trinity
Guys, forbes or not forbes, maybe this time could be even better... Stay tuned... M. On 23/10/2009, Richard A Steenbergen r...@e-gerbil.net wrote: On Fri, Oct 23, 2009 at 08:53:17AM -0700, Marlon Duksa wrote: Keep in mind that this is from the Forbes magazine - these guys have no clue what a router is. But the point is that something is coming out next week, and it gives me kind of clue what... I gather they will have 40G (full duplex chipset), have three of them on a line card which will give them 120G of throughput??? Of course this will go on MX...With no fabric redundancy. Only 10GE ports, no 100GE?? Will find out soon... Remember the articles that came out before the MX's release, about how Juniper had outsourced the entire thing and it was an EZChip based platform? Makes you wonder exactly how full of shit they are on every other article that isn't about something you actually know well, doesn't it? :) -- Richard A Steenbergen r...@e-gerbil.net http://www.e-gerbil.net/ras GPG Key ID: 0xF8B12CBC (7535 7F59 8204 ED1F CC1C 53AF 4C41 5ECA F8B1 2CBC) ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp
