[valgrind] [Bug 426123] New: PPC ISA 3.1 support is missing, part 3
https://bugs.kde.org/show_bug.cgi?id=426123 Bug ID: 426123 Summary: PPC ISA 3.1 support is missing, part 3 Product: valgrind Version: unspecified Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- Created attachment 131370 --> https://bugs.kde.org/attachment.cgi?id=131370=edit add isa 3.1 support for instructiions to guest_ppc_toIR.c This patch contains the third set of patches for the PPC64 ISA 3.1 valgrind support. The set only consists of one Valgrind and one testsuite patch as the are relatively large. The Valgrind patch adds support for the SIMD permute class instructions. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added Attachment #130689|0 |1 is obsolete|| --- Comment #21 from Carl Love --- Created attachment 131014 --> https://bugs.kde.org/attachment.cgi?id=131014=edit Test suite foundation Updating the Test suite foundation patch. Previous file had a couple of files, test_isa_3_1_RT.val-out and test_isa_3_1_XT.val-out,in the patch that were not supposed to be in the patch. These were outputs from testing valgrind to verify the results. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #20 from Carl Love --- Created bugzilla for second set of patches. https://bugs.kde.org/show_bug.cgi?id=425232 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #8 from Carl Love --- Created attachment 130796 --> https://bugs.kde.org/attachment.cgi?id=130796=edit testsuite support vector Integer multiply divide modulo instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #7 from Carl Love --- Created attachment 130795 --> https://bugs.kde.org/attachment.cgi?id=130795=edit testsuite support vsx 32-byte storage access instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #6 from Carl Love --- Created attachment 130794 --> https://bugs.kde.org/attachment.cgi?id=130794=edit testsuite support set boolean extension instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #5 from Carl Love --- Created attachment 130793 --> https://bugs.kde.org/attachment.cgi?id=130793=edit testsuite support byte reverse instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #4 from Carl Love --- Created attachment 130792 --> https://bugs.kde.org/attachment.cgi?id=130792=edit functional support Vector integer multiply divide modulo instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #3 from Carl Love --- Created attachment 130791 --> https://bugs.kde.org/attachment.cgi?id=130791=edit functional support VSX 32-byte storage access instructiions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #2 from Carl Love --- Created attachment 130790 --> https://bugs.kde.org/attachment.cgi?id=130790=edit funcitonal support set boolean extension instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 --- Comment #1 from Carl Love --- Created attachment 130789 --> https://bugs.kde.org/attachment.cgi?id=130789=edit functional support byte reverse instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 425232] New: PPC ISA 3.1 support is missing, part 2
https://bugs.kde.org/show_bug.cgi?id=425232 Bug ID: 425232 Summary: PPC ISA 3.1 support is missing, part 2 Product: valgrind Version: unspecified Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- This bugzilla is for the second set of patches for adding the Power ISA 3.1 support to valgrind. The bugziilla for the first set of patches is 423195. This set includes four functional patches and four testsuite patches to add support for: - Byte reverse instructions - Set boolean extensiion instructions - VSX 32-byte storage access instructions - Vector integer multiply and divide modulo instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #19 from Carl Love --- The testsuite has been updated to address the concerns with the previous patch. The C code that was in the isa_3_1_helpers.h file has been put into a new file test_isa_3_1_common.c. The license for the test files was changed to GPL 2 or later. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #18 from Carl Love --- Created attachment 130690 --> https://bugs.kde.org/attachment.cgi?id=130690=edit Testsuite load store word instructions Add tests for the load store word instructions. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added Attachment #130174|0 |1 is obsolete|| --- Comment #17 from Carl Love --- Created attachment 130689 --> https://bugs.kde.org/attachment.cgi?id=130689=edit Test suite foundation The testsuite patch is being reposted as a series of two patches. 1) Test suite foundation patch, adds all the needed infrastructure for doing the tests. 2) Load store test suite, adds tests for the Valgrind functionality added in the patch "Add prefiexed support for the following word..." -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195
--- Comment #16 from Carl Love ---
I have uploaded the latest version of the three Valgrind ISA 3.1 support
patches.
A small error was found in the patch for "Add check for isa 3.1 support". The
original line in coregrind/m_initimg/initimg-linux.c, setup_client_stack() was
+/* ISA 3.1 */
+auxv_3_1 = (auxv->u.a_val & 0x0100ULL) == 0x0100ULL;
+hw_caps_3_1 = (vex_archinfo->hwcaps & VEX_HWCAPS_PPC64_ISA3_1)
+ == VEX_HWCAPS_PPC64_ISA3_1;
the hex values were changed to:
+/* ISA 3.1 */
+auxv_3_1 = (auxv->u.a_val & 0x0004ULL) == 0x0004ULL;
+hw_caps_3_1 = (vex_archinfo->hwcaps & VEX_HWCAPS_PPC64_ISA3_1)
+ == VEX_HWCAPS_PPC64_ISA3_1;
The following are the fixes for the second patch, "Instruction prefix support"
to address Julian's comments
> 0002-ISA-3.1-Instruction-Prefix-Support.patch
>
> Adds the support for prefix instructions
static Addr64 nextInsnAddr( void )
{
- return guest_CIA_curr_instr + 4;
+ return guest_CIA_curr_instr + WORD_INST_SIZE;
}
Is this correct? What if this insn is an 8-byte insn?
Yes it is correct. Added comment for clarity:
static Addr64 nextInsnAddr( void )
{
+ /* Note in the case of a prefix instruction, delta has already been
+ incremented by WORD_INST_SIZE to move past the prefix part of the
+ instruction. So only need to increment by WORD_INST_SIZE to get to
+ the start of the next instruction. */
return guest_CIA_curr_instr + WORD_INST_SIZE;
}
The prefix check macro check
+#define ENABLE_PREFIX_CHECK 1
+
+#if ENABLE_PREFIX_CHECK
+#define PREFIX_CHECK { vassert( !prefix_instruction( prefixInstr ) ); }
+#else
+#define PREFIX_CHECK { }
+#endif
I'm not sure whether you're intending to use PREFIX_CHECK just for debugging
the implementation
(meaning, it will fail if there are implementation bugs, but can't be made to
fail regardless of
the input) or whether it will fail if there is some kind of invalid input. The
first use is OK,
but for the second use we need to generate SIGILL instead of asserting. Can
you say which it is?
It is just a development check to make sure the instruction parsing is correct.
There are no instruction inputs that would cause this to fail. I added the
following comment for clarification:
+#define ISA_3_1_PREFIX_CHECK if (prefixInstr) {if (!allow_isa_3_1) goto
decode_noIsa3_1;}
+
+/* ENABLE_PREFIX_CHECK is for development purposes. Turn off for production
+ releases*/
#define ENABLE_PREFIX_CHECK 1
I went ahead and turned it off for the commit. I will turn it on and off again
as we do each set of patches.
The issue with dis_nop_prefix:
+static Bool dis_nop_prefix ( UInt prefixInstr, UInt theInstr )
+{
...
+ return PREFIX_NOP_INVALID;
This seems not-correct from a types point of view. dis_nop_prefix is declared
to return a Bool,
but PREFIX_NOP_INVALID is -1. I imagine this only compiles because of how lame
C's type system
is. Can you fix it so that Bool values are only True or False?
@@ -28598,6 +29000,35 @@ DisResult disInstr_PPC_WRK (
+ int ret;
+ ret = dis_nop_prefix( prefixInstr, theInstr);
+ if (ret == True)
+ goto decode_success;
+ else if (ret == PREFIX_NOP_INVALID)
+ goto decode_failure;
Related problem here; pls fix (`ret` being sometimes True and sometimes
PREFIX_NOP_INVALID given
that they have different types)
The function needs to return type Int. We need to know True, False or invalid.
Changed the code to:
static Int dis_nop_prefix ( UInt prefixInstr, UInt theInstr )
{
...
}
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[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added Attachment #130176|0 |1 is obsolete|| --- Comment #15 from Carl Love --- Created attachment 130632 --> https://bugs.kde.org/attachment.cgi?id=130632=edit Add prefixed support for the following word Updated the patch -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added Attachment #130175|0 |1 is obsolete|| --- Comment #14 from Carl Love --- Created attachment 130631 --> https://bugs.kde.org/attachment.cgi?id=130631=edit Instruction prefix support Updated the patch per Julian's comments -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added Attachment #130173|0 |1 is obsolete|| --- Comment #13 from Carl Love --- Created attachment 130630 --> https://bugs.kde.org/attachment.cgi?id=130630=edit Add check for isa 3.1 support Updated the patch per Julian's comments -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #6 from Carl Love --- This bugzilla covers the first four patches of the ISA 3.1 support for PPC. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #5 from Carl Love --- Created attachment 130176 --> https://bugs.kde.org/attachment.cgi?id=130176=edit Initial load and store instruction tests 0004-Initial-ISA-3.1-instruction-tests.patch Testsuite for new instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #4 from Carl Love --- Created attachment 130175 --> https://bugs.kde.org/attachment.cgi?id=130175=edit Add prefixed support for the following word 0003-ISA-3.1-Add-prefixed-support-for-the-following-word-.patch Add prefixed support for new load and store instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #3 from Carl Love --- Created attachment 130174 --> https://bugs.kde.org/attachment.cgi?id=130174=edit Adds the support for prefix instructions 0002-ISA-3.1-Instruction-Prefix-Support.patch Adds the support for prefix instructions -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #2 from Carl Love --- Created attachment 130173 --> https://bugs.kde.org/attachment.cgi?id=130173=edit Add check for isa 3.1 support 0001-Add-check-for-isa-3.1-support.patch Adds base support for detecting ISA 3.1 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Carl Love changed: What|Removed |Added CC||will_schm...@vnet.ibm.com -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 --- Comment #1 from Carl Love --- Posted first 4 of about 36 patches for review. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423195] New: PPC ISA 3.1 support is missing.
https://bugs.kde.org/show_bug.cgi?id=423195 Bug ID: 423195 Summary: PPC ISA 3.1 support is missing. Product: valgrind Version: unspecified Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- IBM has published the latest ISA 3.1. This bugzilla will be used to track adding the new ISA 3.1 support to Valgrind. There are approximately 244 new instructions in ISA 3.1 that need to be supported in Valgrind. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 422677] PPC sync instruction L field should only be 2 bits in ISA 3.0
https://bugs.kde.org/show_bug.cgi?id=422677 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 422677] PPC sync instruction L field should only be 2 bits in ISA 3.0
https://bugs.kde.org/show_bug.cgi?id=422677 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|CONFIRMED |RESOLVED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 422677] PPC sync instruction L field should only be 2 bits in ISA 3.0
https://bugs.kde.org/show_bug.cgi?id=422677 Carl Love changed: What|Removed |Added Ever confirmed|0 |1 Status|REPORTED|CONFIRMED --- Comment #1 from Carl Love --- Fixed, tested by user, closing. commit fb6f7abcbc92506d302fb18a2c5fc853d2929248 Author: Carl Love Date: Tue Jun 9 10:42:03 2020 -0500 Power PC Fix extraction of the L field for sync instruction The L field is currently a two bit[22:21] field in ISA 3.0. The size of the L field has changed over time. Currently the ISA 3.0 Valgrind sync instruction support code sets the flag_L for the instruction L field to a five bit value that includes bits that are marked reserved the sync instruction. This patch fixes the issue for ISA 3.0 to only setting flag_L the specified two bits. Valgrind bugzilla: https://bugs.kde.org/show_bug.cgi?id=422677 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423021] Missing link to PPC ISA, missing HWCAP check
https://bugs.kde.org/show_bug.cgi?id=423021 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423021] Missing link to PPC ISA, missing HWCAP check
https://bugs.kde.org/show_bug.cgi?id=423021 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|CONFIRMED |RESOLVED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423021] Missing link to PPC ISA, missing HWCAP check
https://bugs.kde.org/show_bug.cgi?id=423021 Carl Love changed: What|Removed |Added Ever confirmed|0 |1 Status|REPORTED|CONFIRMED --- Comment #1 from Carl Love --- Patch applied commit 8151414f0c150a81b06c95a3eaab87a2558521a8 Author: Carl Love Date: Mon Jun 15 11:31:16 2020 -0500 Bugzilla 423021 - PPC: Add missing ISA 3.0 documentation link and HWCAPS test. Add the check for the PPC_FEATURE2_ARCH_3_00 setting in the HWCAP2 string. Add the information on where to find the public IBM ISA 3.0B document. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 423021] New: Missing link to PPC ISA, missing HWCAP check
https://bugs.kde.org/show_bug.cgi?id=423021 Bug ID: 423021 Summary: Missing link to PPC ISA, missing HWCAP check Product: valgrind Version: unspecified Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- The link to the Power ISA 3.0 document is missing. Also, there is a chick to make sure the PPC HWCAP2 matches the setting in VEX HWCAPS that is missing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 422677] PPC sync instruction L field should only be 2 bits in ISA 3.0
https://bugs.kde.org/show_bug.cgi?id=422677 Carl Love changed: What|Removed |Added CC||tul...@quites.com.br, ||will_schm...@vnet.ibm.com Assignee|jsew...@acm.org |c...@us.ibm.com -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 422677] New: PPC sync instruction L field should only be 2 bits in ISA 3.0
https://bugs.kde.org/show_bug.cgi?id=422677 Bug ID: 422677 Summary: PPC sync instruction L field should only be 2 bits in ISA 3.0 Product: valgrind Version: 3.15 SVN Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- The L field for the sync instruction is being set to a 5 bit value. This allows the user to set values greater then 3. The value is then flagged as being out of bounds. The ISA 3.0 specifies the field is two bits wide. If a user specifies a value greater then three only the lower two bits should be used. In ISA 3.1 the field is expanded to three bits wide. Support for this will need to be added when the ISA 3.1 support is added for Power. This bug exists in Valgrind 3.16 and earlier. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED --- Comment #7 from Carl Love --- Closing as there has been no regression fallout from the fix. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #6 from Carl Love --- The attchement was commited. commit 6f8920fd8f9381cf75f5dd0c3c65ac5d86c0a537 Author: Carl Love Date: Fri Feb 21 17:22:26 2020 -0600 PPC64, fix for alignment of the rt_sigframe data structure. The PPC64 implementation checks that the data structure is aligned. The changes in commit listed below breaks the alignment. This patch adds an explicit alignment directive to ensure the data structure is allocated with the required alignment. This fixes 31 stderr failures, 10 stdout failures on the Power 7, Power 8 and Power 9 platforms. Changing status to RESOLVED/FIXED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|CONFIRMED |RESOLVED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004 --- Comment #4 from Carl Love --- Patch committed. commit c4c289ae994dfb8195e8b4889746d5e3d8296d25 (HEAD -> master, origin/master, origin/HEAD) Author: Carl Love Date: Wed Mar 18 12:29:20 2020 -0500 additional grail' fixes for ppc32 and ppc64 The grail changes introduce a kludge call for ppc64. The call fails on some tests as the flatten call generates adds addStmtToIRSB(bb, IRStmt_WrTmp(t1, IRExpr_ITE(flatten_Expr(bb, ex->Iex.ITE.cond), flatten_Expr(bb, ex->Iex.ITE.iftrue), flatten_Expr(bb, ex->Iex.ITE.iffalse; for V128 expressions. Iex_ITE isn't supported for V128 type. This patch adds the needed V128 support for the Iex_ITE expressions. Bugzilla 418004 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004 Carl Love changed: What|Removed |Added Status|REPORTED|CONFIRMED Ever confirmed|0 |1 --- Comment #5 from Carl Love --- Closing -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004 Carl Love changed: What|Removed |Added Attachment #126876|0 |1 is obsolete|| --- Comment #2 from Carl Love --- Created attachment 126880 --> https://bugs.kde.org/attachment.cgi?id=126880=edit Updated Additional PPC 64 grail fixes Per the path review, Pin_V128CMov and Pin_AvCMov are functionally the same. No need to add Pin_V128CMov. Updated the patch and retested and fixes three tests as expected. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004
--- Comment #1 from Carl Love ---
Created attachment 126876
--> https://bugs.kde.org/attachment.cgi?id=126876=edit
Additional PPC 64 grail fixes
The issue that is causing regression errors on PPC64 has to do
with the grail changes as mentioned in some private emails.
Specifically the commit in question is:
commit 076a79a48e251067758e1e9d8e50681450ed3889
Author: Julian Seward
Date: Wed Nov 27 08:52:45 2019 +0100
'grail' fixes for ppc32 and ppc64:
* do_minimal_initial_iropt_BB: for ppc64, flatten rather than
assert flatness.
(Kludge. Sigh.)
etc.
The patch adds the following code in ir_opt.c
// FIXME2 The TOC-redirect-hacks generators in m_translate.c --
gen_PUSH()
//and gen_PO() -- don't generate flat IR, and so cause this
assertion
//to fail. For the time being, hack around this by flattening,
//rather than asserting for flatness, on the afflicted platforms.
//This is a kludge, yes.
if (guest_arch == VexArchPPC64) {
bb0 = flatten_BB(bb0); // Kludge!
} else {
vassert(isFlatIRSB(bb0)); // How it Really Should Be (tm).
}
The issue comes from the new expressions generated by flatten_BB(bb0).
As mentioned in previous private emails, the flatten_BB() generates
V128 expressions for Iex_ITE which is not supported.
The following patch adds the needed support for Iex_ITE for V128
expressions. I kinda get what the Iex_ITE needs to do but don't claim
to completely understand it all or why the kludge calls flatten_BB()
only for the PPC64 architecture.
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[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED --- Comment #8 from Carl Love --- Nightly regression tests errors were reduced as expected. No unexpected issues/errors were seen. Closing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #7 from Carl Love --- The patch was committed to Valgrind mainline commit 6f8920fd8f9381cf75f5dd0c3c65ac5d86c0a537 Author: Carl Love Date: Fri Feb 21 17:22:26 2020 -0600 PPC64, fix for alignment of the rt_sigframe data structure. The PPC64 implementation checks that the data structure is aligned. The changes in commit listed below breaks the alignment. This patch adds an explicit alignment directive to ensure the data structure is allocated with the required alignment. This fixes 31 stderr failures, 10 stdout failures on the Power 7, Power 8 and Power 9 platforms. commit 3bac39a10abf292d332bb20ab58c6dd5c28f9108 Author: Eugene Syromyatnikov Date: Fri Mar 8 04:07:00 2019 +0100 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 --- Comment #6 from Carl Love --- Created attachment 126280 --> https://bugs.kde.org/attachment.cgi?id=126280=edit PPC64 alginment fix for struct rt_sigframe PPC64 alginment fix for struct rt_sigframe The attached patch fixes the alignment for the rt_sigframe structure on PPC64. This fixes numerous regresion errors. On power 7, 8 and 9, it fixes 31 stderr failures, 10 stdout failures. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760 --- Comment #5 from Carl Love --- Created attachment 126279 --> https://bugs.kde.org/attachment.cgi?id=126279=edit PPC64 alginment fix for struct rt_sigframe The attached patch fixes the alignment for the rt_sigframe structure on PPC64. This fixes numerous regresion errors. On power 7, 8 and 9, it fixes 31 stderr failures, 10 stdout failures. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 418004] New: Grail code additions break ppc64
https://bugs.kde.org/show_bug.cgi?id=418004
Bug ID: 418004
Summary: Grail code additions break ppc64
Product: valgrind
Version: unspecified
Platform: Other
OS: Linux
Status: REPORTED
Severity: normal
Priority: NOR
Component: vex
Assignee: jsew...@acm.org
Reporter: c...@us.ibm.com
Target Milestone: ---
The commit following commit adds code that causes valgrind to crash on a few of
the ppc64 specific tests:
none/tests/ppc64/test_isa_2_06_part3 (stdout)
none/tests/ppc64/test_isa_2_06_part3 (stderr)
none/tests/ppc64/test_isa_2_07_part2 (stdout)
none/tests/ppc64/test_isa_2_07_part2 (stderr)
commit 076a79a48e251067758e1e9d8e50681450ed3889
Author: Julian Seward
Date: Wed Nov 27 08:52:45 2019 +0100
'grail' fixes for ppc32 and ppc64:
* do_minimal_initial_iropt_BB: for ppc64, flatten rather than
assert flatness.
(Kludge. Sigh.)
etc.
The patch adds the following code in ir_opt.c
// FIXME2 The TOC-redirect-hacks generators in m_translate.c --
gen_PUSH()
//and gen_PO() -- don't generate flat IR, and so cause this
assertion
//to fail. For the time being, hack around this by flattening,
//rather than asserting for flatness, on the afflicted platforms.
//This is a kludge, yes.
if (guest_arch == VexArchPPC64) {
bb0 = flatten_BB(bb0); // Kludge!
} else {
vassert(isFlatIRSB(bb0)); // How it Really Should Be (tm).
}
The issue comes from the new expressions generated by flatten_BB(bb0).
The flatten_BB() generates V128 expressions for Iex_ITE which is not supported.
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[valgrind] [Bug 417238] Test memcheck/tests/vbit-test fails on mips64 BE
https://bugs.kde.org/show_bug.cgi?id=417238 Carl Love changed: What|Removed |Added CC||c...@us.ibm.com --- Comment #1 from Carl Love --- I tested the proposed fix on a Power 8 machine running Red Hat 7.6 (Maipo) in BE mode. Works great. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 --- Comment #5 from Carl Love --- Looks like the few additional errors that the fix given for this bug is for an unrelated commit after Eugene's changes. If we can get some testing of the fix on other platforms that would be helpful to decide if this is a good fix or not. I am a little concerned how universally the __attribute__ ((aligned (16))) works. Thanks. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 --- Comment #4 from Carl Love --- Rolled back to Eugene's commit 3bac39a10abf292d332bb20ab58c6dd5c28f9108 and applied my patch. That does fix all the regression error at that point. == 647 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 2 stdou\ tB failures, 2 post failures == gdbserver_tests/nlgone_abrt (stdoutB) gdbserver_tests/nlpasssigalrm(stdoutB) memcheck/tests/bug340392 (stderr) memcheck/tests/leak_cpp_interior (stderr) memcheck/tests/linux/rfcomm (stderr) massif/tests/new-cpp (post) massif/tests/overloaded-new (post) So, it looks like there is another commit that breaks a few things later. Looking -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760
--- Comment #4 from Carl Love ---
Found a partial fix.
The following patch reduces the number of regression tests on PPC64
significantly
coregrind/m_sigframe/sigframe-ppc64-linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/coregrind/m_sigframe/sigframe-ppc64-linux.c
b/coregrind/m_sigframe/
sigframe-ppc64-linux.c
index 0406f3c..b54c4e0 100644
--- a/coregrind/m_sigframe/sigframe-ppc64-linux.c
+++ b/coregrind/m_sigframe/sigframe-ppc64-linux.c
@@ -112,7 +112,7 @@ struct rt_sigframe {
vki_siginfo_t info;
struct vg_sig_private priv;
UChar abigap[288]; // unused
-};
+} __attribute__ ((aligned (16)));
#define SET_SIGNAL_LR(zztst, zzval) \
do { tst->arch.vex.guest_LR = (zzval);\
--
2.7.4
See bugzilla 417427 for more details
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[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427
--- Comment #3 from Carl Love ---
The following patch seems to clean up most of the issues:
Fix for regression error
---
coregrind/m_sigframe/sigframe-ppc64-linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/coregrind/m_sigframe/sigframe-ppc64-linux.c
b/coregrind/m_sigframe/
sigframe-ppc64-linux.c
index 0406f3c..b54c4e0 100644
--- a/coregrind/m_sigframe/sigframe-ppc64-linux.c
+++ b/coregrind/m_sigframe/sigframe-ppc64-linux.c
@@ -112,7 +112,7 @@ struct rt_sigframe {
vki_siginfo_t info;
struct vg_sig_private priv;
UChar abigap[288]; // unused
-};
+} __attribute__ ((aligned (16)));
#define SET_SIGNAL_LR(zztst, zzval) \
do { tst->arch.vex.guest_LR = (zzval);\
--
2.7.4
With this patch the number of regression errors is reduced to:
== 649 tests, 6 stderr failures, 3 stdout failures, 0 stderrB failures, 2
stdou\
tB failures, 2 post failures ==
gdbserver_tests/nlgone_abrt (stdoutB)
gdbserver_tests/nlpasssigalrm(stdoutB)
memcheck/tests/bug340392 (stderr)
memcheck/tests/leak_cpp_interior (stderr)
memcheck/tests/linux/rfcomm (stderr)
memcheck/tests/vcpu_fnfns(stdout)
memcheck/tests/vcpu_fnfns(stderr)
massif/tests/new-cpp (post)
massif/tests/overloaded-new (post)
none/tests/ppc64/test_isa_2_06_part3 (stdout)
none/tests/ppc64/test_isa_2_06_part3 (stderr)
none/tests/ppc64/test_isa_2_07_part2 (stdout)
none/tests/ppc64/test_isa_2_07_part2 (stderr)
Continuing to look at what additional changes are needed. But it looks like a
start.
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[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760 --- Comment #3 from Carl Love --- Arg, added comment to wrong bug. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416760] ppc64le Assertion 'VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))' failed
https://bugs.kde.org/show_bug.cgi?id=416760 --- Comment #2 from Carl Love --- Looks like this bug has also been reported in bug 416760. https://bugs.kde.org/show_bug.cgi?id=416760 -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427 --- Comment #1 from Carl Love --- Would like to get this issue fixed before the next Valgrind release. I will look at the commit further to help determine the root cause of the breakage. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 417427] New: commit to fix vki_siginfo_t definition created numerous regression errors on PPC64
https://bugs.kde.org/show_bug.cgi?id=417427
Bug ID: 417427
Summary: commit to fix vki_siginfo_t definition created
numerous regression errors on PPC64
Product: valgrind
Version: unspecified
Platform: Other
OS: Linux
Status: REPORTED
Severity: normal
Priority: NOR
Component: vex
Assignee: jsew...@acm.org
Reporter: c...@us.ibm.com
Target Milestone: ---
The regression testing for ppc64 reports a significant number of failed tests
with commit:
commit 3bac39a10abf292d332bb20ab58c6dd5c28f9108
Author: Eugene Syromyatnikov
Date: Fri Mar 8 04:07:00 2019 +0100
include/vki: fix vki_siginfo_t definition on amd64, arm64, and ppc64
As it turned out, the size of vki_siginfo_t is incorrect on these 64-bit
architectures:
(gdb) p sizeof(vki_siginfo_t)
$1 = 136
(gdb) ptype struct vki_siginfo
type = struct vki_siginfo {
int si_signo;
int si_errno;
int si_code;
union {
int _pad[29];
struct {...} _kill;
struct {...} _timer;
struct {...} _rt;
struct {...} _sigchld;
struct {...} _sigfault;
struct {...} _sigpoll;
} _sifields;
}
It looks like that for this architecture, __VKI_ARCH_SI_PREAMBLE_SIZE
hasn't been defined properly, which resulted in incorrect
VKI_SI_PAD_SIZE calculation (29 instead of 28).
<6a9e4> DW_AT_name: (indirect string, offset: 0xcf59):
_sifields
<6a9ef> DW_AT_data_member_location: 16
This issue has been discovered with strace's "make
check-valgrind-memcheck",
which produced false out-of-bounds writes on ptrace(PTRACE_GETSIGINFO)
calls:
SYSCALL[24264,1](101) sys_ptrace ( 16898, 24283, 0x0, 0x606bd40 )
==24264== Syscall param ptrace(getsiginfo) points to unaddressable
byte(s)
==24264==at 0x575C06E: ptrace (ptrace.c:45)
==24264==by 0x443244: next_event (strace.c:2431)
==24264==by 0x443D30: main (strace.c:2845)
==24264== Address 0x606bdc0 is 0 bytes after a block of size 144
alloc'd
(Note that the address passed is 0x606bd40 and the address reported is
0x606bdc0).
After the patch, no such errors observed.
* include/vki/vki-amd64-linux.h [__x86_64__ && __ILP32__]
(__vki_kernel_si_clock_t): New typedef.
[__x86_64__ && __ILP32__] (__VKI_ARCH_SI_CLOCK_T,
__VKI_ARCH_SI_ATTRIBUTES): New macros.
[__x86_64__ && !__ILP32__] (__VKI_ARCH_SI_PREAMBLE_SIZE): New macro,
define to 4 ints.
* include/vki/vki-arm64-linux.h (__VKI_ARCH_SI_PREAMBLE_SIZE): Likewise.
* include/vki/vki-ppc64-linux.h [__powerpc64__]
(__VKI_ARCH_SI_PREAMBLE_SIZE):
Likewise.
* include/vki/vki-linux.h [!__VKI_ARCH_SI_CLOCK_T]
(__VKI_ARCH_SI_CLOCK_T): New macro, define to vki_clock_t.
[!__VKI_ARCH_SI_ATTRIBUTES] (__VKI_ARCH_SI_ATTRIBUTES): New macro,
define to nil.
(struct vki_siginfo): Use __VKI_ARCH_SI_CLOCK_T type for _utime and
_stime fields. Add __VKI_ARCH_SI_ATTRIBUTES.
Resolves: https://bugs.kde.org/show_bug.cgi?id=405201
Reported-by: Dmitry V. Levin
Signed-off-by: Eugene Syromyatnikov
Prior to the patch the number of failed tests was:
== 647 tests, 3 stderr failures, 0 stdout failures, 0 stderrB failures, 1
stdou\
tB failure, 2 post failures ==
gdbserver_tests/nlcontrolc (stdoutB)
memcheck/tests/bug340392 (stderr)
memcheck/tests/leak_cpp_interior (stderr)
memcheck/tests/linux/rfcomm (stderr)
massif/tests/new-cpp (post)
massif/tests/overloaded-new (post)
Currently we have
== 649 tests, 38 stderr failures, 13 stdout failures, 1 stderrB failure, 5
stdo\
utB failures, 2 post failures ==
gdbserver_tests/mcinfcallRU (stderr)
gdbserver_tests/mcsignopass (stderr)
gdbserver_tests/mcsignopass (stdoutB)
gdbserver_tests/mcsigpass(stderr)
gdbserver_tests/mcsigpass(stdoutB)
gdbserver_tests/nlcontrolc (stdoutB)
gdbserver_tests/nlpasssigalrm(stderr)
gdbserver_tests/nlpasssigalrm(stdoutB)
gdbserver_tests/nlpasssigalrm(stderrB)
gdbserver_tests/nlvgdbsigqueue
[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED --- Comment #11 from Carl Love --- closed issue -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #9 from Carl Love --- Mark: I pulled down and reviewed your version of the patch. I tested it on PPC64 Power 8 and PPC64 Power 9. It passed fine on both systems. Note, the regression suite was compiled with a pre GCC 10 compiler. I manually compiled the two test cases using a version of the GCC 10 compiler with no issues. The patch was committed to Valgrind mainline. commit 4f70aa4fb0d4cef97ee34602d72f3980c5a83bf6 Author: Carl Love Date: Tue Jan 28 12:17:16 2020 -0600 PPC64: Fix assembler constraints. The PPC64 assembler constraints "ws", "wa" and "ww" have changed to "wa" in GCC 10. Update the ppc64 tests test_isa_2_07_part1.c and test_isa_3_0.c. I believe the issue can be closed if you agree. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667 --- Comment #5 from Carl Love --- Created attachment 125376 --> https://bugs.kde.org/attachment.cgi?id=125376=edit Patch, fix assembler constraints The attached patch changes the ww and ws assembler constraints to wa. Please test this patch in your environment and let me know if it fixes all of the issues. I am only able to partially reproduce the errors you saw in the initial bug report. Thanks. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667 --- Comment #4 from Carl Love --- Julian, Mark: Looks like it is a GCC change. Per the message from Will It's related to some cleanups that Segher did last year. git show cc998fd5f43a296e1a12bf4de63c4c9dd1d39cfa git show 208a040511b9c4d9a59af1caafa855a031a7a0ca git show 0d0863136f59e7f937f60c772921bc73708fba81 "ws" is just "wa". and "wv" is "v", but only if VSX is enabled (otherwise it's NO_REGS). and rs6000: ww->wa in testsuite -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667
--- Comment #3 from Carl Love ---
Julian:
I hadn't thought to try different optimizations. I can reproduce the issue for
the mfvsrd test only with no optimizations. No errors are reported with -O1,
-O2 and -O3 optimization levels.
$GCC_INSTALL/bin/gcc -c valgrind-bug.c
valgrind-bug.c: In function ‘test_mfvsrd’:
valgrind-bug.c:19:4: error: impossible constraint in ‘asm’
19 |__asm__ __volatile__ ("mfvsrd %0,%x1" : "=r" (r14) : "ws"
(vec_inA));
|^~~
$GCC_INSTALL/bin/gcc -O0 -c valgrind-bug.c
valgrind-bug.c: In function ‘test_mfvsrd’:
valgrind-bug.c:19:4: error: impossible constraint in ‘asm’
19 |__asm__ __volatile__ ("mfvsrd %0,%x1" : "=r" (r14) : "ws"
(vec_inA));
|^~~
~/Valgrind$ $GCC_INSTALL/bin/gcc -O1 -c valgrind-bug.c
~/Valgrind$ $GCC_INSTALL/bin/gcc -O2 -c valgrind-bug.c
~/Valgrind$ $GCC_INSTALL/bin/gcc -O3 -c valgrind-bug.c
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[valgrind] [Bug 416667] gcc10 ppc64le impossible constraint in 'asm' in test_isa
https://bugs.kde.org/show_bug.cgi?id=416667 --- Comment #1 from Carl Love --- Mark: I copied the two tests into a file and tried compiling them on a GCC10 compiler I have available. I was able to reproduce the first issue but not the second. I sent email to the compiler team about the issue. Wondering if there is an assembler change causing the issue. Anyway, just wanted to let you know I saw your bug and am looking into it. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 407340] PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 407340] PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|REPORTED|RESOLVED --- Comment #5 from Carl Love --- VEX and test case patches committed. commit 31b3a755a93daaacbb993ffd80fb0780cc76464d Author: Carl Love Date: Tue May 28 14:03:59 2019 -0500 PPC64, Update testcases for vlogefp, vexptefp instructions https://bugs.kde.org/show_bug.cgi?id=407340 commit 3a345d9f8e8e98ee74f2c66f69ab51220cd18d47 Author: Carl Love Date: Tue May 28 14:07:04 2019 -0500 PPC64, Add support for vlogefp, vexptefp instructions Add Iop_Exp2_32Fx4 to VEX/pub/libvex_ir.h to support the 2^x instruction. Enable the existing test support for the two instructions in none/tests/ppc64/subnormal_test.c and none/tests/ppc64/jm-insns.c. https://bugs.kde.org/show_bug.cgi?id=407340 Closing bug -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|REPORTED|RESOLVED --- Comment #13 from Carl Love --- The VEX and testsuite patch were committed. commit d2cbb78a151256290d490fcb7a805884d6406a7e Author: Carl Love Date: Tue May 28 11:33:00 2019 -0500 PPC64, Subnormal testcase changes VEX patch fixed issues with generating subnormal results. This patch adds a specific test case and updates the expected values for the existing test case. Update jm-vmx tests, add subnormal test case. https://bugs.kde.org/show_bug.cgi?id=406256 commit 991db2a39bcbdbf5cdb4337684c29f96c63070a8 Author: Carl Love Date: Tue May 28 11:26:13 2019 -0500 PPC64, fix issues with dnormal values in the vector fp instructions. The result of the floating point instructions vmaddfp, vnmsubfp, vaddfp, vsubfp, vmaxfp, vminfp, vrefp, vrsqrtefp, vcmpeqfp, vcmpeqfp, vcmpgefp, vcmpgtfp are controlled by the setting of the NJ bit in the VSCR register. If VSCR[NJ] = 0; then denormalized values are handled as specified by Java and the IEEE standard. If the bit is a 1, then the denormalized element in the vector is replaced with a zero. Valgrind was not properly handling the denormalized case for these instructions. This patch fixes the issue. https://bugs.kde.org/show_bug.cgi?id=406256 Closing -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #11 from Carl Love --- Julian: > https://urldefense.proofpoint.com/v2/url?u=https-3A__bugs.kde.org_sho > w-5Fbug.cgi-3Fid-3D406256=DwIFaQ=jf_iaSHvJObTbx- > siA1ZOg=RFEmMkZAk > -- > _wFGN5tkM_A=5o2Sjz00Tqqxz4dOXWvuGwWsbia9aURAkghSmeY0Sm0=1rRXfsCpJ > Dor_oQ1SSmOvBBYZkeJgD7aT4Iz_gYMxGk= > > --- Comment #8 from Julian Seward --- > Thanks for the respin. I have mostly only minor comments about > it. Is OK to > land provided all the comments below are addressed, except for the > one about > vectorising negateVF32, which would be nice to fix if you can do so > relatively > easily, but is not essential. > > Also, when landing, please split the patch into two parts: the > implementation > and the tests, and land the implementation first. Done. I had all the changes in one patch to make it easier to move files around to 5 different machines for testing. > > > --- a/VEX/priv/guest_ppc_toIR.c > +++ b/VEX/priv/guest_ppc_toIR.c > > is_Zero_Vector, is_Denorm_Vector and dnormV32_adj have vectorised > nicely. Is > it also possible to do negateVF32 with vectors, rather lane > by lane as at > present? Note, for a vector version of is_NaN, you can see more or > less how > to do it by looking at isNan() in host_ppc_isel.c. > Renamed negateVF32(value) to negate_Vector( size, value) to make the naming more consistent. Also, structured it to generalize easily to more vector sizes. Currently just supporting vector of F32. This change requires creating the new function is_NaN_Vector(size, value) as you eluded to above. Again, structured the function to easily extend to more vector sizes. > > +static IRExpr* dnormV32_adj ( IRExpr* src ) > > nit: maybe rename this to be more consistent with your other vector- > helper > function names (is_Zero_Vector etc) > Yea, consistency is a good thing. Renamed dnormV32_adj() to dnorm_adj_Vector(). Note did not restructure the function to easily extend to other vector sizes. Left that for the future. > > + assign ( VSCR_NJ_mask, binop( Iop_64HLtoV128, > + unop( Iop_1Sto64, > + mkexpr( VSCR_NJ ) ) , > + unop( Iop_1Sto64, > + mkexpr( VSCR_NJ ) ) ) ); > > nit: VSCR_NJ isn't used past this point. Change its type to Ity_I64 > and lift > the 1Sto64 operation into that definition, so it isn't duplicated > here. > Yea, that would be better. Fixed. > > --- a/coregrind/m_dispatch/dispatch-ppc32-linux.S > +++ b/coregrind/m_dispatch/dispatch-ppc32-linux.S > > LafterFP2: > + /* set host Vector Status Control Register bit NJ to zero > + to ensure the host generate subnormal results for the > + vector floating point instructions. */ > +mfvscr 16 /* Clear NJ bit */ > +vspltisw 9,0x1 /* 4x 0x0001 */ > +vspltisw 8,0x0 /* zero */ > +vsldoi 9,8,9,0x2 /* <<2*8 => 4x 0x0001 > */ > +vnor 9,9,9 /* 4x 0xFFFE */ > + vand 16,16,9 /* Mask out NJ bit */ > +mtvscr 16 > > (1) Guard these with #ifdef HAS_ALTIVEC like the other Altivec stuff > in > this file. Otherwise this will fail when run on a non-Altivec > enabled target > (do we still support any of those)? And the same for the other to > assembly > files. > (2) (As a check) is the above sequence runnable even on the lowest > level > Altivec subset? Otherwise (again) it will fail at run time. > > (3) I wasn't entirely clear what the changes to the post-run > invariant checks > are (after label "postamble:"). IIUC, they already do check that > VSCR[NJ].host == 0, but the comments are wrong, and you've updated > the > comments, but not the code? Can you clarify/re-check? When I went in to fix up the code per you comments, I noticed that the code I added to set VSCR[NJ] = 0 is not doing anything. I had missed the code a bit lower: /* set host AltiVec control word to the default mode expected by VEX-generated code. */ ld 6,.tocent__vgPlain_machine_ppc64_has_VMX@toc(2) ld 6,0(6) cmpldi 6,0 beq .LafterVMX2 vspltisw 3,0x0 /* generate zero */ mtvscr 3 which is forcing the entire VSCR register to zero. The instruction v
[valgrind] [Bug 407340] PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 --- Comment #3 from Carl Love --- Created attachment 120093 --> https://bugs.kde.org/attachment.cgi?id=120093=edit separate test case patch The test case changes were split into a separate patch -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 407340] PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 --- Comment #2 from Carl Love --- Created attachment 120092 --> https://bugs.kde.org/attachment.cgi?id=120092=edit updated patch per changes to previous dnormal patch The patch to add support for the vlogefp and vexptefp instructions is dependent on the dnormal patch. The patch was also split into a VEX patch and a test case patch -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #10 from Carl Love --- Created attachment 120090 --> https://bugs.kde.org/attachment.cgi?id=120090=edit Update test case, add new test The test case patch that goes with the subnormal changes in VEX. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #9 from Carl Love --- Created attachment 120089 --> https://bugs.kde.org/attachment.cgi?id=120089=edit Updated patch to fix issues with dnormal values v5 Updated the patch per latest comments from Julian. Split patch into VEX patch and test case patch. Renamed negateVF32(value) to negate_Vector( size, value), vectorized. Created new function is_NaN_Vector(size, value) Renamed dnormV32_adj() to dnorm_adj_Vector(). Lifted VSCR_NJ, made it Ity_I64. The various assembly routines: Removed my new code to set VSCR[NJ]=0 as it is redundant given that there is existing code that is already clearing the register. Updated the comments in the code to make it clear where VSCR[NJ] is set to 0. Updated comments with regard to the invarent check to make it clear what is being checked and what to do based on the check. There are now no functional changes to the assembly functions as they already ensure the VSCR[NJ] but is set to 0. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #7 from Carl Love --- Created attachment 119940 --> https://bugs.kde.org/attachment.cgi?id=119940=edit Updated patch to fix issues with dnormal values v5 Updated patch after finding issues on Power 7. The new assembly code was re-written to remove the mtvsrd and mfvsrd so the code will run. The specific files are: coregrind/m_dispatch/dispatch-ppc32-linux.S coregrind/m_dispatch/dispatch-ppc64be-linux.S coregrind/m_dispatch/dispatch-ppc64le-linux.S The updated patch has been tested on Power 6, Power 7, Power 8LE, Power 8BE and Power 9. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #6 from Carl Love --- Additional testing shows that the mtvsrd and mfvsrd instructions which are used in the assembly interface functions are not supported on P7 and earlier. Will need to rework current patch. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added Attachment #119918|0 |1 is obsolete|| --- Comment #5 from Carl Love --- Created attachment 119920 --> https://bugs.kde.org/attachment.cgi?id=119920=edit Updated patch to fix issues with dnormal values v4 Testing on P7 found that I needed to make sure the system supports altivec or the subnormal_test will fail on illegal inst. Updated the subnormal_test.vgtest file -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 407340] PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 --- Comment #1 from Carl Love --- Created attachment 119919 --> https://bugs.kde.org/attachment.cgi?id=119919=edit add support for vlogefp, vexptefp instructions Currently, valgrind recognizes the vlogefp, vexptefp instructions but errors out on them as they are not actually supported. The attached patch adds the needed support Julian, please review the patch as it adds a new Iop to file VEX/pub/libvex_ir.h + /* Vector floating-point exponential 2^x */ + Iop_Exp2_32Fx4, Please let me know if the name of the new Iop is OK. The Iop is calculates the value 2 raised to the X for each of the 32-bit words in the vector. Please let me know if you see any other issues with the patch as well. Thanks. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 407340] New: PPC64, does not support the vlogefp, vexptefp instructions
https://bugs.kde.org/show_bug.cgi?id=407340 Bug ID: 407340 Summary: PPC64, does not support the vlogefp, vexptefp instructions Product: valgrind Version: 3.15 SVN Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- SUMMARY STEPS TO REPRODUCE 1. 2. 3. OBSERVED RESULT EXPECTED RESULT SOFTWARE/OS VERSIONS Windows: macOS: Linux/KDE Plasma: (available in About System) KDE Plasma Version: KDE Frameworks Version: Qt Version: ADDITIONAL INFORMATION -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added Attachment #119504|0 |1 is obsolete|| --- Comment #4 from Carl Love --- Created attachment 119918 --> https://bugs.kde.org/attachment.cgi?id=119918=edit Updated patch to fix issues with dnormal values v3 Updated the patch. Moved the code to set VSCR[NJ] to the assembly routines for ppc64le, ppc64be, ppc32. Tested on P8 LE, P8 BE, P9. Manually verified the assembly code will jump to .invariant_violation if the VSCR[NJ] bit is set to 1 by replacing the "mfvscr 7" instruction with some instructions that sets contents of register v7 to 0x01 which is what the value would be if the NJ bit is set. The routine dnormV32_adj() was rewritten to use vector Iops. Fixed a couple of bugs that I found in retesting the patch. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added Attachment #119258|0 |1 is obsolete|| --- Comment #3 from Carl Love --- Created attachment 119504 --> https://bugs.kde.org/attachment.cgi?id=119504=edit Updated patch to fix issues with dnormal values Updated patch, needs review by Julian -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406198] none/tests/ppc64/test_isa_3_0_other test sporadically including CA bit in output
https://bugs.kde.org/show_bug.cgi?id=406198 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406198] none/tests/ppc64/test_isa_3_0_other test sporadically including CA bit in output
https://bugs.kde.org/show_bug.cgi?id=406198 Carl Love changed: What|Removed |Added Ever confirmed|0 |1 Status|REPORTED|CONFIRMED --- Comment #3 from Carl Love --- Patch reviewed and tested on Power 7, Power 8 BE, Power 8 LE, Power 9. The patch fixes the reported error. The patch has been committed to mainline. commit 7804ba3debb0ee990aaa49949d2629445c103d2b Author: Carl Love Date: Fri Apr 5 15:04:23 2019 -0500 PPC64, fix test_isa_3_0_other.c test -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406198] none/tests/ppc64/test_isa_3_0_other test sporadically including CA bit in output
https://bugs.kde.org/show_bug.cgi?id=406198 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Carl Love changed: What|Removed |Added CC||will_schm...@vnet.ibm.com -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 --- Comment #1 from Carl Love --- Created attachment 119258 --> https://bugs.kde.org/attachment.cgi?id=119258=edit Proposed fix for making the subnormal results track the VSCR[NJ] bit The attachment is a proposed fix for the issue. The Iops to implement the various vector floating point instructions map to a subset of the vector floating point instructions. The underlying host hardware needs to run with the VSCR[NJ] bit set to zero to generate the subnormal results. The guest state needs to then adjust the arguments/results of the vector floating point instructions as needed based on the guest setting of VSCR[NJ]. Hence the need to setup the host with VSCR[NJ] = 0. This was done in VEX/priv/host_ppc_defs.c, function getRRegUniverse_PPC (). The function is actually setting up the guest register state. The function is called once as part of the initialization process. That is the right time to set the host configuration. Ideally there would be a host initialization function that would be called for doing this but I don't see one. Given that there is not host specific function, I had to put the code into the guest setup function. I don't consider this to be the ideal place for the code. I would be interested in ideas on a more appropriate location for this code. *** The host setup code requires the addition of the -mvsx and -maltivec command line options to be set for Power 7. These options are on by default when compiling for Power 8, 9. Hence the Makefile.all.am change. Finally, the current regression tests do not seem to cover the subnormal cases well enough. I created an explicit subnormal test which runs with the VSCR[NJ] bit set to zero and one. Again, would appreciate feedback on where best to do the host initialization. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 406256] New: PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting
https://bugs.kde.org/show_bug.cgi?id=406256 Bug ID: 406256 Summary: PPC64, vector floating point instructions don't handle subnormal according to VSCR[NJ] bit setting Product: valgrind Version: 3.15 SVN Platform: Other OS: Linux Status: REPORTED Severity: normal Priority: NOR Component: vex Assignee: jsew...@acm.org Reporter: c...@us.ibm.com Target Milestone: --- The handling of subnormal arguments and results for the various vector floating point instructions is controlled by the VSCR[NJ] bit. VSCR[NJ] = 0 Denormalized values are handled as specified by Java and the IEEE standard. VSCR[NJ] = 1 If an element in a source VR contains a denormalized value, the value 0 is used instead. If an instruction causes an Underflow Exception, the corresponding element in the target VR is set to 0. In both cases the 0 has the same sign as the denormalized or underflowing value. Convert negative zero to positive zero. On BE systems, the VSCR[NJ] bit is set to 1. On LE systems, the setting is 0 as required by the ABI. Valgrind is generating results based on the setting of the bit in the host. If the user changes the bit in their application, the subnormal results do not match the expected results. This is due to the fact Valgrind does not track the setting of the bit. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 401828] none/tests/ppc64/test_isa_2_06_part1 failure on ppc64le (fcfids and fcfidus)
https://bugs.kde.org/show_bug.cgi?id=401828 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 401827] none/tests/ppc64/test_isa_2_06_part3 failure on ppc64le (xvrsqrtesp)
https://bugs.kde.org/show_bug.cgi?id=401827 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 401827] none/tests/ppc64/test_isa_2_06_part3 failure on ppc64le (xvrsqrtesp)
https://bugs.kde.org/show_bug.cgi?id=401827 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #2 from Carl Love --- I reviewed and tested the attached patch to fix this issue. The patch fixes this bug and bugzilla 401828. The patch was tested on Power 7, Power 8 LE, Power 8 BE, Power 9. The patch commit: commit 82e94fff802aece376d5ca8458ef49d24afd7bdf Author: Carl Love Date: Thu Apr 4 12:31:05 2019 -0500 PPC64, patch to test case issues reported in bugzilla 401827 and 401828. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 401828] none/tests/ppc64/test_isa_2_06_part1 failure on ppc64le (fcfids and fcfidus)
https://bugs.kde.org/show_bug.cgi?id=401828 Carl Love changed: What|Removed |Added Status|CONFIRMED |RESOLVED Resolution|--- |FIXED --- Comment #18 from Carl Love --- I reviewed and tested the attached patch to fix this issue. The patch fixes this bug and bugzilla 401827. The patch was tested on Power 7, Power 8 LE, Power 8 BE, Power 9. The patch commit: commit 82e94fff802aece376d5ca8458ef49d24afd7bdf Author: Carl Love Date: Thu Apr 4 12:31:05 2019 -0500 PPC64, patch to test case issues reported in bugzilla 401827 and 401828. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 395709] PPC64 is missing support for the xvnegsp instruction
https://bugs.kde.org/show_bug.cgi?id=395709 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405356] PPC64, xvcvsxdsp, xvcvuxdsp are supposed to write the 32-bit result to the upper and lower 32-bits of the 64-bit result
https://bugs.kde.org/show_bug.cgi?id=405356 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405356] PPC64, xvcvsxdsp, xvcvuxdsp are supposed to write the 32-bit result to the upper and lower 32-bits of the 64-bit result
https://bugs.kde.org/show_bug.cgi?id=405356 Carl Love changed: What|Removed |Added Status|REPORTED|RESOLVED Resolution|--- |FIXED --- Comment #2 from Carl Love --- No regressions found by automated regression testing. Closing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405362] PPC64, vmsummbm instruction doesn't handle overflow case correctly
https://bugs.kde.org/show_bug.cgi?id=405362 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|REPORTED|RESOLVED --- Comment #2 from Carl Love --- No regressions found by automated regression testing. Closing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405362] PPC64, vmsummbm instruction doesn't handle overflow case correctly
https://bugs.kde.org/show_bug.cgi?id=405362 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405363] PPC64, xvcvdpsxws, xvcvdpuxws, do not handle NaN arguments correctly.
https://bugs.kde.org/show_bug.cgi?id=405363 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405733] PPC64, xvcvdpsp should write 32-bit result to upper and lower 32-bits of the 64-bit destination field.
https://bugs.kde.org/show_bug.cgi?id=405733 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405733] PPC64, xvcvdpsp should write 32-bit result to upper and lower 32-bits of the 64-bit destination field.
https://bugs.kde.org/show_bug.cgi?id=405733 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|REPORTED|RESOLVED --- Comment #3 from Carl Love --- No regressions found by automated regression testing. Closing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405363] PPC64, xvcvdpsxws, xvcvdpuxws, do not handle NaN arguments correctly.
https://bugs.kde.org/show_bug.cgi?id=405363 Carl Love changed: What|Removed |Added Resolution|--- |FIXED Status|REPORTED|RESOLVED --- Comment #2 from Carl Love --- No regressions found by automated regression testing. Closing. -- You are receiving this mail because: You are watching all bug changes.
[valgrind] [Bug 405734] PPC64, vrlwnm, vrlwmi, vrldrm, vrldmi do not work properly when me < mb
https://bugs.kde.org/show_bug.cgi?id=405734 Carl Love changed: What|Removed |Added Status|RESOLVED|CLOSED -- You are receiving this mail because: You are watching all bug changes.
