[kicad-users] xilinx schematic designer nice for FPGA s is fun almost as nice as kicad
xilinx schematic designer nice for FPGA s is fun almost as nice as kicad the bus and herarchal system has functional buses but is more difficult than kicad's herarchal schematics. I am still trying to find out how to combine busses so I can have a comparitor that compares 2 32 bit numbers in it from 2 16 bit ones. A_LOW A_HIGH B_LOW B_HIGH is just slow to work with in comparison to if I could cobine the buses in xilinx software. The FPGA board on gadget factories website is open source I think I will do that in kicad sometime soon. At least some of it they did a interesting job of puting a arduino like processor softcore in it.
[kicad-users] I am about ready to send out my board will some people look at my documentation?
I am about ready to send out my board will some people look at my documentation? I wrote a pdf using open office writer that and all the kicad source files and libraries are in one folder. The file name NeuroCyberProstheticsSensor-0.zip the download page.. http://sites.google.com/site/openloopproject/Home/code-valt
[kicad-users] Re: jave bug in kicad module creator it puts the symbol on the top or bottom copper
It used to alow you to move something to a differennt layor but I don not know how to do that same with modifying the text in the file still the program needs to be ffixed or have that in the docs to work for others. --- In kicad-users@yahoogroups.com, mgebha mar...@... wrote: Hi, JavE uses pads to visualize the pixels. Does kicad allow pads to be placed in other layers than copper layers? ~Markus --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: jave bug in kicad module creator it puts the symbol on the top or bottom copper that is not as useful as if it was on the top or bottom silk screen... This is a very cool way to add a logo but if your board is small and you don't want it on the top copper or filp it to the bottom copper and mess up your wiring. .. it needs to go to the silk screen layors any sugjestions? I emailed the author.
[kicad-users] Re: FPGA design with KICAD?
xilinx allready has a sch entery thing in their free download after jumping
through signup login etc hoops.
It could be used as a reference...
--- In kicad-users@yahoogroups.com, jmhill.hartford jmhill.hartf...@...
wrote:
Hi Folks;
Just found this thread. I have an interest in making more use KiCad. I
already use KiCad for schematics and PC board layout. I have two items on my
wishlist.
o Be able to convert a KiCad schematic to a VHDL structural type description
of a circuit. This would be helpful for an undergraduate logic circuits
course.
I see that the .lib file format includes pin direction information and that
the netlist describes connections between pins. Perhaps a utility can be
written to produce such a VHDL structural description. What do you think? I
can certainly give it a try.
o Be able to convert a part of a schematic to a VHDL structural description.
I have students using KiCad to draw schematics which make some use of CPLDs.
In any case, some discussion would be appreciated.
Thanks;
Jonathan
--- In kicad-users@yahoogroups.com, Frank Bennett bennett78@ wrote:
--- In kicad-users@yahoogroups.com, Lothar Behrens lothar.behrens@ wrote:
Hi,
I think, this is not the main intention of KICAD, but as of the
availability of spice samples, is there also a way to use KICAD for
FPGA design?
Say, I would use a sub sheet to enter a group of logic to be placed
into a FPGA (reduced set of symbols only) and a tool that
translates the usual netlist into a VHDL file.
A schematic of Xilinx primitives..dump VHDL (ADA like) and become
twice as productive using Verilog (C like). Some good OpenSource
Simulators are: cVer and Icarus with gtkWaves. The FPGA tools accept
Verilog as well as VHDL.
Check out TKGate (http://www.tkgate.org/), the hierarchical
schematic is actually a verilog netlist with the graphical
information included as comments. It also includes a simulator.
EEschema actually does a better job than TKGate with the relation
to pins on a schematic page to the ports on the corresponding
sheet(module). Adding one should automatically produce the other.
(an unfullfilled enhancement request to the TKGate author) With
TKGate one has to enter each redundantly. There is a tool called
SpeedChart which is cool for this but cost $s... or Summit Design,
which I didn't like as well...
EEschema also seems to need some work handling:
bundles (i.e. {cas, ras, cs[1:0], we} ) verses pure
buses - a[15..0] (I would have prefered a[15:0])
both should be allowed in bus rippers and across port
boundaries to realize continuous assignments like:
assign ctrl[2:0] = {cas, ras, we};
TKGate could also include a comment on a schematic page
that would be included inline as RTL code, then alternately
an AND2 primitive could include something like:
code: assign y= a b;
One of my ole favorites (before Verilog-A) for a resistor or
module NetAlias(a,a);
inout a;
endmodule
happy HDLing,
Frank Bennett
A possible attempt may be supporting the 74XX series of IC's or some
to most of them to be known in a translation tool based
on the netlist. A barrier to the outer circuit (the pins of a FPGA)
would be all these wires, contacting unsupported components,
eg, they could not translated to be in a FPGA design, but in the outer
area.
Using the sub sheet would be a helper in separating FPGA related logic
from the outer area. (I think I could not distinguish between
signals on different sheets in a netlist, thus I don't see the pins
that connects sheets)
While this could be tried with the plain netlist, a netlist in XML
format would be another option to enable various transformations.
Is this possible?
There are other tools available for this, but a first step entry with
KICAD would be fine, as I work on Mac OS X and there are less
EDA tools available (known by me).
Thanks
Lothar
-- | Rapid Prototyping | XSLT Codegeneration | http://www.lollisoft.de
Lothar Behrens
Heinrich-Scheufelen-Platz 2
73252 Lenningen
[kicad-users] Re: FPGA design with KICAD?
I read quite a lot on tkgate it seems realy cool for testing but xilinx still
seems like the only one that makes something that will compile at least to my
understanding the documentation says like verilog so it is close but not
compiling. xilinx stuff I may use because it is there and learning another
language won't get me the device I want to make any faster the maple arm3
won't do multi channel blind source seperation on my adc's inputs in real time.
--- In kicad-users@yahoogroups.com, jmhill.hartford jmhill.hartf...@...
wrote:
Hi Folks;
Just found this thread. I have an interest in making more use KiCad. I
already use KiCad for schematics and PC board layout. I have two items on my
wishlist.
o Be able to convert a KiCad schematic to a VHDL structural type description
of a circuit. This would be helpful for an undergraduate logic circuits
course.
I see that the .lib file format includes pin direction information and that
the netlist describes connections between pins. Perhaps a utility can be
written to produce such a VHDL structural description. What do you think? I
can certainly give it a try.
o Be able to convert a part of a schematic to a VHDL structural description.
I have students using KiCad to draw schematics which make some use of CPLDs.
In any case, some discussion would be appreciated.
Thanks;
Jonathan
--- In kicad-users@yahoogroups.com, Frank Bennett bennett78@ wrote:
--- In kicad-users@yahoogroups.com, Lothar Behrens lothar.behrens@ wrote:
Hi,
I think, this is not the main intention of KICAD, but as of the
availability of spice samples, is there also a way to use KICAD for
FPGA design?
Say, I would use a sub sheet to enter a group of logic to be placed
into a FPGA (reduced set of symbols only) and a tool that
translates the usual netlist into a VHDL file.
A schematic of Xilinx primitives..dump VHDL (ADA like) and become
twice as productive using Verilog (C like). Some good OpenSource
Simulators are: cVer and Icarus with gtkWaves. The FPGA tools accept
Verilog as well as VHDL.
Check out TKGate (http://www.tkgate.org/), the hierarchical
schematic is actually a verilog netlist with the graphical
information included as comments. It also includes a simulator.
EEschema actually does a better job than TKGate with the relation
to pins on a schematic page to the ports on the corresponding
sheet(module). Adding one should automatically produce the other.
(an unfullfilled enhancement request to the TKGate author) With
TKGate one has to enter each redundantly. There is a tool called
SpeedChart which is cool for this but cost $s... or Summit Design,
which I didn't like as well...
EEschema also seems to need some work handling:
bundles (i.e. {cas, ras, cs[1:0], we} ) verses pure
buses - a[15..0] (I would have prefered a[15:0])
both should be allowed in bus rippers and across port
boundaries to realize continuous assignments like:
assign ctrl[2:0] = {cas, ras, we};
TKGate could also include a comment on a schematic page
that would be included inline as RTL code, then alternately
an AND2 primitive could include something like:
code: assign y= a b;
One of my ole favorites (before Verilog-A) for a resistor or
module NetAlias(a,a);
inout a;
endmodule
happy HDLing,
Frank Bennett
A possible attempt may be supporting the 74XX series of IC's or some
to most of them to be known in a translation tool based
on the netlist. A barrier to the outer circuit (the pins of a FPGA)
would be all these wires, contacting unsupported components,
eg, they could not translated to be in a FPGA design, but in the outer
area.
Using the sub sheet would be a helper in separating FPGA related logic
from the outer area. (I think I could not distinguish between
signals on different sheets in a netlist, thus I don't see the pins
that connects sheets)
While this could be tried with the plain netlist, a netlist in XML
format would be another option to enable various transformations.
Is this possible?
There are other tools available for this, but a first step entry with
KICAD would be fine, as I work on Mac OS X and there are less
EDA tools available (known by me).
Thanks
Lothar
-- | Rapid Prototyping | XSLT Codegeneration | http://www.lollisoft.de
Lothar Behrens
Heinrich-Scheufelen-Platz 2
73252 Lenningen
[kicad-users] jave bug in kicad module creator it puts the symbol on the top or bottom copper
jave bug in kicad module creator it puts the symbol on the top or bottom copper that is not as useful as if it was on the top or bottom silk screen... This is a very cool way to add a logo but if your board is small and you don't want it on the top copper or filp it to the bottom copper and mess up your wiring. .. it needs to go to the silk screen layors any sugjestions? I emailed the author.
[kicad-users] Re: BUG! I route my open source Biopotential Mesurement Board using free route after
PCBNEW's DRC I believe but I know I seen the rats nest airwires. --- In kicad-users@yahoogroups.com, dickelbeck d...@... wrote: --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: BUG! I route my open source Biopotential Mesurement Board using free route after putting the Analog Ground plane on top and bottom of the board. So after I use free route the check says agnd is not connected... The route seems more efficent and faster and cleaner because a lot of things are connected to that. But is it kicad being not smart or did the agnd plane break it is warning me? I herd autoroute using free route everything first then add the agnd plane that is safer but it makes more sence to allow the planes to be theire first. The border of the planes should be in place before you export to freeroute. But when you come back to PCBNEW with the *.SES file, you should then re-fill all your planes (and I don't recall whether this happens automatically or not, so it is prudent to do it manually). When you say the check, can we assume you mean PCBNEW's DRC? Or is this the ratsnest display? Dick
[kicad-users] Re: BUG! I route my open source Biopotential Mesurement Board using free route after
the pour didn't fill in sections of the board and thowse were left unconnected. --- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote: PCBNEW's DRC I believe but I know I seen the rats nest airwires. --- In kicad-users@yahoogroups.com, dickelbeck dick@ wrote: --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: BUG! I route my open source Biopotential Mesurement Board using free route after putting the Analog Ground plane on top and bottom of the board. So after I use free route the check says agnd is not connected... The route seems more efficent and faster and cleaner because a lot of things are connected to that. But is it kicad being not smart or did the agnd plane break it is warning me? I herd autoroute using free route everything first then add the agnd plane that is safer but it makes more sence to allow the planes to be theire first. The border of the planes should be in place before you export to freeroute. But when you come back to PCBNEW with the *.SES file, you should then re-fill all your planes (and I don't recall whether this happens automatically or not, so it is prudent to do it manually). When you say the check, can we assume you mean PCBNEW's DRC? Or is this the ratsnest display? Dick
[kicad-users] Kicad has nice text file formats and netlists can its netlist go to verilog?
Kicad has nice text file formats and netlists can its netlist go to verilog? Can it's netlists go to geda's netlist? or the schematics be converted to draw the sch in kicad and make the verilog code from geda's netlister? http://www.geda.seul.org/wiki/geda:verilog_netlister_readme Yes someone who is fluent in verilog could proably do a jiant processor in it faster better and shorter than if done in schematic capture. But lets say if I want some simple parrellel additon subtraction and ing or ing and shifting maby schematic capture is easier with kicads herarchal sheets Well I would like to hear what people have to say.
[kicad-users] Re: Autoplace strategy
I am trying autoplace because I will be away for a day can't do it myself for a day so why not try it. --- In kicad-users@yahoogroups.com, cmcdowell_home cmcdowell_h...@... wrote: I was woundering if anyone has a good autoplace method? Also, is it possible to group subcircuit components together to aid in autoplace?
[kicad-users] Hi I apreseate the links um this is the c dode documented but that doen't help
Hi I apreseate the links um this is the c dode documented but that doen't help me use it I do not know how to link something like that together to test it. Then if I had a linking or some compiler error or a input error or other errror...
[kicad-users] Re: topological autorouter integration with KiCAD
any luck on that any results a instructable on how you did that would be great. --- In kicad-users@yahoogroups.com, dickelbeck d...@... wrote: Vesa Solonen wrote: Hi, I saw you on the user list thread discussing gEDA toporouter and here come the links: http://git.gpleda.org/?p=pcb.git;a=blob;f=src/toporouter.c;h=eac62ca42a0779aa478dfd463f1573147df718c0;hb=HEAD http://git.gpleda.org/?p=pcb.git;a=blob;f=src/toporouter.h;h=7392c69c73c00f5707582b6a1dd37877fac633e6;hb=HEAD Best regards, -Vesa Thanks, I should have known it was part of PCB program. I was looking for it as a separate directory in the repo. Dick
[kicad-users] Has anyone found a way to use GEDA's PCB topo autorouter then how my kicad
Has anyone found a way to use GEDA's PCB topo autorouter then how my kicad netlists or spectra import export files could be used or some files? I would even remake it in GEDA if nessisary but like kicad and don't want to... I hear it can be invoked by the command line I am comfortable with that. But see no documentation on it.
[kicad-users] autoplace using the netlist file .net and line and node graphing software
autoplace using the netlist file .net and line and node graphing software. I seen their was software that spaced things out based on their connection. Then it hit me latter that is a net list also. So if the modules were placed by drawing a box larger than thefurthest part of the component for eatch component and boundry detection. Then the net diagram could be used to detangle the netlist and give someone something to start with better than the current autoplace.
[kicad-users] when will the synaptic package manager kicad version be somewhat upto date?
when will the synaptic package manager kicad version be somewhat upto date? It seems that would be the easiest way to have it work. I am running ubuntu 10.04 64 bit. on my new laptop and hit e to modify the acpi=ht option so it does not fuss and crash because of the PCI or power management it is eather that or acpi=off I thought the hyperthread option at least gave me something. But the unzipped and permitions ok and executable kicad file does not apear to do anything.
[kicad-users] Re: pcbnew is amazing slow under windows 7 - workaround
Maby the developers need to compile for windows 7 maby the compiler is smart enough to know how to compile the graphics to work with its optimisations... --- In kicad-users@yahoogroups.com, o00batman00o o00batman...@... wrote: Thank you! It works for me too! I tried different compability modes but not this option. --- In kicad-users@yahoogroups.com, ben_noz91 calmar@ wrote: I had the same issue on my brand new laptop on Windows 7 64 bits. The interf_u.brd took many seconds to display or refresh. We can see the lines draw one by one. I tried different binary versions, with the same problem (KiCad-2010-03-14-SVN2456, KiCad-2009-02-16-final, kicad-20080825). Like you I tried on virtual machines: XP and Linux 64. And here, despite of virtualization overhead, the same test is responding instantly (so for me this is at least 50 times faster!)! After this I found a very simple turnaround solution: go with explorer to pcbnew.exe, click properties, and check unactivate desktop composition under the compatibility tab. With this the speed becomes from unusable to acceptable, but not as smart as under the linux or XP VM. So this acts as a conflict with the new display system of vista/win7. Hoping this little information might help you and other people that will face this problem. Greetings Ben. --- In kicad-users@yahoogroups.com, o00batman00o anthony.siegrist@ wrote: Hello Since I upgraded to windows 7, I can't use pcbnew beacause the screen refresh is amazing slow. I can see dot grid showing up from left to right. I notice the same behavior on all PC running Windows Vista or 7. My temporary solution is to run Kicad under Ubuntu via VirtualBox. By this way refreshing rate is in my opinion 10 times faster. Does someone noticed the same issue? Is there a solution ?
[kicad-users] Re: Adding graphics to Silkscreen
I used the awk script using ubuntu linux it made the module footprint in silkscreen and the person shown how to change the layor but since it creates it from lines the copper was not merged or too close so it caused board making bot errors if I made the design on the copper layor but I have the PCB with a cool silkscreen quite intricate logo. I am quite proud of it and makes it more fun to show off. --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@... wrote: Yes, someone wrote an AWK script to do this. I couldn't find it with the Yahoo search engine but Google tracked it down. I think the following post is the final version: http://www.mail-archive.com/kicad-users@yahoogroups.com/msg05028.html I've used it several times with success. The one thing that was a bit of a pain was editing out the effect of anti-aliasing pixels, but it's not an insurmountable problem. Regards, Robert. On 06/04/2010 11:39, burnsrobbie wrote: Hello fellow users. I'm on my 3rd Kicad design now, for me it works well. I have a question though, is it possible to add either vector or bitmap graphics to the silkscreen layer? For example CE marking or ROHS logo? I don't fancy creating these from circles and lines in the module editor. Many thanks Robbie Burns Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links No virus found in this incoming message. Checked by AVG - www.avg.com Version: 9.0.800 / Virus Database: 271.1.1/2794 - Release Date: 04/06/10 07:32:00 No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.800 / Virus Database: 271.1.1/2794 - Release Date: 04/06/10 07:32:00
[kicad-users] IBIS to KiCAD script by Opendous who has made some amazing OS kicad designs
IBIS to KiCAD script by Opendous who has made some amazing OS kicad designs. I use my IBIS to KiCAD script to create the pins and then tidy things up manually by spacing things and adding graphics. http://code.google.com/p/opendous/source/browse/trunk/Current_Designs/KiCAD_Tools/IBIStoKiCADComponent.py; http://code.google.com/p/opendous/source/browse/trunk/Current_Designs/KiCAD_Tools/IBIStoKiCADComponent.py Here is one of the latest emails I received showing the link to the schematics for the Biopotential mesurement system that were working on. It used the script above to make the schematic symbols for this design. Email me any coments or sugjestions or bugs found in the design. Joshua, I just finished a preliminary version of the ADS1298 schematic. plan on starting PCB layout within a couple of days in order to send out for a PCB by later this week. Hopefully I will have a PCB ready by the time the ADS1298 is in stock. http://code.google.com/p/opendous/source/browse/trunk/Current_Designs/ADS1298
[kicad-users] A task list or cookbook of tasks people ask about shown near this area would ...
A task list or cookbook of tasks people ask about shown near this area would make things easier for newbs veterans.
[kicad-users] I am trying to use footprint builder to make the the ads1298 foot print
I am trying to use footprint builder to make the the ads1298 foot print from the data sheet it says all units are in mm p72 of the data sheet. near the corners of the footprint output the pins cross I am not shure what I am doing wrong I am using the larger mm units on the data sheet so it is larger the coma as a period.
[kicad-users] curves router I was looking at the different autorouters on the kicads links
curves router I was looking at the different autorouters on the kicads links their was a wiki with a autorouter someone was routing that didn't route and reuse it found curves and streight lines and made squiggles to make groups of wires the same length. Is their anything new kicad might have for autorouting I used freeroute it works great for what I do. But I want to know more about autorouting tech.
[kicad-users] Re: same lenght trace
It would be realy interesting if the autorouter like free route had that option with a connector with the same number of pins or more than the number that need to be similar lenth. Tolerances would proably be important. --- In kicad-users@yahoogroups.com, toffe822 chnico...@... wrote: Hello, I am designing a board and need to have some traces with the same length (differential pair) How can I do this, is there a way to control it ? Is there a way to calculate the Manhattan distance ? Thank you
[kicad-users] kicad version control? google code svn or some code version control?
kicad version control? google code svn or some code version control? Has anyone used version control on their kicad projects? How about a graphical version control? How about a web based thing? Does anyone of them show you on kicad the differences? because their were diff files and backups I wonder if the author intended something like that with the zip button?
[kicad-users] Re: Completely depressing !
I alwase use the website and coppy all the pins into it to generate the schematic symbol that way the chip layout matches the phisical pins. I agree it is not abstract but abstract is not fully functional. name the schematic symbol by coppying from the names from the pins in the data sheet. You can find it by searching kicad library gen Next use the same names for the footprint. If you can use the java footprint tool... http://cyclerecorder.org/footprintbuilder/ I used that to make 64 pin chips with a little longer and wider pins that are surface mount also uniform and mach the schematic symbol their all in order etc. --- In kicad-users@yahoogroups.com, Bernd Wiebus bernd.wie...@... wrote: Hello Robert. Just to let you know I'm preparing some instructions for my own formal method which I will upload in the next few days. Very good. I'm trying to write them so they could be used by a beginner rather than just slapping a file on the server and leaving it for people Even better. to figure out for themselves, so it will take me a little while. Don't hurry, but tell us, when you are ready. So i will not miss your instructions. Using my own symbols and footprints will not be enough to test them, because, as an example, i never used a silkscreen on a board in real world, only on my PC screen or on paper. So i would never detect a collision between pads and the silkscreen. Further on, with my own Symbols, i never used the pin types/propertys, i only set them to passive or not specifyed. So it would be a great thing, having such a check list. With best regards: Bernd Wiebus alias dl1eic -- Jetzt kostenlos herunterladen: Internet Explorer 8 und Mozilla Firefox 3.5 - sicherer, schneller und einfacher! http://portal.gmx.net/de/go/atbrowser
[kicad-users] Re: How to force update of schematic file when changing part in library?
I use the save button with black and red then the other save button that looks like a disc. This will update the schematic symbol when I have both open the editor and schematic. The netlist and checks and reanotate stuff I do not know about I re do them again. I try to get done with the sch first then whenever I modify I reanotate and redo the netlist clear the footprint layout or allow it to delete and replace then move the new components in where they need to go.. let it show warnings and delete replace as nessisary. I also use freeroute autorouter heavly. --- In kicad-users@yahoogroups.com, STEVEN HOLDER s.holder...@... wrote: Doesn't an ERC check enforce this ? maybe wrong but thought it did. Â Regards --- On Wed, 10/2/10, keeneybrian briankee...@... wrote: From: keeneybrian briankee...@... Subject: [kicad-users] How to force update of schematic file when changing part in library? To: kicad-users@yahoogroups.com Date: Wednesday, 10 February, 2010, 20:36 Â When I make a change to a part in a library that's already been placed in the schematic, I can't seem to get the part properties to be updated in the schematic (and more importantly the netlist), even when I clear the cache. In browsing the .sch file with notepad, the problem seems to be that there is another copy of the part in the schematic file itself. Is there any way to force a new reading of the library? Otherwise, I need to delete every part and reinsert them in the schematic, which is problematic on a number of levels. Things that I'm sure of: 1. I've cleared the cache numerous times 2. I've made triply sure that my library is able to by found by the schematic program (it's in the project root, and I've rerouted the path in the config file) Any help would be much appreciated! Thanks, Brian Keeney
[kicad-users] a good practice for me and others in the future is when making connectors mark
a good practice for me and others in the future is when making connectors mark on the schematic symbol library the footprint connector module the names that way your not labeling everything on the board and schematic level where if something is moved it gets disconnected. I think I plugged 9v and gnd from a 9v battery into my ads1278 suface mount parts board outputs... I hope I didn't break anything :(
[kicad-users] windows 7 new laptop old 1.4ghz liux ubuntu laptop has faster refreshing
windows 7 new laptop old 1.4ghz liux ubuntu laptop has faster refreshing on the board file. I am not shure what the problem is maby different renderers etc.
[kicad-users] Re: what does pin shape low in mean? is that the same as active low?
Hi I will interprit the pdf to it saying the little triangle low in will be for active low pins and use a ~ so it should be clear enough. Yea I know how it is annoying when they want to have a standard but require silver or gold crossing a palm to get it like USB. Hopefuly when I make a PCI kicad board using a fpga it will not have USB. But I am set now and thanks for your help. --- In kicad-users@yahoogroups.com, Robert birmingham_spi...@... wrote: Thanks, that's certainly a useful document. However, I'm confused. It appears to be an IEEE (ie American) standard, but it does make reference to the IEC. The international standard, as far as I can tell, is IEC60617. I don't know if there is an ISO standard or if IEC60617 was produced in conjunction in some way with the ISO. Does this document in fact represent IEC60617? There has been quite a bit of discussion about libraries on the list recently. IMHO it would be better if kicad libraries as a minimum followed an international standard; I know I'm not the only person not to recognise library symbol CAPAPOL, and that's just a capacitor. Should that standard be IEC60617 or something else? I did try to find a copy of IEC60617, but the IEC want money for it. Regards, Robert. P.B.J. van Elswijk wrote: Maybe this attachment could be of some help? PvE - Original Message - From: Robert To: kicad-users@yahoogroups.com Sent: Wednesday, February 03, 2010 20:37 Subject: Re: [kicad-users] what does pin shape low in mean? is that the same as active low? I was just researching this today. Since no-one else has replied, I'll let you have the benefit of my inexpert opinion. I came to the conclusion from my research that it is used with IEEE standard symbols, but apparently it is interchangeable with the invert (round circle) symbol. However, adding a symbol to a standard that means the same as one that already exists in that standard seems illogical to me. I did try to find out what the IEC standard is, but they would only tell me if I crossed their palms with gold. I'm not sure what is the point of a standard that is only revealed to a select few. Regards, Robert. josh_eeg wrote: what does pin shape low in mean? is that the same as active low? Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links -- No virus found in this incoming message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2665 - Release Date: 02/03/10 08:09:00 -- -- No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2665 - Release Date: 02/03/10 08:09:00 No virus found in this incoming message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2665 - Release Date: 02/03/10 08:09:00 No virus found in this outgoing message. Checked by AVG - www.avg.com Version: 9.0.733 / Virus Database: 271.1.1/2665 - Release Date: 02/03/10 08:09:00
[kicad-users] what does pin shape low in mean? is that the same as active low?
what does pin shape low in mean? is that the same as active low?
[kicad-users] hi is low in for active low inputs? when I make a schematic symbol for a chip?
hi is low in for active low inputs? when I make a schematic symbol for a chip? I know the ~ puts the bar over it but that might work better as a radio button their is no info telling the user to do that.
[kicad-users] Re: ARM CORTEX M3 library
stm32f103 is a arm. so it is not a for storage. humm interesting. So their are tutorials to run FreeRTOS on it or linux? So then your programming using eclipse coocox is a debugger? What is this ? footprintbuilder but still search to run it under win xp;-) It is java it can run in anything with the interpriter ... if your having trouble running java ubuntu has a tutorial on making java work win xp it just needs the java runtime enviroment. If you were expressing your OS preference then that is fine but some things like showing the libraries your putting in your project folder to keep them with your project so when you zip them up and archive the zips with revision control like I am on my google site it puts a version number to everything and date it was uploaded. linux shows ./filename.lib instead of windowsxppathnamethatdoes notfit in the box here. --- In kicad-users@yahoogroups.com, Ban didie...@... wrote: Thank's a lot, I discover yesterday Kicad .. and today micropendous and so on .. :-) I test today stm32f103 72mhz 2wait state flash (from olimex), with FreeRtos (eclipse) also CooCox(very nice IDE!). I think to use the future nxp1768 120mhz 0 wait state flash (phy usb otg inside like stm32f107). I'll try also footprintbuilder but still search to run it under win xp;-) I load eagle and run script exp-kicad-lib.ulp on stm32.lbr, output file is stm32.mod. I need to learn kicad's files format! (mod,dcm, mdc) Didier --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: Good choice of chips I think. Did you look into micropendous? he has a kicad cortex m3 arm open source design... Also leaflabs has a eagle cad one. This would be the foot print builder that will save you some time... http://cyclerecorder.org/footprintbuilder/ I also like the kicad library generator to make the schematic symbol name the pins the same as they are numbered in the footprint for faster building... I hope this helps. --- In kicad-users@yahoogroups.com, didcadarm didierfr@ wrote: Hi, i am a new user in cad system and hope to do my first pcb ;-) I am looking for ARM CORTEX M3 library (STM32F103 LQFP64 NXP1768 LQFP100), or else how to convert the eagle library stm32.lbr for example? Thanks !
[kicad-users] I use the kicad library quick gen for SIL headers it would be great if it made
I use the kicad library quick gen for SIL headers it would be great if it made a SIL foot print if a box was checked so the connectors are numbered the same with connections labled for the silkscreen.
[kicad-users] the java pad designer software is good if the schematic block matches the layout
the java pad designer software is good if the schematic block matches the layout of the pins a footprint output option would be great for sips and dips. that way everything could be labled on the schematic and match with the board so it would have 2 checks make footprint and show silkscreen names. Also this would avoid transcription errors.
[kicad-users] How should I show active LOW pins on schematics and PCBs using text?
How should I show active LOW pins on schematics and PCBs using text?
[kicad-users] Re:My schematics I want to share but if it is not a print screen the ou
yes text, text. text: is turned to text text text ? well I did not replace the text with vectors so the bitmaps of the period were lost. Also the pen size being .01 is good to small and everything apears faint too large and it looks like finger paint. --- In kicad-users@yahoogroups.com, robert madworm_de.ya...@... wrote: --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: if I output to other things instead of to pdf the text looses periods would you sugjest checking the make letters vectors button or something? I would like to make them .gif files because they can be shown on a webpage in the browser. Do you mean e.g. text, text. text: is turned to text text text ? That would be strange. When exporting to pdf I always have the text replaced by vectors. Even if I export to PNG in Inkscape I can't reproduce that problem here. --- In kicad-users@yahoogroups.com, madworm_de.yahoo@ wrote: I usually do it like this: 1. Plot SVG: pen width mini 0.010, Color, Print Frame Ref 2. load with Inkscape 3. save as PDF This creates really good quality pdf files.
[kicad-users] my site with my kicad project I made public what does the group think ?
my site with my kicad project I made public what does the group think ? http://sites.google.com/site/openloopproject/ It used kicad for a dc coupled multiple channel EMG EEG device.
[kicad-users] Re:My schematics I want to share but if it is not a print screen the ou
if I output to other things instead of to pdf the text looses periods would you sugjest checking the make letters vectors button or something? I would like to make them .gif files because they can be shown on a webpage in the browser. --- In kicad-users@yahoogroups.com, madworm_de.ya...@... wrote: I usually do it like this: 1. Plot SVG: pen width mini 0.010, Color, Print Frame Ref 2. load with Inkscape 3. save as PDF This creates really good quality pdf files.
[kicad-users] My schematics I want to share but if it is not a print screen the output gets
My schematics I want to share but if it is not a print screen the output gets lost. I lowered the pen size to print to pdf. I tried plotting to svg. should I then use inkscape to turn it into a png or gif people without kicad can see on my webpage? I am using ubuntu linux should I get some kind of font or do a surtain thing to get a image similar to a screen shot of the schematics?
[kicad-users] How do I isolate a airea in Kicad or free route? so the routing avoids it?
How do I isolate a airea in Kicad or free route? so the routing avoids it? I am making a signal isolation board using opto couplers and a dc - dc converter.
[kicad-users] how do I use kicad and freeroute to keep aireas free of routing under chips?
how do I use kicad and freeroute to keep areas free of routing under chips? they are isolation chips.
[kicad-users] settings to get gcode to control a cnc mill to cut a PCB from Kicad
settings to get gcode to control a cnc mill to cut a PCB from Kicad. Hi can anyone tell me the full page of what to click and not to click to mill a PCB in kicad? Or at least to get the files? I am using EMC2 and a CNC Mill I made.
[kicad-users] so can kicad schematics be exported to qucs? for analog simulation?
so can kicad schematics be exported to qucs? for analog simulation?
[kicad-users] Kicad folder with project in it libraries with Rabit SVN in ubuntu.
Kicad folder with project in it libraries with Rabit SVN in ubuntu. I have shared my project with a group as a open source project it will be fully open source and made using open source. It is in prerelease because the boards have not been soldered and fully tested. Then documentation. Here is a practice I have liked for my N.C.P. Project that will be open source and uses a google site to version control the zipped folders. But I thought wouldn't it be great to version control the parts lists since kicad creates plain text parts list I save as a CSV file and add fileds like manufacturer part number foot print etc. Then I turn it into a open office calc file. The part librarys schematic and foot print moduals I save in the same directory as the project and zip all the files inside the folder to archive them in google site. So if all the non defalt moduals and schematic symbols are in the project .pro file directory and that is zipped it stays portable. The
[kicad-users] Re: KiCad and qucs - any news?
the other way around could also be neat. I think you would have to know about how the files are saved I know kicad has a open text format. Proably lots of fun bash scripting but if you do it in c people will proably give you more props and it will become more portable... --- In kicad-users@yahoogroups.com, osterchrisi osterchr...@... wrote: Hi! Is there any news concerning data exchange from Eeschema to qucs? I recently got into qucs and I really like it so I made up some schemos. Is there an easy way to migrate my qucs schematics to KiCad? Thanks!
[kicad-users] Re: Commas in Gerber files
I think this is what I did so their was not errors in GERBv I used something like smaller headers option when I plotted or made the drill files. This made it match up with spark funs batch pcb. Definilty gerbv all layers including drill. --- In kicad-users@yahoogroups.com, bobcousins34 bobcousin...@... wrote: Hi everyone, A colleague based in Portugal is having trouble with gerber files generated by pcbnew. He finds that there are commas in the gerber files, I believe this is incorrect. Has anyone else seen similar problems? Is there an option somewhere to control this? I note there are some bugs on the tracker related to localisation issues in pcbnew, perhaps it's part of the same problem. Regards
[kicad-users] I am interested in using kicad to make a Xilinx FPGA PCI board
I am interested in using kicad to make a Xilinx FPGA PCI board but I installed the Xilinx software to ubuntu and do not know the command or the whereis to start it. Sorry I should have paid more attention to the install. I thought some kicad user might have used this before.
[kicad-users] Re: What open source Linux with a GUI would be nice analog simulator do you sugjest?
I was trying to discuss a possible way to output a netlist into QUCS I wasn't shure what one I reply to to send it to the people who were discussing that sorry about posting a short message twice. --- In kicad-users@yahoogroups.com, Alain Mouette ala...@... wrote: List busines in in the list. Reposting... josh escreveu: In EESchema their is a export netlist option. One output option is SPICE , ORCAD PCB2, CAD STAR, and ADD PLUGIN. If the other options didn't export to QUCS then a plugin would be logical right? what is that format? what does that format do? --- In kicad-users@yahoogroups.com, Alain Mouette alainm@ wrote: al davis escreveu: On Thursday 29 October 2009, David wrote: The only problem with merging kicad and QUCS is that the latter is written in QT but the former uses Wxwidgets libraries. If Kicad could be ported to QT it would also be aligned with Ktechlab which is also written in QT. All three are written in C++, but the team doing the porting would have to have extensive knowledge of the required libraries. The real issue there is that there is a LOT of duplicated work. The strength of Qucs is in the part that is duplicated. IMHO, this would be the wrong way to go. Imagine if in order to use FreeRoute, all kicad would have had to be ported to Java :( NO. The simple and practical way is just to read and write files in GUCS format. Specially that such files are very well documented. Alain
[kicad-users] What open source Linux with a GUI would be nice analog simulator do you sugjest?
What open source Linux with a GUI would be nice analog simulator do you sugjest? I searched the forms and LT switcher cad 3 is not open source I agree it is easy and nice to work with. But I think their might be more. I have 2 kicad designs a instramentation amplifier board for a EEG a DRL right leg driver board. These are both for a experamental system not medical grade.
[kicad-users] Re: What open source Linux with a GUI would be nice analog simulator do you sugjest?
I think I ment what programs you mentioned I use ubuntu linux and wondered what to search for to find a spice in the package manager. A gui would be nice but I worked without them. --- In kicad-users@yahoogroups.com, Al Davis a...@... wrote: On Thursday 29 October 2009, josh_eeg wrote: What open source Linux with a GUI would be nice analog simulator do you sugjest? If you insist on a GUI, the only real choice is Qucs. Without a GUI, the most technically advanced is Gnucap. If you want something more traditional, there is NGspice. I searched the forms and LT switcher cad 3 is not open source I agree it is easy and nice to work with. But I think their might be more. Very much not open source. While I have the opportunity ... I need help with Gnucap. In particular, to make it work in an integrated way with Kicad. Any takers?
[kicad-users] Re: Schematic design entry in kicad to Icarus Verilog then to a Xillinx FPGA?
I think that I misunderstood sorry I think icarus does something else. --- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote: Schematic design entry in kicad to Icarus Verilog then to a Xillinx FPGA? I seen geda some commented about I.V. but nowone mentioned kicad. I think a fpga would be the most logical way to do a PCI port connected open IO board. That way open source tools would be used to create open source hardware. http://www.icarus.com/eda/verilog/ I am reading fpga4fun.com here is some geda info on I.V. this is the simpleist design I seen for PCI. http://elm-chan.org/works/pci/report_e.html check out the schematics.
[kicad-users] Schematic design entry in kicad to Icarus Verilog then to a Xillinx FPGA?
Schematic design entry in kicad to Icarus Verilog then to a Xillinx FPGA? I seen geda some commented about I.V. but nowone mentioned kicad. I think a fpga would be the most logical way to do a PCI port connected open IO board. That way open source tools would be used to create open source hardware. http://www.icarus.com/eda/verilog/ I am reading fpga4fun.com here is some geda info on I.V. this is the simpleist design I seen for PCI. http://elm-chan.org/works/pci/report_e.html check out the schematics.
[kicad-users] Re: freerouting.net autorouter + circular boards problem
Will the board house cut a circle? if your doing it yourself just make the squair big enough and do the circle on the silk. --- In kicad-users@yahoogroups.com, robert madworm_de.ya...@... wrote: I'm having problems with a circular board and the freerouting autorouter. The pcb outline was created with the circle tool. I just can't open the .dsn files. Replacing the circle with a polygon works, but I just can't get the outline right that way.
[kicad-users] has anyone sent their designs to a fab company? what settings? I want to use ...
has anyone sent their designs to a fab company? what settings? I want to use BatchPCB
[kicad-users] the solder mask seems to cover all the copper in batch pcb viewer
the solder mask seems to cover all the copper in batch pcb viewer what layers should I have inverted?I am using batch pcb as my board house.
[kicad-users] Re: If I use a ground plane and fill it after free route the DRC still sees the gnd
After trying it a fue times it is possible my save could have GND not selected. and something else by defalt. so when I go back it doen't work. Also it is like the flip the drill holes over the Y axis defalt. a potental defalt problem. --- In kicad-users@yahoogroups.com, nickoatley nickoat...@... wrote: did you connect the grounds together with a normal track before doing the flood fill? If not, that's the problem. Nick. --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: If I use a ground plane and fill it after free route the DRC still sees the gnd as airwires? Is that a error or was my route too big? Joshua W.
[kicad-users] Re: If I use a ground plane and fill it after free route the DRC still sees the gnd
I will try adding a gnd plane with gnd as the net then saving then getting the file for the router like yo said is their a way to trn off or shorten the optimization route? --- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote: After trying it a fue times it is possible my save could have GND not selected. and something else by defalt. so when I go back it doen't work. Also it is like the flip the drill holes over the Y axis defalt. a potental defalt problem. --- In kicad-users@yahoogroups.com, nickoatley nickoatley@ wrote: did you connect the grounds together with a normal track before doing the flood fill? If not, that's the problem. Nick. --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: If I use a ground plane and fill it after free route the DRC still sees the gnd as airwires? Is that a error or was my route too big? Joshua W.
[kicad-users] Re: If I use a ground plane and fill it after free route the DRC still sees the gnd
It still doen't work my gnd plane might be broken into islands so the gnd connection i broken? The routing is to the boards edge. If I add my gnd plane after a normal auto route it works. --- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote: I will try adding a gnd plane with gnd as the net then saving then getting the file for the router like yo said is their a way to trn off or shorten the optimization route? --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: After trying it a fue times it is possible my save could have GND not selected. and something else by defalt. so when I go back it doen't work. Also it is like the flip the drill holes over the Y axis defalt. a potental defalt problem. --- In kicad-users@yahoogroups.com, nickoatley nickoatley@ wrote: did you connect the grounds together with a normal track before doing the flood fill? If not, that's the problem. Nick. --- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote: If I use a ground plane and fill it after free route the DRC still sees the gnd as airwires? Is that a error or was my route too big? Joshua W.
[kicad-users] Re: Adding a Logo or Art to Silkscreen
so how do I change the layer in the code?
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_...@... wrote:
I'm not sure how that would end up looking but if you want to try it and see
how it looks, I'd like to know how it comes out. I believe the order of
layers is silkscreen, solder mask, copper, then board, for both sides. The
list of layers is in:
/usr/local/share/doc/kicad/help/file_formats/file_formats.pdf
Or where ever the KiCAD documentation files are stored on your system. I
picked layer 21, the component side silk screen layer; layer 20 is the copper
side. Remember that the silkscreen and solder mask tolerances are much
greater than the copper traces.
raoul
--- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote:
it worked great in ubuntu linux how would you do the same with different
layers? so if I had a pic and wanted it on the copper layer then to put
this silkscreen over it. that way I would have 3 tones. Or absence of
solder mask would give me 4.
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_esq@ wrote:
I'm sorry, I didn't mean to be cryptic. Below is the latest version of
my awk script. For non-Unix/Linux people, awk is a scripting language
written many, many years ago and named for the initials of the three guys
who initially developed it (Aho, Weinberger and Kernighan - names that
should be familiar to old CS types).
Awk is part of the base user installation for Unix Linux, of pretty
much all flavors. I can't speak for OS/X but I'd guess that if you have
a shell in a window, you've got awk. For the Windows crowd, I guess your
best option is to install Cygwin and make sure you get awk with it.
The addition of the first line is just an old Unix/Linux trick based on
the concept of a magic number which is a signature in the first few
bytes used to identify the contents of files. Note that this concept is
foreign to MS where the file name extension (after the '.') is supposed
to provide all the information about the file type. Since this is prone
to error, and really ineffective at documenting file contents, I prefer
the Unix/Linux magic number route. In this case, the magic number is
#! (shebang) which indicates that it is a script file, followed by
the program to be used to interpret the script file. By marking the file
as executable you can execute it from the command line. When you try to
run the script, the loader first checks the magic number to determine
what kind of executable it is (for example, it will fail to load a binary
program compiled for a different computer or operating system), it sees
the signature for the script and executes the specified interpreter
instead (in this case /usr/bin/awk), passing the script to it.
What does this long winded historical explanation mean? I was just
trying to save you from having to type:
awk -f reformat.awk logo.bmp logo.tmp
and reduce it to:
./reformat.awk logo.bmp logo.tmp
(For the observant, the ./ in front of the script is because we all
know that you never include . in your PATH environment variable - to
avoid this, place the script in a convenient directory where you keep
your other executables).
I'll attach my latest version below, which includes a few changes to deal
with extra whitespace allowed by the informal specification of PNG files.
I hope that this is able to help a few people. I've been plinking away
at a Perl script but my Perl is far more rusty than my awk. Sorry about
End Of Line (EOL) problems - it's not something that I worry about since
I left Windoze far, far behind me.
raoul
--- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote:
I am confused now... does that make things run with less user input or
make it output the logo correctly?
If it is a working script could it be uploaded here or somewhere for
others?
Do I run that line in the command prompt?
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_esq@
wrote:
For fun, make the first line of the awk script:
#!/usr/bin/awk -f
(obviously use the path to your awk). Change the (I call it
reformat.awk) script mode to executable and you can now:
./reformat.awk logo.pbm logo.mod
And you're half way there - just edit to move the DS lines before
$EndMODULE and you're done.
raoul
Cut Here -
#!/usr/bin/awk -f
# This script will take an ASCII (also called plain) PBM image file and
# convert it to a series of DS (Draw Segment) statements in PCBNEW
syntax.
# The X Y axis step size is defined in step which is in uints of 1/10
# mil (from the PCBNEW spec). The PCB layer
[kicad-users] to skip freeroute's post route turn off post rote in perameter on the top
to skip freeroute's post route turn off post rote in parameter auto route then uncheck post route.
[kicad-users] drill files other files prep. for batch pcb?
drill files other files prep. for batch pcb? Hi I do not see my .drl file in batch pcb upload tool I renamed it any setting configurations you suggest? Do not flip the drill over the Y axis...
[kicad-users] gerbv fixes kicad drill file to standard layers so batch pcb might run it..
gerbv fixes kicad drill file to standard layers so batch pcb might run it.. gerbv and sparkfuns batch pcb do not like parts of the drill file... load the layers and drill... File export
[kicad-users] If I use a ground plane and fill it after free route the DRC still sees the gnd
If I use a ground plane and fill it after free route the DRC still sees the gnd as airwires? Is that a error or was my route too big? Joshua W.
[kicad-users] Noice when you make the drill files their is a flip it over the Y axis option un
Noice when you make the drill files their is a flip it over the Y axis option un check that then check it in that program. This might be a bug. it wold seem to me the box should not be checked by defalt.
[kicad-users] Re: Adding a Logo or Art to Silkscreen
I am confused now... does that make things run with less user input or make it
output the logo correctly?
If it is a working script could it be uploaded here or somewhere for others?
Do I run that line in the command prompt?
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_...@... wrote:
For fun, make the first line of the awk script:
#!/usr/bin/awk -f
(obviously use the path to your awk). Change the (I call it reformat.awk)
script mode to executable and you can now:
./reformat.awk logo.pbm logo.mod
And you're half way there - just edit to move the DS lines before $EndMODULE
and you're done.
raoul
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_esq@ wrote:
OK, I suck. My first code did not properly handle the case of a line that
starts with the fg color, much less an entire line of fg color. Let's try
this again (sorry that Yahoo eats my indentation):
Cut Here
# This script will take an ASCII PBM BW file and convert it to a series
# of DS (Draw Segment) statements in PCBNEW syntax. The deltaX and deltaY
# is defined in step which is in uints of 1/10 mil. The layer is
currently
# set to 21, the component layer silkscreen. Swap bg fg based on whether
# black or white is the foreground.
#
# State 0 : look for magic number - must be P1 (can be P4 for raw file)
# State 1 : look for height width
# State 2 : process data
# State 3 : done with data - skip the rest
#
BEGIN { state = 0; step = 40; layer = 21; fg = 1; bg = 0; }
{if (NR == 1) {
state = 1;
if ($1 != P1) {
printf(Must supply an ASCII PBM image file\n);
exit 1
}
next;
}
}
/^#/{ next } # Comment line, skip it
{if (state == 1) {
width = $1;
height = $2;
buff = ;
state = 2;
Y = - ((step * height) / 2);
initX = - ((step * width) / 2);
next;
}
}
{if (state == 2) {
buff = buff $1;
if (length( buff ) = width) {
scanline = substr( buff, 1, width );
buff = substr( buff, width + 1 );
Y += step;
X = initX;
while ( Z1 = index( scanline, fg )) {
scanline = substr( scanline, Z1 );
Z2 = index( scanline, bg );
if (Z2 == 0)
Z2 = length( scanline ) + 1;
scanline = substr( scanline, Z2 );
Z1 = step * Z1 + X;
Z2 = step * Z2 + Z1 - 2 * step;
X = Z2;
printf( DS %d %d %d %d %d %d\n, Z1, Y, Z2, Y, step, layer
);
}
height--;
if (height == 0)
state = 3;
}
}
}
{if (state == 3) { nextfile; }}
Cut Here
[kicad-users] I have 3 single inline headers on my board I would like them to go into a bread
I have 3 single inline headers on my board I would like them to go into a bread board. Grids proably would latch to the corner of the part not the holes but that is what will effect if it fits into the bread board. Has anyone else found out how to do this?
[kicad-users] Re: I have 3 single inline headers on my board I would like them to go into a bread
I think space bar zeroing the distance counter in the bottom right corner might be the easiest way for me to mesure things out in this software. Tell me if their is any other ideas. The curious inventor pcb in kicad tutorial shown me this. --- In kicad-users@yahoogroups.com, josh_eeg josh...@... wrote: I have 3 single inline headers on my board I would like them to go into a bread board. Grids proably would latch to the corner of the part not the holes but that is what will effect if it fits into the bread board. Has anyone else found out how to do this?
[kicad-users] how do I see the drill files in the viewer on kicad can I or no?
how do I see the drill files in the viewer on kicad can I or no?
[kicad-users] Re: Adding a Logo or Art to Silkscreen
it worked great in ubuntu linux how would you do the same with different
layers? so if I had a pic and wanted it on the copper layer then to put this
silkscreen over it. that way I would have 3 tones. Or absence of solder mask
would give me 4.
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_...@... wrote:
I'm sorry, I didn't mean to be cryptic. Below is the latest version of my
awk script. For non-Unix/Linux people, awk is a scripting language written
many, many years ago and named for the initials of the three guys who
initially developed it (Aho, Weinberger and Kernighan - names that should be
familiar to old CS types).
Awk is part of the base user installation for Unix Linux, of pretty much
all flavors. I can't speak for OS/X but I'd guess that if you have a shell
in a window, you've got awk. For the Windows crowd, I guess your best option
is to install Cygwin and make sure you get awk with it.
The addition of the first line is just an old Unix/Linux trick based on the
concept of a magic number which is a signature in the first few bytes used
to identify the contents of files. Note that this concept is foreign to MS
where the file name extension (after the '.') is supposed to provide all the
information about the file type. Since this is prone to error, and really
ineffective at documenting file contents, I prefer the Unix/Linux magic
number route. In this case, the magic number is #! (shebang) which
indicates that it is a script file, followed by the program to be used to
interpret the script file. By marking the file as executable you can execute
it from the command line. When you try to run the script, the loader first
checks the magic number to determine what kind of executable it is (for
example, it will fail to load a binary program compiled for a different
computer or operating system), it sees the signature for the script and
executes the specified interpreter instead (in this case /usr/bin/awk),
passing the script to it.
What does this long winded historical explanation mean? I was just trying to
save you from having to type:
awk -f reformat.awk logo.bmp logo.tmp
and reduce it to:
./reformat.awk logo.bmp logo.tmp
(For the observant, the ./ in front of the script is because we all know
that you never include . in your PATH environment variable - to avoid this,
place the script in a convenient directory where you keep your other
executables).
I'll attach my latest version below, which includes a few changes to deal
with extra whitespace allowed by the informal specification of PNG files. I
hope that this is able to help a few people. I've been plinking away at a
Perl script but my Perl is far more rusty than my awk. Sorry about End Of
Line (EOL) problems - it's not something that I worry about since I left
Windoze far, far behind me.
raoul
--- In kicad-users@yahoogroups.com, josh_eeg josheeg@ wrote:
I am confused now... does that make things run with less user input or make
it output the logo correctly?
If it is a working script could it be uploaded here or somewhere for others?
Do I run that line in the command prompt?
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_esq@ wrote:
For fun, make the first line of the awk script:
#!/usr/bin/awk -f
(obviously use the path to your awk). Change the (I call it
reformat.awk) script mode to executable and you can now:
./reformat.awk logo.pbm logo.mod
And you're half way there - just edit to move the DS lines before
$EndMODULE and you're done.
raoul
Cut Here -
#!/usr/bin/awk -f
# This script will take an ASCII (also called plain) PBM image file and
# convert it to a series of DS (Draw Segment) statements in PCBNEW syntax.
# The X Y axis step size is defined in step which is in uints of 1/10
# mil (from the PCBNEW spec). The PCB layer for the DS segments is currently
# set to 21, the component layer silkscreen but you can change that. You
# can also swap bg fg based on whether black or white is the foreground.
#
# State 0 : look for magic number - must be P1 (can be P4 for raw file)
# State 1 : look for height width
# State 2 : process data
# State 3 : done with data - skip the rest
#
BEGIN { state = 0; step = 40; layer = 21; fg = 1; bg = 0; }
{if (NR == 1) {
state = 1;
if ($1 != P1) {
printf(Must supply an ASCII PBM image file\n);
exit 1
}
next;
}
}
/^#/{ next } # Comment line, skip it
{if (state == 1) {
if (NF 2) next; # Skip empty lines too
width = $1;
height = $2;
if ((width 1) || (height 1)) {
printf(Invalid width or height\n);
exit 1
}
buff = ;
state = 2;
Y = - ((step * height) / 2
[kicad-users] Re: Adding a Logo or Art to Silkscreen
Ok I generated a ASCII PBM File logo.pbm
I created the plain text file convert.awk
installed gawk
then ran it to create the output file the selects the output.
awk -f convert.awk logo.pbm art.out
I created logo.mod in kicad
I Edited Logo.mod by adding the text in art.out before $EndMODULE
But when I loaded a small pic of a smilie in it only shown the upper half of
it. maby some other part.
25 pix by 25 pix.
Thanks so far it looks realy cool and thanks for writing the program.
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_...@... wrote:
Pardon me if I am just being obtuse, but I could find no easy way to add an
image or artwork to a layout. I've tried pstoedit but that utility (in
addition to being broken if you are in a directory path that has a space in
it) only works for text.
Because I am under the gun, I had to gin up something to get a project out
the door. So I came up with a quick and dirty solution.
Step 1: Generate an ASCII PBM file - I use GIMP. A monochrome (black and
white) image will be represented by a file full of 0 and 1. Call it
something like art.pbm.
Step 2: Run the ASCII PBM file art.pbm through the following awk script and
put the output into a file, call it art.out.
Step 3: Create a module library with a single component, call it something
like Logo. The library will be called Logo.mod.
Step 4: Edit the module library Logo.mod, look for the $EndMODULE line, and
copy the contents of art.out immediately before it. Save the file.
Step 5: Edit the module library and move things around, add the module name,
etc.
Step 6: In PCBnew, add the module from the library and place it where you
want.
I hope this makes sense and helps someone other than me. And I hope that I
have not reinvented the wheel. I'm sorry that I use awk as a script language
of choice, I suppose I could clean it up as a Perl script if there is any
interest.
raoul
--Cut Here--
# This script will take an ASCII PBM BW file and convert it to a series
# of DS (Draw Segment) statements in PCBNEW syntax. The deltaX and deltaY
# is defined in step which is in uints of 1/10 mil. The layer is currently
# set to 21, the component layer silkscreen. Swap bg fg based on whether
# black or white is the foreground.
#
# State 0 : look for magic number - must be P1 (can be P4 for raw file)
# State 1 : look for height width
# State 2 : process data
# State 3 : done with data - skip the rest
#
BEGIN { state = 0; step = 40; layer = 21; fg = 1; bg = 0; }
{if (NR == 1) {
state = 1;
if ($1 != P1) {
printf(Must supply an ASCII PBM image file\n);
exit 1
}
next;
}
}
/^#/{ next } # Comment line, skip it
{if (state == 1) {
width = $1;
height = $2;
buff = ;
state = 2;
Y = - ((step * height) / 2);
initX = - ((step * width) / 2);
next;
}
}
{if (state == 2) {
buff = buff $1;
if (length( buff ) = width) {
scanline = substr( buff, 1, width );
buff = substr( buff, width + 1 );
Y += step;
X = initX;
while ( Z1 = index( scanline, fg )) {
scanline = substr( scanline, Z1 );
Z2 = index( scanline, bg );
scanline = substr( scanline, Z2 );
Z1 = step * Z1 + X;
Z2 = step * Z2 + Z1 - 2 * step;
X = Z2;
printf( DS %d %d %d %d %d %d\n, Z1, Y, Z2, Y, step, layer );
}
height--;
if (height == 0)
state = 3;
}
}
}
{if (state == 3) { nextfile; }}
--Cut Here--
[kicad-users] Re: Adding a Logo or Art to Silkscreen
the script didn't stop on a 70 x 70 pixel file. I left it running hopeing it
would stop the file was over a gig...
my previous post shown
awk -f prog.awk pic.pbm art.out
--- In kicad-users@yahoogroups.com, raoulduke_esq raoulduke_...@... wrote:
Pardon me if I am just being obtuse, but I could find no easy way to add an
image or artwork to a layout. I've tried pstoedit but that utility (in
addition to being broken if you are in a directory path that has a space in
it) only works for text.
Because I am under the gun, I had to gin up something to get a project out
the door. So I came up with a quick and dirty solution.
Step 1: Generate an ASCII PBM file - I use GIMP. A monochrome (black and
white) image will be represented by a file full of 0 and 1. Call it
something like art.pbm.
Step 2: Run the ASCII PBM file art.pbm through the following awk script and
put the output into a file, call it art.out.
Step 3: Create a module library with a single component, call it something
like Logo. The library will be called Logo.mod.
Step 4: Edit the module library Logo.mod, look for the $EndMODULE line, and
copy the contents of art.out immediately before it. Save the file.
Step 5: Edit the module library and move things around, add the module name,
etc.
Step 6: In PCBnew, add the module from the library and place it where you
want.
I hope this makes sense and helps someone other than me. And I hope that I
have not reinvented the wheel. I'm sorry that I use awk as a script language
of choice, I suppose I could clean it up as a Perl script if there is any
interest.
raoul
--Cut Here--
# This script will take an ASCII PBM BW file and convert it to a series
# of DS (Draw Segment) statements in PCBNEW syntax. The deltaX and deltaY
# is defined in step which is in uints of 1/10 mil. The layer is currently
# set to 21, the component layer silkscreen. Swap bg fg based on whether
# black or white is the foreground.
#
# State 0 : look for magic number - must be P1 (can be P4 for raw file)
# State 1 : look for height width
# State 2 : process data
# State 3 : done with data - skip the rest
#
BEGIN { state = 0; step = 40; layer = 21; fg = 1; bg = 0; }
{if (NR == 1) {
state = 1;
if ($1 != P1) {
printf(Must supply an ASCII PBM image file\n);
exit 1
}
next;
}
}
/^#/{ next } # Comment line, skip it
{if (state == 1) {
width = $1;
height = $2;
buff = ;
state = 2;
Y = - ((step * height) / 2);
initX = - ((step * width) / 2);
next;
}
}
{if (state == 2) {
buff = buff $1;
if (length( buff ) = width) {
scanline = substr( buff, 1, width );
buff = substr( buff, width + 1 );
Y += step;
X = initX;
while ( Z1 = index( scanline, fg )) {
scanline = substr( scanline, Z1 );
Z2 = index( scanline, bg );
scanline = substr( scanline, Z2 );
Z1 = step * Z1 + X;
Z2 = step * Z2 + Z1 - 2 * step;
X = Z2;
printf( DS %d %d %d %d %d %d\n, Z1, Y, Z2, Y, step, layer );
}
height--;
if (height == 0)
state = 3;
}
}
}
{if (state == 3) { nextfile; }}
--Cut Here--
[kicad-users] 24bit_8chan_simul_adc_sch.pdf is my schematic tell me if you see any bugs in it.
24bit_8chan_simul_adc_sch.pdf is my schematic tell me if you see any bugs in it. This is my first kicad file that will be made hopefuly without any problems. It uses surface mount parts and would be hard to debug if something is wrong in the schematic. So please have a look and comment.
[kicad-users] Re: Screen not refreshing when zooming or moving mouse cursor in pcbnew?
Are you saying it alwase refreshes all the time I would load kubuntu instead of ubuntu 9.. or just you hit f3 or refresh to refresh it works? --- In kicad-users@yahoogroups.com, Pedro Martin pki...@... wrote: Hi, I use Kubuntu 8.04 and Kicad works fine, no problem with refreshing. Pedro. I use KiCad with OpenSuSE 11.1, and I am having problems with the screen refresh in pcbnew, or rather lack thereof. It doesn't look like the screen is refreshing correctly. When I zoom or just move the mouse around, the crosshair leaves alot of graphical artifacts/copies of itself. I will have to use F3/refresh almost constantly to see what I am doing. Is this a common problem under Linux? Anything I can tweak?
[kicad-users] Re: modual or foot print file info I want to make pads longer and move them
This is proably exactly what I would want to do is it documented anywhere so I can see how it is done where are the buttons or short cut keys to do it? It would be easier to fallow. --- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote: A lot of what you want to do is built into Kicad with the pad editing system. If you select a pad change the size and shape to what you want. If you then reedit and select global Pad settings you can then change all the pads in a module with the Change Module button, or you can change all the pads of all the modules with the same ID type by using the Change ID Modules button. Andy On Tue, 29 Sep 2009 20:12:56 - josh_eeg josh...@... wrote: modual or foot print file info I want to make pads longer and move them. The file does not contain in plain text the mm or in. Is their a conversion that happens? to the pads. I thought this would be useful for people hand soldering surface mount parts because they would have more room to work with... It could be a bash script or c program. or even web app... Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] Re: I set my grounds on chip pins to inputs to satisfy a DRC check is their a better
Thanks I think I got it grounds are power_in labeled. So they would also need a power flag. --- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote: You are not the only one confused :-) You said: I set my grounds on chip pins to inputs to satisfy a DRC check So I assumed that you do have some ground pins. Take a look at the 7400 in the lib editor as an example to follow. Look at pin 7 which is grey as it is set to NO Draw. Select the pin and right click then bring up the properties. The pin name is GND, this is the SAME name as one of the power ports, in this case GND. It is of type Power In. A GND power net will now automatically connect to this pin. The GNBD net will need to be energised so thats when you add the power flag to the net. Is that what you needed ? Andy On Thu, 17 Sep 2009 12:34:59 - josh_eeg josh...@... wrote: leave the grounds as ground??? Their is no groud option for pins??? I am now confused. --- In kicad-users@yahoogroups.com, Andy Eskelson andyyahoo@ wrote: leave the grounds as grounds and ensure that you have a power flag on the ground net. Andy On Wed, 16 Sep 2009 19:43:13 - josh_eeg josheeg@ wrote: I set my grounds on chip pins to inputs to satisfy a DRC check is their a better thing to set them as? A discription of where to use the different settings was not clear to me. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] Re: I set my grounds on chip pins to inputs to satisfy a DRC check is their a better
leave the grounds as ground??? Their is no groud option for pins??? I am now confused. --- In kicad-users@yahoogroups.com, Andy Eskelson andyya...@... wrote: leave the grounds as grounds and ensure that you have a power flag on the ground net. Andy On Wed, 16 Sep 2009 19:43:13 - josh_eeg josh...@... wrote: I set my grounds on chip pins to inputs to satisfy a DRC check is their a better thing to set them as? A discription of where to use the different settings was not clear to me. Please read the Kicad FAQ in the group files section before posting your question. Please post your bug reports here. They will be picked up by the creator of Kicad. Please visit http://www.kicadlib.org for details of how to contribute your symbols/modules to the kicad library. For building Kicad from source and other development questions visit the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups Links
[kicad-users] I set my grounds on chip pins to inputs to satisfy a DRC check is their a better
I set my grounds on chip pins to inputs to satisfy a DRC check is their a better thing to set them as? A discription of where to use the different settings was not clear to me.
[kicad-users] A rule check issue that is confusing me. I have GND comming from a header
A rule check issue that is confusing me. I have GND comming from a header. Their is the same GND in other places on the circuit. But I get a error like it should be driven. But that sounds like a short... ERC: Warning Pin Power_In not driven. I have GND hooked to a header... Now that same ground simbol is in the rest of my circuit. Please help.
[kicad-users] Re: I was wrong zip didn't effect the results here is the error
my files were in a sub folder oops. now it works a drc clearance problem I can probly get that. --- In kicad-users@yahoogroups.com, josh_eeg [EMAIL PROTECTED] wrote: the error was: Less than 2 files found! Something is missing, please check your upload package. I am using kicad... All of the gerber files look ok in a viewer I zipped them in windows and ubunu before nether worked.
[kicad-users] I was wrong zip didn't effect the results here is the error
the error was: Less than 2 files found! Something is missing, please check your upload package. I am using kicad... All of the gerber files look ok in a viewer I zipped them in windows and ubunu before nether worked.
[kicad-users] I am routing a kicad arduino board and want to have it be a example
I am routing a kicad arduino board and want to have it be a example. Does anyone else want to try the placement and freeroute to get this board small but buildable? I am using the hotplate soldering method for the smd chips shown on sparkfun.
[kicad-users] I am trying to upload my gerber files to batch pcb using ubuntu linux problems
I am trying to upload my gerber files to batch pcb using ubuntu linux problems... I wonder if it is the zip... I did have to switch to windows to get the eagle files to work right before but I don't remember the details...
[kicad-users] sparkfun has eagle libraries for the public I want to use them by using eagle2ki
sparkfun has eagle libraries for the public I want to use them by using eagle2kicad.ulp it is a script on the user language programs script airea of their website I got the newest and I get a single pad and one scematic symbol element when I try to convert a switch. Please tell me about your exp. with this.
[kicad-users] I tried to create a component MYCONN3 like in the kicad tutorial and the draw bo
I tried to create a component MYCONN3 like in the kicad tutorial and the draw box tool selects the pins and names and apears to be trying to move them. I think it might be a bug but im new. I am using the latest stable window$ version here but will be using the latest stable linux one at home.
