Re: [PATCH v3 2/5] ARM: topology: factorize the update of sibling masks

[Namhyung Kim]

On Wed, 20 Jun 2012 17:19:19 +0200, Vincent Guittot wrote:
> This factorization has also been proposed in another patchset that has not 
> been
> merged yet:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/080873.html
> So, this patch could be dropped depending of the state of the other one.
>
> Signed-off-by: Lorenzo Pieralisi 
> Signed-off-by: Vincent Guittot 

Reviewed-by: Namhyung Kim 


> ---
>  arch/arm/kernel/topology.c |   48 
> +---
>  1 file changed, 27 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
> index 51f23b3..eb5fc81 100644
> --- a/arch/arm/kernel/topology.c
> +++ b/arch/arm/kernel/topology.c
> @@ -82,6 +82,32 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
>   return &cpu_topology[cpu].core_sibling;
>  }
>  
> +void update_siblings_masks(unsigned int cpuid)
> +{
> + struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
> + int cpu;
> +
> + /* update core and thread sibling masks */
> + for_each_possible_cpu(cpu) {
> + cpu_topo = &cpu_topology[cpu];
> +
> + if (cpuid_topo->socket_id != cpu_topo->socket_id)
> + continue;
> +
> + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
> + if (cpu != cpuid)
> + cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
> +
> + if (cpuid_topo->core_id != cpu_topo->core_id)
> + continue;
> +
> + cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
> + if (cpu != cpuid)
> + cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
> + }
> + smp_wmb();
> +}
> +
>  /*
>   * store_cpu_topology is called at boot when only one cpu is running
>   * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
> @@ -91,7 +117,6 @@ void store_cpu_topology(unsigned int cpuid)
>  {
>   struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
>   unsigned int mpidr;
> - unsigned int cpu;
>  
>   /* If the cpu topology has been already set, just return */
>   if (cpuid_topo->core_id != -1)
> @@ -133,26 +158,7 @@ void store_cpu_topology(unsigned int cpuid)
>   cpuid_topo->socket_id = -1;
>   }
>  
> - /* update core and thread sibling masks */
> - for_each_possible_cpu(cpu) {
> - struct cputopo_arm *cpu_topo = &cpu_topology[cpu];
> -
> - if (cpuid_topo->socket_id == cpu_topo->socket_id) {
> - cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
> - if (cpu != cpuid)
> - cpumask_set_cpu(cpu,
> - &cpuid_topo->core_sibling);
> -
> - if (cpuid_topo->core_id == cpu_topo->core_id) {
> - cpumask_set_cpu(cpuid,
> - &cpu_topo->thread_sibling);
> - if (cpu != cpuid)
> - cpumask_set_cpu(cpu,
> - &cpuid_topo->thread_sibling);
> - }
> - }
> - }
> - smp_wmb();
> + update_siblings_masks(cpuid);
>  
>   printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
>   cpuid, cpu_topology[cpuid].thread_id,

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Re: Mumble server having issues?

[Alexander Sack]

On Wed, Jun 20, 2012 at 10:28 PM, Christian Robottom Reis
 wrote:
> On Wed, Jun 20, 2012 at 12:40:29PM -0700, John Stultz wrote:
>> So I've been having trouble with the mumble server and the behavior
>> is odd enough that I don't think its a problem just on my end.
>>
>> I'm seeing cases where:
>> * Only one of two members in a room can hear me talk
>> * One member could hear both parties talking
>> * I can't hear either of them talk
>>
>> As well as other cases where neither parties can hear each other.
>>
>> In all the cases, my talk-indicator (the red lips) has been lighting
>> up properly, but the other sides isn't (so its not just an audio
>> playback issue on my side, my mumble client isn't getting any input
>> from other members).
>>
>> I know Joey's out, but does anyone else have the ability to check in
>> and debug the mumble server?
>
> I'll forward this on to the IS team to take a look into it. Has anyone
> else run into similar issues with Mumble?

We experienced very odd issues (think similar to that) a few month
back. I ended up asking IS to restart the server as noone was able to
figure out what was going on and it helped :). Maybe worth a try.


-- 
Alexander Sack
Technical Director, Linaro Platform Teams
http://www.linaro.org | Open source software for ARM SoCs
http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

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Re: Mumble server having issues?

[Christian Robottom Reis]

On Wed, Jun 20, 2012 at 12:40:29PM -0700, John Stultz wrote:
> So I've been having trouble with the mumble server and the behavior
> is odd enough that I don't think its a problem just on my end.
> 
> I'm seeing cases where:
> * Only one of two members in a room can hear me talk
> * One member could hear both parties talking
> * I can't hear either of them talk
> 
> As well as other cases where neither parties can hear each other.
> 
> In all the cases, my talk-indicator (the red lips) has been lighting
> up properly, but the other sides isn't (so its not just an audio
> playback issue on my side, my mumble client isn't getting any input
> from other members).
> 
> I know Joey's out, but does anyone else have the ability to check in
> and debug the mumble server?

I'll forward this on to the IS team to take a look into it. Has anyone
else run into similar issues with Mumble?
-- 
Christian Robottom Reis, Engineering VP
Brazil (GMT-3) | [+55] 16 9112 6430 | [+1] 612 216 4935
Linaro.org: Open Source Software for ARM SoCs

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Mumble server having issues?

[John Stultz]

So I've been having trouble with the mumble server and the behavior is 
odd enough that I don't think its a problem just on my end.


I'm seeing cases where:
* Only one of two members in a room can hear me talk
* One member could hear both parties talking
* I can't hear either of them talk

As well as other cases where neither parties can hear each other.

In all the cases, my talk-indicator (the red lips) has been lighting up 
properly, but the other sides isn't (so its not just an audio playback 
issue on my side, my mumble client isn't getting any input from other 
members).


I know Joey's out, but does anyone else have the ability to check in and 
debug the mumble server?


thanks
-john



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[PATCH v3 0/5] ARM: topology: set the capacity of each cores for big.LITTLE

[Vincent Guittot]

This patchset creates an arch_scale_freq_power function for ARM, which is used 
to set the relative capacity of each core of a big.LITTLE system. It also 
removes
the broken power estimation of x86.

Modification since v2:
 - set_power_scale function becomes static
 - Rework loop in update_siblings_masks
 - Remove useless code in parse_dt_topology

Modification since v1:
 - Add and update explanation about the use of the table and the range of the 
value 
 - Remove the use of NR_CPUS and use nr_cpu_ids instead
 - Remove broken power estimation of x86

Peter Zijlstra (1):
  sched, x86: Remove broken power estimation

Vincent Guittot (4):
  ARM: topology: Add arch_scale_freq_power function
  ARM: topology: factorize the update of sibling masks
  ARM: topology: Update cpu_power according to DT information
  sched: cpu_power: enable ARCH_POWER

 arch/arm/kernel/topology.c   |  209 +-
 arch/x86/kernel/cpu/Makefile |2 +-
 arch/x86/kernel/cpu/sched.c  |   55 ---
 kernel/sched/features.h  |2 +-
 4 files changed, 189 insertions(+), 79 deletions(-)
 delete mode 100644 arch/x86/kernel/cpu/sched.c

-- 
1.7.9.5


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[PATCH v3 5/5] sched: cpu_power: enable ARCH_POWER

[Vincent Guittot]

Heteregeneous ARM platform uses arch_scale_freq_power function
to reflect the relative capacity of each core

Signed-off-by: Vincent Guittot 
---
 kernel/sched/features.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/sched/features.h b/kernel/sched/features.h
index de00a48..d98ae90 100644
--- a/kernel/sched/features.h
+++ b/kernel/sched/features.h
@@ -42,7 +42,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, true)
 /*
  * Use arch dependent cpu power functions
  */
-SCHED_FEAT(ARCH_POWER, false)
+SCHED_FEAT(ARCH_POWER, true)
 
 SCHED_FEAT(HRTICK, false)
 SCHED_FEAT(DOUBLE_TICK, false)
-- 
1.7.9.5


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[PATCH v3 4/5] sched, x86: Remove broken power estimation

[Vincent Guittot]

From: Peter Zijlstra 

The x86 sched power implementation has been broken forever and gets in
the way of other stuff, remove it.

For archaeological interest, fixing this code would require dealing with
the cross-cpu calling of these functions and more importantly, we need
to filter idle time out of the a/m-perf stuff because the ratio will go
down to 0 when idle, giving a 0 capacity which is not what we'd want.

Signed-off-by: Peter Zijlstra 
Link: http://lkml.kernel.org/n/tip-wjjwelpti8f8k7i1pdnzm...@git.kernel.org
---
 arch/x86/kernel/cpu/Makefile |2 +-
 arch/x86/kernel/cpu/sched.c  |   55 --
 2 files changed, 1 insertion(+), 56 deletions(-)
 delete mode 100644 arch/x86/kernel/cpu/sched.c

diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 6ab6aa2..c598126 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -14,7 +14,7 @@ CFLAGS_common.o   := $(nostackp)
 
 obj-y  := intel_cacheinfo.o scattered.o topology.o
 obj-y  += proc.o capflags.o powerflags.o common.o
-obj-y  += vmware.o hypervisor.o sched.o mshyperv.o
+obj-y  += vmware.o hypervisor.o mshyperv.o
 obj-y  += rdrand.o
 obj-y  += match.o
 
diff --git a/arch/x86/kernel/cpu/sched.c b/arch/x86/kernel/cpu/sched.c
deleted file mode 100644
index a640ae5..000
--- a/arch/x86/kernel/cpu/sched.c
+++ /dev/null
@@ -1,55 +0,0 @@
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-
-#ifdef CONFIG_SMP
-
-static DEFINE_PER_CPU(struct aperfmperf, old_perf_sched);
-
-static unsigned long scale_aperfmperf(void)
-{
-   struct aperfmperf val, *old = &__get_cpu_var(old_perf_sched);
-   unsigned long ratio, flags;
-
-   local_irq_save(flags);
-   get_aperfmperf(&val);
-   local_irq_restore(flags);
-
-   ratio = calc_aperfmperf_ratio(old, &val);
-   *old = val;
-
-   return ratio;
-}
-
-unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
-{
-   /*
-* do aperf/mperf on the cpu level because it includes things
-* like turbo mode, which are relevant to full cores.
-*/
-   if (boot_cpu_has(X86_FEATURE_APERFMPERF))
-   return scale_aperfmperf();
-
-   /*
-* maybe have something cpufreq here
-*/
-
-   return default_scale_freq_power(sd, cpu);
-}
-
-unsigned long arch_scale_smt_power(struct sched_domain *sd, int cpu)
-{
-   /*
-* aperf/mperf already includes the smt gain
-*/
-   if (boot_cpu_has(X86_FEATURE_APERFMPERF))
-   return SCHED_LOAD_SCALE;
-
-   return default_scale_smt_power(sd, cpu);
-}
-
-#endif
-- 
1.7.9.5


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[PATCH v3 1/5] ARM: topology: Add arch_scale_freq_power function

[Vincent Guittot]

Add infrastructure to be able to modify the cpu_power of each core

Signed-off-by: Vincent Guittot 
---
 arch/arm/kernel/topology.c |   38 +-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 8200dea..51f23b3 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -22,6 +22,37 @@
 #include 
 #include 
 
+/*
+ * cpu power scale management
+ */
+
+/*
+ * cpu power table
+ * This per cpu data structure describes the relative capacity of each core.
+ * On a heteregenous system, cores don't have the same computation capacity
+ * and we reflect that difference in the cpu_power field so the scheduler can
+ * take this difference into account during load balance. A per cpu structure
+ * is preferred because each CPU updates its own cpu_power field during the
+ * load balance except for idle cores. One idle core is selected to run the
+ * rebalance_domains for all idle cores and the cpu_power can be updated
+ * during this sequence.
+ */
+static DEFINE_PER_CPU(unsigned long, cpu_scale);
+
+unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
+{
+   return per_cpu(cpu_scale, cpu);
+}
+
+static void set_power_scale(unsigned int cpu, unsigned long power)
+{
+   per_cpu(cpu_scale, cpu) = power;
+}
+
+/*
+ * cpu topology management
+ */
+
 #define MPIDR_SMP_BITMASK (0x3 << 30)
 #define MPIDR_SMP_VALUE (0x2 << 30)
 
@@ -41,6 +72,9 @@
 #define MPIDR_LEVEL2_MASK 0xFF
 #define MPIDR_LEVEL2_SHIFT 16
 
+/*
+ * cpu topology table
+ */
 struct cputopo_arm cpu_topology[NR_CPUS];
 
 const struct cpumask *cpu_coregroup_mask(int cpu)
@@ -134,7 +168,7 @@ void init_cpu_topology(void)
 {
unsigned int cpu;
 
-   /* init core mask */
+   /* init core mask and power*/
for_each_possible_cpu(cpu) {
struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
 
@@ -143,6 +177,8 @@ void init_cpu_topology(void)
cpu_topo->socket_id = -1;
cpumask_clear(&cpu_topo->core_sibling);
cpumask_clear(&cpu_topo->thread_sibling);
+
+   set_power_scale(cpu, SCHED_POWER_SCALE);
}
smp_wmb();
 }
-- 
1.7.9.5


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[PATCH v3 3/5] ARM: topology: Update cpu_power according to DT information

[Vincent Guittot]

Use cpu compatibility field and clock-frequency field of DT to
estimate the capacity of each core of the system and to update
the cpu_power field accordingly.
This patch enables to put more running tasks on big cores than
on LITTLE ones. But this patch doesn't ensure that long running
tasks will run on big cores and short ones on LITTLE cores.

Signed-off-by: Vincent Guittot 
---
 arch/arm/kernel/topology.c |  123 
 1 file changed, 123 insertions(+)

diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index eb5fc81..f59193c 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -17,7 +17,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 #include 
 #include 
@@ -49,6 +51,122 @@ static void set_power_scale(unsigned int cpu, unsigned long 
power)
per_cpu(cpu_scale, cpu) = power;
 }
 
+#ifdef CONFIG_OF
+struct cpu_efficiency {
+   const char *compatible;
+   unsigned long efficiency;
+};
+
+/*
+ * Table of relative efficiency of each processors
+ * The efficiency value must fit in 20bit. The final
+ * cpu_scale value must be in the range
+ * 0 < cpu_scale < 2*SCHED_POWER_SCALE.
+ * Processors that are not defined in the table,
+ * use the default SCHED_POWER_SCALE value for cpu_scale.
+ */
+struct cpu_efficiency table_efficiency[] = {
+   {"arm,cortex-a15", 3891},
+   {"arm,cortex-a7",  2048},
+   {NULL, },
+};
+
+struct cpu_capacity {
+   unsigned long hwid;
+   unsigned long capacity;
+};
+
+struct cpu_capacity *cpu_capacity;
+
+unsigned long middle_capacity = 1;
+
+static void __init parse_dt_topology(void)
+{
+   struct cpu_efficiency *cpu_eff;
+   struct device_node *cn = NULL;
+   unsigned long min_capacity = (unsigned long)(-1);
+   unsigned long max_capacity = 0;
+   unsigned long capacity = 0;
+   int alloc_size, cpu = 0;
+
+   alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity);
+   cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT);
+
+   while ((cn = of_find_node_by_type(cn, "cpu"))) {
+   const u32 *rate, *reg;
+   int len;
+
+   if (cpu >= num_possible_cpus())
+   break;
+
+   for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
+   if (of_device_is_compatible(cn, cpu_eff->compatible))
+   break;
+
+   if (cpu_eff->compatible == NULL)
+   continue;
+
+   rate = of_get_property(cn, "clock-frequency", &len);
+   if (!rate || len != 4) {
+   pr_err("%s missing clock-frequency property\n",
+   cn->full_name);
+   continue;
+   }
+
+   reg = of_get_property(cn, "reg", &len);
+   if (!reg || len != 4) {
+   pr_err("%s missing reg property\n", cn->full_name);
+   continue;
+   }
+
+   capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency;
+
+   /* Save min capacity of the system */
+   if (capacity < min_capacity)
+   min_capacity = capacity;
+
+   /* Save max capacity of the system */
+   if (capacity > max_capacity)
+   max_capacity = capacity;
+
+   cpu_capacity[cpu].capacity = capacity;
+   cpu_capacity[cpu++].hwid = be32_to_cpup(reg);
+   }
+
+   if (cpu < num_possible_cpus())
+   cpu_capacity[cpu].hwid = (unsigned long)(-1);
+
+   middle_capacity = (min_capacity + max_capacity) >> 11;
+}
+
+void update_cpu_power(unsigned int cpu, unsigned long hwid)
+{
+   unsigned int idx = 0;
+
+   /* look for the cpu's hwid in the cpu capacity table */
+   for (idx = 0; idx < num_possible_cpus(); idx++) {
+   if (cpu_capacity[idx].hwid == hwid)
+   break;
+
+   if (cpu_capacity[idx].hwid == -1)
+   return;
+   }
+
+   if (idx == num_possible_cpus())
+   return;
+
+   set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity);
+
+   printk(KERN_INFO "CPU%u: update cpu_power %lu\n",
+   cpu, arch_scale_freq_power(NULL, cpu));
+}
+
+#else
+static inline void parse_dt_topology(void) {}
+static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {}
+#endif
+
+
 /*
  * cpu topology management
  */
@@ -62,6 +180,7 @@ static void set_power_scale(unsigned int cpu, unsigned long 
power)
  * These masks reflect the current use of the affinity levels.
  * The affinity level can be up to 16 bits according to ARM ARM
  */
+#define MPIDR_HWID_BITMASK 0xFF
 
 #define MPIDR_LEVEL0_MASK 0x3
 #define MPIDR_LEVEL0_SHIFT 0
@@ -160,6 +279,8 @@ void store_cpu_topology(unsigned int cpuid)
 
update_sibli

[PATCH v3 2/5] ARM: topology: factorize the update of sibling masks

[Vincent Guittot]

This factorization has also been proposed in another patchset that has not been
merged yet:
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/080873.html
So, this patch could be dropped depending of the state of the other one.

Signed-off-by: Lorenzo Pieralisi 
Signed-off-by: Vincent Guittot 
---
 arch/arm/kernel/topology.c |   48 +---
 1 file changed, 27 insertions(+), 21 deletions(-)

diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 51f23b3..eb5fc81 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -82,6 +82,32 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
return &cpu_topology[cpu].core_sibling;
 }
 
+void update_siblings_masks(unsigned int cpuid)
+{
+   struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
+   int cpu;
+
+   /* update core and thread sibling masks */
+   for_each_possible_cpu(cpu) {
+   cpu_topo = &cpu_topology[cpu];
+
+   if (cpuid_topo->socket_id != cpu_topo->socket_id)
+   continue;
+
+   cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
+   if (cpu != cpuid)
+   cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
+
+   if (cpuid_topo->core_id != cpu_topo->core_id)
+   continue;
+
+   cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling);
+   if (cpu != cpuid)
+   cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling);
+   }
+   smp_wmb();
+}
+
 /*
  * store_cpu_topology is called at boot when only one cpu is running
  * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
@@ -91,7 +117,6 @@ void store_cpu_topology(unsigned int cpuid)
 {
struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
unsigned int mpidr;
-   unsigned int cpu;
 
/* If the cpu topology has been already set, just return */
if (cpuid_topo->core_id != -1)
@@ -133,26 +158,7 @@ void store_cpu_topology(unsigned int cpuid)
cpuid_topo->socket_id = -1;
}
 
-   /* update core and thread sibling masks */
-   for_each_possible_cpu(cpu) {
-   struct cputopo_arm *cpu_topo = &cpu_topology[cpu];
-
-   if (cpuid_topo->socket_id == cpu_topo->socket_id) {
-   cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
-   if (cpu != cpuid)
-   cpumask_set_cpu(cpu,
-   &cpuid_topo->core_sibling);
-
-   if (cpuid_topo->core_id == cpu_topo->core_id) {
-   cpumask_set_cpu(cpuid,
-   &cpu_topo->thread_sibling);
-   if (cpu != cpuid)
-   cpumask_set_cpu(cpu,
-   &cpuid_topo->thread_sibling);
-   }
-   }
-   }
-   smp_wmb();
+   update_siblings_masks(cpuid);
 
printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
cpuid, cpu_topology[cpuid].thread_id,
-- 
1.7.9.5


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snowball hang issue with latest android builds.

[Vishal Bhoj]

Hi,

Snowball builds #327,#330,#332 seem to hang when we run the script
mentioned in this bug:

https://bugs.launchpad.net/igloocommunity/+bug/1014650


I have seen that system hangs when I run
Linpack[1]under
certain environments. Here is my observation :

1. System doesn't hang when I run Linpack Single/multi thread configuration
as a normal application by launching and running it (using monkeyrunner in
my case)
2. System hangs when I run the same application when I run the application
in conjunction with
androidscreencast.


I could be that system hangs only at some high loads .

[1] :
http://android.git.linaro.org/gitweb?p=linaro/benchmarks.git;a=blob;f=linpack/com.greenecomputing.linpack-1.apk;h=d0e38866e8a2725836e9c7f228e7ffdece1d1242;hb=ff1690af89b0b26ef5b7d956c54c985bee468ea0


Regards,
Vishal
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Re: [PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Rob Lee]

On Wed, Jun 20, 2012 at 9:20 AM, Sascha Hauer  wrote:
> On Wed, Jun 20, 2012 at 09:12:51AM -0500, Rob Lee wrote:
>> Sascha, thanks for the review.
>>
>> >> +
>> >> +static struct imx6q_thermal_zone     *th_zone;
>> >> +static void __iomem                  *ocotp_base;
>> >
>> > This is a driver and drivers should generally be multi instance safe.
>> >
>>
>> I don't understand what this comment is referring to.  Could you elaborate?
>
> Drivers can only be multi instance safe when all variables are inside a
> instance specific struct and you pass a pointer to this struct around.
> What if the i.MX7 has two different ocotp_base and you want to use this
> driver on both ocotp?
>

Understood, thanks.  I'll fix this in v6.

> Sascha
>
> --
> Pengutronix e.K.                           |                             |
> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917- |

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Re: [PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Sascha Hauer]

On Wed, Jun 20, 2012 at 09:12:51AM -0500, Rob Lee wrote:
> Sascha, thanks for the review.
> 
> >> +
> >> +static struct imx6q_thermal_zone     *th_zone;
> >> +static void __iomem                  *ocotp_base;
> >
> > This is a driver and drivers should generally be multi instance safe.
> >
> 
> I don't understand what this comment is referring to.  Could you elaborate?

Drivers can only be multi instance safe when all variables are inside a
instance specific struct and you pass a pointer to this struct around.
What if the i.MX7 has two different ocotp_base and you want to use this
driver on both ocotp?

Sascha

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Re: [PATCH v5 0/7] cleanup imx5 idle, add imx5/6 cpuidle

[Rob Lee]

Hello Sascha,

On Wed, Jun 20, 2012 at 5:30 AM, Sascha Hauer  wrote:
> Hi Robert,
>
> On Mon, May 21, 2012 at 05:50:23PM -0500, Robert Lee wrote:
>> Cleanup up imx5 idle code and enable imx5 low powe idle for imx53.
>>
>> Add common imx cpuidle initialization functionality and add a i.MX5 and 
>> i.MX6Q
>> platform cpuidle implementation.
>
> I rebased this to 3.5-rc1 here:
>
> git.pengutronix.de/git/imx/linux-2.6.git imx/cpuidle
>
> Could you check if the result is ok with you?
>

Certainly.  I will let you know in a day or two.

Rob

> Sascha
>
>
> --
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> Industrial Linux Solutions                 | http://www.pengutronix.de/  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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Re: [PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Rob Lee]

Sascha, thanks for the review.

On Wed, Jun 20, 2012 at 5:11 AM, Sascha Hauer  wrote:
> On Wed, Jun 20, 2012 at 02:06:04AM -0500, Robert Lee wrote:
>> Add imx6q cpu thermal management driver using the new cpu cooling
>> interface which limits system performance via cpufreq to reduce
>> the cpu temperature.  Temperature readings are taken using
>> the imx6q temperature sensor and this functionality was added
>> as part of this cpu thermal management driver.
>>
>> Signed-off-by: Robert Lee 
>> ---
>>  arch/arm/boot/dts/imx6q.dtsi    |    5 +
>>  drivers/thermal/Kconfig         |   28 ++
>>  drivers/thermal/Makefile        |    1 +
>>  drivers/thermal/imx6q_thermal.c |  593 
>> +++
>>  4 files changed, 627 insertions(+)
>>  create mode 100644 drivers/thermal/imx6q_thermal.c
>>
>> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
>> index 8c90cba..2650f65 100644
>> --- a/arch/arm/boot/dts/imx6q.dtsi
>> +++ b/arch/arm/boot/dts/imx6q.dtsi
>> @@ -442,6 +442,10 @@
>>                                       anatop-min-voltage = <725000>;
>>                                       anatop-max-voltage = <145>;
>>                               };
>> +
>> +                             thermal {
>> +                                     compatible ="fsl,anatop-thermal";
>> +                             };
>>                       };
>>
>>                       usbphy@020c9000 { /* USBPHY1 */
>> @@ -659,6 +663,7 @@
>>                       };
>>
>>                       ocotp@021bc000 {
>> +                             compatible = "fsl,imx6q-ocotp";
>>                               reg = <0x021bc000 0x4000>;
>>                       };
>>
>> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
>> index 04c6796..b80c408 100644
>> --- a/drivers/thermal/Kconfig
>> +++ b/drivers/thermal/Kconfig
>> @@ -30,6 +30,34 @@ config CPU_THERMAL
>>         and not the ACPI interface.
>>         If you want this support, you should say Y or M here.
>>
>> +config IMX6Q_THERMAL
>> +     bool "IMX6Q Thermal interface support"
>> +     depends on MFD_ANATOP && CPU_THERMAL
>> +     help
>> +       Adds thermal management for IMX6Q.
>> +
>> +config IMX6Q_THERMAL_FAKE_CALIBRATION
>> +     bool "IMX6Q fake temperature sensor calibration (FOR TESTING ONLY)"
>> +     depends on IMX6Q_THERMAL
>> +     help
>> +       This enables a fake temp sensor calibration value for parts without
>> +       the correction calibration values burned into OCOTP. If the part
>> +       already has the calibrated values burned into OCOTP, enabling this
>> +       does nothing.
>> +       WARNING: Use of this feature is for testing only as it will cause
>> +       incorrect temperature readings which will result in incorrect system
>> +       thermal limiting behavior such as premature system performance
>> +       limiting or lack of proper performance reduction to reduce cpu
>> +       temperature
>> +
>> +config IMX6Q_THERMAL_FAKE_CAL_VAL
>> +     hex "IMX6Q fake temperature sensor calibration value"
>> +     depends on IMX6Q_THERMAL_FAKE_CALIBRATION
>> +     default 0x5704c67d
>> +     help
>> +       Refer to the temperature sensor section of the imx6q reference manual
>> +       for more inforation on how this value is used.
>
> Don't add such stuff to Kconfig. If during runtime you detect that there
> is no calibration data, then issue a warning and fall back to a safe
> value. If you really think this should be configurable, add a sysfs
> entry for it. "FOR TESTING ONLY" seems to imply though that it shouldn't
> be configurable.
>

Ok, I'll remove this in v6.

>
>> +
>>  config SPEAR_THERMAL
>>       bool "SPEAr thermal sensor driver"
>>       depends on THERMAL
>> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
>> index 4636e35..fc4004e 100644
>> --- a/drivers/thermal/Makefile
>> +++ b/drivers/thermal/Makefile
>> @@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL)         += thermal_sys.o
>>  obj-$(CONFIG_CPU_THERMAL)       += cpu_cooling.o
>>  obj-$(CONFIG_SPEAR_THERMAL)          += spear_thermal.o
>>  obj-$(CONFIG_EXYNOS_THERMAL)         += exynos_thermal.o
>> +obj-$(CONFIG_IMX6Q_THERMAL)  += imx6q_thermal.o
>> diff --git a/drivers/thermal/imx6q_thermal.c 
>> b/drivers/thermal/imx6q_thermal.c
>> new file mode 100644
>> index 000..255d646
>> --- /dev/null
>> +++ b/drivers/thermal/imx6q_thermal.c
>> @@ -0,0 +1,593 @@
>> +/*
>> + * Copyright 2012 Freescale Semiconductor, Inc.
>> + * Copyright 2012 Linaro Ltd.
>> + *
>> + * The code contained herein is licensed under the GNU General Public
>> + * License. You may obtain a copy of the GNU General Public License
>> + * Version 2 or later at the following locations:
>> + *
>> + * http://www.opensource.org/licenses/gpl-license.html
>> + * http://www.gnu.org/copyleft/gpl.html
>> + */
>> +
>> +/* i.MX6Q Thermal Implementation */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#includ

Re: [PATCH 1/2] make v3.4-rc3 run on snowball

[Hongbo Zhang]

Please omit this patch, I am currently working on v3.4-rc3, I will rebase
to the latest version soon.


On 20 June 2012 21:04, hongbo.zhang  wrote:

> From: "hongbo.zhang" 
>
> ---
>  arch/arm/configs/u8500_defconfig |2 ++
>  drivers/power/Makefile   |2 +-
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/configs/u8500_defconfig
> b/arch/arm/configs/u8500_defconfig
> index 889d73a..4dc11da 100644
> --- a/arch/arm/configs/u8500_defconfig
> +++ b/arch/arm/configs/u8500_defconfig
> @@ -99,6 +99,8 @@ CONFIG_EXT2_FS_XATTR=y
>  CONFIG_EXT2_FS_POSIX_ACL=y
>  CONFIG_EXT2_FS_SECURITY=y
>  CONFIG_EXT3_FS=y
> +CONFIG_EXT4_FS=y
> +CONFIG_LBDAF=y
>  CONFIG_VFAT_FS=y
>  CONFIG_TMPFS=y
>  CONFIG_TMPFS_POSIX_ACL=y
> diff --git a/drivers/power/Makefile b/drivers/power/Makefile
> index b6b2434..e642e1c 100644
> --- a/drivers/power/Makefile
> +++ b/drivers/power/Makefile
> @@ -34,7 +34,7 @@ obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o
>  obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o
>  obj-$(CONFIG_BATTERY_JZ4740)   += jz4740-battery.o
>  obj-$(CONFIG_BATTERY_INTEL_MID)+= intel_mid_battery.o
> -obj-$(CONFIG_AB8500_BM)+= ab8500_charger.o ab8500_btemp.o
> ab8500_fg.o abx500_chargalg.o
> +#obj-$(CONFIG_AB8500_BM)   += ab8500_charger.o ab8500_btemp.o
> ab8500_fg.o abx500_chargalg.o
>  obj-$(CONFIG_CHARGER_ISP1704)  += isp1704_charger.o
>  obj-$(CONFIG_CHARGER_MAX8903)  += max8903_charger.o
>  obj-$(CONFIG_CHARGER_TWL4030)  += twl4030_charger.o
> --
> 1.7.10
>
>
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[PATCH 2/2] db8500 thermal dirver

[hongbo.zhang]

From: "hongbo.zhang" 

---
 arch/arm/configs/u8500_defconfig |4 +
 arch/arm/mach-ux500/board-mop500.c   |   71 
 drivers/thermal/Kconfig  |   16 +
 drivers/thermal/Makefile |4 +-
 drivers/thermal/cpu_cooling.c|3 +-
 drivers/thermal/db8500_cpufreq_cooling.c |  159 +
 drivers/thermal/db8500_thermal.c |  445 ++
 include/linux/platform_data/db8500_thermal.h |   39 +++
 8 files changed, 738 insertions(+), 3 deletions(-)
 create mode 100644 drivers/thermal/db8500_cpufreq_cooling.c
 create mode 100755 drivers/thermal/db8500_thermal.c
 create mode 100644 include/linux/platform_data/db8500_thermal.h

diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 4dc11da..ad6e7ab 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -118,3 +118,7 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_FTRACE is not set
 CONFIG_DEBUG_USER=y
+CONFIG_THERMAL=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DB8500_THERMAL=y
+CONFIG_DB8500_CPUFREQ_COOLING=y
diff --git a/arch/arm/mach-ux500/board-mop500.c 
b/arch/arm/mach-ux500/board-mop500.c
index 77d03c1..0c95bce 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -215,6 +216,74 @@ struct platform_device ab8500_device = {
 };
 
 /*
+ * Thermal Sensor
+ */
+
+#ifdef CONFIG_DB8500_THERMAL
+static struct resource db8500_thsens_resources[] = {
+   {
+   .name = "IRQ_HOTMON_LOW",
+   .start  = IRQ_PRCMU_HOTMON_LOW,
+   .end= IRQ_PRCMU_HOTMON_LOW,
+   .flags  = IORESOURCE_IRQ,
+   },
+   {
+   .name = "IRQ_HOTMON_HIGH",
+   .start  = IRQ_PRCMU_HOTMON_HIGH,
+   .end= IRQ_PRCMU_HOTMON_HIGH,
+   .flags  = IORESOURCE_IRQ,
+   },
+};
+
+static struct db8500_trip_point db8500_trips_table[] = {
+   [0] = {
+   .temp = 7,
+   .type = THERMAL_TRIP_ACTIVE,
+   .cooling_dev_name = {
+   [0] = "thermal-cpufreq-0",
+   },
+   },
+   [1] = {
+   .temp = 75000,
+   .type = THERMAL_TRIP_ACTIVE,
+   .cooling_dev_name = {
+   [0] = "thermal-cpufreq-1",
+   },
+   },
+   [2] = {
+   .temp = 8,
+   .type = THERMAL_TRIP_ACTIVE,
+   .cooling_dev_name = {
+   [0] = "thermal-cpufreq-2",
+   },
+   },
+   [3] = {
+   .temp = 85000,
+   .type = THERMAL_TRIP_CRITICAL,
+   },
+};
+
+static struct db8500_thsens_platform_data db8500_thsens_data = {
+   .trip_points= db8500_trips_table,
+   .num_trips  = ARRAY_SIZE(db8500_trips_table),
+};
+
+static struct platform_device u8500_thsens_device = {
+   .name   = "db8500_thermal",
+   .resource   = db8500_thsens_resources,
+   .num_resources  = ARRAY_SIZE(db8500_thsens_resources),
+   .dev= {
+   .platform_data  = &db8500_thsens_data,
+   },
+};
+#endif
+
+#ifdef CONFIG_DB8500_CPUFREQ_COOLING
+static struct platform_device u8500_cpufreq_cooling_device = {
+   .name   = "db8500_cpufreq_cooling",
+};
+#endif
+/*
  * TPS61052
  */
 
@@ -607,6 +676,8 @@ static struct platform_device *snowball_platform_devs[] 
__initdata = {
&snowball_key_dev,
&snowball_sbnet_dev,
&ab8500_device,
+   &u8500_thsens_device,
+   &u8500_cpufreq_cooling_device,
 };
 
 static void __init mop500_init_machine(void)
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index d9c529f..eeabe01 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -30,6 +30,22 @@ config CPU_THERMAL
  and not the ACPI interface.
  If you want this support, you should say Y or M here.
 
+config DB8500_THERMAL
+   tristate "db8500 thermal management"
+   depends on THERMAL
+   default y
+   help
+ Adds DB8500 thermal management implementation according to the thermal
+ management framework.
+
+config DB8500_CPUFREQ_COOLING
+   tristate "db8500 cpufreq cooling"
+   depends on CPU_THERMAL
+   default y
+   help
+ Adds DB8500 cpufreq cooling devices, and these cooling devicesd can be
+ binded to thermal zone device trip points.
+
 config SPEAR_THERMAL
bool "SPEAr thermal sensor driver"
depends on THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 30c456c..d146456 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -3,5 +3,7 @@
 #
 
 obj-$(CONFIG_THERMAL)  += thermal_sys.o
-obj-$(CONFIG_CPU_THERMAL)   += cpu_cooling.o
+obj-$(CONFIG_CPU_THERMAL)  +=

[PATCH 1/2] make v3.4-rc3 run on snowball

[hongbo.zhang]

From: "hongbo.zhang" 

---
 arch/arm/configs/u8500_defconfig |2 ++
 drivers/power/Makefile   |2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 889d73a..4dc11da 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -99,6 +99,8 @@ CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
 CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS=y
+CONFIG_LBDAF=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b6b2434..e642e1c 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -34,7 +34,7 @@ obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o
 obj-$(CONFIG_CHARGER_PCF50633) += pcf50633-charger.o
 obj-$(CONFIG_BATTERY_JZ4740)   += jz4740-battery.o
 obj-$(CONFIG_BATTERY_INTEL_MID)+= intel_mid_battery.o
-obj-$(CONFIG_AB8500_BM)+= ab8500_charger.o ab8500_btemp.o 
ab8500_fg.o abx500_chargalg.o
+#obj-$(CONFIG_AB8500_BM)   += ab8500_charger.o ab8500_btemp.o 
ab8500_fg.o abx500_chargalg.o
 obj-$(CONFIG_CHARGER_ISP1704)  += isp1704_charger.o
 obj-$(CONFIG_CHARGER_MAX8903)  += max8903_charger.o
 obj-$(CONFIG_CHARGER_TWL4030)  += twl4030_charger.o
-- 
1.7.10


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Re: [PATCH v2 1/5] ARM: topology: Add arch_scale_freq_power function

[Vincent Guittot]

On 20 June 2012 02:51, Namhyung Kim  wrote:
>
>
>
> Hi, Vincent
>
> Just a couple of nitpicks..
>
>
> On Tue, 19 Jun 2012 10:28:52 +0200, Vincent Guittot wrote:
>> Add infrastructure to be able to modify the cpu_power of each core
>>
>> Signed-off-by: Vincent Guittot 
>> 
>> ---
>>  arch/arm/include/asm/topology.h |    2 ++
>>  arch/arm/kernel/topology.c      |   38 
>> +-
>>  2 files changed, 39 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/include/asm/topology.h 
>> b/arch/arm/include/asm/topology.h
>> index 58b8b84..78e4c85 100644
>> --- a/arch/arm/include/asm/topology.h
>> +++ b/arch/arm/include/asm/topology.h
>> @@ -27,11 +27,13 @@ void init_cpu_topology(void);
>>  void store_cpu_topology(unsigned int cpuid);
>>  const struct cpumask *cpu_coregroup_mask(int cpu);
>>
>> +void set_power_scale(unsigned int cpu, unsigned long power);
>>  #else
>>
>>  static inline void init_cpu_topology(void) { }
>>  static inline void store_cpu_topology(unsigned int cpuid) { }
>>
>> +static inline void set_power_scale(unsigned int cpu, unsigned long power) { 
>> }
>>  #endif
>>
>>  #include 
>> diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
>> index 8200dea..37e2e57 100644
>> --- a/arch/arm/kernel/topology.c
>> +++ b/arch/arm/kernel/topology.c
>> @@ -22,6 +22,37 @@
>>  #include 
>>  #include 
>>
>> +/*
>> + * cpu power scale management
>> + */
>> +
>> +/*
>> + * cpu power table
>> + * This per cpu data structure describes the relative capacity of each core.
>> + * On a heteregenous system, cores don't have the same computation capacity
>> + * and we reflect that difference in the cpu_power field so the scheduler 
>> can
>> + * take this difference into account during load balance. A per cpu 
>> structure
>> + * is preferred because each CPU updates its own cpu_power field during the
>> + * load balance except for idle cores. One idle core is selected to run the
>> + * rebalance_domains for all idle cores and the cpu_power can be updated
>> + * during this sequence.
>> + */
>> +static DEFINE_PER_CPU(unsigned long, cpu_scale);
>> +
>> +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
>> +{
>> +     return per_cpu(cpu_scale, cpu);
>> +}
>> +
>> +void set_power_scale(unsigned int cpu, unsigned long power)
>> +{
>> +     per_cpu(cpu_scale, cpu) = power;
>> +}
>
> Isn't it a static function?

It's not static because the function could also be used outside. This
patchset updates the capacity according to DT information but the
capacity could also be updated depending of other inputs like a
modification of the maximum frequency of a core.

I can make it static for now and could remove the static attribute when needed

>
>
>> +
>> +/*
>> + * cpu topology management
>> + */
>> +
>>  #define MPIDR_SMP_BITMASK (0x3 << 30)
>>  #define MPIDR_SMP_VALUE (0x2 << 30)
>>
>> @@ -41,6 +72,9 @@
>>  #define MPIDR_LEVEL2_MASK 0xFF
>>  #define MPIDR_LEVEL2_SHIFT 16
>>
>> +/*
>> + * cpu topology table
>> + */
>>  struct cputopo_arm cpu_topology[NR_CPUS];
>>
>>  const struct cpumask *cpu_coregroup_mask(int cpu)
>> @@ -134,7 +168,7 @@ void init_cpu_topology(void)
>>  {
>>       unsigned int cpu;
>>
>> -     /* init core mask */
>> +     /* init core mask and power*/
>>       for_each_possible_cpu(cpu) {
>>               struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
>>
>> @@ -143,6 +177,8 @@ void init_cpu_topology(void)
>>               cpu_topo->socket_id = -1;
>>               cpumask_clear(&cpu_topo->core_sibling);
>>               cpumask_clear(&cpu_topo->thread_sibling);
>> +
>> +             per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE;
>
> Wouldn't it be better using:
>
>                set_power_scale(cpu, SCHED_POWER_SCALE);
> ?

Yes

Thanks
>
> Thanks,
> Namhyung
>
>
>>       }
>>       smp_wmb();
>>  }
>
>
>
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Re: [PATCH v2 3/5] ARM: topology: Update cpu_power according to DT information

[Vincent Guittot]

On 20 June 2012 03:15, Namhyung Kim  wrote:
>
>
>
> On Tue, 19 Jun 2012 10:28:54 +0200, Vincent Guittot wrote:
>> Use cpu compatibility field and clock-frequency field of DT to
>> estimate the capacity of each core of the system and to update
>> the cpu_power field accordingly.
>> This patch enables to put more running tasks on big cores than
>> on LITTLE ones. But this patch doesn't ensure that long running
>> tasks will run on big cores and short ones on LITTLE cores.
>>
>> Signed-off-by: Vincent Guittot 
>> 
>> ---
> [snip]
>> +static void __init parse_dt_topology(void)
>> +{
>> +     struct cpu_efficiency *cpu_eff;
>> +     struct device_node *cn = NULL;
>> +     unsigned long min_capacity = (unsigned long)(-1);
>> +     unsigned long max_capacity = 0;
>> +     unsigned long capacity = 0;
>> +     int alloc_size, cpu = 0;
>> +
>> +     alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity);
>> +     cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT);
>> +
>> +     while ((cn = of_find_node_by_type(cn, "cpu"))) {
>> +             const u32 *rate, *reg;
>> +             char *compatible;
>> +             int len;
>> +
>> +             if (cpu >= num_possible_cpus())
>> +                     break;
>> +
>> +             compatible = of_get_property(cn, "compatible", &len);
>
> Why is this line needed?

not needed is the final version, should have been removed.

>
>
>> +
>> +             for (cpu_eff = table_efficiency; cpu_eff->compatible; 
>> cpu_eff++)
>> +                     if (of_device_is_compatible(cn, cpu_eff->compatible))
>> +                             break;
>> +
>> +             if (cpu_eff->compatible == NULL)
>> +                     continue;
>> +
>> +             rate = of_get_property(cn, "clock-frequency", &len);
>> +             if (!rate || len != 4) {
>> +                     pr_err("%s missing clock-frequency property\n",
>> +                             cn->full_name);
>> +                     continue;
>> +             }
>> +
>> +             reg = of_get_property(cn, "reg", &len);
>> +             if (!reg || len != 4) {
>> +                     pr_err("%s missing reg property\n", cn->full_name);
>> +                     continue;
>> +             }
>> +
>> +             capacity = ((be32_to_cpup(rate)) >> 20)
>> +                     * cpu_eff->efficiency;
>
> Why did you break this line?

It was more than 80 chars large previously but no more the case.
I'm going to correct

Thanks
>
> Thanks,
> Namhyung
>
>
>
>
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Re: [PATCH v2 5/5] sched: cpu_power: enable ARCH_POWER

[Peter Zijlstra]

On Wed, 2012-06-20 at 11:11 +0200, Vincent Guittot wrote:
> On 19 June 2012 11:01, Yong Zhang  wrote:
> > On Tue, Jun 19, 2012 at 10:28:56AM +0200, Vincent Guittot wrote:
> >> Heteregeneous ARM platform uses arch_scale_freq_power function
> >> to reflect the relative capacity of each core
> >>
> >> Signed-off-by: Vincent Guittot 
> >> ---
> >>  kernel/sched/features.h |2 +-
> >>  1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/kernel/sched/features.h b/kernel/sched/features.h
> >> index de00a48..d98ae90 100644
> >> --- a/kernel/sched/features.h
> >> +++ b/kernel/sched/features.h
> >> @@ -42,7 +42,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, true)
> >>  /*
> >>   * Use arch dependent cpu power functions
> >>   */
> >> -SCHED_FEAT(ARCH_POWER, false)
> >> +SCHED_FEAT(ARCH_POWER, true)
> >
> > Hmmm...seems we can remove this knob completely.
> >
> 
> Peter,
> 
> Do you prefer to keep it or remove it completely ?

I prefer to keep it, the 'we can remove it' is true for all feature
bits, they should never be twiddled in normal circumstances, its a debug
feature. As such it makes sense to allow disabling the arch cpu-power
fiddling.

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Re: [PATCH v5 0/7] cleanup imx5 idle, add imx5/6 cpuidle

[Sascha Hauer]

Hi Robert,

On Mon, May 21, 2012 at 05:50:23PM -0500, Robert Lee wrote:
> Cleanup up imx5 idle code and enable imx5 low powe idle for imx53.
> 
> Add common imx cpuidle initialization functionality and add a i.MX5 and i.MX6Q
> platform cpuidle implementation.

I rebased this to 3.5-rc1 here:

git.pengutronix.de/git/imx/linux-2.6.git imx/cpuidle

Could you check if the result is ok with you?

Sascha


-- 
Pengutronix e.K.   | |
Industrial Linux Solutions | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0|
Amtsgericht Hildesheim, HRA 2686   | Fax:   +49-5121-206917- |

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Re: [PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Sascha Hauer]

On Wed, Jun 20, 2012 at 02:06:04AM -0500, Robert Lee wrote:
> Add imx6q cpu thermal management driver using the new cpu cooling
> interface which limits system performance via cpufreq to reduce
> the cpu temperature.  Temperature readings are taken using
> the imx6q temperature sensor and this functionality was added
> as part of this cpu thermal management driver.
> 
> Signed-off-by: Robert Lee 
> ---
>  arch/arm/boot/dts/imx6q.dtsi|5 +
>  drivers/thermal/Kconfig |   28 ++
>  drivers/thermal/Makefile|1 +
>  drivers/thermal/imx6q_thermal.c |  593 
> +++
>  4 files changed, 627 insertions(+)
>  create mode 100644 drivers/thermal/imx6q_thermal.c
> 
> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
> index 8c90cba..2650f65 100644
> --- a/arch/arm/boot/dts/imx6q.dtsi
> +++ b/arch/arm/boot/dts/imx6q.dtsi
> @@ -442,6 +442,10 @@
>   anatop-min-voltage = <725000>;
>   anatop-max-voltage = <145>;
>   };
> +
> + thermal {
> + compatible ="fsl,anatop-thermal";
> + };
>   };
>  
>   usbphy@020c9000 { /* USBPHY1 */
> @@ -659,6 +663,7 @@
>   };
>  
>   ocotp@021bc000 {
> + compatible = "fsl,imx6q-ocotp";
>   reg = <0x021bc000 0x4000>;
>   };
>  
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 04c6796..b80c408 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -30,6 +30,34 @@ config CPU_THERMAL
> and not the ACPI interface.
> If you want this support, you should say Y or M here.
>  
> +config IMX6Q_THERMAL
> + bool "IMX6Q Thermal interface support"
> + depends on MFD_ANATOP && CPU_THERMAL
> + help
> +   Adds thermal management for IMX6Q.
> +
> +config IMX6Q_THERMAL_FAKE_CALIBRATION
> + bool "IMX6Q fake temperature sensor calibration (FOR TESTING ONLY)"
> + depends on IMX6Q_THERMAL
> + help
> +   This enables a fake temp sensor calibration value for parts without
> +   the correction calibration values burned into OCOTP. If the part
> +   already has the calibrated values burned into OCOTP, enabling this
> +   does nothing.
> +   WARNING: Use of this feature is for testing only as it will cause
> +   incorrect temperature readings which will result in incorrect system
> +   thermal limiting behavior such as premature system performance
> +   limiting or lack of proper performance reduction to reduce cpu
> +   temperature
> +
> +config IMX6Q_THERMAL_FAKE_CAL_VAL
> + hex "IMX6Q fake temperature sensor calibration value"
> + depends on IMX6Q_THERMAL_FAKE_CALIBRATION
> + default 0x5704c67d
> + help
> +   Refer to the temperature sensor section of the imx6q reference manual
> +   for more inforation on how this value is used.

Don't add such stuff to Kconfig. If during runtime you detect that there
is no calibration data, then issue a warning and fall back to a safe
value. If you really think this should be configurable, add a sysfs
entry for it. "FOR TESTING ONLY" seems to imply though that it shouldn't
be configurable.


> +
>  config SPEAR_THERMAL
>   bool "SPEAr thermal sensor driver"
>   depends on THERMAL
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 4636e35..fc4004e 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL) += thermal_sys.o
>  obj-$(CONFIG_CPU_THERMAL)   += cpu_cooling.o
>  obj-$(CONFIG_SPEAR_THERMAL)  += spear_thermal.o
>  obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
> +obj-$(CONFIG_IMX6Q_THERMAL)  += imx6q_thermal.o
> diff --git a/drivers/thermal/imx6q_thermal.c b/drivers/thermal/imx6q_thermal.c
> new file mode 100644
> index 000..255d646
> --- /dev/null
> +++ b/drivers/thermal/imx6q_thermal.c
> @@ -0,0 +1,593 @@
> +/*
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2012 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/* i.MX6Q Thermal Implementation */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* register define of anatop */
> +#define HW_ANADIG_ANA_MISC0  0x0150
> +#defin

Re: [PATCH v2 5/5] sched: cpu_power: enable ARCH_POWER

[Vincent Guittot]

On 19 June 2012 11:01, Yong Zhang  wrote:
> On Tue, Jun 19, 2012 at 10:28:56AM +0200, Vincent Guittot wrote:
>> Heteregeneous ARM platform uses arch_scale_freq_power function
>> to reflect the relative capacity of each core
>>
>> Signed-off-by: Vincent Guittot 
>> ---
>>  kernel/sched/features.h |    2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/kernel/sched/features.h b/kernel/sched/features.h
>> index de00a48..d98ae90 100644
>> --- a/kernel/sched/features.h
>> +++ b/kernel/sched/features.h
>> @@ -42,7 +42,7 @@ SCHED_FEAT(CACHE_HOT_BUDDY, true)
>>  /*
>>   * Use arch dependent cpu power functions
>>   */
>> -SCHED_FEAT(ARCH_POWER, false)
>> +SCHED_FEAT(ARCH_POWER, true)
>
> Hmmm...seems we can remove this knob completely.
>

Peter,

Do you prefer to keep it or remove it completely ?

Thanks

> __weak arch_scale_smt_power() is doing all the trick.
>
> Thanks,
> Yong

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Re: [PATCH] [CPUFREQ] VCPUfreq: Virtual CPU frequency driver.

[Pantelis Antoniou]

Hi Charles,

At first I did looked in the hrtimers API to do so, but
it seems that significant hacking would be required to provide
what is needed for vcpufreq to work; That is:

1) Steering of the timer interrupt to a given CPU
2) Making sure that the timer callback is called in an interrupt context.

I am specifically interested in getting vcpufreq to work on TI SoCs anyway,
and using dm timers was painless comparatively.

However if someone wants to take stab at implementing this in a portable
manner shouldn't be too hard, since the platform glue is nicely abstracted
with just 3 functions to implement.

Regards

-- Pantelis

On Jun 20, 2012, at 10:56 AM, Charles Garcia-Tobin wrote:

> Hi
> 
> This is exactly the sort of technique I was proposing, but I was wondering 
> whether there is a generic timer API that could be used. I was thinking 
> hrtimer but profess no knowledge here. Such an approach would make it usable 
> on all boards.
> 
> Cheers
> 
> Charles
> 
> 
>> -Original Message-
>> From: Amit Kucheria [mailto:amit.kuche...@linaro.org]
>> Sent: 20 June 2012 06:30
>> To: Pantelis Antoniou
>> Cc: santosh.shilim...@ti.com; linaro-dev@lists.linaro.org;
>> vbars...@dev.rtsoft.ru; Rob Lee; Charles Garcia-Tobin
>> Subject: Re: [PATCH] [CPUFREQ] VCPUfreq: Virtual CPU frequency driver.
>> 
>> Panto,
>> 
>> This looks interesting. cc'ing Rob and Charles who were interested in
>> this at Connect.
>> 
>> /Amit
>> 
>> On Thu, Jun 21, 2012 at 3:15 AM, Pantelis Antoniou
>>  wrote:
>>> Many current interesting systems have no ability to simulate the upcoming
>>> bigLITTLE machines, since their cores have to be clocked at the same speeds.
>>> 
>>> Using this driver it is possible to simulate a bigLITTLE system by means
>>> of a standard (virtual) cpufreq driver.
>>> 
>>> By using a timer per core & irq affinity it is possible to do something
>>> like this:
>>> 
>>>   $ cpucycle cpu0
>>>   90403235
>>>   $ cpucycle cpu1
>>>   89810456
>>>   $ cd /sys/devices/system/cpu/cpu0/cpufreq
>>>   $ cat scaling_available_frequencies
>>>   233325 466651 699977
>>>   $ echo 466651 > scaling_setspeed
>>>   $ cpucycle cpu0
>>>   58936083
>>> 
>>> Note that the ratios are about the same so it is somewhat accurate.
>>>   451  /  699977 =~ 0.666
>>>   58936083 / 90403235 =~ 0.652
>>> 
>>> The available tunables available as module parameters are:
>>> 
>>> freq:
>>>   Normal maximum CPU frequency in kHz
>>>   When 0, then the platform glue layer should probe for it.
>>>   default 0
>>> 
>>> hogtime:
>>>   Amount of time in usecs that the timer interrupt handler will hog
>>>   the CPU. Note this is time spend spinning in an IRQ handler, so
>>>   it should be as low as possible. A higher value result in more
>>>   accurate simulation.
>>>   Default 100
>>> 
>>> latency:
>>>   Simulated latency in usecs of cpu freq change.
>>>   Default 500
>>> 
>>> splits:
>>>   Number of splits in the frequency value. For example when freq is
>>>   100 and splits is 2 then two frequency OPPs will be generated,
>>>   one in 50 and one in 100.
>>> 
>>> Only one glue layer for omap2plus is provided, but it should be trivial to
>>> add more for other platforms.
>>> ---
>>> drivers/cpufreq/Kconfig |   26 
>>> drivers/cpufreq/Makefile|5 +
>>> drivers/cpufreq/vcpufreq-omap.c |  251
>> +++
>>> drivers/cpufreq/vcpufreq.c  |  216 +
>>> drivers/cpufreq/vcpufreq.h  |   25 
>>> 5 files changed, 523 insertions(+), 0 deletions(-)
>>> create mode 100644 drivers/cpufreq/vcpufreq-omap.c
>>> create mode 100644 drivers/cpufreq/vcpufreq.c
>>> create mode 100644 drivers/cpufreq/vcpufreq.h
>>> 
>>> diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
>>> index e24a2a1..1fef0ad 100644
>>> --- a/drivers/cpufreq/Kconfig
>>> +++ b/drivers/cpufreq/Kconfig
>>> @@ -194,5 +194,31 @@ depends on PPC32 || PPC64
>>> source "drivers/cpufreq/Kconfig.powerpc"
>>> endmenu
>>> 
>>> +config VCPUFREQ
>>> +   bool "Virtual CPU freq driver"
>>> +   depends on CPU_FREQ
>>> +   select CPU_FREQ_TABLE
>>> +   help
>>> + This driver implements a cycle-soaker cpufreq driver.
>>> +
>>> + To compile this driver as a module, choose M here: the
>>> + module will be called vcpufreq.
>>> +
>>> + If in doubt, say N.
>>> +
>>> +if VCPUFREQ
>>> +
>>> +choice
>>> +   prompt "VCPUFREQ Platform glue Layer"
>>> +
>>> +config VCPUFREQ_OMAP2PLUS
>>> +   bool "OMAP VCPUFREQ driver"
>>> +   depends on ARCH_OMAP2PLUS
>>> +
>>> +endchoice
>>> +
>>> +endif
>>> +
>>> endif
>>> +
>>> endmenu
>>> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
>>> index 9531fc2..97d3011 100644
>>> --- a/drivers/cpufreq/Makefile
>>> +++ b/drivers/cpufreq/Makefile
>>> @@ -52,3 +52,8 @@ obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += o

Re: [PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Rob Lee]

On Wed, Jun 20, 2012 at 2:06 AM, Robert Lee  wrote:
> Add imx6q cpu thermal management driver using the new cpu cooling
> interface which limits system performance via cpufreq to reduce
> the cpu temperature.  Temperature readings are taken using
> the imx6q temperature sensor and this functionality was added
> as part of this cpu thermal management driver.
>
> Signed-off-by: Robert Lee 
> ---
>  arch/arm/boot/dts/imx6q.dtsi    |    5 +
>  drivers/thermal/Kconfig         |   28 ++
>  drivers/thermal/Makefile        |    1 +
>  drivers/thermal/imx6q_thermal.c |  593 
> +++
>  4 files changed, 627 insertions(+)
>  create mode 100644 drivers/thermal/imx6q_thermal.c
>
> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
> index 8c90cba..2650f65 100644
> --- a/arch/arm/boot/dts/imx6q.dtsi
> +++ b/arch/arm/boot/dts/imx6q.dtsi
> @@ -442,6 +442,10 @@
>                                        anatop-min-voltage = <725000>;
>                                        anatop-max-voltage = <145>;
>                                };
> +
> +                               thermal {
> +                                       compatible ="fsl,anatop-thermal";
> +                               };
>                        };
>
>                        usbphy@020c9000 { /* USBPHY1 */
> @@ -659,6 +663,7 @@
>                        };
>
>                        ocotp@021bc000 {
> +                               compatible = "fsl,imx6q-ocotp";
>                                reg = <0x021bc000 0x4000>;
>                        };
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 04c6796..b80c408 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -30,6 +30,34 @@ config CPU_THERMAL
>          and not the ACPI interface.
>          If you want this support, you should say Y or M here.
>
> +config IMX6Q_THERMAL
> +       bool "IMX6Q Thermal interface support"
> +       depends on MFD_ANATOP && CPU_THERMAL
> +       help
> +         Adds thermal management for IMX6Q.
> +
> +config IMX6Q_THERMAL_FAKE_CALIBRATION
> +       bool "IMX6Q fake temperature sensor calibration (FOR TESTING ONLY)"
> +       depends on IMX6Q_THERMAL
> +       help
> +         This enables a fake temp sensor calibration value for parts without
> +         the correction calibration values burned into OCOTP. If the part
> +         already has the calibrated values burned into OCOTP, enabling this
> +         does nothing.
> +         WARNING: Use of this feature is for testing only as it will cause
> +         incorrect temperature readings which will result in incorrect system
> +         thermal limiting behavior such as premature system performance
> +         limiting or lack of proper performance reduction to reduce cpu
> +         temperature
> +
> +config IMX6Q_THERMAL_FAKE_CAL_VAL
> +       hex "IMX6Q fake temperature sensor calibration value"
> +       depends on IMX6Q_THERMAL_FAKE_CALIBRATION
> +       default 0x5704c67d
> +       help
> +         Refer to the temperature sensor section of the imx6q reference 
> manual
> +         for more inforation on how this value is used.
> +
>  config SPEAR_THERMAL
>        bool "SPEAr thermal sensor driver"
>        depends on THERMAL
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 4636e35..fc4004e 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL)           += thermal_sys.o
>  obj-$(CONFIG_CPU_THERMAL)       += cpu_cooling.o
>  obj-$(CONFIG_SPEAR_THERMAL)            += spear_thermal.o
>  obj-$(CONFIG_EXYNOS_THERMAL)           += exynos_thermal.o
> +obj-$(CONFIG_IMX6Q_THERMAL)    += imx6q_thermal.o
> diff --git a/drivers/thermal/imx6q_thermal.c b/drivers/thermal/imx6q_thermal.c
> new file mode 100644
> index 000..255d646
> --- /dev/null
> +++ b/drivers/thermal/imx6q_thermal.c
> @@ -0,0 +1,593 @@
> +/*
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2012 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/* i.MX6Q Thermal Implementation */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* register define of anatop */
> +#define HW_ANADIG_ANA_MISC0                    0x0150
> +#define HW_ANADIG_ANA_MISC0_SET                        0x0154
> +#define HW_ANADIG_ANA_MISC0_CLR                        0x0158
> +#define HW_ANADIG_ANA_MISC0_TOG                        0x015c
> +#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIAS

Re: [PATCH v2 3/5] ARM: topology: Update cpu_power according to DT information

[Namhyung Kim]

On Tue, 19 Jun 2012 10:28:54 +0200, Vincent Guittot wrote:
> Use cpu compatibility field and clock-frequency field of DT to
> estimate the capacity of each core of the system and to update
> the cpu_power field accordingly.
> This patch enables to put more running tasks on big cores than
> on LITTLE ones. But this patch doesn't ensure that long running
> tasks will run on big cores and short ones on LITTLE cores.
>
> Signed-off-by: Vincent Guittot 
> 
> ---
[snip]
> +static void __init parse_dt_topology(void)
> +{
> + struct cpu_efficiency *cpu_eff;
> + struct device_node *cn = NULL;
> + unsigned long min_capacity = (unsigned long)(-1);
> + unsigned long max_capacity = 0;
> + unsigned long capacity = 0;
> + int alloc_size, cpu = 0;
> +
> + alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity);
> + cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT);
> +
> + while ((cn = of_find_node_by_type(cn, "cpu"))) {
> + const u32 *rate, *reg;
> + char *compatible;
> + int len;
> +
> + if (cpu >= num_possible_cpus())
> + break;
> +
> + compatible = of_get_property(cn, "compatible", &len);

Why is this line needed?


> +
> + for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
> + if (of_device_is_compatible(cn, cpu_eff->compatible))
> + break;
> +
> + if (cpu_eff->compatible == NULL)
> + continue;
> +
> + rate = of_get_property(cn, "clock-frequency", &len);
> + if (!rate || len != 4) {
> + pr_err("%s missing clock-frequency property\n",
> + cn->full_name);
> + continue;
> + }
> +
> + reg = of_get_property(cn, "reg", &len);
> + if (!reg || len != 4) {
> + pr_err("%s missing reg property\n", cn->full_name);
> + continue;
> + }
> +
> + capacity = ((be32_to_cpup(rate)) >> 20)
> + * cpu_eff->efficiency;

Why did you break this line?

Thanks,
Namhyung




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Re: [PATCH v2 2/5] ARM: topology: factorize the update of sibling masks

[Namhyung Kim]

On Tue, 19 Jun 2012 10:28:53 +0200, Vincent Guittot wrote:
> This factorization has also been proposed in another patchset that has not 
> been
> merged yet:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/080873.html
> So, this patch could be dropped depending of the state of the other one.
>
> Signed-off-by: Lorenzo Pieralisi 
> 
> Signed-off-by: Vincent Guittot 
> 
> ---
>  arch/arm/kernel/topology.c |   47 
> 
>  1 file changed, 26 insertions(+), 21 deletions(-)
>
> diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
> index 37e2e57..92c2fb3 100644
> --- a/arch/arm/kernel/topology.c
> +++ b/arch/arm/kernel/topology.c
> @@ -82,6 +82,31 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
>   return &cpu_topology[cpu].core_sibling;
>  }
>  
> +void update_siblings_masks(unsigned int cpuid)
> +{
> + struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
> + int cpu;
> + /* update core and thread sibling masks */
> + for_each_possible_cpu(cpu) {
> + cpu_topo = &cpu_topology[cpu];
> +
> + if (cpuid_topo->socket_id == cpu_topo->socket_id) {

I think this will make the code a little bit cleaner:

if (cpuid_topo->socket_id != cpu_topo->socket_id)
continue;

Thanks,
Namhyung


> + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
> + if (cpu != cpuid)
> + cpumask_set_cpu(cpu, &cpuid_topo->core_sibling);
> +
> + if (cpuid_topo->core_id == cpu_topo->core_id) {
> + cpumask_set_cpu(cpuid,
> + &cpu_topo->thread_sibling);
> + if (cpu != cpuid)
> + cpumask_set_cpu(cpu,
> + &cpuid_topo->thread_sibling);
> + }
> + }
> + }
> + smp_wmb();
> +}
> +



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Re: [PATCH v2 1/5] ARM: topology: Add arch_scale_freq_power function

[Namhyung Kim]

Hi, Vincent

Just a couple of nitpicks..


On Tue, 19 Jun 2012 10:28:52 +0200, Vincent Guittot wrote:
> Add infrastructure to be able to modify the cpu_power of each core
>
> Signed-off-by: Vincent Guittot 
> 
> ---
>  arch/arm/include/asm/topology.h |2 ++
>  arch/arm/kernel/topology.c  |   38 +-
>  2 files changed, 39 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
> index 58b8b84..78e4c85 100644
> --- a/arch/arm/include/asm/topology.h
> +++ b/arch/arm/include/asm/topology.h
> @@ -27,11 +27,13 @@ void init_cpu_topology(void);
>  void store_cpu_topology(unsigned int cpuid);
>  const struct cpumask *cpu_coregroup_mask(int cpu);
>  
> +void set_power_scale(unsigned int cpu, unsigned long power);
>  #else
>  
>  static inline void init_cpu_topology(void) { }
>  static inline void store_cpu_topology(unsigned int cpuid) { }
>  
> +static inline void set_power_scale(unsigned int cpu, unsigned long power) { }
>  #endif
>  
>  #include 
> diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
> index 8200dea..37e2e57 100644
> --- a/arch/arm/kernel/topology.c
> +++ b/arch/arm/kernel/topology.c
> @@ -22,6 +22,37 @@
>  #include 
>  #include 
>  
> +/*
> + * cpu power scale management
> + */
> +
> +/*
> + * cpu power table
> + * This per cpu data structure describes the relative capacity of each core.
> + * On a heteregenous system, cores don't have the same computation capacity
> + * and we reflect that difference in the cpu_power field so the scheduler can
> + * take this difference into account during load balance. A per cpu structure
> + * is preferred because each CPU updates its own cpu_power field during the
> + * load balance except for idle cores. One idle core is selected to run the
> + * rebalance_domains for all idle cores and the cpu_power can be updated
> + * during this sequence.
> + */
> +static DEFINE_PER_CPU(unsigned long, cpu_scale);
> +
> +unsigned long arch_scale_freq_power(struct sched_domain *sd, int cpu)
> +{
> + return per_cpu(cpu_scale, cpu);
> +}
> +
> +void set_power_scale(unsigned int cpu, unsigned long power)
> +{
> + per_cpu(cpu_scale, cpu) = power;
> +}

Isn't it a static function?


> +
> +/*
> + * cpu topology management
> + */
> +
>  #define MPIDR_SMP_BITMASK (0x3 << 30)
>  #define MPIDR_SMP_VALUE (0x2 << 30)
>  
> @@ -41,6 +72,9 @@
>  #define MPIDR_LEVEL2_MASK 0xFF
>  #define MPIDR_LEVEL2_SHIFT 16
>  
> +/*
> + * cpu topology table
> + */
>  struct cputopo_arm cpu_topology[NR_CPUS];
>  
>  const struct cpumask *cpu_coregroup_mask(int cpu)
> @@ -134,7 +168,7 @@ void init_cpu_topology(void)
>  {
>   unsigned int cpu;
>  
> - /* init core mask */
> + /* init core mask and power*/
>   for_each_possible_cpu(cpu) {
>   struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
>  
> @@ -143,6 +177,8 @@ void init_cpu_topology(void)
>   cpu_topo->socket_id = -1;
>   cpumask_clear(&cpu_topo->core_sibling);
>   cpumask_clear(&cpu_topo->thread_sibling);
> +
> + per_cpu(cpu_scale, cpu) = SCHED_POWER_SCALE;

Wouldn't it be better using:

set_power_scale(cpu, SCHED_POWER_SCALE);
?

Thanks,
Namhyung


>   }
>   smp_wmb();
>  }



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RE: [PATCH] [CPUFREQ] VCPUfreq: Virtual CPU frequency driver.

[Charles Garcia-Tobin]

Hi

This is exactly the sort of technique I was proposing, but I was wondering 
whether there is a generic timer API that could be used. I was thinking hrtimer 
but profess no knowledge here. Such an approach would make it usable on all 
boards.

Cheers

Charles


> -Original Message-
> From: Amit Kucheria [mailto:amit.kuche...@linaro.org]
> Sent: 20 June 2012 06:30
> To: Pantelis Antoniou
> Cc: santosh.shilim...@ti.com; linaro-dev@lists.linaro.org;
> vbars...@dev.rtsoft.ru; Rob Lee; Charles Garcia-Tobin
> Subject: Re: [PATCH] [CPUFREQ] VCPUfreq: Virtual CPU frequency driver.
>
> Panto,
>
> This looks interesting. cc'ing Rob and Charles who were interested in
> this at Connect.
>
> /Amit
>
> On Thu, Jun 21, 2012 at 3:15 AM, Pantelis Antoniou
>  wrote:
> > Many current interesting systems have no ability to simulate the upcoming
> > bigLITTLE machines, since their cores have to be clocked at the same speeds.
> >
> > Using this driver it is possible to simulate a bigLITTLE system by means
> > of a standard (virtual) cpufreq driver.
> >
> > By using a timer per core & irq affinity it is possible to do something
> > like this:
> >
> >$ cpucycle cpu0
> >90403235
> >$ cpucycle cpu1
> >89810456
> >$ cd /sys/devices/system/cpu/cpu0/cpufreq
> >$ cat scaling_available_frequencies
> >233325 466651 699977
> >$ echo 466651 > scaling_setspeed
> >$ cpucycle cpu0
> >58936083
> >
> > Note that the ratios are about the same so it is somewhat accurate.
> >451  /  699977 =~ 0.666
> >58936083 / 90403235 =~ 0.652
> >
> > The available tunables available as module parameters are:
> >
> > freq:
> >Normal maximum CPU frequency in kHz
> >When 0, then the platform glue layer should probe for it.
> >default 0
> >
> > hogtime:
> >Amount of time in usecs that the timer interrupt handler will hog
> >the CPU. Note this is time spend spinning in an IRQ handler, so
> >it should be as low as possible. A higher value result in more
> >accurate simulation.
> >Default 100
> >
> > latency:
> >Simulated latency in usecs of cpu freq change.
> >Default 500
> >
> > splits:
> >Number of splits in the frequency value. For example when freq is
> >100 and splits is 2 then two frequency OPPs will be generated,
> >one in 50 and one in 100.
> >
> > Only one glue layer for omap2plus is provided, but it should be trivial to
> > add more for other platforms.
> > ---
> >  drivers/cpufreq/Kconfig |   26 
> >  drivers/cpufreq/Makefile|5 +
> >  drivers/cpufreq/vcpufreq-omap.c |  251
> +++
> >  drivers/cpufreq/vcpufreq.c  |  216 +
> >  drivers/cpufreq/vcpufreq.h  |   25 
> >  5 files changed, 523 insertions(+), 0 deletions(-)
> >  create mode 100644 drivers/cpufreq/vcpufreq-omap.c
> >  create mode 100644 drivers/cpufreq/vcpufreq.c
> >  create mode 100644 drivers/cpufreq/vcpufreq.h
> >
> > diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
> > index e24a2a1..1fef0ad 100644
> > --- a/drivers/cpufreq/Kconfig
> > +++ b/drivers/cpufreq/Kconfig
> > @@ -194,5 +194,31 @@ depends on PPC32 || PPC64
> >  source "drivers/cpufreq/Kconfig.powerpc"
> >  endmenu
> >
> > +config VCPUFREQ
> > +   bool "Virtual CPU freq driver"
> > +   depends on CPU_FREQ
> > +   select CPU_FREQ_TABLE
> > +   help
> > + This driver implements a cycle-soaker cpufreq driver.
> > +
> > + To compile this driver as a module, choose M here: the
> > + module will be called vcpufreq.
> > +
> > + If in doubt, say N.
> > +
> > +if VCPUFREQ
> > +
> > +choice
> > +   prompt "VCPUFREQ Platform glue Layer"
> > +
> > +config VCPUFREQ_OMAP2PLUS
> > +   bool "OMAP VCPUFREQ driver"
> > +   depends on ARCH_OMAP2PLUS
> > +
> > +endchoice
> > +
> > +endif
> > +
> >  endif
> > +
> >  endmenu
> > diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> > index 9531fc2..97d3011 100644
> > --- a/drivers/cpufreq/Makefile
> > +++ b/drivers/cpufreq/Makefile
> > @@ -52,3 +52,8 @@ obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
> >
>  #
> #
> >  # PowerPC platform drivers
> >  obj-$(CONFIG_CPU_FREQ_MAPLE)   += maple-cpufreq.o
> > +
> >
> +#
> #
> > +# Virtual driver
> > +obj-$(CONFIG_VCPUFREQ) += vcpufreq.o
> > +obj-$(CONFIG_VCPUFREQ_OMAP2PLUS)   += vcpufreq-omap.o
> > diff --git a/drivers/cpufreq/vcpufreq-omap.c b/drivers/cpufreq/vcpufreq-
> omap.c
> > new file mode 100644
> > index 000..fd789c4
> > --- /dev/null
> > +++ b/drivers/cpufreq/vcpufreq-omap.c
> > @@ -0,0 +1,251 @@
> > +/*
> > + * Copyright 2012 Pantelis Antoniou 
>

[PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Robert Lee]

Add imx6q cpu thermal management driver using the new cpu cooling
interface which limits system performance via cpufreq to reduce
the cpu temperature.  Temperature readings are taken using
the imx6q temperature sensor and this functionality was added
as part of this cpu thermal management driver.

Signed-off-by: Robert Lee 
---
 arch/arm/boot/dts/imx6q.dtsi|5 +
 drivers/thermal/Kconfig |   28 ++
 drivers/thermal/Makefile|1 +
 drivers/thermal/imx6q_thermal.c |  593 +++
 4 files changed, 627 insertions(+)
 create mode 100644 drivers/thermal/imx6q_thermal.c

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 8c90cba..2650f65 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -442,6 +442,10 @@
anatop-min-voltage = <725000>;
anatop-max-voltage = <145>;
};
+
+   thermal {
+   compatible ="fsl,anatop-thermal";
+   };
};
 
usbphy@020c9000 { /* USBPHY1 */
@@ -659,6 +663,7 @@
};
 
ocotp@021bc000 {
+   compatible = "fsl,imx6q-ocotp";
reg = <0x021bc000 0x4000>;
};
 
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 04c6796..b80c408 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -30,6 +30,34 @@ config CPU_THERMAL
  and not the ACPI interface.
  If you want this support, you should say Y or M here.
 
+config IMX6Q_THERMAL
+   bool "IMX6Q Thermal interface support"
+   depends on MFD_ANATOP && CPU_THERMAL
+   help
+ Adds thermal management for IMX6Q.
+
+config IMX6Q_THERMAL_FAKE_CALIBRATION
+   bool "IMX6Q fake temperature sensor calibration (FOR TESTING ONLY)"
+   depends on IMX6Q_THERMAL
+   help
+ This enables a fake temp sensor calibration value for parts without
+ the correction calibration values burned into OCOTP. If the part
+ already has the calibrated values burned into OCOTP, enabling this
+ does nothing.
+ WARNING: Use of this feature is for testing only as it will cause
+ incorrect temperature readings which will result in incorrect system
+ thermal limiting behavior such as premature system performance
+ limiting or lack of proper performance reduction to reduce cpu
+ temperature
+
+config IMX6Q_THERMAL_FAKE_CAL_VAL
+   hex "IMX6Q fake temperature sensor calibration value"
+   depends on IMX6Q_THERMAL_FAKE_CALIBRATION
+   default 0x5704c67d
+   help
+ Refer to the temperature sensor section of the imx6q reference manual
+ for more inforation on how this value is used.
+
 config SPEAR_THERMAL
bool "SPEAr thermal sensor driver"
depends on THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 4636e35..fc4004e 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_THERMAL)   += thermal_sys.o
 obj-$(CONFIG_CPU_THERMAL)   += cpu_cooling.o
 obj-$(CONFIG_SPEAR_THERMAL)+= spear_thermal.o
 obj-$(CONFIG_EXYNOS_THERMAL)   += exynos_thermal.o
+obj-$(CONFIG_IMX6Q_THERMAL)+= imx6q_thermal.o
diff --git a/drivers/thermal/imx6q_thermal.c b/drivers/thermal/imx6q_thermal.c
new file mode 100644
index 000..255d646
--- /dev/null
+++ b/drivers/thermal/imx6q_thermal.c
@@ -0,0 +1,593 @@
+/*
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/* i.MX6Q Thermal Implementation */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* register define of anatop */
+#define HW_ANADIG_ANA_MISC00x0150
+#define HW_ANADIG_ANA_MISC0_SET0x0154
+#define HW_ANADIG_ANA_MISC0_CLR0x0158
+#define HW_ANADIG_ANA_MISC0_TOG0x015c
+#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF  0x0008
+
+#define HW_ANADIG_TEMPSENSE0   0x0180
+#define HW_ANADIG_TEMPSENSE0_SET   0x0184
+#define HW_ANADIG_TEMPSENSE0_CLR   0x0188
+#define HW_ANADIG_TEMPSENSE0_TOG   0x018c
+
+#define BP_ANADIG_TEMPSENSE0_TEMP_VALUE 

[PATCH v5] ARM: imx: Add basic imx6q cpu thermal management

[Robert Lee]

Based on v3.5-rc3 plus recently submmited cpu_cooling functionality here:

http://www.spinics.net/lists/kernel/msg1340221.html

I am told this cpu cooling patch has been accepted and exists in len brown's
next branch.

link to previous submissions:
v4: http://comments.gmane.org/gmane.linux.acpi.devel/51779
v3: http://www.spinics.net/lists/arm-kernel/msg155955.html
v2: http://www.spinics.net/lists/arm-kernel/msg155790.html
v1: http://www.spinics.net/lists/arm-kernel/msg155111.html

Changes in v5:
1. Modified to use anatop mfd driver for accessing anatop registers
2. Made necessary changes to work with latest generic CPU cooling code.
3. Added Config changes and functionality to allow testing on parts without
 without programmed temperature sensor calibration values.
4. General cleanup and addition of comments.

Changes in v4:
1.  Removed bad suspend/resume assignment into thermal class.  After further
examination and discussion with SoC designers, a sequence is now used
for making measurements that is is unaffected by system suspendresumes.
Temp Sensor automatically powers off in hardware during the low power mode
caused by a system suspend.
2.  Moved some structures from static to dynamic allocation.
3.  Added some noise handling to temperatuer sensor readings.

Changes in v3:
1. Fixed the various issues pointed out in v2
2. Made other code cleanup and a bit of re-organizing
3. Removed unecessary platform driver and device.

Changes in v2:
1. Cleaned up some style issues pointed out in v1
2. Made various other code cleanup and re-organizing
3. Added temperature sensor calibration
4. Created platform driver and device to hook into pm suspend.


Performed some basic testing to ensure proper cooling operating.  If
you want to test this, full testing requires imx6q cpufreq
implementation (not yet in v3.5).

Robert Lee (1):
  ARM: imx: Add basic imx6q cpu thermal management

 arch/arm/boot/dts/imx6q.dtsi|5 +
 drivers/thermal/Kconfig |   28 ++
 drivers/thermal/Makefile|1 +
 drivers/thermal/imx6q_thermal.c |  593 +++
 4 files changed, 627 insertions(+)
 create mode 100644 drivers/thermal/imx6q_thermal.c

-- 
1.7.10


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