date:20071112

Patric Karlsson wrote:
 Tejun Heo wrote:
 It seems those 3Gbps promise controllers have hard time getting out of
 transmission errors.  Is it because hardreset doesn't work?  Can we
 fix it?

 Also, if 3Gbps can't be made reliable on those controllers, how about
 limiting it to 1.5Gbps by default with appropriate warning messages?
 Without PMP, it's not like we're gonna earn anything by driving the
 thing at 3Gbps.
 
 I thought this was supposed to be fixed in 2.6.24-RC2 ?

Ah good news.

 Although I'm currently running a TX4 myself in 3Gbit mode with 2.6.23.1,
  I'm waiting for 2.6.24 to reach stable until I try it out myself.
 2.6.23.1 seemed to fix the hard-lock when it tried to reset the card
 tho, so now I just get a few errors about soft resetting in the logs.
 No data loss.

That's great too.

I Stratford, can you please give 2.6.24-rc2 a shot?

Thanks.

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[PATCH] ata_piix: add SATELLITE U205 to broken suspend list

Satellite U205 has alternate product name where the satellite part is
all capatalized.  Add it to the blacklist.

This is reported by Ross Patterson in kernel bugzilla bug #7780.

Signed-off-by: Tejun Heo [EMAIL PROTECTED]
Cc: Ross Patterson [EMAIL PROTECTED]
---
This patch has been queued in #tj-upstream-fixes and will be merged
into 2.6.24.

 drivers/ata/ata_piix.c |7 +++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 328ce8a..80b735b 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -974,6 +974,13 @@ static int piix_broken_suspend(void)
},
},
{
+   .ident = SATELLITE U205,
+   .matches = {
+   DMI_MATCH(DMI_SYS_VENDOR, TOSHIBA),
+   DMI_MATCH(DMI_PRODUCT_NAME, SATELLITE U205),
+   },
+   },
+   {
.ident = Portege M500,
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, TOSHIBA),
-- 
1.5.2.4

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possibly a dumb question about sb600/700

Hello,

I've been looking at PATA support for sb600 and 700 and found something
weird.

* IDE atiixp.c has a separate entry for sb600 such that it only probes
the first port but sb700 doesn't use the entry.  So, does sb600 has one
PATA channel but sb700 has two?

* libata pata_atiixp.c doesn't have special handling for sb600's
single-channeldness.  Is this okay?

Thanks.

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Re: Promise SATA TX4 300 port timeout with sata_promise in 2.6.22, kernel panic in 2.6.23

2007-11-12 Thread Mikael Pettersson

On Mon, 12 Nov 2007 13:12:19 +0900, Tejun Heo wrote:
I Stratford wrote:
 The purpose of the mail is to document and share my experience in the
 hope that someone might find it useful, either for debugging their own
 TX4 300-centric system issues or figuring out what is up with
 sata_promise and the TX4 300 in 3Gbps mode. I also wish to offer my
 somewhat unique promise-based system as a test environment for either
 the timeout or kernel panic issues. I obviously have some basic need
 for data integrity of the RAID5, but this system is not in production
 and is therefore more available for testing purposes than the average
 machine with 22 Promise SATA ports..  :)

[cc'ing Mikael Pettersson]

It seems those 3Gbps promise controllers have hard time getting out of
transmission errors.  Is it because hardreset doesn't work?  Can we fix it?

Also, if 3Gbps can't be made reliable on those controllers, how about
limiting it to 1.5Gbps by default with appropriate warning messages?
Without PMP, it's not like we're gonna earn anything by driving the
thing at 3Gbps.

There are two things going on here:

First, a workaround for a HW erratum affecting 2nd-generation
chips like the SATA300 TX4 was included in kernel 2.6.24-rc2.
Outstanding bug reports for 2nd-generation chips in older kernels
are not unlikely to be related to this erratum, so we should not
butcher the driver because of issues reported against old kernels.

Secondly, Stratford's system is seriously overloaded:
- a desktop mainboard
- worked with 6 mainboard and 8 Promise 150 TX4 ports
- problems began when two Promise 300 TX4 cards and
  more disks were added
On several occasions we've traced people's problems to
overtaxed system components (cooling, PSU, PCI busses).
OTOH, it may be that Stratford's problem is directly related
to the HW erratum, in which case 2.6.24-rc2 should solve it.

/Mikael
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Re: 2.6.24-rc SB600 AHCI no go on =4GB of RAM

2007-11-12 Thread Srihari Vijayaraghavan

 Tejun Heo [EMAIL PROTECTED] wrote:
[...]
 Hmmm.. weird.  The workaround is still there.  Please post boot log.

OK, that's good to hear. Alas, after the Fedora 7 to 8 upgrade, I'm no longer
able to compile a kernel (some uhci-hcd module not found for the initrd). And
I was too quick to overwrite the problematic kernel.

Anyway, once I get the kernel compiled, I'll post the boot log. Sorry for the
trouble.

Thanks

Hari



  Feel safe with award winning spam protection on Yahoo!7 Mail.  
www.yahoo.com.au/mail 

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Re: Promise SATA TX4 300 port timeout with sata_promise in 2.6.22, kernel panic in 2.6.23

Hello,

Mikael Pettersson wrote:
 Also, if 3Gbps can't be made reliable on those controllers, how about
 limiting it to 1.5Gbps by default with appropriate warning messages?
 Without PMP, it's not like we're gonna earn anything by driving the
 thing at 3Gbps.
 
 There are two things going on here:
 
 First, a workaround for a HW erratum affecting 2nd-generation
 chips like the SATA300 TX4 was included in kernel 2.6.24-rc2.
 Outstanding bug reports for 2nd-generation chips in older kernels
 are not unlikely to be related to this erratum, so we should not
 butcher the driver because of issues reported against old kernels.

Alright, if it's fixable, no problem.  I just wanted to remind that
running the link at 3Gbps isn't worth if it continues to cause problems.

 Secondly, Stratford's system is seriously overloaded:
 - a desktop mainboard
 - worked with 6 mainboard and 8 Promise 150 TX4 ports
 - problems began when two Promise 300 TX4 cards and
   more disks were added
 On several occasions we've traced people's problems to
 overtaxed system components (cooling, PSU, PCI busses).

Agreed, I've seen my share of those issues.  Especially, SATA links seem
very dependent on power quality and very weird things happen when the
power isn't good enough.  Easy way to debug this is connect half of the
drives to a separate PSU and see what happens.

Thanks.

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Re: possibly a dumb question about sb600/700

2007-11-12 Thread Alan Cox

On Mon, 12 Nov 2007 18:05:44 +0900
Tejun Heo [EMAIL PROTECTED] wrote:

 Hello,
 
 I've been looking at PATA support for sb600 and 700 and found something
 weird.
 
 * IDE atiixp.c has a separate entry for sb600 such that it only probes
 the first port but sb700 doesn't use the entry.  So, does sb600 has one
 PATA channel but sb700 has two?
 
 * libata pata_atiixp.c doesn't have special handling for sb600's
 single-channeldness.  Is this okay?

Should be just fine as I understand it all anyway - the second channel
will have no resources assigned if absent which is handled by libata core
already.

Alan
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Re: possibly a dumb question about sb600/700

Alan Cox wrote:
 On Mon, 12 Nov 2007 18:05:44 +0900
 Tejun Heo [EMAIL PROTECTED] wrote:
 
 Hello,

 I've been looking at PATA support for sb600 and 700 and found something
 weird.

 * IDE atiixp.c has a separate entry for sb600 such that it only probes
 the first port but sb700 doesn't use the entry.  So, does sb600 has one
 PATA channel but sb700 has two?

 * libata pata_atiixp.c doesn't have special handling for sb600's
 single-channeldness.  Is this okay?
 
 Should be just fine as I understand it all anyway - the second channel
 will have no resources assigned if absent which is handled by libata core
 already.

Alright, then.  I was just worried about the asymmetry.  Oh, this
_reminds me of another problem regarding enable bits.  There's a system
(wyse thin client) with pata_amd controller where the enable bit isn't
set by the BIOS and there's no reliable way to identify the system (no
DMI).  Do you know how important is the enabled bits test for these
controllers?

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Re: question about sata-error on boot.

(cc Robert Hancock, maybe we need ATA_LFLAG_HRST_TO_RESUME for these
controllers?)
Andrew Morton wrote:
 On Fri, 2 Nov 2007 19:34:20 +0100 Hemmann, Volker Armin [EMAIL 
 PROTECTED] wrote:
 Hi,
 
 (cc linux-ide)
 
 for some time (and I can't say for how long, but the board is less than a
 month old) I get this error on boot:

 [   42.116273] ahci :00:0a.0: version 2.2
 [   42.116482] ACPI: PCI Interrupt Link [LSA0] enabled at IRQ 23
 [   42.116653] ACPI: PCI Interrupt :00:0a.0[A] - Link [LSA0] - GSI 23 
 (level, low) - IRQ 23
 [   43.119478] ahci :00:0a.0: AHCI 0001.0100 32 slots 4 ports 3 Gbps 0xf 
 impl IDE mode
 [   43.119778] ahci :00:0a.0: flags: 64bit led clo pmp pio
 [   43.119943] PCI: Setting latency timer of device :00:0a.0 to 64
 [   43.120149] scsi0 : ahci
 [   43.120365] scsi1 : ahci
 [   43.120556] scsi2 : ahci
 [   43.120741] scsi3 : ahci
 [   43.120927] ata1: SATA max UDMA/133 cmd 0xc2014100 ctl 
 0x bmdma 0x irq 315
 [   43.121227] ata2: SATA max UDMA/133 cmd 0xc2014180 ctl 
 0x bmdma 0x irq 315
 [   43.121526] ata3: SATA max UDMA/133 cmd 0xc2014200 ctl 
 0x bmdma 0x irq 315
 [   43.121826] ata4: SATA max UDMA/133 cmd 0xc2014280 ctl 
 0x bmdma 0x irq 315
 [   43.934296] ata1: softreset failed (1st FIS failed)
 [   43.934461] ata1: reset failed (errno=-5), retrying in 10 secs
 [   53.885194] ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
 [   53.885890] ata1.00: ATA-7: WDC WD1600JS-00MHB1, 10.02E01, max UDMA/133
 [   53.886056] ata1.00: 312581808 sectors, multi 16: LBA48
 [   53.886804] ata1.00: configured for UDMA/133
 [   54.201147] ata2: SATA link down (SStatus 0 SControl 300)
 [   54.517101] ata3: SATA link down (SStatus 0 SControl 300)
 [   54.833055] ata4: SATA link down (SStatus 0 SControl 300)

 The board has four ports and I use the first one. After that, the computer 
 boots and works fine. Harddisk-speed is normal. Kernel is 2.6.22.9 with 
 cfsreiser4 patches.

 Is this something to worry about?

 Following is lspci -v and dmesg, config is attached. 
 lspci -v
 00:00.0 RAM memory: nVidia Corporation MCP65 Memory Controller (rev a1)
 Subsystem: ASRock Incorporation Unknown device 0444
 Flags: bus master, 66MHz, fast devsel, latency 0
 Capabilities: [44] HyperTransport: Slave or Primary Interface
 Capabilities: [dc] HyperTransport: MSI Mapping Enable+ Fixed-

 00:01.0 ISA bridge: nVidia Corporation MCP65 LPC Bridge (rev a2)
 Subsystem: ASRock Incorporation Unknown device 0441
 Flags: bus master, 66MHz, fast devsel, latency 0
 I/O ports at 2f00 [size=256]

 00:01.1 SMBus: nVidia Corporation MCP65 SMBus (rev a1)
 Subsystem: ASRock Incorporation Unknown device 0446
 Flags: 66MHz, fast devsel, IRQ 11
 I/O ports at ac00 [size=64]
 I/O ports at 2d00 [size=64]
 I/O ports at 2e00 [size=64]
 Capabilities: [44] Power Management version 2

 00:01.2 RAM memory: nVidia Corporation MCP65 Memory Controller (rev a1)
 Subsystem: ASRock Incorporation Unknown device 0446
 Flags: 66MHz, fast devsel

 00:02.0 USB Controller: nVidia Corporation MCP65 USB Controller (rev a1) 
 (prog-if 10 [OHCI])
 Subsystem: ASRock Incorporation Unknown device 0454
 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 21
 Memory at f9dff000 (32-bit, non-prefetchable) [size=4K]
 Capabilities: [44] Power Management version 2

 00:02.1 USB Controller: nVidia Corporation MCP65 USB Controller (rev a1) 
 (prog-if 20 [EHCI])
 Subsystem: ASRock Incorporation Unknown device 0455
 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 22
 Memory at f9dfec00 (32-bit, non-prefetchable) [size=256]
 Capabilities: [44] Debug port
 Capabilities: [80] Power Management version 2

 00:08.0 PCI bridge: nVidia Corporation MCP65 PCI bridge (rev a1) (prog-if 01 
 [Subtractive decode])
 Flags: bus master, 66MHz, fast devsel, latency 0
 Bus: primary=00, secondary=02, subordinate=02, sec-latency=128
 I/O behind bridge: c000-dfff
 Memory behind bridge: f9f0-f9ff
 Prefetchable memory behind bridge: 8800-880f
 Capabilities: [b8] Subsystem: ASRock Incorporation Unknown device 
 0449
 Capabilities: [8c] HyperTransport: MSI Mapping Enable- Fixed-

 00:09.0 IDE interface: nVidia Corporation MCP65 IDE (rev a1) (prog-if 8a 
 [Master SecP PriP])
 Subsystem: ASRock Incorporation Unknown device 0448
 Flags: bus master, 66MHz, fast devsel, latency 0
 [virtual] Memory at 01f0 (32-bit, non-prefetchable) [disabled] 
 [size=8]
 [virtual] Memory at 03f0 (type 3, non-prefetchable) [disabled] 
 [size=1]
 [virtual] Memory at 0170 (32-bit, non-prefetchable)

Re: possibly a dumb question about sb600/700

2007-11-12 Thread Alan Cox

 Alright, then.  I was just worried about the asymmetry.  Oh, this
 _reminds me of another problem regarding enable bits.  There's a system
 (wyse thin client) with pata_amd controller where the enable bit isn't
 set by the BIOS and there's no reliable way to identify the system (no
 DMI).  Do you know how important is the enabled bits test for these
 controllers?

If we ignore the tests we get more problems with 30 second timeouts on
other hardware that has incorrect termination or a port which is simply
not wired on the mainboard.

I bet we can identify the Wyse somehow and I'd rather do that even if it
means looking for magic strings in the BIOS ROM image.

Alan
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Re: possibly a dumb question about sb600/700

Alan Cox wrote:
 Alright, then.  I was just worried about the asymmetry.  Oh, this
 _reminds me of another problem regarding enable bits.  There's a system
 (wyse thin client) with pata_amd controller where the enable bit isn't
 set by the BIOS and there's no reliable way to identify the system (no
 DMI).  Do you know how important is the enabled bits test for these
 controllers?
 
 If we ignore the tests we get more problems with 30 second timeouts on
 other hardware that has incorrect termination or a port which is simply
 not wired on the mainboard.
 
 I bet we can identify the Wyse somehow and I'd rather do that even if it
 means looking for magic strings in the BIOS ROM image.

Thanks.  I don't have direct access to the machine so I guess they'll
have to live with temporary workaround for the time being.  :-(

-- 
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Re: Hang during boot in piix_init_pcs (ata_piix.c) with macbook pro

[cc'ing Jason]
Hello, Thomas.

Thomas Rohwer wrote:
 My next try would be to put in a custom version ich8_map_db with
 port_enable=1
 (and possibly {P0, P2, NA, NA} in the first line of .map) and use this map
 for pci id 8086:2828, because I think the notebook has only one sata
 port anyway.
 Is this the correct way to approach the matter?

Yes, adding a separate entry for ich8m is the correct approach w/
port_enable=1 seems like the correct approach.  Does it fix the problem?

 Please carbon copy me when answering, as I am not subscribed to the list.

That's what people always do on any linux kernel mailing list.  you
don't need to ask for it.

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Re: possibly a dumb question about sb600/700

2007-11-12 Thread Alan Cox

On Mon, 12 Nov 2007 23:44:30 +0900
Tejun Heo [EMAIL PROTECTED] wrote:

 Alan Cox wrote:
  Alright, then.  I was just worried about the asymmetry.  Oh, this
  _reminds me of another problem regarding enable bits.  There's a system
  (wyse thin client) with pata_amd controller where the enable bit isn't
  set by the BIOS and there's no reliable way to identify the system (no
  DMI).  Do you know how important is the enabled bits test for these
  controllers?
  
  If we ignore the tests we get more problems with 30 second timeouts on
  other hardware that has incorrect termination or a port which is simply
  not wired on the mainboard.
  
  I bet we can identify the Wyse somehow and I'd rather do that even if it
  means looking for magic strings in the BIOS ROM image.
 
 Thanks.  I don't have direct access to the machine so I guess they'll
 have to live with temporary workaround for the time being.  :-(

cp biosrom file
strings file
grep product name

not approximate offset

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Re: [PATCH 5/9] ide: use -data_phase to set -handler in do_rw_taskfile()

2007-11-12 Thread Sergei Shtylyov


Bartlomiej Zolnierkiewicz wrote:


* Use -data_phase to set -handler in do_rw_taskfile() instead of
  setting -handler in callers of ide_raw_taskfile()/do_rw_taskfile().



* Unexport task_no_data_intr() and make it static.



There should be no functionality changes caused by this patch.



Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]


Acked-by: Sergei Shtylyov [EMAIL PROTECTED]

MBR, Sergei
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Re: [PATCH 8/9] ide-disk: add ide_tf_set_cmd() helper

2007-11-12 Thread Sergei Shtylyov


Bartlomiej Zolnierkiewicz wrote:


* Add ide_tf_set_cmd() helper for selecting/setting command and data phase
  (note: DMA data phases are there for completness, they are not required ATM).



* Set IDE_TFLAG_WRITE taskfile flag for write requests in __ide_do_rw_disk().



* Convert __ide_do_rw_disk() to use the new ide_tf_set_cmd() helper.



There should be no functionality changes caused by this patch.



Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]


Acked-by: Sergei Shtylyov [EMAIL PROTECTED]

MBR, Sergei
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libata , Silicon Image 3124

2007-11-12 Thread Kasimir Müller

Hi tejun,

Since I am using portmultiplier on sil 3124, I see the following errors
in /var/log/messages
Presently I'm using kernel 2.6.23.1 with libata-patch
libata-tj-2.6.23-20071011
on Suse 10.3
First I saw this messages every 5-10 minutes.
After putting all Disks in the Blacklist of libata-core.c
 
{ SAMSUNG HD501LJ,CR100-10, ATA_HORKAGE_NONCQ, },
{ SAMSUNG HD300LJ,ZT100-12, ATA_HORKAGE_NONCQ, },
{ SAMSUNG SP2504C,ZT100-41, ATA_HORKAGE_NONCQ, },
{ SAMSUNG HD160JJ,WU100-33, ATA_HORKAGE_NONCQ, },

this messages appear every 3-4 hours.

I append the output of dmesg also.
I did not see any data loss or corruption until now.

Can you please give any hints on the errors ?

mfg
K. Müller
/var/log/messages:

Nov 12 19:28:42 linux kernel: ata6.00: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.01: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.02: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.03: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.04: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.05: failed to read SCR 1 (Emask=0x40)
Nov 12 19:28:42 linux kernel: ata6.00: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.01: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.02: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.02: cmd
ea/00:00:00:00:00/00:00:00:00:00/a0 tag 0 cdb 0x0 data 0
Nov 12 19:28:42 linux kernel:  res
40/00:00:09:4f:c2/00:00:00:00:00/00 Emask 0x4 (timeout)
Nov 12 19:28:42 linux kernel: ata6.02: status: { DRDY }
Nov 12 19:28:42 linux kernel: ata6.03: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.04: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.05: exception Emask 0x100 SAct 0x0
SErr 0x0 action 0x6 frozen
Nov 12 19:28:42 linux kernel: ata6.15: hard resetting link
Nov 12 19:28:44 linux kernel: ata6.15: SATA link up 3.0 Gbps (SStatus
123 SControl 0)
Nov 12 19:28:44 linux kernel: ata6.00: hard resetting link
Nov 12 19:28:45 linux kernel: ata6.00: SATA link up 3.0 Gbps (SStatus
123 SControl 300)
Nov 12 19:28:45 linux kernel: ata6.01: hard resetting link
Nov 12 19:28:45 linux kernel: ata6.01: SATA link up 3.0 Gbps (SStatus
123 SControl 300)
Nov 12 19:28:45 linux kernel: ata6.02: hard resetting link
Nov 12 19:28:45 linux kernel: ata6.02: SATA link up 3.0 Gbps (SStatus
123 SControl 300)
Nov 12 19:28:45 linux kernel: ata6.03: hard resetting link
Nov 12 19:28:46 linux kernel: ata6.03: SATA link up 1.5 Gbps (SStatus
113 SControl 300)
Nov 12 19:28:46 linux kernel: ata6.04: hard resetting link
Nov 12 19:28:46 linux kernel: ata6.04: SATA link up 3.0 Gbps (SStatus
123 SControl 300)
Nov 12 19:28:46 linux kernel: ata6.05: hard resetting link
Nov 12 19:28:46 linux kernel: ata6.05: SATA link up 1.5 Gbps (SStatus
113 SControl 300)
Nov 12 19:28:46 linux kernel: ata6.00: configured for UDMA/100
Nov 12 19:28:46 linux kernel: ata6.01: configured for UDMA/100
Nov 12 19:28:46 linux kernel: ata6.02: configured for UDMA/100
Nov 12 19:28:46 linux kernel: ata6.03: configured for UDMA/100
Nov 12 19:28:47 linux kernel: ata6.04: configured for UDMA/100
Nov 12 19:28:47 linux kernel: ata6: EH complete
Nov 12 19:28:47 linux kernel: sd 5:0:0:0: [sdb] 586072368 512-byte
hardware sectors (300069 MB)
Nov 12 19:28:47 linux kernel: sd 5:0:0:0: [sdb] Write Protect is off
Nov 12 19:28:47 linux kernel: sd 5:0:0:0: [sdb] Mode Sense: 00 3a 00 00
Nov 12 19:28:47 linux kernel: sd 5:0:0:0: [sdb] Write cache: enabled,
read cache: enabled, doesn't support DPO or FUA
Nov 12 19:28:47 linux kernel: sd 5:1:0:0: [sdc] 488397168 512-byte
hardware sectors (250059 MB)
Nov 12 19:28:47 linux kernel: sd 5:1:0:0: [sdc] Write Protect is off
Nov 12 19:28:47 linux kernel: sd 5:1:0:0: [sdc] Mode Sense: 00 3a 00 00
Nov 12 19:28:47 linux kernel: sd 5:1:0:0: [sdc] Write cache: enabled,
read cache: enabled, doesn't support DPO or FUA
Nov 12 19:28:47 linux kernel: sd 5:2:0:0: [sdd] 488397168 512-byte
hardware sectors (250059 MB)
Nov 12 19:28:47 linux kernel: sd 5:2:0:0: [sdd] Write Protect is off
Nov 12 19:28:47 linux kernel: sd 5:2:0:0: [sdd] Mode Sense: 00 3a 00 00
Nov 12 19:28:47 linux kernel: sd 5:2:0:0: [sdd] Write cache: enabled,
read cache: enabled, doesn't support DPO or FUA
Nov 12 19:28:47 linux kernel: sd 5:3:0:0: [sde] 312581808 512-byte
hardware sectors (160042 MB)
Nov 12 19:28:47 linux kernel: sd 5:3:0:0: [sde] Write Protect is off
Nov 12 19:28:47 linux kernel: sd 5:3:0:0: [sde] Mode Sense: 00 3a 00 00
Nov 12 19:28:47 linux kernel: sd 5:3:0:0: [sde] Write cache: enabled,
read cache: enabled, doesn't support DPO or FUA
Nov 12 19:28:47 linux kernel: sd 5:4:0:0: [sdf] 976773168 512-byte
hardware sectors (500108 MB)
Nov 12 19:28:47 linux kernel: sd

Delkin Cardbus IDE, a.k.a. ASKA Ninja chipset


Mark Lord wrote:

Alan Cox wrote:

On Wed, 07 Nov 2007 17:37:07 -0500
Mark Lord [EMAIL PROTECTED] wrote:


delkin_cb is also missing from libata.

I was going to port it over once, but no longer have a cardbus slot
in either of my notebooks here.


Yes I looked at it but it didn't have any proper speed setting, so I
decided it wasn't actually worth doing.

..

Yeah.  No docs whatsoever, but there's more than a few users
of it out there.

...

Mmmm.. the NetBSD people seem to have detailed information on these chips!
There seems to be more than enough information in the NetBSD sources
to implement full timings support and full bus-master DMA support:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32var.h?rev=1.3content-type=text/x-cvsweb-markup
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32reg.h?rev=1.3content-type=text/x-cvsweb-markup
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32.c?rev=1.9content-type=text/x-cvsweb-markup


Anyone want to take this on?

Cheers
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Re: Delkin Cardbus IDE, a.k.a. ASKA Ninja chipset


Mark Lord wrote:

Mark Lord wrote:

Alan Cox wrote:

On Wed, 07 Nov 2007 17:37:07 -0500
Mark Lord [EMAIL PROTECTED] wrote:


delkin_cb is also missing from libata.

I was going to port it over once, but no longer have a cardbus slot
in either of my notebooks here.


Yes I looked at it but it didn't have any proper speed setting, so I
decided it wasn't actually worth doing.

..

Yeah.  No docs whatsoever, but there's more than a few users
of it out there.

...

Mmmm.. the NetBSD people seem to have detailed information on these chips!
There seems to be more than enough information in the NetBSD sources
to implement full timings support and full bus-master DMA support:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32var.h?rev=1.3content-type=text/x-cvsweb-markup 

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32reg.h?rev=1.3content-type=text/x-cvsweb-markup 

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32.c?rev=1.9content-type=text/x-cvsweb-markup 

..

Plus the man page (which looks slightly out of date):

http://netbsd.gw.com/cgi-bin/man-cgi/man?njata+4+NetBSD-current

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Re: Delkin Cardbus IDE, a.k.a. ASKA Ninja chipset


Mark Lord wrote:

Mark Lord wrote:

Mark Lord wrote:

Alan Cox wrote:

On Wed, 07 Nov 2007 17:37:07 -0500
Mark Lord [EMAIL PROTECTED] wrote:


delkin_cb is also missing from libata.

I was going to port it over once, but no longer have a cardbus slot
in either of my notebooks here.


Yes I looked at it but it didn't have any proper speed setting, so I
decided it wasn't actually worth doing.

..

Yeah.  No docs whatsoever, but there's more than a few users
of it out there.

...

Mmmm.. the NetBSD people seem to have detailed information on these 
chips!

There seems to be more than enough information in the NetBSD sources
to implement full timings support and full bus-master DMA support:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32var.h?rev=1.3content-type=text/x-cvsweb-markup 

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32reg.h?rev=1.3content-type=text/x-cvsweb-markup 

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32.c?rev=1.9content-type=text/x-cvsweb-markup 


Plus the man page (which looks slightly out of date):

http://netbsd.gw.com/cgi-bin/man-cgi/man?njata+4+NetBSD-current

..

One more link, with many PCI IDs for these chips:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/cardbus/njata_cardbus.c?rev=1.5content-type=text/x-cvsweb-markup
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Re: Hang during boot in piix_init_pcs (ata_piix.c) with macbook pro

2007-11-12 Thread Thomas Rohwer


Hello,


Yes, adding a separate entry for ich8m is the correct approach w/
port_enable=1 seems like the correct approach.  Does it fix the problem?


thanks for the information. I tried it now, and at least my hard drive is still
working and the pcs is not updated anymore. I will report after using this 
version
for a few days if it fixes the matter.

Sincerely,

Thomas Rohwer

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Re: Delkin Cardbus IDE, a.k.a. ASKA Ninja chipset

Alan Cox wrote:

On Mon, 12 Nov 2007 15:11:16 -0500
Mark Lord [EMAIL PROTECTED] wrote:

Mark Lord wrote:

Alan Cox wrote:

On Wed, 07 Nov 2007 17:37:07 -0500
Mark Lord [EMAIL PROTECTED] wrote:

delkin_cb is also missing from libata.

I was going to port it over once, but no longer have a cardbus slot
in either of my notebooks here.

Yes I looked at it but it didn't have any proper speed setting, so I
decided it wasn't actually worth doing.

Yeah. No docs whatsoever, but there's more than a few users
of it out there.

...

Mmmm.. the NetBSD people seem to have detailed information on these chips!
There seems to be more than enough information in the NetBSD sources
to implement full timings support and full bus-master DMA support:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32var.h?rev=1.3content-type=text/x-cvsweb-markup
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32reg.h?rev=1.3content-type=text/x-cvsweb-markup
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/ic/ninjaata32.c?rev=1.9content-type=text/x-cvsweb-markup

Anyone want to take this on?

I'll knock a driver out next week providing someone with hardware is
willing to be test monkey.

I've got hardware here that you can have, if you want it.
It's just a cardbus CF adapter, and neither of my own notebooks have slots.

Email me privately with mailing address if you want it.

Cheers
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[PATCH 1/13] serverworks: cleanup -set_dma_mode method


IDE core guarantees that -set_dma_mode will be called only
for DMA modes set in SWDMA/MWDMA/UDMA masks.

There should be no functionality changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/pci/serverworks.c |   25 ++---
 1 file changed, 6 insertions(+), 19 deletions(-)

Index: b/drivers/ide/pci/serverworks.c
===
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -164,25 +164,12 @@ static void svwks_set_dma_mode(ide_drive
ultra_timing= ~(0x0F  (4*unit));
ultra_enable= ~(0x01  drive-dn);
 
-   switch(speed) {
-   case XFER_MW_DMA_2:
-   case XFER_MW_DMA_1:
-   case XFER_MW_DMA_0:
-   dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
-   break;
-
-   case XFER_UDMA_5:
-   case XFER_UDMA_4:
-   case XFER_UDMA_3:
-   case XFER_UDMA_2:
-   case XFER_UDMA_1:
-   case XFER_UDMA_0:
-   dma_timing   |= dma_modes[2];
-   ultra_timing |= ((udma_modes[speed - XFER_UDMA_0])  
(4*unit));
-   ultra_enable |= (0x01  drive-dn);
-   default:
-   break;
-   }
+   if (speed = XFER_UDMA_0) {
+   dma_timing   |= dma_modes[2];
+   ultra_timing |= (udma_modes[speed - XFER_UDMA_0]  (4 * unit));
+   ultra_enable |= (0x01  drive-dn);
+   } else if (speed = XFER_MW_DMA_0)
+   dma_timing   |= dma_modes[speed - XFER_MW_DMA_0];
 
pci_write_config_byte(dev, drive_pci2[drive-dn], dma_timing);
pci_write_config_byte(dev, (0x56|hwif-channel), ultra_timing);
-
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[PATCH 3/13] ide: (hopefully) fix VDMA for CS5520


* Set the correct hwif-dma_base for the second channel in
  ide_get_or_set_dma_base().

* Remove DMA enable code from cs5520_set_pio_mode(), this can
  be handled by the generic -dma_host_on method now.

* Add VDMA check to ide_config_drive_speed().

* drive-using_dma was never enabled since cs5520 host driver's
  -ide_dma_on method overrided the generic -ide_dma_on (so
  __ide_dma_on() was never called, drive-using_dma was never set
  and VDMA was never used since it depends on drive-using_dma).

  Fix it by using -dma_host_on method instead of -ide_dma_on
  (also add matching -dma_host_off method).

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/ide-iops.c   |2 +-
 drivers/ide/pci/cs5520.c |   29 +
 drivers/ide/setup-pci.c  |   10 +++---
 3 files changed, 25 insertions(+), 16 deletions(-)

Index: b/drivers/ide/ide-iops.c
===
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -791,7 +791,7 @@ int ide_config_drive_speed(ide_drive_t *
drive-id-dma_1word = ~0x0F00;
 
 #ifdef CONFIG_BLK_DEV_IDEDMA
-   if (speed = XFER_SW_DMA_0)
+   if (speed = XFER_SW_DMA_0 || (hwif-host_flags  IDE_HFLAG_VDMA))
hwif-dma_host_on(drive);
else if (hwif-ide_dma_on)  /* check if host supports DMA */
hwif-dma_off_quietly(drive);
Index: b/drivers/ide/pci/cs5520.c
===
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -71,7 +71,6 @@ static void cs5520_set_pio_mode(ide_driv
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *pdev = hwif-pci_dev;
int controller = drive-dn  1 ? 1 : 0;
-   u8 reg;
 
/* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
 
@@ -91,11 +90,6 @@ static void cs5520_set_pio_mode(ide_driv
pci_write_config_byte(pdev, 0x66 + 4*controller + (drive-dn1),
(cs5520_pio_clocks[pio].recovery  4) |
(cs5520_pio_clocks[pio].assert));
-   
-   /* Set the DMA enable/disable flag */
-   reg = inb(hwif-dma_base + 0x02 + 8*controller);
-   reg |= 1((drive-dn1)+5);
-   outb(reg, hwif-dma_base + 0x02 + 8*controller);
 }
 
 static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
@@ -109,13 +103,23 @@ static void cs5520_set_dma_mode(ide_driv
  * We wrap the DMA activate to set the vdma flag. This is needed
  * so that the IDE DMA layer issues PIO not DMA commands over the
  * DMA channel
+ *
+ * ATAPI is harder so disable it for now using IDE_HFLAG_NO_ATAPI_DMA
  */
- 
-static int cs5520_dma_on(ide_drive_t *drive)
+
+static void cs5520_dma_host_on(ide_drive_t *drive)
 {
-   /* ATAPI is harder so leave it for now */
-   drive-vdma = 1;
-   return 0;
+   if (drive-using_dma)
+   drive-vdma = 1;
+
+   ide_dma_host_on(drive);
+}
+
+static void cs5520_dma_host_off(ide_drive_t *drive)
+{
+   drive-vdma = 0;
+
+   ide_dma_host_off(drive);
 }
 
 static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
@@ -126,7 +130,8 @@ static void __devinit init_hwif_cs5520(i
if (hwif-dma_base == 0)
return;
 
-   hwif-ide_dma_on = cs5520_dma_on;
+   hwif-dma_host_on  = cs5520_dma_host_on;
+   hwif-dma_host_off = cs5520_dma_host_off;
 }
 
 #define DECLARE_CS_DEV(name_str)   \
Index: b/drivers/ide/setup-pci.c
===
--- a/drivers/ide/setup-pci.c
+++ b/drivers/ide/setup-pci.c
@@ -170,13 +170,17 @@ static unsigned long ide_get_or_set_dma_
 
dma_base = pci_resource_start(dev, baridx);
 
-   if (dma_base == 0)
+   if (dma_base == 0) {
printk(KERN_ERR %s: DMA base is invalid\n, d-name);
+   return 0;
+   }
}
 
-   if ((d-host_flags  IDE_HFLAG_CS5520) == 0  dma_base) {
+   if (hwif-channel)
+   dma_base += 8;
+
+   if ((d-host_flags  IDE_HFLAG_CS5520) == 0) {
u8 simplex_stat = 0;
-   dma_base += hwif-channel ? 8 : 0;
 
switch(dev-device) {
case PCI_DEVICE_ID_AL_M5219:
-
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[PATCH 4/13] cy82c693: correct DMA modes clipping


* Mask device DMA masks by ATA_{S,M}WDMA2 in cy82c693_ide_dma_on().

* Remove clipping of DMA modes by id-tDMA in cy82c693_dma_enable():
  - id-tDMA may not be defined on newer devices
  - id-vendor6/id-tDMA word is in LE endianness
(cy82c693 seems to be Alpha specific though)

* Bump driver version.

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/pci/cy82c693.c |   12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

Index: b/drivers/ide/pci/cy82c693.c
===
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -1,5 +1,5 @@
 /*
- * linux/drivers/ide/pci/cy82c693.cVersion 0.42Oct 23, 2007
+ * linux/drivers/ide/pci/cy82c693.cVersion 0.43Nov 7, 2007
  *
  *  Copyright (C) 1998-2000 Andreas S. Krebs ([EMAIL PROTECTED]), Maintainer
  *  Copyright (C) 1998-2002 Andre Hedrick [EMAIL PROTECTED], Integrator
@@ -182,10 +182,7 @@ static void cy82c693_dma_enable (ide_dri
 
if (mode2) /* make sure we set a valid mode */
mode = 2;
-  
-   if (mode  drive-id-tDMA)  /* to be absolutly sure we have a valid 
mode */
-   mode = drive-id-tDMA;
-   
+
index = (HWIF(drive)-channel==0) ? CY82_INDEX_CHANNEL0 : 
CY82_INDEX_CHANNEL1;
 
 #if CY82C693_DEBUG_LOGS
@@ -250,7 +247,10 @@ static int cy82c693_ide_dma_on (ide_driv
 
mmode = id-dma_mword  (id-dma_mword  8);
smode = id-dma_1word  (id-dma_1word  8);
- 
+
+   mmode = ATA_MWDMA2;
+   smode = ATA_SWDMA2;
+
if (mmode != 0) {
/* enable multi */
cy82c693_dma_enable(drive, (mmode  1), 0);
-
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[PATCH 7/13] icside: add ide_toggle_bounce() calls


Add ide_toggle_bounce() call to -ide_dma_on/-dma_off_quietly
methods so they match generic __ide_dma_on()/ide_dma_off_quietly().

Since there is no PCI device there should be no functionality
changes caused by this patch.

Cc: Russell King [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/arm/icside.c |2 ++
 1 file changed, 2 insertions(+)

Index: b/drivers/ide/arm/icside.c
===
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -294,6 +294,7 @@ static void icside_dma_host_off(ide_driv
 static void icside_dma_off_quietly(ide_drive_t *drive)
 {
drive-using_dma = 0;
+   ide_toggle_bounce(drive, 0);
 }
 
 static void icside_dma_host_on(ide_drive_t *drive)
@@ -303,6 +304,7 @@ static void icside_dma_host_on(ide_drive
 static int icside_dma_on(ide_drive_t *drive)
 {
drive-using_dma = 1;
+   ide_toggle_bounce(drive, 1);
 
return 0;
 }
-
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[PATCH 6/13] sgiioc4: add ide_toggle_bounce() calls


Add ide_toggle_bounce() call to -ide_dma_on/-dma_off_quietly
methods so they match generic __ide_dma_on()/ide_dma_off_quietly().

Cc: Jeremy Higdon [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/pci/sgiioc4.c |2 ++
 1 file changed, 2 insertions(+)

Index: b/drivers/ide/pci/sgiioc4.c
===
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -281,6 +281,7 @@ static int
 sgiioc4_ide_dma_on(ide_drive_t * drive)
 {
drive-using_dma = 1;
+   ide_toggle_bounce(drive, 1);
 
return 0;
 }
@@ -288,6 +289,7 @@ sgiioc4_ide_dma_on(ide_drive_t * drive)
 static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
 {
drive-using_dma = 0;
+   ide_toggle_bounce(drive, 0);
 
drive-hwif-dma_host_off(drive);
 }
-
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[PATCH 8/13] au1xxx-ide: add ide_toggle_bounce() calls


Add ide_toggle_bounce() call to -ide_dma_on/-dma_off_quietly
methods so they match generic __ide_dma_on()/ide_dma_off_quietly().

Since there is no PCI device there should be no functionality
changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/mips/au1xxx-ide.c |2 ++
 1 file changed, 2 insertions(+)

Index: b/drivers/ide/mips/au1xxx-ide.c
===
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -402,6 +402,7 @@ static void auide_dma_host_on(ide_drive_
 static int auide_dma_on(ide_drive_t *drive)
 {
drive-using_dma = 1;
+   ide_toggle_bounce(drive, 1);
 
return 0;
 }
@@ -413,6 +414,7 @@ static void auide_dma_host_off(ide_drive
 static void auide_dma_off_quietly(ide_drive_t *drive)
 {
drive-using_dma = 0;
+   ide_toggle_bounce(drive, 0);
 }
 
 static void auide_dma_lost_irq(ide_drive_t *drive)
-
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[PATCH 9/13] ide: remove -ide_dma_on and -dma_off_quietly methods from ide_hwif_t


* Make ide_dma_off_quietly() and __ide_dma_on() always available.

* Drop __ prefix from __ide_dma_on().

* Check for presence of -dma_host_on instead of -ide_dma_on.

* Convert all users of -ide_dma_on and -dma_off_quietly methods
  to use ide_dma_on() and ide_dma_off_quietly() instead.

* Remove no longer needed -ide_dma_on and -dma_off_quietly methods
  from ide_hwif_t.

* Make ide_dma_on() void.

There should be no functionality changes caused by this patch.

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/arm/icside.c  |   16 
 drivers/ide/ide-dma.c |   30 +-
 drivers/ide/ide-io.c  |8 
 drivers/ide/ide-iops.c|   10 +-
 drivers/ide/ide-probe.c   |2 +-
 drivers/ide/ide.c |4 +---
 drivers/ide/mips/au1xxx-ide.c |   16 
 drivers/ide/pci/sc1200.c  |2 +-
 drivers/ide/pci/sgiioc4.c |   19 ---
 drivers/ide/ppc/pmac.c|2 --
 include/linux/ide.h   |8 
 11 files changed, 29 insertions(+), 88 deletions(-)

Index: b/drivers/ide/arm/icside.c
===
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -291,24 +291,10 @@ static void icside_dma_host_off(ide_driv
 {
 }
 
-static void icside_dma_off_quietly(ide_drive_t *drive)
-{
-   drive-using_dma = 0;
-   ide_toggle_bounce(drive, 0);
-}
-
 static void icside_dma_host_on(ide_drive_t *drive)
 {
 }
 
-static int icside_dma_on(ide_drive_t *drive)
-{
-   drive-using_dma = 1;
-   ide_toggle_bounce(drive, 1);
-
-   return 0;
-}
-
 static int icside_dma_end(ide_drive_t *drive)
 {
ide_hwif_t *hwif = HWIF(drive);
@@ -425,9 +411,7 @@ static void icside_dma_init(ide_hwif_t *
hwif-set_dma_mode  = icside_set_dma_mode;
 
hwif-dma_host_off  = icside_dma_host_off;
-   hwif-dma_off_quietly   = icside_dma_off_quietly;
hwif-dma_host_on   = icside_dma_host_on;
-   hwif-ide_dma_on= icside_dma_on;
hwif-dma_setup = icside_dma_setup;
hwif-dma_exec_cmd  = icside_dma_exec_cmd;
hwif-dma_start = icside_dma_start;
Index: b/drivers/ide/ide-dma.c
===
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -424,6 +424,7 @@ void ide_dma_host_off(ide_drive_t *drive
 }
 
 EXPORT_SYMBOL(ide_dma_host_off);
+#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 
 /**
  * ide_dma_off_quietly -   Generic DMA kill
@@ -441,7 +442,6 @@ void ide_dma_off_quietly(ide_drive_t *dr
 }
 
 EXPORT_SYMBOL(ide_dma_off_quietly);
-#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
 
 /**
  * ide_dma_off -   disable DMA on a device
@@ -454,7 +454,7 @@ EXPORT_SYMBOL(ide_dma_off_quietly);
 void ide_dma_off(ide_drive_t *drive)
 {
printk(KERN_INFO %s: DMA disabled\n, drive-name);
-   drive-hwif-dma_off_quietly(drive);
+   ide_dma_off_quietly(drive);
 }
 
 EXPORT_SYMBOL(ide_dma_off);
@@ -480,26 +480,26 @@ void ide_dma_host_on(ide_drive_t *drive)
 }
 
 EXPORT_SYMBOL(ide_dma_host_on);
+#endif
 
 /**
- * __ide_dma_on-   Enable DMA on a device
+ * ide_dma_on  -   Enable DMA on a device
  * @drive: drive to enable DMA on
  *
  * Enable IDE DMA for a device on this IDE controller.
  */
- 
-int __ide_dma_on (ide_drive_t *drive)
+
+void ide_dma_on(ide_drive_t *drive)
 {
drive-using_dma = 1;
ide_toggle_bounce(drive, 1);
 
drive-hwif-dma_host_on(drive);
-
-   return 0;
 }
 
-EXPORT_SYMBOL(__ide_dma_on);
+EXPORT_SYMBOL(ide_dma_on);
 
+#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
 /**
  * ide_dma_setup   -   begin a DMA phase
  * @drive: target device
@@ -854,15 +854,13 @@ void ide_dma_verbose(ide_drive_t *drive)
return;
 bug_dma_off:
printk(, BUG DMA OFF);
-   hwif-dma_off_quietly(drive);
-   return;
+   ide_dma_off_quietly(drive);
 }
 
 EXPORT_SYMBOL(ide_dma_verbose);
 
 int ide_set_dma(ide_drive_t *drive)
 {
-   ide_hwif_t *hwif = drive-hwif;
int rc;
 
/*
@@ -871,13 +869,15 @@ int ide_set_dma(ide_drive_t *drive)
 * things, if not checked and cleared.
 *   PARANOIA!!!
 */
-   hwif-dma_off_quietly(drive);
+   ide_dma_off_quietly(drive);
 
rc = ide_dma_check(drive);
if (rc)
return rc;
 
-   return hwif-ide_dma_on(drive);
+   ide_dma_on(drive);
+
+   return 0;
 }
 
 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
@@ -1014,12 +1014,8 @@ void ide_setup_dma(ide_hwif_t *hwif, uns
if (!(hwif-dma_prdtable))
hwif-dma_prdtable  = (hwif-dma_base + 4);
 
-   if (!hwif-dma_off_quietly)
-   hwif-dma_off_quietly = ide_dma_off_quietly;
if (!hwif-dma_host_off)
hwif-dma_host_off = ide_dma_host_off;
-   if

[PATCH 10/13] ide-cris: fix DMA methods


* Rename cris_dma_{on,off}() to cris_dma_host_{on,off}().

* Remove no longer needed -dma_off_quietly
  (IDE core has the needed code now).

* Make cris_dma_host_on() void.

Cc: Mikael Starvik [EMAIL PROTECTED]
Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
 drivers/ide/cris/ide-cris.c |   18 +++---
 1 file changed, 7 insertions(+), 11 deletions(-)

Index: b/drivers/ide/cris/ide-cris.c
===
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -673,9 +673,12 @@ static void cris_ide_input_data (ide_dri
 static void cris_ide_output_data (ide_drive_t *drive, void *, unsigned int);
 static void cris_atapi_input_bytes(ide_drive_t *drive, void *, unsigned int);
 static void cris_atapi_output_bytes(ide_drive_t *drive, void *, unsigned int);
-static int cris_dma_on (ide_drive_t *drive);
 
-static void cris_dma_off(ide_drive_t *drive)
+static void cris_dma_host_off(ide_drive_t *drive)
+{
+}
+
+static void cris_dma_host_on(ide_drive_t *drive)
 {
 }
 
@@ -798,9 +801,8 @@ init_e100_ide (void)
hwif-OUTBSYNC = cris_ide_outbsync;
hwif-INB = cris_ide_inb;
hwif-INW = cris_ide_inw;
-   hwif-dma_host_off = cris_dma_off;
-   hwif-dma_host_on = cris_dma_on;
-   hwif-dma_off_quietly = cris_dma_off;
+   hwif-dma_host_off = cris_dma_host_off;
+   hwif-dma_host_on = cris_dma_host_on;
hwif-cbl = ATA_CBL_PATA40;
hwif-host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
hwif-pio_mask = ATA_PIO4,
@@ -822,12 +824,6 @@ init_e100_ide (void)
cris_ide_set_speed(TYPE_UDMA, ATA_UDMA2_CYC, ATA_UDMA2_DVS, 0);
 }
 
-static int cris_dma_on (ide_drive_t *drive)
-{
-   return 0;
-}
-
-
 static cris_dma_descr_type mydescr __attribute__ ((__aligned__(16)));
 
 /*
-
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[PATCH 11/13] atiixp: remove -dma_host_on and -dma_host_off methods


* Enable/disable UDMA in atiixp_set_dma_mode().

* Remove no longer needed atiixp_dma_host_{on,off}() and save_mdma_mode[].

* Bump driver version.

Signed-off-by: Bartlomiej Zolnierkiewicz [EMAIL PROTECTED]
---
Needs to be tested, I'll check it with SB400 unless somebody beats me to it...

 drivers/ide/pci/atiixp.c |   71 +++
 1 file changed, 18 insertions(+), 53 deletions(-)

Index: b/drivers/ide/pci/atiixp.c
===
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -1,5 +1,5 @@
 /*
- *  linux/drivers/ide/pci/atiixp.c Version 0.03Aug 3 2007
+ *  linux/drivers/ide/pci/atiixp.c Version 0.05Nov 9 2007
  *
  *  Copyright (C) 2003 ATI Inc. [EMAIL PROTECTED]
  *  Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
@@ -43,47 +43,8 @@ static atiixp_ide_timing mdma_timing[] =
{ 0x02, 0x00 },
 };
 
-static int save_mdma_mode[4];
-
 static DEFINE_SPINLOCK(atiixp_lock);
 
-static void atiixp_dma_host_on(ide_drive_t *drive)
-{
-   struct pci_dev *dev = drive-hwif-pci_dev;
-   unsigned long flags;
-   u16 tmp16;
-
-   spin_lock_irqsave(atiixp_lock, flags);
-
-   pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-   if (save_mdma_mode[drive-dn])
-   tmp16 = ~(1  drive-dn);
-   else
-   tmp16 |= (1  drive-dn);
-   pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
-   spin_unlock_irqrestore(atiixp_lock, flags);
-
-   ide_dma_host_on(drive);
-}
-
-static void atiixp_dma_host_off(ide_drive_t *drive)
-{
-   struct pci_dev *dev = drive-hwif-pci_dev;
-   unsigned long flags;
-   u16 tmp16;
-
-   spin_lock_irqsave(atiixp_lock, flags);
-
-   pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-   tmp16 = ~(1  drive-dn);
-   pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
-   spin_unlock_irqrestore(atiixp_lock, flags);
-
-   ide_dma_host_off(drive);
-}
-
 /**
  * atiixp_set_pio_mode -   set host controller for PIO mode
  * @drive: drive
@@ -132,26 +93,33 @@ static void atiixp_set_dma_mode(ide_driv
int timing_shift = (drive-dn  2) ? 16 : 0 + (drive-dn  1) ? 0 : 8;
u32 tmp32;
u16 tmp16;
+   u16 udma_ctl = 0;
 
spin_lock_irqsave(atiixp_lock, flags);
 
-   save_mdma_mode[drive-dn] = 0;
+   pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
+
if (speed = XFER_UDMA_0) {
pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
tmp16 = ~(0x07  (drive-dn * 4));
tmp16 |= ((speed  0x07)  (drive-dn * 4));
pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
-   } else {
-   if ((speed = XFER_MW_DMA_0)  (speed = XFER_MW_DMA_2)) {
-   save_mdma_mode[drive-dn] = speed;
-   pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, 
tmp32);
-   tmp32 = ~(0xff  timing_shift);
-   tmp32 |= (mdma_timing[speed  0x03].recover_width  
timing_shift) |
-   (mdma_timing[speed  0x03].command_width  
(timing_shift + 4));
-   pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, 
tmp32);
-   }
+
+   udma_ctl |= (1  drive-dn);
+   } else if (speed = XFER_MW_DMA_0) {
+   u8 i = speed  0x03;
+
+   pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
+   tmp32 = ~(0xff  timing_shift);
+   tmp32 |= (mdma_timing[i].recover_width  timing_shift) |
+(mdma_timing[i].command_width  (timing_shift + 4));
+   pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
+
+   udma_ctl = ~(1  drive-dn);
}
 
+   pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
+
spin_unlock_irqrestore(atiixp_lock, flags);
 }
 
@@ -181,9 +149,6 @@ static void __devinit init_hwif_atiixp(i
hwif-cbl = ATA_CBL_PATA80;
else
hwif-cbl = ATA_CBL_PATA40;
-
-   hwif-dma_host_on = atiixp_dma_host_on;
-   hwif-dma_host_off = atiixp_dma_host_off;
 }
 
 static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
-
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[PATCH 13/13] ide: merge -dma_host_{on,off} methods into -dma_host_set method