Re: [PATCH v11 44/60] PCI: Add alt_size ressource allocation support

[Yinghai Lu]

On Thu, Apr 7, 2016 at 5:56 PM, Linus Torvalds
 wrote:
> I'm not excited about the whole "alternate aligment".
>
> Maybe the kernel should just accept the smaller alignment. If the
> minimum alignment we use is bigger than necessary, then we're just
> wrong about it, and perhaps we should just use the smaller alignment
> that the bios used.

Look like I did not make it clearly in this change log.

Current kernel code sizing is searching smallest alignment, so call it
min_align scheme.

Some bios is using different way: It use smallest size instead, but it
could have bigger alignment
than min_align, so I call it alt_size scheme.

PROs for min_align: it can be used to calculate upper parent bridges
easily and safely.
CONs for min_align: it could generate more bigger required size.

PROs for alt_size: it try to search smaller size, esp for under 4G mmio space.
CONs for alt_size: it could have much bigger alignment, and need to
calculate the upper
bridge alt_size carefully. We end it up with try out to search the
upper bridge alt_size.

Current min_align code still have other problem: it can not handle block that
size is bigger than alignment, and it would generate wrong/too big align/size.

In the patch set, We
1. fix the min_align scheme to use try out way to find right min_align even
block size if bigger than block alignment.
2. add alt_size scheme, it will search alt_size/alt_align, that have
smaller size
   a. compare that with min_align/min_size, if alt_size is not smaller
than min_size
   just dump alt_size. otherwise record alt_size.
   b. later if we fail to get allocation with min_align, we retry alt_size.

So we still keep the old way as usual, and only handle some extra
corner case like
1. BIOS use small size and big align allocation, and in kernel we are doing pci
device remove or rescan.
2. We have couple layers of bridges that min_align scheme is wasting space.
and we have tight mmio under 4G.

Please let me know if I describe it clearly this time, otherwise I
would extract sample output
from patches and post here.

Thanks

Yinghai

Re: [PATCH v11 44/60] PCI: Add alt_size ressource allocation support

[Yinghai Lu]

On Thu, Apr 7, 2016 at 5:56 PM, Linus Torvalds
 wrote:
> I'm not excited about the whole "alternate aligment".
>
> Maybe the kernel should just accept the smaller alignment. If the
> minimum alignment we use is bigger than necessary, then we're just
> wrong about it, and perhaps we should just use the smaller alignment
> that the bios used.

Look like I did not make it clearly in this change log.

Current kernel code sizing is searching smallest alignment, so call it
min_align scheme.

Some bios is using different way: It use smallest size instead, but it
could have bigger alignment
than min_align, so I call it alt_size scheme.

PROs for min_align: it can be used to calculate upper parent bridges
easily and safely.
CONs for min_align: it could generate more bigger required size.

PROs for alt_size: it try to search smaller size, esp for under 4G mmio space.
CONs for alt_size: it could have much bigger alignment, and need to
calculate the upper
bridge alt_size carefully. We end it up with try out to search the
upper bridge alt_size.

Current min_align code still have other problem: it can not handle block that
size is bigger than alignment, and it would generate wrong/too big align/size.

In the patch set, We
1. fix the min_align scheme to use try out way to find right min_align even
block size if bigger than block alignment.
2. add alt_size scheme, it will search alt_size/alt_align, that have
smaller size
   a. compare that with min_align/min_size, if alt_size is not smaller
than min_size
   just dump alt_size. otherwise record alt_size.
   b. later if we fail to get allocation with min_align, we retry alt_size.

So we still keep the old way as usual, and only handle some extra
corner case like
1. BIOS use small size and big align allocation, and in kernel we are doing pci
device remove or rescan.
2. We have couple layers of bridges that min_align scheme is wasting space.
and we have tight mmio under 4G.

Please let me know if I describe it clearly this time, otherwise I
would extract sample output
from patches and post here.

Thanks

Yinghai

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Pan Xinhui]

On 2016年04月08日 13:29, Sergey Senozhatsky wrote:
> On (04/08/16 12:04), Pan Xinhui wrote:
> [..]
>>> +/*
>>> + * Init async printk via late_initcall, after core/arch/device/etc.
>>> + * initialization.
>>> + */
>>> +static __init int init_printk_kthread(void)
>>> +{
>>> +   printk_initcall_done = true;
>>> +   return __init_printk_kthread();
>> hello, 
>>
>> One confusion, Why not use a lock to protect __init_printk_kthread from 
>> parallel call? Otherwise I think there is a race.
>> But for simplicity, maybe you could write codes as below.
>>
>> +int ret  = __init_printk_kthread();
>> +printk_initcall_done = true;
>> +return ret;
>>
>> In my opinion, using a lock is better.
> 
> Hello,
> 
> I though about this, but isn't late_initcall() happening before kernel
> starts /sbin/init? who can race with
> 
>   late_initcall() -> init_printk_kthread() -> __init_printk_kthread()?
> 
yep, you are right. I made a mistake.

> looking at
> 
> static int __ref kernel_init(void *unused)
> {
> int ret;
> 
> kernel_init_freeable();
> /* need to finish all async __init code before freeing the memory */
> async_synchronize_full();
> free_initmem();
> ..
> 
> if (!try_to_run_init_process("/sbin/init") ||
> !try_to_run_init_process("/etc/init") ||
> !try_to_run_init_process("/bin/init") ||
> !try_to_run_init_process("/bin/sh"))
> return 0;
> 
> __init (and init_printk_kthread is __init) is finished and freed by the
> time kernel try_to_run_init_process. isn't it?
> 
> 
good explanation. thanks

> sysfs knob -> __init_printk_kthread() is protected by printk_sync_lock
> mutex, obviously there can be parallel calls from user space.
> 
>   -ss
> 

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Pan Xinhui]

On 2016年04月08日 13:29, Sergey Senozhatsky wrote:
> On (04/08/16 12:04), Pan Xinhui wrote:
> [..]
>>> +/*
>>> + * Init async printk via late_initcall, after core/arch/device/etc.
>>> + * initialization.
>>> + */
>>> +static __init int init_printk_kthread(void)
>>> +{
>>> +   printk_initcall_done = true;
>>> +   return __init_printk_kthread();
>> hello, 
>>
>> One confusion, Why not use a lock to protect __init_printk_kthread from 
>> parallel call? Otherwise I think there is a race.
>> But for simplicity, maybe you could write codes as below.
>>
>> +int ret  = __init_printk_kthread();
>> +printk_initcall_done = true;
>> +return ret;
>>
>> In my opinion, using a lock is better.
> 
> Hello,
> 
> I though about this, but isn't late_initcall() happening before kernel
> starts /sbin/init? who can race with
> 
>   late_initcall() -> init_printk_kthread() -> __init_printk_kthread()?
> 
yep, you are right. I made a mistake.

> looking at
> 
> static int __ref kernel_init(void *unused)
> {
> int ret;
> 
> kernel_init_freeable();
> /* need to finish all async __init code before freeing the memory */
> async_synchronize_full();
> free_initmem();
> ..
> 
> if (!try_to_run_init_process("/sbin/init") ||
> !try_to_run_init_process("/etc/init") ||
> !try_to_run_init_process("/bin/init") ||
> !try_to_run_init_process("/bin/sh"))
> return 0;
> 
> __init (and init_printk_kthread is __init) is finished and freed by the
> time kernel try_to_run_init_process. isn't it?
> 
> 
good explanation. thanks

> sysfs knob -> __init_printk_kthread() is protected by printk_sync_lock
> mutex, obviously there can be parallel calls from user space.
> 
>   -ss
> 

Re: [PATCH] cpufreq: Skip all governor-related actions for cpufreq_suspended set

[Viresh Kumar]

On 07-04-16, 03:29, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki 
> 
> Since governor operations are generally skipped if cpufreq_suspended
> is set, do nothing at all in cpufreq_start_governor() and
> cpufreq_exit_governor() in that case.
> 
> In particular, this prevents fast frequency switching from being
> disabled after a suspend-to-RAM cycle on all CPUs except for the
> boot one.
> 
> Fixes: b7898fda5bc7 (cpufreq: Support for fast frequency switching)
> Signed-off-by: Rafael J. Wysocki 
> ---
>  drivers/cpufreq/cpufreq.c |6 ++
>  1 file changed, 6 insertions(+)

Acked-by: Viresh Kumar 

-- 
viresh

Re: [PATCH] cpufreq: Skip all governor-related actions for cpufreq_suspended set

[Viresh Kumar]

On 07-04-16, 03:29, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki 
> 
> Since governor operations are generally skipped if cpufreq_suspended
> is set, do nothing at all in cpufreq_start_governor() and
> cpufreq_exit_governor() in that case.
> 
> In particular, this prevents fast frequency switching from being
> disabled after a suspend-to-RAM cycle on all CPUs except for the
> boot one.
> 
> Fixes: b7898fda5bc7 (cpufreq: Support for fast frequency switching)
> Signed-off-by: Rafael J. Wysocki 
> ---
>  drivers/cpufreq/cpufreq.c |6 ++
>  1 file changed, 6 insertions(+)

Acked-by: Viresh Kumar 

-- 
viresh

Re: [PATCH] cpufreq: Skip all governor-related actions for cpufreq_suspended set

[Viresh Kumar]

On 08-04-16, 00:05, Rafael J. Wysocki wrote:
> On Thursday, April 07, 2016 05:35:03 PM Viresh Kumar wrote:

> > That's *ugly* and it works by chance, unless I am misreading it
> > completely.
> 
> I'm assuming that what you mean by "ugly" here is "not really 
> straightforward",
> which I agree with,

Yeah.

> but then it is really disappointing to see comments like
> that from you about the code that you helped to write.

I was just trying to say that this isn't how I feel it should be done.
:(

> Moreover, runtime CPU offline *also* doesn't have to run the governor 
> exit/init
> for the same reason why the policy directory doesn't have to be removed on
> CPU offline: it is just pointless to do that.  The governor has been stopped
> already and it won't do anything more.  The only problem here is to prevent
> governor tunable sysfs attributes from triggering actions in that state,
> but that shouldn't be too difficult to arrange for.  If that's done,

Isn't that already guaranteed as userspace should have been frozen by
by the time we reach cpufreq_suspend()?

> cpufreq_suspended can be dropped, modulo changing cpufreq_start_governor()
> to return immediately if the governor has been started already.
> 
> And if something else is needed to protect driver callbacks from being invoked
> outside of the suspend-resume path, a more robust mechanism has to be added
> for that.
> 
> But in the meantime, I'd like to address the fast switch problem first and
> then you're free to clean up things on top of that.  Or I will clean them up
> if I have the time.

Okay..

-- 
viresh

Re: [PATCH] cpufreq: Skip all governor-related actions for cpufreq_suspended set

[Viresh Kumar]

On 08-04-16, 00:05, Rafael J. Wysocki wrote:
> On Thursday, April 07, 2016 05:35:03 PM Viresh Kumar wrote:

> > That's *ugly* and it works by chance, unless I am misreading it
> > completely.
> 
> I'm assuming that what you mean by "ugly" here is "not really 
> straightforward",
> which I agree with,

Yeah.

> but then it is really disappointing to see comments like
> that from you about the code that you helped to write.

I was just trying to say that this isn't how I feel it should be done.
:(

> Moreover, runtime CPU offline *also* doesn't have to run the governor 
> exit/init
> for the same reason why the policy directory doesn't have to be removed on
> CPU offline: it is just pointless to do that.  The governor has been stopped
> already and it won't do anything more.  The only problem here is to prevent
> governor tunable sysfs attributes from triggering actions in that state,
> but that shouldn't be too difficult to arrange for.  If that's done,

Isn't that already guaranteed as userspace should have been frozen by
by the time we reach cpufreq_suspend()?

> cpufreq_suspended can be dropped, modulo changing cpufreq_start_governor()
> to return immediately if the governor has been started already.
> 
> And if something else is needed to protect driver callbacks from being invoked
> outside of the suspend-resume path, a more robust mechanism has to be added
> for that.
> 
> But in the meantime, I'd like to address the fast switch problem first and
> then you're free to clean up things on top of that.  Or I will clean them up
> if I have the time.

Okay..

-- 
viresh

Re: [PATCH v2 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

[Felipe Balbi]

Hi,

Purna Chandra Mandal  writes:
>> Purna Chandra Mandal  writes:
>>> From: Cristian Birsan 
>>>
>>> This driver adds support of PIC32 MUSB OTG controller as
>>> dual role device. It implements platform specific glue to
>>> reuse musb core.
>>>
>>> Signed-off-by: Cristian Birsan 
>>> Signed-off-by: Purna Chandra Mandal 
>>>
>>> In-reply-to: 460027775-20729-2-git-send-email-purna.man...@microchip.com
>>>
>>> ---
>>>
>>> Changes in v2:
>>>  - fix i386 build
>>>  - fix indentation
>>>
>>>  drivers/usb/musb/Kconfig  |   9 +-
>>>  drivers/usb/musb/Makefile |   1 +
>>>  drivers/usb/musb/pic32.c  | 608 
>>> ++
>>>  3 files changed, 617 insertions(+), 1 deletion(-)
>>>  create mode 100644 drivers/usb/musb/pic32.c
>>>
>>> diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
>>> index 886526b..1970c1e 100644
>>> --- a/drivers/usb/musb/Kconfig
>>> +++ b/drivers/usb/musb/Kconfig
>>> @@ -112,6 +112,13 @@ config USB_MUSB_BLACKFIN
>>> depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
>>> depends on NOP_USB_XCEIV
>>>  
>>> +config USB_MUSB_PIC32
>>> +   tristate "Microchip PIC32 USB platforms"
>>> +   depends on MACH_PIC32
>> no, we like to build stuff on other arches, this should be:
>>
>>  depends on MACH_PIC32 || COMPILE_TEST
>>
>> and you should *really* fix the build error, not work around it.
>
> This driver is for PIC32MZDA platforms which are powered by MIPS 14Kec CPU.
>
> The offending API 'readsl()' is implemented by MIPS arch (in
> arch/mips/include/asm/io.h), but not by i386 arch.

odd, asm-generic/io.h has an implementation. In any case, why couldn't
you use readl() instead ?

> IMO compiling for i386 is not required.

it is for build coverage.

-- 
balbi


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Description: PGP signature

Re: [PATCH RFC 1/2] scatterlist: add mempool based chained SG alloc/free api

[Ming Lin]

On Thu, Apr 7, 2016 at 9:43 AM, Ming Lin  wrote:
> On Thu, Apr 7, 2016 at 7:56 AM, Bart Van Assche
>  wrote:
>> On 03/15/16 15:39, Ming Lin wrote:
>>>
>>> +static void sg_mempoll_free(struct scatterlist *sgl, unsigned int nents)
>>
>>
>> Please change mempoll into mempool.
>
> Good catch. Thanks Bart!

Hi Bart,

This is actually the previous old RFC patch.
The v2 and v3 patch series doesn't have this typo.

Thanks.

Re: [PATCH v2 2/2] usb: musb: pic32: Add USB DRC driver for PIC32 OTG controller.

[Felipe Balbi]

Hi,

Purna Chandra Mandal  writes:
>> Purna Chandra Mandal  writes:
>>> From: Cristian Birsan 
>>>
>>> This driver adds support of PIC32 MUSB OTG controller as
>>> dual role device. It implements platform specific glue to
>>> reuse musb core.
>>>
>>> Signed-off-by: Cristian Birsan 
>>> Signed-off-by: Purna Chandra Mandal 
>>>
>>> In-reply-to: 460027775-20729-2-git-send-email-purna.man...@microchip.com
>>>
>>> ---
>>>
>>> Changes in v2:
>>>  - fix i386 build
>>>  - fix indentation
>>>
>>>  drivers/usb/musb/Kconfig  |   9 +-
>>>  drivers/usb/musb/Makefile |   1 +
>>>  drivers/usb/musb/pic32.c  | 608 
>>> ++
>>>  3 files changed, 617 insertions(+), 1 deletion(-)
>>>  create mode 100644 drivers/usb/musb/pic32.c
>>>
>>> diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
>>> index 886526b..1970c1e 100644
>>> --- a/drivers/usb/musb/Kconfig
>>> +++ b/drivers/usb/musb/Kconfig
>>> @@ -112,6 +112,13 @@ config USB_MUSB_BLACKFIN
>>> depends on (BF54x && !BF544) || (BF52x && ! BF522 && !BF523)
>>> depends on NOP_USB_XCEIV
>>>  
>>> +config USB_MUSB_PIC32
>>> +   tristate "Microchip PIC32 USB platforms"
>>> +   depends on MACH_PIC32
>> no, we like to build stuff on other arches, this should be:
>>
>>  depends on MACH_PIC32 || COMPILE_TEST
>>
>> and you should *really* fix the build error, not work around it.
>
> This driver is for PIC32MZDA platforms which are powered by MIPS 14Kec CPU.
>
> The offending API 'readsl()' is implemented by MIPS arch (in
> arch/mips/include/asm/io.h), but not by i386 arch.

odd, asm-generic/io.h has an implementation. In any case, why couldn't
you use readl() instead ?

> IMO compiling for i386 is not required.

it is for build coverage.

-- 
balbi


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Description: PGP signature

Re: [PATCH RFC 1/2] scatterlist: add mempool based chained SG alloc/free api

[Ming Lin]

On Thu, Apr 7, 2016 at 9:43 AM, Ming Lin  wrote:
> On Thu, Apr 7, 2016 at 7:56 AM, Bart Van Assche
>  wrote:
>> On 03/15/16 15:39, Ming Lin wrote:
>>>
>>> +static void sg_mempoll_free(struct scatterlist *sgl, unsigned int nents)
>>
>>
>> Please change mempoll into mempool.
>
> Good catch. Thanks Bart!

Hi Bart,

This is actually the previous old RFC patch.
The v2 and v3 patch series doesn't have this typo.

Thanks.

Re: [PATCH] mtd: nand: s3c2410: fix bug in s3c2410_nand_correct_data()

[Zeng Zhaoxiu]

在 2016年04月08日 10:18, Boris Brezillon 写道:

On Fri, 8 Apr 2016 09:51:04 +0800
Zeng Zhaoxiu  wrote:



在 2016年04月08日 08:18, Boris Brezillon 写道:

Hi Zeng,

On Fri,  8 Apr 2016 00:48:17 +0800
zengzhao...@163.com wrote:


From: Zeng Zhaoxiu 

If there is only one bit difference in the ECC, the function should return 1.
The result of "diff0 & ~(1< 1" distributed in kernel,
these determinations are slower than "(n & (n - 1)) != 0" on most CPUs.
We can use this new function instead.

Re: [PATCH] mtd: nand: s3c2410: fix bug in s3c2410_nand_correct_data()

[Zeng Zhaoxiu]

在 2016年04月08日 10:18, Boris Brezillon 写道:

On Fri, 8 Apr 2016 09:51:04 +0800
Zeng Zhaoxiu  wrote:



在 2016年04月08日 08:18, Boris Brezillon 写道:

Hi Zeng,

On Fri,  8 Apr 2016 00:48:17 +0800
zengzhao...@163.com wrote:


From: Zeng Zhaoxiu 

If there is only one bit difference in the ECC, the function should return 1.
The result of "diff0 & ~(1<
Missing Signed-off-by here.


---
   drivers/mtd/nand/s3c2410.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 9c9397b..c9698cf 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -542,7 +542,7 @@ static int s3c2410_nand_correct_data(struct mtd_info *mtd, 
u_char *dat,
diff0 |= (diff1 << 8);
diff0 |= (diff2 << 16);
   
-	if ((diff0 & ~(1<
+   if ((diff0 & (diff0 - 1)) == 0)

Or just

if (hweight_long((unsigned long)diff0) == 1)

which is doing exactly what the comment says.

BTW, I don't understand why the current code is wrong? To me, it seems
it's correctly detecting the case where only a single bit is different.
What are you trying to fix exactly?

Best Regards,

Boris


For example, assuming diff0 is 1, then fls(diff0) is equal to 1, then "~(1 << 
fls(diff0))" is equal to 0xfffd,
then the result of "(diff0 & ~(1 << fls(diff0)))" is 1 , not we expected 0.

__fls(diff0) and "(fls(diff0) - 1)" are all right, but fls(diff0) is wrong.


Indeed, I forgot that fls() was returning (position + 1). Anyway, I
still think using hweight clarifies what you really want to test.



"(n & (n - 1))" is used in is_power_of_2() in incluse/linux/log2.h,
it's result is equal to "n & ~(1 << __ffs(n))".

"(diff & (diff - 1))" is simple and fast, although here is not performance 
critical.
To improve readability of this code, we should add a new function and use it.

/*
 *  Determine whether some value has more than one 1-bits
 */

static inline __attribute__((const))
bool more_than_1_bit_set(unsigned long n)
{
return (n & (n - 1)) != 0;
}

OTOH, I found many determinations like "hweightN(n) > 1" distributed in kernel,
these determinations are slower than "(n & (n - 1)) != 0" on most CPUs.
We can use this new function instead.

[PATCH] staging: wilc1000: move initialization of the config values

[Alison Schofield]

Move the initialization of the config values so that an uninit'd
mutex is not exposed and to simplify the initialization process.

The code was allocating a structure with a lock, initializing and
taking the lock, setting some values, and then releasing the
lock.  If no other thread can get it, then the lock isn't needed.
If another thread can get it, it could find it before the mutex
is initialized.

Make it safe and simple by setting the config values and initializing
their mutex before the kthread is started.  No lock/unlock needed.

Signed-off-by: Alison Schofield 
---

Note- not verified with hardware.

 drivers/staging/wilc1000/host_interface.c | 18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/wilc1000/host_interface.c 
b/drivers/staging/wilc1000/host_interface.c
index 04cbff5..40f3d11 100644
--- a/drivers/staging/wilc1000/host_interface.c
+++ b/drivers/staging/wilc1000/host_interface.c
@@ -3410,6 +3410,14 @@ int wilc_init(struct net_device *dev, struct host_if_drv 
**hif_drv_handler)
init_completion(_drv->comp_get_rssi);
init_completion(_drv->comp_inactive_time);
 
+   hif_drv->cfg_values.site_survey_enabled = SITE_SURVEY_OFF;
+   hif_drv->cfg_values.scan_source = DEFAULT_SCAN;
+   hif_drv->cfg_values.active_scan_time = ACTIVE_SCAN_TIME;
+   hif_drv->cfg_values.passive_scan_time = PASSIVE_SCAN_TIME;
+   hif_drv->cfg_values.curr_tx_rate = AUTORATE;
+
+   mutex_init(_drv->cfg_values_lock);
+
if (clients_count == 0) {
result = wilc_mq_create(_msg_q);
 
@@ -3435,20 +3443,10 @@ int wilc_init(struct net_device *dev, struct 
host_if_drv **hif_drv_handler)
setup_timer(_drv->connect_timer, TimerCB_Connect, 0);
setup_timer(_drv->remain_on_ch_timer, ListenTimerCB, 0);
 
-   mutex_init(_drv->cfg_values_lock);
-   mutex_lock(_drv->cfg_values_lock);
-
hif_drv->hif_state = HOST_IF_IDLE;
-   hif_drv->cfg_values.site_survey_enabled = SITE_SURVEY_OFF;
-   hif_drv->cfg_values.scan_source = DEFAULT_SCAN;
-   hif_drv->cfg_values.active_scan_time = ACTIVE_SCAN_TIME;
-   hif_drv->cfg_values.passive_scan_time = PASSIVE_SCAN_TIME;
-   hif_drv->cfg_values.curr_tx_rate = AUTORATE;
 
hif_drv->p2p_timeout = 0;
 
-   mutex_unlock(_drv->cfg_values_lock);
-
clients_count++;
 
return result;
-- 
2.1.4

[PATCH] staging: wilc1000: move initialization of the config values

[Alison Schofield]

Move the initialization of the config values so that an uninit'd
mutex is not exposed and to simplify the initialization process.

The code was allocating a structure with a lock, initializing and
taking the lock, setting some values, and then releasing the
lock.  If no other thread can get it, then the lock isn't needed.
If another thread can get it, it could find it before the mutex
is initialized.

Make it safe and simple by setting the config values and initializing
their mutex before the kthread is started.  No lock/unlock needed.

Signed-off-by: Alison Schofield 
---

Note- not verified with hardware.

 drivers/staging/wilc1000/host_interface.c | 18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/staging/wilc1000/host_interface.c 
b/drivers/staging/wilc1000/host_interface.c
index 04cbff5..40f3d11 100644
--- a/drivers/staging/wilc1000/host_interface.c
+++ b/drivers/staging/wilc1000/host_interface.c
@@ -3410,6 +3410,14 @@ int wilc_init(struct net_device *dev, struct host_if_drv 
**hif_drv_handler)
init_completion(_drv->comp_get_rssi);
init_completion(_drv->comp_inactive_time);
 
+   hif_drv->cfg_values.site_survey_enabled = SITE_SURVEY_OFF;
+   hif_drv->cfg_values.scan_source = DEFAULT_SCAN;
+   hif_drv->cfg_values.active_scan_time = ACTIVE_SCAN_TIME;
+   hif_drv->cfg_values.passive_scan_time = PASSIVE_SCAN_TIME;
+   hif_drv->cfg_values.curr_tx_rate = AUTORATE;
+
+   mutex_init(_drv->cfg_values_lock);
+
if (clients_count == 0) {
result = wilc_mq_create(_msg_q);
 
@@ -3435,20 +3443,10 @@ int wilc_init(struct net_device *dev, struct 
host_if_drv **hif_drv_handler)
setup_timer(_drv->connect_timer, TimerCB_Connect, 0);
setup_timer(_drv->remain_on_ch_timer, ListenTimerCB, 0);
 
-   mutex_init(_drv->cfg_values_lock);
-   mutex_lock(_drv->cfg_values_lock);
-
hif_drv->hif_state = HOST_IF_IDLE;
-   hif_drv->cfg_values.site_survey_enabled = SITE_SURVEY_OFF;
-   hif_drv->cfg_values.scan_source = DEFAULT_SCAN;
-   hif_drv->cfg_values.active_scan_time = ACTIVE_SCAN_TIME;
-   hif_drv->cfg_values.passive_scan_time = PASSIVE_SCAN_TIME;
-   hif_drv->cfg_values.curr_tx_rate = AUTORATE;
 
hif_drv->p2p_timeout = 0;
 
-   mutex_unlock(_drv->cfg_values_lock);
-
clients_count++;
 
return result;
-- 
2.1.4

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Sergey Senozhatsky]

On (04/08/16 12:04), Pan Xinhui wrote:
[..]
> > +/*
> > + * Init async printk via late_initcall, after core/arch/device/etc.
> > + * initialization.
> > + */
> > +static __init int init_printk_kthread(void)
> > +{
> > +   printk_initcall_done = true;
> > +   return __init_printk_kthread();
> hello, 
> 
> One confusion, Why not use a lock to protect __init_printk_kthread from 
> parallel call? Otherwise I think there is a race.
> But for simplicity, maybe you could write codes as below.
> 
> + int ret  = __init_printk_kthread();
> + printk_initcall_done = true;
> + return ret;
> 
> In my opinion, using a lock is better.

Hello,

I though about this, but isn't late_initcall() happening before kernel
starts /sbin/init? who can race with

late_initcall() -> init_printk_kthread() -> __init_printk_kthread()?

looking at

static int __ref kernel_init(void *unused)
{
int ret;

kernel_init_freeable();
/* need to finish all async __init code before freeing the memory */
async_synchronize_full();
free_initmem();
..

if (!try_to_run_init_process("/sbin/init") ||
!try_to_run_init_process("/etc/init") ||
!try_to_run_init_process("/bin/init") ||
!try_to_run_init_process("/bin/sh"))
return 0;

__init (and init_printk_kthread is __init) is finished and freed by the
time kernel try_to_run_init_process. isn't it?


sysfs knob -> __init_printk_kthread() is protected by printk_sync_lock
mutex, obviously there can be parallel calls from user space.

-ss

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Sergey Senozhatsky]

On (04/08/16 12:04), Pan Xinhui wrote:
[..]
> > +/*
> > + * Init async printk via late_initcall, after core/arch/device/etc.
> > + * initialization.
> > + */
> > +static __init int init_printk_kthread(void)
> > +{
> > +   printk_initcall_done = true;
> > +   return __init_printk_kthread();
> hello, 
> 
> One confusion, Why not use a lock to protect __init_printk_kthread from 
> parallel call? Otherwise I think there is a race.
> But for simplicity, maybe you could write codes as below.
> 
> + int ret  = __init_printk_kthread();
> + printk_initcall_done = true;
> + return ret;
> 
> In my opinion, using a lock is better.

Hello,

I though about this, but isn't late_initcall() happening before kernel
starts /sbin/init? who can race with

late_initcall() -> init_printk_kthread() -> __init_printk_kthread()?

looking at

static int __ref kernel_init(void *unused)
{
int ret;

kernel_init_freeable();
/* need to finish all async __init code before freeing the memory */
async_synchronize_full();
free_initmem();
..

if (!try_to_run_init_process("/sbin/init") ||
!try_to_run_init_process("/etc/init") ||
!try_to_run_init_process("/bin/init") ||
!try_to_run_init_process("/bin/sh"))
return 0;

__init (and init_printk_kthread is __init) is finished and freed by the
time kernel try_to_run_init_process. isn't it?


sysfs knob -> __init_printk_kthread() is protected by printk_sync_lock
mutex, obviously there can be parallel calls from user space.

-ss

[PATCH net] tuntap: restore default qdisc

[Jason Wang]

After commit f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using
alloc_netdev"), default qdisc was changed to noqueue because
tuntap does not set tx_queue_len during .setup(). This patch restores
default qdisc by setting tx_queue_len in tun_setup().

Fixes: f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev")
Cc: Phil Sutter 
Signed-off-by: Jason Wang 
---
 drivers/net/tun.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 510e90a..2c9e45f5 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1015,7 +1015,6 @@ static void tun_net_init(struct net_device *dev)
/* Zero header length */
dev->type = ARPHRD_NONE;
dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
-   dev->tx_queue_len = TUN_READQ_SIZE;  /* We prefer our own queue 
length */
break;
 
case IFF_TAP:
@@ -1027,7 +1026,6 @@ static void tun_net_init(struct net_device *dev)
 
eth_hw_addr_random(dev);
 
-   dev->tx_queue_len = TUN_READQ_SIZE;  /* We prefer our own queue 
length */
break;
}
 }
@@ -1481,6 +1479,8 @@ static void tun_setup(struct net_device *dev)
 
dev->ethtool_ops = _ethtool_ops;
dev->destructor = tun_free_netdev;
+   /* We prefer our own queue length */
+   dev->tx_queue_len = TUN_READQ_SIZE;
 }
 
 /* Trivial set of netlink ops to allow deleting tun or tap
-- 
2.5.0

[PATCH net] tuntap: restore default qdisc

[Jason Wang]

After commit f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using
alloc_netdev"), default qdisc was changed to noqueue because
tuntap does not set tx_queue_len during .setup(). This patch restores
default qdisc by setting tx_queue_len in tun_setup().

Fixes: f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev")
Cc: Phil Sutter 
Signed-off-by: Jason Wang 
---
 drivers/net/tun.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 510e90a..2c9e45f5 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1015,7 +1015,6 @@ static void tun_net_init(struct net_device *dev)
/* Zero header length */
dev->type = ARPHRD_NONE;
dev->flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;
-   dev->tx_queue_len = TUN_READQ_SIZE;  /* We prefer our own queue 
length */
break;
 
case IFF_TAP:
@@ -1027,7 +1026,6 @@ static void tun_net_init(struct net_device *dev)
 
eth_hw_addr_random(dev);
 
-   dev->tx_queue_len = TUN_READQ_SIZE;  /* We prefer our own queue 
length */
break;
}
 }
@@ -1481,6 +1479,8 @@ static void tun_setup(struct net_device *dev)
 
dev->ethtool_ops = _ethtool_ops;
dev->destructor = tun_free_netdev;
+   /* We prefer our own queue length */
+   dev->tx_queue_len = TUN_READQ_SIZE;
 }
 
 /* Trivial set of netlink ops to allow deleting tun or tap
-- 
2.5.0

[PATCH] mmc: sdhci-pic32: remove owner assignment

[Masahiro Yamada]

A platform_driver does not need to set an owner, it will be populated
by the driver core.

Signed-off-by: Masahiro Yamada 
---

 drivers/mmc/host/sdhci-pic32.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-pic32.c b/drivers/mmc/host/sdhci-pic32.c
index 059df70..72c13b6 100644
--- a/drivers/mmc/host/sdhci-pic32.c
+++ b/drivers/mmc/host/sdhci-pic32.c
@@ -243,7 +243,6 @@ MODULE_DEVICE_TABLE(of, pic32_sdhci_id_table);
 static struct platform_driver pic32_sdhci_driver = {
.driver = {
.name   = "pic32-sdhci",
-   .owner  = THIS_MODULE,
.of_match_table = of_match_ptr(pic32_sdhci_id_table),
},
.probe  = pic32_sdhci_probe,
-- 
1.9.1

[PATCH] mmc: sdhci-pic32: remove owner assignment

[Masahiro Yamada]

A platform_driver does not need to set an owner, it will be populated
by the driver core.

Signed-off-by: Masahiro Yamada 
---

 drivers/mmc/host/sdhci-pic32.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-pic32.c b/drivers/mmc/host/sdhci-pic32.c
index 059df70..72c13b6 100644
--- a/drivers/mmc/host/sdhci-pic32.c
+++ b/drivers/mmc/host/sdhci-pic32.c
@@ -243,7 +243,6 @@ MODULE_DEVICE_TABLE(of, pic32_sdhci_id_table);
 static struct platform_driver pic32_sdhci_driver = {
.driver = {
.name   = "pic32-sdhci",
-   .owner  = THIS_MODULE,
.of_match_table = of_match_ptr(pic32_sdhci_id_table),
},
.probe  = pic32_sdhci_probe,
-- 
1.9.1

[regression] cross core scheduling frequency drop bisected to 0c313cb20732

[Mike Galbraith]

Greetings,

While measuring current NO_HZ cost to light tasks jabbering cross core
at high frequency (~7% max), I noticed that master lost an improvement
for same acquired in 4.5, so bisected it.

4.5.0
homer:~ # taskset 0xc pipe-test 1
2.367681 usecs/loop -- avg 2.367681 844.7 KHz
2.372502 usecs/loop -- avg 2.368163 844.5 KHz
2.342506 usecs/loop -- avg 2.365597 845.5 KHz
2.383029 usecs/loop -- avg 2.367341 844.8 KHz
2.321859 usecs/loop -- avg 2.362792 846.5 KHz   1.00

master
homer:~ # taskset 0xc pipe-test 1
2.797656 usecs/loop -- avg 2.797656 714.9 KHz
2.804518 usecs/loop -- avg 2.798342 714.7 KHz
2.804206 usecs/loop -- avg 2.798929 714.6 KHz
2.802887 usecs/loop -- avg 2.799324 714.5 KHz
2.801577 usecs/loop -- avg 2.799550 714.4 KHz   0.84

master 0c313cb20732 reverted
homer:~ # !taskset
homer:~ # taskset 0xc pipe-test 1
2.277494 usecs/loop -- avg 2.277494 878.2 KHz
2.320979 usecs/loop -- avg 2.281843 876.5 KHz
2.272750 usecs/loop -- avg 2.280933 876.8 KHz
2.272209 usecs/loop -- avg 2.280061 877.2 KHz
2.277279 usecs/loop -- avg 2.279783 877.3 KHz   1.03

0c313cb207326f759a58f486214288411b25d4cf is the first bad commit
commit 0c313cb207326f759a58f486214288411b25d4cf
Author: Rafael J. Wysocki 
Date:   Sun Mar 20 01:33:35 2016 +0100

cpuidle: menu: Fall back to polling if next timer event is near

Commit a9ceb78bc75c (cpuidle,menu: use interactivity_req to disable
polling) changed the behavior of the fallback state selection part
of menu_select() so it looks at interactivity_req instead of
data->next_timer_us when it makes its decision.  That effectively
caused polling to be used more often as fallback idle which led to
significant increases of energy consumption in some cases.

Commit e132b9b3bc7f (cpuidle: menu: use high confidence factors
only when considering polling) changed that logic again to be more
predictable, but that didn't help with the increased energy
consumption problem.

For this reason, go back to making decisions on which state to fall
back to based on data->next_timer_us which is the time we know for
sure something will happen rather than a prediction (which may be
inaccurate and turns out to be so often enough to be problematic).
However, take the target residency of the first proper idle state
(C1) into account, so that state is not used as the fallback one
if its target residency is greater than data->next_timer_us.

Fixes: a9ceb78bc75c (cpuidle,menu: use interactivity_req to disable polling)
Signed-off-by: Rafael J. Wysocki 
Reported-and-tested-by: Doug Smythies 

[regression] cross core scheduling frequency drop bisected to 0c313cb20732

[Mike Galbraith]

Greetings,

While measuring current NO_HZ cost to light tasks jabbering cross core
at high frequency (~7% max), I noticed that master lost an improvement
for same acquired in 4.5, so bisected it.

4.5.0
homer:~ # taskset 0xc pipe-test 1
2.367681 usecs/loop -- avg 2.367681 844.7 KHz
2.372502 usecs/loop -- avg 2.368163 844.5 KHz
2.342506 usecs/loop -- avg 2.365597 845.5 KHz
2.383029 usecs/loop -- avg 2.367341 844.8 KHz
2.321859 usecs/loop -- avg 2.362792 846.5 KHz   1.00

master
homer:~ # taskset 0xc pipe-test 1
2.797656 usecs/loop -- avg 2.797656 714.9 KHz
2.804518 usecs/loop -- avg 2.798342 714.7 KHz
2.804206 usecs/loop -- avg 2.798929 714.6 KHz
2.802887 usecs/loop -- avg 2.799324 714.5 KHz
2.801577 usecs/loop -- avg 2.799550 714.4 KHz   0.84

master 0c313cb20732 reverted
homer:~ # !taskset
homer:~ # taskset 0xc pipe-test 1
2.277494 usecs/loop -- avg 2.277494 878.2 KHz
2.320979 usecs/loop -- avg 2.281843 876.5 KHz
2.272750 usecs/loop -- avg 2.280933 876.8 KHz
2.272209 usecs/loop -- avg 2.280061 877.2 KHz
2.277279 usecs/loop -- avg 2.279783 877.3 KHz   1.03

0c313cb207326f759a58f486214288411b25d4cf is the first bad commit
commit 0c313cb207326f759a58f486214288411b25d4cf
Author: Rafael J. Wysocki 
Date:   Sun Mar 20 01:33:35 2016 +0100

cpuidle: menu: Fall back to polling if next timer event is near

Commit a9ceb78bc75c (cpuidle,menu: use interactivity_req to disable
polling) changed the behavior of the fallback state selection part
of menu_select() so it looks at interactivity_req instead of
data->next_timer_us when it makes its decision.  That effectively
caused polling to be used more often as fallback idle which led to
significant increases of energy consumption in some cases.

Commit e132b9b3bc7f (cpuidle: menu: use high confidence factors
only when considering polling) changed that logic again to be more
predictable, but that didn't help with the increased energy
consumption problem.

For this reason, go back to making decisions on which state to fall
back to based on data->next_timer_us which is the time we know for
sure something will happen rather than a prediction (which may be
inaccurate and turns out to be so often enough to be problematic).
However, take the target residency of the first proper idle state
(C1) into account, so that state is not used as the fallback one
if its target residency is greater than data->next_timer_us.

Fixes: a9ceb78bc75c (cpuidle,menu: use interactivity_req to disable polling)
Signed-off-by: Rafael J. Wysocki 
Reported-and-tested-by: Doug Smythies 

[PATCH] mm fix commmets: If SPARSEMEM, pgdata doesn't have page_ext

[Weijie Yang]

If SPARSEMEM, use page_ext in mem_section
if !SPARSEMEM, use page_ext in pgdata

Signed-off-by: Weijie Yang 
---
 include/linux/mmzone.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index c60df92..43c412c 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -1056,7 +1056,7 @@ struct mem_section {
unsigned long *pageblock_flags;
 #ifdef CONFIG_PAGE_EXTENSION
/*
-* If !SPARSEMEM, pgdat doesn't have page_ext pointer. We use
+* If SPARSEMEM, pgdat doesn't have page_ext pointer. We use
 * section. (see page_ext.h about this.)
 */
struct page_ext *page_ext;
-- 
2.6.3

[PATCH] mm fix commmets: If SPARSEMEM, pgdata doesn't have page_ext

[Weijie Yang]

If SPARSEMEM, use page_ext in mem_section
if !SPARSEMEM, use page_ext in pgdata

Signed-off-by: Weijie Yang 
---
 include/linux/mmzone.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index c60df92..43c412c 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -1056,7 +1056,7 @@ struct mem_section {
unsigned long *pageblock_flags;
 #ifdef CONFIG_PAGE_EXTENSION
/*
-* If !SPARSEMEM, pgdat doesn't have page_ext pointer. We use
+* If SPARSEMEM, pgdat doesn't have page_ext pointer. We use
 * section. (see page_ext.h about this.)
 */
struct page_ext *page_ext;
-- 
2.6.3

Re: [PATCH v4 04/14] x86/rtc: replace paravirt rtc check with platform legacy quirk

[Juergen Gross]

On 08/04/16 02:32, Luis R. Rodriguez wrote:
> On Thu, Apr 07, 2016 at 08:55:54AM -0400, Boris Ostrovsky wrote:
>> On 04/06/2016 08:06 PM, Luis R. Rodriguez wrote:
>>> We have 4 types of x86 platforms that disable RTC:
>>>
>>>   * Intel MID
>>>   * Lguest - uses paravirt
>>>   * Xen dom-U - uses paravirt
>>>   * x86 on legacy systems annotated with an ACPI legacy flag
>>>
>>> We can consolidate all of these into a platform specific legacy
>>> quirk set early in boot through i386_start_kernel() and through
>>> x86_64_start_reservations(). This deals with the RTC quirks which
>>> we can rely on through the hardware subarch, the ACPI check can
>>> be dealt with separately.
>>>
>>> v2: split the subarch check from the ACPI check, clarify
>>> on the ACPI change commit log why ordering works
>>>
>>> Suggested-by: Ingo Molnar 
>>> Signed-off-by: Luis R. Rodriguez 
> 
> <-- snip -->
> 
>>> diff --git a/arch/x86/kernel/platform-quirks.c 
>>> b/arch/x86/kernel/platform-quirks.c
>>> new file mode 100644
>>> index ..1b114ac5996f
>>> --- /dev/null
>>> +++ b/arch/x86/kernel/platform-quirks.c
>>> @@ -0,0 +1,18 @@
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +#include 
>>> +
>>> +void __init x86_early_init_platform_quirks(void)
>>> +{
>>> +   x86_platform.legacy.rtc = 1;
>>> +
>>> +   switch (boot_params.hdr.hardware_subarch) {
>>> +   case X86_SUBARCH_XEN:
>>> +   case X86_SUBARCH_LGUEST:
>>> +   case X86_SUBARCH_INTEL_MID:
>>> +   x86_platform.legacy.rtc = 0;
>>> +   break;
>>> +   }
>>> +}
>>
>> What about Xen dom0 (aka initial domain)?
> 
> Indeed, thanks for catching this, the hunk below removes the re-enablement of
> the the RTC for dom0:
> 
>>> --- a/arch/x86/xen/enlighten.c
>>> +++ b/arch/x86/xen/enlighten.c
>>> @@ -1192,7 +1192,6 @@ static const struct pv_info xen_info __initconst = {
>>>  #ifdef CONFIG_X86_64
>>> .extra_user_64bit_cs = FLAT_USER_CS64,
>>>  #endif
>>> -   .features = 0,
>>> .name = "Xen",
>>>  };
>>> @@ -1525,8 +1524,6 @@ asmlinkage __visible void __init 
>>> xen_start_kernel(void)
>>> /* Install Xen paravirt ops */
>>> pv_info = xen_info;
>>> -   if (xen_initial_domain())
>>> -   pv_info.features |= PV_SUPPORTED_RTC;
>>> pv_init_ops = xen_init_ops;
>>> if (!xen_pvh_domain()) {
>>> pv_cpu_ops = xen_cpu_ops;
> 
> This should then break dom0 unless of course you have the respective next
> patch applied and that disabled the RTC due to an ACPI setting on your
> platform. Juergen, can you check to see if that was the case for your
> testing platform on dom0 ?

Are you sure it would break? Wouldn't it just fall back to another
clock source, e.g. hpet?

I looked into my test system: seems as if add_rtc_cmos() is returning
before the .legacy.rtc test.

> This highlights a semantic gap issue. From a quick cursory review, I think
> we can address this temporarily by just using a check:
> 
> void __init x86_early_init_platform_quirks(void)
> {
>   x86_platform.legacy.rtc = 1;
> 
>   switch (boot_params.hdr.hardware_subarch) {
>   case X86_SUBARCH_XEN:
>   case X86_SUBARCH_LGUEST:
>   case X86_SUBARCH_INTEL_MID:
> - x86_platform.legacy.rtc = 0;
> + if (x86_init.mpparse.get_smp_config != x86_init_uint_noop)
> + x86_platform.legacy.rtc = 0;

No! Why don't you just use the explicit test xen_initial_domain() ?


Juergen

Re: [PATCH v4 04/14] x86/rtc: replace paravirt rtc check with platform legacy quirk

[Juergen Gross]

On 08/04/16 02:32, Luis R. Rodriguez wrote:
> On Thu, Apr 07, 2016 at 08:55:54AM -0400, Boris Ostrovsky wrote:
>> On 04/06/2016 08:06 PM, Luis R. Rodriguez wrote:
>>> We have 4 types of x86 platforms that disable RTC:
>>>
>>>   * Intel MID
>>>   * Lguest - uses paravirt
>>>   * Xen dom-U - uses paravirt
>>>   * x86 on legacy systems annotated with an ACPI legacy flag
>>>
>>> We can consolidate all of these into a platform specific legacy
>>> quirk set early in boot through i386_start_kernel() and through
>>> x86_64_start_reservations(). This deals with the RTC quirks which
>>> we can rely on through the hardware subarch, the ACPI check can
>>> be dealt with separately.
>>>
>>> v2: split the subarch check from the ACPI check, clarify
>>> on the ACPI change commit log why ordering works
>>>
>>> Suggested-by: Ingo Molnar 
>>> Signed-off-by: Luis R. Rodriguez 
> 
> <-- snip -->
> 
>>> diff --git a/arch/x86/kernel/platform-quirks.c 
>>> b/arch/x86/kernel/platform-quirks.c
>>> new file mode 100644
>>> index ..1b114ac5996f
>>> --- /dev/null
>>> +++ b/arch/x86/kernel/platform-quirks.c
>>> @@ -0,0 +1,18 @@
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +#include 
>>> +
>>> +void __init x86_early_init_platform_quirks(void)
>>> +{
>>> +   x86_platform.legacy.rtc = 1;
>>> +
>>> +   switch (boot_params.hdr.hardware_subarch) {
>>> +   case X86_SUBARCH_XEN:
>>> +   case X86_SUBARCH_LGUEST:
>>> +   case X86_SUBARCH_INTEL_MID:
>>> +   x86_platform.legacy.rtc = 0;
>>> +   break;
>>> +   }
>>> +}
>>
>> What about Xen dom0 (aka initial domain)?
> 
> Indeed, thanks for catching this, the hunk below removes the re-enablement of
> the the RTC for dom0:
> 
>>> --- a/arch/x86/xen/enlighten.c
>>> +++ b/arch/x86/xen/enlighten.c
>>> @@ -1192,7 +1192,6 @@ static const struct pv_info xen_info __initconst = {
>>>  #ifdef CONFIG_X86_64
>>> .extra_user_64bit_cs = FLAT_USER_CS64,
>>>  #endif
>>> -   .features = 0,
>>> .name = "Xen",
>>>  };
>>> @@ -1525,8 +1524,6 @@ asmlinkage __visible void __init 
>>> xen_start_kernel(void)
>>> /* Install Xen paravirt ops */
>>> pv_info = xen_info;
>>> -   if (xen_initial_domain())
>>> -   pv_info.features |= PV_SUPPORTED_RTC;
>>> pv_init_ops = xen_init_ops;
>>> if (!xen_pvh_domain()) {
>>> pv_cpu_ops = xen_cpu_ops;
> 
> This should then break dom0 unless of course you have the respective next
> patch applied and that disabled the RTC due to an ACPI setting on your
> platform. Juergen, can you check to see if that was the case for your
> testing platform on dom0 ?

Are you sure it would break? Wouldn't it just fall back to another
clock source, e.g. hpet?

I looked into my test system: seems as if add_rtc_cmos() is returning
before the .legacy.rtc test.

> This highlights a semantic gap issue. From a quick cursory review, I think
> we can address this temporarily by just using a check:
> 
> void __init x86_early_init_platform_quirks(void)
> {
>   x86_platform.legacy.rtc = 1;
> 
>   switch (boot_params.hdr.hardware_subarch) {
>   case X86_SUBARCH_XEN:
>   case X86_SUBARCH_LGUEST:
>   case X86_SUBARCH_INTEL_MID:
> - x86_platform.legacy.rtc = 0;
> + if (x86_init.mpparse.get_smp_config != x86_init_uint_noop)
> + x86_platform.legacy.rtc = 0;

No! Why don't you just use the explicit test xen_initial_domain() ?


Juergen

Re: [PATCH 2/2] arm64: Fix watchpoint recursion when single-step is wrongly triggered in irq

[Pratyush Anand]

Hi Li,

On 07/04/2016:07:34:37 PM, Li Bin wrote:
> Hi Pratyush,
> 
> on 2016/4/4 13:17, Pratyush Anand wrote:
> > Hi Li,
> > 
> > On 31/03/2016:08:45:05 PM, Li Bin wrote:
> >> Hi Pratyush,
> >>
> >> on 2016/3/21 18:24, Pratyush Anand wrote:
> >>> On 21/03/2016:08:37:50 AM, He Kuang wrote:
>  On arm64, watchpoint handler enables single-step to bypass the next
>  instruction for not recursive enter. If an irq is triggered right
>  after the watchpoint, a single-step will be wrongly triggered in irq
>  handler, which causes the watchpoint address not stepped over and
>  system hang.
> >>>
> >>> Does patch [1] resolves this issue as well? I hope it should. Patch[1] 
> >>> has still
> >>> not been sent for review. Your test result will be helpful.
> >>>
> >>> ~Pratyush
> >>>
> >>> [1] 
> >>> https://github.com/pratyushanand/linux/commit/7623c8099ac22eaa00e7e0f52430f7a4bd154652
> >>
> >> This patch did not consider that, when excetpion return, the singlestep 
> >> flag
> >> should be restored, otherwise the right singlestep will not triggered.
> >> Right?
> > 
> > Yes, you are right, and there are other problems as well. Will Deacon 
> > pointed
> > out [1] that kernel debugging is per-cpu rather than per-task. So, I did 
> > thought
> > of a per-cpu implementation by introducing a new element "flags" in struct
> > pt_regs. But even with that I see issues. For example:
> > - While executing single step instruction, we get a data abort
> > - In the kernel_entry of data abort we disable single stepping based on 
> > "flags"
> >   bit field
> > - While handling data abort we receive anther interrupt, so we are again in
> >   kernel_entry (for el1_irq). Single stepping will be disabled again 
> > (although
> >   it does not matter).
> > 
> > Now the issue is that, what condition should be verified in kernel_exit for
> > enabling single step again? In the above scenario, kernel_exit for el1_irq
> > should not enable single stepping, but how to prevent that elegantly?
> 
> The condition for kernel_entry to disable the single step is that MDSCR_EL1.SS
> has been set. And only when the corresponding kernel_entry has disabled the 
> single
> step, the kernel_exit should enable it, but the kernel_exit of single-step 
> exception
> should be handled specially, that when disable single step in single-step 
> exception
> handler, flag of pt_regs stored in stack should be cleard to prevent to be 
> re-enabled
> by kernel_exit.

Nice, :-)
I had latter on almost similar patch [1], but it did fail when I merged two of
the tests.
-- I inserted kprobe to an instruction in function __copy_to_user() which could
generate data abort.
-- In parallel I also run test case which is defined here [2]
-- As soon as I did `cat /proc/version`, kernel crashed.

Although, just by comparing visually I do not see any functional difference with
the patch you inlined below, still can you please try both of the above test
case in parallel and see how does it behave? To insert kprobe within
__copy_to_user() you need to revert "arm64: add copy_to/from_user to kprobes
blacklist".

[1] 
https://github.com/pratyushanand/linux/commit/9182afbe640ea7caf52e209eb8e5f00bdf91b0c0
[2] http://thread.gmane.org/gmane.linux.kernel/2167918
> 
> Thanks,
> Li Bin
> 
> ---
>  arch/arm64/include/asm/assembler.h  |   11 +++
>  arch/arm64/include/asm/debug-monitors.h |2 +-
>  arch/arm64/include/asm/ptrace.h |2 ++
>  arch/arm64/kernel/asm-offsets.c |1 +
>  arch/arm64/kernel/debug-monitors.c  |3 ++-
>  arch/arm64/kernel/entry.S   |   18 ++
>  arch/arm64/kernel/hw_breakpoint.c   |2 +-
>  arch/arm64/kernel/kgdb.c|2 +-
>  8 files changed, 37 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/assembler.h 
> b/arch/arm64/include/asm/assembler.h
> index 70f7b9e..56a4335 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -60,6 +60,17 @@
>   msr daifclr, #8
>   .endm
> 
> + .macro  disable_step, orig
> + bic \orig, \orig, #1
> + msr mdscr_el1, \orig
> + .endm
> +
> + .macro  enable_step, orig
> + disable_dbg
> + orr \orig, \orig, #1
> + msr mdscr_el1, \orig
> + .endm
> +
>   .macro  disable_step_tsk, flgs, tmp
>   tbz \flgs, #TIF_SINGLESTEP, 9990f
>   mrs \tmp, mdscr_el1
> diff --git a/arch/arm64/include/asm/debug-monitors.h 
> b/arch/arm64/include/asm/debug-monitors.h
> index 2fcb9b7..50f114c 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -115,7 +115,7 @@ void user_rewind_single_step(struct task_struct *task);
>  void user_fastforward_single_step(struct task_struct *task);
> 
>  void kernel_enable_single_step(struct pt_regs *regs);
> -void kernel_disable_single_step(void);
> +void kernel_disable_single_step(struct pt_regs *regs);
>  int 

Re: [PATCH 2/2] arm64: Fix watchpoint recursion when single-step is wrongly triggered in irq

[Pratyush Anand]

Hi Li,

On 07/04/2016:07:34:37 PM, Li Bin wrote:
> Hi Pratyush,
> 
> on 2016/4/4 13:17, Pratyush Anand wrote:
> > Hi Li,
> > 
> > On 31/03/2016:08:45:05 PM, Li Bin wrote:
> >> Hi Pratyush,
> >>
> >> on 2016/3/21 18:24, Pratyush Anand wrote:
> >>> On 21/03/2016:08:37:50 AM, He Kuang wrote:
>  On arm64, watchpoint handler enables single-step to bypass the next
>  instruction for not recursive enter. If an irq is triggered right
>  after the watchpoint, a single-step will be wrongly triggered in irq
>  handler, which causes the watchpoint address not stepped over and
>  system hang.
> >>>
> >>> Does patch [1] resolves this issue as well? I hope it should. Patch[1] 
> >>> has still
> >>> not been sent for review. Your test result will be helpful.
> >>>
> >>> ~Pratyush
> >>>
> >>> [1] 
> >>> https://github.com/pratyushanand/linux/commit/7623c8099ac22eaa00e7e0f52430f7a4bd154652
> >>
> >> This patch did not consider that, when excetpion return, the singlestep 
> >> flag
> >> should be restored, otherwise the right singlestep will not triggered.
> >> Right?
> > 
> > Yes, you are right, and there are other problems as well. Will Deacon 
> > pointed
> > out [1] that kernel debugging is per-cpu rather than per-task. So, I did 
> > thought
> > of a per-cpu implementation by introducing a new element "flags" in struct
> > pt_regs. But even with that I see issues. For example:
> > - While executing single step instruction, we get a data abort
> > - In the kernel_entry of data abort we disable single stepping based on 
> > "flags"
> >   bit field
> > - While handling data abort we receive anther interrupt, so we are again in
> >   kernel_entry (for el1_irq). Single stepping will be disabled again 
> > (although
> >   it does not matter).
> > 
> > Now the issue is that, what condition should be verified in kernel_exit for
> > enabling single step again? In the above scenario, kernel_exit for el1_irq
> > should not enable single stepping, but how to prevent that elegantly?
> 
> The condition for kernel_entry to disable the single step is that MDSCR_EL1.SS
> has been set. And only when the corresponding kernel_entry has disabled the 
> single
> step, the kernel_exit should enable it, but the kernel_exit of single-step 
> exception
> should be handled specially, that when disable single step in single-step 
> exception
> handler, flag of pt_regs stored in stack should be cleard to prevent to be 
> re-enabled
> by kernel_exit.

Nice, :-)
I had latter on almost similar patch [1], but it did fail when I merged two of
the tests.
-- I inserted kprobe to an instruction in function __copy_to_user() which could
generate data abort.
-- In parallel I also run test case which is defined here [2]
-- As soon as I did `cat /proc/version`, kernel crashed.

Although, just by comparing visually I do not see any functional difference with
the patch you inlined below, still can you please try both of the above test
case in parallel and see how does it behave? To insert kprobe within
__copy_to_user() you need to revert "arm64: add copy_to/from_user to kprobes
blacklist".

[1] 
https://github.com/pratyushanand/linux/commit/9182afbe640ea7caf52e209eb8e5f00bdf91b0c0
[2] http://thread.gmane.org/gmane.linux.kernel/2167918
> 
> Thanks,
> Li Bin
> 
> ---
>  arch/arm64/include/asm/assembler.h  |   11 +++
>  arch/arm64/include/asm/debug-monitors.h |2 +-
>  arch/arm64/include/asm/ptrace.h |2 ++
>  arch/arm64/kernel/asm-offsets.c |1 +
>  arch/arm64/kernel/debug-monitors.c  |3 ++-
>  arch/arm64/kernel/entry.S   |   18 ++
>  arch/arm64/kernel/hw_breakpoint.c   |2 +-
>  arch/arm64/kernel/kgdb.c|2 +-
>  8 files changed, 37 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/assembler.h 
> b/arch/arm64/include/asm/assembler.h
> index 70f7b9e..56a4335 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -60,6 +60,17 @@
>   msr daifclr, #8
>   .endm
> 
> + .macro  disable_step, orig
> + bic \orig, \orig, #1
> + msr mdscr_el1, \orig
> + .endm
> +
> + .macro  enable_step, orig
> + disable_dbg
> + orr \orig, \orig, #1
> + msr mdscr_el1, \orig
> + .endm
> +
>   .macro  disable_step_tsk, flgs, tmp
>   tbz \flgs, #TIF_SINGLESTEP, 9990f
>   mrs \tmp, mdscr_el1
> diff --git a/arch/arm64/include/asm/debug-monitors.h 
> b/arch/arm64/include/asm/debug-monitors.h
> index 2fcb9b7..50f114c 100644
> --- a/arch/arm64/include/asm/debug-monitors.h
> +++ b/arch/arm64/include/asm/debug-monitors.h
> @@ -115,7 +115,7 @@ void user_rewind_single_step(struct task_struct *task);
>  void user_fastforward_single_step(struct task_struct *task);
> 
>  void kernel_enable_single_step(struct pt_regs *regs);
> -void kernel_disable_single_step(void);
> +void kernel_disable_single_step(struct pt_regs *regs);
>  int 

[PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

[Chanwoo Choi]

This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidht for AMBA AXI bus.

The WCORE bus bus is parent device in INT block using VDD_INT.

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 99 ++
 1 file changed, 99 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 
b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 1bd507bfa750..2a74abe6fc5d 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -361,6 +361,22 @@
cap-sd-highspeed;
 };
 
+_mem0_0 {
+   status = "okay";
+};
+
+_mem0_1 {
+   status = "okay";
+};
+
+_mem0_2 {
+   status = "okay";
+};
+
+_mem0_3 {
+   status = "okay";
+};
+
 _0 {
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
@@ -432,3 +448,86 @@
vdd33-supply = <_reg>;
vdd10-supply = <_reg>;
 };
+
+_wcore {
+   devfreq-events = <_mem0_0>, <_mem0_1>,
+   <_mem0_2>, <_mem0_3>;
+   vdd-supply = <_reg>;
+   exynos,saturation-ratio = <100>;
+   status = "okay";
+};
+
+_noc {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys_apb {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys2 {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_gen {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_g2d {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_g2d_acp {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_jpeg {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_jpeg_apb {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_disp1_fimd {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_disp1 {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_gscl_scaler {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_mscl {
+   devfreq = <_wcore>;
+   status = "okay";
+};
-- 
1.9.1

[PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

[Chanwoo Choi]

This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidht for AMBA AXI bus.

The WCORE bus bus is parent device in INT block using VDD_INT.

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 99 ++
 1 file changed, 99 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 
b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 1bd507bfa750..2a74abe6fc5d 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -361,6 +361,22 @@
cap-sd-highspeed;
 };
 
+_mem0_0 {
+   status = "okay";
+};
+
+_mem0_1 {
+   status = "okay";
+};
+
+_mem0_2 {
+   status = "okay";
+};
+
+_mem0_3 {
+   status = "okay";
+};
+
 _0 {
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
@@ -432,3 +448,86 @@
vdd33-supply = <_reg>;
vdd10-supply = <_reg>;
 };
+
+_wcore {
+   devfreq-events = <_mem0_0>, <_mem0_1>,
+   <_mem0_2>, <_mem0_3>;
+   vdd-supply = <_reg>;
+   exynos,saturation-ratio = <100>;
+   status = "okay";
+};
+
+_noc {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys_apb {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_fsys2 {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_gen {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_g2d {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_g2d_acp {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_jpeg {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_jpeg_apb {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_disp1_fimd {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_disp1 {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_gscl_scaler {
+   devfreq = <_wcore>;
+   status = "okay";
+};
+
+_mscl {
+   devfreq = <_wcore>;
+   status = "okay";
+};
-- 
1.9.1

[PATCH 3/7] ARM: dts: Add NoC Probe dt node for Exynos542x SoC

[Chanwoo Choi]

This patch adds the NoCP (Network on Chip Probe) Device Tree node
to measure the bandwidth of memory and g3d in Exynos542x SoC.

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5420.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 7b99cb58d82d..d80f3b66f017 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -294,6 +294,42 @@
};
};
 
+   nocp_mem0_0: nocp_mem0_0@10CA1000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_1: nocp_mem0_1@10CA1400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1400 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_2: nocp_mem0_2@10CA1800 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1800 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_3: nocp_mem0_3@10CA1C00 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1C00 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_0: nocp_g3d_0@11A51000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_1: nocp_g3d_1@11A51400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51400 0x200>;
+   status = "disabled";
+   };
+
gsc_pd: power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
-- 
1.9.1

[PATCH 1/7] PM / devfreq: event: Add new Exynos NoC probe driver

[Chanwoo Choi]

This patch adds NoC (Network on Chip) Probe driver which provides
the primitive values to get the performance data. The packets that the Network
on Chip (NoC) probes detects are transported over the network infrastructure.
Exynos542x bus has multiple NoC probes to provide bandwidth information about
behavior of the SoC that you can use while analyzing system performance.

Signed-off-by: Chanwoo Choi 
---
 .../bindings/devfreq/event/exynos-nocp.txt |  86 +++
 drivers/devfreq/event/Kconfig  |   8 +
 drivers/devfreq/event/Makefile |   2 +
 drivers/devfreq/event/exynos-nocp.c| 247 +
 drivers/devfreq/event/exynos-nocp.h|  78 +++
 5 files changed, 421 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
 create mode 100644 drivers/devfreq/event/exynos-nocp.c
 create mode 100644 drivers/devfreq/event/exynos-nocp.h

diff --git a/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt 
b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
new file mode 100644
index ..03b74fed034c
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
@@ -0,0 +1,86 @@
+
+* Samsung Exynos NoC (Network on Chip) Probe device
+
+The Samsung Exynos542x SoC has NoC (Network on Chip) Probe for NoC bus.
+NoC provides the primitive values to get the performance data. The packets
+that the Network on Chip (NoC) probes detects are transported over
+the network infrastructure to observer units. You can configure probes to
+capture packets with header or data on the data request response network,
+or as traffic debug or statistic collectors. Exynos542x bus has multiple
+NoC probes to provide bandwidth information about behavior of the SoC
+that you can use while analyzing system performance.
+
+Required properties:
+- compatible: Should be "samsung,exynos5420-nocp"
+- reg: physical base address of each NoC Probe and length of memory mapped 
region.
+
+Optional properties:
+- clock-names : the name of clock used by the NoC Probe, "nocp"
+- clocks : phandles for clock specified in "clock-names" property
+
+Example1 : NoC Probe nodes in exynos5420.dtsi are listed below.
+
+   nocp_mem0_0: nocp_mem0_0@10CA1000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_1: nocp_mem0_1@10CA1400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1400 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_2: nocp_mem0_2@10CA1800 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1800 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_3: nocp_mem0_0@10CA1C00 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1C00 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_0: nocp_g3d_0@11A51000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_1: nocp_g3d_1@11A51400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51400 0x200>;
+   status = "disabled";
+   };
+
+
+Example2 : Events of each NoC Probe node in exynos5422-odroidxu3-common.dtsi
+   are listed below.
+
+
+   _mem0_0 {
+   status = "okay";
+   };
+
+   _mem0_1 {
+   status = "okay";
+   };
+
+   _mem0_2 {
+   status = "okay";
+   };
+
+   _mem0_3 {
+   status = "okay";
+   };
+
+   _g3d_0 {
+   status = "okay";
+   };
+
+   _g3d_1 {
+   status = "okay";
+   };
diff --git a/drivers/devfreq/event/Kconfig b/drivers/devfreq/event/Kconfig
index a11720affc31..1e8b4f469f38 100644
--- a/drivers/devfreq/event/Kconfig
+++ b/drivers/devfreq/event/Kconfig
@@ -13,6 +13,14 @@ menuconfig PM_DEVFREQ_EVENT
 
 if PM_DEVFREQ_EVENT
 
+config DEVFREQ_EVENT_EXYNOS_NOCP
+   bool "EXYNOS NoC (Network On Chip) Probe DEVFREQ event Driver"
+   depends on ARCH_EXYNOS
+   select PM_OPP
+   help
+ This add the devfreq-event driver for Exynos SoC. It provides NoC
+ (Network on Chip) Probe counters to measure the bandwidth of AXI bus.
+
 config DEVFREQ_EVENT_EXYNOS_PPMU
bool "EXYNOS PPMU (Platform Performance Monitoring Unit) DEVFREQ event 
Driver"
depends on ARCH_EXYNOS
diff --git a/drivers/devfreq/event/Makefile b/drivers/devfreq/event/Makefile
index be146ead79cf..3d6afd352253 100644
--- a/drivers/devfreq/event/Makefile
+++ b/drivers/devfreq/event/Makefile
@@ -1,2 +1,4 @@
 # Exynos DEVFREQ Event Drivers
+
+obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP) += exynos-nocp.o
 

[PATCH 3/7] ARM: dts: Add NoC Probe dt node for Exynos542x SoC

[Chanwoo Choi]

This patch adds the NoCP (Network on Chip Probe) Device Tree node
to measure the bandwidth of memory and g3d in Exynos542x SoC.

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5420.dtsi | 36 
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index 7b99cb58d82d..d80f3b66f017 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -294,6 +294,42 @@
};
};
 
+   nocp_mem0_0: nocp_mem0_0@10CA1000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_1: nocp_mem0_1@10CA1400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1400 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_2: nocp_mem0_2@10CA1800 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1800 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_3: nocp_mem0_3@10CA1C00 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1C00 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_0: nocp_g3d_0@11A51000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_1: nocp_g3d_1@11A51400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51400 0x200>;
+   status = "disabled";
+   };
+
gsc_pd: power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
-- 
1.9.1

[PATCH 1/7] PM / devfreq: event: Add new Exynos NoC probe driver

[Chanwoo Choi]

This patch adds NoC (Network on Chip) Probe driver which provides
the primitive values to get the performance data. The packets that the Network
on Chip (NoC) probes detects are transported over the network infrastructure.
Exynos542x bus has multiple NoC probes to provide bandwidth information about
behavior of the SoC that you can use while analyzing system performance.

Signed-off-by: Chanwoo Choi 
---
 .../bindings/devfreq/event/exynos-nocp.txt |  86 +++
 drivers/devfreq/event/Kconfig  |   8 +
 drivers/devfreq/event/Makefile |   2 +
 drivers/devfreq/event/exynos-nocp.c| 247 +
 drivers/devfreq/event/exynos-nocp.h|  78 +++
 5 files changed, 421 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
 create mode 100644 drivers/devfreq/event/exynos-nocp.c
 create mode 100644 drivers/devfreq/event/exynos-nocp.h

diff --git a/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt 
b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
new file mode 100644
index ..03b74fed034c
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
@@ -0,0 +1,86 @@
+
+* Samsung Exynos NoC (Network on Chip) Probe device
+
+The Samsung Exynos542x SoC has NoC (Network on Chip) Probe for NoC bus.
+NoC provides the primitive values to get the performance data. The packets
+that the Network on Chip (NoC) probes detects are transported over
+the network infrastructure to observer units. You can configure probes to
+capture packets with header or data on the data request response network,
+or as traffic debug or statistic collectors. Exynos542x bus has multiple
+NoC probes to provide bandwidth information about behavior of the SoC
+that you can use while analyzing system performance.
+
+Required properties:
+- compatible: Should be "samsung,exynos5420-nocp"
+- reg: physical base address of each NoC Probe and length of memory mapped 
region.
+
+Optional properties:
+- clock-names : the name of clock used by the NoC Probe, "nocp"
+- clocks : phandles for clock specified in "clock-names" property
+
+Example1 : NoC Probe nodes in exynos5420.dtsi are listed below.
+
+   nocp_mem0_0: nocp_mem0_0@10CA1000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_1: nocp_mem0_1@10CA1400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1400 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_2: nocp_mem0_2@10CA1800 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1800 0x200>;
+   status = "disabled";
+   };
+
+   nocp_mem0_3: nocp_mem0_0@10CA1C00 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x10CA1C00 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_0: nocp_g3d_0@11A51000 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51000 0x200>;
+   status = "disabled";
+   };
+
+   nocp_g3d_1: nocp_g3d_1@11A51400 {
+   compatible = "samsung,exynos5420-nocp";
+   reg = <0x11A51400 0x200>;
+   status = "disabled";
+   };
+
+
+Example2 : Events of each NoC Probe node in exynos5422-odroidxu3-common.dtsi
+   are listed below.
+
+
+   _mem0_0 {
+   status = "okay";
+   };
+
+   _mem0_1 {
+   status = "okay";
+   };
+
+   _mem0_2 {
+   status = "okay";
+   };
+
+   _mem0_3 {
+   status = "okay";
+   };
+
+   _g3d_0 {
+   status = "okay";
+   };
+
+   _g3d_1 {
+   status = "okay";
+   };
diff --git a/drivers/devfreq/event/Kconfig b/drivers/devfreq/event/Kconfig
index a11720affc31..1e8b4f469f38 100644
--- a/drivers/devfreq/event/Kconfig
+++ b/drivers/devfreq/event/Kconfig
@@ -13,6 +13,14 @@ menuconfig PM_DEVFREQ_EVENT
 
 if PM_DEVFREQ_EVENT
 
+config DEVFREQ_EVENT_EXYNOS_NOCP
+   bool "EXYNOS NoC (Network On Chip) Probe DEVFREQ event Driver"
+   depends on ARCH_EXYNOS
+   select PM_OPP
+   help
+ This add the devfreq-event driver for Exynos SoC. It provides NoC
+ (Network on Chip) Probe counters to measure the bandwidth of AXI bus.
+
 config DEVFREQ_EVENT_EXYNOS_PPMU
bool "EXYNOS PPMU (Platform Performance Monitoring Unit) DEVFREQ event 
Driver"
depends on ARCH_EXYNOS
diff --git a/drivers/devfreq/event/Makefile b/drivers/devfreq/event/Makefile
index be146ead79cf..3d6afd352253 100644
--- a/drivers/devfreq/event/Makefile
+++ b/drivers/devfreq/event/Makefile
@@ -1,2 +1,4 @@
 # Exynos DEVFREQ Event Drivers
+
+obj-$(CONFIG_DEVFREQ_EVENT_EXYNOS_NOCP) += exynos-nocp.o
 

[PATCH 2/7] PM / devfreq: exynos: Add the detailed correlation for Exynos5422 bus

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and power line
for Exynos5422.

Signed-off-by: Chanwoo Choi 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt| 19 +++
 1 file changed, 19 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index b098fa2ba5d4..5a37f51adacf 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -104,6 +104,25 @@ Detailed correlation between sub-blocks and power line 
according to Exynos SoC:
|--- LCD0
|--- ISP
 
+- In case of Exynos5422, there are two power line as following:
+   VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)
+   |--- DREX 1
+
+   VDD_INT |--- NoC_Core (parent device)
+   |--- G2D
+   |--- G3D
+   |--- DISP1
+   |--- NoC_WCORE
+   |--- GSCL
+   |--- MSCL
+   |--- ISP
+   |--- MFC
+   |--- GEN
+   |--- PERIS
+   |--- PERIC
+   |--- FSYS
+   |--- FSYS2
+
 Example1:
Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH 4/7] dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC

[Chanwoo Choi]

This patch adds the clock id for ACLK clock of Exynos542x SoC. ACLK clock mean
the source clock of AMBA AXI bus. This clock id should be used for Bus
frequency scaling.

Cc: Sylwester Nawrocki 
Cc: Tomasz Figa 
Signed-off-by: Chanwoo Choi 
---
 include/dt-bindings/clock/exynos5420.h | 24 +++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/exynos5420.h 
b/include/dt-bindings/clock/exynos5420.h
index 7699ee9c16c0..17ab8394bec7 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -217,8 +217,30 @@
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL 768
+#define CLK_DOUT_ACLK400_WCORE 769
+#define CLK_DOUT_ACLK400_ISP   770
+#define CLK_DOUT_ACLK400_MSCL  771
+#define CLK_DOUT_ACLK200   772
+#define CLK_DOUT_ACLK200_FSYS2 773
+#define CLK_DOUT_ACLK100_NOC   774
+#define CLK_DOUT_PCLK200_FSYS  775
+#define CLK_DOUT_ACLK200_FSYS  776
+#define CLK_DOUT_ACLK333_432_GSCL  777
+#define CLK_DOUT_ACLK333_432_ISP   778
+#define CLK_DOUT_ACLK66779
+#define CLK_DOUT_ACLK333_432_ISP0  780
+#define CLK_DOUT_ACLK266   781
+#define CLK_DOUT_ACLK166   782
+#define CLK_DOUT_ACLK333   783
+#define CLK_DOUT_ACLK333_G2D   784
+#define CLK_DOUT_ACLK266_G2D   785
+#define CLK_DOUT_ACLK_G3D  786
+#define CLK_DOUT_ACLK300_JPEG  787
+#define CLK_DOUT_ACLK300_DISP1 788
+#define CLK_DOUT_ACLK300_GSCL  789
+#define CLK_DOUT_ACLK400_DISP1 790
 
 /* must be greater than maximal clock id */
-#define CLK_NR_CLKS769
+#define CLK_NR_CLKS791
 
 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */
-- 
1.9.1

[PATCH 2/7] PM / devfreq: exynos: Add the detailed correlation for Exynos5422 bus

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and power line
for Exynos5422.

Signed-off-by: Chanwoo Choi 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt| 19 +++
 1 file changed, 19 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index b098fa2ba5d4..5a37f51adacf 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -104,6 +104,25 @@ Detailed correlation between sub-blocks and power line 
according to Exynos SoC:
|--- LCD0
|--- ISP
 
+- In case of Exynos5422, there are two power line as following:
+   VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)
+   |--- DREX 1
+
+   VDD_INT |--- NoC_Core (parent device)
+   |--- G2D
+   |--- G3D
+   |--- DISP1
+   |--- NoC_WCORE
+   |--- GSCL
+   |--- MSCL
+   |--- ISP
+   |--- MFC
+   |--- GEN
+   |--- PERIS
+   |--- PERIC
+   |--- FSYS
+   |--- FSYS2
+
 Example1:
Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH 4/7] dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC

[Chanwoo Choi]

This patch adds the clock id for ACLK clock of Exynos542x SoC. ACLK clock mean
the source clock of AMBA AXI bus. This clock id should be used for Bus
frequency scaling.

Cc: Sylwester Nawrocki 
Cc: Tomasz Figa 
Signed-off-by: Chanwoo Choi 
---
 include/dt-bindings/clock/exynos5420.h | 24 +++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/exynos5420.h 
b/include/dt-bindings/clock/exynos5420.h
index 7699ee9c16c0..17ab8394bec7 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -217,8 +217,30 @@
 
 /* divider clocks */
 #define CLK_DOUT_PIXEL 768
+#define CLK_DOUT_ACLK400_WCORE 769
+#define CLK_DOUT_ACLK400_ISP   770
+#define CLK_DOUT_ACLK400_MSCL  771
+#define CLK_DOUT_ACLK200   772
+#define CLK_DOUT_ACLK200_FSYS2 773
+#define CLK_DOUT_ACLK100_NOC   774
+#define CLK_DOUT_PCLK200_FSYS  775
+#define CLK_DOUT_ACLK200_FSYS  776
+#define CLK_DOUT_ACLK333_432_GSCL  777
+#define CLK_DOUT_ACLK333_432_ISP   778
+#define CLK_DOUT_ACLK66779
+#define CLK_DOUT_ACLK333_432_ISP0  780
+#define CLK_DOUT_ACLK266   781
+#define CLK_DOUT_ACLK166   782
+#define CLK_DOUT_ACLK333   783
+#define CLK_DOUT_ACLK333_G2D   784
+#define CLK_DOUT_ACLK266_G2D   785
+#define CLK_DOUT_ACLK_G3D  786
+#define CLK_DOUT_ACLK300_JPEG  787
+#define CLK_DOUT_ACLK300_DISP1 788
+#define CLK_DOUT_ACLK300_GSCL  789
+#define CLK_DOUT_ACLK400_DISP1 790
 
 /* must be greater than maximal clock id */
-#define CLK_NR_CLKS769
+#define CLK_NR_CLKS791
 
 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */
-- 
1.9.1

[PATCH 6/7] ARM: dts: Add bus nodes using VDD_INT for Exynos542x SoC

[Chanwoo Choi]

This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC.
Exynos542x has the following AMBA buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed correlation between sub-block and clock:
- CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI
- CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI
- CLK_DOUT_PCLK200_FSYS for FSYS's APB
- CLK_DOUT_ACLK200_FSYS for FSYS's AXI
- CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI
- CLK_DOUT_ACLK333 for MFC's AXI
- CLK_DOUT_ACLK266 for GEN's AXI
- CLK_DOUT_ACLK66 for PERIC/PERIR's AXI
- CLK_DOUT_ACLK333_G2D for G2D's AXI
- CLK_DOUT_ACLK266_G2D for ACP's AXI
- CLK_DOUT_ACLK300_JPEG for JPEG's AXI
- CLK_DOUT_ACLK166 for JPEG's APB
- CLK_DOUT_ACLK300_DISP1 for FIMD's AXI
- CLK_DOUT_ACLK400_DISP1 for DISP1's AXI
- CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI
- CLK_DOUT_ACLK400_MSCL for MSCL's AXI

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5420.dtsi | 371 ++
 1 file changed, 371 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d80f3b66f017..1340024fa882 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1224,6 +1224,377 @@
power-domains = <_pd>;
#iommu-cells = <0>;
};
+
+   bus_wcore: bus_wcore {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK400_WCORE>;
+   clock-names = "bus";
+   operating-points-v2 = <_wcore_opp_table>;
+   status = "disabled";
+   };
+
+   bus_noc: bus_noc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK100_NOC>;
+   clock-names = "bus";
+   operating-points-v2 = <_noc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys_apb: bus_fsys_apb {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_PCLK200_FSYS>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK200_FSYS>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys2: bus_fsys2 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK200_FSYS2>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys2_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK333>;
+   clock-names = "bus";
+   operating-points-v2 = <_mfc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_gen: bus_gen {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK266>;
+   clock-names = "bus";
+   operating-points-v2 = <_gen_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK66>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_g2d: bus_g2d {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK333_G2D>;
+   clock-names = "bus";
+   operating-points-v2 = <_g2d_opp_table>;
+   status = "disabled";
+   };
+
+   bus_g2d_acp: bus_g2d_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK266_G2D>;
+   clock-names = "bus";
+   operating-points-v2 = <_g2d_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_jpeg: bus_jpeg {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK300_JPEG>;
+   clock-names = "bus";
+   operating-points-v2 = <_jpeg_opp_table>;
+   status = "disabled";
+   };
+
+   bus_jpeg_apb: bus_jpeg_apb {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK166>;
+   clock-names = "bus";
+   operating-points-v2 = <_jpeg_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_disp1_fimd: bus_disp1_fimd {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK300_DISP1>;
+   clock-names = "bus";
+   operating-points-v2 = <_disp1_fimd_opp_table>;
+   status = "disabled";
+   };
+
+   bus_disp1: bus_disp1 {

[PATCH 5/7] clk: samsung: exynos542x: Add the clock id for ACLK

[Chanwoo Choi]

This patch adds the clock id for ACLK clock which is source clock of AMBA AXI
Bus. This clock should be handled in Bus frequency scaling driver.

Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5420.c | 85 +++-
 1 file changed, 55 insertions(+), 30 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index be03ed0fcb6b..d7c62dfb1646 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -554,8 +554,9 @@ static struct samsung_mux_clock exynos5800_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_div_clock exynos5800_div_clks[] __initdata = {
-   DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore", DIV_TOP0, 16, 3),
-
+   DIV_F(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
+   "mout_aclk400_wcore",
+   DIV_TOP0, 16, 3, CLK_SET_RATE_PARENT, 0),
DIV(0, "dout_aclk550_cam", "mout_aclk550_cam",
DIV_TOP8, 16, 3),
DIV(0, "dout_aclkfl1_550_cam", "mout_aclkfl1_550_cam",
@@ -607,8 +608,9 @@ static struct samsung_mux_clock exynos5420_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_div_clock exynos5420_div_clks[] __initdata = {
-   DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll",
-   DIV_TOP0, 16, 3),
+   DIV_F(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
+   "mout_aclk400_wcore_bpll",
+   DIV_TOP0, 16, 3, CLK_SET_RATE_PARENT, 0),
 };
 
 static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
@@ -785,31 +787,52 @@ static struct samsung_div_clock exynos5x_div_clks[] 
__initdata = {
DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3),
DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3),
 
-   DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3),
-   DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3),
-   DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3),
-   DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3),
-   DIV(0, "dout_aclk100_noc", "mout_aclk100_noc", DIV_TOP0, 20, 3),
-   DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3),
-   DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3),
-
-   DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl",
-   DIV_TOP1, 0, 3),
-   DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp",
-   DIV_TOP1, 4, 3),
-   DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6),
-   DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0",
-   DIV_TOP1, 16, 3),
-   DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3),
-   DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3),
-   DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3),
-
-   DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3),
-   DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3),
-   DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3),
-   DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3),
-   DIV(0, "dout_aclk300_disp1", "mout_aclk300_disp1", DIV_TOP2, 24, 3),
-   DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3),
+   DIV_F(CLK_DOUT_ACLK400_ISP, "dout_aclk400_isp", "mout_aclk400_isp",
+   DIV_TOP0, 0, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK400_MSCL, "dout_aclk400_mscl", "mout_aclk400_mscl",
+   DIV_TOP0, 4, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200, "dout_aclk200", "mout_aclk200",
+   DIV_TOP0, 8, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200_FSYS2, "dout_aclk200_fsys2",
+   "mout_aclk200_fsys2",
+   DIV_TOP0, 12, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK100_NOC, "dout_aclk100_noc", "mout_aclk100_noc",
+   DIV_TOP0, 20, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_PCLK200_FSYS, "dout_pclk200_fsys", "mout_pclk200_fsys",
+   DIV_TOP0, 24, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200_FSYS, "dout_aclk200_fsys", "mout_aclk200_fsys",
+   DIV_TOP0, 28, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_GSCL, "dout_aclk333_432_gscl",
+   "mout_aclk333_432_gscl",
+   DIV_TOP1, 0, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_ISP, "dout_aclk333_432_isp",
+   "mout_aclk333_432_isp",
+   DIV_TOP1, 4, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK66, "dout_aclk66", "mout_aclk66",
+   DIV_TOP1, 8, 6, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_ISP0, "dout_aclk333_432_isp0",
+   

[PATCH 0/7] PM / devfreq: Add NoCP devfreq-event and support busfreq on exyno5422-odroidxu3

[Chanwoo Choi]

This patchset support the AMBA bus frequency scaling on Exynos5422-based
Odroid-XU3 board. But, this series only support the bus frequency scaling
for INT (Internal) block using VDD_INT power line.

Also, to support the bus frequency scaling for Exynos542x SoC,
Exynos542x SoC has the specific 'NoC (Network on Chip) Probe' device
to measure the transfered data traffic on NoC (Network on Chip)
instead of PPMU (Platform Performance Monitoring Unit). NoC Probe device
provide the utilization for INT block of Exynos542x SoC.

The generic exynos-bus frequency driver uses the 'NoC Probe' devfreq-event
device (drivers/devfreq/event/exynos-nocp.c) without any modification.
Just add the phandle of 'NoC Probe' dt node to bus dt node.

Depend on:
This patchset depends on patch[1] which support the generic exynos-bus
frequency driver.

[1] https://lkml.org/lkml/2016/4/8/14
- [PATCH v8 00/20] PM / devferq: Add generic exynos bus frequency driver and 
new passive governor

Chanwoo Choi (7):
  PM / devfreq: event: Add new Exynos NoC probe driver
  PM / devfreq: exynos: Add the detailed correlation for Exynos5422 bus
  ARM: dts: Add NoC Probe dt node for Exynos542x SoC
  dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
  clk: samsung: exynos542x: Add the clock id for ACLK
  ARM: dts: Add bus nodes using VDD_INT for Exynos542x SoC
  ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

 .../bindings/devfreq/event/exynos-nocp.txt |  86 +
 .../devicetree/bindings/devfreq/exynos-bus.txt |  19 +
 arch/arm/boot/dts/exynos5420.dtsi  | 407 +
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |  99 +
 drivers/clk/samsung/clk-exynos5420.c   |  85 +++--
 drivers/devfreq/event/Kconfig  |   8 +
 drivers/devfreq/event/Makefile |   2 +
 drivers/devfreq/event/exynos-nocp.c| 247 +
 drivers/devfreq/event/exynos-nocp.h|  78 
 include/dt-bindings/clock/exynos5420.h |  24 +-
 10 files changed, 1024 insertions(+), 31 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
 create mode 100644 drivers/devfreq/event/exynos-nocp.c
 create mode 100644 drivers/devfreq/event/exynos-nocp.h

-- 
1.9.1

[PATCH 6/7] ARM: dts: Add bus nodes using VDD_INT for Exynos542x SoC

[Chanwoo Choi]

This patch adds the AMBA bus nodes using VDD_INT for Exynos542x SoC.
Exynos542x has the following AMBA buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed correlation between sub-block and clock:
- CLK_DOUT_ACLK400_WCORE clock for WCORE's AXI
- CLK_DOUT_ACLK100_NOC for NoC (Network on Chip)'s AXI
- CLK_DOUT_PCLK200_FSYS for FSYS's APB
- CLK_DOUT_ACLK200_FSYS for FSYS's AXI
- CLK_DOUT_ACLK200_FSYS2 for FSYS2's AXI
- CLK_DOUT_ACLK333 for MFC's AXI
- CLK_DOUT_ACLK266 for GEN's AXI
- CLK_DOUT_ACLK66 for PERIC/PERIR's AXI
- CLK_DOUT_ACLK333_G2D for G2D's AXI
- CLK_DOUT_ACLK266_G2D for ACP's AXI
- CLK_DOUT_ACLK300_JPEG for JPEG's AXI
- CLK_DOUT_ACLK166 for JPEG's APB
- CLK_DOUT_ACLK300_DISP1 for FIMD's AXI
- CLK_DOUT_ACLK400_DISP1 for DISP1's AXI
- CLK_DOUT_ACLK300_GSCL for GSCL Scaler's AXI
- CLK_DOUT_ACLK400_MSCL for MSCL's AXI

Signed-off-by: Chanwoo Choi 
---
 arch/arm/boot/dts/exynos5420.dtsi | 371 ++
 1 file changed, 371 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi 
b/arch/arm/boot/dts/exynos5420.dtsi
index d80f3b66f017..1340024fa882 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1224,6 +1224,377 @@
power-domains = <_pd>;
#iommu-cells = <0>;
};
+
+   bus_wcore: bus_wcore {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK400_WCORE>;
+   clock-names = "bus";
+   operating-points-v2 = <_wcore_opp_table>;
+   status = "disabled";
+   };
+
+   bus_noc: bus_noc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK100_NOC>;
+   clock-names = "bus";
+   operating-points-v2 = <_noc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys_apb: bus_fsys_apb {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_PCLK200_FSYS>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK200_FSYS>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys2: bus_fsys2 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK200_FSYS2>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys2_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK333>;
+   clock-names = "bus";
+   operating-points-v2 = <_mfc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_gen: bus_gen {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK266>;
+   clock-names = "bus";
+   operating-points-v2 = <_gen_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK66>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_g2d: bus_g2d {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK333_G2D>;
+   clock-names = "bus";
+   operating-points-v2 = <_g2d_opp_table>;
+   status = "disabled";
+   };
+
+   bus_g2d_acp: bus_g2d_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK266_G2D>;
+   clock-names = "bus";
+   operating-points-v2 = <_g2d_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_jpeg: bus_jpeg {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK300_JPEG>;
+   clock-names = "bus";
+   operating-points-v2 = <_jpeg_opp_table>;
+   status = "disabled";
+   };
+
+   bus_jpeg_apb: bus_jpeg_apb {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK166>;
+   clock-names = "bus";
+   operating-points-v2 = <_jpeg_apb_opp_table>;
+   status = "disabled";
+   };
+
+   bus_disp1_fimd: bus_disp1_fimd {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DOUT_ACLK300_DISP1>;
+   clock-names = "bus";
+   operating-points-v2 = <_disp1_fimd_opp_table>;
+   status = "disabled";
+   };
+
+   bus_disp1: bus_disp1 {
+   

[PATCH 5/7] clk: samsung: exynos542x: Add the clock id for ACLK

[Chanwoo Choi]

This patch adds the clock id for ACLK clock which is source clock of AMBA AXI
Bus. This clock should be handled in Bus frequency scaling driver.

Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5420.c | 85 +++-
 1 file changed, 55 insertions(+), 30 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c 
b/drivers/clk/samsung/clk-exynos5420.c
index be03ed0fcb6b..d7c62dfb1646 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -554,8 +554,9 @@ static struct samsung_mux_clock exynos5800_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_div_clock exynos5800_div_clks[] __initdata = {
-   DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore", DIV_TOP0, 16, 3),
-
+   DIV_F(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
+   "mout_aclk400_wcore",
+   DIV_TOP0, 16, 3, CLK_SET_RATE_PARENT, 0),
DIV(0, "dout_aclk550_cam", "mout_aclk550_cam",
DIV_TOP8, 16, 3),
DIV(0, "dout_aclkfl1_550_cam", "mout_aclkfl1_550_cam",
@@ -607,8 +608,9 @@ static struct samsung_mux_clock exynos5420_mux_clks[] 
__initdata = {
 };
 
 static struct samsung_div_clock exynos5420_div_clks[] __initdata = {
-   DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll",
-   DIV_TOP0, 16, 3),
+   DIV_F(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
+   "mout_aclk400_wcore_bpll",
+   DIV_TOP0, 16, 3, CLK_SET_RATE_PARENT, 0),
 };
 
 static struct samsung_mux_clock exynos5x_mux_clks[] __initdata = {
@@ -785,31 +787,52 @@ static struct samsung_div_clock exynos5x_div_clks[] 
__initdata = {
DIV(0, "div_kfc", "mout_kfc", DIV_KFC0, 0, 3),
DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3),
 
-   DIV(0, "dout_aclk400_isp", "mout_aclk400_isp", DIV_TOP0, 0, 3),
-   DIV(0, "dout_aclk400_mscl", "mout_aclk400_mscl", DIV_TOP0, 4, 3),
-   DIV(0, "dout_aclk200", "mout_aclk200", DIV_TOP0, 8, 3),
-   DIV(0, "dout_aclk200_fsys2", "mout_aclk200_fsys2", DIV_TOP0, 12, 3),
-   DIV(0, "dout_aclk100_noc", "mout_aclk100_noc", DIV_TOP0, 20, 3),
-   DIV(0, "dout_pclk200_fsys", "mout_pclk200_fsys", DIV_TOP0, 24, 3),
-   DIV(0, "dout_aclk200_fsys", "mout_aclk200_fsys", DIV_TOP0, 28, 3),
-
-   DIV(0, "dout_aclk333_432_gscl", "mout_aclk333_432_gscl",
-   DIV_TOP1, 0, 3),
-   DIV(0, "dout_aclk333_432_isp", "mout_aclk333_432_isp",
-   DIV_TOP1, 4, 3),
-   DIV(0, "dout_aclk66", "mout_aclk66", DIV_TOP1, 8, 6),
-   DIV(0, "dout_aclk333_432_isp0", "mout_aclk333_432_isp0",
-   DIV_TOP1, 16, 3),
-   DIV(0, "dout_aclk266", "mout_aclk266", DIV_TOP1, 20, 3),
-   DIV(0, "dout_aclk166", "mout_aclk166", DIV_TOP1, 24, 3),
-   DIV(0, "dout_aclk333", "mout_aclk333", DIV_TOP1, 28, 3),
-
-   DIV(0, "dout_aclk333_g2d", "mout_aclk333_g2d", DIV_TOP2, 8, 3),
-   DIV(0, "dout_aclk266_g2d", "mout_aclk266_g2d", DIV_TOP2, 12, 3),
-   DIV(0, "dout_aclk_g3d", "mout_aclk_g3d", DIV_TOP2, 16, 3),
-   DIV(0, "dout_aclk300_jpeg", "mout_aclk300_jpeg", DIV_TOP2, 20, 3),
-   DIV(0, "dout_aclk300_disp1", "mout_aclk300_disp1", DIV_TOP2, 24, 3),
-   DIV(0, "dout_aclk300_gscl", "mout_aclk300_gscl", DIV_TOP2, 28, 3),
+   DIV_F(CLK_DOUT_ACLK400_ISP, "dout_aclk400_isp", "mout_aclk400_isp",
+   DIV_TOP0, 0, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK400_MSCL, "dout_aclk400_mscl", "mout_aclk400_mscl",
+   DIV_TOP0, 4, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200, "dout_aclk200", "mout_aclk200",
+   DIV_TOP0, 8, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200_FSYS2, "dout_aclk200_fsys2",
+   "mout_aclk200_fsys2",
+   DIV_TOP0, 12, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK100_NOC, "dout_aclk100_noc", "mout_aclk100_noc",
+   DIV_TOP0, 20, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_PCLK200_FSYS, "dout_pclk200_fsys", "mout_pclk200_fsys",
+   DIV_TOP0, 24, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK200_FSYS, "dout_aclk200_fsys", "mout_aclk200_fsys",
+   DIV_TOP0, 28, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_GSCL, "dout_aclk333_432_gscl",
+   "mout_aclk333_432_gscl",
+   DIV_TOP1, 0, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_ISP, "dout_aclk333_432_isp",
+   "mout_aclk333_432_isp",
+   DIV_TOP1, 4, 3, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK66, "dout_aclk66", "mout_aclk66",
+   DIV_TOP1, 8, 6, CLK_SET_RATE_PARENT, 0),
+   DIV_F(CLK_DOUT_ACLK333_432_ISP0, "dout_aclk333_432_isp0",
+   "mout_aclk333_432_isp0",
+  

[PATCH 0/7] PM / devfreq: Add NoCP devfreq-event and support busfreq on exyno5422-odroidxu3

[Chanwoo Choi]

This patchset support the AMBA bus frequency scaling on Exynos5422-based
Odroid-XU3 board. But, this series only support the bus frequency scaling
for INT (Internal) block using VDD_INT power line.

Also, to support the bus frequency scaling for Exynos542x SoC,
Exynos542x SoC has the specific 'NoC (Network on Chip) Probe' device
to measure the transfered data traffic on NoC (Network on Chip)
instead of PPMU (Platform Performance Monitoring Unit). NoC Probe device
provide the utilization for INT block of Exynos542x SoC.

The generic exynos-bus frequency driver uses the 'NoC Probe' devfreq-event
device (drivers/devfreq/event/exynos-nocp.c) without any modification.
Just add the phandle of 'NoC Probe' dt node to bus dt node.

Depend on:
This patchset depends on patch[1] which support the generic exynos-bus
frequency driver.

[1] https://lkml.org/lkml/2016/4/8/14
- [PATCH v8 00/20] PM / devferq: Add generic exynos bus frequency driver and 
new passive governor

Chanwoo Choi (7):
  PM / devfreq: event: Add new Exynos NoC probe driver
  PM / devfreq: exynos: Add the detailed correlation for Exynos5422 bus
  ARM: dts: Add NoC Probe dt node for Exynos542x SoC
  dt-bindings: clock: Add the clock id for ACLK clock of Exynos542x SoC
  clk: samsung: exynos542x: Add the clock id for ACLK
  ARM: dts: Add bus nodes using VDD_INT for Exynos542x SoC
  ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

 .../bindings/devfreq/event/exynos-nocp.txt |  86 +
 .../devicetree/bindings/devfreq/exynos-bus.txt |  19 +
 arch/arm/boot/dts/exynos5420.dtsi  | 407 +
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi |  99 +
 drivers/clk/samsung/clk-exynos5420.c   |  85 +++--
 drivers/devfreq/event/Kconfig  |   8 +
 drivers/devfreq/event/Makefile |   2 +
 drivers/devfreq/event/exynos-nocp.c| 247 +
 drivers/devfreq/event/exynos-nocp.h|  78 
 include/dt-bindings/clock/exynos5420.h |  24 +-
 10 files changed, 1024 insertions(+), 31 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/devfreq/event/exynos-nocp.txt
 create mode 100644 drivers/devfreq/event/exynos-nocp.c
 create mode 100644 drivers/devfreq/event/exynos-nocp.h

-- 
1.9.1

Re: [PATCH] clocksource: use clocksource_freq2mult() helper

[John Stultz]

On Wed, Mar 16, 2016 at 3:21 AM, Alexander Kuleshov
 wrote:
> which is introduced in the 7aca0c072 commit to simplify calculation of
> the mult and shift in the clocks_calc_mult_shift().
>
> Signed-off-by: Alexander Kuleshov 
> ---
>  kernel/time/clocksource.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
> index 56ece14..de57923 100644
> --- a/kernel/time/clocksource.c
> +++ b/kernel/time/clocksource.c
> @@ -80,9 +80,7 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 
> to, u32 maxsec)
>  * accuracy and fits the maxsec conversion range:
>  */
> for (sft = 32; sft > 0; sft--) {
> -   tmp = (u64) to << sft;
> -   tmp += from / 2;
> -   do_div(tmp, from);
> +   tmp = clocksource_freq2mult(from, sft, to);
> if ((tmp >> sftacc) == 0)
> break;
> }

I'm worried you never tested this, as its clearly broken, and keeps my
systems from booting.

clocksource_freq2mult returns a u32. In the code being removed, tmp is
a u64. So this may truncate the high bits.

Since sftacc is often 32, this causes it to exit prematurely on the
first pass through the loop.

Please do make sure to boot test what you send out. I spent some time
thinking I had broken my qemu testing setup before I realized it was
this simple looking patch.

thanks
-john

Re: [PATCH] clocksource: use clocksource_freq2mult() helper

[John Stultz]

On Wed, Mar 16, 2016 at 3:21 AM, Alexander Kuleshov
 wrote:
> which is introduced in the 7aca0c072 commit to simplify calculation of
> the mult and shift in the clocks_calc_mult_shift().
>
> Signed-off-by: Alexander Kuleshov 
> ---
>  kernel/time/clocksource.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
> index 56ece14..de57923 100644
> --- a/kernel/time/clocksource.c
> +++ b/kernel/time/clocksource.c
> @@ -80,9 +80,7 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 
> to, u32 maxsec)
>  * accuracy and fits the maxsec conversion range:
>  */
> for (sft = 32; sft > 0; sft--) {
> -   tmp = (u64) to << sft;
> -   tmp += from / 2;
> -   do_div(tmp, from);
> +   tmp = clocksource_freq2mult(from, sft, to);
> if ((tmp >> sftacc) == 0)
> break;
> }

I'm worried you never tested this, as its clearly broken, and keeps my
systems from booting.

clocksource_freq2mult returns a u32. In the code being removed, tmp is
a u64. So this may truncate the high bits.

Since sftacc is often 32, this causes it to exit prematurely on the
first pass through the loop.

Please do make sure to boot test what you send out. I spent some time
thinking I had broken my qemu testing setup before I realized it was
this simple looking patch.

thanks
-john

Re: [PATCH] [linux-next]:ALSA: Fix a typo in timestamping.txt

[Takashi Iwai]

On Fri, 08 Apr 2016 05:45:25 +0200,
Masanari Iida wrote:
> 
> This patch fix a spelling typo found in
> Documentation/sound/alsa/timestamping.txt
> 
> Signed-off-by: Masanari Iida 

Applied, thanks.


Takashi

> ---
>  Documentation/sound/alsa/timestamping.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/sound/alsa/timestamping.txt 
> b/Documentation/sound/alsa/timestamping.txt
> index 0b191a23f534..1b6473f393a8 100644
> --- a/Documentation/sound/alsa/timestamping.txt
> +++ b/Documentation/sound/alsa/timestamping.txt
> @@ -129,7 +129,7 @@ will be required to issue multiple queries and perform an
>  interpolation of the results
>  
>  In some hardware-specific configuration, the system timestamp is
> -latched by a low-level audio subsytem, and the information provided
> +latched by a low-level audio subsystem, and the information provided
>  back to the driver. Due to potential delays in the communication with
>  the hardware, there is a risk of misalignment with the avail and delay
>  information. To make sure applications are not confused, a
> -- 
> 2.8.0
> 
> 

Re: [PATCH] [linux-next]:ALSA: Fix a typo in timestamping.txt

[Takashi Iwai]

On Fri, 08 Apr 2016 05:45:25 +0200,
Masanari Iida wrote:
> 
> This patch fix a spelling typo found in
> Documentation/sound/alsa/timestamping.txt
> 
> Signed-off-by: Masanari Iida 

Applied, thanks.


Takashi

> ---
>  Documentation/sound/alsa/timestamping.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/sound/alsa/timestamping.txt 
> b/Documentation/sound/alsa/timestamping.txt
> index 0b191a23f534..1b6473f393a8 100644
> --- a/Documentation/sound/alsa/timestamping.txt
> +++ b/Documentation/sound/alsa/timestamping.txt
> @@ -129,7 +129,7 @@ will be required to issue multiple queries and perform an
>  interpolation of the results
>  
>  In some hardware-specific configuration, the system timestamp is
> -latched by a low-level audio subsytem, and the information provided
> +latched by a low-level audio subsystem, and the information provided
>  back to the driver. Due to potential delays in the communication with
>  the hardware, there is a risk of misalignment with the avail and delay
>  information. To make sure applications are not confused, a
> -- 
> 2.8.0
> 
> 

Re: Nouveau crashes in 4.6-rc on arm64

[Alexandre Courbot]

Hi Robin,

On 04/07/2016 08:50 PM, Robin Murphy wrote:

Hello,

With 4.6-rc2 (and -rc1) I'm seeing Nouveau blowing up at boot, from the
look of it by dereferencing some offset from NULL inside
nouveau_fbcon_imageblit(). My setup is an old XFX 7600GT card plugged
into an ARM Juno r1 board, which works fine with 4.5 and earlier.

Attached are a couple of logs from booting arm64 defconfig plus DRM and
Nouveau enabled - the second also has framebuffer console rotation
turned on, which interestingly seems to move the point of failure, and
the display does eventually come up to show the tail end of the panic in
that case.

I might be able to find time for a full bisection next week if isn't
something sufficiently obvious to anyone who knows this driver.


Looking at the log it is not clear to me what could be causing this. I 
can boot 4.6-rc2 with a GM206 card without any issue. A bisect would 
indeed be useful here.


Thanks,
Alex.

Re: Nouveau crashes in 4.6-rc on arm64

[Alexandre Courbot]

Hi Robin,

On 04/07/2016 08:50 PM, Robin Murphy wrote:

Hello,

With 4.6-rc2 (and -rc1) I'm seeing Nouveau blowing up at boot, from the
look of it by dereferencing some offset from NULL inside
nouveau_fbcon_imageblit(). My setup is an old XFX 7600GT card plugged
into an ARM Juno r1 board, which works fine with 4.5 and earlier.

Attached are a couple of logs from booting arm64 defconfig plus DRM and
Nouveau enabled - the second also has framebuffer console rotation
turned on, which interestingly seems to move the point of failure, and
the display does eventually come up to show the tail end of the panic in
that case.

I might be able to find time for a full bisection next week if isn't
something sufficiently obvious to anyone who knows this driver.


Looking at the log it is not clear to me what could be causing this. I 
can boot 4.6-rc2 with a GM206 card without any issue. A bisect would 
indeed be useful here.


Thanks,
Alex.

[PATCH v8 04/20] PM / devfreq: Add new DEVFREQ_TRANSITION_NOTIFIER notifier

[Chanwoo Choi]

This patch adds the new DEVFREQ_TRANSITION_NOTIFIER notifier to send
the notification when the frequency of device is changed.
This notifier has two state as following:
- DEVFREQ_PRECHANGE  : Notify it before chaning the frequency of device
- DEVFREQ_POSTCHANGE : Notify it after changed the frequency of device

And this patch adds the resourced-managed function to release the resource
automatically when error happen.

Signed-off-by: Chanwoo Choi 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/devfreq.c | 163 +-
 include/linux/devfreq.h   |  59 -
 2 files changed, 220 insertions(+), 2 deletions(-)

diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 20a9422c2552..1d6c803804d5 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -189,6 +189,29 @@ static struct devfreq_governor 
*find_devfreq_governor(const char *name)
return ERR_PTR(-ENODEV);
 }
 
+static int devfreq_notify_transition(struct devfreq *devfreq,
+   struct devfreq_freqs *freqs, unsigned int state)
+{
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (state) {
+   case DEVFREQ_PRECHANGE:
+   srcu_notifier_call_chain(>transition_notifier_list,
+   DEVFREQ_PRECHANGE, freqs);
+   break;
+
+   case DEVFREQ_POSTCHANGE:
+   srcu_notifier_call_chain(>transition_notifier_list,
+   DEVFREQ_POSTCHANGE, freqs);
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 /* Load monitoring helper functions for governors use */
 
 /**
@@ -200,7 +223,8 @@ static struct devfreq_governor *find_devfreq_governor(const 
char *name)
  */
 int update_devfreq(struct devfreq *devfreq)
 {
-   unsigned long freq;
+   struct devfreq_freqs freqs;
+   unsigned long freq, cur_freq;
int err = 0;
u32 flags = 0;
 
@@ -234,10 +258,22 @@ int update_devfreq(struct devfreq *devfreq)
flags |= DEVFREQ_FLAG_LEAST_UPPER_BOUND; /* Use LUB */
}
 
+   if (devfreq->profile->get_cur_freq)
+   devfreq->profile->get_cur_freq(devfreq->dev.parent, _freq);
+   else
+   cur_freq = devfreq->previous_freq;
+
+   freqs.old = cur_freq;
+   freqs.new = freq;
+   devfreq_notify_transition(devfreq, , DEVFREQ_PRECHANGE);
+
err = devfreq->profile->target(devfreq->dev.parent, , flags);
if (err)
return err;
 
+   freqs.new = freq;
+   devfreq_notify_transition(devfreq, , DEVFREQ_POSTCHANGE);
+
if (devfreq->profile->freq_table)
if (devfreq_update_status(devfreq, freq))
dev_err(>dev,
@@ -542,6 +578,8 @@ struct devfreq *devfreq_add_device(struct device *dev,
goto err_out;
}
 
+   srcu_init_notifier_head(>transition_notifier_list);
+
mutex_unlock(>lock);
 
mutex_lock(_list_lock);
@@ -1310,6 +1348,129 @@ void devm_devfreq_unregister_opp_notifier(struct device 
*dev,
 }
 EXPORT_SYMBOL(devm_devfreq_unregister_opp_notifier);
 
+/**
+ * devfreq_register_notifier() - Register a driver with devfreq
+ * @devfreq:   The devfreq object.
+ * @nb:The notifier block to register.
+ * @list:  DEVFREQ_TRANSITION_NOTIFIER.
+ */
+int devfreq_register_notifier(struct devfreq *devfreq,
+   struct notifier_block *nb,
+   unsigned int list)
+{
+   int ret = 0;
+
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (list) {
+   case DEVFREQ_TRANSITION_NOTIFIER:
+   ret = srcu_notifier_chain_register(
+   >transition_notifier_list, nb);
+   break;
+   default:
+   ret = -EINVAL;
+   }
+
+   return ret;
+}
+EXPORT_SYMBOL(devfreq_register_notifier);
+
+/*
+ * devfreq_unregister_notifier() - Unregister a driver with devfreq
+ * @devfreq:   The devfreq object.
+ * @nb:The notifier block to be unregistered.
+ * @list:  DEVFREQ_TRANSITION_NOTIFIER.
+ */
+int devfreq_unregister_notifier(struct devfreq *devfreq,
+   struct notifier_block *nb,
+   unsigned int list)
+{
+   int ret = 0;
+
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (list) {
+   case DEVFREQ_TRANSITION_NOTIFIER:
+   ret = srcu_notifier_chain_unregister(
+   >transition_notifier_list, nb);
+   break;
+   default:
+   ret = -EINVAL;
+   }
+
+   return ret;
+}

[PATCH v8 04/20] PM / devfreq: Add new DEVFREQ_TRANSITION_NOTIFIER notifier

[Chanwoo Choi]

This patch adds the new DEVFREQ_TRANSITION_NOTIFIER notifier to send
the notification when the frequency of device is changed.
This notifier has two state as following:
- DEVFREQ_PRECHANGE  : Notify it before chaning the frequency of device
- DEVFREQ_POSTCHANGE : Notify it after changed the frequency of device

And this patch adds the resourced-managed function to release the resource
automatically when error happen.

Signed-off-by: Chanwoo Choi 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/devfreq.c | 163 +-
 include/linux/devfreq.h   |  59 -
 2 files changed, 220 insertions(+), 2 deletions(-)

diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 20a9422c2552..1d6c803804d5 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -189,6 +189,29 @@ static struct devfreq_governor 
*find_devfreq_governor(const char *name)
return ERR_PTR(-ENODEV);
 }
 
+static int devfreq_notify_transition(struct devfreq *devfreq,
+   struct devfreq_freqs *freqs, unsigned int state)
+{
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (state) {
+   case DEVFREQ_PRECHANGE:
+   srcu_notifier_call_chain(>transition_notifier_list,
+   DEVFREQ_PRECHANGE, freqs);
+   break;
+
+   case DEVFREQ_POSTCHANGE:
+   srcu_notifier_call_chain(>transition_notifier_list,
+   DEVFREQ_POSTCHANGE, freqs);
+   break;
+   default:
+   return -EINVAL;
+   }
+
+   return 0;
+}
+
 /* Load monitoring helper functions for governors use */
 
 /**
@@ -200,7 +223,8 @@ static struct devfreq_governor *find_devfreq_governor(const 
char *name)
  */
 int update_devfreq(struct devfreq *devfreq)
 {
-   unsigned long freq;
+   struct devfreq_freqs freqs;
+   unsigned long freq, cur_freq;
int err = 0;
u32 flags = 0;
 
@@ -234,10 +258,22 @@ int update_devfreq(struct devfreq *devfreq)
flags |= DEVFREQ_FLAG_LEAST_UPPER_BOUND; /* Use LUB */
}
 
+   if (devfreq->profile->get_cur_freq)
+   devfreq->profile->get_cur_freq(devfreq->dev.parent, _freq);
+   else
+   cur_freq = devfreq->previous_freq;
+
+   freqs.old = cur_freq;
+   freqs.new = freq;
+   devfreq_notify_transition(devfreq, , DEVFREQ_PRECHANGE);
+
err = devfreq->profile->target(devfreq->dev.parent, , flags);
if (err)
return err;
 
+   freqs.new = freq;
+   devfreq_notify_transition(devfreq, , DEVFREQ_POSTCHANGE);
+
if (devfreq->profile->freq_table)
if (devfreq_update_status(devfreq, freq))
dev_err(>dev,
@@ -542,6 +578,8 @@ struct devfreq *devfreq_add_device(struct device *dev,
goto err_out;
}
 
+   srcu_init_notifier_head(>transition_notifier_list);
+
mutex_unlock(>lock);
 
mutex_lock(_list_lock);
@@ -1310,6 +1348,129 @@ void devm_devfreq_unregister_opp_notifier(struct device 
*dev,
 }
 EXPORT_SYMBOL(devm_devfreq_unregister_opp_notifier);
 
+/**
+ * devfreq_register_notifier() - Register a driver with devfreq
+ * @devfreq:   The devfreq object.
+ * @nb:The notifier block to register.
+ * @list:  DEVFREQ_TRANSITION_NOTIFIER.
+ */
+int devfreq_register_notifier(struct devfreq *devfreq,
+   struct notifier_block *nb,
+   unsigned int list)
+{
+   int ret = 0;
+
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (list) {
+   case DEVFREQ_TRANSITION_NOTIFIER:
+   ret = srcu_notifier_chain_register(
+   >transition_notifier_list, nb);
+   break;
+   default:
+   ret = -EINVAL;
+   }
+
+   return ret;
+}
+EXPORT_SYMBOL(devfreq_register_notifier);
+
+/*
+ * devfreq_unregister_notifier() - Unregister a driver with devfreq
+ * @devfreq:   The devfreq object.
+ * @nb:The notifier block to be unregistered.
+ * @list:  DEVFREQ_TRANSITION_NOTIFIER.
+ */
+int devfreq_unregister_notifier(struct devfreq *devfreq,
+   struct notifier_block *nb,
+   unsigned int list)
+{
+   int ret = 0;
+
+   if (!devfreq)
+   return -EINVAL;
+
+   switch (list) {
+   case DEVFREQ_TRANSITION_NOTIFIER:
+   ret = srcu_notifier_chain_unregister(
+   >transition_notifier_list, nb);
+   break;
+   default:
+   ret = -EINVAL;
+   }
+
+   return ret;
+}
+EXPORT_SYMBOL(devfreq_unregister_notifier);
+
+struct devfreq_notifier_devres {
+   struct devfreq *devfreq;
+   struct 

[PATCH v8 13/20] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos3250.dtsi | 147 ++
 1 file changed, 147 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 1ae72c4fa55e..b5157492a422 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -722,6 +722,153 @@
opp-microvolt = <875000>;
};
};
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_lcd0: bus_lcd0 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_160>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_200>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mcuisp: bus_mcuisp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_400_MCUISP>;
+   clock-names = "bus";
+   operating-points-v2 = <_mcuisp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_isp: bus_isp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_266>;
+   clock-names = "bus";
+   operating-points-v2 = <_isp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peril: bus_peril {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peril_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <90>;
+   };
+   opp@8000 {
+   opp-hz = /bits/ 64 <8000>;
+   opp-microvolt = <90>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <100>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <100>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <100>;
+   };
+   };
+
+   bus_mcuisp_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+  

[PATCH v8 13/20] ARM: dts: Add bus nodes using VDD_INT for Exynos3250

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos3250.dtsi | 147 ++
 1 file changed, 147 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 1ae72c4fa55e..b5157492a422 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -722,6 +722,153 @@
opp-microvolt = <875000>;
};
};
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_lcd0: bus_lcd0 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_160>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_200>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mcuisp: bus_mcuisp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_400_MCUISP>;
+   clock-names = "bus";
+   operating-points-v2 = <_mcuisp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_isp: bus_isp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_266>;
+   clock-names = "bus";
+   operating-points-v2 = <_isp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peril: bus_peril {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACLK_100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peril_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <90>;
+   };
+   opp@8000 {
+   opp-hz = /bits/ 64 <8000>;
+   opp-microvolt = <90>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <100>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <100>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <100>;
+   };
+   };
+
+   bus_mcuisp_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   };
+   

[PATCH v8 08/20] PM / devfreq: exynos: Add the detailed correlation between sub-blocks and power line

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and power line
for Exynos3250, Exynos4210 and Exynos4x12.

Signed-off-by: Chanwoo Choi 
Acked-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 51 ++
 1 file changed, 51 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index 03f13d38f1a1..b098fa2ba5d4 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -53,6 +53,57 @@ Optional properties only for parent bus device:
 - exynos,voltage-tolerance: the percentage value for bus voltage tolerance
which is used to calculate the max voltage.
 
+Detailed correlation between sub-blocks and power line according to Exynos SoC:
+- In case of Exynos3250, there are two power line as following:
+   VDD_MIF |--- DMC
+
+   VDD_INT |--- LEFTBUS (parent device)
+   |--- PERIL
+   |--- MFC
+   |--- G3D
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- FSYS
+   |--- LCD0
+   |--- PERIR
+   |--- ISP
+   |--- CAM
+
+- In case of Exynos4210, there is one power line as following:
+   VDD_INT |--- DMC (parent device)
+   |--- LEFTBUS
+   |--- PERIL
+   |--- MFC(L)
+   |--- G3D
+   |--- TV
+   |--- LCD0
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- MFC(R)
+   |--- CAM
+   |--- FSYS
+   |--- GPS
+   |--- LCD0
+   |--- LCD1
+
+- In case of Exynos4x12, there are two power line as following:
+   VDD_MIF |--- DMC
+
+   VDD_INT |--- LEFTBUS (parent device)
+   |--- PERIL
+   |--- MFC(L)
+   |--- G3D
+   |--- TV
+   |--- IMAGE
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- MFC(R)
+   |--- CAM
+   |--- FSYS
+   |--- GPS
+   |--- LCD0
+   |--- ISP
+
 Example1:
Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH v8 06/20] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor

[Chanwoo Choi]

This patch adds the support of bus frequency feature for sub-blocks which share
the one power line. If each bus depends on the power line, each bus is not able
to change the voltage by oneself. To optimize the power-consumption on runtime,
some buses using the same power line should change the source clock and
regulator at the same time. So, this patch uses the passive governor to support
the bus frequency for all buses which sharing the one power line.

For example,

Exynos3250 include the two power line for AXI buses as following:
: VDD_MIF : MIF (Memory Interface) provide the DMC (Dynamic Memory Controller)
  with the power (regulator).
: VDD_INT : INT (Internal) provide the various sub-blocks with the power
  (regulator).

Each bus is included in as follwoing block. In the case of VDD_MIF, only DMC bus
use the power line. So, there is no any depencency between buese. But, in the
case of VDD_INT, various buses share the one power line of VDD_INT. We need to
make the depenency between buses. When using passive governor, there is no
problem to support the bus frequency as DVFS for all buses. One bus should be
operated as the parent bus device which gathering the current load of INT block
and then decides the new frequency with some governors except of passive
governor. After deciding the new frequency by the parent bus device, the rest
bus devices will change the each source clock according to new frequency of the
parent bus device.

- MIF (Memory Interface) block
: VDD_MIF |--- DMC

- INT (Internal) block
: VDD_INT |--- LEFTBUS (parent)
  |--- PERIL
  |--- MFC
  |--- G3D
  |--- RIGHTBUS
  |--- FSYS
  |--- LCD0
  |--- PERIR
  |--- ISP
  |--- CAM

Signed-off-by: Chanwoo Choi 
[tjakobi: Reported debugfs error during booting and cw00.choi fix it.]
Reported-by: Tobias Jakobi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |   1 +
 drivers/devfreq/exynos-bus.c | 219 ++-
 2 files changed, 174 insertions(+), 46 deletions(-)

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index d260cd0219f6..30e1daf1c827 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -78,6 +78,7 @@ config ARM_EXYNOS_BUS_DEVFREQ
bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
depends on ARCH_EXYNOS
select DEVFREQ_GOV_SIMPLE_ONDEMAND
+   select DEVFREQ_GOV_PASSIVE
select DEVFREQ_EVENT_EXYNOS_PPMU
select PM_DEVFREQ_EVENT
select PM_OPP
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 137de6196af3..50fe1a16c574 100644
--- a/drivers/devfreq/exynos-bus.c
+++ b/drivers/devfreq/exynos-bus.c
@@ -1,7 +1,7 @@
 /*
  * Generic Exynos Bus frequency driver with DEVFREQ Framework
  *
- * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
  * Author : Chanwoo Choi 
  *
  * This driver support Exynos Bus frequency feature by using
@@ -93,7 +93,7 @@ static int exynos_bus_get_event(struct exynos_bus *bus,
 }
 
 /*
- * Must necessary function for devfreq governor
+ * Must necessary function for devfreq simple-ondemand governor
  */
 static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 
flags)
 {
@@ -202,59 +202,81 @@ static void exynos_bus_exit(struct device *dev)
regulator_disable(bus->regulator);
 
dev_pm_opp_of_remove_table(dev);
+   clk_disable_unprepare(bus->clk);
 }
 
-static int exynos_bus_parse_of(struct device_node *np,
- struct exynos_bus *bus)
+/*
+ * Must necessary function for devfreq passive governor
+ */
+static int exynos_bus_passive_target(struct device *dev, unsigned long *freq,
+   u32 flags)
 {
-   struct device *dev = bus->dev;
-   unsigned long rate;
-   int i, ret, count, size;
+   struct exynos_bus *bus = dev_get_drvdata(dev);
+   struct dev_pm_opp *new_opp;
+   unsigned long old_freq, new_freq;
+   int ret = 0;
 
-   /* Get the clock to provide each bus with source clock */
-   bus->clk = devm_clk_get(dev, "bus");
-   if (IS_ERR(bus->clk)) {
-   dev_err(dev, "failed to get bus clock\n");
-   return PTR_ERR(bus->clk);
+   /* Get new opp-bus instance according to new bus clock */
+   rcu_read_lock();
+   new_opp = devfreq_recommended_opp(dev, freq, flags);
+   if (IS_ERR(new_opp)) {
+   dev_err(dev, "failed to get recommended opp instance\n");
+   rcu_read_unlock();
+   return PTR_ERR(new_opp);
}
 
-   ret = clk_prepare_enable(bus->clk);
-   if (ret < 0) {
-   dev_err(dev, "failed to get enable clock\n");
-   return ret;
-   }
+   new_freq = dev_pm_opp_get_freq(new_opp);
+  

[PATCH v8 09/20] PM / devfreq: exynos: Remove unused exynos4/5 busfreq driver

[Chanwoo Choi]

This patch removes the unused exynos4/5 busfreq driver. Instead,
generic exynos-bus frequency driver support the all Exynos SoCs.

Signed-off-by: Chanwoo Choi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |   22 -
 drivers/devfreq/Makefile |2 -
 drivers/devfreq/exynos/Makefile  |3 -
 drivers/devfreq/exynos/exynos4_bus.c | 1055 --
 drivers/devfreq/exynos/exynos4_bus.h |  110 
 drivers/devfreq/exynos/exynos5_bus.c |  431 --
 drivers/devfreq/exynos/exynos_ppmu.c |  119 
 drivers/devfreq/exynos/exynos_ppmu.h |   86 ---
 8 files changed, 1828 deletions(-)
 delete mode 100644 drivers/devfreq/exynos/Makefile
 delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
 delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
 delete mode 100644 drivers/devfreq/exynos/exynos5_bus.c
 delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.c
 delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.h

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 30e1daf1c827..78dac0e9da11 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -90,28 +90,6 @@ config ARM_EXYNOS_BUS_DEVFREQ
  and adjusts the operating frequencies and voltages with OPP support.
  This does not yet operate with optimal voltages.
 
-config ARM_EXYNOS4_BUS_DEVFREQ
-   bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
-   depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
!ARCH_MULTIPLATFORM
-   select DEVFREQ_GOV_SIMPLE_ONDEMAND
-   select PM_OPP
-   help
- This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
- and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
- It reads PPMU counters of memory controllers and adjusts
- the operating frequencies and voltages with OPP support.
- This does not yet operate with optimal voltages.
-
-config ARM_EXYNOS5_BUS_DEVFREQ
-   tristate "ARM Exynos5250 Bus DEVFREQ Driver"
-   depends on SOC_EXYNOS5250
-   select DEVFREQ_GOV_SIMPLE_ONDEMAND
-   select PM_OPP
-   help
- This adds the DEVFREQ driver for Exynos5250 bus interface (vdd_int).
- It reads PPMU counters of memory controllers and adjusts the
- operating frequencies and voltages with OPP support.
-
 config ARM_TEGRA_DEVFREQ
tristate "Tegra DEVFREQ Driver"
depends on ARCH_TEGRA_124_SOC
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 2633087d5c63..09f11d9d40d5 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -8,8 +8,6 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE)   += governor_passive.o
 
 # DEVFREQ Drivers
 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
-obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos/
-obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o
 
 # DEVFREQ Event Drivers
diff --git a/drivers/devfreq/exynos/Makefile b/drivers/devfreq/exynos/Makefile
deleted file mode 100644
index 49bc9175f923..
--- a/drivers/devfreq/exynos/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# Exynos DEVFREQ Drivers
-obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos_ppmu.o exynos4_bus.o
-obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos_ppmu.o exynos5_bus.o
diff --git a/drivers/devfreq/exynos/exynos4_bus.c 
b/drivers/devfreq/exynos/exynos4_bus.c
deleted file mode 100644
index da9509205169..
--- a/drivers/devfreq/exynos/exynos4_bus.c
+++ /dev/null
@@ -1,1055 +0,0 @@
-/* drivers/devfreq/exynos4210_memorybus.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- * MyungJoo Ham 
- *
- * EXYNOS4 - Memory/Bus clock frequency scaling support in DEVFREQ framework
- * This version supports EXYNOS4210 only. This changes bus frequencies
- * and vddint voltages. Exynos4412/4212 should be able to be supported
- * with minor modifications.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include "exynos_ppmu.h"
-#include "exynos4_bus.h"
-
-#define MAX_SAFEVOLT   120 /* 1.2V */
-
-enum exynos4_busf_type {
-   TYPE_BUSF_EXYNOS4210,
-   TYPE_BUSF_EXYNOS4x12,
-};
-
-/* Assume that the bus is saturated if the utilization is 40% */
-#define BUS_SATURATION_RATIO   40
-
-enum busclk_level_idx {
-   LV_0 = 0,
-   LV_1,
-   LV_2,
-   LV_3,
-   LV_4,
-   _LV_END
-};
-
-enum exynos_ppmu_idx {
-   PPMU_DMC0,
-   PPMU_DMC1,
-   PPMU_END,
-};
-
-#define EX4210_LV_MAX  LV_2
-#define EX4x12_LV_MAX  LV_4
-#define 

[PATCH v8 05/20] PM / devfreq: Add new passive governor

[Chanwoo Choi]

This patch adds the new passive governor for DEVFREQ framework. The following
governors are already present and used for DVFS (Dynamic Voltage and Frequency
Scaling) drivers. The following governors are independently used for one device
driver which don't give the influence to other device drviers and also don't
receive the effect from other device drivers.
- ondemand / performance / powersave / userspace

The passive governor depends on operation of parent driver with specific
governos extremely and is not able to decide the new frequency by oneself.
According to the decided new frequency of parent driver with governor,
the passive governor uses it to decide the appropriate frequency for own
device driver. The passive governor must need the following information
from device tree:
- the source clock and OPP tables
- the instance of parent device

For exameple,
there are one more devfreq device drivers which need to change their source
clock according to their utilization on runtime. But, they share the same
power line (e.g., regulator). So, specific device driver is operated as parent
with ondemand governor and then the rest device driver with passive governor
is influenced by parent device.

Suggested-by: Myungjoo Ham 
Signed-off-by: Chanwoo Choi 
[tjakobi: Reported RCU locking issue and cw00.choi fix it.]
Reported-by: Tobias Jakobi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig|   8 ++
 drivers/devfreq/Makefile   |   1 +
 drivers/devfreq/governor_passive.c | 207 +
 include/linux/devfreq.h|  33 ++
 4 files changed, 249 insertions(+)
 create mode 100644 drivers/devfreq/governor_passive.c

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index cedda8f1e5eb..d260cd0219f6 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -64,6 +64,14 @@ config DEVFREQ_GOV_USERSPACE
  Otherwise, the governor does not change the frequency
  given at the initialization.
 
+config DEVFREQ_GOV_PASSIVE
+   tristate "Passive"
+   help
+ Sets the frequency based on the frequency of its parent devfreq
+ device. This governor does not change the frequency by itself
+ through sysfs entries. The passive governor recommends that
+ devfreq device uses the OPP table to get the frequency/voltage.
+
 comment "DEVFREQ Drivers"
 
 config ARM_EXYNOS_BUS_DEVFREQ
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 8af8aaf922a8..2633087d5c63 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)   += 
governor_simpleondemand.o
 obj-$(CONFIG_DEVFREQ_GOV_PERFORMANCE)  += governor_performance.o
 obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE)+= governor_powersave.o
 obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
+obj-$(CONFIG_DEVFREQ_GOV_PASSIVE)  += governor_passive.o
 
 # DEVFREQ Drivers
 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
diff --git a/drivers/devfreq/governor_passive.c 
b/drivers/devfreq/governor_passive.c
new file mode 100644
index ..28a9ae32d330
--- /dev/null
+++ b/drivers/devfreq/governor_passive.c
@@ -0,0 +1,207 @@
+/*
+ * linux/drivers/devfreq/governor_passive.c
+ *
+ * Copyright (C) 2016 Samsung Electronics
+ * Author: Chanwoo Choi 
+ * Author: MyungJoo Ham 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include "governor.h"
+
+static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
+   unsigned long *freq)
+{
+   struct devfreq_passive_data *p_data
+   = (struct devfreq_passive_data *)devfreq->data;
+   struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent;
+   unsigned long child_freq = ULONG_MAX;
+   struct dev_pm_opp *opp;
+   int i, count, ret = 0;
+
+   /*
+* If the devfreq device with passive governor has the specific method
+* to determine the next frequency, should use the get_target_freq()
+* of struct devfreq_passive_data.
+*/
+   if (p_data->get_target_freq) {
+   ret = p_data->get_target_freq(devfreq, freq);
+   goto out;
+   }
+
+   /*
+* If the parent and passive devfreq device uses the OPP table,
+* get the next frequency by using the OPP table.
+*/
+
+   /*
+* - parent devfreq device uses the governors except for passive.
+* - passive devfreq device uses the passive governor.
+*
+* Each devfreq has the OPP table. After deciding the new frequency
+   

[PATCH v8 08/20] PM / devfreq: exynos: Add the detailed correlation between sub-blocks and power line

[Chanwoo Choi]

This patch adds the detailed corrleation between sub-blocks and power line
for Exynos3250, Exynos4210 and Exynos4x12.

Signed-off-by: Chanwoo Choi 
Acked-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 51 ++
 1 file changed, 51 insertions(+)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index 03f13d38f1a1..b098fa2ba5d4 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -53,6 +53,57 @@ Optional properties only for parent bus device:
 - exynos,voltage-tolerance: the percentage value for bus voltage tolerance
which is used to calculate the max voltage.
 
+Detailed correlation between sub-blocks and power line according to Exynos SoC:
+- In case of Exynos3250, there are two power line as following:
+   VDD_MIF |--- DMC
+
+   VDD_INT |--- LEFTBUS (parent device)
+   |--- PERIL
+   |--- MFC
+   |--- G3D
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- FSYS
+   |--- LCD0
+   |--- PERIR
+   |--- ISP
+   |--- CAM
+
+- In case of Exynos4210, there is one power line as following:
+   VDD_INT |--- DMC (parent device)
+   |--- LEFTBUS
+   |--- PERIL
+   |--- MFC(L)
+   |--- G3D
+   |--- TV
+   |--- LCD0
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- MFC(R)
+   |--- CAM
+   |--- FSYS
+   |--- GPS
+   |--- LCD0
+   |--- LCD1
+
+- In case of Exynos4x12, there are two power line as following:
+   VDD_MIF |--- DMC
+
+   VDD_INT |--- LEFTBUS (parent device)
+   |--- PERIL
+   |--- MFC(L)
+   |--- G3D
+   |--- TV
+   |--- IMAGE
+   |--- RIGHTBUS
+   |--- PERIR
+   |--- MFC(R)
+   |--- CAM
+   |--- FSYS
+   |--- GPS
+   |--- LCD0
+   |--- ISP
+
 Example1:
Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
power line (regulator). The MIF (Memory Interface) AXI bus is used to
-- 
1.9.1

[PATCH v8 06/20] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor

[Chanwoo Choi]

This patch adds the support of bus frequency feature for sub-blocks which share
the one power line. If each bus depends on the power line, each bus is not able
to change the voltage by oneself. To optimize the power-consumption on runtime,
some buses using the same power line should change the source clock and
regulator at the same time. So, this patch uses the passive governor to support
the bus frequency for all buses which sharing the one power line.

For example,

Exynos3250 include the two power line for AXI buses as following:
: VDD_MIF : MIF (Memory Interface) provide the DMC (Dynamic Memory Controller)
  with the power (regulator).
: VDD_INT : INT (Internal) provide the various sub-blocks with the power
  (regulator).

Each bus is included in as follwoing block. In the case of VDD_MIF, only DMC bus
use the power line. So, there is no any depencency between buese. But, in the
case of VDD_INT, various buses share the one power line of VDD_INT. We need to
make the depenency between buses. When using passive governor, there is no
problem to support the bus frequency as DVFS for all buses. One bus should be
operated as the parent bus device which gathering the current load of INT block
and then decides the new frequency with some governors except of passive
governor. After deciding the new frequency by the parent bus device, the rest
bus devices will change the each source clock according to new frequency of the
parent bus device.

- MIF (Memory Interface) block
: VDD_MIF |--- DMC

- INT (Internal) block
: VDD_INT |--- LEFTBUS (parent)
  |--- PERIL
  |--- MFC
  |--- G3D
  |--- RIGHTBUS
  |--- FSYS
  |--- LCD0
  |--- PERIR
  |--- ISP
  |--- CAM

Signed-off-by: Chanwoo Choi 
[tjakobi: Reported debugfs error during booting and cw00.choi fix it.]
Reported-by: Tobias Jakobi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |   1 +
 drivers/devfreq/exynos-bus.c | 219 ++-
 2 files changed, 174 insertions(+), 46 deletions(-)

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index d260cd0219f6..30e1daf1c827 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -78,6 +78,7 @@ config ARM_EXYNOS_BUS_DEVFREQ
bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
depends on ARCH_EXYNOS
select DEVFREQ_GOV_SIMPLE_ONDEMAND
+   select DEVFREQ_GOV_PASSIVE
select DEVFREQ_EVENT_EXYNOS_PPMU
select PM_DEVFREQ_EVENT
select PM_OPP
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 137de6196af3..50fe1a16c574 100644
--- a/drivers/devfreq/exynos-bus.c
+++ b/drivers/devfreq/exynos-bus.c
@@ -1,7 +1,7 @@
 /*
  * Generic Exynos Bus frequency driver with DEVFREQ Framework
  *
- * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
  * Author : Chanwoo Choi 
  *
  * This driver support Exynos Bus frequency feature by using
@@ -93,7 +93,7 @@ static int exynos_bus_get_event(struct exynos_bus *bus,
 }
 
 /*
- * Must necessary function for devfreq governor
+ * Must necessary function for devfreq simple-ondemand governor
  */
 static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 
flags)
 {
@@ -202,59 +202,81 @@ static void exynos_bus_exit(struct device *dev)
regulator_disable(bus->regulator);
 
dev_pm_opp_of_remove_table(dev);
+   clk_disable_unprepare(bus->clk);
 }
 
-static int exynos_bus_parse_of(struct device_node *np,
- struct exynos_bus *bus)
+/*
+ * Must necessary function for devfreq passive governor
+ */
+static int exynos_bus_passive_target(struct device *dev, unsigned long *freq,
+   u32 flags)
 {
-   struct device *dev = bus->dev;
-   unsigned long rate;
-   int i, ret, count, size;
+   struct exynos_bus *bus = dev_get_drvdata(dev);
+   struct dev_pm_opp *new_opp;
+   unsigned long old_freq, new_freq;
+   int ret = 0;
 
-   /* Get the clock to provide each bus with source clock */
-   bus->clk = devm_clk_get(dev, "bus");
-   if (IS_ERR(bus->clk)) {
-   dev_err(dev, "failed to get bus clock\n");
-   return PTR_ERR(bus->clk);
+   /* Get new opp-bus instance according to new bus clock */
+   rcu_read_lock();
+   new_opp = devfreq_recommended_opp(dev, freq, flags);
+   if (IS_ERR(new_opp)) {
+   dev_err(dev, "failed to get recommended opp instance\n");
+   rcu_read_unlock();
+   return PTR_ERR(new_opp);
}
 
-   ret = clk_prepare_enable(bus->clk);
-   if (ret < 0) {
-   dev_err(dev, "failed to get enable clock\n");
-   return ret;
-   }
+   new_freq = dev_pm_opp_get_freq(new_opp);
+   old_freq = dev_pm_opp_get_freq(bus->curr_opp);
+   rcu_read_unlock();
 
-   /* Get the 

[PATCH v8 09/20] PM / devfreq: exynos: Remove unused exynos4/5 busfreq driver

[Chanwoo Choi]

This patch removes the unused exynos4/5 busfreq driver. Instead,
generic exynos-bus frequency driver support the all Exynos SoCs.

Signed-off-by: Chanwoo Choi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |   22 -
 drivers/devfreq/Makefile |2 -
 drivers/devfreq/exynos/Makefile  |3 -
 drivers/devfreq/exynos/exynos4_bus.c | 1055 --
 drivers/devfreq/exynos/exynos4_bus.h |  110 
 drivers/devfreq/exynos/exynos5_bus.c |  431 --
 drivers/devfreq/exynos/exynos_ppmu.c |  119 
 drivers/devfreq/exynos/exynos_ppmu.h |   86 ---
 8 files changed, 1828 deletions(-)
 delete mode 100644 drivers/devfreq/exynos/Makefile
 delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
 delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
 delete mode 100644 drivers/devfreq/exynos/exynos5_bus.c
 delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.c
 delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.h

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 30e1daf1c827..78dac0e9da11 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -90,28 +90,6 @@ config ARM_EXYNOS_BUS_DEVFREQ
  and adjusts the operating frequencies and voltages with OPP support.
  This does not yet operate with optimal voltages.
 
-config ARM_EXYNOS4_BUS_DEVFREQ
-   bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
-   depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
!ARCH_MULTIPLATFORM
-   select DEVFREQ_GOV_SIMPLE_ONDEMAND
-   select PM_OPP
-   help
- This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
- and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
- It reads PPMU counters of memory controllers and adjusts
- the operating frequencies and voltages with OPP support.
- This does not yet operate with optimal voltages.
-
-config ARM_EXYNOS5_BUS_DEVFREQ
-   tristate "ARM Exynos5250 Bus DEVFREQ Driver"
-   depends on SOC_EXYNOS5250
-   select DEVFREQ_GOV_SIMPLE_ONDEMAND
-   select PM_OPP
-   help
- This adds the DEVFREQ driver for Exynos5250 bus interface (vdd_int).
- It reads PPMU counters of memory controllers and adjusts the
- operating frequencies and voltages with OPP support.
-
 config ARM_TEGRA_DEVFREQ
tristate "Tegra DEVFREQ Driver"
depends on ARCH_TEGRA_124_SOC
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 2633087d5c63..09f11d9d40d5 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -8,8 +8,6 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE)   += governor_passive.o
 
 # DEVFREQ Drivers
 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
-obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos/
-obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o
 
 # DEVFREQ Event Drivers
diff --git a/drivers/devfreq/exynos/Makefile b/drivers/devfreq/exynos/Makefile
deleted file mode 100644
index 49bc9175f923..
--- a/drivers/devfreq/exynos/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
-# Exynos DEVFREQ Drivers
-obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos_ppmu.o exynos4_bus.o
-obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos_ppmu.o exynos5_bus.o
diff --git a/drivers/devfreq/exynos/exynos4_bus.c 
b/drivers/devfreq/exynos/exynos4_bus.c
deleted file mode 100644
index da9509205169..
--- a/drivers/devfreq/exynos/exynos4_bus.c
+++ /dev/null
@@ -1,1055 +0,0 @@
-/* drivers/devfreq/exynos4210_memorybus.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- * MyungJoo Ham 
- *
- * EXYNOS4 - Memory/Bus clock frequency scaling support in DEVFREQ framework
- * This version supports EXYNOS4210 only. This changes bus frequencies
- * and vddint voltages. Exynos4412/4212 should be able to be supported
- * with minor modifications.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-
-#include "exynos_ppmu.h"
-#include "exynos4_bus.h"
-
-#define MAX_SAFEVOLT   120 /* 1.2V */
-
-enum exynos4_busf_type {
-   TYPE_BUSF_EXYNOS4210,
-   TYPE_BUSF_EXYNOS4x12,
-};
-
-/* Assume that the bus is saturated if the utilization is 40% */
-#define BUS_SATURATION_RATIO   40
-
-enum busclk_level_idx {
-   LV_0 = 0,
-   LV_1,
-   LV_2,
-   LV_3,
-   LV_4,
-   _LV_END
-};
-
-enum exynos_ppmu_idx {
-   PPMU_DMC0,
-   PPMU_DMC1,
-   PPMU_END,
-};
-
-#define EX4210_LV_MAX  LV_2
-#define EX4x12_LV_MAX  LV_4
-#define EX4210_LV_NUM  (LV_2 + 1)
-#define EX4x12_LV_NUM  (LV_4 + 1)
-
-/**
- * struct 

[PATCH v8 05/20] PM / devfreq: Add new passive governor

[Chanwoo Choi]

This patch adds the new passive governor for DEVFREQ framework. The following
governors are already present and used for DVFS (Dynamic Voltage and Frequency
Scaling) drivers. The following governors are independently used for one device
driver which don't give the influence to other device drviers and also don't
receive the effect from other device drivers.
- ondemand / performance / powersave / userspace

The passive governor depends on operation of parent driver with specific
governos extremely and is not able to decide the new frequency by oneself.
According to the decided new frequency of parent driver with governor,
the passive governor uses it to decide the appropriate frequency for own
device driver. The passive governor must need the following information
from device tree:
- the source clock and OPP tables
- the instance of parent device

For exameple,
there are one more devfreq device drivers which need to change their source
clock according to their utilization on runtime. But, they share the same
power line (e.g., regulator). So, specific device driver is operated as parent
with ondemand governor and then the rest device driver with passive governor
is influenced by parent device.

Suggested-by: Myungjoo Ham 
Signed-off-by: Chanwoo Choi 
[tjakobi: Reported RCU locking issue and cw00.choi fix it.]
Reported-by: Tobias Jakobi 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig|   8 ++
 drivers/devfreq/Makefile   |   1 +
 drivers/devfreq/governor_passive.c | 207 +
 include/linux/devfreq.h|  33 ++
 4 files changed, 249 insertions(+)
 create mode 100644 drivers/devfreq/governor_passive.c

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index cedda8f1e5eb..d260cd0219f6 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -64,6 +64,14 @@ config DEVFREQ_GOV_USERSPACE
  Otherwise, the governor does not change the frequency
  given at the initialization.
 
+config DEVFREQ_GOV_PASSIVE
+   tristate "Passive"
+   help
+ Sets the frequency based on the frequency of its parent devfreq
+ device. This governor does not change the frequency by itself
+ through sysfs entries. The passive governor recommends that
+ devfreq device uses the OPP table to get the frequency/voltage.
+
 comment "DEVFREQ Drivers"
 
 config ARM_EXYNOS_BUS_DEVFREQ
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 8af8aaf922a8..2633087d5c63 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)   += 
governor_simpleondemand.o
 obj-$(CONFIG_DEVFREQ_GOV_PERFORMANCE)  += governor_performance.o
 obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE)+= governor_powersave.o
 obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
+obj-$(CONFIG_DEVFREQ_GOV_PASSIVE)  += governor_passive.o
 
 # DEVFREQ Drivers
 obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
diff --git a/drivers/devfreq/governor_passive.c 
b/drivers/devfreq/governor_passive.c
new file mode 100644
index ..28a9ae32d330
--- /dev/null
+++ b/drivers/devfreq/governor_passive.c
@@ -0,0 +1,207 @@
+/*
+ * linux/drivers/devfreq/governor_passive.c
+ *
+ * Copyright (C) 2016 Samsung Electronics
+ * Author: Chanwoo Choi 
+ * Author: MyungJoo Ham 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include "governor.h"
+
+static int devfreq_passive_get_target_freq(struct devfreq *devfreq,
+   unsigned long *freq)
+{
+   struct devfreq_passive_data *p_data
+   = (struct devfreq_passive_data *)devfreq->data;
+   struct devfreq *parent_devfreq = (struct devfreq *)p_data->parent;
+   unsigned long child_freq = ULONG_MAX;
+   struct dev_pm_opp *opp;
+   int i, count, ret = 0;
+
+   /*
+* If the devfreq device with passive governor has the specific method
+* to determine the next frequency, should use the get_target_freq()
+* of struct devfreq_passive_data.
+*/
+   if (p_data->get_target_freq) {
+   ret = p_data->get_target_freq(devfreq, freq);
+   goto out;
+   }
+
+   /*
+* If the parent and passive devfreq device uses the OPP table,
+* get the next frequency by using the OPP table.
+*/
+
+   /*
+* - parent devfreq device uses the governors except for passive.
+* - passive devfreq device uses the passive governor.
+*
+* Each devfreq has the OPP table. After deciding the new frequency
+* from the governor of parent devfreq device, the passive governor
+* need to get the index of new frequency on OPP table of parent
+* 

[PATCH v8 15/20] ARM: dts: Add bus nodes using VDD_INT for Exynos4x12

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD
: The minimum clock of ACLK160 should be over 160MHz.
  When drop the clock under 160MHz, show the broken image.
- ACLK133 clock for FSYS
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4x12.dtsi | 106 ++
 1 file changed, 106 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index 99a0f4ca3d47..e5173107ed44 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -349,6 +349,112 @@
opp-hz = /bits/ 64 <26700>;
};
};
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_display: bus_display {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK160>;
+   clock-names = "bus";
+   operating-points-v2 = <_display_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK133>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <90>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <925000>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   opp-microvolt = <95>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <100>;
+   };
+   };
+
+   bus_display_opp_table: opp_table4 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   };
+   };
+
+   bus_fsys_opp_table: opp_table5 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   };
+
+   bus_peri_opp_table: opp_table6 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   };
 };
 
  {
-- 
1.9.1

[PATCH v8 11/20] ARM: dts: Add DMC bus node for Exynos3250

[Chanwoo Choi]

This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.

Following list specifies the detailed relation between the clock and DMC block:
- The source clock of DMC block : div_dmc

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: MyungJoo Ham 
---
 arch/arm/boot/dts/exynos3250.dtsi | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 137f9015d4e8..1ae72c4fa55e 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -688,6 +688,40 @@
clock-names = "ppmu";
status = "disabled";
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = <_dmc CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <80>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <80>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <80>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <825000>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <875000>;
+   };
+   };
};
 };
 
-- 
1.9.1

[PATCH v8 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver

[Chanwoo Choi]

This patch adds the generic exynos bus frequency driver for AMBA AXI bus
of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
have the common architecture for bus between DRAM and sub-blocks in SoC.
This driver can support the generic bus frequency driver for Exynos SoCs.

In devicetree, Each bus block has a bus clock, regulator, operation-point
and devfreq-event devices which measure the utilization of each bus block.

Signed-off-by: Chanwoo Choi 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |  15 ++
 drivers/devfreq/Makefile |   1 +
 drivers/devfreq/exynos-bus.c | 443 +++
 3 files changed, 459 insertions(+)
 create mode 100644 drivers/devfreq/exynos-bus.c

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 4de78c552251..cedda8f1e5eb 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
 
 comment "DEVFREQ Drivers"
 
+config ARM_EXYNOS_BUS_DEVFREQ
+   bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
+   depends on ARCH_EXYNOS
+   select DEVFREQ_GOV_SIMPLE_ONDEMAND
+   select DEVFREQ_EVENT_EXYNOS_PPMU
+   select PM_DEVFREQ_EVENT
+   select PM_OPP
+   help
+ This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
+ Memory bus has one more group of memory bus (e.g, MIF and INT block).
+ Each memory bus group could contain many memoby bus block. It reads
+ PPMU counters of memory controllers by using DEVFREQ-event device
+ and adjusts the operating frequencies and voltages with OPP support.
+ This does not yet operate with optimal voltages.
+
 config ARM_EXYNOS4_BUS_DEVFREQ
bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
!ARCH_MULTIPLATFORM
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 5134f9ee983d..8af8aaf922a8 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
 obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
 
 # DEVFREQ Drivers
+obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
 obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
new file mode 100644
index ..137de6196af3
--- /dev/null
+++ b/drivers/devfreq/exynos-bus.c
@@ -0,0 +1,443 @@
+/*
+ * Generic Exynos Bus frequency driver with DEVFREQ Framework
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Author : Chanwoo Choi 
+ *
+ * This driver support Exynos Bus frequency feature by using
+ * DEVFREQ framework and is based on drivers/devfreq/exynos/exynos4_bus.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEFAULT_SATURATION_RATIO   40
+#define DEFAULT_VOLTAGE_TOLERANCE  2
+
+struct exynos_bus {
+   struct device *dev;
+
+   struct devfreq *devfreq;
+   struct devfreq_event_dev **edev;
+   unsigned int edev_count;
+   struct mutex lock;
+
+   struct dev_pm_opp *curr_opp;
+
+   struct regulator *regulator;
+   struct clk *clk;
+   unsigned int voltage_tolerance;
+   unsigned int ratio;
+};
+
+/*
+ * Control the devfreq-event device to get the current state of bus
+ */
+#define exynos_bus_ops_edev(ops)   \
+static int exynos_bus_##ops(struct exynos_bus *bus)\
+{  \
+   int i, ret; \
+   \
+   for (i = 0; i < bus->edev_count; i++) { \
+   if (!bus->edev[i])  \
+   continue;   \
+   ret = devfreq_event_##ops(bus->edev[i]);\
+   if (ret < 0)\
+   return ret; \
+   }   \
+   \
+   return 0;   \
+}

[PATCH v8 20/20] ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3

[Chanwoo Choi]

THis patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.

The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 47 +
 arch/arm/boot/dts/exynos4412-trats2.dts | 47 +
 2 files changed, 94 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index b4983cbc4f8c..2015f10071f9 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -109,6 +109,53 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_acp {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_c2c {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_display {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts 
b/arch/arm/boot/dts/exynos4412-trats2.dts
index dce3cebe0606..9f3fb9a7f5f4 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -289,6 +289,53 @@
status = "okay";
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_acp {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_c2c {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_display {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 15/20] ARM: dts: Add bus nodes using VDD_INT for Exynos4x12

[Chanwoo Choi]

This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD
: The minimum clock of ACLK160 should be over 160MHz.
  When drop the clock under 160MHz, show the broken image.
- ACLK133 clock for FSYS
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4x12.dtsi | 106 ++
 1 file changed, 106 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index 99a0f4ca3d47..e5173107ed44 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -349,6 +349,112 @@
opp-hz = /bits/ 64 <26700>;
};
};
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_display: bus_display {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK160>;
+   clock-names = "bus";
+   operating-points-v2 = <_display_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK133>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <90>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <925000>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   opp-microvolt = <95>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <100>;
+   };
+   };
+
+   bus_display_opp_table: opp_table4 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   };
+   };
+
+   bus_fsys_opp_table: opp_table5 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   };
+
+   bus_peri_opp_table: opp_table6 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   };
 };
 
  {
-- 
1.9.1

[PATCH v8 11/20] ARM: dts: Add DMC bus node for Exynos3250

[Chanwoo Choi]

This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 SoC.
The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard
SDRAM devices. The bus includes the OPP tables and the source clock for DMC
block.

Following list specifies the detailed relation between the clock and DMC block:
- The source clock of DMC block : div_dmc

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: MyungJoo Ham 
---
 arch/arm/boot/dts/exynos3250.dtsi | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi 
b/arch/arm/boot/dts/exynos3250.dtsi
index 137f9015d4e8..1ae72c4fa55e 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -688,6 +688,40 @@
clock-names = "ppmu";
status = "disabled";
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = <_dmc CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <80>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <80>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <80>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <825000>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <875000>;
+   };
+   };
};
 };
 
-- 
1.9.1

[PATCH v8 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver

[Chanwoo Choi]

This patch adds the generic exynos bus frequency driver for AMBA AXI bus
of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
have the common architecture for bus between DRAM and sub-blocks in SoC.
This driver can support the generic bus frequency driver for Exynos SoCs.

In devicetree, Each bus block has a bus clock, regulator, operation-point
and devfreq-event devices which measure the utilization of each bus block.

Signed-off-by: Chanwoo Choi 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
Signed-off-by: MyungJoo Ham 
---
 drivers/devfreq/Kconfig  |  15 ++
 drivers/devfreq/Makefile |   1 +
 drivers/devfreq/exynos-bus.c | 443 +++
 3 files changed, 459 insertions(+)
 create mode 100644 drivers/devfreq/exynos-bus.c

diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 4de78c552251..cedda8f1e5eb 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
 
 comment "DEVFREQ Drivers"
 
+config ARM_EXYNOS_BUS_DEVFREQ
+   bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
+   depends on ARCH_EXYNOS
+   select DEVFREQ_GOV_SIMPLE_ONDEMAND
+   select DEVFREQ_EVENT_EXYNOS_PPMU
+   select PM_DEVFREQ_EVENT
+   select PM_OPP
+   help
+ This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
+ Memory bus has one more group of memory bus (e.g, MIF and INT block).
+ Each memory bus group could contain many memoby bus block. It reads
+ PPMU counters of memory controllers by using DEVFREQ-event device
+ and adjusts the operating frequencies and voltages with OPP support.
+ This does not yet operate with optimal voltages.
+
 config ARM_EXYNOS4_BUS_DEVFREQ
bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && 
!ARCH_MULTIPLATFORM
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 5134f9ee983d..8af8aaf922a8 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
 obj-$(CONFIG_DEVFREQ_GOV_USERSPACE)+= governor_userspace.o
 
 # DEVFREQ Drivers
+obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ)   += exynos-bus.o
 obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ)  += exynos/
 obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
new file mode 100644
index ..137de6196af3
--- /dev/null
+++ b/drivers/devfreq/exynos-bus.c
@@ -0,0 +1,443 @@
+/*
+ * Generic Exynos Bus frequency driver with DEVFREQ Framework
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Author : Chanwoo Choi 
+ *
+ * This driver support Exynos Bus frequency feature by using
+ * DEVFREQ framework and is based on drivers/devfreq/exynos/exynos4_bus.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DEFAULT_SATURATION_RATIO   40
+#define DEFAULT_VOLTAGE_TOLERANCE  2
+
+struct exynos_bus {
+   struct device *dev;
+
+   struct devfreq *devfreq;
+   struct devfreq_event_dev **edev;
+   unsigned int edev_count;
+   struct mutex lock;
+
+   struct dev_pm_opp *curr_opp;
+
+   struct regulator *regulator;
+   struct clk *clk;
+   unsigned int voltage_tolerance;
+   unsigned int ratio;
+};
+
+/*
+ * Control the devfreq-event device to get the current state of bus
+ */
+#define exynos_bus_ops_edev(ops)   \
+static int exynos_bus_##ops(struct exynos_bus *bus)\
+{  \
+   int i, ret; \
+   \
+   for (i = 0; i < bus->edev_count; i++) { \
+   if (!bus->edev[i])  \
+   continue;   \
+   ret = devfreq_event_##ops(bus->edev[i]);\
+   if (ret < 0)\
+   return ret; \
+   }   \
+   \
+   return 0;   \
+}
+exynos_bus_ops_edev(enable_edev);
+exynos_bus_ops_edev(disable_edev);
+exynos_bus_ops_edev(set_event);
+
+static int exynos_bus_get_event(struct 

[PATCH v8 20/20] ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3

[Chanwoo Choi]

THis patch adds the bus device tree nodes for both MIF (Memory) and INT
(Internal) block to enable the bus frequency.

The DMC bus is parent device in MIF block using VDD_MIF and the LEFTBUS
bus is parent device in INT block using VDD_INT.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 47 +
 arch/arm/boot/dts/exynos4412-trats2.dts | 47 +
 2 files changed, 94 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index b4983cbc4f8c..2015f10071f9 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -109,6 +109,53 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_acp {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_c2c {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_display {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts 
b/arch/arm/boot/dts/exynos4412-trats2.dts
index dce3cebe0606..9f3fb9a7f5f4 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -289,6 +289,53 @@
status = "okay";
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_acp {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_c2c {
+   devfreq = <_dmc>;
+   status = "okay";
+};
+
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_display {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peri {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor

[Chanwoo Choi]

This patch-set includes the two features as following. The generic exynos bus
frequency driver is able to support almost Exynos SoCs for bus frequency
scaling. And the new passive governor is able to make the dependency on
between devices for frequency/voltage scaling. I had posted the patch-set[1]
with the similiar concept. This is is revised version for exynos bus frequency.
- Generic exynos bus frequency driver
- New passive governor of DEVFREQ framework
[1] https://lkml.org/lkml/2015/1/7/872
: [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver


Changes from v7:
(https://lkml.org/lkml/2016/3/31/308)
- Use IS_ERR() instead of IS_ERR_OR_NULL() macro
- Add signed-off-by/acked-by tag of DEVFREQ maintainer
- Fix the comment in governor_passive.c

Changes from v6:
(https://lkml.org/lkml/2016/3/27/187)
- Patch1/2 add signed-off-by tag from DEVFREQ Maintainer (Myungjoo Ham)
- Drop patch5 (PM / devfreq: Add governer type with unique number)
- Add missing description about the transition_notifier_list in struct devfreq
- Remove the passive governor code from devfreq.c core driver. Instead, passive
  governor uses the DEVFREQ_GOV_START/STOP signal to register/unregister the
  DEVFREQ_TRANSITION_NOTIFIER between the parent devfreq device and passive
  devfreq device.
- Add the author (myungjoo@samsung.com) of passive governor 
- Add 'struct devfreq_passive_data' to pass the devfreq instance of parent.

Changes from v5:
(https://lkml.org/lkml/2016/3/24/5)
- Rebase the patch-set on Linux v4.6-rc1
- Add Tested-by tag from Markus Reichl 
- Add Tested-by tag from Anand Moon 

Changes from v4:
(https://lkml.org/lkml/2015/12/14/43)
- Add new DEVFREQ_TRANSITION_NOTIFIER notifier. The passive
  devfreq device recevie the changed frequency of parent
  devfreq device through DEVFREQ_TRANSITION_NOTIFIER.
- Add governor type to identify thme using the defined constant
- Modify the passive governor using the DEVFREQ_TRANSITION_NOTIFIER notifier.
- Fix the RCU locking probrlm (Reported-by: Tobias Jakobi)
- Fix the debugfs error during the kernel booting (Reported-by: Tobias Jakobi)
- The Device Tree patches have got Reviewed-by tag from Exynos SoC Maintainer
  (Krzysztof Kozlowski )

Changes from v3:
(https://lkml.org/lkml/2015/12/11/75)
- Add the reviewed-by tag from Krzysztof Kozlowski (patch2/3/13/14/15/16/17)
- Fix typo of the description on patch14
- Modify the subject and description of patch17
- Reorder the 'bus_xxx' device tree node alphabetically in 
  both exynos3250-rinato/monk.dts and exynos4412-trats/odroidu3

Changes from v2:
(https://lkml.org/lkml/2015/12/8/869)
- Fix typo on documentation
- Modify the more appropriate sentence on patch description
- Add the detailed description about both parent and passive bus device
- Modify the DMC frequency for Exynos4x12 DMC bus (200MHz -> 267MHz)
- Modify the voltage of 200MHz was included in Exynos3250 DMC bus (800mV -> 
825mV)
- Rename OPP nodes as 'opp@'
- Delete the duplicate 'opp-microvolt' property of passive devfreq device
- Reorder the 'bus_xxx' device tree node alphabetically in 
exynos3250-rinato/monk.dts
- Reorder the 'bus_xxx' device tree node alphabetically in 
exynos4412-trats/odroidu3
- Add new exynos4412-ppmu-common.dtsi to remove the duplicate PPMU dt node
  on rinato/monk/trats2/odroid-u3 board
- Add the log message if bus device is registered to devfreq framework 
successfully
- Add the reviewed-by tag from Krzysztof Kozlowski
- Add the tested-by tag from Anand Moon on Odroid U3
- Add 'SAMSUNG BUS FREQUENCY DRIVER' entry to MAINTAINERS

Changes from v1:
(https://lkml.org/lkml/2015/11/26/260)
- Check whether the instance of regulator is NULL or not
  when executing regulator_disable() because of only parent
  devfreq device has the regulator instance. After fixing it,
  the wake-up from suspend state is well working. (patch1)
- Fix bug which checks 'bus-clk' instead of 'bus->regulator'
  after calling devm_clk_get() (on patch1)
- Update the documentation to remove the description about
  DEVFREQ-EVENT subsystem (on patch2)
- Add the full name of DMC (Dynamic Memory Controller) (on patch2)
- Modify the detailed correlation of buses for Exynos3250
  on documentation (patch2)
- Add the MFC bus node for Exynos3250 (on patch11, patch12)
- Fix the duplicate frequency of bus_display on Exynos4x12.dtsi
- Add the PPMU node for exynos4412-odroidu3
- Add the support of bus frequency for exynos4412-odroidu3


[Description]
Detailed descirption for patch-set:
1. Add generic exynos bus frequency driver
: This patch-set adds the generic exynos bus frequency driver for AXI bus
of sub-blocks in exynos SoC. The Samsung Exynos SoC have the common
architecture for bus between DRAM and sub-blocks in SoC.

 There are the different buses according to Exynos SoC because Exynos SoC
has the differnt sub-blocks and bus speed. In spite of this difference
among Exynos SoCs, this driver is 

[PATCH v8 02/20] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver

[Chanwoo Choi]

This patch adds the documentation for generic exynos bus frequency
driver.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++
 1 file changed, 95 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
new file mode 100644
index ..78171b918e3f
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -0,0 +1,95 @@
+* Generic Exynos Bus frequency device
+
+The Samsung Exynos SoC has many buses for data transfer between DRAM
+and sub-blocks in SoC. Most Exynos SoCs share the common architecture
+for buses. Generally, each bus of Exynos SoC includes a source clock
+and a power line, which are able to change the clock frequency
+of the bus in runtime. To monitor the usage of each bus in runtime,
+the driver uses the PPMU (Platform Performance Monitoring Unit), which
+is able to measure the current load of sub-blocks.
+
+There are a little different composition among Exynos SoC because each Exynos
+SoC has different sub-blocks. Therefore, shch difference should be specified
+in devicetree file instead of each device driver. In result, this driver
+is able to support the bus frequency for all Exynos SoCs.
+
+Required properties for bus device:
+- compatible: Should be "samsung,exynos-bus".
+- clock-names : the name of clock used by the bus, "bus".
+- clocks : phandles for clock specified in "clock-names" property.
+- operating-points-v2: the OPP table including frequency/voltage information
+  to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+- vdd-supply: the regulator to provide the buses with the voltage.
+- devfreq-events: the devfreq-event device to monitor the current utilization
+  of buses.
+
+Optional properties for bus device:
+- exynos,saturation-ratio: the percentage value which is used to calibrate
+   the performance count against total cycle count.
+- exynos,voltage-tolerance: the percentage value for bus voltage tolerance
+   which is used to calculate the max voltage.
+
+Example1:
+   Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
+   power line (regulator). The MIF (Memory Interface) AXI bus is used to
+   transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
+
+   - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+
+   - MIF bus's frequency/voltage table
+   ---
+   |Lv| Freq   | Voltage |
+   ---
+   |L1| 5  |80   |
+   |L2| 10 |80   |
+   |L3| 134000 |80   |
+   |L4| 20 |825000   |
+   |L5| 40 |875000   |
+   ---
+
+Example2 :
+   The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
+   is listed below:
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = <_dmc CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <80>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <80>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <80>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <825000>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <875000>;
+   };
+   };
+
+   Usage case to handle the frequency and voltage of bus on runtime
+   in exynos3250-rinato.dts is listed below:
+
+   _dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;  /* VDD_MIF */
+   status = "okay";
+   };
-- 
1.9.1

[PATCH v8 16/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4210

[Chanwoo Choi]

This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos4210.dtsi | 159 ++
 1 file changed, 159 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index c1cb8df6da07..2d9b02967105 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -257,6 +257,165 @@
power-domains = <_lcd1>;
#iommu-cells = <0>;
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_acp: bus_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACP>;
+   clock-names = "bus";
+   operating-points-v2 = <_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK133>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_opp_table>;
+   status = "disabled";
+   };
+
+   bus_display: bus_display {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK160>;
+   clock-names = "bus";
+   operating-points-v2 = <_display_opp_table>;
+   status = "disabled";
+   };
+
+   bus_lcd0: bus_lcd0 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK200>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <1025000>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   opp-microvolt = <105>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <115>;
+   };
+   };
+
+   bus_acp_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   };
+   };
+
+   bus_peri_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@500 {
+   opp-hz = /bits/ 64 <500>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   };
+
+   bus_fsys_opp_table: opp_table4 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1000 {
+   

[PATCH v8 14/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12

[Chanwoo Choi]

This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4x12.dtsi | 68 +++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index 84a23f962946..99a0f4ca3d47 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -281,6 +281,74 @@
clocks = < CLK_SMMU_LITE1>, < CLK_FIMC_LITE1>;
#iommu-cells = <0>;
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_acp: bus_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACP>;
+   clock-names = "bus";
+   operating-points-v2 = <_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_c2c: bus_c2c {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_C2C>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <90>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <90>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   opp-microvolt = <90>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   opp-microvolt = <95>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <105>;
+   };
+   };
+
+   bus_acp_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   };
+   };
 };
 
  {
-- 
1.9.1

[PATCH v8 14/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12

[Chanwoo Choi]

This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4x12.dtsi | 68 +++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi 
b/arch/arm/boot/dts/exynos4x12.dtsi
index 84a23f962946..99a0f4ca3d47 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -281,6 +281,74 @@
clocks = < CLK_SMMU_LITE1>, < CLK_FIMC_LITE1>;
#iommu-cells = <0>;
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_acp: bus_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACP>;
+   clock-names = "bus";
+   operating-points-v2 = <_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_c2c: bus_c2c {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_C2C>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <90>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <90>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   opp-microvolt = <90>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   opp-microvolt = <95>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <105>;
+   };
+   };
+
+   bus_acp_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   };
+   };
 };
 
  {
-- 
1.9.1

[PATCH v8 02/20] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver

[Chanwoo Choi]

This patch adds the documentation for generic exynos bus frequency
driver.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Signed-off-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++
 1 file changed, 95 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
new file mode 100644
index ..78171b918e3f
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -0,0 +1,95 @@
+* Generic Exynos Bus frequency device
+
+The Samsung Exynos SoC has many buses for data transfer between DRAM
+and sub-blocks in SoC. Most Exynos SoCs share the common architecture
+for buses. Generally, each bus of Exynos SoC includes a source clock
+and a power line, which are able to change the clock frequency
+of the bus in runtime. To monitor the usage of each bus in runtime,
+the driver uses the PPMU (Platform Performance Monitoring Unit), which
+is able to measure the current load of sub-blocks.
+
+There are a little different composition among Exynos SoC because each Exynos
+SoC has different sub-blocks. Therefore, shch difference should be specified
+in devicetree file instead of each device driver. In result, this driver
+is able to support the bus frequency for all Exynos SoCs.
+
+Required properties for bus device:
+- compatible: Should be "samsung,exynos-bus".
+- clock-names : the name of clock used by the bus, "bus".
+- clocks : phandles for clock specified in "clock-names" property.
+- operating-points-v2: the OPP table including frequency/voltage information
+  to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+- vdd-supply: the regulator to provide the buses with the voltage.
+- devfreq-events: the devfreq-event device to monitor the current utilization
+  of buses.
+
+Optional properties for bus device:
+- exynos,saturation-ratio: the percentage value which is used to calibrate
+   the performance count against total cycle count.
+- exynos,voltage-tolerance: the percentage value for bus voltage tolerance
+   which is used to calculate the max voltage.
+
+Example1:
+   Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
+   power line (regulator). The MIF (Memory Interface) AXI bus is used to
+   transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
+
+   - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+
+   - MIF bus's frequency/voltage table
+   ---
+   |Lv| Freq   | Voltage |
+   ---
+   |L1| 5  |80   |
+   |L2| 10 |80   |
+   |L3| 134000 |80   |
+   |L4| 20 |825000   |
+   |L5| 40 |875000   |
+   ---
+
+Example2 :
+   The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
+   is listed below:
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = <_dmc CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@5000 {
+   opp-hz = /bits/ 64 <5000>;
+   opp-microvolt = <80>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   opp-microvolt = <80>;
+   };
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <80>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   opp-microvolt = <825000>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <875000>;
+   };
+   };
+
+   Usage case to handle the frequency and voltage of bus on runtime
+   in exynos3250-rinato.dts is listed below:
+
+   _dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;  /* VDD_MIF */
+   status = "okay";
+   };
-- 
1.9.1

[PATCH v8 16/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4210

[Chanwoo Choi]

This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos4210.dtsi | 159 ++
 1 file changed, 159 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4210.dtsi 
b/arch/arm/boot/dts/exynos4210.dtsi
index c1cb8df6da07..2d9b02967105 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -257,6 +257,165 @@
power-domains = <_lcd1>;
#iommu-cells = <0>;
};
+
+   bus_dmc: bus_dmc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_DMC>;
+   clock-names = "bus";
+   operating-points-v2 = <_dmc_opp_table>;
+   status = "disabled";
+   };
+
+   bus_acp: bus_acp {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_ACP>;
+   clock-names = "bus";
+   operating-points-v2 = <_acp_opp_table>;
+   status = "disabled";
+   };
+
+   bus_peri: bus_peri {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK100>;
+   clock-names = "bus";
+   operating-points-v2 = <_peri_opp_table>;
+   status = "disabled";
+   };
+
+   bus_fsys: bus_fsys {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK133>;
+   clock-names = "bus";
+   operating-points-v2 = <_fsys_opp_table>;
+   status = "disabled";
+   };
+
+   bus_display: bus_display {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK160>;
+   clock-names = "bus";
+   operating-points-v2 = <_display_opp_table>;
+   status = "disabled";
+   };
+
+   bus_lcd0: bus_lcd0 {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_ACLK200>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_leftbus: bus_leftbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDL>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_rightbus: bus_rightbus {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_DIV_GDR>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_mfc: bus_mfc {
+   compatible = "samsung,exynos-bus";
+   clocks = < CLK_SCLK_MFC>;
+   clock-names = "bus";
+   operating-points-v2 = <_leftbus_opp_table>;
+   status = "disabled";
+   };
+
+   bus_dmc_opp_table: opp_table1 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   opp-microvolt = <1025000>;
+   };
+   opp@26700 {
+   opp-hz = /bits/ 64 <26700>;
+   opp-microvolt = <105>;
+   };
+   opp@4 {
+   opp-hz = /bits/ 64 <4>;
+   opp-microvolt = <115>;
+   };
+   };
+
+   bus_acp_opp_table: opp_table2 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@13400 {
+   opp-hz = /bits/ 64 <13400>;
+   };
+   opp@16000 {
+   opp-hz = /bits/ 64 <16000>;
+   };
+   opp@2 {
+   opp-hz = /bits/ 64 <2>;
+   };
+   };
+
+   bus_peri_opp_table: opp_table3 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@500 {
+   opp-hz = /bits/ 64 <500>;
+   };
+   opp@1 {
+   opp-hz = /bits/ 64 <1>;
+   };
+   };
+
+   bus_fsys_opp_table: opp_table4 {
+   compatible = "operating-points-v2";
+   opp-shared;
+
+   opp@1000 {
+   opp-hz = /bits/ 64 

[PATCH v8 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor

[Chanwoo Choi]

This patch-set includes the two features as following. The generic exynos bus
frequency driver is able to support almost Exynos SoCs for bus frequency
scaling. And the new passive governor is able to make the dependency on
between devices for frequency/voltage scaling. I had posted the patch-set[1]
with the similiar concept. This is is revised version for exynos bus frequency.
- Generic exynos bus frequency driver
- New passive governor of DEVFREQ framework
[1] https://lkml.org/lkml/2015/1/7/872
: [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver


Changes from v7:
(https://lkml.org/lkml/2016/3/31/308)
- Use IS_ERR() instead of IS_ERR_OR_NULL() macro
- Add signed-off-by/acked-by tag of DEVFREQ maintainer
- Fix the comment in governor_passive.c

Changes from v6:
(https://lkml.org/lkml/2016/3/27/187)
- Patch1/2 add signed-off-by tag from DEVFREQ Maintainer (Myungjoo Ham)
- Drop patch5 (PM / devfreq: Add governer type with unique number)
- Add missing description about the transition_notifier_list in struct devfreq
- Remove the passive governor code from devfreq.c core driver. Instead, passive
  governor uses the DEVFREQ_GOV_START/STOP signal to register/unregister the
  DEVFREQ_TRANSITION_NOTIFIER between the parent devfreq device and passive
  devfreq device.
- Add the author (myungjoo@samsung.com) of passive governor 
- Add 'struct devfreq_passive_data' to pass the devfreq instance of parent.

Changes from v5:
(https://lkml.org/lkml/2016/3/24/5)
- Rebase the patch-set on Linux v4.6-rc1
- Add Tested-by tag from Markus Reichl 
- Add Tested-by tag from Anand Moon 

Changes from v4:
(https://lkml.org/lkml/2015/12/14/43)
- Add new DEVFREQ_TRANSITION_NOTIFIER notifier. The passive
  devfreq device recevie the changed frequency of parent
  devfreq device through DEVFREQ_TRANSITION_NOTIFIER.
- Add governor type to identify thme using the defined constant
- Modify the passive governor using the DEVFREQ_TRANSITION_NOTIFIER notifier.
- Fix the RCU locking probrlm (Reported-by: Tobias Jakobi)
- Fix the debugfs error during the kernel booting (Reported-by: Tobias Jakobi)
- The Device Tree patches have got Reviewed-by tag from Exynos SoC Maintainer
  (Krzysztof Kozlowski )

Changes from v3:
(https://lkml.org/lkml/2015/12/11/75)
- Add the reviewed-by tag from Krzysztof Kozlowski (patch2/3/13/14/15/16/17)
- Fix typo of the description on patch14
- Modify the subject and description of patch17
- Reorder the 'bus_xxx' device tree node alphabetically in 
  both exynos3250-rinato/monk.dts and exynos4412-trats/odroidu3

Changes from v2:
(https://lkml.org/lkml/2015/12/8/869)
- Fix typo on documentation
- Modify the more appropriate sentence on patch description
- Add the detailed description about both parent and passive bus device
- Modify the DMC frequency for Exynos4x12 DMC bus (200MHz -> 267MHz)
- Modify the voltage of 200MHz was included in Exynos3250 DMC bus (800mV -> 
825mV)
- Rename OPP nodes as 'opp@'
- Delete the duplicate 'opp-microvolt' property of passive devfreq device
- Reorder the 'bus_xxx' device tree node alphabetically in 
exynos3250-rinato/monk.dts
- Reorder the 'bus_xxx' device tree node alphabetically in 
exynos4412-trats/odroidu3
- Add new exynos4412-ppmu-common.dtsi to remove the duplicate PPMU dt node
  on rinato/monk/trats2/odroid-u3 board
- Add the log message if bus device is registered to devfreq framework 
successfully
- Add the reviewed-by tag from Krzysztof Kozlowski
- Add the tested-by tag from Anand Moon on Odroid U3
- Add 'SAMSUNG BUS FREQUENCY DRIVER' entry to MAINTAINERS

Changes from v1:
(https://lkml.org/lkml/2015/11/26/260)
- Check whether the instance of regulator is NULL or not
  when executing regulator_disable() because of only parent
  devfreq device has the regulator instance. After fixing it,
  the wake-up from suspend state is well working. (patch1)
- Fix bug which checks 'bus-clk' instead of 'bus->regulator'
  after calling devm_clk_get() (on patch1)
- Update the documentation to remove the description about
  DEVFREQ-EVENT subsystem (on patch2)
- Add the full name of DMC (Dynamic Memory Controller) (on patch2)
- Modify the detailed correlation of buses for Exynos3250
  on documentation (patch2)
- Add the MFC bus node for Exynos3250 (on patch11, patch12)
- Fix the duplicate frequency of bus_display on Exynos4x12.dtsi
- Add the PPMU node for exynos4412-odroidu3
- Add the support of bus frequency for exynos4412-odroidu3


[Description]
Detailed descirption for patch-set:
1. Add generic exynos bus frequency driver
: This patch-set adds the generic exynos bus frequency driver for AXI bus
of sub-blocks in exynos SoC. The Samsung Exynos SoC have the common
architecture for bus between DRAM and sub-blocks in SoC.

 There are the different buses according to Exynos SoC because Exynos SoC
has the differnt sub-blocks and bus speed. In spite of this difference
among Exynos SoCs, this driver is able to support almost Exynos SoC by adding
unique data of each bus in 

[PATCH v8 18/20] ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato

[Chanwoo Choi]

This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC

The LEFTBUS is parent device with devfreq ondemand governor
and the rest of devices depend on the LEFTBUS device.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos3250-rinato.dts | 41 +
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 9710e79e10a0..09444897b416 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -154,6 +154,47 @@
status = "okay";
 };
 
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_lcd0 {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mcuisp {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_isp {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peril {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 12/20] ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk

[Chanwoo Choi]

This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.

The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus
on runtime and the buck1_reg (VDD_MIF power line) supplies the power to
the DMC block.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: MyungJoo Ham 
---
 arch/arm/boot/dts/exynos3250-monk.dts   | 6 ++
 arch/arm/boot/dts/exynos3250-rinato.dts | 6 ++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 9e2840b59ae8..1fd7ecb5c415 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -156,6 +156,12 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 1f102f3a1ab1..5175bd7e015f 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -147,6 +147,12 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 17/20] ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes

[Chanwoo Choi]

This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos3250-monk.dts   | 41 +---
 arch/arm/boot/dts/exynos3250-rinato.dts | 41 +---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |  1 +
 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi   | 50 +
 arch/arm/boot/dts/exynos4412-trats2.dts | 41 +---
 5 files changed, 54 insertions(+), 120 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 1fd7ecb5c415..fbe09d640c9a 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -14,6 +14,7 @@
 
 /dts-v1/;
 #include "exynos3250.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 #include 
 #include 
@@ -464,46 +465,6 @@
status = "okay";
 };
 
-_dmc0 {
-   status = "okay";
-
-   events {
-   ppmu_dmc0_3: ppmu-event3-dmc0 {
-   event-name = "ppmu-event3-dmc0";
-   };
-   };
-};
-
-_dmc1 {
-   status = "okay";
-
-   events {
-   ppmu_dmc1_3: ppmu-event3-dmc1 {
-   event-name = "ppmu-event3-dmc1";
-   };
-   };
-};
-
-_leftbus {
-   status = "okay";
-
-   events {
-   ppmu_leftbus_3: ppmu-event3-leftbus {
-   event-name = "ppmu-event3-leftbus";
-   };
-   };
-};
-
-_rightbus {
-   status = "okay";
-
-   events {
-   ppmu_rightbus_3: ppmu-event3-rightbus {
-   event-name = "ppmu-event3-rightbus";
-   };
-   };
-};
-
  {
clock-frequency = <2400>;
 };
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 5175bd7e015f..9710e79e10a0 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -14,6 +14,7 @@
 
 /dts-v1/;
 #include "exynos3250.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 #include 
 #include 
@@ -641,46 +642,6 @@
status = "okay";
 };
 
-_dmc0 {
-   status = "okay";
-
-   events {
-   ppmu_dmc0_3: ppmu-event3-dmc0 {
-   event-name = "ppmu-event3-dmc0";
-   };
-   };
-};
-
-_dmc1 {
-   status = "okay";
-
-   events {
-   ppmu_dmc1_3: ppmu-event3-dmc1 {
-   event-name = "ppmu-event3-dmc1";
-   };
-   };
-};
-
-_leftbus {
-   status = "okay";
-
-   events {
-   ppmu_leftbus_3: ppmu-event3-leftbus {
-   event-name = "ppmu-event3-leftbus";
-   };
-   };
-};
-
-_rightbus {
-   status = "okay";
-
-   events {
-   ppmu_rightbus_3: ppmu-event3-rightbus {
-   event-name = "ppmu-event3-rightbus";
-   };
-   };
-};
-
  {
clock-frequency = <2400>;
 };
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 5e5d3fecb04c..cba37c974703 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include "exynos4412.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 
 / {
diff --git a/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi 
b/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
new file mode 100644
index ..16e4b77d8cb1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
@@ -0,0 +1,50 @@
+/*
+ * Device tree sources for Exynos4412 PPMU common device tree
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Chanwoo Choi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+_dmc0 {
+   status = "okay";
+
+   events {
+  ppmu_dmc0_3: ppmu-event3-dmc0 {
+  event-name = "ppmu-event3-dmc0";
+  };
+   };
+};
+
+_dmc1 {
+   status = "okay";
+
+   events {
+  ppmu_dmc1_3: ppmu-event3-dmc1 {
+  event-name = "ppmu-event3-dmc1";
+  };
+   };
+};
+
+_leftbus {
+   status = "okay";
+
+   events {
+  ppmu_leftbus_3: ppmu-event3-leftbus {
+  event-name = "ppmu-event3-leftbus";
+   

[PATCH v8 18/20] ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato

[Chanwoo Choi]

This patch adds the bus device-tree nodes of INT (internal) block
to enable the bus frequency scaling. The following sub-blocks share
the VDD_INT power source:
- LEFTBUS (parent device)
- RIGHTBUS
- PERIL
- LCD0
- FSYS
- MCUISP / ISP
- MFC

The LEFTBUS is parent device with devfreq ondemand governor
and the rest of devices depend on the LEFTBUS device.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/exynos3250-rinato.dts | 41 +
 1 file changed, 41 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 9710e79e10a0..09444897b416 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -154,6 +154,47 @@
status = "okay";
 };
 
+_leftbus {
+   devfreq-events = <_leftbus_3>, <_rightbus_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
+_rightbus {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_lcd0 {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_fsys {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mcuisp {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_isp {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_peril {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
+_mfc {
+   devfreq = <_leftbus>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 12/20] ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk

[Chanwoo Choi]

This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.

The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus
on runtime and the buck1_reg (VDD_MIF power line) supplies the power to
the DMC block.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
Acked-by: MyungJoo Ham 
---
 arch/arm/boot/dts/exynos3250-monk.dts   | 6 ++
 arch/arm/boot/dts/exynos3250-rinato.dts | 6 ++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 9e2840b59ae8..1fd7ecb5c415 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -156,6 +156,12 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 1f102f3a1ab1..5175bd7e015f 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -147,6 +147,12 @@
};
 };
 
+_dmc {
+   devfreq-events = <_dmc0_3>, <_dmc1_3>;
+   vdd-supply = <_reg>;
+   status = "okay";
+};
+
  {
cpu0-supply = <_reg>;
 };
-- 
1.9.1

[PATCH v8 17/20] ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes

[Chanwoo Choi]

This patch adds the exynos4412-ppmu-common.dtsi to remove duplicate PPMU nodes
because exynos3250-rinato/monk, exynos4412-trats2/odroidu3 has the same
PPMU device tree node.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos3250-monk.dts   | 41 +---
 arch/arm/boot/dts/exynos3250-rinato.dts | 41 +---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi |  1 +
 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi   | 50 +
 arch/arm/boot/dts/exynos4412-trats2.dts | 41 +---
 5 files changed, 54 insertions(+), 120 deletions(-)
 create mode 100644 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi

diff --git a/arch/arm/boot/dts/exynos3250-monk.dts 
b/arch/arm/boot/dts/exynos3250-monk.dts
index 1fd7ecb5c415..fbe09d640c9a 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -14,6 +14,7 @@
 
 /dts-v1/;
 #include "exynos3250.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 #include 
 #include 
@@ -464,46 +465,6 @@
status = "okay";
 };
 
-_dmc0 {
-   status = "okay";
-
-   events {
-   ppmu_dmc0_3: ppmu-event3-dmc0 {
-   event-name = "ppmu-event3-dmc0";
-   };
-   };
-};
-
-_dmc1 {
-   status = "okay";
-
-   events {
-   ppmu_dmc1_3: ppmu-event3-dmc1 {
-   event-name = "ppmu-event3-dmc1";
-   };
-   };
-};
-
-_leftbus {
-   status = "okay";
-
-   events {
-   ppmu_leftbus_3: ppmu-event3-leftbus {
-   event-name = "ppmu-event3-leftbus";
-   };
-   };
-};
-
-_rightbus {
-   status = "okay";
-
-   events {
-   ppmu_rightbus_3: ppmu-event3-rightbus {
-   event-name = "ppmu-event3-rightbus";
-   };
-   };
-};
-
  {
clock-frequency = <2400>;
 };
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts 
b/arch/arm/boot/dts/exynos3250-rinato.dts
index 5175bd7e015f..9710e79e10a0 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -14,6 +14,7 @@
 
 /dts-v1/;
 #include "exynos3250.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 #include 
 #include 
@@ -641,46 +642,6 @@
status = "okay";
 };
 
-_dmc0 {
-   status = "okay";
-
-   events {
-   ppmu_dmc0_3: ppmu-event3-dmc0 {
-   event-name = "ppmu-event3-dmc0";
-   };
-   };
-};
-
-_dmc1 {
-   status = "okay";
-
-   events {
-   ppmu_dmc1_3: ppmu-event3-dmc1 {
-   event-name = "ppmu-event3-dmc1";
-   };
-   };
-};
-
-_leftbus {
-   status = "okay";
-
-   events {
-   ppmu_leftbus_3: ppmu-event3-leftbus {
-   event-name = "ppmu-event3-leftbus";
-   };
-   };
-};
-
-_rightbus {
-   status = "okay";
-
-   events {
-   ppmu_rightbus_3: ppmu-event3-rightbus {
-   event-name = "ppmu-event3-rightbus";
-   };
-   };
-};
-
  {
clock-frequency = <2400>;
 };
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 5e5d3fecb04c..cba37c974703 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include "exynos4412.dtsi"
+#include "exynos4412-ppmu-common.dtsi"
 #include 
 
 / {
diff --git a/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi 
b/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
new file mode 100644
index ..16e4b77d8cb1
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
@@ -0,0 +1,50 @@
+/*
+ * Device tree sources for Exynos4412 PPMU common device tree
+ *
+ * Copyright (C) 2015 Samsung Electronics
+ * Author: Chanwoo Choi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+_dmc0 {
+   status = "okay";
+
+   events {
+  ppmu_dmc0_3: ppmu-event3-dmc0 {
+  event-name = "ppmu-event3-dmc0";
+  };
+   };
+};
+
+_dmc1 {
+   status = "okay";
+
+   events {
+  ppmu_dmc1_3: ppmu-event3-dmc1 {
+  event-name = "ppmu-event3-dmc1";
+  };
+   };
+};
+
+_leftbus {
+   status = "okay";
+
+   events {
+  ppmu_leftbus_3: ppmu-event3-leftbus {
+  event-name = "ppmu-event3-leftbus";
+  };
+   };
+};
+
+_rightbus {
+   status = "okay";
+
+   events {
+  

[PATCH v8 07/20] PM / devfreq: exynos: Update documentation for bus devices using passive governor

[Chanwoo Choi]

This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.

Signed-off-by: Chanwoo Choi 
Acked-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 250 -
 1 file changed, 247 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index 78171b918e3f..03f13d38f1a1 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -8,22 +8,46 @@ of the bus in runtime. To monitor the usage of each bus in 
runtime,
 the driver uses the PPMU (Platform Performance Monitoring Unit), which
 is able to measure the current load of sub-blocks.
 
+The Exynos SoC includes the various sub-blocks which have the each AXI bus.
+The each AXI bus has the owned source clock but, has not the only owned
+power line. The power line might be shared among one more sub-blocks.
+So, we can divide into two type of device as the role of each sub-block.
+There are two type of bus devices as following:
+- parent bus device
+- passive bus device
+
+Basically, parent and passive bus device share the same power line.
+The parent bus device can only change the voltage of shared power line
+and the rest bus devices (passive bus device) depend on the decision of
+the parent bus device. If there are three blocks which share the VDD_xxx
+power line, Only one block should be parent device and then the rest blocks
+should depend on the parent device as passive device.
+
+   VDD_xxx |--- A block (parent)
+   |--- B block (passive)
+   |--- C block (passive)
+
 There are a little different composition among Exynos SoC because each Exynos
 SoC has different sub-blocks. Therefore, shch difference should be specified
 in devicetree file instead of each device driver. In result, this driver
 is able to support the bus frequency for all Exynos SoCs.
 
-Required properties for bus device:
+Required properties for all bus devices:
 - compatible: Should be "samsung,exynos-bus".
 - clock-names : the name of clock used by the bus, "bus".
 - clocks : phandles for clock specified in "clock-names" property.
 - operating-points-v2: the OPP table including frequency/voltage information
   to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+
+Required properties only for parent bus device:
 - vdd-supply: the regulator to provide the buses with the voltage.
 - devfreq-events: the devfreq-event device to monitor the current utilization
   of buses.
 
-Optional properties for bus device:
+Required properties only for passive bus device:
+- devfreq: the parent bus device.
+
+Optional properties only for parent bus device:
 - exynos,saturation-ratio: the percentage value which is used to calibrate
the performance count against total cycle count.
 - exynos,voltage-tolerance: the percentage value for bus voltage tolerance
@@ -34,7 +58,20 @@ Example1:
power line (regulator). The MIF (Memory Interface) AXI bus is used to
transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
 
-   - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+   - MIF (Memory Interface) block
+   : VDD_MIF |--- DMC (Dynamic Memory Controller)
+
+   - INT (Internal) block
+   : VDD_INT |--- LEFTBUS (parent device)
+ |--- PERIL
+ |--- MFC
+ |--- G3D
+ |--- RIGHTBUS
+ |--- FSYS
+ |--- LCD0
+ |--- PERIR
+ |--- ISP
+ |--- CAM
 
- MIF bus's frequency/voltage table
---
@@ -47,6 +84,24 @@ Example1:
|L5| 40 |875000   |
---
 
+   - INT bus's frequency/voltage table
+   --
+   |Block|LEFTBUS|RIGHTBUS|MCUISP |ISP|PERIL  ||VDD_INT |
+   | name|   |LCD0|   |   |   |||
+   | |   |FSYS|   |   |   |||
+   | |   |MFC |   |   |   |||
+   --
+   |Mode |*parent|passive |passive|passive|passive|||
+   --
+   |Lv   |Frequency   ||Voltage |
+   --
+   |L1   |5  |5   |5  |5  |5  ||90  |
+   |L2   |8  |8   |8  |8  |8  ||90  |
+   |L3   |10 |10  |10 |10 |10 ||100 |
+   |L4   |134000 |134000  |20 |20 |   ||100 |
+   |L5   |20 |20  |40 |30 |   ||100 |
+   

[PATCH v8 10/20] MAINTAINERS: Add samsung bus frequency driver entry

[Chanwoo Choi]

This patch adds the 'BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS' entry to review 
the
patches as maintainer. I can access the all datasheet of Exynos SoC and test it
on some Exynos-based board. Patches will be picked up by DEVFREQ maintainer
on devfreq git repository.

Signed-off-by: Chanwoo Choi 
---
 MAINTAINERS | 9 +
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1c32f8a3d6c4..4cdef4d9ba29 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3539,6 +3539,15 @@ F:   drivers/devfreq/devfreq-event.c
 F: include/linux/devfreq-event.h
 F: Documentation/devicetree/bindings/devfreq/event/
 
+BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS
+M: Chanwoo Choi 
+L: linux...@vger.kernel.org
+L: linux-samsung-...@vger.kernel.org
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/mzx/devfreq.git
+S: Maintained
+F: drivers/devfreq/exynos-bus.c
+F: Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+
 DEVICE NUMBER REGISTRY
 M: Torben Mathiasen 
 W: http://lanana.org/docs/device-list/index.html
-- 
1.9.1

[PATCH v8 07/20] PM / devfreq: exynos: Update documentation for bus devices using passive governor

[Chanwoo Choi]

This patch updates the documentation for passive bus devices and adds the
detailed example of Exynos3250.

Signed-off-by: Chanwoo Choi 
Acked-by: MyungJoo Ham 
---
 .../devicetree/bindings/devfreq/exynos-bus.txt | 250 -
 1 file changed, 247 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt 
b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
index 78171b918e3f..03f13d38f1a1 100644
--- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -8,22 +8,46 @@ of the bus in runtime. To monitor the usage of each bus in 
runtime,
 the driver uses the PPMU (Platform Performance Monitoring Unit), which
 is able to measure the current load of sub-blocks.
 
+The Exynos SoC includes the various sub-blocks which have the each AXI bus.
+The each AXI bus has the owned source clock but, has not the only owned
+power line. The power line might be shared among one more sub-blocks.
+So, we can divide into two type of device as the role of each sub-block.
+There are two type of bus devices as following:
+- parent bus device
+- passive bus device
+
+Basically, parent and passive bus device share the same power line.
+The parent bus device can only change the voltage of shared power line
+and the rest bus devices (passive bus device) depend on the decision of
+the parent bus device. If there are three blocks which share the VDD_xxx
+power line, Only one block should be parent device and then the rest blocks
+should depend on the parent device as passive device.
+
+   VDD_xxx |--- A block (parent)
+   |--- B block (passive)
+   |--- C block (passive)
+
 There are a little different composition among Exynos SoC because each Exynos
 SoC has different sub-blocks. Therefore, shch difference should be specified
 in devicetree file instead of each device driver. In result, this driver
 is able to support the bus frequency for all Exynos SoCs.
 
-Required properties for bus device:
+Required properties for all bus devices:
 - compatible: Should be "samsung,exynos-bus".
 - clock-names : the name of clock used by the bus, "bus".
 - clocks : phandles for clock specified in "clock-names" property.
 - operating-points-v2: the OPP table including frequency/voltage information
   to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+
+Required properties only for parent bus device:
 - vdd-supply: the regulator to provide the buses with the voltage.
 - devfreq-events: the devfreq-event device to monitor the current utilization
   of buses.
 
-Optional properties for bus device:
+Required properties only for passive bus device:
+- devfreq: the parent bus device.
+
+Optional properties only for parent bus device:
 - exynos,saturation-ratio: the percentage value which is used to calibrate
the performance count against total cycle count.
 - exynos,voltage-tolerance: the percentage value for bus voltage tolerance
@@ -34,7 +58,20 @@ Example1:
power line (regulator). The MIF (Memory Interface) AXI bus is used to
transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
 
-   - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+   - MIF (Memory Interface) block
+   : VDD_MIF |--- DMC (Dynamic Memory Controller)
+
+   - INT (Internal) block
+   : VDD_INT |--- LEFTBUS (parent device)
+ |--- PERIL
+ |--- MFC
+ |--- G3D
+ |--- RIGHTBUS
+ |--- FSYS
+ |--- LCD0
+ |--- PERIR
+ |--- ISP
+ |--- CAM
 
- MIF bus's frequency/voltage table
---
@@ -47,6 +84,24 @@ Example1:
|L5| 40 |875000   |
---
 
+   - INT bus's frequency/voltage table
+   --
+   |Block|LEFTBUS|RIGHTBUS|MCUISP |ISP|PERIL  ||VDD_INT |
+   | name|   |LCD0|   |   |   |||
+   | |   |FSYS|   |   |   |||
+   | |   |MFC |   |   |   |||
+   --
+   |Mode |*parent|passive |passive|passive|passive|||
+   --
+   |Lv   |Frequency   ||Voltage |
+   --
+   |L1   |5  |5   |5  |5  |5  ||90  |
+   |L2   |8  |8   |8  |8  |8  ||90  |
+   |L3   |10 |10  |10 |10 |10 ||100 |
+   |L4   |134000 |134000  |20 |20 |   ||100 |
+   |L5   |20 |20  |40 |30 |   ||100 |
+   

[PATCH v8 10/20] MAINTAINERS: Add samsung bus frequency driver entry

[Chanwoo Choi]

This patch adds the 'BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS' entry to review 
the
patches as maintainer. I can access the all datasheet of Exynos SoC and test it
on some Exynos-based board. Patches will be picked up by DEVFREQ maintainer
on devfreq git repository.

Signed-off-by: Chanwoo Choi 
---
 MAINTAINERS | 9 +
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1c32f8a3d6c4..4cdef4d9ba29 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3539,6 +3539,15 @@ F:   drivers/devfreq/devfreq-event.c
 F: include/linux/devfreq-event.h
 F: Documentation/devicetree/bindings/devfreq/event/
 
+BUS FREQUENCY DRIVER FOR SAMSUNG EXYNOS
+M: Chanwoo Choi 
+L: linux...@vger.kernel.org
+L: linux-samsung-...@vger.kernel.org
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/mzx/devfreq.git
+S: Maintained
+F: drivers/devfreq/exynos-bus.c
+F: Documentation/devicetree/bindings/devfreq/exynos-bus.txt
+
 DEVICE NUMBER REGISTRY
 M: Torben Mathiasen 
 W: http://lanana.org/docs/device-list/index.html
-- 
1.9.1

[PATCH v8 03/20] PM / devfreq: Add devfreq_get_devfreq_by_phandle()

[Chanwoo Choi]

This patch adds the new devfreq_get_devfreq_by_phandle() OF helper function
which can find the instance of devfreq device by using phandle ("devfreq").

Signed-off-by: Chanwoo Choi 
Signed-off-by: MyungJoo Ham 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 drivers/devfreq/devfreq.c | 44 
 include/linux/devfreq.h   |  9 +
 2 files changed, 53 insertions(+)

diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 984c5e9e7bdd..20a9422c2552 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "governor.h"
 
 static struct class *devfreq_class;
@@ -639,6 +640,49 @@ struct devfreq *devm_devfreq_add_device(struct device *dev,
 }
 EXPORT_SYMBOL(devm_devfreq_add_device);
 
+#ifdef CONFIG_OF
+/*
+ * devfreq_get_devfreq_by_phandle - Get the devfreq device from devicetree
+ * @dev - instance to the given device
+ * @index - index into list of devfreq
+ *
+ * return the instance of devfreq device
+ */
+struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
+{
+   struct device_node *node;
+   struct devfreq *devfreq;
+
+   if (!dev)
+   return ERR_PTR(-EINVAL);
+
+   if (!dev->of_node)
+   return ERR_PTR(-EINVAL);
+
+   node = of_parse_phandle(dev->of_node, "devfreq", index);
+   if (!node)
+   return ERR_PTR(-ENODEV);
+
+   mutex_lock(_list_lock);
+   list_for_each_entry(devfreq, _list, node) {
+   if (devfreq->dev.parent
+   && devfreq->dev.parent->of_node == node) {
+   mutex_unlock(_list_lock);
+   return devfreq;
+   }
+   }
+   mutex_unlock(_list_lock);
+
+   return ERR_PTR(-EPROBE_DEFER);
+}
+#else
+struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
+{
+   return ERR_PTR(-ENODEV);
+}
+#endif /* CONFIG_OF */
+EXPORT_SYMBOL_GPL(devfreq_get_devfreq_by_phandle);
+
 /**
  * devm_devfreq_remove_device() - Resource-managed devfreq_remove_device()
  * @dev:   the device to add devfreq feature.
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index 6fa02a20eb63..aa0b8424ebc3 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -208,6 +208,9 @@ extern int devm_devfreq_register_opp_notifier(struct device 
*dev,
 extern void devm_devfreq_unregister_opp_notifier(struct device *dev,
struct devfreq *devfreq);
 
+extern struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev,
+   int index);
+
 /**
  * devfreq_update_stats() - update the last_status pointer in struct devfreq
  * @df:the devfreq instance whose status needs updating
@@ -307,6 +310,12 @@ static inline void 
devm_devfreq_unregister_opp_notifier(struct device *dev,
 {
 }
 
+static inline struct devfreq *devfreq_get_devfreq_by_phandle(struct device 
*dev,
+   int index)
+{
+   return ERR_PTR(-ENODEV);
+}
+
 static inline int devfreq_update_stats(struct devfreq *df)
 {
return -EINVAL;
-- 
1.9.1

[PATCH v8 19/20] ARM: dts: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3

[Chanwoo Choi]

This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index cba37c974703..b4983cbc4f8c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -356,8 +356,8 @@
 
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
-   regulator-min-microvolt = <100>;
-   regulator-max-microvolt = <100>;
+   regulator-min-microvolt = <90>;
+   regulator-max-microvolt = <110>;
regulator-always-on;
regulator-boot-on;
};
@@ -372,8 +372,8 @@
 
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
-   regulator-min-microvolt = <100>;
-   regulator-max-microvolt = <100>;
+   regulator-min-microvolt = <90>;
+   regulator-max-microvolt = <105>;
regulator-always-on;
regulator-boot-on;
};
-- 
1.9.1

[PATCH v8 03/20] PM / devfreq: Add devfreq_get_devfreq_by_phandle()

[Chanwoo Choi]

This patch adds the new devfreq_get_devfreq_by_phandle() OF helper function
which can find the instance of devfreq device by using phandle ("devfreq").

Signed-off-by: Chanwoo Choi 
Signed-off-by: MyungJoo Ham 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 drivers/devfreq/devfreq.c | 44 
 include/linux/devfreq.h   |  9 +
 2 files changed, 53 insertions(+)

diff --git a/drivers/devfreq/devfreq.c b/drivers/devfreq/devfreq.c
index 984c5e9e7bdd..20a9422c2552 100644
--- a/drivers/devfreq/devfreq.c
+++ b/drivers/devfreq/devfreq.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "governor.h"
 
 static struct class *devfreq_class;
@@ -639,6 +640,49 @@ struct devfreq *devm_devfreq_add_device(struct device *dev,
 }
 EXPORT_SYMBOL(devm_devfreq_add_device);
 
+#ifdef CONFIG_OF
+/*
+ * devfreq_get_devfreq_by_phandle - Get the devfreq device from devicetree
+ * @dev - instance to the given device
+ * @index - index into list of devfreq
+ *
+ * return the instance of devfreq device
+ */
+struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
+{
+   struct device_node *node;
+   struct devfreq *devfreq;
+
+   if (!dev)
+   return ERR_PTR(-EINVAL);
+
+   if (!dev->of_node)
+   return ERR_PTR(-EINVAL);
+
+   node = of_parse_phandle(dev->of_node, "devfreq", index);
+   if (!node)
+   return ERR_PTR(-ENODEV);
+
+   mutex_lock(_list_lock);
+   list_for_each_entry(devfreq, _list, node) {
+   if (devfreq->dev.parent
+   && devfreq->dev.parent->of_node == node) {
+   mutex_unlock(_list_lock);
+   return devfreq;
+   }
+   }
+   mutex_unlock(_list_lock);
+
+   return ERR_PTR(-EPROBE_DEFER);
+}
+#else
+struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev, int index)
+{
+   return ERR_PTR(-ENODEV);
+}
+#endif /* CONFIG_OF */
+EXPORT_SYMBOL_GPL(devfreq_get_devfreq_by_phandle);
+
 /**
  * devm_devfreq_remove_device() - Resource-managed devfreq_remove_device()
  * @dev:   the device to add devfreq feature.
diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h
index 6fa02a20eb63..aa0b8424ebc3 100644
--- a/include/linux/devfreq.h
+++ b/include/linux/devfreq.h
@@ -208,6 +208,9 @@ extern int devm_devfreq_register_opp_notifier(struct device 
*dev,
 extern void devm_devfreq_unregister_opp_notifier(struct device *dev,
struct devfreq *devfreq);
 
+extern struct devfreq *devfreq_get_devfreq_by_phandle(struct device *dev,
+   int index);
+
 /**
  * devfreq_update_stats() - update the last_status pointer in struct devfreq
  * @df:the devfreq instance whose status needs updating
@@ -307,6 +310,12 @@ static inline void 
devm_devfreq_unregister_opp_notifier(struct device *dev,
 {
 }
 
+static inline struct devfreq *devfreq_get_devfreq_by_phandle(struct device 
*dev,
+   int index)
+{
+   return ERR_PTR(-ENODEV);
+}
+
 static inline int devfreq_update_stats(struct devfreq *df)
 {
return -EINVAL;
-- 
1.9.1

[PATCH v8 19/20] ARM: dts: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3

[Chanwoo Choi]

This patch expands the voltage range of buck1/3 regulator due to as following:
- MIF (Memory Interface) bus frequency needs the range of '900 - 1100 mV'.
- INT (Internal) bus frequency needs the range of '900 - 1050 mV'.

Signed-off-by: Chanwoo Choi 
Reviewed-by: Krzysztof Kozlowski 
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl 
Tested-by: Anand Moon 
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi 
b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index cba37c974703..b4983cbc4f8c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -356,8 +356,8 @@
 
buck1_reg: BUCK1 {
regulator-name = "vdd_mif";
-   regulator-min-microvolt = <100>;
-   regulator-max-microvolt = <100>;
+   regulator-min-microvolt = <90>;
+   regulator-max-microvolt = <110>;
regulator-always-on;
regulator-boot-on;
};
@@ -372,8 +372,8 @@
 
buck3_reg: BUCK3 {
regulator-name = "vdd_int";
-   regulator-min-microvolt = <100>;
-   regulator-max-microvolt = <100>;
+   regulator-min-microvolt = <90>;
+   regulator-max-microvolt = <105>;
regulator-always-on;
regulator-boot-on;
};
-- 
1.9.1

linux-next: Tree for Apr 8

[Stephen Rothwell]

Hi all,

Changes since 20160407:

The akpm-current tree still had its build failure for which I applied
a patch.

Non-merge commits (relative to Linus' tree): 3002
 2806 files changed, 114490 insertions(+), 69528 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log
files in the Next directory.  Between each merge, the tree was built
with a ppc64_defconfig for powerpc and an allmodconfig (with
CONFIG_BUILD_DOCSRC=n) for x86_64, a multi_v7_defconfig for arm and a
native build of tools/perf. After the final fixups (if any), I do an
x86_64 modules_install followed by builds for x86_64 allnoconfig,
powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig
(this fails its final link) and pseries_le_defconfig and i386, sparc
and sparc64 defconfig.

Below is a summary of the state of the merge.

I am currently merging 232 trees (counting Linus' and 35 trees of patches
pending for Linus' tree).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwell

$ git checkout master
$ git reset --hard stable
Merging origin/master (c4004b02f8e5 x86: remove the kernel code/data/bss 
resources from /proc/iomem)
Merging fixes/master (9735a22799b9 Linux 4.6-rc2)
Merging kbuild-current/rc-fixes (3d1450d54a4f Makefile: Force gzip and xz on 
module install)
Merging arc-current/for-curr (b5cd46412eaa Revert "ARC: [plat-axs10x] add 
Ethernet PHY description in .dts")
Merging arm-current/fixes (208fae5c3b94 ARM: 8550/1: protect idiv patching 
against undefined gcc behavior)
Merging m68k-current/for-linus (7b8ba82ad4ad m68k/defconfig: Update defconfigs 
for v4.6-rc2)
Merging metag-fixes/fixes (0164a711c97b metag: Fix ioremap_wc/ioremap_cached 
build errors)
Merging powerpc-fixes/fixes (71528d8bd7a8 powerpc: Correct used_vsr comment)
Merging powerpc-merge-mpe/fixes (bc0195aad0da Linux 4.2-rc2)
Merging sparc/master (5ec712934ce1 sparc: Write up preadv2/pwritev2 syscalls.)
Merging net/master (579ba855524c RDS: fix congestion map corruption for 
PAGE_SIZE > 4k)
Merging ipsec/master (d6af1a31cc72 vti: Add pmtu handling to vti_xmit.)
Merging ipvs/master (7617a24f83b5 ipvs: correct initial offset of Call-ID 
header search in SIP persistence engine)
Merging wireless-drivers/master (15da5d11040c Merge tag 
'iwlwifi-for-kalle-2016-03-30' of 
https://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-fixes)
Merging mac80211/master (76e6abb5798a nl80211: check netlink protocol in socket 
release notification)
Merging sound-current/for-linus (b4203ff5464d ALSA: usb-audio: Add a quirk for 
Plantronics BT300)
Merging pci-current/for-linus (b2d7a9cd3ff8 Revert "PCI: imx6: Add support for 
active-low reset GPIO")
Merging driver-core.current/driver-core-linus (f55532a0c0b8 Linux 4.6-rc1)
Merging tty.current/tty-linus (5e00bbfbc5ec tty: Fix merge of "tty: Refactor 
tty_open()")
Merging usb.current/usb-linus (39ec5cbed0bb Merge tag 'fixes-for-v4.6-rc3' of 
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-linus)
Merging usb-gadget-fixes/fixes (adf9a3ab90eb usb: dwc3: keystone: drop dma_mask 
configuration)
Merging usb-serial-fixes/usb-linus (d48d5691ebf8 USB: option: add "D-Link 
DWM-221 B1" device id)
Merging usb-chipidea-fixes/ci-for-usb-stable (d144dfea8af7 usb: chipidea: otg: 
change workqueue ci_otg as freezable)
Merging staging.current/staging-linus (53c43c5ca133 Revert "Staging: olpc_dcon: 
Remove obsolete driver")
Merging char-misc.current/char-misc-linus (053f78d35995 Merge tag 
'lkdtm-4.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux 
into char-misc-linus)
Merging input-current/for-linus (7eb5ca09e48e Input: clarify we want 
BTN_TOOL_ on proximity)
Merging crypto-current/master (47cd30608f3f hwrng: bcm63xx - fix device tree 
compilation)
Merging ide/master (1993b176a822 Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide)
Merging devicetree-current/devicetree/merge (f76502aa9140 of/dynamic: Fix test 
for PPC_PSERIES)
Merging rr-fixes/fixes (8244062ef1e5 modules: fix l

linux-next: Tree for Apr 8

[Stephen Rothwell]

Hi all,

Changes since 20160407:

The akpm-current tree still had its build failure for which I applied
a patch.

Non-merge commits (relative to Linus' tree): 3002
 2806 files changed, 114490 insertions(+), 69528 deletions(-)



I have created today's linux-next tree at
git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
(patches at http://www.kernel.org/pub/linux/kernel/next/ ).  If you
are tracking the linux-next tree using git, you should not use "git pull"
to do so as that will try to merge the new linux-next release with the
old one.  You should use "git fetch" and checkout or reset to the new
master.

You can see which trees have been included by looking in the Next/Trees
file in the source.  There are also quilt-import.log and merge.log
files in the Next directory.  Between each merge, the tree was built
with a ppc64_defconfig for powerpc and an allmodconfig (with
CONFIG_BUILD_DOCSRC=n) for x86_64, a multi_v7_defconfig for arm and a
native build of tools/perf. After the final fixups (if any), I do an
x86_64 modules_install followed by builds for x86_64 allnoconfig,
powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig
(this fails its final link) and pseries_le_defconfig and i386, sparc
and sparc64 defconfig.

Below is a summary of the state of the merge.

I am currently merging 232 trees (counting Linus' and 35 trees of patches
pending for Linus' tree).

Stats about the size of the tree over time can be seen at
http://neuling.org/linux-next-size.html .

Status of my local build tests will be at
http://kisskb.ellerman.id.au/linux-next .  If maintainers want to give
advice about cross compilers/configs that work, we are always open to add
more builds.

Thanks to Randy Dunlap for doing many randconfig builds.  And to Paul
Gortmaker for triage and bug fixes.

-- 
Cheers,
Stephen Rothwell

$ git checkout master
$ git reset --hard stable
Merging origin/master (c4004b02f8e5 x86: remove the kernel code/data/bss 
resources from /proc/iomem)
Merging fixes/master (9735a22799b9 Linux 4.6-rc2)
Merging kbuild-current/rc-fixes (3d1450d54a4f Makefile: Force gzip and xz on 
module install)
Merging arc-current/for-curr (b5cd46412eaa Revert "ARC: [plat-axs10x] add 
Ethernet PHY description in .dts")
Merging arm-current/fixes (208fae5c3b94 ARM: 8550/1: protect idiv patching 
against undefined gcc behavior)
Merging m68k-current/for-linus (7b8ba82ad4ad m68k/defconfig: Update defconfigs 
for v4.6-rc2)
Merging metag-fixes/fixes (0164a711c97b metag: Fix ioremap_wc/ioremap_cached 
build errors)
Merging powerpc-fixes/fixes (71528d8bd7a8 powerpc: Correct used_vsr comment)
Merging powerpc-merge-mpe/fixes (bc0195aad0da Linux 4.2-rc2)
Merging sparc/master (5ec712934ce1 sparc: Write up preadv2/pwritev2 syscalls.)
Merging net/master (579ba855524c RDS: fix congestion map corruption for 
PAGE_SIZE > 4k)
Merging ipsec/master (d6af1a31cc72 vti: Add pmtu handling to vti_xmit.)
Merging ipvs/master (7617a24f83b5 ipvs: correct initial offset of Call-ID 
header search in SIP persistence engine)
Merging wireless-drivers/master (15da5d11040c Merge tag 
'iwlwifi-for-kalle-2016-03-30' of 
https://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-fixes)
Merging mac80211/master (76e6abb5798a nl80211: check netlink protocol in socket 
release notification)
Merging sound-current/for-linus (b4203ff5464d ALSA: usb-audio: Add a quirk for 
Plantronics BT300)
Merging pci-current/for-linus (b2d7a9cd3ff8 Revert "PCI: imx6: Add support for 
active-low reset GPIO")
Merging driver-core.current/driver-core-linus (f55532a0c0b8 Linux 4.6-rc1)
Merging tty.current/tty-linus (5e00bbfbc5ec tty: Fix merge of "tty: Refactor 
tty_open()")
Merging usb.current/usb-linus (39ec5cbed0bb Merge tag 'fixes-for-v4.6-rc3' of 
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-linus)
Merging usb-gadget-fixes/fixes (adf9a3ab90eb usb: dwc3: keystone: drop dma_mask 
configuration)
Merging usb-serial-fixes/usb-linus (d48d5691ebf8 USB: option: add "D-Link 
DWM-221 B1" device id)
Merging usb-chipidea-fixes/ci-for-usb-stable (d144dfea8af7 usb: chipidea: otg: 
change workqueue ci_otg as freezable)
Merging staging.current/staging-linus (53c43c5ca133 Revert "Staging: olpc_dcon: 
Remove obsolete driver")
Merging char-misc.current/char-misc-linus (053f78d35995 Merge tag 
'lkdtm-4.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux 
into char-misc-linus)
Merging input-current/for-linus (7eb5ca09e48e Input: clarify we want 
BTN_TOOL_ on proximity)
Merging crypto-current/master (47cd30608f3f hwrng: bcm63xx - fix device tree 
compilation)
Merging ide/master (1993b176a822 Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide)
Merging devicetree-current/devicetree/merge (f76502aa9140 of/dynamic: Fix test 
for PPC_PSERIES)
Merging rr-fixes/fixes (8244062ef1e5 modules: fix l

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Pan Xinhui]

On 2016年04月08日 01:31, Sergey Senozhatsky wrote:
> Change `synchronous' printk param to be RW, so user space
> can change printk mode back and forth to/from sync mode
> (which is considered to be more reliable).
> 
> Signed-off-by: Sergey Senozhatsky 
> ---
>  kernel/printk/printk.c | 63 
> ++
>  1 file changed, 53 insertions(+), 10 deletions(-)
> 
> diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
> index 89f5441..5ae6f73 100644
> --- a/kernel/printk/printk.c
> +++ b/kernel/printk/printk.c
> @@ -288,9 +288,6 @@ static u32 log_buf_len = __LOG_BUF_LEN;
> 
>  /* Control whether printing to console must be synchronous. */
>  static bool __read_mostly printk_sync = true;
> -module_param_named(synchronous, printk_sync, bool, S_IRUGO);
> -MODULE_PARM_DESC(synchronous, "make printing to console synchronous");
> -
>  /* Printing kthread for async printk */
>  static struct task_struct *printk_kthread;
>  /* When `true' printing thread has messages to print */
> @@ -1785,7 +1782,7 @@ asmlinkage int vprintk_emit(int facility, int level,
>* operate in sync mode once panic() occurred.
>*/
>   if (console_loglevel != CONSOLE_LOGLEVEL_MOTORMOUTH &&
> - printk_kthread) {
> + !printk_sync && printk_kthread) {
>   /* Offload printing to a schedulable context. */
>   printk_kthread_need_flush_console = true;
>   wake_up_process(printk_kthread);
> @@ -2757,6 +2754,16 @@ static int __init printk_late_init(void)
>  late_initcall(printk_late_init);
> 
>  #if defined CONFIG_PRINTK
> +/*
> + * kernel_param_ops.set is called from two places:
> + * - from parse_args()->printk_sync_set(), when we can't kthread_run(), so
> + *   we just set the param value. The actual initalization happens later,
> + *   from late_initcall().
> + *
> + * - from user space via sysfs knob; we can kthread_run() there (if needed).
> + */
> +static bool printk_initcall_done;
> +
>  static int printk_kthread_func(void *data)
>  {
>   while (1) {
> @@ -2780,11 +2787,7 @@ static int printk_kthread_func(void *data)
>   return 0;
>  }
> 
> -/*
> - * Init async printk via late_initcall, after core/arch/device/etc.
> - * initialization.
> - */
> -static int __init init_printk_kthread(void)
> +static int __init_printk_kthread(void)
>  {
>   struct task_struct *thread;
>   struct sched_param param = {
> @@ -2794,6 +2797,9 @@ static int __init init_printk_kthread(void)
>   if (printk_sync)
>   return 0;
> 
> + if (printk_kthread)
> + return 0;
> +
>   thread = kthread_run(printk_kthread_func, NULL, "printk");
>   if (IS_ERR(thread)) {
>   pr_err("printk: unable to create printing thread\n");
> @@ -2805,6 +2811,43 @@ static int __init init_printk_kthread(void)
>   printk_kthread = thread;
>   return 0;
>  }
> +
> +static int printk_sync_set(const char *val, const struct kernel_param *kp)
> +{
> + static DEFINE_MUTEX(printk_sync_lock);
> + int ret;
> +
> + mutex_lock(_sync_lock);
> + ret = param_set_bool(val, kp);
> + if (ret) {
> + mutex_unlock(_sync_lock);
> + return ret;
> + }
> +
> + if (printk_initcall_done)
> + ret = __init_printk_kthread();
> + mutex_unlock(_sync_lock);
> + return ret;
> +}
> +
> +static const struct kernel_param_ops param_ops_printk_sync = {
> + .set = printk_sync_set,
> + .get = param_get_bool,
> +};
> +
> +module_param_cb(synchronous, _ops_printk_sync, _sync,
> + S_IRUGO | S_IWUSR);
> +MODULE_PARM_DESC(synchronous, "make printing to console synchronous");
> +
> +/*
> + * Init async printk via late_initcall, after core/arch/device/etc.
> + * initialization.
> + */
> +static __init int init_printk_kthread(void)
> +{
> + printk_initcall_done = true;
> + return __init_printk_kthread();
hello, 

One confusion, Why not use a lock to protect __init_printk_kthread from 
parallel call? Otherwise I think there is a race.
But for simplicity, maybe you could write codes as below.

+   int ret  = __init_printk_kthread();
+   printk_initcall_done = true;
+   return ret;

In my opinion, using a lock is better.

thanks
xinhui
> +}
>  late_initcall(init_printk_kthread);
> 
>  /*
> @@ -2820,7 +2863,7 @@ static void wake_up_klogd_work_func(struct irq_work 
> *irq_work)
>   int pending = __this_cpu_xchg(printk_pending, 0);
> 
>   if (pending & PRINTK_PENDING_OUTPUT) {
> - if (printk_kthread) {
> + if (!printk_sync && printk_kthread) {
>   wake_up_process(printk_kthread);
>   } else {
>   /*
> 

Re: [PATCH v11 3/3] printk: make printk.synchronous param rw

[Pan Xinhui]

On 2016年04月08日 01:31, Sergey Senozhatsky wrote:
> Change `synchronous' printk param to be RW, so user space
> can change printk mode back and forth to/from sync mode
> (which is considered to be more reliable).
> 
> Signed-off-by: Sergey Senozhatsky 
> ---
>  kernel/printk/printk.c | 63 
> ++
>  1 file changed, 53 insertions(+), 10 deletions(-)
> 
> diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
> index 89f5441..5ae6f73 100644
> --- a/kernel/printk/printk.c
> +++ b/kernel/printk/printk.c
> @@ -288,9 +288,6 @@ static u32 log_buf_len = __LOG_BUF_LEN;
> 
>  /* Control whether printing to console must be synchronous. */
>  static bool __read_mostly printk_sync = true;
> -module_param_named(synchronous, printk_sync, bool, S_IRUGO);
> -MODULE_PARM_DESC(synchronous, "make printing to console synchronous");
> -
>  /* Printing kthread for async printk */
>  static struct task_struct *printk_kthread;
>  /* When `true' printing thread has messages to print */
> @@ -1785,7 +1782,7 @@ asmlinkage int vprintk_emit(int facility, int level,
>* operate in sync mode once panic() occurred.
>*/
>   if (console_loglevel != CONSOLE_LOGLEVEL_MOTORMOUTH &&
> - printk_kthread) {
> + !printk_sync && printk_kthread) {
>   /* Offload printing to a schedulable context. */
>   printk_kthread_need_flush_console = true;
>   wake_up_process(printk_kthread);
> @@ -2757,6 +2754,16 @@ static int __init printk_late_init(void)
>  late_initcall(printk_late_init);
> 
>  #if defined CONFIG_PRINTK
> +/*
> + * kernel_param_ops.set is called from two places:
> + * - from parse_args()->printk_sync_set(), when we can't kthread_run(), so
> + *   we just set the param value. The actual initalization happens later,
> + *   from late_initcall().
> + *
> + * - from user space via sysfs knob; we can kthread_run() there (if needed).
> + */
> +static bool printk_initcall_done;
> +
>  static int printk_kthread_func(void *data)
>  {
>   while (1) {
> @@ -2780,11 +2787,7 @@ static int printk_kthread_func(void *data)
>   return 0;
>  }
> 
> -/*
> - * Init async printk via late_initcall, after core/arch/device/etc.
> - * initialization.
> - */
> -static int __init init_printk_kthread(void)
> +static int __init_printk_kthread(void)
>  {
>   struct task_struct *thread;
>   struct sched_param param = {
> @@ -2794,6 +2797,9 @@ static int __init init_printk_kthread(void)
>   if (printk_sync)
>   return 0;
> 
> + if (printk_kthread)
> + return 0;
> +
>   thread = kthread_run(printk_kthread_func, NULL, "printk");
>   if (IS_ERR(thread)) {
>   pr_err("printk: unable to create printing thread\n");
> @@ -2805,6 +2811,43 @@ static int __init init_printk_kthread(void)
>   printk_kthread = thread;
>   return 0;
>  }
> +
> +static int printk_sync_set(const char *val, const struct kernel_param *kp)
> +{
> + static DEFINE_MUTEX(printk_sync_lock);
> + int ret;
> +
> + mutex_lock(_sync_lock);
> + ret = param_set_bool(val, kp);
> + if (ret) {
> + mutex_unlock(_sync_lock);
> + return ret;
> + }
> +
> + if (printk_initcall_done)
> + ret = __init_printk_kthread();
> + mutex_unlock(_sync_lock);
> + return ret;
> +}
> +
> +static const struct kernel_param_ops param_ops_printk_sync = {
> + .set = printk_sync_set,
> + .get = param_get_bool,
> +};
> +
> +module_param_cb(synchronous, _ops_printk_sync, _sync,
> + S_IRUGO | S_IWUSR);
> +MODULE_PARM_DESC(synchronous, "make printing to console synchronous");
> +
> +/*
> + * Init async printk via late_initcall, after core/arch/device/etc.
> + * initialization.
> + */
> +static __init int init_printk_kthread(void)
> +{
> + printk_initcall_done = true;
> + return __init_printk_kthread();
hello, 

One confusion, Why not use a lock to protect __init_printk_kthread from 
parallel call? Otherwise I think there is a race.
But for simplicity, maybe you could write codes as below.

+   int ret  = __init_printk_kthread();
+   printk_initcall_done = true;
+   return ret;

In my opinion, using a lock is better.

thanks
xinhui
> +}
>  late_initcall(init_printk_kthread);
> 
>  /*
> @@ -2820,7 +2863,7 @@ static void wake_up_klogd_work_func(struct irq_work 
> *irq_work)
>   int pending = __this_cpu_xchg(printk_pending, 0);
> 
>   if (pending & PRINTK_PENDING_OUTPUT) {
> - if (printk_kthread) {
> + if (!printk_sync && printk_kthread) {
>   wake_up_process(printk_kthread);
>   } else {
>   /*
> 

Re: [PATCH 1/2] regulator: s2mps11: Use module_platform_driver() instead subsys initcall

[Krzysztof Kozlowski]

On Thu, Apr 07, 2016 at 02:16:29PM -0400, Javier Martinez Canillas wrote:
> Hello Krzysztof,
> 
> On 04/07/2016 08:30 AM, Krzysztof Kozlowski wrote:
> > On Wed, Apr 06, 2016 at 09:49:46AM -0400, Javier Martinez Canillas wrote:
> >> The driver's init and exit function don't do anything besides registering
> >> and unregistering the platform driver, so the module_platform_driver()
> >> macro could just be used instead of having separate functions.
> >>
> >> Currently the macro is not being used because the driver is initialized at
> >> subsys init call level but this isn't necessary since consumer devices are
> >> defined in the DT as dependencies so there's no need for init calls order.
> >>
> >> Signed-off-by: Javier Martinez Canillas 
> >>
> >> ---
> >> This patch was tested on an Exynos5422 Odroid XU4 board.
> > 
> > This test might not be sufficient. XU4 is not a mobile device like many
> > other users of this driver (except Arndale Octa and Artiks all of other
> > users are mobiles/wearables).
> > 
> > For example XU4 does not have USB OTG (like other devices and like XU3).
> >
> 
> All the consumer device nodes for these regulators are defined in the
> exynos5422-odroidxu3-common.dtsi that is shared by all the Odroid XU*
> so I thought testing in the XU4 was as good as testing in the XU3
> (since the USB OTG doesn't use a regulator from this PMIC).
> 
> I've also checked the DTS for all the boards that use regulators that
> are registered by this driver and all consumer drivers supports probe
> deferral so I think this change is safe.

Ah, seems fine then! Thanks for checking.

Best regards,
Krzysztof

Re: [PATCH 1/2] regulator: s2mps11: Use module_platform_driver() instead subsys initcall

[Krzysztof Kozlowski]

On Thu, Apr 07, 2016 at 02:16:29PM -0400, Javier Martinez Canillas wrote:
> Hello Krzysztof,
> 
> On 04/07/2016 08:30 AM, Krzysztof Kozlowski wrote:
> > On Wed, Apr 06, 2016 at 09:49:46AM -0400, Javier Martinez Canillas wrote:
> >> The driver's init and exit function don't do anything besides registering
> >> and unregistering the platform driver, so the module_platform_driver()
> >> macro could just be used instead of having separate functions.
> >>
> >> Currently the macro is not being used because the driver is initialized at
> >> subsys init call level but this isn't necessary since consumer devices are
> >> defined in the DT as dependencies so there's no need for init calls order.
> >>
> >> Signed-off-by: Javier Martinez Canillas 
> >>
> >> ---
> >> This patch was tested on an Exynos5422 Odroid XU4 board.
> > 
> > This test might not be sufficient. XU4 is not a mobile device like many
> > other users of this driver (except Arndale Octa and Artiks all of other
> > users are mobiles/wearables).
> > 
> > For example XU4 does not have USB OTG (like other devices and like XU3).
> >
> 
> All the consumer device nodes for these regulators are defined in the
> exynos5422-odroidxu3-common.dtsi that is shared by all the Odroid XU*
> so I thought testing in the XU4 was as good as testing in the XU3
> (since the USB OTG doesn't use a regulator from this PMIC).
> 
> I've also checked the DTS for all the boards that use regulators that
> are registered by this driver and all consumer drivers supports probe
> deferral so I think this change is safe.

Ah, seems fine then! Thanks for checking.

Best regards,
Krzysztof