Re: [PATCH] serial_core: Change UART PM state to OFF on failure

[Pramod Gurav]

Hi Peter,

On 8 June 2016 at 22:17, Peter Hurley  wrote:
> Hi Pramod,
>
> On 05/06/2016 02:46 AM, Pramod Gurav wrote:
>> uart_change_pm is used to turn on the UART controller resources and
>> change UART's PM status. On failure to allocate pages the controller
>> be left in ON state. This will change the state to OFF on failure.
>>
>> Signed-off-by: Pramod Gurav 
>> ---
>>  drivers/tty/serial/serial_core.c | 5 +++--
>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/tty/serial/serial_core.c 
>> b/drivers/tty/serial/serial_core.c
>> index 62fe368..58af2e9 100644
>> --- a/drivers/tty/serial/serial_core.c
>> +++ b/drivers/tty/serial/serial_core.c
>> @@ -156,9 +156,10 @@ static int uart_port_startup(struct tty_struct *tty, 
>> struct uart_state *state,
>>   if (!state->xmit.buf) {
>>   /* This is protected by the per port mutex */
>>   page = get_zeroed_page(GFP_KERNEL);
>> - if (!page)
>> + if (!page) {
>
> if (!uart_console(uport))
>
> Otherwise, you'll be powering off the console.
>

Agree. Should take care console is not disabled.
> Just out of curiosity, did you actually hit this error?
No, I did not. I thought we should not be leaving port power enabled
in error case.

Thanks for review and comments.

Regards,
Pramod

Re: [PATCH] serial_core: Change UART PM state to OFF on failure

[Pramod Gurav]

Hi Peter,

On 8 June 2016 at 22:17, Peter Hurley  wrote:
> Hi Pramod,
>
> On 05/06/2016 02:46 AM, Pramod Gurav wrote:
>> uart_change_pm is used to turn on the UART controller resources and
>> change UART's PM status. On failure to allocate pages the controller
>> be left in ON state. This will change the state to OFF on failure.
>>
>> Signed-off-by: Pramod Gurav 
>> ---
>>  drivers/tty/serial/serial_core.c | 5 +++--
>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/tty/serial/serial_core.c 
>> b/drivers/tty/serial/serial_core.c
>> index 62fe368..58af2e9 100644
>> --- a/drivers/tty/serial/serial_core.c
>> +++ b/drivers/tty/serial/serial_core.c
>> @@ -156,9 +156,10 @@ static int uart_port_startup(struct tty_struct *tty, 
>> struct uart_state *state,
>>   if (!state->xmit.buf) {
>>   /* This is protected by the per port mutex */
>>   page = get_zeroed_page(GFP_KERNEL);
>> - if (!page)
>> + if (!page) {
>
> if (!uart_console(uport))
>
> Otherwise, you'll be powering off the console.
>

Agree. Should take care console is not disabled.
> Just out of curiosity, did you actually hit this error?
No, I did not. I thought we should not be leaving port power enabled
in error case.

Thanks for review and comments.

Regards,
Pramod

[PATCH 1/2] remoteproc: qcom: Driver for the self-authenticating Hexagon v5

[Bjorn Andersson]

From: Bjorn Andersson 

This initial hack powers the q6v5, boots and authenticate the mba and
use that to load the mdt and subsequent bXX files.

Signed-off-by: Bjorn Andersson 
Signed-off-by: Bjorn Andersson 
---
 drivers/remoteproc/Kconfig   |  12 +
 drivers/remoteproc/Makefile  |   2 +
 drivers/remoteproc/qcom_mdt_loader.c | 181 
 drivers/remoteproc/qcom_mdt_loader.h |  19 +
 drivers/remoteproc/qcom_q6v5_pil.c   | 866 +++
 5 files changed, 1080 insertions(+)
 create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
 create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
 create mode 100644 drivers/remoteproc/qcom_q6v5_pil.c

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 72e97d7a5209..9ec66d99b978 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -77,6 +77,18 @@ config DA8XX_REMOTEPROC
  It's safe to say n here if you're not interested in multimedia
  offloading.
 
+config QCOM_MDT_LOADER
+   tristate
+
+config QCOM_Q6V5_PIL
+   tristate "Qualcomm Hexagon V5 Peripherial Image Loader"
+   depends on OF && ARCH_QCOM
+   select REMOTEPROC
+   select QCOM_MDT_LOADER
+   help
+ Say y here to support the Qualcomm Peripherial Image Loader for the
+ Hexagon V5 based remote processors.
+
 config ST_REMOTEPROC
tristate "ST remoteproc support"
depends on ARCH_STI
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 279cb2edc880..92d3758bd15c 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -11,4 +11,6 @@ obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o
 obj-$(CONFIG_STE_MODEM_RPROC)  += ste_modem_rproc.o
 obj-$(CONFIG_WKUP_M3_RPROC)+= wkup_m3_rproc.o
 obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
+obj-$(CONFIG_QCOM_MDT_LOADER)  += qcom_mdt_loader.o
+obj-$(CONFIG_QCOM_Q6V5_PIL)+= qcom_q6v5_pil.o
 obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
diff --git a/drivers/remoteproc/qcom_mdt_loader.c 
b/drivers/remoteproc/qcom_mdt_loader.c
new file mode 100644
index ..be0b11b3d5bf
--- /dev/null
+++ b/drivers/remoteproc/qcom_mdt_loader.c
@@ -0,0 +1,181 @@
+/*
+ * Qualcomm Peripheral Image Loader
+ *
+ * Copyright (C) 2016 Linaro Ltd
+ * Copyright (C) 2015 Sony Mobile Communications Inc
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "remoteproc_internal.h"
+#include "qcom_mdt_loader.h"
+
+/**
+ * qcom_mdt_find_rsc_table() - provide dummy resource table for remoteproc
+ * @rproc: remoteproc handle
+ * @fw:firmware header
+ * @tablesz:   outgoing size of the table
+ *
+ * Returns a dummy table.
+ */
+struct resource_table *qcom_mdt_find_rsc_table(struct rproc *rproc,
+  const struct firmware *fw,
+  int *tablesz)
+{
+   static struct resource_table table = { .ver = 1, };
+
+   *tablesz = sizeof(table);
+   return 
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_find_rsc_table);
+
+int qcom_mdt_parse(const struct firmware *fw, phys_addr_t *fw_addr, size_t 
*fw_size, bool *fw_relocate)
+{
+   const struct elf32_phdr *phdrs;
+   const struct elf32_phdr *phdr;
+   const struct elf32_hdr *ehdr;
+   phys_addr_t min_addr = (phys_addr_t)ULLONG_MAX;
+   phys_addr_t max_addr = 0;
+   bool relocate = false;
+   int i;
+
+   ehdr = (struct elf32_hdr *)fw->data;
+   phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+   for (i = 0; i < ehdr->e_phnum; i++) {
+   phdr = [i];
+
+   if (phdr->p_type != PT_LOAD)
+   continue;
+
+   if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH)
+   continue;
+
+   if (!phdr->p_memsz)
+   continue;
+
+   if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+   relocate = true;
+
+   if (phdr->p_paddr < min_addr)
+   min_addr = phdr->p_paddr;
+
+   if (phdr->p_paddr + phdr->p_memsz > max_addr)
+   max_addr = round_up(phdr->p_paddr + phdr->p_memsz, 
SZ_4K);
+   }
+
+   if (fw_addr)
+   

[PATCH 2/2] dt-binding: remoteproc: Introduce Hexagon loader binding

[Bjorn Andersson]

This document defines the binding for a component that loads firmware
and control the life cycle of a self-authenticating Qualcomm Hexagon
core.

Signed-off-by: Bjorn Andersson 
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   | 138 +
 1 file changed, 138 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
new file mode 100644
index ..066ddb8d4d2a
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -0,0 +1,138 @@
+Qualcomm Hexagon Peripheral Image Loader
+
+This document defines the binding for a component that loads and boots firmware
+on the Qualcomm Hexagon core.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be one of:
+   "qcom,q6v5-pil"
+
+- reg:
+   Usage: required
+   Value type: 
+   Definition: must specify the base address and size of the qdsp6 and
+   rmb register blocks
+
+- reg-names:
+   Usage: required
+   Value type: 
+   Definition: must be "q6dsp" and "rmb"
+
+- interrupts-extended:
+   Usage: required
+   Value type: 
+   Definition: must list the watchdog, fatal IRQs ready, handover and
+   stop-ack IRQs
+
+- interrupt-names:
+   Usage: required
+   Value type: 
+   Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
+
+- clocks:
+   Usage: required
+   Value type: 
+   Definition: reference to the iface, bus and mem clocks to be held on
+   behalf of the booting of the Hexagon core
+
+- clock-names:
+   Usage: required
+   Value type: 
+   Definition: must be "iface", "bus", "mem"
+
+- resets:
+   Usage: required
+   Value type: 
+   Definition: reference to the reset-controller for the modem sub-system
+
+- reset-names:
+   Usage: required
+   Value type: 
+   Definition: must be "mss_restart"
+
+- cx-supply:
+- mss-supply:
+- mx-supply:
+- pll-supply:
+   Usage: required
+   Value type: 
+   Definition: reference to the regulators to be held on behalf of the
+   booting of the Hexagon core
+
+- qcom,smem-states:
+   Usage: required
+   Value type: 
+   Definition: reference to the smem state for requesting the Hexagon to
+   shut down
+
+- qcom,smem-state-names:
+   Usage: required
+   Value type: 
+   Definition: must be "stop"
+
+- qcom,halt-regs:
+   Usage: required
+   Value type: 
+   Definition: a phandle reference to a syscon representing TCSR followed
+   by the three offsets within syscon for q6, modem and nc
+   halt registers.
+
+= SUBNODES:
+The Hexagon node must contain two subnodes, named "mba" and "mpss" representing
+the memory regions used by the Hexagon firmware. Each sub-node must contain:
+
+- memory-region:
+   Usage: required
+   Value type: 
+   Definition: reference to the reserved-memory for the region
+
+= EXAMPLE
+The following example describes the resources needed to boot control the
+Hexagon, as it is found on MSM8974 boards.
+
+   modem-rproc@fc88 {
+   compatible = "qcom,q6v5-pil";
+   reg = <0xfc88 0x100>,
+ <0xfc82 0x020>;
+   reg-names = "qdsp6_base", "rmb_base";
+
+   interrupts-extended = < 0 24 1>,
+ <_smp2p_in 0 0>,
+ <_smp2p_in 1 0>,
+ <_smp2p_in 2 0>,
+ <_smp2p_in 3 0>;
+   interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+   clocks = < GCC_MSS_Q6_BIMC_AXI_CLK>,
+< GCC_MSS_CFG_AHB_CLK>,
+< GCC_BOOT_ROM_AHB_CLK>;
+   clock-names = "iface", "bus", "mem";
+
+   qcom,halt-regs = <_mutex_block 0x1180 0x1200 0x1280>;
+
+   resets = < GCC_MSS_RESTART>;
+   reset-names = "mss_restart";
+
+   cx-supply = <_s2>;
+   mss-supply = <_s3>;
+   mx-supply = <_s1>;
+   pll-supply = <_l12>;
+
+   qcom,smem-states = <_smp2p_out 0>;
+   qcom,smem-state-names = "stop";
+
+   mba {
+   memory-region = <_region>;
+   };
+
+   mpss {
+   memory-region = <_region>;
+   };
+   };
+
-- 
2.5.0

[PATCH 1/2] remoteproc: qcom: Driver for the self-authenticating Hexagon v5

[Bjorn Andersson]

From: Bjorn Andersson 

This initial hack powers the q6v5, boots and authenticate the mba and
use that to load the mdt and subsequent bXX files.

Signed-off-by: Bjorn Andersson 
Signed-off-by: Bjorn Andersson 
---
 drivers/remoteproc/Kconfig   |  12 +
 drivers/remoteproc/Makefile  |   2 +
 drivers/remoteproc/qcom_mdt_loader.c | 181 
 drivers/remoteproc/qcom_mdt_loader.h |  19 +
 drivers/remoteproc/qcom_q6v5_pil.c   | 866 +++
 5 files changed, 1080 insertions(+)
 create mode 100644 drivers/remoteproc/qcom_mdt_loader.c
 create mode 100644 drivers/remoteproc/qcom_mdt_loader.h
 create mode 100644 drivers/remoteproc/qcom_q6v5_pil.c

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 72e97d7a5209..9ec66d99b978 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -77,6 +77,18 @@ config DA8XX_REMOTEPROC
  It's safe to say n here if you're not interested in multimedia
  offloading.
 
+config QCOM_MDT_LOADER
+   tristate
+
+config QCOM_Q6V5_PIL
+   tristate "Qualcomm Hexagon V5 Peripherial Image Loader"
+   depends on OF && ARCH_QCOM
+   select REMOTEPROC
+   select QCOM_MDT_LOADER
+   help
+ Say y here to support the Qualcomm Peripherial Image Loader for the
+ Hexagon V5 based remote processors.
+
 config ST_REMOTEPROC
tristate "ST remoteproc support"
depends on ARCH_STI
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 279cb2edc880..92d3758bd15c 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -11,4 +11,6 @@ obj-$(CONFIG_OMAP_REMOTEPROC) += omap_remoteproc.o
 obj-$(CONFIG_STE_MODEM_RPROC)  += ste_modem_rproc.o
 obj-$(CONFIG_WKUP_M3_RPROC)+= wkup_m3_rproc.o
 obj-$(CONFIG_DA8XX_REMOTEPROC) += da8xx_remoteproc.o
+obj-$(CONFIG_QCOM_MDT_LOADER)  += qcom_mdt_loader.o
+obj-$(CONFIG_QCOM_Q6V5_PIL)+= qcom_q6v5_pil.o
 obj-$(CONFIG_ST_REMOTEPROC)+= st_remoteproc.o
diff --git a/drivers/remoteproc/qcom_mdt_loader.c 
b/drivers/remoteproc/qcom_mdt_loader.c
new file mode 100644
index ..be0b11b3d5bf
--- /dev/null
+++ b/drivers/remoteproc/qcom_mdt_loader.c
@@ -0,0 +1,181 @@
+/*
+ * Qualcomm Peripheral Image Loader
+ *
+ * Copyright (C) 2016 Linaro Ltd
+ * Copyright (C) 2015 Sony Mobile Communications Inc
+ * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "remoteproc_internal.h"
+#include "qcom_mdt_loader.h"
+
+/**
+ * qcom_mdt_find_rsc_table() - provide dummy resource table for remoteproc
+ * @rproc: remoteproc handle
+ * @fw:firmware header
+ * @tablesz:   outgoing size of the table
+ *
+ * Returns a dummy table.
+ */
+struct resource_table *qcom_mdt_find_rsc_table(struct rproc *rproc,
+  const struct firmware *fw,
+  int *tablesz)
+{
+   static struct resource_table table = { .ver = 1, };
+
+   *tablesz = sizeof(table);
+   return 
+}
+EXPORT_SYMBOL_GPL(qcom_mdt_find_rsc_table);
+
+int qcom_mdt_parse(const struct firmware *fw, phys_addr_t *fw_addr, size_t 
*fw_size, bool *fw_relocate)
+{
+   const struct elf32_phdr *phdrs;
+   const struct elf32_phdr *phdr;
+   const struct elf32_hdr *ehdr;
+   phys_addr_t min_addr = (phys_addr_t)ULLONG_MAX;
+   phys_addr_t max_addr = 0;
+   bool relocate = false;
+   int i;
+
+   ehdr = (struct elf32_hdr *)fw->data;
+   phdrs = (struct elf32_phdr *)(ehdr + 1);
+
+   for (i = 0; i < ehdr->e_phnum; i++) {
+   phdr = [i];
+
+   if (phdr->p_type != PT_LOAD)
+   continue;
+
+   if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH)
+   continue;
+
+   if (!phdr->p_memsz)
+   continue;
+
+   if (phdr->p_flags & QCOM_MDT_RELOCATABLE)
+   relocate = true;
+
+   if (phdr->p_paddr < min_addr)
+   min_addr = phdr->p_paddr;
+
+   if (phdr->p_paddr + phdr->p_memsz > max_addr)
+   max_addr = round_up(phdr->p_paddr + phdr->p_memsz, 
SZ_4K);
+   }
+
+   if (fw_addr)
+   *fw_addr = min_addr;
+   if (fw_size)
+   *fw_size = max_addr - min_addr;
+   

[PATCH 2/2] dt-binding: remoteproc: Introduce Hexagon loader binding

[Bjorn Andersson]

This document defines the binding for a component that loads firmware
and control the life cycle of a self-authenticating Qualcomm Hexagon
core.

Signed-off-by: Bjorn Andersson 
---
 .../devicetree/bindings/remoteproc/qcom,q6v5.txt   | 138 +
 1 file changed, 138 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt

diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
new file mode 100644
index ..066ddb8d4d2a
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -0,0 +1,138 @@
+Qualcomm Hexagon Peripheral Image Loader
+
+This document defines the binding for a component that loads and boots firmware
+on the Qualcomm Hexagon core.
+
+- compatible:
+   Usage: required
+   Value type: 
+   Definition: must be one of:
+   "qcom,q6v5-pil"
+
+- reg:
+   Usage: required
+   Value type: 
+   Definition: must specify the base address and size of the qdsp6 and
+   rmb register blocks
+
+- reg-names:
+   Usage: required
+   Value type: 
+   Definition: must be "q6dsp" and "rmb"
+
+- interrupts-extended:
+   Usage: required
+   Value type: 
+   Definition: must list the watchdog, fatal IRQs ready, handover and
+   stop-ack IRQs
+
+- interrupt-names:
+   Usage: required
+   Value type: 
+   Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
+
+- clocks:
+   Usage: required
+   Value type: 
+   Definition: reference to the iface, bus and mem clocks to be held on
+   behalf of the booting of the Hexagon core
+
+- clock-names:
+   Usage: required
+   Value type: 
+   Definition: must be "iface", "bus", "mem"
+
+- resets:
+   Usage: required
+   Value type: 
+   Definition: reference to the reset-controller for the modem sub-system
+
+- reset-names:
+   Usage: required
+   Value type: 
+   Definition: must be "mss_restart"
+
+- cx-supply:
+- mss-supply:
+- mx-supply:
+- pll-supply:
+   Usage: required
+   Value type: 
+   Definition: reference to the regulators to be held on behalf of the
+   booting of the Hexagon core
+
+- qcom,smem-states:
+   Usage: required
+   Value type: 
+   Definition: reference to the smem state for requesting the Hexagon to
+   shut down
+
+- qcom,smem-state-names:
+   Usage: required
+   Value type: 
+   Definition: must be "stop"
+
+- qcom,halt-regs:
+   Usage: required
+   Value type: 
+   Definition: a phandle reference to a syscon representing TCSR followed
+   by the three offsets within syscon for q6, modem and nc
+   halt registers.
+
+= SUBNODES:
+The Hexagon node must contain two subnodes, named "mba" and "mpss" representing
+the memory regions used by the Hexagon firmware. Each sub-node must contain:
+
+- memory-region:
+   Usage: required
+   Value type: 
+   Definition: reference to the reserved-memory for the region
+
+= EXAMPLE
+The following example describes the resources needed to boot control the
+Hexagon, as it is found on MSM8974 boards.
+
+   modem-rproc@fc88 {
+   compatible = "qcom,q6v5-pil";
+   reg = <0xfc88 0x100>,
+ <0xfc82 0x020>;
+   reg-names = "qdsp6_base", "rmb_base";
+
+   interrupts-extended = < 0 24 1>,
+ <_smp2p_in 0 0>,
+ <_smp2p_in 1 0>,
+ <_smp2p_in 2 0>,
+ <_smp2p_in 3 0>;
+   interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack";
+
+   clocks = < GCC_MSS_Q6_BIMC_AXI_CLK>,
+< GCC_MSS_CFG_AHB_CLK>,
+< GCC_BOOT_ROM_AHB_CLK>;
+   clock-names = "iface", "bus", "mem";
+
+   qcom,halt-regs = <_mutex_block 0x1180 0x1200 0x1280>;
+
+   resets = < GCC_MSS_RESTART>;
+   reset-names = "mss_restart";
+
+   cx-supply = <_s2>;
+   mss-supply = <_s3>;
+   mx-supply = <_s1>;
+   pll-supply = <_l12>;
+
+   qcom,smem-states = <_smp2p_out 0>;
+   qcom,smem-state-names = "stop";
+
+   mba {
+   memory-region = <_region>;
+   };
+
+   mpss {
+   memory-region = <_region>;
+   };
+   };
+
-- 
2.5.0

Re: [PATCH v2 2/7] iommu/rockchip: add map_sg callback for rk_iommu_ops

[Tomasz Figa]

Hi,

On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng  wrote:
> From: Simon Xue 
>
> The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
> that requires the callback iommu_ops .map_sg(). Adding the
> default_iommu_map_sg() to rockchip iommu accordingly.
>
> Signed-off-by: Simon Xue 
> Signed-off-by: Shunqian Zheng 
> ---
>  drivers/iommu/rockchip-iommu.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Tomasz Figa 

Best regards,
Tomasz

Re: [PATCH v2 2/7] iommu/rockchip: add map_sg callback for rk_iommu_ops

[Tomasz Figa]

Hi,

On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng  wrote:
> From: Simon Xue 
>
> The iommu_dma_alloc() in iommu/dma-iommu.c calls iommu_map_sg()
> that requires the callback iommu_ops .map_sg(). Adding the
> default_iommu_map_sg() to rockchip iommu accordingly.
>
> Signed-off-by: Simon Xue 
> Signed-off-by: Shunqian Zheng 
> ---
>  drivers/iommu/rockchip-iommu.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Tomasz Figa 

Best regards,
Tomasz

[PATCH v5 1/7] mdio: mux: Enhanced MDIO mux framework for integrated multiplexers

[Pramod Kumar]

An integrated multiplexer uses same address space for
"muxed bus selection" and "generation of mdio transaction"
hence its good to register parent bus from mux driver.

Hence added a mechanism where mux driver could register a
parent bus and pass it down to framework via mdio_mux_init api.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
---
 drivers/net/phy/mdio-mux-gpio.c|  2 +-
 drivers/net/phy/mdio-mux-mmioreg.c |  2 +-
 drivers/net/phy/mdio-mux.c | 28 ++--
 include/linux/mdio-mux.h   |  4 +++-
 4 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/net/phy/mdio-mux-gpio.c b/drivers/net/phy/mdio-mux-gpio.c
index 7ddb1ab..9199499 100644
--- a/drivers/net/phy/mdio-mux-gpio.c
+++ b/drivers/net/phy/mdio-mux-gpio.c
@@ -55,7 +55,7 @@ static int mdio_mux_gpio_probe(struct platform_device *pdev)
return PTR_ERR(s->gpios);
 
r = mdio_mux_init(>dev,
- mdio_mux_gpio_switch_fn, >mux_handle, s);
+ mdio_mux_gpio_switch_fn, >mux_handle, s, NULL);
 
if (r != 0) {
gpiod_put_array(s->gpios);
diff --git a/drivers/net/phy/mdio-mux-mmioreg.c 
b/drivers/net/phy/mdio-mux-mmioreg.c
index 7fde454..d0bed52 100644
--- a/drivers/net/phy/mdio-mux-mmioreg.c
+++ b/drivers/net/phy/mdio-mux-mmioreg.c
@@ -126,7 +126,7 @@ static int mdio_mux_mmioreg_probe(struct platform_device 
*pdev)
}
 
ret = mdio_mux_init(>dev, mdio_mux_mmioreg_switch_fn,
-   >mux_handle, s);
+   >mux_handle, s, NULL);
if (ret) {
dev_err(>dev, "failed to register mdio-mux bus %s\n",
np->full_name);
diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c
index 5c81d6f..dbd4ecc 100644
--- a/drivers/net/phy/mdio-mux.c
+++ b/drivers/net/phy/mdio-mux.c
@@ -89,7 +89,8 @@ static int parent_count;
 int mdio_mux_init(struct device *dev,
  int (*switch_fn)(int cur, int desired, void *data),
  void **mux_handle,
- void *data)
+ void *data,
+ struct mii_bus *mux_bus)
 {
struct device_node *parent_bus_node;
struct device_node *child_bus_node;
@@ -101,10 +102,21 @@ int mdio_mux_init(struct device *dev,
if (!dev->of_node)
return -ENODEV;
 
-   parent_bus_node = of_parse_phandle(dev->of_node, "mdio-parent-bus", 0);
+   if (!mux_bus) {
+   parent_bus_node = of_parse_phandle(dev->of_node,
+  "mdio-parent-bus", 0);
 
-   if (!parent_bus_node)
-   return -ENODEV;
+   if (!parent_bus_node)
+   return -ENODEV;
+
+   parent_bus = of_mdio_find_bus(parent_bus_node);
+   if (!parent_bus) {
+   ret_val = -EPROBE_DEFER;
+   goto err_parent_bus;
+   }
+   } else {
+   parent_bus = mux_bus;
+   }
 
pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);
if (pb == NULL) {
@@ -112,11 +124,6 @@ int mdio_mux_init(struct device *dev,
goto err_parent_bus;
}
 
-   parent_bus = of_mdio_find_bus(parent_bus_node);
-   if (parent_bus == NULL) {
-   ret_val = -EPROBE_DEFER;
-   goto err_parent_bus;
-   }
 
pb->switch_data = data;
pb->switch_fn = switch_fn;
@@ -177,7 +184,8 @@ int mdio_mux_init(struct device *dev,
put_device(>mii_bus->dev);
 
 err_parent_bus:
-   of_node_put(parent_bus_node);
+   if (!mux_bus)
+   of_node_put(parent_bus_node);
return ret_val;
 }
 EXPORT_SYMBOL_GPL(mdio_mux_init);
diff --git a/include/linux/mdio-mux.h b/include/linux/mdio-mux.h
index a243dbb..61f5b21 100644
--- a/include/linux/mdio-mux.h
+++ b/include/linux/mdio-mux.h
@@ -10,11 +10,13 @@
 #ifndef __LINUX_MDIO_MUX_H
 #define __LINUX_MDIO_MUX_H
 #include 
+#include 
 
 int mdio_mux_init(struct device *dev,
  int (*switch_fn) (int cur, int desired, void *data),
  void **mux_handle,
- void *data);
+ void *data,
+ struct mii_bus *mux_bus);
 
 void mdio_mux_uninit(void *mux_handle);
 
-- 
1.9.1

[PATCH v5 1/7] mdio: mux: Enhanced MDIO mux framework for integrated multiplexers

[Pramod Kumar]

An integrated multiplexer uses same address space for
"muxed bus selection" and "generation of mdio transaction"
hence its good to register parent bus from mux driver.

Hence added a mechanism where mux driver could register a
parent bus and pass it down to framework via mdio_mux_init api.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
---
 drivers/net/phy/mdio-mux-gpio.c|  2 +-
 drivers/net/phy/mdio-mux-mmioreg.c |  2 +-
 drivers/net/phy/mdio-mux.c | 28 ++--
 include/linux/mdio-mux.h   |  4 +++-
 4 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/drivers/net/phy/mdio-mux-gpio.c b/drivers/net/phy/mdio-mux-gpio.c
index 7ddb1ab..9199499 100644
--- a/drivers/net/phy/mdio-mux-gpio.c
+++ b/drivers/net/phy/mdio-mux-gpio.c
@@ -55,7 +55,7 @@ static int mdio_mux_gpio_probe(struct platform_device *pdev)
return PTR_ERR(s->gpios);
 
r = mdio_mux_init(>dev,
- mdio_mux_gpio_switch_fn, >mux_handle, s);
+ mdio_mux_gpio_switch_fn, >mux_handle, s, NULL);
 
if (r != 0) {
gpiod_put_array(s->gpios);
diff --git a/drivers/net/phy/mdio-mux-mmioreg.c 
b/drivers/net/phy/mdio-mux-mmioreg.c
index 7fde454..d0bed52 100644
--- a/drivers/net/phy/mdio-mux-mmioreg.c
+++ b/drivers/net/phy/mdio-mux-mmioreg.c
@@ -126,7 +126,7 @@ static int mdio_mux_mmioreg_probe(struct platform_device 
*pdev)
}
 
ret = mdio_mux_init(>dev, mdio_mux_mmioreg_switch_fn,
-   >mux_handle, s);
+   >mux_handle, s, NULL);
if (ret) {
dev_err(>dev, "failed to register mdio-mux bus %s\n",
np->full_name);
diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c
index 5c81d6f..dbd4ecc 100644
--- a/drivers/net/phy/mdio-mux.c
+++ b/drivers/net/phy/mdio-mux.c
@@ -89,7 +89,8 @@ static int parent_count;
 int mdio_mux_init(struct device *dev,
  int (*switch_fn)(int cur, int desired, void *data),
  void **mux_handle,
- void *data)
+ void *data,
+ struct mii_bus *mux_bus)
 {
struct device_node *parent_bus_node;
struct device_node *child_bus_node;
@@ -101,10 +102,21 @@ int mdio_mux_init(struct device *dev,
if (!dev->of_node)
return -ENODEV;
 
-   parent_bus_node = of_parse_phandle(dev->of_node, "mdio-parent-bus", 0);
+   if (!mux_bus) {
+   parent_bus_node = of_parse_phandle(dev->of_node,
+  "mdio-parent-bus", 0);
 
-   if (!parent_bus_node)
-   return -ENODEV;
+   if (!parent_bus_node)
+   return -ENODEV;
+
+   parent_bus = of_mdio_find_bus(parent_bus_node);
+   if (!parent_bus) {
+   ret_val = -EPROBE_DEFER;
+   goto err_parent_bus;
+   }
+   } else {
+   parent_bus = mux_bus;
+   }
 
pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);
if (pb == NULL) {
@@ -112,11 +124,6 @@ int mdio_mux_init(struct device *dev,
goto err_parent_bus;
}
 
-   parent_bus = of_mdio_find_bus(parent_bus_node);
-   if (parent_bus == NULL) {
-   ret_val = -EPROBE_DEFER;
-   goto err_parent_bus;
-   }
 
pb->switch_data = data;
pb->switch_fn = switch_fn;
@@ -177,7 +184,8 @@ int mdio_mux_init(struct device *dev,
put_device(>mii_bus->dev);
 
 err_parent_bus:
-   of_node_put(parent_bus_node);
+   if (!mux_bus)
+   of_node_put(parent_bus_node);
return ret_val;
 }
 EXPORT_SYMBOL_GPL(mdio_mux_init);
diff --git a/include/linux/mdio-mux.h b/include/linux/mdio-mux.h
index a243dbb..61f5b21 100644
--- a/include/linux/mdio-mux.h
+++ b/include/linux/mdio-mux.h
@@ -10,11 +10,13 @@
 #ifndef __LINUX_MDIO_MUX_H
 #define __LINUX_MDIO_MUX_H
 #include 
+#include 
 
 int mdio_mux_init(struct device *dev,
  int (*switch_fn) (int cur, int desired, void *data),
  void **mux_handle,
- void *data);
+ void *data,
+ struct mii_bus *mux_bus);
 
 void mdio_mux_uninit(void *mux_handle);
 
-- 
1.9.1

[PATCH v5 5/7] net: mdio-mux: Add MDIO mux driver for iProc SoCs

[Pramod Kumar]

iProc based SoCs supports the integrated mdio multiplexer which
has the bus selection as well as mdio transaction generation logic
inside.

This multiplexer has child buses for PCIe, SATA, USB and ETH. These
buses could be internal or external to SOC where PHYs are attached.
These buses could use C-45 or C-22 mdio transaction.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
---
 drivers/net/phy/Kconfig  |  11 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-mux-bcm-iproc.c | 248 +++
 3 files changed, 260 insertions(+)
 create mode 100644 drivers/net/phy/mdio-mux-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 6dad9a9..94c0707 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -254,6 +254,17 @@ config MDIO_BUS_MUX_MMIOREG
 
  Currently, only 8-bit registers are supported.
 
+config MDIO_BUS_MUX_BCM_IPROC
+   tristate "Support for iProc based MDIO bus multiplexers"
+   depends on OF && OF_MDIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+   select MDIO_BUS_MUX
+   default ARCH_BCM_IPROC
+   help
+ This module provides a driver for MDIO bus multiplexers found in
+ iProc based Broadcom SoCs. This multiplexer connects one of several
+ child MDIO bus to a parent bus. Buses could be internal as well as
+ external and selection logic lies inside the same multiplexer.
+
 config MDIO_BCM_UNIMAC
tristate "Broadcom UniMAC MDIO bus controller"
depends on HAS_IOMEM
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index fcdbb92..f5951d5a 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_AMD_PHY) += amd.o
 obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
 obj-$(CONFIG_MDIO_BUS_MUX_GPIO)+= mdio-mux-gpio.o
 obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
+obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC)   += mdio-mux-bcm-iproc.o
 obj-$(CONFIG_MDIO_SUN4I)   += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
diff --git a/drivers/net/phy/mdio-mux-bcm-iproc.c 
b/drivers/net/phy/mdio-mux-bcm-iproc.c
new file mode 100644
index 000..0a04125
--- /dev/null
+++ b/drivers/net/phy/mdio-mux-bcm-iproc.c
@@ -0,0 +1,248 @@
+/*
+ * Copyright 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MDIO_PARAM_OFFSET  0x00
+#define MDIO_PARAM_MIIM_CYCLE  29
+#define MDIO_PARAM_INTERNAL_SEL25
+#define MDIO_PARAM_BUS_ID  22
+#define MDIO_PARAM_C45_SEL 21
+#define MDIO_PARAM_PHY_ID  16
+#define MDIO_PARAM_PHY_DATA0
+
+#define MDIO_READ_OFFSET   0x04
+#define MDIO_READ_DATA_MASK0x
+#define MDIO_ADDR_OFFSET   0x08
+
+#define MDIO_CTRL_OFFSET   0x0C
+#define MDIO_CTRL_WRITE_OP 0x1
+#define MDIO_CTRL_READ_OP  0x2
+
+#define MDIO_STAT_OFFSET   0x10
+#define MDIO_STAT_DONE 1
+
+#define BUS_MAX_ADDR   32
+#define EXT_BUS_START_ADDR 16
+
+struct iproc_mdiomux_desc {
+   void *mux_handle;
+   void __iomem *base;
+   struct device *dev;
+   struct mii_bus *mii_bus;
+};
+
+static int iproc_mdio_wait_for_idle(void __iomem *base, bool result)
+{
+   unsigned int timeout = 1000; /* loop for 1s */
+   u32 val;
+
+   do {
+   val = readl(base + MDIO_STAT_OFFSET);
+   if ((val & MDIO_STAT_DONE) == result)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+/* start_miim_ops- Program and start MDIO transaction over mdio bus.
+ * @base: Base address
+ * @phyid: phyid of the selected bus.
+ * @reg: register offset to be read/written.
+ * @val :0 if read op else value to be written in @reg;
+ * @op: Operation that need to be carried out.
+ *  MDIO_CTRL_READ_OP: Read transaction.
+ *  MDIO_CTRL_WRITE_OP: Write transaction.
+ *
+ * Return value: Successful Read operation returns read reg values and write
+ *  operation returns 

[PATCH v5 5/7] net: mdio-mux: Add MDIO mux driver for iProc SoCs

[Pramod Kumar]

iProc based SoCs supports the integrated mdio multiplexer which
has the bus selection as well as mdio transaction generation logic
inside.

This multiplexer has child buses for PCIe, SATA, USB and ETH. These
buses could be internal or external to SOC where PHYs are attached.
These buses could use C-45 or C-22 mdio transaction.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Reviewed-by: Florian Fainelli 
---
 drivers/net/phy/Kconfig  |  11 ++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/mdio-mux-bcm-iproc.c | 248 +++
 3 files changed, 260 insertions(+)
 create mode 100644 drivers/net/phy/mdio-mux-bcm-iproc.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 6dad9a9..94c0707 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -254,6 +254,17 @@ config MDIO_BUS_MUX_MMIOREG
 
  Currently, only 8-bit registers are supported.
 
+config MDIO_BUS_MUX_BCM_IPROC
+   tristate "Support for iProc based MDIO bus multiplexers"
+   depends on OF && OF_MDIO && (ARCH_BCM_IPROC || COMPILE_TEST)
+   select MDIO_BUS_MUX
+   default ARCH_BCM_IPROC
+   help
+ This module provides a driver for MDIO bus multiplexers found in
+ iProc based Broadcom SoCs. This multiplexer connects one of several
+ child MDIO bus to a parent bus. Buses could be internal as well as
+ external and selection logic lies inside the same multiplexer.
+
 config MDIO_BCM_UNIMAC
tristate "Broadcom UniMAC MDIO bus controller"
depends on HAS_IOMEM
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index fcdbb92..f5951d5a 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_AMD_PHY) += amd.o
 obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
 obj-$(CONFIG_MDIO_BUS_MUX_GPIO)+= mdio-mux-gpio.o
 obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
+obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC)   += mdio-mux-bcm-iproc.o
 obj-$(CONFIG_MDIO_SUN4I)   += mdio-sun4i.o
 obj-$(CONFIG_MDIO_MOXART)  += mdio-moxart.o
 obj-$(CONFIG_MDIO_BCM_UNIMAC)  += mdio-bcm-unimac.o
diff --git a/drivers/net/phy/mdio-mux-bcm-iproc.c 
b/drivers/net/phy/mdio-mux-bcm-iproc.c
new file mode 100644
index 000..0a04125
--- /dev/null
+++ b/drivers/net/phy/mdio-mux-bcm-iproc.c
@@ -0,0 +1,248 @@
+/*
+ * Copyright 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation (the "GPL").
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License version 2 (GPLv2) for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * version 2 (GPLv2) along with this source code.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MDIO_PARAM_OFFSET  0x00
+#define MDIO_PARAM_MIIM_CYCLE  29
+#define MDIO_PARAM_INTERNAL_SEL25
+#define MDIO_PARAM_BUS_ID  22
+#define MDIO_PARAM_C45_SEL 21
+#define MDIO_PARAM_PHY_ID  16
+#define MDIO_PARAM_PHY_DATA0
+
+#define MDIO_READ_OFFSET   0x04
+#define MDIO_READ_DATA_MASK0x
+#define MDIO_ADDR_OFFSET   0x08
+
+#define MDIO_CTRL_OFFSET   0x0C
+#define MDIO_CTRL_WRITE_OP 0x1
+#define MDIO_CTRL_READ_OP  0x2
+
+#define MDIO_STAT_OFFSET   0x10
+#define MDIO_STAT_DONE 1
+
+#define BUS_MAX_ADDR   32
+#define EXT_BUS_START_ADDR 16
+
+struct iproc_mdiomux_desc {
+   void *mux_handle;
+   void __iomem *base;
+   struct device *dev;
+   struct mii_bus *mii_bus;
+};
+
+static int iproc_mdio_wait_for_idle(void __iomem *base, bool result)
+{
+   unsigned int timeout = 1000; /* loop for 1s */
+   u32 val;
+
+   do {
+   val = readl(base + MDIO_STAT_OFFSET);
+   if ((val & MDIO_STAT_DONE) == result)
+   return 0;
+
+   usleep_range(1000, 2000);
+   } while (timeout--);
+
+   return -ETIMEDOUT;
+}
+
+/* start_miim_ops- Program and start MDIO transaction over mdio bus.
+ * @base: Base address
+ * @phyid: phyid of the selected bus.
+ * @reg: register offset to be read/written.
+ * @val :0 if read op else value to be written in @reg;
+ * @op: Operation that need to be carried out.
+ *  MDIO_CTRL_READ_OP: Read transaction.
+ *  MDIO_CTRL_WRITE_OP: Write transaction.
+ *
+ * Return value: Successful Read operation returns read reg values and write
+ *  operation returns 0. Failure operation returns negative error code.
+ */
+static 

Re: [PATCH 1/2] max8903: adds support for initiation via device tree.

[Chris Lapa]

Hi Krzysztof,

Thanks for the review. I'm working on those changes now.

However just so I know for the future. Why no error checking on 
devm_kzalloc() result? Looking through the source for devm_kzalloc() it 
looks like NULL isn't caught anywhere else.


Thanks,
Chris

On 9/06/2016 8:35 PM, Krzysztof Kozlowski wrote:

Hi,

Thanks for your contribution. Few comments below:

On Thu, Jun 2, 2016 at 8:44 AM,   wrote:

From: Chris Lapa 

This commit also adds requesting gpio's via devm_gpio_request() to ensure
the gpio is available for usage by the driver.

Signed-off-by: Chris Lapa 
---
 .../devicetree/bindings/power/max8903-charger.txt  |  28 ++
 drivers/power/max8903_charger.c| 281 -
 2 files changed, 250 insertions(+), 59 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/power/max8903-charger.txt


Please put the bindings documentation in separate, first patch.



diff --git a/Documentation/devicetree/bindings/power/max8903-charger.txt 
b/Documentation/devicetree/bindings/power/max8903-charger.txt
new file mode 100644
index 000..7207731
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/max8903-charger.txt
@@ -0,0 +1,28 @@
+Maxim Semiconductor MAX8903 Battery Charger bindings
+
+Required properties:
+- compatible: "max8903-charger" for MAX8903 Battery Charger


Needs a 'maxim,' prefix.


+- dc_valid:
+   - dok: DC power OK pin
+- usb_valid:
+   - uok: USB power OK pin


I don't understand the explanation of them - dok/uok. What do you want
to say here?


+
+Optional properties:
+- cen: Charge enable pin
+- chg: Charger status pin
+- flt: Fault pin
+- dcm: Current limit mode setting (DC or USB)
+- usus: USB suspend pin


Each gpio should be suffixed with '-gpios' (see
Documentation/devicetree/bindings/gpio/gpio.txt).


+
+
+Example:
+
+   max8903-charger {
+   compatible = "max8903-charger";
+   dok = < 3 GPIO_ACTIVE_LOW>;
+   flt = < 2 GPIO_ACTIVE_LOW>;
+   chg = < 15 GPIO_ACTIVE_LOW>;
+   cen = < 5 GPIO_ACTIVE_LOW>;
+   dc_valid;
+   status = "okay";
+   };
diff --git a/drivers/power/max8903_charger.c b/drivers/power/max8903_charger.c
index 17876ca..1989c10 100644
--- a/drivers/power/max8903_charger.c
+++ b/drivers/power/max8903_charger.c
@@ -23,13 +23,16 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 

 struct max8903_data {
-   struct max8903_pdata pdata;
+   struct max8903_pdata *pdata;
struct device *dev;
struct power_supply *psy;
struct power_supply_desc psy_desc;
@@ -53,8 +56,8 @@ static int max8903_get_property(struct power_supply *psy,
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
-   if (data->pdata.chg) {
-   if (gpio_get_value(data->pdata.chg) == 0)
+   if (data->pdata->chg) {
+   if (gpio_get_value(data->pdata->chg) == 0)
val->intval = POWER_SUPPLY_STATUS_CHARGING;
else if (data->usb_in || data->ta_in)
val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
@@ -75,13 +78,14 @@ static int max8903_get_property(struct power_supply *psy,
default:
return -EINVAL;
}
+
return 0;
 }

 static irqreturn_t max8903_dcin(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool ta_in;
enum power_supply_type old_type;

@@ -122,7 +126,7 @@ static irqreturn_t max8903_dcin(int irq, void *_data)
 static irqreturn_t max8903_usbin(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool usb_in;
enum power_supply_type old_type;

@@ -161,7 +165,7 @@ static irqreturn_t max8903_usbin(int irq, void *_data)
 static irqreturn_t max8903_fault(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool fault;

fault = gpio_get_value(pdata->flt) ? false : true;
@@ -179,34 +183,135 @@ static irqreturn_t max8903_fault(int irq, void *_data)
return IRQ_HANDLED;
 }

+static struct max8903_pdata *max8903_parse_dt_data(
+   struct device *dev)
+{
+   struct device_node *of_node = dev->of_node;
+   struct max8903_pdata *pdata = NULL;
+
+   if (!of_node) {
+   return pdata;
+   }


Run a scripts/checkpatch.pl. In general the {} are not needed for
single statements.


+
+   pdata = devm_kzalloc(dev, sizeof(struct max8903_pdata),
+  

[PATCH 0/3] Hi655x powerkey support for HiKey (v3)

[John Stultz]

This patchset enables the pmic powerkey to function on HiKey.

New in v3:
* Integrated feedback from Lee Jones suggesting DT not be used
  to describe fixed functionality of the PMIC. Instead we use
  a mfd cell and mfd_add_device. This makes the patchset a bit
  shorter and I've dropped the DT reviewers.
* Reordered the patches so they make more sense.

Review and feedback are always appreciated!

thanks
-john


Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 

John Stultz (2):
  mfd: hi655x-pmic: Fixup issue with un-acked interrupts
  mfd: hi655x-pmic: Add powerkey device to hi655x PMIC driver

Jorge Ramirez-Ortiz (1):
  drivers: input: powerkey for HISI 65xx SoC

 drivers/input/misc/Kconfig |   9 +++
 drivers/input/misc/Makefile|   1 +
 drivers/input/misc/hisi_powerkey.c | 149 +
 drivers/mfd/hi655x-pmic.c  |  38 --
 4 files changed, 192 insertions(+), 5 deletions(-)
 create mode 100644 drivers/input/misc/hisi_powerkey.c

-- 
1.9.1

[PATCH 3/3] mfd: hi655x-pmic: Add powerkey device to hi655x PMIC driver

[John Stultz]

Wire up the powerkey driver functionality for the hi655x PMIC.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Signed-off-by: John Stultz 
---
 drivers/mfd/hi655x-pmic.c | 37 -
 1 file changed, 32 insertions(+), 5 deletions(-)

diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
index 68ab370..f3f6bfe2 100644
--- a/drivers/mfd/hi655x-pmic.c
+++ b/drivers/mfd/hi655x-pmic.c
@@ -24,10 +24,6 @@
 #include 
 #include 
 
-static const struct mfd_cell hi655x_pmic_devs[] = {
-   { .name = "hi655x-regulator", },
-};
-
 static const struct regmap_irq hi655x_irqs[] = {
{ .reg_offset = 0, .mask = OTMP_D1R_INT },
{ .reg_offset = 0, .mask = VSYS_2P5_R_INT },
@@ -56,6 +52,36 @@ static struct regmap_config hi655x_regmap_config = {
.max_register = HI655X_BUS_ADDR(0xFFF),
 };
 
+static struct resource pwrkey_resources[] = {
+   {
+   .name   = "down",
+   .start  = 6,
+   .end= 6,
+   .flags  = IORESOURCE_IRQ,
+   }, {
+   .name   = "up",
+   .start  = 5,
+   .end= 5,
+   .flags  = IORESOURCE_IRQ,
+   }, {
+   .name   = "hold 4s",
+   .start  = 4,
+   .end= 4,
+   .flags  = IORESOURCE_IRQ,
+   },
+};
+
+static const struct mfd_cell hi655x_pmic_devs[] = {
+   {
+   .name   = "hi655x-regulator",
+   },
+   {
+   .name   = "hi65xx-powerkey",
+   .num_resources  = ARRAY_SIZE(pwrkey_resources),
+   .resources  = _resources[0],
+   },
+};
+
 static void hi655x_local_irq_clear(struct regmap *map)
 {
int i;
@@ -124,7 +150,8 @@ static int hi655x_pmic_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pmic);
 
ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, hi655x_pmic_devs,
- ARRAY_SIZE(hi655x_pmic_devs), NULL, 0, NULL);
+ ARRAY_SIZE(hi655x_pmic_devs), NULL, 0,
+ regmap_irq_get_domain(pmic->irq_data));
if (ret) {
dev_err(dev, "Failed to register device %d\n", ret);
regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data);
-- 
1.9.1

Re: [PATCH 1/2] max8903: adds support for initiation via device tree.

[Chris Lapa]

Hi Krzysztof,

Thanks for the review. I'm working on those changes now.

However just so I know for the future. Why no error checking on 
devm_kzalloc() result? Looking through the source for devm_kzalloc() it 
looks like NULL isn't caught anywhere else.


Thanks,
Chris

On 9/06/2016 8:35 PM, Krzysztof Kozlowski wrote:

Hi,

Thanks for your contribution. Few comments below:

On Thu, Jun 2, 2016 at 8:44 AM,   wrote:

From: Chris Lapa 

This commit also adds requesting gpio's via devm_gpio_request() to ensure
the gpio is available for usage by the driver.

Signed-off-by: Chris Lapa 
---
 .../devicetree/bindings/power/max8903-charger.txt  |  28 ++
 drivers/power/max8903_charger.c| 281 -
 2 files changed, 250 insertions(+), 59 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/power/max8903-charger.txt


Please put the bindings documentation in separate, first patch.



diff --git a/Documentation/devicetree/bindings/power/max8903-charger.txt 
b/Documentation/devicetree/bindings/power/max8903-charger.txt
new file mode 100644
index 000..7207731
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/max8903-charger.txt
@@ -0,0 +1,28 @@
+Maxim Semiconductor MAX8903 Battery Charger bindings
+
+Required properties:
+- compatible: "max8903-charger" for MAX8903 Battery Charger


Needs a 'maxim,' prefix.


+- dc_valid:
+   - dok: DC power OK pin
+- usb_valid:
+   - uok: USB power OK pin


I don't understand the explanation of them - dok/uok. What do you want
to say here?


+
+Optional properties:
+- cen: Charge enable pin
+- chg: Charger status pin
+- flt: Fault pin
+- dcm: Current limit mode setting (DC or USB)
+- usus: USB suspend pin


Each gpio should be suffixed with '-gpios' (see
Documentation/devicetree/bindings/gpio/gpio.txt).


+
+
+Example:
+
+   max8903-charger {
+   compatible = "max8903-charger";
+   dok = < 3 GPIO_ACTIVE_LOW>;
+   flt = < 2 GPIO_ACTIVE_LOW>;
+   chg = < 15 GPIO_ACTIVE_LOW>;
+   cen = < 5 GPIO_ACTIVE_LOW>;
+   dc_valid;
+   status = "okay";
+   };
diff --git a/drivers/power/max8903_charger.c b/drivers/power/max8903_charger.c
index 17876ca..1989c10 100644
--- a/drivers/power/max8903_charger.c
+++ b/drivers/power/max8903_charger.c
@@ -23,13 +23,16 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 

 struct max8903_data {
-   struct max8903_pdata pdata;
+   struct max8903_pdata *pdata;
struct device *dev;
struct power_supply *psy;
struct power_supply_desc psy_desc;
@@ -53,8 +56,8 @@ static int max8903_get_property(struct power_supply *psy,
switch (psp) {
case POWER_SUPPLY_PROP_STATUS:
val->intval = POWER_SUPPLY_STATUS_UNKNOWN;
-   if (data->pdata.chg) {
-   if (gpio_get_value(data->pdata.chg) == 0)
+   if (data->pdata->chg) {
+   if (gpio_get_value(data->pdata->chg) == 0)
val->intval = POWER_SUPPLY_STATUS_CHARGING;
else if (data->usb_in || data->ta_in)
val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
@@ -75,13 +78,14 @@ static int max8903_get_property(struct power_supply *psy,
default:
return -EINVAL;
}
+
return 0;
 }

 static irqreturn_t max8903_dcin(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool ta_in;
enum power_supply_type old_type;

@@ -122,7 +126,7 @@ static irqreturn_t max8903_dcin(int irq, void *_data)
 static irqreturn_t max8903_usbin(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool usb_in;
enum power_supply_type old_type;

@@ -161,7 +165,7 @@ static irqreturn_t max8903_usbin(int irq, void *_data)
 static irqreturn_t max8903_fault(int irq, void *_data)
 {
struct max8903_data *data = _data;
-   struct max8903_pdata *pdata = >pdata;
+   struct max8903_pdata *pdata = data->pdata;
bool fault;

fault = gpio_get_value(pdata->flt) ? false : true;
@@ -179,34 +183,135 @@ static irqreturn_t max8903_fault(int irq, void *_data)
return IRQ_HANDLED;
 }

+static struct max8903_pdata *max8903_parse_dt_data(
+   struct device *dev)
+{
+   struct device_node *of_node = dev->of_node;
+   struct max8903_pdata *pdata = NULL;
+
+   if (!of_node) {
+   return pdata;
+   }


Run a scripts/checkpatch.pl. In general the {} are not needed for
single statements.


+
+   pdata = devm_kzalloc(dev, sizeof(struct max8903_pdata),
+   GFP_KERNEL);
+   if 

[PATCH 0/3] Hi655x powerkey support for HiKey (v3)

[John Stultz]

This patchset enables the pmic powerkey to function on HiKey.

New in v3:
* Integrated feedback from Lee Jones suggesting DT not be used
  to describe fixed functionality of the PMIC. Instead we use
  a mfd cell and mfd_add_device. This makes the patchset a bit
  shorter and I've dropped the DT reviewers.
* Reordered the patches so they make more sense.

Review and feedback are always appreciated!

thanks
-john


Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 

John Stultz (2):
  mfd: hi655x-pmic: Fixup issue with un-acked interrupts
  mfd: hi655x-pmic: Add powerkey device to hi655x PMIC driver

Jorge Ramirez-Ortiz (1):
  drivers: input: powerkey for HISI 65xx SoC

 drivers/input/misc/Kconfig |   9 +++
 drivers/input/misc/Makefile|   1 +
 drivers/input/misc/hisi_powerkey.c | 149 +
 drivers/mfd/hi655x-pmic.c  |  38 --
 4 files changed, 192 insertions(+), 5 deletions(-)
 create mode 100644 drivers/input/misc/hisi_powerkey.c

-- 
1.9.1

[PATCH 3/3] mfd: hi655x-pmic: Add powerkey device to hi655x PMIC driver

[John Stultz]

Wire up the powerkey driver functionality for the hi655x PMIC.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Signed-off-by: John Stultz 
---
 drivers/mfd/hi655x-pmic.c | 37 -
 1 file changed, 32 insertions(+), 5 deletions(-)

diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
index 68ab370..f3f6bfe2 100644
--- a/drivers/mfd/hi655x-pmic.c
+++ b/drivers/mfd/hi655x-pmic.c
@@ -24,10 +24,6 @@
 #include 
 #include 
 
-static const struct mfd_cell hi655x_pmic_devs[] = {
-   { .name = "hi655x-regulator", },
-};
-
 static const struct regmap_irq hi655x_irqs[] = {
{ .reg_offset = 0, .mask = OTMP_D1R_INT },
{ .reg_offset = 0, .mask = VSYS_2P5_R_INT },
@@ -56,6 +52,36 @@ static struct regmap_config hi655x_regmap_config = {
.max_register = HI655X_BUS_ADDR(0xFFF),
 };
 
+static struct resource pwrkey_resources[] = {
+   {
+   .name   = "down",
+   .start  = 6,
+   .end= 6,
+   .flags  = IORESOURCE_IRQ,
+   }, {
+   .name   = "up",
+   .start  = 5,
+   .end= 5,
+   .flags  = IORESOURCE_IRQ,
+   }, {
+   .name   = "hold 4s",
+   .start  = 4,
+   .end= 4,
+   .flags  = IORESOURCE_IRQ,
+   },
+};
+
+static const struct mfd_cell hi655x_pmic_devs[] = {
+   {
+   .name   = "hi655x-regulator",
+   },
+   {
+   .name   = "hi65xx-powerkey",
+   .num_resources  = ARRAY_SIZE(pwrkey_resources),
+   .resources  = _resources[0],
+   },
+};
+
 static void hi655x_local_irq_clear(struct regmap *map)
 {
int i;
@@ -124,7 +150,8 @@ static int hi655x_pmic_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pmic);
 
ret = mfd_add_devices(dev, PLATFORM_DEVID_AUTO, hi655x_pmic_devs,
- ARRAY_SIZE(hi655x_pmic_devs), NULL, 0, NULL);
+ ARRAY_SIZE(hi655x_pmic_devs), NULL, 0,
+ regmap_irq_get_domain(pmic->irq_data));
if (ret) {
dev_err(dev, "Failed to register device %d\n", ret);
regmap_del_irq_chip(gpio_to_irq(pmic->gpio), pmic->irq_data);
-- 
1.9.1

[PATCH 2/3] mfd: hi655x-pmic: Fixup issue with un-acked interrupts

[John Stultz]

While trying to get the powerkey to function, I found when
pressing the key, I would get infinitely repeating interrupts.

After digging around a bit, it seems we didn't set the ack_base
value for the regmap irqchip logic, so nothing was acking the
interrupt.

This patch adds the ack_base, which seems to make things work.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Acked-by: Lee Jones 
Signed-off-by: John Stultz 
---
 drivers/mfd/hi655x-pmic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
index 05ddc78..68ab370 100644
--- a/drivers/mfd/hi655x-pmic.c
+++ b/drivers/mfd/hi655x-pmic.c
@@ -45,6 +45,7 @@ static const struct regmap_irq_chip hi655x_irq_chip = {
.num_regs = 1,
.num_irqs = ARRAY_SIZE(hi655x_irqs),
.status_base = HI655X_IRQ_STAT_BASE,
+   .ack_base = HI655X_IRQ_STAT_BASE,
.mask_base = HI655X_IRQ_MASK_BASE,
 };
 
-- 
1.9.1

Re: [PATCH v2 1/7] iommu/rockchip: fix devm_{request,free}_irq parameter

[Tomasz Figa]

Hi,

On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng  wrote:
> From: Simon Xue 
>
> Even though the iommu shares irq with its master, using the *dev of iommu
> instead of master's *dev for devm_{request,free}_irq makes things clear.
>
> Signed-off-by: Simon Xue 
> Signed-off-by: Shunqian Zheng 
> ---
>  drivers/iommu/rockchip-iommu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Tomasz Figa 

Best regards,
Tomasz

[PATCH 1/3] drivers: input: powerkey for HISI 65xx SoC

[John Stultz]

From: Jorge Ramirez-Ortiz 

This driver provides a input driver for the power button on the
HiSi 65xx SoC for boards like HiKey.

This driver was originally by Zhiliang Xue 
then basically rewritten by Jorge, but preserving the original
module author credits.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Signed-off-by: Jorge Ramirez-Ortiz 
[jstultz: Reworked commit message, folded in other fixes/cleanups
from Jorge, implemented some larger cleanups suggested by DmitryT]
Signed-off-by: John Stultz 
---
v2: Major rework integrating feedback from Dmitry.
v3: Dropped of_match compatible line since no longer using DT
for this.

 drivers/input/misc/Kconfig |   9 +++
 drivers/input/misc/Makefile|   1 +
 drivers/input/misc/hisi_powerkey.c | 149 +
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/input/misc/hisi_powerkey.c

diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 1f2337a..07aacfc 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -796,4 +796,13 @@ config INPUT_DRV2667_HAPTICS
  To compile this driver as a module, choose M here: the
  module will be called drv2667-haptics.
 
+config HISI_POWERKEY
+   tristate "Hisilicon PMIC ONKEY support"
+   depends on ARCH_HISI || COMPILE_TEST
+   help
+ Say Y to enable support for PMIC ONKEY.
+
+ To compile this driver as a module, choose M here: the
+ module will be called hisi_powerkey.
+
 endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 0357a08..f264777 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -75,3 +75,4 @@ obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o
 obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND)+= xen-kbdfront.o
 obj-$(CONFIG_INPUT_YEALINK)+= yealink.o
 obj-$(CONFIG_INPUT_IDEAPAD_SLIDEBAR)   += ideapad_slidebar.o
+obj-$(CONFIG_HISI_POWERKEY)+= hisi_powerkey.o
diff --git a/drivers/input/misc/hisi_powerkey.c 
b/drivers/input/misc/hisi_powerkey.c
new file mode 100644
index 000..d3afebc
--- /dev/null
+++ b/drivers/input/misc/hisi_powerkey.c
@@ -0,0 +1,149 @@
+/*
+ * Hisilicon PMIC powerkey driver
+ *
+ * Copyright (C) 2013 Hisilicon Ltd.
+ * Copyright (C) 2015, 2016 Linaro Ltd.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* the held interrupt will trigger after 4 seconds */
+#define MAX_HELD_TIME  (4 * MSEC_PER_SEC)
+
+
+enum id_action { ID_PRESSED, ID_RELEASED, ID_HELD, ID_LAST };
+const char *const irq_names[ID_LAST] = {"down", "up", "hold 4s"};
+
+struct hi65xx_priv {
+   struct input_dev *input;
+};
+
+static irqreturn_t hi65xx_power_press_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_POWER, 1);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t hi65xx_power_release_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_POWER, 0);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t hi65xx_restart_toggle_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+   int value = test_bit(KEY_RESTART, p->input->key);
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_RESTART, !value);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+irqreturn_t (*irq_handlers[ID_LAST])(int irq, void *q) = {
+   hi65xx_power_press_isr,
+   hi65xx_power_release_isr,
+   hi65xx_restart_toggle_isr,
+};
+
+static int hi65xx_powerkey_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct hi65xx_priv *priv;
+   int irq, i, ret;
+
+   priv = devm_kzalloc(dev, sizeof(struct hi65xx_priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+
+   priv->input = devm_input_allocate_device(>dev);
+   if (!priv->input) {
+   dev_err(>dev, 

[PATCH 2/3] mfd: hi655x-pmic: Fixup issue with un-acked interrupts

[John Stultz]

While trying to get the powerkey to function, I found when
pressing the key, I would get infinitely repeating interrupts.

After digging around a bit, it seems we didn't set the ack_base
value for the regmap irqchip logic, so nothing was acking the
interrupt.

This patch adds the ack_base, which seems to make things work.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Acked-by: Lee Jones 
Signed-off-by: John Stultz 
---
 drivers/mfd/hi655x-pmic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c
index 05ddc78..68ab370 100644
--- a/drivers/mfd/hi655x-pmic.c
+++ b/drivers/mfd/hi655x-pmic.c
@@ -45,6 +45,7 @@ static const struct regmap_irq_chip hi655x_irq_chip = {
.num_regs = 1,
.num_irqs = ARRAY_SIZE(hi655x_irqs),
.status_base = HI655X_IRQ_STAT_BASE,
+   .ack_base = HI655X_IRQ_STAT_BASE,
.mask_base = HI655X_IRQ_MASK_BASE,
 };
 
-- 
1.9.1

Re: [PATCH v2 1/7] iommu/rockchip: fix devm_{request,free}_irq parameter

[Tomasz Figa]

Hi,

On Wed, Jun 8, 2016 at 10:26 PM, Shunqian Zheng  wrote:
> From: Simon Xue 
>
> Even though the iommu shares irq with its master, using the *dev of iommu
> instead of master's *dev for devm_{request,free}_irq makes things clear.
>
> Signed-off-by: Simon Xue 
> Signed-off-by: Shunqian Zheng 
> ---
>  drivers/iommu/rockchip-iommu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Tomasz Figa 

Best regards,
Tomasz

[PATCH 1/3] drivers: input: powerkey for HISI 65xx SoC

[John Stultz]

From: Jorge Ramirez-Ortiz 

This driver provides a input driver for the power button on the
HiSi 65xx SoC for boards like HiKey.

This driver was originally by Zhiliang Xue 
then basically rewritten by Jorge, but preserving the original
module author credits.

Cc: Dmitry Torokhov 
Cc: Rob Herring 
Cc: Lee Jones 
Cc: Jorge Ramirez-Ortiz 
Cc: Feng Chen 
Cc: Wei Xu 
Cc: Guodong Xu 
Signed-off-by: Jorge Ramirez-Ortiz 
[jstultz: Reworked commit message, folded in other fixes/cleanups
from Jorge, implemented some larger cleanups suggested by DmitryT]
Signed-off-by: John Stultz 
---
v2: Major rework integrating feedback from Dmitry.
v3: Dropped of_match compatible line since no longer using DT
for this.

 drivers/input/misc/Kconfig |   9 +++
 drivers/input/misc/Makefile|   1 +
 drivers/input/misc/hisi_powerkey.c | 149 +
 3 files changed, 159 insertions(+)
 create mode 100644 drivers/input/misc/hisi_powerkey.c

diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 1f2337a..07aacfc 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -796,4 +796,13 @@ config INPUT_DRV2667_HAPTICS
  To compile this driver as a module, choose M here: the
  module will be called drv2667-haptics.
 
+config HISI_POWERKEY
+   tristate "Hisilicon PMIC ONKEY support"
+   depends on ARCH_HISI || COMPILE_TEST
+   help
+ Say Y to enable support for PMIC ONKEY.
+
+ To compile this driver as a module, choose M here: the
+ module will be called hisi_powerkey.
+
 endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 0357a08..f264777 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -75,3 +75,4 @@ obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o
 obj-$(CONFIG_INPUT_XEN_KBDDEV_FRONTEND)+= xen-kbdfront.o
 obj-$(CONFIG_INPUT_YEALINK)+= yealink.o
 obj-$(CONFIG_INPUT_IDEAPAD_SLIDEBAR)   += ideapad_slidebar.o
+obj-$(CONFIG_HISI_POWERKEY)+= hisi_powerkey.o
diff --git a/drivers/input/misc/hisi_powerkey.c 
b/drivers/input/misc/hisi_powerkey.c
new file mode 100644
index 000..d3afebc
--- /dev/null
+++ b/drivers/input/misc/hisi_powerkey.c
@@ -0,0 +1,149 @@
+/*
+ * Hisilicon PMIC powerkey driver
+ *
+ * Copyright (C) 2013 Hisilicon Ltd.
+ * Copyright (C) 2015, 2016 Linaro Ltd.
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License. See the file "COPYING" in the main directory of this
+ * archive for more details.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* the held interrupt will trigger after 4 seconds */
+#define MAX_HELD_TIME  (4 * MSEC_PER_SEC)
+
+
+enum id_action { ID_PRESSED, ID_RELEASED, ID_HELD, ID_LAST };
+const char *const irq_names[ID_LAST] = {"down", "up", "hold 4s"};
+
+struct hi65xx_priv {
+   struct input_dev *input;
+};
+
+static irqreturn_t hi65xx_power_press_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_POWER, 1);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t hi65xx_power_release_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_POWER, 0);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+static irqreturn_t hi65xx_restart_toggle_isr(int irq, void *q)
+{
+   struct hi65xx_priv *p = q;
+   int value = test_bit(KEY_RESTART, p->input->key);
+
+   pm_wakeup_event(p->input->dev.parent, MAX_HELD_TIME);
+   input_report_key(p->input, KEY_RESTART, !value);
+   input_sync(p->input);
+
+   return IRQ_HANDLED;
+}
+
+irqreturn_t (*irq_handlers[ID_LAST])(int irq, void *q) = {
+   hi65xx_power_press_isr,
+   hi65xx_power_release_isr,
+   hi65xx_restart_toggle_isr,
+};
+
+static int hi65xx_powerkey_probe(struct platform_device *pdev)
+{
+   struct device *dev = >dev;
+   struct hi65xx_priv *priv;
+   int irq, i, ret;
+
+   priv = devm_kzalloc(dev, sizeof(struct hi65xx_priv), GFP_KERNEL);
+   if (!priv)
+   return -ENOMEM;
+
+   priv->input = devm_input_allocate_device(>dev);
+   if (!priv->input) {
+   dev_err(>dev, "failed to allocate input device\n");
+   return -ENOMEM;
+   }
+
+   priv->input->phys = "hisi_on/input0";
+   priv->input->name = "HISI 65xx PowerOn Key";
+
+   input_set_capability(priv->input, EV_KEY, KEY_POWER);
+   input_set_capability(priv->input, 

[PATCH v5 7/7] phy: Add Northstar2 PCI Phy support

[Pramod Kumar]

Add PCI Phy support for Broadcom Northstar2 SoCs.  This driver uses the
interface from the iproc mdio mux driver to enable the devices
respective phys.

Reviewed-by: Andrew Lunn 
Signed-off-by: Jon Mason 
Signed-off-by: Pramod Kumar 
---
 drivers/phy/Kconfig|   8 +++
 drivers/phy/Makefile   |   2 +-
 drivers/phy/phy-bcm-ns2-pcie.c | 115 +
 3 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 drivers/phy/phy-bcm-ns2-pcie.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b869b98..01fb93b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -434,4 +434,12 @@ config PHY_CYGNUS_PCIE
 
 source "drivers/phy/tegra/Kconfig"
 
+config PHY_NS2_PCIE
+   tristate "Broadcom Northstar2 PCIe PHY driver"
+   depends on OF && MDIO_BUS_MUX_BCM_IPROC
+   select GENERIC_PHY
+   default ARCH_BCM_IPROC
+   help
+ Enable this to support the Broadcom Northstar2 PCIe PHY.
+ If unsure, say N.
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 9c3e73c..7aea094 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -53,5 +53,5 @@ obj-$(CONFIG_PHY_TUSB1210)+= phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
 obj-$(CONFIG_PHY_CYGNUS_PCIE)  += phy-bcm-cygnus-pcie.o
-
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
diff --git a/drivers/phy/phy-bcm-ns2-pcie.c b/drivers/phy/phy-bcm-ns2-pcie.c
new file mode 100644
index 000..9513f7a
--- /dev/null
+++ b/drivers/phy/phy-bcm-ns2-pcie.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct ns2_pci_phy {
+   struct mdio_device *mdiodev;
+   struct phy *phy;
+};
+
+#define BLK_ADDR_REG_OFFSET0x1f
+#define PLL_AFE1_100MHZ_BLK0x2100
+#define PLL_CLK_AMP_OFFSET 0x03
+#define PLL_CLK_AMP_2P05V  0x2b18
+
+static int ns2_pci_phy_init(struct phy *p)
+{
+   struct ns2_pci_phy *phy = phy_get_drvdata(p);
+   int rc;
+
+   /* select the AFE 100MHz block page */
+   rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+  BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK);
+   if (rc)
+   goto err;
+
+   /* set the 100 MHz reference clock amplitude to 2.05 v */
+   rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+  PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V);
+   if (rc)
+   goto err;
+
+   return 0;
+
+err:
+   dev_err(>mdiodev->dev, "Error %d writing to phy\n", rc);
+   return rc;
+}
+
+static struct phy_ops ns2_pci_phy_ops = {
+   .init = ns2_pci_phy_init,
+};
+
+static int ns2_pci_phy_probe(struct mdio_device *mdiodev)
+{
+   struct device *dev = >dev;
+   struct phy_provider *provider;
+   struct ns2_pci_phy *p;
+   struct phy *phy;
+
+   phy = devm_phy_create(dev, dev->of_node, _pci_phy_ops);
+   if (IS_ERR(phy)) {
+   dev_err(dev, "failed to create Phy\n");
+   return PTR_ERR(phy);
+   }
+
+   p = devm_kmalloc(dev, sizeof(struct ns2_pci_phy),
+GFP_KERNEL);
+   if (!p)
+   return -ENOMEM;
+
+   p->mdiodev = mdiodev;
+   dev_set_drvdata(dev, p);
+
+   p->phy = phy;
+   phy_set_drvdata(phy, p);
+
+   provider = devm_of_phy_provider_register(>dev,
+of_phy_simple_xlate);
+   if (IS_ERR(provider)) {
+   dev_err(dev, "failed to register Phy provider\n");
+   return PTR_ERR(provider);
+   }
+
+   dev_info(dev, "%s PHY registered\n", dev_name(dev));
+
+   return 0;
+}
+
+static const struct of_device_id ns2_pci_phy_of_match[] = {
+   { .compatible = "brcm,ns2-pcie-phy", },
+   { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match);
+
+static struct mdio_driver ns2_pci_phy_driver = {
+   .mdiodrv = {
+   .driver = {
+   .name = "phy-bcm-ns2-pci",
+   .of_match_table = ns2_pci_phy_of_match,
+   },
+   },
+   .probe = ns2_pci_phy_probe,
+};
+mdio_module_driver(ns2_pci_phy_driver);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Broadcom Northstar2 

[PATCH v5 7/7] phy: Add Northstar2 PCI Phy support

[Pramod Kumar]

Add PCI Phy support for Broadcom Northstar2 SoCs.  This driver uses the
interface from the iproc mdio mux driver to enable the devices
respective phys.

Reviewed-by: Andrew Lunn 
Signed-off-by: Jon Mason 
Signed-off-by: Pramod Kumar 
---
 drivers/phy/Kconfig|   8 +++
 drivers/phy/Makefile   |   2 +-
 drivers/phy/phy-bcm-ns2-pcie.c | 115 +
 3 files changed, 124 insertions(+), 1 deletion(-)
 create mode 100644 drivers/phy/phy-bcm-ns2-pcie.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b869b98..01fb93b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -434,4 +434,12 @@ config PHY_CYGNUS_PCIE
 
 source "drivers/phy/tegra/Kconfig"
 
+config PHY_NS2_PCIE
+   tristate "Broadcom Northstar2 PCIe PHY driver"
+   depends on OF && MDIO_BUS_MUX_BCM_IPROC
+   select GENERIC_PHY
+   default ARCH_BCM_IPROC
+   help
+ Enable this to support the Broadcom Northstar2 PCIe PHY.
+ If unsure, say N.
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 9c3e73c..7aea094 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -53,5 +53,5 @@ obj-$(CONFIG_PHY_TUSB1210)+= phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
 obj-$(CONFIG_PHY_CYGNUS_PCIE)  += phy-bcm-cygnus-pcie.o
-
 obj-$(CONFIG_ARCH_TEGRA) += tegra/
+obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
diff --git a/drivers/phy/phy-bcm-ns2-pcie.c b/drivers/phy/phy-bcm-ns2-pcie.c
new file mode 100644
index 000..9513f7a
--- /dev/null
+++ b/drivers/phy/phy-bcm-ns2-pcie.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2016 Broadcom
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct ns2_pci_phy {
+   struct mdio_device *mdiodev;
+   struct phy *phy;
+};
+
+#define BLK_ADDR_REG_OFFSET0x1f
+#define PLL_AFE1_100MHZ_BLK0x2100
+#define PLL_CLK_AMP_OFFSET 0x03
+#define PLL_CLK_AMP_2P05V  0x2b18
+
+static int ns2_pci_phy_init(struct phy *p)
+{
+   struct ns2_pci_phy *phy = phy_get_drvdata(p);
+   int rc;
+
+   /* select the AFE 100MHz block page */
+   rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+  BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK);
+   if (rc)
+   goto err;
+
+   /* set the 100 MHz reference clock amplitude to 2.05 v */
+   rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
+  PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V);
+   if (rc)
+   goto err;
+
+   return 0;
+
+err:
+   dev_err(>mdiodev->dev, "Error %d writing to phy\n", rc);
+   return rc;
+}
+
+static struct phy_ops ns2_pci_phy_ops = {
+   .init = ns2_pci_phy_init,
+};
+
+static int ns2_pci_phy_probe(struct mdio_device *mdiodev)
+{
+   struct device *dev = >dev;
+   struct phy_provider *provider;
+   struct ns2_pci_phy *p;
+   struct phy *phy;
+
+   phy = devm_phy_create(dev, dev->of_node, _pci_phy_ops);
+   if (IS_ERR(phy)) {
+   dev_err(dev, "failed to create Phy\n");
+   return PTR_ERR(phy);
+   }
+
+   p = devm_kmalloc(dev, sizeof(struct ns2_pci_phy),
+GFP_KERNEL);
+   if (!p)
+   return -ENOMEM;
+
+   p->mdiodev = mdiodev;
+   dev_set_drvdata(dev, p);
+
+   p->phy = phy;
+   phy_set_drvdata(phy, p);
+
+   provider = devm_of_phy_provider_register(>dev,
+of_phy_simple_xlate);
+   if (IS_ERR(provider)) {
+   dev_err(dev, "failed to register Phy provider\n");
+   return PTR_ERR(provider);
+   }
+
+   dev_info(dev, "%s PHY registered\n", dev_name(dev));
+
+   return 0;
+}
+
+static const struct of_device_id ns2_pci_phy_of_match[] = {
+   { .compatible = "brcm,ns2-pcie-phy", },
+   { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match);
+
+static struct mdio_driver ns2_pci_phy_driver = {
+   .mdiodrv = {
+   .driver = {
+   .name = "phy-bcm-ns2-pci",
+   .of_match_table = ns2_pci_phy_of_match,
+   },
+   },
+   .probe = ns2_pci_phy_probe,
+};
+mdio_module_driver(ns2_pci_phy_driver);
+
+MODULE_AUTHOR("Broadcom");
+MODULE_DESCRIPTION("Broadcom Northstar2 PCI Phy driver");
+MODULE_LICENSE("GPL v2");

[PATCH v5 0/7] Add MDIO bus multiplexer support for iProc SoCs

[Pramod Kumar]

Broadcom iProc based SoCs use a MDIO bus multiplexer where child buses
could be internal as well external to SoCs. These buses could supports
MDIO transaction compatible to C-22/C-45.

Broadcom MDIO bus multiplexer is an integrated multiplexer where child bus
selection and mdio transaction logic lies inside multiplexer itself.
To accommodate this multiplexer in existing mux framework below changes
were required-

1. Passed MDIO parent bus via mdio_mux_init to MDIO mux framework.

This patch set includes MDIO bus multiplexer driver along with above
framework change. It includes one external bus node having Ethernet PHY
attached and two internal bus node holding PCIe PHYs.

This patch series is based on v4.7-rc1 and is available from github-
repo: https://github.com/Broadcom/arm64-linux.git
branch:mdio-mux-v5

-Changes from v4:
- disabled PCIe PHYs from dtsi and enabled in dts file.

-Changes from v3:
- Unregister and free the parent MDIO bus.
- rebased on net-next/master branch.

Reason for resend:
-Rebased on v4.7-rc1

Changes from v2:
-Addressed Rob's comments in this patch regarding typo/grammers.
-Addressed David's comments regarding local variables order.
-Removed property "mdio-integrated-mux" and used mdiobus_register()
in place of of_mdiobus_regsiter().
-removed usage of IS_ERR_OR_NULL to IS_ERR in PCIe PHY driver.

Changes from v1:
- stop using "brcm,is_c45" from bus node as suggested by Andrew. MDIO
PHY driver will logically OR MII_ADDR_C45 into the address when issues
any C45 MDIO read/write transaction.

Pramod Kumar (7):
  mdio: mux: Enhanced MDIO mux framework for integrated multiplexers
  binding: Make "mdio-parent-bus" property from mandatory to optional
  binding: mdio-mux: Add DT binding doc for Broadcom MDIO bus
multiplexer
  dt: mdio-mux: Add mdio multiplexer driver node
  net: mdio-mux: Add MDIO mux driver for iProc SoCs
  binding: PHY: Binding doc for NS2 PCIe PHYs.
  phy: Add Northstar2 PCI Phy support

 .../bindings/net/brcm,mdio-mux-iproc.txt   |  59 +
 Documentation/devicetree/bindings/net/mdio-mux.txt |   3 +-
 .../bindings/phy/brcm,mdio-mux-bus-pci.txt |  27 +++
 arch/arm64/boot/dts/broadcom/ns2-svk.dts   |  16 ++
 arch/arm64/boot/dts/broadcom/ns2.dtsi  |  39 
 drivers/net/phy/Kconfig|  11 +
 drivers/net/phy/Makefile   |   1 +
 drivers/net/phy/mdio-mux-bcm-iproc.c   | 248 +
 drivers/net/phy/mdio-mux-gpio.c|   2 +-
 drivers/net/phy/mdio-mux-mmioreg.c |   2 +-
 drivers/net/phy/mdio-mux.c |  28 ++-
 drivers/phy/Kconfig|   8 +
 drivers/phy/Makefile   |   2 +-
 drivers/phy/phy-bcm-ns2-pcie.c | 115 ++
 include/linux/mdio-mux.h   |   4 +-
 15 files changed, 550 insertions(+), 15 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
 create mode 100644 
Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
 create mode 100644 drivers/net/phy/mdio-mux-bcm-iproc.c
 create mode 100644 drivers/phy/phy-bcm-ns2-pcie.c

-- 
1.9.1

[PATCH v5 0/7] Add MDIO bus multiplexer support for iProc SoCs

[Pramod Kumar]

Broadcom iProc based SoCs use a MDIO bus multiplexer where child buses
could be internal as well external to SoCs. These buses could supports
MDIO transaction compatible to C-22/C-45.

Broadcom MDIO bus multiplexer is an integrated multiplexer where child bus
selection and mdio transaction logic lies inside multiplexer itself.
To accommodate this multiplexer in existing mux framework below changes
were required-

1. Passed MDIO parent bus via mdio_mux_init to MDIO mux framework.

This patch set includes MDIO bus multiplexer driver along with above
framework change. It includes one external bus node having Ethernet PHY
attached and two internal bus node holding PCIe PHYs.

This patch series is based on v4.7-rc1 and is available from github-
repo: https://github.com/Broadcom/arm64-linux.git
branch:mdio-mux-v5

-Changes from v4:
- disabled PCIe PHYs from dtsi and enabled in dts file.

-Changes from v3:
- Unregister and free the parent MDIO bus.
- rebased on net-next/master branch.

Reason for resend:
-Rebased on v4.7-rc1

Changes from v2:
-Addressed Rob's comments in this patch regarding typo/grammers.
-Addressed David's comments regarding local variables order.
-Removed property "mdio-integrated-mux" and used mdiobus_register()
in place of of_mdiobus_regsiter().
-removed usage of IS_ERR_OR_NULL to IS_ERR in PCIe PHY driver.

Changes from v1:
- stop using "brcm,is_c45" from bus node as suggested by Andrew. MDIO
PHY driver will logically OR MII_ADDR_C45 into the address when issues
any C45 MDIO read/write transaction.

Pramod Kumar (7):
  mdio: mux: Enhanced MDIO mux framework for integrated multiplexers
  binding: Make "mdio-parent-bus" property from mandatory to optional
  binding: mdio-mux: Add DT binding doc for Broadcom MDIO bus
multiplexer
  dt: mdio-mux: Add mdio multiplexer driver node
  net: mdio-mux: Add MDIO mux driver for iProc SoCs
  binding: PHY: Binding doc for NS2 PCIe PHYs.
  phy: Add Northstar2 PCI Phy support

 .../bindings/net/brcm,mdio-mux-iproc.txt   |  59 +
 Documentation/devicetree/bindings/net/mdio-mux.txt |   3 +-
 .../bindings/phy/brcm,mdio-mux-bus-pci.txt |  27 +++
 arch/arm64/boot/dts/broadcom/ns2-svk.dts   |  16 ++
 arch/arm64/boot/dts/broadcom/ns2.dtsi  |  39 
 drivers/net/phy/Kconfig|  11 +
 drivers/net/phy/Makefile   |   1 +
 drivers/net/phy/mdio-mux-bcm-iproc.c   | 248 +
 drivers/net/phy/mdio-mux-gpio.c|   2 +-
 drivers/net/phy/mdio-mux-mmioreg.c |   2 +-
 drivers/net/phy/mdio-mux.c |  28 ++-
 drivers/phy/Kconfig|   8 +
 drivers/phy/Makefile   |   2 +-
 drivers/phy/phy-bcm-ns2-pcie.c | 115 ++
 include/linux/mdio-mux.h   |   4 +-
 15 files changed, 550 insertions(+), 15 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
 create mode 100644 
Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
 create mode 100644 drivers/net/phy/mdio-mux-bcm-iproc.c
 create mode 100644 drivers/phy/phy-bcm-ns2-pcie.c

-- 
1.9.1

[PATCH v5 2/7] binding: Make "mdio-parent-bus" property from mandatory to optional

[Pramod Kumar]

Change "mdio-parent-bus" from mandatory section to optional
as it won't be required by integrated MDIO multiplexer
which has bus selection and mdio transaction generation logic,
integrated inside.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/net/mdio-mux.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt 
b/Documentation/devicetree/bindings/net/mdio-mux.txt
index 491f5bd..f58571f 100644
--- a/Documentation/devicetree/bindings/net/mdio-mux.txt
+++ b/Documentation/devicetree/bindings/net/mdio-mux.txt
@@ -5,11 +5,12 @@ numbered uniquely in a device dependent manner.  The nodes 
for an MDIO
 bus multiplexer/switch will have one child node for each child bus.
 
 Required properties:
-- mdio-parent-bus : phandle to the parent MDIO bus.
 - #address-cells = <1>;
 - #size-cells = <0>;
 
 Optional properties:
+- mdio-parent-bus : phandle to the parent MDIO bus.
+
 - Other properties specific to the multiplexer/switch hardware.
 
 Required properties for child nodes:
-- 
1.9.1

[PATCH v5 3/7] binding: mdio-mux: Add DT binding doc for Broadcom MDIO bus multiplexer

[Pramod Kumar]

Add DT binding doc for Broadcom MDIO bus multiplexer driver.

Reviewed-by: Andrew Lunn 
Signed-off-by: Pramod Kumar 
Reviewed-by: Florian Fainelli 
Acked-by: Rob Herring 
---
 .../bindings/net/brcm,mdio-mux-iproc.txt   | 59 ++
 1 file changed, 59 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt 
b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
new file mode 100644
index 000..dfe287a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
@@ -0,0 +1,59 @@
+Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
+
+This MDIO bus multiplexer defines buses that could be internal as well as
+external to SoCs and could accept MDIO transaction compatible to C-22 or
+C-45 Clause. When child bus is selected, one needs to select these two
+properties as well to generate desired MDIO transaction on appropriate bus.
+
+Required properties in addition to the generic multiplexer properties:
+
+MDIO multiplexer node:
+- compatible: brcm,mdio-mux-iproc.
+
+Every non-ethernet PHY requires a compatible so that it could be probed based
+on this compatible string.
+
+Additional information regarding generic multiplexer properties can be found
+at- Documentation/devicetree/bindings/net/mdio-mux.txt
+
+
+for example:
+   mdio_mux_iproc: mdio-mux@6602023c {
+   compatible = "brcm,mdio-mux-iproc";
+   reg = <0x6602023c 0x14>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+   };
+
+   mdio@7 {
+   reg = <0x7>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy1: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+   };
+   mdio@10 {
+   reg = <0x10>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   gphy0: eth-phy@10 {
+   reg = <0x10>;
+   };
+   };
+   };
-- 
1.9.1

[PATCH v5 4/7] dt: mdio-mux: Add mdio multiplexer driver node

[Pramod Kumar]

Add integrated MDIO multiplexer driver node which contains
two mux PCIe bus and one ethernet bus along with phys
lying on these bus.

Signed-off-by: Pramod Kumar 
Acked-by: Rob Herring 
---
 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 +
 arch/arm64/boot/dts/broadcom/ns2.dtsi| 39 
 2 files changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts 
b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index 54ca40c..ea5603f 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -52,6 +52,14 @@
};
 };
 
+_phy0 {
+   status = "ok";
+};
+
+_phy1 {
+   status = "ok";
+};
+
  {
status = "ok";
 };
@@ -132,3 +140,11 @@
#size-cells = <1>;
};
 };
+
+_mux_iproc {
+   mdio@10 {
+   gphy0: eth-phy@10 {
+   reg = <0x10>;
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi 
b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index ec68ec1..46b78fa 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -263,6 +263,45 @@
  IRQ_TYPE_LEVEL_HIGH)>;
};
 
+   mdio_mux_iproc: mdio-mux@6602023c {
+   compatible = "brcm,mdio-mux-iproc";
+   reg = <0x6602023c 0x14>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+   };
+
+   mdio@7 {
+   reg = <0x7>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy1: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+   };
+
+   mdio@10 {
+   reg = <0x10>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+
timer0: timer@6603 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x6603 0x1000>;
-- 
1.9.1

[PATCH v5 6/7] binding: PHY: Binding doc for NS2 PCIe PHYs.

[Pramod Kumar]

Binding doc for NS2 PCIe PHYs.

Signed-off-by: Pramod Kumar 
Signed-off-by: Jon Mason 
Acked-by: Rob Herring 
---
 .../bindings/phy/brcm,mdio-mux-bus-pci.txt | 27 ++
 1 file changed, 27 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt

diff --git a/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt 
b/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
new file mode 100644
index 000..5b51007
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
@@ -0,0 +1,27 @@
+* Broadcom NS2 PCIe PHY binding document
+
+Required bus properties:
+- reg: MDIO Bus number for the MDIO interface
+- #address-cells: must be 1
+- #size-cells: must be 0
+
+Required PHY properties:
+- compatible: should be "brcm,ns2-pcie-phy"
+- reg: MDIO Phy ID for the MDIO interface
+- #phy-cells: must be 0
+
+This is a child bus node of "brcm,mdio-mux-iproc" node.
+
+Example:
+
+mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+};
-- 
1.9.1

[PATCH v5 3/7] binding: mdio-mux: Add DT binding doc for Broadcom MDIO bus multiplexer

[Pramod Kumar]

Add DT binding doc for Broadcom MDIO bus multiplexer driver.

Reviewed-by: Andrew Lunn 
Signed-off-by: Pramod Kumar 
Reviewed-by: Florian Fainelli 
Acked-by: Rob Herring 
---
 .../bindings/net/brcm,mdio-mux-iproc.txt   | 59 ++
 1 file changed, 59 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt

diff --git a/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt 
b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
new file mode 100644
index 000..dfe287a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/brcm,mdio-mux-iproc.txt
@@ -0,0 +1,59 @@
+Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
+
+This MDIO bus multiplexer defines buses that could be internal as well as
+external to SoCs and could accept MDIO transaction compatible to C-22 or
+C-45 Clause. When child bus is selected, one needs to select these two
+properties as well to generate desired MDIO transaction on appropriate bus.
+
+Required properties in addition to the generic multiplexer properties:
+
+MDIO multiplexer node:
+- compatible: brcm,mdio-mux-iproc.
+
+Every non-ethernet PHY requires a compatible so that it could be probed based
+on this compatible string.
+
+Additional information regarding generic multiplexer properties can be found
+at- Documentation/devicetree/bindings/net/mdio-mux.txt
+
+
+for example:
+   mdio_mux_iproc: mdio-mux@6602023c {
+   compatible = "brcm,mdio-mux-iproc";
+   reg = <0x6602023c 0x14>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+   };
+
+   mdio@7 {
+   reg = <0x7>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy1: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+   };
+   mdio@10 {
+   reg = <0x10>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   gphy0: eth-phy@10 {
+   reg = <0x10>;
+   };
+   };
+   };
-- 
1.9.1

[PATCH v5 4/7] dt: mdio-mux: Add mdio multiplexer driver node

[Pramod Kumar]

Add integrated MDIO multiplexer driver node which contains
two mux PCIe bus and one ethernet bus along with phys
lying on these bus.

Signed-off-by: Pramod Kumar 
Acked-by: Rob Herring 
---
 arch/arm64/boot/dts/broadcom/ns2-svk.dts | 16 +
 arch/arm64/boot/dts/broadcom/ns2.dtsi| 39 
 2 files changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts 
b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index 54ca40c..ea5603f 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -52,6 +52,14 @@
};
 };
 
+_phy0 {
+   status = "ok";
+};
+
+_phy1 {
+   status = "ok";
+};
+
  {
status = "ok";
 };
@@ -132,3 +140,11 @@
#size-cells = <1>;
};
 };
+
+_mux_iproc {
+   mdio@10 {
+   gphy0: eth-phy@10 {
+   reg = <0x10>;
+   };
+   };
+};
diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi 
b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index ec68ec1..46b78fa 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -263,6 +263,45 @@
  IRQ_TYPE_LEVEL_HIGH)>;
};
 
+   mdio_mux_iproc: mdio-mux@6602023c {
+   compatible = "brcm,mdio-mux-iproc";
+   reg = <0x6602023c 0x14>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+   };
+
+   mdio@7 {
+   reg = <0x7>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy1: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   status = "disabled";
+   };
+   };
+
+   mdio@10 {
+   reg = <0x10>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+
timer0: timer@6603 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x6603 0x1000>;
-- 
1.9.1

[PATCH v5 6/7] binding: PHY: Binding doc for NS2 PCIe PHYs.

[Pramod Kumar]

Binding doc for NS2 PCIe PHYs.

Signed-off-by: Pramod Kumar 
Signed-off-by: Jon Mason 
Acked-by: Rob Herring 
---
 .../bindings/phy/brcm,mdio-mux-bus-pci.txt | 27 ++
 1 file changed, 27 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt

diff --git a/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt 
b/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
new file mode 100644
index 000..5b51007
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,mdio-mux-bus-pci.txt
@@ -0,0 +1,27 @@
+* Broadcom NS2 PCIe PHY binding document
+
+Required bus properties:
+- reg: MDIO Bus number for the MDIO interface
+- #address-cells: must be 1
+- #size-cells: must be 0
+
+Required PHY properties:
+- compatible: should be "brcm,ns2-pcie-phy"
+- reg: MDIO Phy ID for the MDIO interface
+- #phy-cells: must be 0
+
+This is a child bus node of "brcm,mdio-mux-iproc" node.
+
+Example:
+
+mdio@0 {
+   reg = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   pci_phy0: pci-phy@0 {
+   compatible = "brcm,ns2-pcie-phy";
+   reg = <0x0>;
+   #phy-cells = <0>;
+   };
+};
-- 
1.9.1

[PATCH v5 2/7] binding: Make "mdio-parent-bus" property from mandatory to optional

[Pramod Kumar]

Change "mdio-parent-bus" from mandatory section to optional
as it won't be required by integrated MDIO multiplexer
which has bus selection and mdio transaction generation logic,
integrated inside.

Signed-off-by: Pramod Kumar 
Reviewed-by: Andrew Lunn 
Acked-by: Rob Herring 
---
 Documentation/devicetree/bindings/net/mdio-mux.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/mdio-mux.txt 
b/Documentation/devicetree/bindings/net/mdio-mux.txt
index 491f5bd..f58571f 100644
--- a/Documentation/devicetree/bindings/net/mdio-mux.txt
+++ b/Documentation/devicetree/bindings/net/mdio-mux.txt
@@ -5,11 +5,12 @@ numbered uniquely in a device dependent manner.  The nodes 
for an MDIO
 bus multiplexer/switch will have one child node for each child bus.
 
 Required properties:
-- mdio-parent-bus : phandle to the parent MDIO bus.
 - #address-cells = <1>;
 - #size-cells = <0>;
 
 Optional properties:
+- mdio-parent-bus : phandle to the parent MDIO bus.
+
 - Other properties specific to the multiplexer/switch hardware.
 
 Required properties for child nodes:
-- 
1.9.1

[git pull] drm fixes for v4.7-rc3

[Dave Airlie]

Hi Linus,

This weeks instalment of fixes:

amdgpu: Lots of memory leak and firmware leak fixes.
nouveau: Collection of display fixes, KASAN fixes.
vc4: vblank/pageflipping fixes
fsl-dcu: Regmap cache fix
omap: Unused variable warning fix.

Nothing too surprising so far.

Dave.

The following changes since commit af8c34ce6ae32addda3788d54a7e340cad22516b:

  Linux 4.7-rc2 (2016-06-05 14:31:26 -0700)

are available in the git repository at:

  git://people.freedesktop.org/~airlied/linux tags/drm-fixes-for-v4.7-rc3

for you to fetch changes up to 7ff6977be8e3c7e6f5ae1ee56bc1535c5ca653b1:

  Merge branch 'fixes-for-v4.7-rc3' of 
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes (2016-06-10 12:17:46 
+1000)


Alex Deucher (1):
  drm/amdgpu: fix fw leak in non-powerplay dpm code

Ben Skeggs (7):
  drm/nouveau/bios/disp: fix handling of "match any protocol" entries
  drm/nouveau/ltc/gm107-: fix typo in the address of NV_PLTCG_LTC0_LTS0_INTR
  drm/nouveau/gr/gf100-: update sm error decoding from gk20a nvgpu headers
  drm/nouveau/fbcon: fix out-of-bounds memory accesses
  drm/nouveau/core: swap the order of imem/fb
  drm/nouveau/disp/sor/gf119: both links use the same training register
  drm/nouveau/disp/sor/gm107: training pattern registers are like gm200

Chunming Zhou (1):
  drm/amdgpu: add pipeline sync while vmid switch in same ctx

Dave Airlie (6):
  Merge branch 'linux-4.7' of git://github.com/skeggsb/linux into drm-fixes
  Merge tag 'drm-vc4-fixes-2016-06-06' of github.com:anholt/linux into 
drm-fixes
  Merge branch 'msm-fixes-4.7-rc3' of 
git://people.freedesktop.org/~robclark/linux into drm-fixes
  Merge branch 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux 
into drm-fixes
  drm/amdgpu: fix warning with powerplay disabled.
  Merge branch 'fixes-for-v4.7-rc3' of 
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes

Herve Jourdain (1):
  drm/vc4: Fix ioctl permissions for render nodes.

Ken Wang (1):
  drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB 
enabled

Mario Kleiner (3):
  drm/vc4: Fix get_vblank_counter with proper no-op for Linux 4.4+
  drm/vc4: Fix drm_vblank_put/get imbalance in page flip path.
  drm/vc4: Make pageflip completion handling more robust.

Monk Liu (22):
  drm/amdgpu: add late_fini for ip_funcs
  drm/amdgpu: impl late_fini for amdgpu_pp_ip
  drm/amdgpu: fix pplib finish bug
  drm/amdgpu: clear SA bo when created
  drm/amdgpu: init more register for sdma
  drm/amdgpu: modify sdma start sequence
  drm/amdgpu: vBIOS post only call when mem_size zero
  drm/amdgpu: fix mem leak in smumgr
  drm/amdgpu: fix mem leak in pplib/hwmgr
  drm/amdgpu: fix mem leak in atombios
  drm/amdgpu: fix memleak in pptable_init
  drm/amdgpu: fix missing free wb for cond_exec
  drm/amdgpu: fix gfx8 ucode mem leak
  drm/amdgpu: fix gfx 7 ucode mem leak
  drm/amdgpu: fix uvd fini mem leak
  drm/amdgpu: fix sdma3 ucode mem leak
  drm/amdgpu: fix sdma24 ucode mem leak
  drm/amdgpu: fix cik sdma ucode memleak
  drm/amdgpu: fix fiji smu fini mem leak
  drm/amdgpu: fix tonga smu_fini mem leak
  drm/amdgpu: add release firmware for cgs
  drm/amdgpu: fix smu ucode memleak (v2)

Rex Zhu (3):
  drm/admgpu/powerplay/polaris: fix powertune table upload
  drm/amd/powerplay: fix bug visit array out of bounds
  drm/amd/powerplay: delete useless code as pptable changed in vbios.

Rob Clark (3):
  drm/msm: deal with exhausted vmap space better
  drm/msm: fix some crashes in submit fail path
  drm/msm: fix potential submit error path issue

Robert Foss (1):
  drm/vc4: Return -EBUSY if there's already a pending flip event.

Stefan Agner (1):
  drm/fsl-dcu: use flat regmap cache

Tomi Valkeinen (1):
  drm/omap: fix unused variable warning in dsi & hdmi

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c| 12 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |  9 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c  | 24 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c| 19 
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |  6 +--
 drivers/gpu/drm/amd/amdgpu/ci_dpm.c|  3 ++
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c  | 22 -
 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c  |  5 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 17 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 28 ++-
 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c   |  5 ++
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c   

[git pull] drm fixes for v4.7-rc3

[Dave Airlie]

Hi Linus,

This weeks instalment of fixes:

amdgpu: Lots of memory leak and firmware leak fixes.
nouveau: Collection of display fixes, KASAN fixes.
vc4: vblank/pageflipping fixes
fsl-dcu: Regmap cache fix
omap: Unused variable warning fix.

Nothing too surprising so far.

Dave.

The following changes since commit af8c34ce6ae32addda3788d54a7e340cad22516b:

  Linux 4.7-rc2 (2016-06-05 14:31:26 -0700)

are available in the git repository at:

  git://people.freedesktop.org/~airlied/linux tags/drm-fixes-for-v4.7-rc3

for you to fetch changes up to 7ff6977be8e3c7e6f5ae1ee56bc1535c5ca653b1:

  Merge branch 'fixes-for-v4.7-rc3' of 
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes (2016-06-10 12:17:46 
+1000)


Alex Deucher (1):
  drm/amdgpu: fix fw leak in non-powerplay dpm code

Ben Skeggs (7):
  drm/nouveau/bios/disp: fix handling of "match any protocol" entries
  drm/nouveau/ltc/gm107-: fix typo in the address of NV_PLTCG_LTC0_LTS0_INTR
  drm/nouveau/gr/gf100-: update sm error decoding from gk20a nvgpu headers
  drm/nouveau/fbcon: fix out-of-bounds memory accesses
  drm/nouveau/core: swap the order of imem/fb
  drm/nouveau/disp/sor/gf119: both links use the same training register
  drm/nouveau/disp/sor/gm107: training pattern registers are like gm200

Chunming Zhou (1):
  drm/amdgpu: add pipeline sync while vmid switch in same ctx

Dave Airlie (6):
  Merge branch 'linux-4.7' of git://github.com/skeggsb/linux into drm-fixes
  Merge tag 'drm-vc4-fixes-2016-06-06' of github.com:anholt/linux into 
drm-fixes
  Merge branch 'msm-fixes-4.7-rc3' of 
git://people.freedesktop.org/~robclark/linux into drm-fixes
  Merge branch 'drm-fixes-4.7' of git://people.freedesktop.org/~agd5f/linux 
into drm-fixes
  drm/amdgpu: fix warning with powerplay disabled.
  Merge branch 'fixes-for-v4.7-rc3' of 
http://git.agner.ch/git/linux-drm-fsl-dcu into drm-fixes

Herve Jourdain (1):
  drm/vc4: Fix ioctl permissions for render nodes.

Ken Wang (1):
  drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB 
enabled

Mario Kleiner (3):
  drm/vc4: Fix get_vblank_counter with proper no-op for Linux 4.4+
  drm/vc4: Fix drm_vblank_put/get imbalance in page flip path.
  drm/vc4: Make pageflip completion handling more robust.

Monk Liu (22):
  drm/amdgpu: add late_fini for ip_funcs
  drm/amdgpu: impl late_fini for amdgpu_pp_ip
  drm/amdgpu: fix pplib finish bug
  drm/amdgpu: clear SA bo when created
  drm/amdgpu: init more register for sdma
  drm/amdgpu: modify sdma start sequence
  drm/amdgpu: vBIOS post only call when mem_size zero
  drm/amdgpu: fix mem leak in smumgr
  drm/amdgpu: fix mem leak in pplib/hwmgr
  drm/amdgpu: fix mem leak in atombios
  drm/amdgpu: fix memleak in pptable_init
  drm/amdgpu: fix missing free wb for cond_exec
  drm/amdgpu: fix gfx8 ucode mem leak
  drm/amdgpu: fix gfx 7 ucode mem leak
  drm/amdgpu: fix uvd fini mem leak
  drm/amdgpu: fix sdma3 ucode mem leak
  drm/amdgpu: fix sdma24 ucode mem leak
  drm/amdgpu: fix cik sdma ucode memleak
  drm/amdgpu: fix fiji smu fini mem leak
  drm/amdgpu: fix tonga smu_fini mem leak
  drm/amdgpu: add release firmware for cgs
  drm/amdgpu: fix smu ucode memleak (v2)

Rex Zhu (3):
  drm/admgpu/powerplay/polaris: fix powertune table upload
  drm/amd/powerplay: fix bug visit array out of bounds
  drm/amd/powerplay: delete useless code as pptable changed in vbios.

Rob Clark (3):
  drm/msm: deal with exhausted vmap space better
  drm/msm: fix some crashes in submit fail path
  drm/msm: fix potential submit error path issue

Robert Foss (1):
  drm/vc4: Return -EBUSY if there's already a pending flip event.

Stefan Agner (1):
  drm/fsl-dcu: use flat regmap cache

Tomi Valkeinen (1):
  drm/omap: fix unused variable warning in dsi & hdmi

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|  4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c| 12 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c |  9 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c  | 24 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c| 19 
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |  6 +--
 drivers/gpu/drm/amd/amdgpu/ci_dpm.c|  3 ++
 drivers/gpu/drm/amd/amdgpu/cik_sdma.c  | 22 -
 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c  |  5 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c  | 17 +++
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 28 ++-
 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c   |  5 ++
 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c   

[PATCH v2] soc: qcom: Update properties for smem state referencing

[Bjorn Andersson]

Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.

Signed-off-by: Bjorn Andersson 
---

Realised that we already define the smp2p and smsm nodes in mainline, so don't
change the #qcom,state-cells property.

 drivers/soc/qcom/smem_state.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/qcom/smem_state.c b/drivers/soc/qcom/smem_state.c
index 54261decb369..4e4d5cd3b3cc 100644
--- a/drivers/soc/qcom/smem_state.c
+++ b/drivers/soc/qcom/smem_state.c
@@ -104,21 +104,21 @@ struct qcom_smem_state *qcom_smem_state_get(struct device 
*dev,
 
if (con_id) {
index = of_property_match_string(dev->of_node,
-"qcom,state-names",
+"qcom,smem-state-names",
 con_id);
if (index < 0) {
-   dev_err(dev, "missing qcom,state-names\n");
+   dev_err(dev, "missing qcom,smem-state-names\n");
return ERR_PTR(index);
}
}
 
ret = of_parse_phandle_with_args(dev->of_node,
-"qcom,state",
+"qcom,smem-states",
 "#qcom,state-cells",
 index,
 );
if (ret) {
-   dev_err(dev, "failed to parse qcom,state property\n");
+   dev_err(dev, "failed to parse qcom,smem-states property\n");
return ERR_PTR(ret);
}
 
-- 
2.5.0

[PATCH v2] soc: qcom: Update properties for smem state referencing

[Bjorn Andersson]

Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.

Signed-off-by: Bjorn Andersson 
---

Realised that we already define the smp2p and smsm nodes in mainline, so don't
change the #qcom,state-cells property.

 drivers/soc/qcom/smem_state.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/soc/qcom/smem_state.c b/drivers/soc/qcom/smem_state.c
index 54261decb369..4e4d5cd3b3cc 100644
--- a/drivers/soc/qcom/smem_state.c
+++ b/drivers/soc/qcom/smem_state.c
@@ -104,21 +104,21 @@ struct qcom_smem_state *qcom_smem_state_get(struct device 
*dev,
 
if (con_id) {
index = of_property_match_string(dev->of_node,
-"qcom,state-names",
+"qcom,smem-state-names",
 con_id);
if (index < 0) {
-   dev_err(dev, "missing qcom,state-names\n");
+   dev_err(dev, "missing qcom,smem-state-names\n");
return ERR_PTR(index);
}
}
 
ret = of_parse_phandle_with_args(dev->of_node,
-"qcom,state",
+"qcom,smem-states",
 "#qcom,state-cells",
 index,
 );
if (ret) {
-   dev_err(dev, "failed to parse qcom,state property\n");
+   dev_err(dev, "failed to parse qcom,smem-states property\n");
return ERR_PTR(ret);
}
 
-- 
2.5.0

Re: [PATCH] net/netlink/af_netlink.h: Remove unused structure.

[David Miller]

From: Fabien Siron 
Date: Tue, 7 Jun 2016 13:02:04 +

> Signed-off-by: Fabien Siron 

Applied.

Re: [PATCH] net/netlink/af_netlink.h: Remove unused structure.

[David Miller]

From: Fabien Siron 
Date: Tue, 7 Jun 2016 13:02:04 +

> Signed-off-by: Fabien Siron 

Applied.

Re: [PATCHv2] backlight: pwm_bl: disable PWM when 'duty_cycle' is zero

[Lothar Waßmann]

Hi,

On Thu, 9 Jun 2016 14:51:25 +0100 Lee Jones wrote:
> On Tue, 07 Jun 2016, Lothar Waßmann wrote:
> 
> > 'brightness' is usually an index into a table of duty_cycle values,
> > where the value at index 0 may well be non-zero
> > (tegra30-apalis-eval.dts and tegra30-colibri-eval-v3.dts are real-life
> > examples).
> > Thus brightness == 0 does not necessarily mean that the PWM output
> > will be inactive.
> > Check for 'duty_cycle == 0' rather than 'brightness == 0' to decide
> > whether to disable the PWM.
> > 
> > Signed-off-by: Lothar Waßmann 
> > ---
> > Changes wrt. v1:
> >   - update binding docs to reflect the change
> > 
> >  .../devicetree/bindings/leds/backlight/pwm-backlight.txt | 9 
> > ++---
> >  drivers/video/backlight/pwm_bl.c | 4 ++--
> >  2 files changed, 8 insertions(+), 5 deletions(-)
> > 
> > diff --git 
> > a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt 
> > b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > index 764db86..95fa8a9 100644
> > --- a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > +++ b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > @@ -4,10 +4,13 @@ Required properties:
> >- compatible: "pwm-backlight"
> >- pwms: OF device-tree PWM specification (see PWM binding[0])
> >- brightness-levels: Array of distinct brightness levels. Typically these
> > -  are in the range from 0 to 255, but any range starting at 0 will do.
> > +  are in the range from 0 to 255, but any range will do.
> >The actual brightness level (PWM duty cycle) will be interpolated
> > -  from these values. 0 means a 0% duty cycle (darkest/off), while the
> > -  last value in the array represents a 100% duty cycle (brightest).
> > +  from these values. 0 means a 0% duty cycle, while the highest value 
> > in
> > +  the array represents a 100% duty cycle.
> > +  The range may be in reverse order (starting with the maximum duty 
> > cycle
> > +  value) to create a PWM signal with the 100% duty cycle representing
> > +  minimum and 0% duty cycle maximum brigthness.
> >- default-brightness-level: the default brightness level (index into the
> >array defined by the "brightness-levels" property)
> >- power-supply: regulator for supply voltage
> > diff --git a/drivers/video/backlight/pwm_bl.c 
> > b/drivers/video/backlight/pwm_bl.c
> > index b2b366b..80b2b52 100644
> > --- a/drivers/video/backlight/pwm_bl.c
> > +++ b/drivers/video/backlight/pwm_bl.c
> > @@ -103,8 +103,8 @@ static int pwm_backlight_update_status(struct 
> > backlight_device *bl)
> > if (pb->notify)
> > brightness = pb->notify(pb->dev, brightness);
> >  
> > -   if (brightness > 0) {
> > -   duty_cycle = compute_duty_cycle(pb, brightness);
> > +   duty_cycle = compute_duty_cycle(pb, brightness);
> > +   if (duty_cycle > 0) {
> 
> How does this work in the aforementioned:
> 
>   "The range may be in reverse order"
> 
> ... case?  Surely when duty_cycle is when the screen should be at it's
> brightest?  Wouldn't it confuse the user if they turn their brightness
> *up* and the screen goes *off*?
> 
Assuming that the PWM output is inactive (LOW) when the duty_cycle is
set to zero, there will be no difference between operating the PWM at
duty_cycle 0 or disabling it.

Currently, the screen will go bright when it should be off in this
case.


Lothar Waßmann

Re: [PATCHv2] backlight: pwm_bl: disable PWM when 'duty_cycle' is zero

[Lothar Waßmann]

Hi,

On Thu, 9 Jun 2016 14:51:25 +0100 Lee Jones wrote:
> On Tue, 07 Jun 2016, Lothar Waßmann wrote:
> 
> > 'brightness' is usually an index into a table of duty_cycle values,
> > where the value at index 0 may well be non-zero
> > (tegra30-apalis-eval.dts and tegra30-colibri-eval-v3.dts are real-life
> > examples).
> > Thus brightness == 0 does not necessarily mean that the PWM output
> > will be inactive.
> > Check for 'duty_cycle == 0' rather than 'brightness == 0' to decide
> > whether to disable the PWM.
> > 
> > Signed-off-by: Lothar Waßmann 
> > ---
> > Changes wrt. v1:
> >   - update binding docs to reflect the change
> > 
> >  .../devicetree/bindings/leds/backlight/pwm-backlight.txt | 9 
> > ++---
> >  drivers/video/backlight/pwm_bl.c | 4 ++--
> >  2 files changed, 8 insertions(+), 5 deletions(-)
> > 
> > diff --git 
> > a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt 
> > b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > index 764db86..95fa8a9 100644
> > --- a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > +++ b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.txt
> > @@ -4,10 +4,13 @@ Required properties:
> >- compatible: "pwm-backlight"
> >- pwms: OF device-tree PWM specification (see PWM binding[0])
> >- brightness-levels: Array of distinct brightness levels. Typically these
> > -  are in the range from 0 to 255, but any range starting at 0 will do.
> > +  are in the range from 0 to 255, but any range will do.
> >The actual brightness level (PWM duty cycle) will be interpolated
> > -  from these values. 0 means a 0% duty cycle (darkest/off), while the
> > -  last value in the array represents a 100% duty cycle (brightest).
> > +  from these values. 0 means a 0% duty cycle, while the highest value 
> > in
> > +  the array represents a 100% duty cycle.
> > +  The range may be in reverse order (starting with the maximum duty 
> > cycle
> > +  value) to create a PWM signal with the 100% duty cycle representing
> > +  minimum and 0% duty cycle maximum brigthness.
> >- default-brightness-level: the default brightness level (index into the
> >array defined by the "brightness-levels" property)
> >- power-supply: regulator for supply voltage
> > diff --git a/drivers/video/backlight/pwm_bl.c 
> > b/drivers/video/backlight/pwm_bl.c
> > index b2b366b..80b2b52 100644
> > --- a/drivers/video/backlight/pwm_bl.c
> > +++ b/drivers/video/backlight/pwm_bl.c
> > @@ -103,8 +103,8 @@ static int pwm_backlight_update_status(struct 
> > backlight_device *bl)
> > if (pb->notify)
> > brightness = pb->notify(pb->dev, brightness);
> >  
> > -   if (brightness > 0) {
> > -   duty_cycle = compute_duty_cycle(pb, brightness);
> > +   duty_cycle = compute_duty_cycle(pb, brightness);
> > +   if (duty_cycle > 0) {
> 
> How does this work in the aforementioned:
> 
>   "The range may be in reverse order"
> 
> ... case?  Surely when duty_cycle is when the screen should be at it's
> brightest?  Wouldn't it confuse the user if they turn their brightness
> *up* and the screen goes *off*?
> 
Assuming that the PWM output is inactive (LOW) when the duty_cycle is
set to zero, there will be no difference between operating the PWM at
duty_cycle 0 or disabling it.

Currently, the screen will go bright when it should be off in this
case.


Lothar Waßmann

Re: powerpc/pseries: start rtasd before PCI probing

[Michael Ellerman]

On Mon, 2016-23-05 at 08:28:28 UTC, Greg Kurz wrote:
> A strange behaviour is observed when comparing PCI hotplug in QEMU, between
> x86 and pseries. If you consider the following steps:
> - start a VM
> - add a PCI device via the QEMU monitor before the rtasd has started (for
>   example starting the VM in paused state, or hotplug during FW or boot
>   loader)
> - resume the VM execution
> 
> The x86 kernel detects the PCI device, but the pseries one does not.
> 
> This happens because the rtasd kernel worker is currently started under
> device_initcall, while PCI probing happens earlier under subsys_initcall.
> 
> As a consequence, if we have a pending RTAS event at boot time, a message
> is printed and the event is dropped.
> 
> This patch moves all the initialization of rtasd to arch_initcall, which is
> run before subsys_call: this way, logging_enabled is true when the RTAS
> event pops up and it is not lost anymore.
> 
> The proc fs bits stay at device_initcall because they cannot be run before
> fs_initcall.
> 
> Signed-off-by: Greg Kurz 
> Tested-by: Thomas Huth 

Has this been tested on PowerVM ?

cheers

Re: powerpc/pseries: start rtasd before PCI probing

[Michael Ellerman]

On Mon, 2016-23-05 at 08:28:28 UTC, Greg Kurz wrote:
> A strange behaviour is observed when comparing PCI hotplug in QEMU, between
> x86 and pseries. If you consider the following steps:
> - start a VM
> - add a PCI device via the QEMU monitor before the rtasd has started (for
>   example starting the VM in paused state, or hotplug during FW or boot
>   loader)
> - resume the VM execution
> 
> The x86 kernel detects the PCI device, but the pseries one does not.
> 
> This happens because the rtasd kernel worker is currently started under
> device_initcall, while PCI probing happens earlier under subsys_initcall.
> 
> As a consequence, if we have a pending RTAS event at boot time, a message
> is printed and the event is dropped.
> 
> This patch moves all the initialization of rtasd to arch_initcall, which is
> run before subsys_call: this way, logging_enabled is true when the RTAS
> event pops up and it is not lost anymore.
> 
> The proc fs bits stay at device_initcall because they cannot be run before
> fs_initcall.
> 
> Signed-off-by: Greg Kurz 
> Tested-by: Thomas Huth 

Has this been tested on PowerVM ?

cheers

Re: [PATCH 3/4] mtd: nand: Add support for Evatronix NANDFLASH-CTRL

[Mychaela Falconia]

On 6/9/16, Boris Brezillon  wrote:
> Hm, I think it's changing now that a lot of SoCs are advertised to be
> running Linux. But you're right in that existing IPs might not support
> this low-level mode.

Faraday (the IP vendor in the present case) advertise Linux support as
well, but they never mainlined any of it, and instead they provide
their own vendor Linux trees. The one I got is based on linux-3.3; I
don't know if they have a newer one. They do "support" FTNANDC024
under Linux as well, but their driver for it is gawdawful - see below.

> Hm, I don't understand why it's not possible to implement basic
> sequences, but I don't know anything about FTNANDC024, so let's assume
> you're right.

Read the datasheet (link below) and tell me what you think.

> Sure, feel free to send it to me, I'll have a look. And maybe you can
> also share your code (both the new and old versions of the driver).

I decided to go ahead and abuse my personal web space on another
(nothing to do with Linux or with NAND flash) project's server for the
purpose of sharing this stuff:

https://www.freecalypso.org/members/falcon/linux-mtd/

There you will find the IP datasheet, the vendor's driver (GPL), and a
current snapshot of my work-in-progress replacement.

> Hm, so you can't even move the column pointer within a page
> (NAND_CMD_RNDOUT)?

See the FTNANDC024 microcode listings on datasheet PDF pages 108
through 117. Every FTNANDC024 operation is an execution of one of
these complete microcode routines from start to finish. Just because a
given microcode flow includes the issuance of a given NAND command
(such as Change Read Column or Change Write Column) does not mean that
you could just ask the controller to issue that command by itself,
without executing a complete microcode flow which also includes the
Read Page or Program Page command.

The only workaround would be to write our own microcode. I think this
approach would actually work: we could write shorter microcode
routines which *just* issue a given NAND opcode and then stop there,
and another separate microcode routine (to be invoked via a separate
command) which would only do what they call "RD_SP" or "WR_SP" (raw
byte transfers of 1 to 32 bytes), without issuing a Read Page command
before or a Program Page command after. This approach would allow us
to perform truly raw page reads and writes, but it would be very ugly
and inefficient. It would also require a separate microcode routine
for each different command, NOT one generic microcode routine that
would correspond to ->cmd_ctrl() or ->cmdfunc().

M~

Re: [PATCH 3/4] mtd: nand: Add support for Evatronix NANDFLASH-CTRL

[Mychaela Falconia]

On 6/9/16, Boris Brezillon  wrote:
> Hm, I think it's changing now that a lot of SoCs are advertised to be
> running Linux. But you're right in that existing IPs might not support
> this low-level mode.

Faraday (the IP vendor in the present case) advertise Linux support as
well, but they never mainlined any of it, and instead they provide
their own vendor Linux trees. The one I got is based on linux-3.3; I
don't know if they have a newer one. They do "support" FTNANDC024
under Linux as well, but their driver for it is gawdawful - see below.

> Hm, I don't understand why it's not possible to implement basic
> sequences, but I don't know anything about FTNANDC024, so let's assume
> you're right.

Read the datasheet (link below) and tell me what you think.

> Sure, feel free to send it to me, I'll have a look. And maybe you can
> also share your code (both the new and old versions of the driver).

I decided to go ahead and abuse my personal web space on another
(nothing to do with Linux or with NAND flash) project's server for the
purpose of sharing this stuff:

https://www.freecalypso.org/members/falcon/linux-mtd/

There you will find the IP datasheet, the vendor's driver (GPL), and a
current snapshot of my work-in-progress replacement.

> Hm, so you can't even move the column pointer within a page
> (NAND_CMD_RNDOUT)?

See the FTNANDC024 microcode listings on datasheet PDF pages 108
through 117. Every FTNANDC024 operation is an execution of one of
these complete microcode routines from start to finish. Just because a
given microcode flow includes the issuance of a given NAND command
(such as Change Read Column or Change Write Column) does not mean that
you could just ask the controller to issue that command by itself,
without executing a complete microcode flow which also includes the
Read Page or Program Page command.

The only workaround would be to write our own microcode. I think this
approach would actually work: we could write shorter microcode
routines which *just* issue a given NAND opcode and then stop there,
and another separate microcode routine (to be invoked via a separate
command) which would only do what they call "RD_SP" or "WR_SP" (raw
byte transfers of 1 to 32 bytes), without issuing a Read Page command
before or a Program Page command after. This approach would allow us
to perform truly raw page reads and writes, but it would be very ugly
and inefficient. It would also require a separate microcode routine
for each different command, NOT one generic microcode routine that
would correspond to ->cmd_ctrl() or ->cmdfunc().

M~

[PATCH 3/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device

[Chanwoo Choi]

From: Jaehoon Chung 

This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need the on state and the 'pcie' gate clock.

Signed-off-by: Jaehoon Chung 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c   | 11 ++-
 include/dt-bindings/clock/exynos5433.h |  3 ++-
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 852ac6a7607e..e3cc9359fb20 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -639,7 +639,7 @@ static struct samsung_gate_clock top_gate_clks[] __initdata 
= {
 
/* ENABLE_SCLK_TOP_FSYS */
GATE(CLK_SCLK_PCIE_100_FSYS, "sclk_pcie_100_fsys", "div_sclk_pcie_100",
-   ENABLE_SCLK_TOP_FSYS, 7, 0, 0),
+   ENABLE_SCLK_TOP_FSYS, 7, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_MMC2_FSYS, "sclk_mmc2_fsys", "div_sclk_mmc2_b",
ENABLE_SCLK_TOP_FSYS, 6, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_MMC1_FSYS, "sclk_mmc1_fsys", "div_sclk_mmc1_b",
@@ -2146,7 +2146,7 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
GATE(CLK_ACLK_SMMU_PDMA1, "aclk_smmu_pdma1", "mout_aclk_fsys_200_user",
ENABLE_ACLK_FSYS1, 25, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_BTS_PCIE, "aclk_bts_pcie", "mout_aclk_fsys_200_user",
-   ENABLE_ACLK_FSYS1, 24, 0, 0),
+   ENABLE_ACLK_FSYS1, 24, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_AXIUS_PDMA1, "aclk_axius_pdma1",
"mout_aclk_fsys_200_user", ENABLE_ACLK_FSYS1,
22, CLK_IGNORE_UNUSED, 0),
@@ -2193,13 +2193,13 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
 
/* ENABLE_PCLK_FSYS */
GATE(CLK_PCLK_PCIE_CTRL, "pclk_pcie_ctrl", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 17, 0, 0),
+   ENABLE_PCLK_FSYS, 17, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_SMMU_PDMA1, "pclk_smmu_pdma1", "mout_aclk_fsys_200_user",
ENABLE_PCLK_FSYS, 16, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_PCIE_PHY, "pclk_pcie_phy", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 14, 0, 0),
+   ENABLE_PCLK_FSYS, 14, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_BTS_PCIE, "pclk_bts_pcie", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 13, 0, 0),
+   ENABLE_PCLK_FSYS, 13, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_SMMU_PDMA0, "pclk_smmu_pdma0", "mout_aclk_fsys_200_user",
ENABLE_PCLK_FSYS, 8, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_BTS_UFS, "pclk_bts_ufs", "mout_aclk_fsys_200_user",
@@ -2278,6 +2278,7 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
ENABLE_SCLK_FSYS, 0, 0, 0),
 
/* ENABLE_IP_FSYS0 */
+   GATE(CLK_PCIE, "pcie", "sclk_pcie_100", ENABLE_IP_FSYS0, 17, 0, 0),
GATE(CLK_PDMA1, "pdma1", "aclk_pdma1", ENABLE_IP_FSYS0, 15, 0, 0),
GATE(CLK_PDMA0, "pdma0", "aclk_pdma0", ENABLE_IP_FSYS0, 0, 0, 0),
 };
diff --git a/include/dt-bindings/clock/exynos5433.h 
b/include/dt-bindings/clock/exynos5433.h
index 8e024fea26e7..4fa6bb2136e3 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -622,8 +622,9 @@
 #define CLK_SCLK_UFSUNIPRO 112
 #define CLK_SCLK_USBHOST30 113
 #define CLK_SCLK_USBDRD30  114
+#define CLK_PCIE   115
 
-#define FSYS_NR_CLK115
+#define FSYS_NR_CLK116
 
 /* CMU_G2D */
 #define CLK_MUX_ACLK_G2D_266_USER  1
-- 
1.9.1

[PATCH 3/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device

[Chanwoo Choi]

From: Jaehoon Chung 

This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need the on state and the 'pcie' gate clock.

Signed-off-by: Jaehoon Chung 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c   | 11 ++-
 include/dt-bindings/clock/exynos5433.h |  3 ++-
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 852ac6a7607e..e3cc9359fb20 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -639,7 +639,7 @@ static struct samsung_gate_clock top_gate_clks[] __initdata 
= {
 
/* ENABLE_SCLK_TOP_FSYS */
GATE(CLK_SCLK_PCIE_100_FSYS, "sclk_pcie_100_fsys", "div_sclk_pcie_100",
-   ENABLE_SCLK_TOP_FSYS, 7, 0, 0),
+   ENABLE_SCLK_TOP_FSYS, 7, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_MMC2_FSYS, "sclk_mmc2_fsys", "div_sclk_mmc2_b",
ENABLE_SCLK_TOP_FSYS, 6, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_MMC1_FSYS, "sclk_mmc1_fsys", "div_sclk_mmc1_b",
@@ -2146,7 +2146,7 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
GATE(CLK_ACLK_SMMU_PDMA1, "aclk_smmu_pdma1", "mout_aclk_fsys_200_user",
ENABLE_ACLK_FSYS1, 25, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_BTS_PCIE, "aclk_bts_pcie", "mout_aclk_fsys_200_user",
-   ENABLE_ACLK_FSYS1, 24, 0, 0),
+   ENABLE_ACLK_FSYS1, 24, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_AXIUS_PDMA1, "aclk_axius_pdma1",
"mout_aclk_fsys_200_user", ENABLE_ACLK_FSYS1,
22, CLK_IGNORE_UNUSED, 0),
@@ -2193,13 +2193,13 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
 
/* ENABLE_PCLK_FSYS */
GATE(CLK_PCLK_PCIE_CTRL, "pclk_pcie_ctrl", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 17, 0, 0),
+   ENABLE_PCLK_FSYS, 17, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_SMMU_PDMA1, "pclk_smmu_pdma1", "mout_aclk_fsys_200_user",
ENABLE_PCLK_FSYS, 16, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_PCIE_PHY, "pclk_pcie_phy", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 14, 0, 0),
+   ENABLE_PCLK_FSYS, 14, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_BTS_PCIE, "pclk_bts_pcie", "mout_aclk_fsys_200_user",
-   ENABLE_PCLK_FSYS, 13, 0, 0),
+   ENABLE_PCLK_FSYS, 13, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_SMMU_PDMA0, "pclk_smmu_pdma0", "mout_aclk_fsys_200_user",
ENABLE_PCLK_FSYS, 8, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_BTS_UFS, "pclk_bts_ufs", "mout_aclk_fsys_200_user",
@@ -2278,6 +2278,7 @@ static struct samsung_gate_clock fsys_gate_clks[] 
__initdata = {
ENABLE_SCLK_FSYS, 0, 0, 0),
 
/* ENABLE_IP_FSYS0 */
+   GATE(CLK_PCIE, "pcie", "sclk_pcie_100", ENABLE_IP_FSYS0, 17, 0, 0),
GATE(CLK_PDMA1, "pdma1", "aclk_pdma1", ENABLE_IP_FSYS0, 15, 0, 0),
GATE(CLK_PDMA0, "pdma0", "aclk_pdma0", ENABLE_IP_FSYS0, 0, 0, 0),
 };
diff --git a/include/dt-bindings/clock/exynos5433.h 
b/include/dt-bindings/clock/exynos5433.h
index 8e024fea26e7..4fa6bb2136e3 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -622,8 +622,9 @@
 #define CLK_SCLK_UFSUNIPRO 112
 #define CLK_SCLK_USBHOST30 113
 #define CLK_SCLK_USBDRD30  114
+#define CLK_PCIE   115
 
-#define FSYS_NR_CLK115
+#define FSYS_NR_CLK116
 
 /* CMU_G2D */
 #define CLK_MUX_ACLK_G2D_266_USER  1
-- 
1.9.1

[PATCH 1/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD Uart

[Chanwoo Choi]

From: Beomho Seo 

This patch adds the CLK_IGNORE_UNUSED flag for sclk_aud_uart gate clock
for uart3 opeation.

Signed-off-by: Beomho Seo 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 128527b8fbeb..e1a9c24079a4 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2976,7 +2976,7 @@ static struct samsung_gate_clock aud_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_AUD_SLIMBUS, "sclk_aud_slimbus", "div_sclk_aud_slimbus",
ENABLE_SCLK_AUD1, 4, 0, 0),
GATE(CLK_SCLK_AUD_UART, "sclk_aud_uart", "div_sclk_aud_uart",
-   ENABLE_SCLK_AUD1, 3, 0, 0),
+   ENABLE_SCLK_AUD1, 3, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_AUD_PCM, "sclk_aud_pcm", "div_sclk_aud_pcm",
ENABLE_SCLK_AUD1, 2, 0, 0),
GATE(CLK_SCLK_I2S_BCLK, "sclk_i2s_bclk", "ioclk_i2s_bclk",
-- 
1.9.1

[PATCH 0/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag and

[Chanwoo Choi]

This patch-set add the CLK_IGNORE_UNUSED flag to the specific clocks because
the specific clocks should remain the enable state. This patch-set support the
PCIE (PCI Express), serial3(AUD Uart) device and fix the hang issue for
suspend-to-ram.

Beomho Seo (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD Uart

Jaehoon Chung (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device

Jonghwa Lee (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks occurring hang 
at sleep

 drivers/clk/samsung/clk-exynos5433.c   | 47 +-
 include/dt-bindings/clock/exynos5433.h |  3 ++-
 2 files changed, 31 insertions(+), 19 deletions(-)

-- 
1.9.1

[PATCH 2/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks occurring hang at sleep

[Chanwoo Choi]

From: Jonghwa Lee 

Some clocks are required being unmasked during suspend-to-ram. Otherwise,
PMU will stuck and power line never down.

Signed-off-by: Jonghwa Lee 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c | 34 ++
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index e1a9c24079a4..852ac6a7607e 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -668,11 +668,14 @@ static struct samsung_gate_clock top_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_PCM1_PERIC, "sclk_pcm1_peric", "div_sclk_pcm1",
ENABLE_SCLK_TOP_PERIC, 7, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_UART2_PERIC, "sclk_uart2_peric", "div_sclk_uart2",
-   ENABLE_SCLK_TOP_PERIC, 5, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 5, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART1_PERIC, "sclk_uart1_peric", "div_sclk_uart1",
-   ENABLE_SCLK_TOP_PERIC, 4, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 4, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART0_PERIC, "sclk_uart0_peric", "div_sclk_uart0",
-   ENABLE_SCLK_TOP_PERIC, 3, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 3, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_SPI2_PERIC, "sclk_spi2_peric", "div_sclk_spi2_b",
ENABLE_SCLK_TOP_PERIC, 2, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_SPI1_PERIC, "sclk_spi1_peric", "div_sclk_spi1_b",
@@ -833,7 +836,7 @@ static struct samsung_div_clock cpif_div_clks[] __initdata 
= {
 static struct samsung_gate_clock cpif_gate_clks[] __initdata = {
/* ENABLE_SCLK_CPIF */
GATE(CLK_SCLK_MPHY_PLL, "sclk_mphy_pll", "mout_mphy_pll",
-   ENABLE_SCLK_CPIF, 9, 0, 0),
+   ENABLE_SCLK_CPIF, 9, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UFS_MPHY, "sclk_ufs_mphy", "div_sclk_mphy",
ENABLE_SCLK_CPIF, 4, 0, 0),
 };
@@ -1440,11 +1443,13 @@ static struct samsung_gate_clock mif_gate_clks[] 
__initdata = {
 
/* ENABLE_PCLK_MIF_SECURE_DREX0_TZ */
GATE(CLK_PCLK_DREX0_TZ, "pclk_drex0_tz", "div_aclk_mif_133",
-   ENABLE_PCLK_MIF_SECURE_DREX0_TZ, 0, 0, 0),
+   ENABLE_PCLK_MIF_SECURE_DREX0_TZ, 0,
+   CLK_IGNORE_UNUSED, 0),
 
/* ENABLE_PCLK_MIF_SECURE_DREX1_TZ */
GATE(CLK_PCLK_DREX1_TZ, "pclk_drex1_tz", "div_aclk_mif_133",
-   ENABLE_PCLK_MIF_SECURE_DREX1_TZ, 0, 0, 0),
+   ENABLE_PCLK_MIF_SECURE_DREX1_TZ, 0,
+   CLK_IGNORE_UNUSED, 0),
 
/* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */
GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",
@@ -1674,11 +1679,14 @@ static struct samsung_gate_clock peric_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
3, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
-   ENABLE_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 2,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART1, "sclk_uart1", "sclk_uart1_peric",
-   ENABLE_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 1,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART0, "sclk_uart0", "sclk_uart0_peric",
-   ENABLE_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 0,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
 };
 
 static struct samsung_cmu_info peric_cmu_info __initdata = {
@@ -2962,7 +2970,7 @@ static struct samsung_gate_clock aud_gate_clks[] 
__initdata = {
 
/* ENABLE_SCLK_AUD0 */
GATE(CLK_ATCLK_AUD, "atclk_aud", "div_atclk_aud", ENABLE_SCLK_AUD0,
-   2, 0, 0),
+   2, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_DBG_AUD, "pclk_dbg_aud", "div_pclk_dbg_aud",
ENABLE_SCLK_AUD0, 1, 0, 0),
GATE(CLK_SCLK_AUD_CA5, "sclk_aud_ca5", "div_aud_ca5", ENABLE_SCLK_AUD0,
@@ -3356,9 +3364,11 @@ static struct samsung_gate_clock gscl_gate_clks[] 
__initdata = {
GATE(CLK_ACLK_GSCLNP_111, "aclk_gsclnp_111", "mout_aclk_gscl_111_user",
ENABLE_ACLK_GSCL, 6, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_GSCLRTND_333, "aclk_gsclrtnd_333",
-   

[PATCH 1/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD Uart

[Chanwoo Choi]

From: Beomho Seo 

This patch adds the CLK_IGNORE_UNUSED flag for sclk_aud_uart gate clock
for uart3 opeation.

Signed-off-by: Beomho Seo 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index 128527b8fbeb..e1a9c24079a4 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -2976,7 +2976,7 @@ static struct samsung_gate_clock aud_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_AUD_SLIMBUS, "sclk_aud_slimbus", "div_sclk_aud_slimbus",
ENABLE_SCLK_AUD1, 4, 0, 0),
GATE(CLK_SCLK_AUD_UART, "sclk_aud_uart", "div_sclk_aud_uart",
-   ENABLE_SCLK_AUD1, 3, 0, 0),
+   ENABLE_SCLK_AUD1, 3, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_AUD_PCM, "sclk_aud_pcm", "div_sclk_aud_pcm",
ENABLE_SCLK_AUD1, 2, 0, 0),
GATE(CLK_SCLK_I2S_BCLK, "sclk_i2s_bclk", "ioclk_i2s_bclk",
-- 
1.9.1

[PATCH 0/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag and

[Chanwoo Choi]

This patch-set add the CLK_IGNORE_UNUSED flag to the specific clocks because
the specific clocks should remain the enable state. This patch-set support the
PCIE (PCI Express), serial3(AUD Uart) device and fix the hang issue for
suspend-to-ram.

Beomho Seo (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD Uart

Jaehoon Chung (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device

Jonghwa Lee (1):
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks occurring hang 
at sleep

 drivers/clk/samsung/clk-exynos5433.c   | 47 +-
 include/dt-bindings/clock/exynos5433.h |  3 ++-
 2 files changed, 31 insertions(+), 19 deletions(-)

-- 
1.9.1

[PATCH 2/3] clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to clocks occurring hang at sleep

[Chanwoo Choi]

From: Jonghwa Lee 

Some clocks are required being unmasked during suspend-to-ram. Otherwise,
PMU will stuck and power line never down.

Signed-off-by: Jonghwa Lee 
Signed-off-by: Chanwoo Choi 
---
 drivers/clk/samsung/clk-exynos5433.c | 34 ++
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5433.c 
b/drivers/clk/samsung/clk-exynos5433.c
index e1a9c24079a4..852ac6a7607e 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -668,11 +668,14 @@ static struct samsung_gate_clock top_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_PCM1_PERIC, "sclk_pcm1_peric", "div_sclk_pcm1",
ENABLE_SCLK_TOP_PERIC, 7, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_UART2_PERIC, "sclk_uart2_peric", "div_sclk_uart2",
-   ENABLE_SCLK_TOP_PERIC, 5, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 5, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART1_PERIC, "sclk_uart1_peric", "div_sclk_uart1",
-   ENABLE_SCLK_TOP_PERIC, 4, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 4, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART0_PERIC, "sclk_uart0_peric", "div_sclk_uart0",
-   ENABLE_SCLK_TOP_PERIC, 3, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_TOP_PERIC, 3, CLK_SET_RATE_PARENT |
+   CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_SPI2_PERIC, "sclk_spi2_peric", "div_sclk_spi2_b",
ENABLE_SCLK_TOP_PERIC, 2, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_SPI1_PERIC, "sclk_spi1_peric", "div_sclk_spi1_b",
@@ -833,7 +836,7 @@ static struct samsung_div_clock cpif_div_clks[] __initdata 
= {
 static struct samsung_gate_clock cpif_gate_clks[] __initdata = {
/* ENABLE_SCLK_CPIF */
GATE(CLK_SCLK_MPHY_PLL, "sclk_mphy_pll", "mout_mphy_pll",
-   ENABLE_SCLK_CPIF, 9, 0, 0),
+   ENABLE_SCLK_CPIF, 9, CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UFS_MPHY, "sclk_ufs_mphy", "div_sclk_mphy",
ENABLE_SCLK_CPIF, 4, 0, 0),
 };
@@ -1440,11 +1443,13 @@ static struct samsung_gate_clock mif_gate_clks[] 
__initdata = {
 
/* ENABLE_PCLK_MIF_SECURE_DREX0_TZ */
GATE(CLK_PCLK_DREX0_TZ, "pclk_drex0_tz", "div_aclk_mif_133",
-   ENABLE_PCLK_MIF_SECURE_DREX0_TZ, 0, 0, 0),
+   ENABLE_PCLK_MIF_SECURE_DREX0_TZ, 0,
+   CLK_IGNORE_UNUSED, 0),
 
/* ENABLE_PCLK_MIF_SECURE_DREX1_TZ */
GATE(CLK_PCLK_DREX1_TZ, "pclk_drex1_tz", "div_aclk_mif_133",
-   ENABLE_PCLK_MIF_SECURE_DREX1_TZ, 0, 0, 0),
+   ENABLE_PCLK_MIF_SECURE_DREX1_TZ, 0,
+   CLK_IGNORE_UNUSED, 0),
 
/* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */
GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",
@@ -1674,11 +1679,14 @@ static struct samsung_gate_clock peric_gate_clks[] 
__initdata = {
GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
3, CLK_SET_RATE_PARENT, 0),
GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
-   ENABLE_SCLK_PERIC, 2, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 2,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART1, "sclk_uart1", "sclk_uart1_peric",
-   ENABLE_SCLK_PERIC, 1, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 1,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
GATE(CLK_SCLK_UART0, "sclk_uart0", "sclk_uart0_peric",
-   ENABLE_SCLK_PERIC, 0, CLK_SET_RATE_PARENT, 0),
+   ENABLE_SCLK_PERIC, 0,
+   CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, 0),
 };
 
 static struct samsung_cmu_info peric_cmu_info __initdata = {
@@ -2962,7 +2970,7 @@ static struct samsung_gate_clock aud_gate_clks[] 
__initdata = {
 
/* ENABLE_SCLK_AUD0 */
GATE(CLK_ATCLK_AUD, "atclk_aud", "div_atclk_aud", ENABLE_SCLK_AUD0,
-   2, 0, 0),
+   2, CLK_IGNORE_UNUSED, 0),
GATE(CLK_PCLK_DBG_AUD, "pclk_dbg_aud", "div_pclk_dbg_aud",
ENABLE_SCLK_AUD0, 1, 0, 0),
GATE(CLK_SCLK_AUD_CA5, "sclk_aud_ca5", "div_aud_ca5", ENABLE_SCLK_AUD0,
@@ -3356,9 +3364,11 @@ static struct samsung_gate_clock gscl_gate_clks[] 
__initdata = {
GATE(CLK_ACLK_GSCLNP_111, "aclk_gsclnp_111", "mout_aclk_gscl_111_user",
ENABLE_ACLK_GSCL, 6, CLK_IGNORE_UNUSED, 0),
GATE(CLK_ACLK_GSCLRTND_333, "aclk_gsclrtnd_333",
-   "mout_aclk_gscl_333_user", ENABLE_ACLK_GSCL, 5, 0, 0),
+ 

[PATCH trivial] include/linux/mempolicy.h: Clean up code

[chengang]

From: Chen Gang 

Use one return statement instead of multiple statements, since the new
return statement is still simple enough.

Let the second line function parameter almost align with the first line
function parameter.

Signed-off-by: Chen Gang 
---
 include/linux/mempolicy.h | 18 ++
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 4429d25..3d7e9c0 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -85,9 +85,7 @@ static inline void mpol_cond_put(struct mempolicy *pol)
 extern struct mempolicy *__mpol_dup(struct mempolicy *pol);
 static inline struct mempolicy *mpol_dup(struct mempolicy *pol)
 {
-   if (pol)
-   pol = __mpol_dup(pol);
-   return pol;
+   return pol ? __mpol_dup(pol) : NULL;
 }
 
 #define vma_policy(vma) ((vma)->vm_policy)
@@ -101,9 +99,7 @@ static inline void mpol_get(struct mempolicy *pol)
 extern bool __mpol_equal(struct mempolicy *a, struct mempolicy *b);
 static inline bool mpol_equal(struct mempolicy *a, struct mempolicy *b)
 {
-   if (a == b)
-   return true;
-   return __mpol_equal(a, b);
+   return (a == b) || __mpol_equal(a, b);
 }
 
 /*
@@ -136,7 +132,7 @@ struct mempolicy *mpol_shared_policy_lookup(struct 
shared_policy *sp,
 
 struct mempolicy *get_task_policy(struct task_struct *p);
 struct mempolicy *__get_vma_policy(struct vm_area_struct *vma,
-   unsigned long addr);
+   unsigned long addr);
 bool vma_policy_mof(struct vm_area_struct *vma);
 
 extern void numa_default_policy(void);
@@ -150,7 +146,7 @@ extern struct zonelist *huge_zonelist(struct vm_area_struct 
*vma,
struct mempolicy **mpol, nodemask_t **nodemask);
 extern bool init_nodemask_of_mempolicy(nodemask_t *mask);
 extern bool mempolicy_nodemask_intersects(struct task_struct *tsk,
-   const nodemask_t *mask);
+   const nodemask_t *mask);
 extern unsigned int mempolicy_slab_node(void);
 
 extern enum zone_type policy_zone;
@@ -187,11 +183,9 @@ static inline bool vma_migratable(struct vm_area_struct 
*vma)
 * do so then migration (at least from node to node) is not
 * possible.
 */
-   if (vma->vm_file &&
+   return !(vma->vm_file &&
gfp_zone(mapping_gfp_mask(vma->vm_file->f_mapping))
-   < policy_zone)
-   return false;
-   return true;
+   < policy_zone);
 }
 
 extern int mpol_misplaced(struct page *, struct vm_area_struct *, unsigned 
long);
-- 
1.9.3

[PATCH trivial] include/linux/mempolicy.h: Clean up code

[chengang]

From: Chen Gang 

Use one return statement instead of multiple statements, since the new
return statement is still simple enough.

Let the second line function parameter almost align with the first line
function parameter.

Signed-off-by: Chen Gang 
---
 include/linux/mempolicy.h | 18 ++
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 4429d25..3d7e9c0 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -85,9 +85,7 @@ static inline void mpol_cond_put(struct mempolicy *pol)
 extern struct mempolicy *__mpol_dup(struct mempolicy *pol);
 static inline struct mempolicy *mpol_dup(struct mempolicy *pol)
 {
-   if (pol)
-   pol = __mpol_dup(pol);
-   return pol;
+   return pol ? __mpol_dup(pol) : NULL;
 }
 
 #define vma_policy(vma) ((vma)->vm_policy)
@@ -101,9 +99,7 @@ static inline void mpol_get(struct mempolicy *pol)
 extern bool __mpol_equal(struct mempolicy *a, struct mempolicy *b);
 static inline bool mpol_equal(struct mempolicy *a, struct mempolicy *b)
 {
-   if (a == b)
-   return true;
-   return __mpol_equal(a, b);
+   return (a == b) || __mpol_equal(a, b);
 }
 
 /*
@@ -136,7 +132,7 @@ struct mempolicy *mpol_shared_policy_lookup(struct 
shared_policy *sp,
 
 struct mempolicy *get_task_policy(struct task_struct *p);
 struct mempolicy *__get_vma_policy(struct vm_area_struct *vma,
-   unsigned long addr);
+   unsigned long addr);
 bool vma_policy_mof(struct vm_area_struct *vma);
 
 extern void numa_default_policy(void);
@@ -150,7 +146,7 @@ extern struct zonelist *huge_zonelist(struct vm_area_struct 
*vma,
struct mempolicy **mpol, nodemask_t **nodemask);
 extern bool init_nodemask_of_mempolicy(nodemask_t *mask);
 extern bool mempolicy_nodemask_intersects(struct task_struct *tsk,
-   const nodemask_t *mask);
+   const nodemask_t *mask);
 extern unsigned int mempolicy_slab_node(void);
 
 extern enum zone_type policy_zone;
@@ -187,11 +183,9 @@ static inline bool vma_migratable(struct vm_area_struct 
*vma)
 * do so then migration (at least from node to node) is not
 * possible.
 */
-   if (vma->vm_file &&
+   return !(vma->vm_file &&
gfp_zone(mapping_gfp_mask(vma->vm_file->f_mapping))
-   < policy_zone)
-   return false;
-   return true;
+   < policy_zone);
 }
 
 extern int mpol_misplaced(struct page *, struct vm_area_struct *, unsigned 
long);
-- 
1.9.3

Re: [PATCHv3 0/2] target: make location of /var/targets configurable

[Nicholas A. Bellinger]

On Thu, 2016-06-09 at 16:51 -0700, Lee Duncan wrote:
> Ping?
> 
> We really need to move the target database out of /var/target
> 

This series has already merged up for v4.7-rc1.

Re: [PATCHv3 0/2] target: make location of /var/targets configurable

[Nicholas A. Bellinger]

On Thu, 2016-06-09 at 16:51 -0700, Lee Duncan wrote:
> Ping?
> 
> We really need to move the target database out of /var/target
> 

This series has already merged up for v4.7-rc1.

Re: [PATCH] ipmi: Remove smi_msg from waiting_rcv_msgs list before handle_one_recv_msg()

[Corey Minyard]

I actually just wrote this exact patch, moments ago.  But you deserve 
credit, I'll use yours :).


-corey

On 06/09/2016 11:31 PM, Junichi Nomura wrote:

Commit 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for
SMI interfaces") changed handle_new_recv_msgs() to call handle_one_recv_msg()
for a smi_msg while the smi_msg is still connected to waiting_rcv_msgs list.
That could lead to following list corruption problems:

1) low-level function treats smi_msg as not connected to list

   handle_one_recv_msg() could end up calling smi_send(), which
   assumes the msg is not connected to list.

   For example, the following sequence could corrupt list by
   doing list_add_tail() for the entry still connected to other list.

 handle_new_recv_msgs()
   msg = list_entry(waiting_rcv_msgs)
   handle_one_recv_msg(msg)
 handle_ipmb_get_msg_cmd(msg)
   smi_send(msg)
 spin_lock(xmit_msgs_lock)
 list_add_tail(msg)
 spin_unlock(xmit_msgs_lock)

2) race between multiple handle_new_recv_msgs() instances

   handle_new_recv_msgs() once releases waiting_rcv_msgs_lock before calling
   handle_one_recv_msg() then retakes the lock and list_del() it.

   If others call handle_new_recv_msgs() during the window shown below
   list_del() will be done twice for the same smi_msg.

   handle_new_recv_msgs()
 spin_lock(waiting_rcv_msgs_lock)
 msg = list_entry(waiting_rcv_msgs)
 spin_unlock(waiting_rcv_msgs_lock)
   |
   | handle_one_recv_msg(msg)
   |
 spin_lock(waiting_rcv_msgs_lock)
 list_del(msg)
 spin_unlock(waiting_rcv_msgs_lock)

Fixes: 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for SMI 
interfaces")
Signed-off-by: Jun'ichi Nomura 

diff --git a/drivers/char/ipmi/ipmi_msghandler.c 
b/drivers/char/ipmi/ipmi_msghandler.c
index 94fb407..94e4a88 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -3820,6 +3820,7 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
while (!list_empty(>waiting_rcv_msgs)) {
smi_msg = list_entry(intf->waiting_rcv_msgs.next,
 struct ipmi_smi_msg, link);
+   list_del(_msg->link);
if (!run_to_completion)
spin_unlock_irqrestore(>waiting_rcv_msgs_lock,
   flags);
@@ -3831,9 +3832,9 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
 * To preserve message order, quit if we
 * can't handle a message.
 */
+   list_add(_msg->link, >waiting_rcv_msgs);
break;
} else {
-   list_del(_msg->link);
if (rv == 0)
/* Message handled */
ipmi_free_smi_msg(smi_msg);

Re: [PATCH] ipmi: Remove smi_msg from waiting_rcv_msgs list before handle_one_recv_msg()

[Corey Minyard]

I actually just wrote this exact patch, moments ago.  But you deserve 
credit, I'll use yours :).


-corey

On 06/09/2016 11:31 PM, Junichi Nomura wrote:

Commit 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for
SMI interfaces") changed handle_new_recv_msgs() to call handle_one_recv_msg()
for a smi_msg while the smi_msg is still connected to waiting_rcv_msgs list.
That could lead to following list corruption problems:

1) low-level function treats smi_msg as not connected to list

   handle_one_recv_msg() could end up calling smi_send(), which
   assumes the msg is not connected to list.

   For example, the following sequence could corrupt list by
   doing list_add_tail() for the entry still connected to other list.

 handle_new_recv_msgs()
   msg = list_entry(waiting_rcv_msgs)
   handle_one_recv_msg(msg)
 handle_ipmb_get_msg_cmd(msg)
   smi_send(msg)
 spin_lock(xmit_msgs_lock)
 list_add_tail(msg)
 spin_unlock(xmit_msgs_lock)

2) race between multiple handle_new_recv_msgs() instances

   handle_new_recv_msgs() once releases waiting_rcv_msgs_lock before calling
   handle_one_recv_msg() then retakes the lock and list_del() it.

   If others call handle_new_recv_msgs() during the window shown below
   list_del() will be done twice for the same smi_msg.

   handle_new_recv_msgs()
 spin_lock(waiting_rcv_msgs_lock)
 msg = list_entry(waiting_rcv_msgs)
 spin_unlock(waiting_rcv_msgs_lock)
   |
   | handle_one_recv_msg(msg)
   |
 spin_lock(waiting_rcv_msgs_lock)
 list_del(msg)
 spin_unlock(waiting_rcv_msgs_lock)

Fixes: 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for SMI 
interfaces")
Signed-off-by: Jun'ichi Nomura 

diff --git a/drivers/char/ipmi/ipmi_msghandler.c 
b/drivers/char/ipmi/ipmi_msghandler.c
index 94fb407..94e4a88 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -3820,6 +3820,7 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
while (!list_empty(>waiting_rcv_msgs)) {
smi_msg = list_entry(intf->waiting_rcv_msgs.next,
 struct ipmi_smi_msg, link);
+   list_del(_msg->link);
if (!run_to_completion)
spin_unlock_irqrestore(>waiting_rcv_msgs_lock,
   flags);
@@ -3831,9 +3832,9 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
 * To preserve message order, quit if we
 * can't handle a message.
 */
+   list_add(_msg->link, >waiting_rcv_msgs);
break;
} else {
-   list_del(_msg->link);
if (rv == 0)
/* Message handled */
ipmi_free_smi_msg(smi_msg);

[PATCH] ipmi: Remove smi_msg from waiting_rcv_msgs list before handle_one_recv_msg()

[Junichi Nomura]

Commit 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for
SMI interfaces") changed handle_new_recv_msgs() to call handle_one_recv_msg()
for a smi_msg while the smi_msg is still connected to waiting_rcv_msgs list.
That could lead to following list corruption problems:

1) low-level function treats smi_msg as not connected to list

  handle_one_recv_msg() could end up calling smi_send(), which
  assumes the msg is not connected to list.

  For example, the following sequence could corrupt list by
  doing list_add_tail() for the entry still connected to other list.

handle_new_recv_msgs()
  msg = list_entry(waiting_rcv_msgs)
  handle_one_recv_msg(msg)
handle_ipmb_get_msg_cmd(msg)
  smi_send(msg)
spin_lock(xmit_msgs_lock)
list_add_tail(msg)
spin_unlock(xmit_msgs_lock)

2) race between multiple handle_new_recv_msgs() instances

  handle_new_recv_msgs() once releases waiting_rcv_msgs_lock before calling
  handle_one_recv_msg() then retakes the lock and list_del() it.

  If others call handle_new_recv_msgs() during the window shown below
  list_del() will be done twice for the same smi_msg.

  handle_new_recv_msgs()
spin_lock(waiting_rcv_msgs_lock)
msg = list_entry(waiting_rcv_msgs)
spin_unlock(waiting_rcv_msgs_lock)
  | 
  | handle_one_recv_msg(msg)
  | 
spin_lock(waiting_rcv_msgs_lock)
list_del(msg)
spin_unlock(waiting_rcv_msgs_lock)

Fixes: 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for SMI 
interfaces")
Signed-off-by: Jun'ichi Nomura 

diff --git a/drivers/char/ipmi/ipmi_msghandler.c 
b/drivers/char/ipmi/ipmi_msghandler.c
index 94fb407..94e4a88 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -3820,6 +3820,7 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
while (!list_empty(>waiting_rcv_msgs)) {
smi_msg = list_entry(intf->waiting_rcv_msgs.next,
 struct ipmi_smi_msg, link);
+   list_del(_msg->link);
if (!run_to_completion)
spin_unlock_irqrestore(>waiting_rcv_msgs_lock,
   flags);
@@ -3831,9 +3832,9 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
 * To preserve message order, quit if we
 * can't handle a message.
 */
+   list_add(_msg->link, >waiting_rcv_msgs);
break;
} else {
-   list_del(_msg->link);
if (rv == 0)
/* Message handled */
ipmi_free_smi_msg(smi_msg);

[PATCH] ipmi: Remove smi_msg from waiting_rcv_msgs list before handle_one_recv_msg()

[Junichi Nomura]

Commit 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for
SMI interfaces") changed handle_new_recv_msgs() to call handle_one_recv_msg()
for a smi_msg while the smi_msg is still connected to waiting_rcv_msgs list.
That could lead to following list corruption problems:

1) low-level function treats smi_msg as not connected to list

  handle_one_recv_msg() could end up calling smi_send(), which
  assumes the msg is not connected to list.

  For example, the following sequence could corrupt list by
  doing list_add_tail() for the entry still connected to other list.

handle_new_recv_msgs()
  msg = list_entry(waiting_rcv_msgs)
  handle_one_recv_msg(msg)
handle_ipmb_get_msg_cmd(msg)
  smi_send(msg)
spin_lock(xmit_msgs_lock)
list_add_tail(msg)
spin_unlock(xmit_msgs_lock)

2) race between multiple handle_new_recv_msgs() instances

  handle_new_recv_msgs() once releases waiting_rcv_msgs_lock before calling
  handle_one_recv_msg() then retakes the lock and list_del() it.

  If others call handle_new_recv_msgs() during the window shown below
  list_del() will be done twice for the same smi_msg.

  handle_new_recv_msgs()
spin_lock(waiting_rcv_msgs_lock)
msg = list_entry(waiting_rcv_msgs)
spin_unlock(waiting_rcv_msgs_lock)
  | 
  | handle_one_recv_msg(msg)
  | 
spin_lock(waiting_rcv_msgs_lock)
list_del(msg)
spin_unlock(waiting_rcv_msgs_lock)

Fixes: 7ea0ed2b5be8 ("ipmi: Make the message handler easier to use for SMI 
interfaces")
Signed-off-by: Jun'ichi Nomura 

diff --git a/drivers/char/ipmi/ipmi_msghandler.c 
b/drivers/char/ipmi/ipmi_msghandler.c
index 94fb407..94e4a88 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -3820,6 +3820,7 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
while (!list_empty(>waiting_rcv_msgs)) {
smi_msg = list_entry(intf->waiting_rcv_msgs.next,
 struct ipmi_smi_msg, link);
+   list_del(_msg->link);
if (!run_to_completion)
spin_unlock_irqrestore(>waiting_rcv_msgs_lock,
   flags);
@@ -3831,9 +3832,9 @@ static void handle_new_recv_msgs(ipmi_smi_t intf)
 * To preserve message order, quit if we
 * can't handle a message.
 */
+   list_add(_msg->link, >waiting_rcv_msgs);
break;
} else {
-   list_del(_msg->link);
if (rv == 0)
/* Message handled */
ipmi_free_smi_msg(smi_msg);

RE: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node

[Pramod Kumar]

Hi Florian,

> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 June 2016 00:08
> To: Pramod Kumar; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
> Kumar Gala; Catalin Marinas; Will Deacon; Kishon Vijay Abraham I; David S.
> Miller
> Cc: devicet...@vger.kernel.org; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; bcm-kernel-feedback-l...@broadcom.com; linux-arm-
> ker...@lists.infradead.org
> Subject: Re: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node
>
> On 06/06/2016 05:41 AM, Pramod Kumar wrote:
> > Add integrated MDIO multiplexer driver node which contains two mux
> > PCIe bus and one ethernet bus along with phys lying on these bus.
> >
> > Signed-off-by: Pramod Kumar 
> > ---
> > +   mdio_mux_iproc: mdio-mux@6602023c {
> > +   compatible = "brcm,mdio-mux-iproc";
> > +   reg = <0x6602023c 0x14>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   mdio@0 {
> > +   reg = <0x0>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   pci_phy0: pci-phy@0 {
> > +   compatible = "brcm,ns2-pcie-phy";
> > +   reg = <0x0>;
> > +   #phy-cells = <0>;
> > +   };
> > +   };
> > +
> > +   mdio@7 {
> > +   reg = <0x7>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   pci_phy1: pci-phy@0 {
> > +   compatible = "brcm,ns2-pcie-phy";
> > +   reg = <0x0>;
> > +   #phy-cells = <0>;
> > +   };
>
> Are these two PHYs always available in the NS2 SoC, or does that depend on
> interfaces exposed at the board level? Should not they be flagged with a
> disabled status property by default and enabled in their respective board
> files?
> --

It depends on the interfaces exposed at board level. We will disable it in
dtsi and enable it dts file. I'll address this through next patch set.

> Florian

Regards,
Pramod

RE: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node

[Pramod Kumar]

Hi Florian,

> -Original Message-
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 June 2016 00:08
> To: Pramod Kumar; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
> Kumar Gala; Catalin Marinas; Will Deacon; Kishon Vijay Abraham I; David S.
> Miller
> Cc: devicet...@vger.kernel.org; net...@vger.kernel.org; linux-
> ker...@vger.kernel.org; bcm-kernel-feedback-l...@broadcom.com; linux-arm-
> ker...@lists.infradead.org
> Subject: Re: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node
>
> On 06/06/2016 05:41 AM, Pramod Kumar wrote:
> > Add integrated MDIO multiplexer driver node which contains two mux
> > PCIe bus and one ethernet bus along with phys lying on these bus.
> >
> > Signed-off-by: Pramod Kumar 
> > ---
> > +   mdio_mux_iproc: mdio-mux@6602023c {
> > +   compatible = "brcm,mdio-mux-iproc";
> > +   reg = <0x6602023c 0x14>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   mdio@0 {
> > +   reg = <0x0>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   pci_phy0: pci-phy@0 {
> > +   compatible = "brcm,ns2-pcie-phy";
> > +   reg = <0x0>;
> > +   #phy-cells = <0>;
> > +   };
> > +   };
> > +
> > +   mdio@7 {
> > +   reg = <0x7>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   pci_phy1: pci-phy@0 {
> > +   compatible = "brcm,ns2-pcie-phy";
> > +   reg = <0x0>;
> > +   #phy-cells = <0>;
> > +   };
>
> Are these two PHYs always available in the NS2 SoC, or does that depend on
> interfaces exposed at the board level? Should not they be flagged with a
> disabled status property by default and enabled in their respective board
> files?
> --

It depends on the interfaces exposed at board level. We will disable it in
dtsi and enable it dts file. I'll address this through next patch set.

> Florian

Regards,
Pramod

Re: [PATCH] nfsd: Close a race between access checking/setting in nfs4_get_vfs_file

[Oleg Drokin]

On Jun 9, 2016, at 5:01 PM, Oleg Drokin wrote:

> Currently there's an unprotected access mode check in nfs4_upgrade_open
> that then calls nfs4_get_vfs_file which in turn assumes whatever
> access mode was present in the state is still valid which is racy.
> Two nfs4_get_vfs_file van enter the same path as result and get two
> references to nfs4_file, but later drop would only happens once because
> access mode is only denoted by bits, so no refcounting.
> 
> The locking around access mode testing is introduced to avoid this race.
> 
> Signed-off-by: Oleg Drokin 
> ---
> 
> This patch performs equally well to the st_rwsem -> mutex conversion,
> but is a bit ligher-weight I imagine.
> For one it seems to allow truncates in parallel if we ever want it.
> 
> fs/nfsd/nfs4state.c | 28 +---
> 1 file changed, 25 insertions(+), 3 deletions(-)
> 
> diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
> index f5f82e1..d4b9eba 100644
> --- a/fs/nfsd/nfs4state.c
> +++ b/fs/nfsd/nfs4state.c
> @@ -3958,6 +3958,11 @@ static __be32 nfs4_get_vfs_file(struct svc_rqst 
> *rqstp, struct nfs4_file *fp,
> 
>   spin_lock(>fi_lock);
> 
> + if (test_access(open->op_share_access, stp)) {
> + spin_unlock(>fi_lock);
> + return nfserr_eagain;
> + }
> +
>   /*
>* Are we trying to set a deny mode that would conflict with
>* current access?
> @@ -4017,11 +4022,21 @@ nfs4_upgrade_open(struct svc_rqst *rqstp, struct 
> nfs4_file *fp, struct svc_fh *c
>   __be32 status;
>   unsigned char old_deny_bmap = stp->st_deny_bmap;
> 
> - if (!test_access(open->op_share_access, stp))
> - return nfs4_get_vfs_file(rqstp, fp, cur_fh, stp, open);
> +again:
> + spin_lock(>fi_lock);
> + if (!test_access(open->op_share_access, stp)) {
> + spin_unlock(>fi_lock);
> + status = nfs4_get_vfs_file(rqstp, fp, cur_fh, stp, open);
> + /*
> +  * Somebody won the race for access while we did not hold
> +  * the lock here
> +  */
> + if (status == nfserr_eagain)
> + goto again;
> + return status;
> + }
> 
>   /* test and set deny mode */
> - spin_lock(>fi_lock);
>   status = nfs4_file_check_deny(fp, open->op_share_deny);
>   if (status == nfs_ok) {
>   set_deny(open->op_share_deny, stp);
> @@ -4361,6 +4376,13 @@ nfsd4_process_open2(struct svc_rqst *rqstp, struct 
> svc_fh *current_fh, struct nf
>   status = nfs4_get_vfs_file(rqstp, fp, current_fh, stp, open);
>   if (status) {
>   up_read(>st_rwsem);
> + /*
> +  * EAGAIN is returned when there's a racing access,
> +  * this should never happen as we are the only user
> +  * of this new state, and since it's not yet hashed,
> +  * nobody can find it
> +  */
> + WARN_ON(status == nfserr_eagain);

Ok, some more testing shows that this CAN happen.
So this patch is inferior to the mutex one after all.

>   release_open_stateid(stp);
>   goto out;
>   }
> -- 
> 2.7.4

Re: [PATCH] nfsd: Close a race between access checking/setting in nfs4_get_vfs_file

[Oleg Drokin]

On Jun 9, 2016, at 5:01 PM, Oleg Drokin wrote:

> Currently there's an unprotected access mode check in nfs4_upgrade_open
> that then calls nfs4_get_vfs_file which in turn assumes whatever
> access mode was present in the state is still valid which is racy.
> Two nfs4_get_vfs_file van enter the same path as result and get two
> references to nfs4_file, but later drop would only happens once because
> access mode is only denoted by bits, so no refcounting.
> 
> The locking around access mode testing is introduced to avoid this race.
> 
> Signed-off-by: Oleg Drokin 
> ---
> 
> This patch performs equally well to the st_rwsem -> mutex conversion,
> but is a bit ligher-weight I imagine.
> For one it seems to allow truncates in parallel if we ever want it.
> 
> fs/nfsd/nfs4state.c | 28 +---
> 1 file changed, 25 insertions(+), 3 deletions(-)
> 
> diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
> index f5f82e1..d4b9eba 100644
> --- a/fs/nfsd/nfs4state.c
> +++ b/fs/nfsd/nfs4state.c
> @@ -3958,6 +3958,11 @@ static __be32 nfs4_get_vfs_file(struct svc_rqst 
> *rqstp, struct nfs4_file *fp,
> 
>   spin_lock(>fi_lock);
> 
> + if (test_access(open->op_share_access, stp)) {
> + spin_unlock(>fi_lock);
> + return nfserr_eagain;
> + }
> +
>   /*
>* Are we trying to set a deny mode that would conflict with
>* current access?
> @@ -4017,11 +4022,21 @@ nfs4_upgrade_open(struct svc_rqst *rqstp, struct 
> nfs4_file *fp, struct svc_fh *c
>   __be32 status;
>   unsigned char old_deny_bmap = stp->st_deny_bmap;
> 
> - if (!test_access(open->op_share_access, stp))
> - return nfs4_get_vfs_file(rqstp, fp, cur_fh, stp, open);
> +again:
> + spin_lock(>fi_lock);
> + if (!test_access(open->op_share_access, stp)) {
> + spin_unlock(>fi_lock);
> + status = nfs4_get_vfs_file(rqstp, fp, cur_fh, stp, open);
> + /*
> +  * Somebody won the race for access while we did not hold
> +  * the lock here
> +  */
> + if (status == nfserr_eagain)
> + goto again;
> + return status;
> + }
> 
>   /* test and set deny mode */
> - spin_lock(>fi_lock);
>   status = nfs4_file_check_deny(fp, open->op_share_deny);
>   if (status == nfs_ok) {
>   set_deny(open->op_share_deny, stp);
> @@ -4361,6 +4376,13 @@ nfsd4_process_open2(struct svc_rqst *rqstp, struct 
> svc_fh *current_fh, struct nf
>   status = nfs4_get_vfs_file(rqstp, fp, current_fh, stp, open);
>   if (status) {
>   up_read(>st_rwsem);
> + /*
> +  * EAGAIN is returned when there's a racing access,
> +  * this should never happen as we are the only user
> +  * of this new state, and since it's not yet hashed,
> +  * nobody can find it
> +  */
> + WARN_ON(status == nfserr_eagain);

Ok, some more testing shows that this CAN happen.
So this patch is inferior to the mutex one after all.

>   release_open_stateid(stp);
>   goto out;
>   }
> -- 
> 2.7.4

[PATCH] soc: qcom: Update properties for smem state referencing

[Bjorn Andersson]

Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.

Also update the #qcom,smem-state-cells for consistency, before we merge
any users of these properties.

Signed-off-by: Bjorn Andersson 
---
 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt |  4 ++--
 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt  |  4 ++--
 drivers/soc/qcom/smem_state.c | 12 ++--
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
index 5cc82b8353d8..af9ca37221ce 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
@@ -68,7 +68,7 @@ important.
Value type: 
Definition: must be 2 - denoting the bit in the entry and IRQ flags
 
-- #qcom,state-cells:
+- #qcom,smem-state-cells:
Usage: required for outgoing entries
Value type: 
Definition: must be 1 - denoting the bit in the entry
@@ -92,7 +92,7 @@ wcnss-smp2p {
wcnss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
 
-   #qcom,state-cells = <1>;
+   #qcom,smem-state-cells = <1>;
};
 
wcnss_smp2p_in: slave-kernel {
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
index a6634c70850d..2993b5a97dd6 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
@@ -51,7 +51,7 @@ important.
Definition: specifies the offset, in words, of the first bit for this
entry
 
-- #qcom,state-cells:
+- #qcom,smem-state-cells:
Usage: required for local entry
Value type: 
Definition: must be 1 - denotes bit number
@@ -91,7 +91,7 @@ smsm {
apps_smsm: apps@0 {
reg = <0>;
 
-   #qcom,state-cells = <1>;
+   #qcom,smem-state-cells = <1>;
};
 
wcnss_smsm: wcnss@7 {
diff --git a/drivers/soc/qcom/smem_state.c b/drivers/soc/qcom/smem_state.c
index 54261decb369..d5437ca76ed9 100644
--- a/drivers/soc/qcom/smem_state.c
+++ b/drivers/soc/qcom/smem_state.c
@@ -104,26 +104,26 @@ struct qcom_smem_state *qcom_smem_state_get(struct device 
*dev,
 
if (con_id) {
index = of_property_match_string(dev->of_node,
-"qcom,state-names",
+"qcom,smem-state-names",
 con_id);
if (index < 0) {
-   dev_err(dev, "missing qcom,state-names\n");
+   dev_err(dev, "missing qcom,smem-state-names\n");
return ERR_PTR(index);
}
}
 
ret = of_parse_phandle_with_args(dev->of_node,
-"qcom,state",
-"#qcom,state-cells",
+"qcom,smem-states",
+"#qcom,smem-state-cells",
 index,
 );
if (ret) {
-   dev_err(dev, "failed to parse qcom,state property\n");
+   dev_err(dev, "failed to parse qcom,smem-states property\n");
return ERR_PTR(ret);
}
 
if (args.args_count != 1) {
-   dev_err(dev, "invalid #qcom,state-cells\n");
+   dev_err(dev, "invalid #qcom,smem-state-cells\n");
return ERR_PTR(-EINVAL);
}
 
-- 
2.5.0

[PATCH] soc: qcom: Update properties for smem state referencing

[Bjorn Andersson]

Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.

Also update the #qcom,smem-state-cells for consistency, before we merge
any users of these properties.

Signed-off-by: Bjorn Andersson 
---
 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt |  4 ++--
 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt  |  4 ++--
 drivers/soc/qcom/smem_state.c | 12 ++--
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
index 5cc82b8353d8..af9ca37221ce 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt
@@ -68,7 +68,7 @@ important.
Value type: 
Definition: must be 2 - denoting the bit in the entry and IRQ flags
 
-- #qcom,state-cells:
+- #qcom,smem-state-cells:
Usage: required for outgoing entries
Value type: 
Definition: must be 1 - denoting the bit in the entry
@@ -92,7 +92,7 @@ wcnss-smp2p {
wcnss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
 
-   #qcom,state-cells = <1>;
+   #qcom,smem-state-cells = <1>;
};
 
wcnss_smp2p_in: slave-kernel {
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt 
b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
index a6634c70850d..2993b5a97dd6 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt
@@ -51,7 +51,7 @@ important.
Definition: specifies the offset, in words, of the first bit for this
entry
 
-- #qcom,state-cells:
+- #qcom,smem-state-cells:
Usage: required for local entry
Value type: 
Definition: must be 1 - denotes bit number
@@ -91,7 +91,7 @@ smsm {
apps_smsm: apps@0 {
reg = <0>;
 
-   #qcom,state-cells = <1>;
+   #qcom,smem-state-cells = <1>;
};
 
wcnss_smsm: wcnss@7 {
diff --git a/drivers/soc/qcom/smem_state.c b/drivers/soc/qcom/smem_state.c
index 54261decb369..d5437ca76ed9 100644
--- a/drivers/soc/qcom/smem_state.c
+++ b/drivers/soc/qcom/smem_state.c
@@ -104,26 +104,26 @@ struct qcom_smem_state *qcom_smem_state_get(struct device 
*dev,
 
if (con_id) {
index = of_property_match_string(dev->of_node,
-"qcom,state-names",
+"qcom,smem-state-names",
 con_id);
if (index < 0) {
-   dev_err(dev, "missing qcom,state-names\n");
+   dev_err(dev, "missing qcom,smem-state-names\n");
return ERR_PTR(index);
}
}
 
ret = of_parse_phandle_with_args(dev->of_node,
-"qcom,state",
-"#qcom,state-cells",
+"qcom,smem-states",
+"#qcom,smem-state-cells",
 index,
 );
if (ret) {
-   dev_err(dev, "failed to parse qcom,state property\n");
+   dev_err(dev, "failed to parse qcom,smem-states property\n");
return ERR_PTR(ret);
}
 
if (args.args_count != 1) {
-   dev_err(dev, "invalid #qcom,state-cells\n");
+   dev_err(dev, "invalid #qcom,smem-state-cells\n");
return ERR_PTR(-EINVAL);
}
 
-- 
2.5.0

Re: [PATCH v2 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 1:05 AM, Shawn Lin  wrote:
> +pcie0: pcie@f800 {
> +   compatible = "rockchip,rk3399-pcie";
> +   #address-cells = <3>;
> +   #size-cells = <2>;
> +   clocks = < ACLK_PCIE>, < ACLK_PERF_PCIE>,
> +< PCLK_PCIE>;
> +   clock-names = "aclk", "aclk-perf",
> + "hclk";

Code also requires a "pm" clock.

> +   bus-range = <0x0 0x1>;
> +   interrupts = ,  IRQ_TYPE_LEVEL_HIGH>,
> +;
> +   interrupt-names: "sys", "legacy", "client";

Shouldn't be ":", should be "=".


> +   assigned-clocks = < SCLK_PCIEPHY_REF>;
> +   assigned-clock-parents = < SCLK_PCIEPHY_REF100M>;
> +   assigned-clock-rates = <1>;
> +   ep-gpios = < 13 GPIO_ACTIVE_HIGH>;
> +   ranges = < 0x8200 0 0xfa00 0x0 0xfa00 0 0x60
> +  0x8100 0 0xfa60 0x0 0xfa60 0 0x10 >;

nit: I don't thin it's common to have spaces before/after the ">" and "<".
nit: Be consistent about 0 vs. 0x0 in ranges.


> +   num-lanes = <4>;
> +   reg = < 0x0 0xf800 0x0 0x200 >, < 0x0 0xfd00 0x0 
> 0x100 >;
> +   reg-name = "axi-base", "apb-base";

Should be "reg-names" (with an "s")


> +   resets = < SRST_PCIEPHY>, < SRST_PCIE_CORE>, < 
> SRST_PCIE_MGMT>,
> +< SRST_PCIE_MGMT_STICKY>, < SRST_PCIE_PIPE>;
> +   reset-names = "core", "mgmt", "mgmt-sticky", "pipe";

You have 5 resets but 4 reset names.  That doesn't seem right.  Code
shows you only getting 4, so presumably you need to remove the
SRST_PCIEPHY one.


-Doug

Re: [PATCH v2 1/2] Documentation: bindings: add dt doc for Rockchip PCIe controller

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 1:05 AM, Shawn Lin  wrote:
> +pcie0: pcie@f800 {
> +   compatible = "rockchip,rk3399-pcie";
> +   #address-cells = <3>;
> +   #size-cells = <2>;
> +   clocks = < ACLK_PCIE>, < ACLK_PERF_PCIE>,
> +< PCLK_PCIE>;
> +   clock-names = "aclk", "aclk-perf",
> + "hclk";

Code also requires a "pm" clock.

> +   bus-range = <0x0 0x1>;
> +   interrupts = ,  IRQ_TYPE_LEVEL_HIGH>,
> +;
> +   interrupt-names: "sys", "legacy", "client";

Shouldn't be ":", should be "=".


> +   assigned-clocks = < SCLK_PCIEPHY_REF>;
> +   assigned-clock-parents = < SCLK_PCIEPHY_REF100M>;
> +   assigned-clock-rates = <1>;
> +   ep-gpios = < 13 GPIO_ACTIVE_HIGH>;
> +   ranges = < 0x8200 0 0xfa00 0x0 0xfa00 0 0x60
> +  0x8100 0 0xfa60 0x0 0xfa60 0 0x10 >;

nit: I don't thin it's common to have spaces before/after the ">" and "<".
nit: Be consistent about 0 vs. 0x0 in ranges.


> +   num-lanes = <4>;
> +   reg = < 0x0 0xf800 0x0 0x200 >, < 0x0 0xfd00 0x0 
> 0x100 >;
> +   reg-name = "axi-base", "apb-base";

Should be "reg-names" (with an "s")


> +   resets = < SRST_PCIEPHY>, < SRST_PCIE_CORE>, < 
> SRST_PCIE_MGMT>,
> +< SRST_PCIE_MGMT_STICKY>, < SRST_PCIE_PIPE>;
> +   reset-names = "core", "mgmt", "mgmt-sticky", "pipe";

You have 5 resets but 4 reset names.  That doesn't seem right.  Code
shows you only getting 4, so presumably you need to remove the
SRST_PCIEPHY one.


-Doug

Re: [PATCH 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 12:25 AM, Shawn Lin  wrote:
> This patch adds a binding that describes the Rockchip PCIe PHY
> found on Rockchip SoCs PCIe interface.
>
> Signed-off-by: Shawn Lin 
> ---
>
>  .../devicetree/bindings/phy/rockchip-pcie-phy.txt  | 22 
> ++
>  1 file changed, 22 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt 
> b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> new file mode 100644
> index 000..ba8c406
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +Rockchip PCIE PHY
> +---
> +
> +Required properties:
> + - compatible: rockchip,rk3399-pcie-phy
> + - #phy-cells: must be 0

Code also requires reset and clock.

clocks = < SCLK_PCIEPHY_REF>;
clock-names = "refclk";
resets = < SRST_PCIEPHY>;
reset-names = "phy";

Re: [PATCH 1/2] Documentation: bindings: add dt documentation for Rockchip PCIe PHY

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 12:25 AM, Shawn Lin  wrote:
> This patch adds a binding that describes the Rockchip PCIe PHY
> found on Rockchip SoCs PCIe interface.
>
> Signed-off-by: Shawn Lin 
> ---
>
>  .../devicetree/bindings/phy/rockchip-pcie-phy.txt  | 22 
> ++
>  1 file changed, 22 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt 
> b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> new file mode 100644
> index 000..ba8c406
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
> @@ -0,0 +1,22 @@
> +Rockchip PCIE PHY
> +---
> +
> +Required properties:
> + - compatible: rockchip,rk3399-pcie-phy
> + - #phy-cells: must be 0

Code also requires reset and clock.

clocks = < SCLK_PCIEPHY_REF>;
clock-names = "refclk";
resets = < SRST_PCIEPHY>;
reset-names = "phy";

Re: [PATCH v2 2/2] PCI: Rockchip: Add Rockchip PCIe controller support

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 1:05 AM, Shawn Lin  wrote:
> This patch adds Rockchip PCIe controller support found
> on RK3399 Soc platform.
>
> Signed-off-by: Shawn Lin 
>
> ---
>
> Changes in v2:
> - remove phy related stuff and call phy API
> - add new head file and define lots of macro to make
>   the code more readable
> - remove lots msi related code suggested by Marc
> - add IO window address translation
> - init_port and parse_dt reconstruction suggested by Bharat
> - improve wr_own_conf suggested by Arnd
> - make pcie as an interrupt controller and fix wrong int handler
>   suggested by Marc
> - remove PCI_PROBE_ONLY suggested by Lorenzo
>
>  drivers/pci/host/Kconfig |   11 +
>  drivers/pci/host/Makefile|1 +
>  drivers/pci/host/pcie-rockchip.c | 1049 
> ++
>  drivers/pci/host/pcie-rockchip.h |  209 
>  4 files changed, 1270 insertions(+)

A few drive-by comments for things I ran into trying to get this
working.  I'm no PCI expert.


> +config PCIE_ROCKCHIP
> +   bool "Rockchip PCIe controller"
> +   depends on ARM64 && ARCH_ROCKCHIP
> +   depends on OF
> +   select MFD_SYSCON
> +   select PCI_MSI_IRQ_DOMAIN if PCI_MSI

Probably because I don't know what I'm doing, but when I had PCI_MSI
configured I had trouble getting interrupts.  Figured I'd mention it
even though it's probably user error.

> +/**
> + * rockchip_pcie_parse_dt - Parse Device tree
> + * @port: PCIe port information
> + *
> + * Return: '0' on success and error value on failure
> + */
> +static int rockchip_pcie_parse_dt(struct rockchip_pcie_port *port)
> +{
> +   struct device *dev = port->dev;
> +   struct platform_device *pdev = to_platform_device(dev);
> +   struct device_node *node = dev->of_node;
> +   struct resource *regs;
> +   int irq;
> +   int err;
> +
> +   regs = platform_get_resource_byname(pdev,
> +   IORESOURCE_MEM,
> +   "axi-base");
> +   if (!regs) {
> +   dev_err(dev, "missing axi-base property\n");
> +   return err;

Won't "err" be uninitialized?

> +   }
> +
> +   port->reg_base = devm_ioremap_resource(dev, regs);
> +   if (IS_ERR(port->reg_base))
> +   return PTR_ERR(port->reg_base);
> +
> +   regs = platform_get_resource_byname(pdev,
> +   IORESOURCE_MEM,
> +   "apb-base");
> +   if (!regs) {
> +   dev_err(dev, "missing apb-base property\n");
> +   return err;

Here too.

> +   }
> +
> +   port->apb_base = devm_ioremap_resource(dev, regs);
> +   if (IS_ERR(port->apb_base))
> +   return PTR_ERR(port->apb_base);
> +
> +   port->phy = devm_phy_get(dev, "pcie-phy");
> +   if (IS_ERR_OR_NULL(port->phy)) {
> +   if (PTR_ERR_OR_ZERO(port->phy) != -EPROBE_DEFER)
> +   dev_err(dev, "Missing pcie-phy\n");
> +   return PTR_ERR(port->phy);
> +   }
> +
> +   port->lanes = 1;
> +   err = of_property_read_u32(node, "num-lanes", >lanes);
> +   if (!err && ((port->lanes == 0) ||
> +(port->lanes == 3) ||
> +(port->lanes > 4))) {
> +   dev_warn(dev, "invalid num-lanes, default use one lane\n");
> +   port->lanes = 1;
> +   }
> +
> +   port->core_rst = devm_reset_control_get(dev, "core");
> +   if (IS_ERR(port->core_rst)) {
> +   if (PTR_ERR(port->core_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing core rst property in node %s\n",
> +   node->name);
> +   return PTR_ERR(port->core_rst);
> +   }
> +
> +   port->mgmt_rst = devm_reset_control_get(dev, "mgmt");
> +   if (IS_ERR(port->mgmt_rst)) {
> +   if (PTR_ERR(port->mgmt_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing mgmt rst property in node %s\n",
> +   node->name);
> +   return PTR_ERR(port->mgmt_rst);
> +   }
> +
> +   port->mgmt_sticky_rst = devm_reset_control_get(dev, "mgmt-sticky");
> +   if (IS_ERR(port->mgmt_sticky_rst)) {
> +   if (PTR_ERR(port->mgmt_sticky_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing mgmt-sticky rst property in 
> node %s\n",
> +   node->name);
> +   return PTR_ERR(port->mgmt_sticky_rst);
> +   }
> +
> +   port->pipe_rst = devm_reset_control_get(dev, "pipe");
> +   if (IS_ERR(port->pipe_rst)) {
> +   if (PTR_ERR(port->pipe_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing pipe rst property in node %s\n",
> +   node->name);
> +   return 

Re: [PATCH v2 2/2] PCI: Rockchip: Add Rockchip PCIe controller support

[Doug Anderson]

Shawn,

On Wed, Jun 8, 2016 at 1:05 AM, Shawn Lin  wrote:
> This patch adds Rockchip PCIe controller support found
> on RK3399 Soc platform.
>
> Signed-off-by: Shawn Lin 
>
> ---
>
> Changes in v2:
> - remove phy related stuff and call phy API
> - add new head file and define lots of macro to make
>   the code more readable
> - remove lots msi related code suggested by Marc
> - add IO window address translation
> - init_port and parse_dt reconstruction suggested by Bharat
> - improve wr_own_conf suggested by Arnd
> - make pcie as an interrupt controller and fix wrong int handler
>   suggested by Marc
> - remove PCI_PROBE_ONLY suggested by Lorenzo
>
>  drivers/pci/host/Kconfig |   11 +
>  drivers/pci/host/Makefile|1 +
>  drivers/pci/host/pcie-rockchip.c | 1049 
> ++
>  drivers/pci/host/pcie-rockchip.h |  209 
>  4 files changed, 1270 insertions(+)

A few drive-by comments for things I ran into trying to get this
working.  I'm no PCI expert.


> +config PCIE_ROCKCHIP
> +   bool "Rockchip PCIe controller"
> +   depends on ARM64 && ARCH_ROCKCHIP
> +   depends on OF
> +   select MFD_SYSCON
> +   select PCI_MSI_IRQ_DOMAIN if PCI_MSI

Probably because I don't know what I'm doing, but when I had PCI_MSI
configured I had trouble getting interrupts.  Figured I'd mention it
even though it's probably user error.

> +/**
> + * rockchip_pcie_parse_dt - Parse Device tree
> + * @port: PCIe port information
> + *
> + * Return: '0' on success and error value on failure
> + */
> +static int rockchip_pcie_parse_dt(struct rockchip_pcie_port *port)
> +{
> +   struct device *dev = port->dev;
> +   struct platform_device *pdev = to_platform_device(dev);
> +   struct device_node *node = dev->of_node;
> +   struct resource *regs;
> +   int irq;
> +   int err;
> +
> +   regs = platform_get_resource_byname(pdev,
> +   IORESOURCE_MEM,
> +   "axi-base");
> +   if (!regs) {
> +   dev_err(dev, "missing axi-base property\n");
> +   return err;

Won't "err" be uninitialized?

> +   }
> +
> +   port->reg_base = devm_ioremap_resource(dev, regs);
> +   if (IS_ERR(port->reg_base))
> +   return PTR_ERR(port->reg_base);
> +
> +   regs = platform_get_resource_byname(pdev,
> +   IORESOURCE_MEM,
> +   "apb-base");
> +   if (!regs) {
> +   dev_err(dev, "missing apb-base property\n");
> +   return err;

Here too.

> +   }
> +
> +   port->apb_base = devm_ioremap_resource(dev, regs);
> +   if (IS_ERR(port->apb_base))
> +   return PTR_ERR(port->apb_base);
> +
> +   port->phy = devm_phy_get(dev, "pcie-phy");
> +   if (IS_ERR_OR_NULL(port->phy)) {
> +   if (PTR_ERR_OR_ZERO(port->phy) != -EPROBE_DEFER)
> +   dev_err(dev, "Missing pcie-phy\n");
> +   return PTR_ERR(port->phy);
> +   }
> +
> +   port->lanes = 1;
> +   err = of_property_read_u32(node, "num-lanes", >lanes);
> +   if (!err && ((port->lanes == 0) ||
> +(port->lanes == 3) ||
> +(port->lanes > 4))) {
> +   dev_warn(dev, "invalid num-lanes, default use one lane\n");
> +   port->lanes = 1;
> +   }
> +
> +   port->core_rst = devm_reset_control_get(dev, "core");
> +   if (IS_ERR(port->core_rst)) {
> +   if (PTR_ERR(port->core_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing core rst property in node %s\n",
> +   node->name);
> +   return PTR_ERR(port->core_rst);
> +   }
> +
> +   port->mgmt_rst = devm_reset_control_get(dev, "mgmt");
> +   if (IS_ERR(port->mgmt_rst)) {
> +   if (PTR_ERR(port->mgmt_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing mgmt rst property in node %s\n",
> +   node->name);
> +   return PTR_ERR(port->mgmt_rst);
> +   }
> +
> +   port->mgmt_sticky_rst = devm_reset_control_get(dev, "mgmt-sticky");
> +   if (IS_ERR(port->mgmt_sticky_rst)) {
> +   if (PTR_ERR(port->mgmt_sticky_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing mgmt-sticky rst property in 
> node %s\n",
> +   node->name);
> +   return PTR_ERR(port->mgmt_sticky_rst);
> +   }
> +
> +   port->pipe_rst = devm_reset_control_get(dev, "pipe");
> +   if (IS_ERR(port->pipe_rst)) {
> +   if (PTR_ERR(port->pipe_rst) != -EPROBE_DEFER)
> +   dev_err(dev, "missing pipe rst property in node %s\n",
> +   node->name);
> +   return PTR_ERR(port->pipe_rst);
> +   }
> +
> +   port->ep_gpio = 

[PATCH trivial] include/linux/memory_hotplug.h: Clean up code

[chengang]

From: Chen Gang 

Use one line instead of two lines for pgdat_resize_init, since one line
is still within 80 columns.

Let the second line function parameter almost align with the first line
parameter.

Use pr_warn instead of printk, so also let the line within 80 columns.

Signed-off-by: Chen Gang 
---
 include/linux/memory_hotplug.h | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 01033fa..714f3ea 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -48,8 +48,7 @@ void pgdat_resize_unlock(struct pglist_data *pgdat, unsigned 
long *flags)
 {
spin_unlock_irqrestore(>node_size_lock, *flags);
 }
-static inline
-void pgdat_resize_init(struct pglist_data *pgdat)
+static inline void pgdat_resize_init(struct pglist_data *pgdat)
 {
spin_lock_init(>node_size_lock);
 }
@@ -105,12 +104,12 @@ extern bool memhp_auto_online;
 extern bool is_pageblock_removable_nolock(struct page *page);
 extern int arch_remove_memory(u64 start, u64 size);
 extern int __remove_pages(struct zone *zone, unsigned long start_pfn,
-   unsigned long nr_pages);
+   unsigned long nr_pages);
 #endif /* CONFIG_MEMORY_HOTREMOVE */
 
 /* reasonably generic interface to expand the physical pages in a zone  */
 extern int __add_pages(int nid, struct zone *zone, unsigned long start_pfn,
-   unsigned long nr_pages);
+   unsigned long nr_pages);
 
 #ifdef CONFIG_NUMA
 extern int memory_add_physaddr_to_nid(u64 start);
@@ -223,7 +222,7 @@ static inline void zone_seqlock_init(struct zone *zone) {}
 
 static inline int mhp_notimplemented(const char *func)
 {
-   printk(KERN_WARNING "%s() called, with CONFIG_MEMORY_HOTPLUG 
disabled\n", func);
+   pr_warn("%s() called, with CONFIG_MEMORY_HOTPLUG disabled\n", func);
dump_stack();
return -ENOSYS;
 }
@@ -270,18 +269,18 @@ static inline void remove_memory(int nid, u64 start, u64 
size) {}
 #endif /* CONFIG_MEMORY_HOTREMOVE */
 
 extern int walk_memory_range(unsigned long start_pfn, unsigned long end_pfn,
-   void *arg, int (*func)(struct memory_block *, void *));
+   void *arg, int (*func)(struct memory_block *, void *));
 extern int add_memory(int nid, u64 start, u64 size);
 extern int add_memory_resource(int nid, struct resource *resource, bool 
online);
 extern int zone_for_memory(int nid, u64 start, u64 size, int zone_default,
-   bool for_device);
+   bool for_device);
 extern int arch_add_memory(int nid, u64 start, u64 size, bool for_device);
 extern int offline_pages(unsigned long start_pfn, unsigned long nr_pages);
 extern bool is_memblock_offlined(struct memory_block *mem);
 extern void remove_memory(int nid, u64 start, u64 size);
 extern int sparse_add_one_section(struct zone *zone, unsigned long start_pfn);
 extern void sparse_remove_one_section(struct zone *zone, struct mem_section 
*ms,
-   unsigned long map_offset);
+   unsigned long map_offset);
 extern struct page *sparse_decode_mem_map(unsigned long coded_mem_map,
  unsigned long pnum);
 extern int zone_can_shift(unsigned long pfn, unsigned long nr_pages,
-- 
1.9.3

[PATCH trivial] include/linux/memory_hotplug.h: Clean up code

[chengang]

From: Chen Gang 

Use one line instead of two lines for pgdat_resize_init, since one line
is still within 80 columns.

Let the second line function parameter almost align with the first line
parameter.

Use pr_warn instead of printk, so also let the line within 80 columns.

Signed-off-by: Chen Gang 
---
 include/linux/memory_hotplug.h | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 01033fa..714f3ea 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -48,8 +48,7 @@ void pgdat_resize_unlock(struct pglist_data *pgdat, unsigned 
long *flags)
 {
spin_unlock_irqrestore(>node_size_lock, *flags);
 }
-static inline
-void pgdat_resize_init(struct pglist_data *pgdat)
+static inline void pgdat_resize_init(struct pglist_data *pgdat)
 {
spin_lock_init(>node_size_lock);
 }
@@ -105,12 +104,12 @@ extern bool memhp_auto_online;
 extern bool is_pageblock_removable_nolock(struct page *page);
 extern int arch_remove_memory(u64 start, u64 size);
 extern int __remove_pages(struct zone *zone, unsigned long start_pfn,
-   unsigned long nr_pages);
+   unsigned long nr_pages);
 #endif /* CONFIG_MEMORY_HOTREMOVE */
 
 /* reasonably generic interface to expand the physical pages in a zone  */
 extern int __add_pages(int nid, struct zone *zone, unsigned long start_pfn,
-   unsigned long nr_pages);
+   unsigned long nr_pages);
 
 #ifdef CONFIG_NUMA
 extern int memory_add_physaddr_to_nid(u64 start);
@@ -223,7 +222,7 @@ static inline void zone_seqlock_init(struct zone *zone) {}
 
 static inline int mhp_notimplemented(const char *func)
 {
-   printk(KERN_WARNING "%s() called, with CONFIG_MEMORY_HOTPLUG 
disabled\n", func);
+   pr_warn("%s() called, with CONFIG_MEMORY_HOTPLUG disabled\n", func);
dump_stack();
return -ENOSYS;
 }
@@ -270,18 +269,18 @@ static inline void remove_memory(int nid, u64 start, u64 
size) {}
 #endif /* CONFIG_MEMORY_HOTREMOVE */
 
 extern int walk_memory_range(unsigned long start_pfn, unsigned long end_pfn,
-   void *arg, int (*func)(struct memory_block *, void *));
+   void *arg, int (*func)(struct memory_block *, void *));
 extern int add_memory(int nid, u64 start, u64 size);
 extern int add_memory_resource(int nid, struct resource *resource, bool 
online);
 extern int zone_for_memory(int nid, u64 start, u64 size, int zone_default,
-   bool for_device);
+   bool for_device);
 extern int arch_add_memory(int nid, u64 start, u64 size, bool for_device);
 extern int offline_pages(unsigned long start_pfn, unsigned long nr_pages);
 extern bool is_memblock_offlined(struct memory_block *mem);
 extern void remove_memory(int nid, u64 start, u64 size);
 extern int sparse_add_one_section(struct zone *zone, unsigned long start_pfn);
 extern void sparse_remove_one_section(struct zone *zone, struct mem_section 
*ms,
-   unsigned long map_offset);
+   unsigned long map_offset);
 extern struct page *sparse_decode_mem_map(unsigned long coded_mem_map,
  unsigned long pnum);
 extern int zone_can_shift(unsigned long pfn, unsigned long nr_pages,
-- 
1.9.3

[PATCH v4] powerpc: spinlock: Fix spin_unlock_wait()

[Boqun Feng]

There is an ordering issue with spin_unlock_wait() on powerpc, because
the spin_lock primitive is an ACQUIRE and an ACQUIRE is only ordering
the load part of the operation with memory operations following it.
Therefore the following event sequence can happen:

CPU 1   CPU 2   CPU 3

==  ==
spin_unlock();
spin_lock():
  r1 = *lock; // r1 == 0;
o = object; o = READ_ONCE(object); // reordered here
object = NULL;
smp_mb();
spin_unlock_wait();
  *lock = 1;
smp_mb();
o->dead = true; < o = READ_ONCE(object); > // reordered upwards
if (o) // true
BUG_ON(o->dead); // true!!

To fix this, we add a "nop" ll/sc loop in arch_spin_unlock_wait() on
ppc, the "nop" ll/sc loop reads the lock
value and writes it back atomically, in this way it will synchronize the
view of the lock on CPU1 with that on CPU2. Therefore in the scenario
above, either CPU2 will fail to get the lock at first or CPU1 will see
the lock acquired by CPU2, both cases will eliminate this bug. This is a
similar idea as what Will Deacon did for ARM64 in:

  d86b8da04dfa ("arm64: spinlock: serialise spin_unlock_wait against concurrent 
lockers")

Furthermore, if the "nop" ll/sc figures out the lock is locked, we
actually don't need to do the "nop" ll/sc trick again, we can just do a
normal load+check loop for the lock to be released, because in that
case, spin_unlock_wait() is called when someone is holding the lock, and
the store part of the "nop" ll/sc happens before the lock release of the
current lock holder:

"nop" ll/sc -> spin_unlock()

and the lock release happens before the next lock acquisition:

spin_unlock() -> spin_lock() 

which means the "nop" ll/sc happens before the next lock acquisition:

"nop" ll/sc -> spin_unlock() -> spin_lock() 

With a smp_mb() preceding spin_unlock_wait(), the store of object is
guaranteed to be observed by the next lock holder:

STORE -> smp_mb() -> "nop" ll/sc
-> spin_unlock() -> spin_lock() 

This patch therefore fixes the issue and also cleans the
arch_spin_unlock_wait() a little bit by removing superfluous memory
barriers in loops and consolidating the implementations for PPC32 and
PPC64 into one.

Suggested-by: "Paul E. McKenney" 
Signed-off-by: Boqun Feng 
Reviewed-by: "Paul E. McKenney" 
[mpe: Inline the "nop" ll/sc loop and set EH=0, munge change log]
Signed-off-by: Michael Ellerman 
---
v4 (boqun):
 - replace !arch_spin_value_unlocked() with lock->slock in the loop condition
   to avoid a bug caused by compiler optimization.

v3 (mpe):
 - Inline the ll/sc loop.
 - Change the EH on the LWARX to 0
 - Rewrite change log to cope with the fact we removed 
arch_spin_is_locked_sync()

v1-->v2:

 - Improve the commit log, suggested by Peter Zijlstra
 - Keep two smp_mb()s for the safety, which though could be deleted
   if all the users have been aduited and fixed later.

 arch/powerpc/include/asm/spinlock.h | 38 +++--
 arch/powerpc/lib/locks.c| 16 
 2 files changed, 32 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/include/asm/spinlock.h 
b/arch/powerpc/include/asm/spinlock.h
index 523673d7583c..fa37fe93bc02 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -162,12 +162,38 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
lock->slock = 0;
 }
 
-#ifdef CONFIG_PPC64
-extern void arch_spin_unlock_wait(arch_spinlock_t *lock);
-#else
-#define arch_spin_unlock_wait(lock) \
-   do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
-#endif
+static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
+{
+   arch_spinlock_t lock_val;
+
+   smp_mb();
+
+   /*
+* Atomically load and store back the lock value (unchanged). This
+* ensures that our observation of the lock value is ordered with
+* respect to other lock operations.
+*/
+   __asm__ __volatile__(
+"1:" PPC_LWARX(%0, 0, %2, 0) "\n"
+"  stwcx. %0, 0, %2\n"
+"  bne- 1b\n"
+   : "=" (lock_val), "+m" (*lock)
+   : "r" (lock)
+   : "cr0", "xer");
+
+   if (arch_spin_value_unlocked(lock_val))
+   goto out;
+
+   while (lock->slock) {
+   HMT_low();
+   if (SHARED_PROCESSOR)
+   __spin_yield(lock);
+   }
+   HMT_medium();
+
+out:
+   smp_mb();
+}
 
 /*
  * Read-write spinlocks, allowing multiple readers
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index f7deebdf3365..b7b1237d4aa6 100644
--- a/arch/powerpc/lib/locks.c
+++ 

[PATCH v4] powerpc: spinlock: Fix spin_unlock_wait()

[Boqun Feng]

There is an ordering issue with spin_unlock_wait() on powerpc, because
the spin_lock primitive is an ACQUIRE and an ACQUIRE is only ordering
the load part of the operation with memory operations following it.
Therefore the following event sequence can happen:

CPU 1   CPU 2   CPU 3

==  ==
spin_unlock();
spin_lock():
  r1 = *lock; // r1 == 0;
o = object; o = READ_ONCE(object); // reordered here
object = NULL;
smp_mb();
spin_unlock_wait();
  *lock = 1;
smp_mb();
o->dead = true; < o = READ_ONCE(object); > // reordered upwards
if (o) // true
BUG_ON(o->dead); // true!!

To fix this, we add a "nop" ll/sc loop in arch_spin_unlock_wait() on
ppc, the "nop" ll/sc loop reads the lock
value and writes it back atomically, in this way it will synchronize the
view of the lock on CPU1 with that on CPU2. Therefore in the scenario
above, either CPU2 will fail to get the lock at first or CPU1 will see
the lock acquired by CPU2, both cases will eliminate this bug. This is a
similar idea as what Will Deacon did for ARM64 in:

  d86b8da04dfa ("arm64: spinlock: serialise spin_unlock_wait against concurrent 
lockers")

Furthermore, if the "nop" ll/sc figures out the lock is locked, we
actually don't need to do the "nop" ll/sc trick again, we can just do a
normal load+check loop for the lock to be released, because in that
case, spin_unlock_wait() is called when someone is holding the lock, and
the store part of the "nop" ll/sc happens before the lock release of the
current lock holder:

"nop" ll/sc -> spin_unlock()

and the lock release happens before the next lock acquisition:

spin_unlock() -> spin_lock() 

which means the "nop" ll/sc happens before the next lock acquisition:

"nop" ll/sc -> spin_unlock() -> spin_lock() 

With a smp_mb() preceding spin_unlock_wait(), the store of object is
guaranteed to be observed by the next lock holder:

STORE -> smp_mb() -> "nop" ll/sc
-> spin_unlock() -> spin_lock() 

This patch therefore fixes the issue and also cleans the
arch_spin_unlock_wait() a little bit by removing superfluous memory
barriers in loops and consolidating the implementations for PPC32 and
PPC64 into one.

Suggested-by: "Paul E. McKenney" 
Signed-off-by: Boqun Feng 
Reviewed-by: "Paul E. McKenney" 
[mpe: Inline the "nop" ll/sc loop and set EH=0, munge change log]
Signed-off-by: Michael Ellerman 
---
v4 (boqun):
 - replace !arch_spin_value_unlocked() with lock->slock in the loop condition
   to avoid a bug caused by compiler optimization.

v3 (mpe):
 - Inline the ll/sc loop.
 - Change the EH on the LWARX to 0
 - Rewrite change log to cope with the fact we removed 
arch_spin_is_locked_sync()

v1-->v2:

 - Improve the commit log, suggested by Peter Zijlstra
 - Keep two smp_mb()s for the safety, which though could be deleted
   if all the users have been aduited and fixed later.

 arch/powerpc/include/asm/spinlock.h | 38 +++--
 arch/powerpc/lib/locks.c| 16 
 2 files changed, 32 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/include/asm/spinlock.h 
b/arch/powerpc/include/asm/spinlock.h
index 523673d7583c..fa37fe93bc02 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -162,12 +162,38 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
lock->slock = 0;
 }
 
-#ifdef CONFIG_PPC64
-extern void arch_spin_unlock_wait(arch_spinlock_t *lock);
-#else
-#define arch_spin_unlock_wait(lock) \
-   do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
-#endif
+static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
+{
+   arch_spinlock_t lock_val;
+
+   smp_mb();
+
+   /*
+* Atomically load and store back the lock value (unchanged). This
+* ensures that our observation of the lock value is ordered with
+* respect to other lock operations.
+*/
+   __asm__ __volatile__(
+"1:" PPC_LWARX(%0, 0, %2, 0) "\n"
+"  stwcx. %0, 0, %2\n"
+"  bne- 1b\n"
+   : "=" (lock_val), "+m" (*lock)
+   : "r" (lock)
+   : "cr0", "xer");
+
+   if (arch_spin_value_unlocked(lock_val))
+   goto out;
+
+   while (lock->slock) {
+   HMT_low();
+   if (SHARED_PROCESSOR)
+   __spin_yield(lock);
+   }
+   HMT_medium();
+
+out:
+   smp_mb();
+}
 
 /*
  * Read-write spinlocks, allowing multiple readers
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index f7deebdf3365..b7b1237d4aa6 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -68,19 +68,3 @@ void __rw_yield(arch_rwlock_t *rw)

Re: [PATCH] block: bio: kill BIO_MAX_SIZE

[Jens Axboe]

On 06/09/2016 09:27 PM, Ming Lei wrote:

No one need this macro now, so remove it. Basically
only how many bvecs in one bio matters instead
of how many bytes in this bio.

The motivation is for supporting multipage bvecs, in
which we only know what the max count of bvecs is supported
in the bio.


Applied, thanks.

--
Jens Axboe

Re: [PATCH] block: bio: kill BIO_MAX_SIZE

[Jens Axboe]

On 06/09/2016 09:27 PM, Ming Lei wrote:

No one need this macro now, so remove it. Basically
only how many bvecs in one bio matters instead
of how many bytes in this bio.

The motivation is for supporting multipage bvecs, in
which we only know what the max count of bvecs is supported
in the bio.


Applied, thanks.

--
Jens Axboe

[PATCH] block: bio: kill BIO_MAX_SIZE

[Ming Lei]

No one need this macro now, so remove it. Basically
only how many bvecs in one bio matters instead
of how many bytes in this bio.

The motivation is for supporting multipage bvecs, in
which we only know what the max count of bvecs is supported
in the bio.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ming Lei 
---
 include/linux/bio.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/linux/bio.h b/include/linux/bio.h
index b64a3d9..b7e1a008 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -41,7 +41,6 @@
 #endif
 
 #define BIO_MAX_PAGES  256
-#define BIO_MAX_SIZE   (BIO_MAX_PAGES << PAGE_SHIFT)
 
 #define bio_prio(bio)  (bio)->bi_ioprio
 #define bio_set_prio(bio, prio)((bio)->bi_ioprio = prio)
-- 
1.9.1

[PATCH] block: bio: kill BIO_MAX_SIZE

[Ming Lei]

No one need this macro now, so remove it. Basically
only how many bvecs in one bio matters instead
of how many bytes in this bio.

The motivation is for supporting multipage bvecs, in
which we only know what the max count of bvecs is supported
in the bio.

Reviewed-by: Christoph Hellwig 
Signed-off-by: Ming Lei 
---
 include/linux/bio.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/linux/bio.h b/include/linux/bio.h
index b64a3d9..b7e1a008 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -41,7 +41,6 @@
 #endif
 
 #define BIO_MAX_PAGES  256
-#define BIO_MAX_SIZE   (BIO_MAX_PAGES << PAGE_SHIFT)
 
 #define bio_prio(bio)  (bio)->bi_ioprio
 #define bio_set_prio(bio, prio)((bio)->bi_ioprio = prio)
-- 
1.9.1

Re: of: fix autoloading due to broken modalias with no 'compatible'

[Michael Ellerman]

On Mon, 2016-06-06 at 16:48:38 UTC, Wolfram Sang wrote:
> Because of an improper dereference, a stray 'C' character was output to
> the modalias when no 'compatible' was specified. This is the case for
> some old PowerMac drivers which only set the 'name' property. Fix it to
> let them match again.
> 
> Reported-by: Mathieu Malaterre 
> Signed-off-by: Wolfram Sang 
> Tested-by: Mathieu Malaterre 
> Cc: Philipp Zabel 
> Cc: Andreas Schwab 
> Fixes: 6543becf26fff6 ("mod/file2alias: make modalias generation safe for 
> cross compiling")

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/b3c0a4dab7e35a9b6d69c04156

cheers

Re: of: fix autoloading due to broken modalias with no 'compatible'

[Michael Ellerman]

On Mon, 2016-06-06 at 16:48:38 UTC, Wolfram Sang wrote:
> Because of an improper dereference, a stray 'C' character was output to
> the modalias when no 'compatible' was specified. This is the case for
> some old PowerMac drivers which only set the 'name' property. Fix it to
> let them match again.
> 
> Reported-by: Mathieu Malaterre 
> Signed-off-by: Wolfram Sang 
> Tested-by: Mathieu Malaterre 
> Cc: Philipp Zabel 
> Cc: Andreas Schwab 
> Fixes: 6543becf26fff6 ("mod/file2alias: make modalias generation safe for 
> cross compiling")

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/b3c0a4dab7e35a9b6d69c04156

cheers

Re: [PATCH v3] powerpc: spinlock: Fix spin_unlock_wait()

[Boqun Feng]

On Fri, Jun 10, 2016 at 01:25:03AM +0800, Boqun Feng wrote:
> On Thu, Jun 09, 2016 at 10:23:28PM +1000, Michael Ellerman wrote:
> > On Wed, 2016-06-08 at 15:59 +0200, Peter Zijlstra wrote:
> > > On Wed, Jun 08, 2016 at 11:49:20PM +1000, Michael Ellerman wrote:
> > >
> > > > > Ok; what tree does this go in? I have this dependent series which I'd
> > > > > like to get sorted and merged somewhere.
> > > > 
> > > > Ah sorry, I didn't realise. I was going to put it in my next (which 
> > > > doesn't
> > > > exist yet but hopefully will early next week).
> > > > 
> > > > I'll make a topic branch with just that commit based on rc2 or rc3?
> > > 
> > > Works for me; thanks!
> >  
> > Unfortunately the patch isn't 100%.
> > 
> > It's causing some of my machines to lock up hard, which isn't surprising 
> > when
> > you look at the generated code for the non-atomic spin loop:
> > 
> >   c009af48: 7c 21 0b 78 mr  r1,r1   
> > # HMT_LOW
> >   c009af4c: 40 9e ff fc bne cr7,c009af48 
> > <.do_exit+0x6d8>
> > 
> 
> There is even no code checking for SHARED_PROCESSOR here, so I assume
> your config is !PPC_SPLPAR.
> 
> > Which is a spin loop waiting for a result in cr7, but with no comparison.
> > 
> > The problem seems to be that we did:
> > 
> > @@ -184,7 +184,7 @@ static inline void 
> > arch_spin_unlock_wait(arch_spinlock_t *lock)
> > if (arch_spin_value_unlocked(lock_val))
> > goto out;
> >  
> > -   while (lock->slock) {
> > +   while (!arch_spin_value_unlocked(*lock)) {
> > HMT_low();
> > if (SHARED_PROCESSOR)
> > __spin_yield(lock);
> > 
> 
> And as I also did an consolidation in this patch, we now share the same
> piece of arch_spin_unlock_wait(), so if !PPC_SPLPAR, the previous loop
> became:
> 
>   while (!arch_spin_value_unlocked(*lock)) {
>   HMT_low();
>   }
> 
> and given HMT_low() is not a compiler barrier. So the compiler may
> optimize out the loop..
> 
> > Which seems to be hiding the fact that lock->slock is volatile from the
> > compiler, even though arch_spin_value_unlocked() is inline. Not sure if 
> > that's
> > our bug or gcc's.
> > 
> 
> I think arch_spin_value_unlocked() is not volatile because
> arch_spin_value_unlocked() takes the value of the lock rather than the
> address of the lock as its parameter, which makes it a pure function.
> 
> To fix this we can add READ_ONCE() for the read of lock value like the
> following:
> 
>   while(!arch_spin_value_unlock(READ_ONCE(*lock))) {
>   HMT_low();
>   ...
> 
> Or you prefer to simply using lock->slock which is a volatile variable
> already?
> 
> Or maybe we can refactor the code a little like this:
> 
> static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
> {
>arch_spinlock_t lock_val;
> 
>smp_mb();
> 
>/*
> * Atomically load and store back the lock value (unchanged).  This
> * ensures that our observation of the lock value is ordered with
> * respect to other lock operations.
> */
>__asm__ __volatile__(
> "1:" PPC_LWARX(%0, 0, %2, 0) "\n"
> "  stwcx. %0, 0, %2\n"
> "  bne- 1b\n"
>: "=" (lock_val), "+m" (*lock)
>: "r" (lock)
>: "cr0", "xer");
> 
>while (!arch_spin_value_unlocked(lock_val)) {
>HMT_low();
>if (SHARED_PROCESSOR)
>__spin_yield(lock);
> 
>lock_val = READ_ONCE(*lock);
>}
>HMT_medium();
> 
>smp_mb();
> }
> 

This version will generate the correct code for the loop if !PPC_SPLPAR:

c009fa70:   78 0b 21 7c mr  r1,r1
c009fa74:   ec 06 37 81 lwz r9,1772(r23)
c009fa78:   00 00 a9 2f cmpdi   cr7,r9,0
c009fa7c:   f4 ff 9e 40 bne cr7,c009fa70 

c009fa80:   78 13 42 7c mr  r2,r2

The reason I used arch_spin_value_unlocked() was trying to be consistent
with arch_spin_is_locked(), but most of our all lock primitives use
->slock directly. So I don't see a strong reason for us to use
arch_spin_value_unlocked() here. That said, this version does save a few
lines of code and make the logic a little more clear, I think.

Thoughts?

Regards,
Boqun


signature.asc
Description: PGP signature

Re: [PATCH v3] powerpc: spinlock: Fix spin_unlock_wait()

[Boqun Feng]

On Fri, Jun 10, 2016 at 01:25:03AM +0800, Boqun Feng wrote:
> On Thu, Jun 09, 2016 at 10:23:28PM +1000, Michael Ellerman wrote:
> > On Wed, 2016-06-08 at 15:59 +0200, Peter Zijlstra wrote:
> > > On Wed, Jun 08, 2016 at 11:49:20PM +1000, Michael Ellerman wrote:
> > >
> > > > > Ok; what tree does this go in? I have this dependent series which I'd
> > > > > like to get sorted and merged somewhere.
> > > > 
> > > > Ah sorry, I didn't realise. I was going to put it in my next (which 
> > > > doesn't
> > > > exist yet but hopefully will early next week).
> > > > 
> > > > I'll make a topic branch with just that commit based on rc2 or rc3?
> > > 
> > > Works for me; thanks!
> >  
> > Unfortunately the patch isn't 100%.
> > 
> > It's causing some of my machines to lock up hard, which isn't surprising 
> > when
> > you look at the generated code for the non-atomic spin loop:
> > 
> >   c009af48: 7c 21 0b 78 mr  r1,r1   
> > # HMT_LOW
> >   c009af4c: 40 9e ff fc bne cr7,c009af48 
> > <.do_exit+0x6d8>
> > 
> 
> There is even no code checking for SHARED_PROCESSOR here, so I assume
> your config is !PPC_SPLPAR.
> 
> > Which is a spin loop waiting for a result in cr7, but with no comparison.
> > 
> > The problem seems to be that we did:
> > 
> > @@ -184,7 +184,7 @@ static inline void 
> > arch_spin_unlock_wait(arch_spinlock_t *lock)
> > if (arch_spin_value_unlocked(lock_val))
> > goto out;
> >  
> > -   while (lock->slock) {
> > +   while (!arch_spin_value_unlocked(*lock)) {
> > HMT_low();
> > if (SHARED_PROCESSOR)
> > __spin_yield(lock);
> > 
> 
> And as I also did an consolidation in this patch, we now share the same
> piece of arch_spin_unlock_wait(), so if !PPC_SPLPAR, the previous loop
> became:
> 
>   while (!arch_spin_value_unlocked(*lock)) {
>   HMT_low();
>   }
> 
> and given HMT_low() is not a compiler barrier. So the compiler may
> optimize out the loop..
> 
> > Which seems to be hiding the fact that lock->slock is volatile from the
> > compiler, even though arch_spin_value_unlocked() is inline. Not sure if 
> > that's
> > our bug or gcc's.
> > 
> 
> I think arch_spin_value_unlocked() is not volatile because
> arch_spin_value_unlocked() takes the value of the lock rather than the
> address of the lock as its parameter, which makes it a pure function.
> 
> To fix this we can add READ_ONCE() for the read of lock value like the
> following:
> 
>   while(!arch_spin_value_unlock(READ_ONCE(*lock))) {
>   HMT_low();
>   ...
> 
> Or you prefer to simply using lock->slock which is a volatile variable
> already?
> 
> Or maybe we can refactor the code a little like this:
> 
> static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
> {
>arch_spinlock_t lock_val;
> 
>smp_mb();
> 
>/*
> * Atomically load and store back the lock value (unchanged).  This
> * ensures that our observation of the lock value is ordered with
> * respect to other lock operations.
> */
>__asm__ __volatile__(
> "1:" PPC_LWARX(%0, 0, %2, 0) "\n"
> "  stwcx. %0, 0, %2\n"
> "  bne- 1b\n"
>: "=" (lock_val), "+m" (*lock)
>: "r" (lock)
>: "cr0", "xer");
> 
>while (!arch_spin_value_unlocked(lock_val)) {
>HMT_low();
>if (SHARED_PROCESSOR)
>__spin_yield(lock);
> 
>lock_val = READ_ONCE(*lock);
>}
>HMT_medium();
> 
>smp_mb();
> }
> 

This version will generate the correct code for the loop if !PPC_SPLPAR:

c009fa70:   78 0b 21 7c mr  r1,r1
c009fa74:   ec 06 37 81 lwz r9,1772(r23)
c009fa78:   00 00 a9 2f cmpdi   cr7,r9,0
c009fa7c:   f4 ff 9e 40 bne cr7,c009fa70 

c009fa80:   78 13 42 7c mr  r2,r2

The reason I used arch_spin_value_unlocked() was trying to be consistent
with arch_spin_is_locked(), but most of our all lock primitives use
->slock directly. So I don't see a strong reason for us to use
arch_spin_value_unlocked() here. That said, this version does save a few
lines of code and make the logic a little more clear, I think.

Thoughts?

Regards,
Boqun


signature.asc
Description: PGP signature

Re: [PATCH] cpufreq: governor: Drop gov_cancel_work()

[Viresh Kumar]

On 09-06-16, 14:21, Rafael J. Wysocki wrote:
> On Thu, Jun 9, 2016 at 5:21 AM, Viresh Kumar  wrote:
> > On 09-06-16, 01:45, Rafael J. Wysocki wrote:
> >> From: Rafael J. Wysocki 
> >>
> >> There's no reason for gov_cancel_work() to exist at all, as it only
> >> has one caller and the only thing done by that caller is to invoke
> >> gov_cancel_work().
> >>
> >> Accordingly, drop gov_cancel_work() and move its contents to the
> >> caller.
> >>
> >> Signed-off-by: Rafael J. Wysocki 
> >> ---
> >>  drivers/cpufreq/cpufreq_governor.c |   19 +++
> >>  1 file changed, 7 insertions(+), 12 deletions(-)
> >
> > Acked-by: Viresh Kumar 
> 
> Thanks!
> 
> > I am wondering what happened to your other patches around the governor 
> > callbacks
> > and why weren't they applied yet :)
> 
> They are in linux-next now, aren't they?

Yeah, they are in now.

-- 
viresh

Re: [PATCH] cpufreq: governor: Drop gov_cancel_work()

[Viresh Kumar]

On 09-06-16, 14:21, Rafael J. Wysocki wrote:
> On Thu, Jun 9, 2016 at 5:21 AM, Viresh Kumar  wrote:
> > On 09-06-16, 01:45, Rafael J. Wysocki wrote:
> >> From: Rafael J. Wysocki 
> >>
> >> There's no reason for gov_cancel_work() to exist at all, as it only
> >> has one caller and the only thing done by that caller is to invoke
> >> gov_cancel_work().
> >>
> >> Accordingly, drop gov_cancel_work() and move its contents to the
> >> caller.
> >>
> >> Signed-off-by: Rafael J. Wysocki 
> >> ---
> >>  drivers/cpufreq/cpufreq_governor.c |   19 +++
> >>  1 file changed, 7 insertions(+), 12 deletions(-)
> >
> > Acked-by: Viresh Kumar 
> 
> Thanks!
> 
> > I am wondering what happened to your other patches around the governor 
> > callbacks
> > and why weren't they applied yet :)
> 
> They are in linux-next now, aren't they?

Yeah, they are in now.

-- 
viresh

Re: [PATCH V2] block: correctly fallback for zeroout

[Shaohua Li]

On Thu, Jun 09, 2016 at 10:04:08PM -0400, Martin K. Petersen wrote:
> > "Shaohua" == Shaohua Li  writes:
> 
> Shaohua,
> 
> diff --git a/block/blk-lib.c b/block/blk-lib.c
> index 23d7f30..a3a26c8 100644
> --- a/block/blk-lib.c
> +++ b/block/blk-lib.c
> @@ -84,6 +84,28 @@ int __blkdev_issue_discard(struct block_device *bdev, 
> sector_t sector,
>  }
>  EXPORT_SYMBOL(__blkdev_issue_discard);
>  
> +static int do_blkdev_issue_discard(struct block_device *bdev, sector_t 
> sector,
> + sector_t nr_sects, gfp_t gfp_mask, unsigned long flags,
> + int *io_err)
> +{
> + int type = REQ_WRITE | REQ_DISCARD;
> + struct bio *bio = NULL;
> + struct blk_plug plug;
> + int ret;
> +
> + if (flags & BLKDEV_DISCARD_SECURE)
> + type |= REQ_SECURE;
> +
> + blk_start_plug();
> + ret = __blkdev_issue_discard(bdev, sector, nr_sects, gfp_mask, type,
> + );
> + if (!ret && bio)
> + *io_err = submit_bio_wait(type, bio);
> + blk_finish_plug();
> +
> + return ret;
> +}
> +
> 
> What does the extra io_err buy us? Just have this function return an
> error. And then in blkdev_issue_discard if you get -EOPNOTSUPP you
> special case it there.

The __blkdev_issue_discard returns -EOPNOTSUPP if disk doesn't support discard.
in that case, blkdev_issue_discard doesn't return 0. blkdev_issue_discard only
returns 0 if IO error is -EOPNOTSUPP. Please see bbd848e0fade51ae51da.

Thanks,
Shaohua

Re: [PATCH V2] block: correctly fallback for zeroout

[Shaohua Li]

On Thu, Jun 09, 2016 at 10:04:08PM -0400, Martin K. Petersen wrote:
> > "Shaohua" == Shaohua Li  writes:
> 
> Shaohua,
> 
> diff --git a/block/blk-lib.c b/block/blk-lib.c
> index 23d7f30..a3a26c8 100644
> --- a/block/blk-lib.c
> +++ b/block/blk-lib.c
> @@ -84,6 +84,28 @@ int __blkdev_issue_discard(struct block_device *bdev, 
> sector_t sector,
>  }
>  EXPORT_SYMBOL(__blkdev_issue_discard);
>  
> +static int do_blkdev_issue_discard(struct block_device *bdev, sector_t 
> sector,
> + sector_t nr_sects, gfp_t gfp_mask, unsigned long flags,
> + int *io_err)
> +{
> + int type = REQ_WRITE | REQ_DISCARD;
> + struct bio *bio = NULL;
> + struct blk_plug plug;
> + int ret;
> +
> + if (flags & BLKDEV_DISCARD_SECURE)
> + type |= REQ_SECURE;
> +
> + blk_start_plug();
> + ret = __blkdev_issue_discard(bdev, sector, nr_sects, gfp_mask, type,
> + );
> + if (!ret && bio)
> + *io_err = submit_bio_wait(type, bio);
> + blk_finish_plug();
> +
> + return ret;
> +}
> +
> 
> What does the extra io_err buy us? Just have this function return an
> error. And then in blkdev_issue_discard if you get -EOPNOTSUPP you
> special case it there.

The __blkdev_issue_discard returns -EOPNOTSUPP if disk doesn't support discard.
in that case, blkdev_issue_discard doesn't return 0. blkdev_issue_discard only
returns 0 if IO error is -EOPNOTSUPP. Please see bbd848e0fade51ae51da.

Thanks,
Shaohua

Re: [PATCH v6 0/8] block: prepare for multipage bvecs

[Ming Lei]

On Fri, Jun 10, 2016 at 12:06 AM, Jens Axboe  wrote:
> On 05/30/2016 07:34 AM, Ming Lei wrote:
>>
>> Hi,
>>
>> Interests[1] have been shown in multipage bvecs, so this patchset
>> try to prepare for the support and do two things:
>>
>> 1) the 1st 4 patches use bvec iterator to implement iterate_bvec(),
>> then we can drop the non-standard way for iterating bvec, which
>> can be thought as a good cleanup for lib/iov_iter.c
>>
>> 2) remove BIO_MAX_SECTORS and makre BIO_MAX_SIZE as obsolete, and
>> now there is only one user for each. Once multipage bvecs is introduced,
>> one bio may hold lots of sectors, and we should always use sort of
>> BIO_MAX_VECS which should be introduced in future and is similiar
>> with current BIO_MAX_PAGES.
>>
>> The only functional change is iterate_bvec():lib/iov_iter.c
>>
>> xfstests(-a auto) over loop aio is run for ext4/xfs to verify
>> the change and no regression found with this patchset.
>
>
> Added patches 1-7, still waiting for an answer on my reply to #8.

Thanks for adding patches 1-7, and now I just found the added
BIO_MAX_SIZE usage in dm-crypt.c is droped from next, so it is
safe to kill it now.

I will send a new patch #8 against for-4.8/core.

Thanks,
Ming

>
> --
> Jens Axboe
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-block" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v6 0/8] block: prepare for multipage bvecs

[Ming Lei]

On Fri, Jun 10, 2016 at 12:06 AM, Jens Axboe  wrote:
> On 05/30/2016 07:34 AM, Ming Lei wrote:
>>
>> Hi,
>>
>> Interests[1] have been shown in multipage bvecs, so this patchset
>> try to prepare for the support and do two things:
>>
>> 1) the 1st 4 patches use bvec iterator to implement iterate_bvec(),
>> then we can drop the non-standard way for iterating bvec, which
>> can be thought as a good cleanup for lib/iov_iter.c
>>
>> 2) remove BIO_MAX_SECTORS and makre BIO_MAX_SIZE as obsolete, and
>> now there is only one user for each. Once multipage bvecs is introduced,
>> one bio may hold lots of sectors, and we should always use sort of
>> BIO_MAX_VECS which should be introduced in future and is similiar
>> with current BIO_MAX_PAGES.
>>
>> The only functional change is iterate_bvec():lib/iov_iter.c
>>
>> xfstests(-a auto) over loop aio is run for ext4/xfs to verify
>> the change and no regression found with this patchset.
>
>
> Added patches 1-7, still waiting for an answer on my reply to #8.

Thanks for adding patches 1-7, and now I just found the added
BIO_MAX_SIZE usage in dm-crypt.c is droped from next, so it is
safe to kill it now.

I will send a new patch #8 against for-4.8/core.

Thanks,
Ming

>
> --
> Jens Axboe
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-block" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/8] staging/lustre/llite: Fix Multiple Assignments

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/llite directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/llite_lib.c | 3 ++-
 drivers/staging/lustre/lustre/llite/namei.c | 3 ++-
 drivers/staging/lustre/lustre/llite/vvp_io.c| 3 ++-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/llite_lib.c 
b/drivers/staging/lustre/lustre/llite/llite_lib.c
index 96c7e9f..b260f60 100644
--- a/drivers/staging/lustre/lustre/llite/llite_lib.c
+++ b/drivers/staging/lustre/lustre/llite/llite_lib.c
@@ -864,7 +864,8 @@ int ll_fill_super(struct super_block *sb, struct vfsmount 
*mnt)
try_module_get(THIS_MODULE);
 
/* client additional sb info */
-   lsi->lsi_llsbi = sbi = ll_init_sbi(sb);
+   sbi = ll_init_sbi(sb);
+   lsi->lsi_llsbi = sbi;
if (!sbi) {
module_put(THIS_MODULE);
kfree(cfg);
diff --git a/drivers/staging/lustre/lustre/llite/namei.c 
b/drivers/staging/lustre/lustre/llite/namei.c
index 5eba0eb..95643bc 100644
--- a/drivers/staging/lustre/lustre/llite/namei.c
+++ b/drivers/staging/lustre/lustre/llite/namei.c
@@ -318,7 +318,8 @@ static struct dentry *ll_find_alias(struct inode *inode, 
struct dentry *dentry)
if (hlist_empty(>i_dentry))
return NULL;
 
-   discon_alias = invalid_alias = NULL;
+   discon_alias = NULL;
+   invalid_alias = NULL;
 
ll_lock_dcache(inode);
hlist_for_each_entry(alias, >i_dentry, d_u.d_alias) {
diff --git a/drivers/staging/lustre/lustre/llite/vvp_io.c 
b/drivers/staging/lustre/lustre/llite/vvp_io.c
index e26e0f8..763d336 100644
--- a/drivers/staging/lustre/lustre/llite/vvp_io.c
+++ b/drivers/staging/lustre/lustre/llite/vvp_io.c
@@ -954,7 +954,8 @@ static int vvp_io_write_start(const struct lu_env *env,
 * out-of-order writes.
 */
ll_merge_attr(env, inode);
-   pos = io->u.ci_wr.wr.crw_pos = i_size_read(inode);
+   pos = i_size_read(inode);
+   io->u.ci_wr.wr.crw_pos = pos;
vio->vui_iocb->ki_pos = pos;
} else {
LASSERT(vio->vui_iocb->ki_pos == pos);
-- 
2.7.4

[PATCH 4/8] staging/lustre/llite: Fix Multiple Assignments

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/llite directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/llite/llite_lib.c | 3 ++-
 drivers/staging/lustre/lustre/llite/namei.c | 3 ++-
 drivers/staging/lustre/lustre/llite/vvp_io.c| 3 ++-
 3 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/lustre/lustre/llite/llite_lib.c 
b/drivers/staging/lustre/lustre/llite/llite_lib.c
index 96c7e9f..b260f60 100644
--- a/drivers/staging/lustre/lustre/llite/llite_lib.c
+++ b/drivers/staging/lustre/lustre/llite/llite_lib.c
@@ -864,7 +864,8 @@ int ll_fill_super(struct super_block *sb, struct vfsmount 
*mnt)
try_module_get(THIS_MODULE);
 
/* client additional sb info */
-   lsi->lsi_llsbi = sbi = ll_init_sbi(sb);
+   sbi = ll_init_sbi(sb);
+   lsi->lsi_llsbi = sbi;
if (!sbi) {
module_put(THIS_MODULE);
kfree(cfg);
diff --git a/drivers/staging/lustre/lustre/llite/namei.c 
b/drivers/staging/lustre/lustre/llite/namei.c
index 5eba0eb..95643bc 100644
--- a/drivers/staging/lustre/lustre/llite/namei.c
+++ b/drivers/staging/lustre/lustre/llite/namei.c
@@ -318,7 +318,8 @@ static struct dentry *ll_find_alias(struct inode *inode, 
struct dentry *dentry)
if (hlist_empty(>i_dentry))
return NULL;
 
-   discon_alias = invalid_alias = NULL;
+   discon_alias = NULL;
+   invalid_alias = NULL;
 
ll_lock_dcache(inode);
hlist_for_each_entry(alias, >i_dentry, d_u.d_alias) {
diff --git a/drivers/staging/lustre/lustre/llite/vvp_io.c 
b/drivers/staging/lustre/lustre/llite/vvp_io.c
index e26e0f8..763d336 100644
--- a/drivers/staging/lustre/lustre/llite/vvp_io.c
+++ b/drivers/staging/lustre/lustre/llite/vvp_io.c
@@ -954,7 +954,8 @@ static int vvp_io_write_start(const struct lu_env *env,
 * out-of-order writes.
 */
ll_merge_attr(env, inode);
-   pos = io->u.ci_wr.wr.crw_pos = i_size_read(inode);
+   pos = i_size_read(inode);
+   io->u.ci_wr.wr.crw_pos = pos;
vio->vui_iocb->ki_pos = pos;
} else {
LASSERT(vio->vui_iocb->ki_pos == pos);
-- 
2.7.4

[PATCH 2/8] staging/lustre/fid: Fix Multiple Assignments

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/fid directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/fid/fid_request.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/lustre/lustre/fid/fid_request.c 
b/drivers/staging/lustre/lustre/fid/fid_request.c
index 3a4df62..9db21ba 100644
--- a/drivers/staging/lustre/lustre/fid/fid_request.c
+++ b/drivers/staging/lustre/lustre/fid/fid_request.c
@@ -98,8 +98,10 @@ static int seq_client_rpc(struct lu_client_seq *seq,
 * request here, otherwise if MDT0 is failed(umounted),
 * it can not release the export of MDT0
 */
-   if (seq->lcs_type == LUSTRE_SEQ_DATA)
-   req->rq_no_delay = req->rq_no_resend = 1;
+   if (seq->lcs_type == LUSTRE_SEQ_DATA) {
+   req->rq_no_delay = 1;
+   req->rq_no_resend = 1;
+   }
debug_mask = D_CONSOLE;
} else {
if (seq->lcs_type == LUSTRE_SEQ_METADATA) {
-- 
2.7.4

[PATCH 2/8] staging/lustre/fid: Fix Multiple Assignments

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/fid directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/fid/fid_request.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/lustre/lustre/fid/fid_request.c 
b/drivers/staging/lustre/lustre/fid/fid_request.c
index 3a4df62..9db21ba 100644
--- a/drivers/staging/lustre/lustre/fid/fid_request.c
+++ b/drivers/staging/lustre/lustre/fid/fid_request.c
@@ -98,8 +98,10 @@ static int seq_client_rpc(struct lu_client_seq *seq,
 * request here, otherwise if MDT0 is failed(umounted),
 * it can not release the export of MDT0
 */
-   if (seq->lcs_type == LUSTRE_SEQ_DATA)
-   req->rq_no_delay = req->rq_no_resend = 1;
+   if (seq->lcs_type == LUSTRE_SEQ_DATA) {
+   req->rq_no_delay = 1;
+   req->rq_no_resend = 1;
+   }
debug_mask = D_CONSOLE;
} else {
if (seq->lcs_type == LUSTRE_SEQ_METADATA) {
-- 
2.7.4

[PATCH 6/8] staging/lustre/obdclass: Fix Multiple Assignments

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/obdclass directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/obdclass/llog.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/lustre/lustre/obdclass/llog.c 
b/drivers/staging/lustre/lustre/obdclass/llog.c
index 79194d8..55a9755 100644
--- a/drivers/staging/lustre/lustre/obdclass/llog.c
+++ b/drivers/staging/lustre/lustre/obdclass/llog.c
@@ -123,8 +123,10 @@ static int llog_read_header(const struct lu_env *env,
handle->lgh_last_idx = 0; /* header is record with index 0 */
llh->llh_count = 1;  /* for the header record */
llh->llh_hdr.lrh_type = LLOG_HDR_MAGIC;
-   llh->llh_hdr.lrh_len = llh->llh_tail.lrt_len = LLOG_CHUNK_SIZE;
-   llh->llh_hdr.lrh_index = llh->llh_tail.lrt_index = 0;
+   llh->llh_hdr.lrh_len = LLOG_CHUNK_SIZE;
+   llh->llh_tail.lrt_len = LLOG_CHUNK_SIZE;
+   llh->llh_hdr.lrh_index = 0;
+   llh->llh_tail.lrt_index = 0;
llh->llh_timestamp = ktime_get_real_seconds();
if (uuid)
memcpy(>llh_tgtuuid, uuid,
-- 
2.7.4

[PATCH 1/8] staging/lustre/osc: Fix Multiple Assignment Warnings

[Oleg Drokin]

From: Nathaniel Clark 

Fix all multiple assignments on lustre/osc directory.

Signed-off-by: Nathaniel Clark 
Signed-off-by: Oleg Drokin 
---
 drivers/staging/lustre/lustre/osc/osc_cache.c   |  6 --
 drivers/staging/lustre/lustre/osc/osc_io.c  | 12 
 drivers/staging/lustre/lustre/osc/osc_lock.c|  3 ++-
 drivers/staging/lustre/lustre/osc/osc_request.c |  6 --
 4 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/drivers/staging/lustre/lustre/osc/osc_cache.c 
b/drivers/staging/lustre/lustre/osc/osc_cache.c
index 5a14bea..2ca5045 100644
--- a/drivers/staging/lustre/lustre/osc/osc_cache.c
+++ b/drivers/staging/lustre/lustre/osc/osc_cache.c
@@ -2773,7 +2773,8 @@ int osc_queue_sync_pages(const struct lu_env *env, struct 
osc_object *obj,
ext->oe_sync = 1;
ext->oe_urgent = 1;
ext->oe_start = start;
-   ext->oe_end = ext->oe_max_end = end;
+   ext->oe_end = end;
+   ext->oe_max_end = end;
ext->oe_obj = obj;
ext->oe_srvlock = !!(brw_flags & OBD_BRW_SRVLOCK);
ext->oe_nr_pages = page_count;
@@ -3308,7 +3309,8 @@ int osc_lock_discard_pages(const struct lu_env *env, 
struct osc_object *osc,
goto out;
 
cb = mode == CLM_READ ? check_and_discard_cb : discard_cb;
-   info->oti_fn_index = info->oti_next_index = start;
+   info->oti_fn_index = start;
+   info->oti_next_index = start;
do {
res = osc_page_gang_lookup(env, io, osc,
   info->oti_next_index, end, cb, osc);
diff --git a/drivers/staging/lustre/lustre/osc/osc_io.c 
b/drivers/staging/lustre/lustre/osc/osc_io.c
index d534b0e..d3bce45 100644
--- a/drivers/staging/lustre/lustre/osc/osc_io.c
+++ b/drivers/staging/lustre/lustre/osc/osc_io.c
@@ -221,7 +221,8 @@ static void osc_page_touch_at(const struct lu_env *env,
   kms > loi->loi_kms ? "" : "not ", loi->loi_kms, kms,
   loi->loi_lvb.lvb_size);
 
-   attr->cat_mtime = attr->cat_ctime = LTIME_S(CURRENT_TIME);
+   attr->cat_ctime = LTIME_S(CURRENT_TIME);
+   attr->cat_mtime = attr->cat_ctime;
valid = CAT_MTIME | CAT_CTIME;
if (kms > loi->loi_kms) {
attr->cat_kms = kms;
@@ -458,7 +459,8 @@ static int osc_io_setattr_start(const struct lu_env *env,
unsigned int cl_valid = 0;
 
if (ia_valid & ATTR_SIZE) {
-   attr->cat_size = attr->cat_kms = size;
+   attr->cat_size = size;
+   attr->cat_kms = size;
cl_valid = CAT_SIZE | CAT_KMS;
}
if (ia_valid & ATTR_MTIME_SET) {
@@ -526,7 +528,8 @@ static void osc_io_setattr_end(const struct lu_env *env,
 
if (cbargs->opc_rpc_sent) {
wait_for_completion(>opc_sync);
-   result = io->ci_result = cbargs->opc_rc;
+   result = cbargs->opc_rc;
+   io->ci_result = cbargs->opc_rc;
}
if (result == 0) {
if (oio->oi_lockless) {
@@ -575,7 +578,8 @@ static int osc_io_write_start(const struct lu_env *env,
 
OBD_FAIL_TIMEOUT(OBD_FAIL_OSC_DELAY_SETTIME, 1);
cl_object_attr_lock(obj);
-   attr->cat_mtime = attr->cat_ctime = ktime_get_real_seconds();
+   attr->cat_ctime = ktime_get_real_seconds();
+   attr->cat_mtime = attr->cat_ctime;
rc = cl_object_attr_set(env, obj, attr, CAT_MTIME | CAT_CTIME);
cl_object_attr_unlock(obj);
 
diff --git a/drivers/staging/lustre/lustre/osc/osc_lock.c 
b/drivers/staging/lustre/lustre/osc/osc_lock.c
index 16f9cd9..d30ed2f 100644
--- a/drivers/staging/lustre/lustre/osc/osc_lock.c
+++ b/drivers/staging/lustre/lustre/osc/osc_lock.c
@@ -1120,7 +1120,8 @@ static void osc_lock_set_writer(const struct lu_env *env,
}
} else {
LASSERT(cl_io_is_mkwrite(io));
-   io_start = io_end = io->u.ci_fault.ft_index;
+   io_start = io->u.ci_fault.ft_index;
+   io_end = io->u.ci_fault.ft_index;
}
 
if (descr->cld_mode >= CLM_WRITE &&
diff --git a/drivers/staging/lustre/lustre/osc/osc_request.c 
b/drivers/staging/lustre/lustre/osc/osc_request.c
index 47417f8..7b1fc7e 100644
--- a/drivers/staging/lustre/lustre/osc/osc_request.c
+++ b/drivers/staging/lustre/lustre/osc/osc_request.c
@@ -474,7 +474,8 @@ static int osc_real_create(struct obd_export *exp, struct 
obdo *oa,
DEBUG_REQ(D_HA, req,
  "delorphan from OST integration");
/* Don't resend the delorphan req */
-   req->rq_no_resend = req->rq_no_delay = 1;
+   req->rq_no_resend = 1;
+   req->rq_no_delay = 1;
}
 
rc = ptlrpc_queue_wait(req);
@@ -2775,7 +2776,8 @@ static