[PATCH 28/29] ia64: remove CONFIG_ACPI_NUMA ifdefs

[Christoph Hellwig]

CONFIG_ACPI_NUMA is now unconditionally selected on ia64, so remove the
ifdefs.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/include/asm/acpi.h |  5 -
 arch/ia64/kernel/acpi.c  | 17 -
 arch/ia64/kernel/setup.c |  2 --
 3 files changed, 24 deletions(-)

diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h
index f886d4dc9d55..9598f998a94f 100644
--- a/arch/ia64/include/asm/acpi.h
+++ b/arch/ia64/include/asm/acpi.h
@@ -55,7 +55,6 @@ extern int additional_cpus;
 #define additional_cpus 0
 #endif
 
-#ifdef CONFIG_ACPI_NUMA
 #if MAX_NUMNODES > 256
 #define MAX_PXM_DOMAINS MAX_NUMNODES
 #else
@@ -63,7 +62,6 @@ extern int additional_cpus;
 #endif
 extern int pxm_to_nid_map[MAX_PXM_DOMAINS];
 extern int __initdata nid_to_pxm_map[MAX_NUMNODES];
-#endif
 
 static inline bool arch_has_acpi_pdc(void) { return true; }
 static inline void arch_acpi_set_pdc_bits(u32 *buf)
@@ -73,7 +71,6 @@ static inline void arch_acpi_set_pdc_bits(u32 *buf)
 
 #define acpi_unlazy_tlb(x)
 
-#ifdef CONFIG_ACPI_NUMA
 extern cpumask_t early_cpu_possible_map;
 #define for_each_possible_early_cpu(cpu)  \
for_each_cpu((cpu), _cpu_possible_map)
@@ -102,8 +99,6 @@ static inline void per_cpu_scan_finalize(int min_cpus, int 
reserve_cpus)
 
 extern void acpi_numa_fixup(void);
 
-#endif /* CONFIG_ACPI_NUMA */
-
 #endif /*__KERNEL__*/
 
 #endif /*_ASM_ACPI_H*/
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 70d1587ddcd4..f681e8068c8d 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -316,8 +316,6 @@ static int __init acpi_parse_madt(struct acpi_table_header 
*table)
return 0;
 }
 
-#ifdef CONFIG_ACPI_NUMA
-
 #undef SLIT_DEBUG
 
 #define PXM_FLAG_LEN ((MAX_PXM_DOMAINS + 1)/32)
@@ -517,7 +515,6 @@ void __init acpi_numa_fixup(void)
}
 #endif
 }
-#endif /* CONFIG_ACPI_NUMA */
 
 /*
  * success: return IRQ number (>=0)
@@ -668,7 +665,6 @@ int __init acpi_boot_init(void)
if (acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt))
printk(KERN_ERR PREFIX "Can't find FADT\n");
 
-#ifdef CONFIG_ACPI_NUMA
 #ifdef CONFIG_SMP
if (srat_num_cpus == 0) {
int cpu, i = 1;
@@ -680,7 +676,6 @@ int __init acpi_boot_init(void)
}
 #endif
build_cpu_to_node_map();
-#endif
return 0;
 }
 
@@ -713,7 +708,6 @@ int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
 int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
 {
-#ifdef CONFIG_ACPI_NUMA
/*
 * We don't have cpu-only-node hotadd. But if the system equips
 * SRAT table, pxm is already found and node is ready.
@@ -723,7 +717,6 @@ int acpi_map_cpu2node(acpi_handle handle, int cpu, int 
physid)
 */
node_cpuid[cpu].phys_id = physid;
node_cpuid[cpu].nid = acpi_get_node(handle);
-#endif
return 0;
 }
 
@@ -813,17 +806,11 @@ int acpi_unmap_cpu(int cpu)
 {
ia64_cpu_to_sapicid[cpu] = -1;
set_cpu_present(cpu, false);
-
-#ifdef CONFIG_ACPI_NUMA
-   /* NUMA specific cleanup's */
-#endif
-
return (0);
 }
 EXPORT_SYMBOL(acpi_unmap_cpu);
 #endif /* CONFIG_ACPI_HOTPLUG_CPU */
 
-#ifdef CONFIG_ACPI_NUMA
 static acpi_status acpi_map_iosapic(acpi_handle handle, u32 depth,
void *context, void **ret)
 {
@@ -877,7 +864,6 @@ acpi_map_iosapics (void)
 }
 
 fs_initcall(acpi_map_iosapics);
-#endif /* CONFIG_ACPI_NUMA */
 
 int __ref acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
 {
@@ -886,10 +872,7 @@ int __ref acpi_register_ioapic(acpi_handle handle, u64 
phys_addr, u32 gsi_base)
if ((err = iosapic_init(phys_addr, gsi_base)))
return err;
 
-#ifdef CONFIG_ACPI_NUMA
acpi_map_iosapic(handle, 0, NULL, NULL);
-#endif /* CONFIG_ACPI_NUMA */
-
return 0;
 }
 
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 18de565d5825..6dbb58bb4c8c 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -569,7 +569,6 @@ setup_arch (char **cmdline_p)
/* Initialize the ACPI boot-time table parser */
acpi_table_init();
early_acpi_boot_init();
-#ifdef CONFIG_ACPI_NUMA
acpi_numa_init();
acpi_numa_fixup();
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
@@ -578,7 +577,6 @@ setup_arch (char **cmdline_p)
per_cpu_scan_finalize((cpumask_weight(_cpu_possible_map) == 0 ?
32 : cpumask_weight(_cpu_possible_map)),
additional_cpus > 0 ? additional_cpus : 0);
-#endif /* CONFIG_ACPI_NUMA */
 
 #ifdef CONFIG_SMP
smp_build_cpu_map();
-- 
2.20.1

[PATCH 27/29] ia64: remove CONFIG_SWIOTLB ifdefs

[Christoph Hellwig]

CONFIG_SWIOTLB is now unconditionally selected on ia64, so remove the
ifdefs.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/kernel/dma-mapping.c | 2 --
 arch/ia64/mm/init.c| 2 --
 2 files changed, 4 deletions(-)

diff --git a/arch/ia64/kernel/dma-mapping.c b/arch/ia64/kernel/dma-mapping.c
index 53aaa8597920..4a3262795890 100644
--- a/arch/ia64/kernel/dma-mapping.c
+++ b/arch/ia64/kernel/dma-mapping.c
@@ -8,7 +8,6 @@ int iommu_detected __read_mostly;
 const struct dma_map_ops *dma_ops;
 EXPORT_SYMBOL(dma_ops);
 
-#ifdef CONFIG_SWIOTLB
 void *arch_dma_alloc(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
 {
@@ -26,4 +25,3 @@ long arch_dma_coherent_to_pfn(struct device *dev, void 
*cpu_addr,
 {
return page_to_pfn(virt_to_page(cpu_addr));
 }
-#endif
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index f351dec62ca5..f6928637298e 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -68,7 +68,6 @@ __ia64_sync_icache_dcache (pte_t pte)
set_bit(PG_arch_1, >flags);   /* mark page as clean */
 }
 
-#ifdef CONFIG_SWIOTLB
 /*
  * Since DMA is i-cache coherent, any (complete) pages that were written via
  * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
@@ -83,7 +82,6 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t 
paddr,
set_bit(PG_arch_1, _to_page(pfn)->flags);
} while (++pfn <= PHYS_PFN(paddr + size - 1));
 }
-#endif
 
 inline void
 ia64_set_rbs_bot (void)
-- 
2.20.1

[PATCH 25/29] ia64: move the screen_info setup to common code

[Christoph Hellwig]

There is nothing really platform specific about setting about the
screen_info from the ia64_boot_param structure, so move it from the
dig machvec to common code.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/dig/setup.c| 30 --
 arch/ia64/kernel/setup.c | 34 ++
 2 files changed, 34 insertions(+), 30 deletions(-)

diff --git a/arch/ia64/dig/setup.c b/arch/ia64/dig/setup.c
index 0b1866d2462a..ca8be4617b2e 100644
--- a/arch/ia64/dig/setup.c
+++ b/arch/ia64/dig/setup.c
@@ -26,37 +26,7 @@
 void __init
 dig_setup (char **cmdline_p)
 {
-   unsigned int orig_x, orig_y, num_cols, num_rows, font_height;
-
 #ifdef CONFIG_SMP
init_smp_config();
 #endif
-
-   memset(_info, 0, sizeof(screen_info));
-
-   if (!ia64_boot_param->console_info.num_rows
-   || !ia64_boot_param->console_info.num_cols)
-   {
-   printk(KERN_WARNING "dig_setup: warning: invalid screen-info, 
guessing 80x25\n");
-   orig_x = 0;
-   orig_y = 0;
-   num_cols = 80;
-   num_rows = 25;
-   font_height = 16;
-   } else {
-   orig_x = ia64_boot_param->console_info.orig_x;
-   orig_y = ia64_boot_param->console_info.orig_y;
-   num_cols = ia64_boot_param->console_info.num_cols;
-   num_rows = ia64_boot_param->console_info.num_rows;
-   font_height = 400 / num_rows;
-   }
-
-   screen_info.orig_x = orig_x;
-   screen_info.orig_y = orig_y;
-   screen_info.orig_video_cols  = num_cols;
-   screen_info.orig_video_lines = num_rows;
-   screen_info.orig_video_points = font_height;
-   screen_info.orig_video_mode = 3;/* XXX fake */
-   screen_info.orig_video_isVGA = 1;   /* XXX fake */
-   screen_info.orig_video_ega_bx = 3;  /* XXX fake */
 }
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index 560f9833c665..65d07c60f12d 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -469,6 +469,39 @@ early_console_setup (char *cmdline)
return -1;
 }
 
+static void __init
+screen_info_setup(void)
+{
+   unsigned int orig_x, orig_y, num_cols, num_rows, font_height;
+
+   memset(_info, 0, sizeof(screen_info));
+
+   if (!ia64_boot_param->console_info.num_rows ||
+   !ia64_boot_param->console_info.num_cols) {
+   printk(KERN_WARNING "invalid screen-info, guessing 80x25\n");
+   orig_x = 0;
+   orig_y = 0;
+   num_cols = 80;
+   num_rows = 25;
+   font_height = 16;
+   } else {
+   orig_x = ia64_boot_param->console_info.orig_x;
+   orig_y = ia64_boot_param->console_info.orig_y;
+   num_cols = ia64_boot_param->console_info.num_cols;
+   num_rows = ia64_boot_param->console_info.num_rows;
+   font_height = 400 / num_rows;
+   }
+
+   screen_info.orig_x = orig_x;
+   screen_info.orig_y = orig_y;
+   screen_info.orig_video_cols  = num_cols;
+   screen_info.orig_video_lines = num_rows;
+   screen_info.orig_video_points = font_height;
+   screen_info.orig_video_mode = 3;/* XXX fake */
+   screen_info.orig_video_isVGA = 1;   /* XXX fake */
+   screen_info.orig_video_ega_bx = 3;  /* XXX fake */
+}
+
 static inline void
 mark_bsp_online (void)
 {
@@ -609,6 +642,7 @@ setup_arch (char **cmdline_p)
ROOT_DEV = Root_SDA2;   /* default to second partition on first 
drive */
 
platform_setup(cmdline_p);
+   screen_info_setup();
paging_init();
 
clear_sched_clock_stable();
-- 
2.20.1

[PATCH 22/29] ia64: remove the unused sn_coherency_id symbol

[Christoph Hellwig]

The sn_coherency_id symbol isn't used anywhere, remove it.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/uv/kernel/setup.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/ia64/uv/kernel/setup.c b/arch/ia64/uv/kernel/setup.c
index 6ac4bd314d92..b081f5138f5c 100644
--- a/arch/ia64/uv/kernel/setup.c
+++ b/arch/ia64/uv/kernel/setup.c
@@ -16,9 +16,6 @@
 DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
 
-long sn_coherency_id;
-EXPORT_SYMBOL_GPL(sn_coherency_id);
-
 struct redir_addr {
unsigned long redirect;
unsigned long alias;
-- 
2.20.1

[PATCH 17/29] ia64: remove the hpsim platform

[Christoph Hellwig]

The hpsim platform supports the HP IA64 simulator which was useful as a
bring up platform.  But it is fairly non-standard vs real IA64 system
in that it for example doesn't support ACPI.  It also comes with a
whole bunch of simulator specific drivers.  Remove it to simplify the
IA64 port.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/Kconfig |  34 +-
 arch/ia64/Makefile|  15 +-
 arch/ia64/configs/sim_defconfig   |  52 ---
 arch/ia64/hp/sim/Kconfig  |  23 --
 arch/ia64/hp/sim/Makefile |  17 -
 arch/ia64/hp/sim/boot/Makefile|  37 --
 arch/ia64/hp/sim/boot/boot_head.S | 165 
 arch/ia64/hp/sim/boot/bootloader.c| 175 -
 arch/ia64/hp/sim/boot/bootloader.lds  |  67 
 arch/ia64/hp/sim/boot/fw-emu.c| 374 --
 arch/ia64/hp/sim/boot/ssc.h   |  36 --
 arch/ia64/hp/sim/hpsim.S  |  11 -
 arch/ia64/hp/sim/hpsim_console.c  |  77 
 arch/ia64/hp/sim/hpsim_irq.c  |  76 
 arch/ia64/hp/sim/hpsim_machvec.c  |   3 -
 arch/ia64/hp/sim/hpsim_setup.c|  41 --
 arch/ia64/hp/sim/hpsim_ssc.h  |  37 --
 arch/ia64/hp/sim/simeth.c | 510 -
 arch/ia64/hp/sim/simscsi.c| 373 --
 arch/ia64/hp/sim/simserial.c  | 521 --
 arch/ia64/include/asm/acpi.h  |   4 +-
 arch/ia64/include/asm/hpsim.h |  17 -
 arch/ia64/include/asm/iosapic.h   |  12 -
 arch/ia64/include/asm/machvec.h   |  11 +-
 arch/ia64/include/asm/machvec_hpsim.h |  19 -
 arch/ia64/kernel/Makefile |   3 +-
 arch/ia64/kernel/irq_ia64.c   |   2 -
 arch/ia64/kernel/setup.c  |  13 +-
 28 files changed, 15 insertions(+), 2710 deletions(-)
 delete mode 100644 arch/ia64/configs/sim_defconfig
 delete mode 100644 arch/ia64/hp/sim/Kconfig
 delete mode 100644 arch/ia64/hp/sim/Makefile
 delete mode 100644 arch/ia64/hp/sim/boot/Makefile
 delete mode 100644 arch/ia64/hp/sim/boot/boot_head.S
 delete mode 100644 arch/ia64/hp/sim/boot/bootloader.c
 delete mode 100644 arch/ia64/hp/sim/boot/bootloader.lds
 delete mode 100644 arch/ia64/hp/sim/boot/fw-emu.c
 delete mode 100644 arch/ia64/hp/sim/boot/ssc.h
 delete mode 100644 arch/ia64/hp/sim/hpsim.S
 delete mode 100644 arch/ia64/hp/sim/hpsim_console.c
 delete mode 100644 arch/ia64/hp/sim/hpsim_irq.c
 delete mode 100644 arch/ia64/hp/sim/hpsim_machvec.c
 delete mode 100644 arch/ia64/hp/sim/hpsim_setup.c
 delete mode 100644 arch/ia64/hp/sim/hpsim_ssc.h
 delete mode 100644 arch/ia64/hp/sim/simeth.c
 delete mode 100644 arch/ia64/hp/sim/simscsi.c
 delete mode 100644 arch/ia64/hp/sim/simserial.c
 delete mode 100644 arch/ia64/include/asm/hpsim.h
 delete mode 100644 arch/ia64/include/asm/machvec_hpsim.h

diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index ae3aca14506e..63db7a5378ac 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -10,11 +10,11 @@ config IA64
bool
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
-   select ACPI if (!IA64_HP_SIM)
-   select ARCH_SUPPORTS_ACPI if (!IA64_HP_SIM)
+   select ACPI
+   select ARCH_SUPPORTS_ACPI
select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
select ARCH_MIGHT_HAVE_ACPI_PDC if ACPI
-   select FORCE_PCI if (!IA64_HP_SIM)
+   select FORCE_PCI
select PCI_DOMAINS if PCI
select PCI_SYSCALL if PCI
select HAVE_UNSTABLE_SCHED_CLOCK
@@ -140,7 +140,6 @@ config IA64_GENERIC
  HP-zx1/sx1000 For HP systems
  HP-zx1/sx1000+swiotlb For HP systems with (broken) DMA-constrained 
devices.
  SGI-UVFor SGI UV systems
- Ski-simulator For the HP simulator 

 
  If you don't know what to do, choose "generic".
 
@@ -181,11 +180,6 @@ config IA64_SGI_UV
  to select this option.  If in doubt, select ia64 generic support
  instead.
 
-config IA64_HP_SIM
-   bool "Ski-simulator"
-   select SWIOTLB
-   depends on !PM
-
 endchoice
 
 choice
@@ -239,14 +233,7 @@ config IA64_PAGE_SIZE_64KB
 
 endchoice
 
-if IA64_HP_SIM
-config HZ
-   default 32
-endif
-
-if !IA64_HP_SIM
 source "kernel/Kconfig.hz"
-endif
 
 config IA64_BRL_EMU
bool
@@ -265,11 +252,6 @@ config IA64_CYCLONE
  Say Y here to enable support for IBM EXA Cyclone time source.
  If you're unsure, answer N.
 
-config IOSAPIC
-   bool
-   depends on !IA64_HP_SIM
-   default y
-
 config FORCE_MAX_ZONEORDER
int "MAX_ORDER (11 - 17)"  if !HUGETLB_PAGE
range 11 17  if !HUGETLB_PAGE
@@ -373,7 +355,7 @@ config ARCH_DISCONTIGMEM_DEFAULT
 
 config NUMA
bool "NUMA support"
-   depends on !IA64_HP_SIM && !FLATMEM
+   depends on !FLATMEM
select ACPI_NUMA if ACPI
help
  Say Y to compile the kernel to support NUMA (Non-Uniform 

[PATCH 09/29] char/mspec: remove SGI SN2 support

[Christoph Hellwig]

The SGI SN2 support is about to be removed, so drops the bits
specific to it from this driver.

Signed-off-by: Christoph Hellwig 
---
 drivers/char/mspec.c | 155 +++
 1 file changed, 11 insertions(+), 144 deletions(-)

diff --git a/drivers/char/mspec.c b/drivers/char/mspec.c
index e75c9df7c2d8..a9d9f074fbd6 100644
--- a/drivers/char/mspec.c
+++ b/drivers/char/mspec.c
@@ -9,11 +9,8 @@
  *
  * This driver exports the SN special memory (mspec) facility to user
  * processes.
- * There are three types of memory made available thru this driver:
- * fetchops, uncached and cached.
- *
- * Fetchops are atomic memory operations that are implemented in the
- * memory controller on SGI SN hardware.
+ * There are two types of memory made available thru this driver:
+ * uncached and cached.
  *
  * Uncached are used for memory write combining feature of the ia64
  * cpu.
@@ -46,16 +43,8 @@
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 
 
-#define FETCHOP_ID "SGI Fetchop,"
 #define CACHED_ID  "Cached,"
 #define UNCACHED_ID"Uncached"
 #define REVISION   "4.0"
@@ -65,17 +54,10 @@
  * Page types allocated by the device.
  */
 enum mspec_page_type {
-   MSPEC_FETCHOP = 1,
-   MSPEC_CACHED,
+   MSPEC_CACHED = 2,
MSPEC_UNCACHED
 };
 
-#ifdef CONFIG_SGI_SN
-static int is_sn2;
-#else
-#define is_sn2 0
-#endif
-
 /*
  * One of these structures is allocated when an mspec region is mmaped. The
  * structure is pointed to by the vma->vm_private_data field in the vma struct.
@@ -96,39 +78,6 @@ struct vma_data {
unsigned long maddr[0]; /* Array of MSPEC addresses. */
 };
 
-/* used on shub2 to clear FOP cache in the HUB */
-static unsigned long scratch_page[MAX_NUMNODES];
-#define SH2_AMO_CACHE_ENTRIES  4
-
-static inline int
-mspec_zero_block(unsigned long addr, int len)
-{
-   int status;
-
-   if (is_sn2) {
-   if (is_shub2()) {
-   int nid;
-   void *p;
-   int i;
-
-   nid = nasid_to_cnodeid(get_node_number(__pa(addr)));
-   p = (void *)TO_AMO(scratch_page[nid]);
-
-   for (i=0; i < SH2_AMO_CACHE_ENTRIES; i++) {
-   FETCHOP_LOAD_OP(p, FETCHOP_LOAD);
-   p += FETCHOP_VAR_SIZE;
-   }
-   }
-
-   status = bte_copy(0, addr & ~__IA64_UNCACHED_OFFSET, len,
- BTE_WACQUIRE | BTE_ZERO_FILL, NULL);
-   } else {
-   memset((char *) addr, 0, len);
-   status = 0;
-   }
-   return status;
-}
-
 /*
  * mspec_open
  *
@@ -173,11 +122,8 @@ mspec_close(struct vm_area_struct *vma)
 */
my_page = vdata->maddr[index];
vdata->maddr[index] = 0;
-   if (!mspec_zero_block(my_page, PAGE_SIZE))
-   uncached_free_page(my_page, 1);
-   else
-   printk(KERN_WARNING "mspec_close(): "
-  "failed to zero page %ld\n", my_page);
+   memset((char *)my_page, 0, PAGE_SIZE);
+   uncached_free_page(my_page, 1);
}
 
kvfree(vdata);
@@ -213,11 +159,7 @@ mspec_fault(struct vm_fault *vmf)
spin_unlock(>lock);
}
 
-   if (vdata->type == MSPEC_FETCHOP)
-   paddr = TO_AMO(maddr);
-   else
-   paddr = maddr & ~__IA64_UNCACHED_OFFSET;
-
+   paddr = maddr & ~__IA64_UNCACHED_OFFSET;
pfn = paddr >> PAGE_SHIFT;
 
return vmf_insert_pfn(vmf->vma, vmf->address, pfn);
@@ -269,19 +211,13 @@ mspec_mmap(struct file *file, struct vm_area_struct *vma,
vma->vm_private_data = vdata;
 
vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
-   if (vdata->type == MSPEC_FETCHOP || vdata->type == MSPEC_UNCACHED)
+   if (vdata->type == MSPEC_UNCACHED)
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
vma->vm_ops = _vm_ops;
 
return 0;
 }
 
-static int
-fetchop_mmap(struct file *file, struct vm_area_struct *vma)
-{
-   return mspec_mmap(file, vma, MSPEC_FETCHOP);
-}
-
 static int
 cached_mmap(struct file *file, struct vm_area_struct *vma)
 {
@@ -294,18 +230,6 @@ uncached_mmap(struct file *file, struct vm_area_struct 
*vma)
return mspec_mmap(file, vma, MSPEC_UNCACHED);
 }
 
-static const struct file_operations fetchop_fops = {
-   .owner = THIS_MODULE,
-   .mmap = fetchop_mmap,
-   .llseek = noop_llseek,
-};
-
-static struct miscdevice fetchop_miscdev = {
-   .minor = MISC_DYNAMIC_MINOR,
-   .name = "sgi_fetchop",
-   .fops = _fops
-};
-
 static const struct file_operations cached_fops = {
.owner = THIS_MODULE,
.mmap = cached_mmap,
@@ -339,89 +263,32 @@ static int 

[PATCH 21/29] ia64: remove the SGI UV simulator support

[Christoph Hellwig]

The simulator support was marked as temporary since the initial commit,
so drop it more than 10 years later.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/include/asm/sn/simulator.h | 25 --
 arch/ia64/include/asm/sn/sn_sal.h| 10 -
 arch/ia64/include/asm/uv/uv.h|  4 +---
 arch/ia64/uv/kernel/setup.c  | 31 +---
 4 files changed, 6 insertions(+), 64 deletions(-)
 delete mode 100644 arch/ia64/include/asm/sn/simulator.h

diff --git a/arch/ia64/include/asm/sn/simulator.h 
b/arch/ia64/include/asm/sn/simulator.h
deleted file mode 100644
index 3e4557df3b7c..
--- a/arch/ia64/include/asm/sn/simulator.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
- */
-
-#ifndef _ASM_IA64_SN_SIMULATOR_H
-#define _ASM_IA64_SN_SIMULATOR_H
-
-#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_UV)
-#define SNMAGIC 0xaeee8badbeefL
-#define IS_MEDUSA()({long sn; asm("mov %0=cpuid[%1]" : 
"=r"(sn) : "r"(2)); sn == SNMAGIC;})
-
-#define SIMULATOR_SLEEP()  asm("nop.i 0x8beef")
-#define IS_RUNNING_ON_SIMULATOR()  (sn_prom_type)
-#define IS_RUNNING_ON_FAKE_PROM()  (sn_prom_type == 2)
-extern int sn_prom_type;   /* 0=hardware, 1=medusa/realprom, 
2=medusa/fakeprom */
-#else
-#define IS_MEDUSA()0
-#define SIMULATOR_SLEEP()
-#define IS_RUNNING_ON_SIMULATOR()  0
-#endif
-
-#endif /* _ASM_IA64_SN_SIMULATOR_H */
diff --git a/arch/ia64/include/asm/sn/sn_sal.h 
b/arch/ia64/include/asm/sn/sn_sal.h
index 48b88d0807db..d437aa43343b 100644
--- a/arch/ia64/include/asm/sn/sn_sal.h
+++ b/arch/ia64/include/asm/sn/sn_sal.h
@@ -30,8 +30,6 @@
 #define SALRET_INVALID_ARG (-2)
 #define SALRET_ERROR   (-3)
 
-#define SN_SAL_FAKE_PROM  0x0200
-
 /*
  * Returns the physical address of the partition's reserved page through
  * an iterative number of calls.
@@ -81,14 +79,6 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 
*nasid_array)
 #define SN_MEMPROT_ACCESS_CLASS_6  0x084080
 #define SN_MEMPROT_ACCESS_CLASS_7  0x021080
 
-static inline int
-ia64_sn_is_fake_prom(void)
-{
-   struct ia64_sal_retval rv;
-   SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
-   return (rv.status == 0);
-}
-
 union sn_watchlist_u {
u64 val;
struct {
diff --git a/arch/ia64/include/asm/uv/uv.h b/arch/ia64/include/asm/uv/uv.h
index 71df93ee3bc0..502cf1c56369 100644
--- a/arch/ia64/include/asm/uv/uv.h
+++ b/arch/ia64/include/asm/uv/uv.h
@@ -2,12 +2,10 @@
 #ifndef _ASM_IA64_UV_UV_H
 #define _ASM_IA64_UV_UV_H
 
-#include 
-
 static inline int is_uv_system(void)
 {
/* temporary support for running on hardware simulator */
-   return IS_MEDUSA() || ia64_platform_is("uv");
+   return ia64_platform_is("uv");
 }
 
 #endif /* _ASM_IA64_UV_UV_H */
diff --git a/arch/ia64/uv/kernel/setup.c b/arch/ia64/uv/kernel/setup.c
index 11478d2d863d..6ac4bd314d92 100644
--- a/arch/ia64/uv/kernel/setup.c
+++ b/arch/ia64/uv/kernel/setup.c
@@ -10,14 +10,12 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 
 DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
 
-int sn_prom_type;
 long sn_coherency_id;
 EXPORT_SYMBOL_GPL(sn_coherency_id);
 
@@ -60,30 +58,11 @@ void __init uv_setup(char **cmdline_p)
int nid, cpu, m_val, n_val;
unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
 
-   if (IS_MEDUSA()) {
-   lowmem_redir_base = 0;
-   lowmem_redir_size = 0;
-   node_id.v = 0;
-   m_n_config.s.m_skt = 37;
-   m_n_config.s.n_skt = 0;
-   mmr_base = 0;
-#if 0
-   /* Need BIOS calls - TDB */
-   if (!ia64_sn_is_fake_prom())
-   sn_prom_type = 1;
-   else
-#endif
-   sn_prom_type = 2;
-   printk(KERN_INFO "Running on medusa with %s PROM\n",
-   (sn_prom_type == 1) ? "real" : "fake");
-   } else {
-   get_lowmem_redirect(_redir_base, _redir_size);
-   node_id.v = uv_read_local_mmr(UVH_NODE_ID);
-   m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
-   mmr_base =
-   uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
-   ~UV_MMR_ENABLE;
-   }
+   get_lowmem_redirect(_redir_base, _redir_size);
+   node_id.v = uv_read_local_mmr(UVH_NODE_ID);
+   m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
+   mmr_base = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
+   

[PATCH 16/29] ia64: remove now unused machvec indirections

[Christoph Hellwig]

With the SGI SN2 machvec removal most of the indirections are unused
now, so remove them.  This includes the entire removal of the mmio
read*/write* macros as the generic ones are identical to the
asm-generic/io.h version.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/include/asm/hw_irq.h   |  22 +--
 arch/ia64/include/asm/io.h   | 221 
 arch/ia64/include/asm/machvec.h  | 241 ---
 arch/ia64/include/asm/machvec_init.h |  24 ---
 arch/ia64/include/asm/mmiowb.h   |  12 +-
 arch/ia64/include/asm/pci.h  |   6 +-
 arch/ia64/include/asm/switch_to.h|   1 -
 arch/ia64/kernel/iosapic.c   |   5 +-
 arch/ia64/kernel/irq.c   |  12 --
 arch/ia64/kernel/irq_ia64.c  |   2 +-
 arch/ia64/kernel/machine_kexec.c |   1 -
 arch/ia64/kernel/machvec.c   |   7 -
 arch/ia64/kernel/mca.c   |  10 +-
 arch/ia64/kernel/msi_ia64.c  |  21 +--
 arch/ia64/kernel/sal.c   |   2 +-
 arch/ia64/kernel/setup.c |   1 -
 arch/ia64/kernel/smp.c   |   8 +-
 arch/ia64/kernel/smpboot.c   |   2 +-
 arch/ia64/kernel/time.c  |   2 -
 arch/ia64/lib/io.c   | 114 -
 arch/ia64/mm/discontig.c |   3 +-
 arch/ia64/mm/tlb.c   |   4 +-
 arch/ia64/pci/pci.c  |  13 +-
 23 files changed, 65 insertions(+), 669 deletions(-)

diff --git a/arch/ia64/include/asm/hw_irq.h b/arch/ia64/include/asm/hw_irq.h
index 5dd3c6485c3a..12808111a767 100644
--- a/arch/ia64/include/asm/hw_irq.h
+++ b/arch/ia64/include/asm/hw_irq.h
@@ -137,25 +137,9 @@ static inline void irq_complete_move(unsigned int irq) {}
 
 static inline void ia64_native_resend_irq(unsigned int vector)
 {
-   platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
+   ia64_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
 }
 
-/*
- * Default implementations for the irq-descriptor API:
- */
-#ifndef CONFIG_IA64_GENERIC
-static inline ia64_vector __ia64_irq_to_vector(int irq)
-{
-   return irq_cfg[irq].vector;
-}
-
-static inline unsigned int
-__ia64_local_vector_to_irq (ia64_vector vec)
-{
-   return __this_cpu_read(vector_irq[vec]);
-}
-#endif
-
 /*
  * Next follows the irq descriptor interface.  On IA-64, each CPU supports 256 
interrupt
  * vectors.  On smaller systems, there is a one-to-one correspondence between 
interrupt
@@ -170,7 +154,7 @@ __ia64_local_vector_to_irq (ia64_vector vec)
 static inline ia64_vector
 irq_to_vector (int irq)
 {
-   return platform_irq_to_vector(irq);
+   return irq_cfg[irq].vector;
 }
 
 /*
@@ -181,7 +165,7 @@ irq_to_vector (int irq)
 static inline unsigned int
 local_vector_to_irq (ia64_vector vec)
 {
-   return platform_local_vector_to_irq(vec);
+   return __this_cpu_read(vector_irq[vec]);
 }
 
 #endif /* _ASM_IA64_HW_IRQ_H */
diff --git a/arch/ia64/include/asm/io.h b/arch/ia64/include/asm/io.h
index a511d62d447a..edd5c262d360 100644
--- a/arch/ia64/include/asm/io.h
+++ b/arch/ia64/include/asm/io.h
@@ -129,25 +129,6 @@ __ia64_mk_io_addr (unsigned long port)
return (void *) (space->mmio_base | offset);
 }
 
-#define __ia64_inb ___ia64_inb
-#define __ia64_inw ___ia64_inw
-#define __ia64_inl ___ia64_inl
-#define __ia64_outb___ia64_outb
-#define __ia64_outw___ia64_outw
-#define __ia64_outl___ia64_outl
-#define __ia64_readb   ___ia64_readb
-#define __ia64_readw   ___ia64_readw
-#define __ia64_readl   ___ia64_readl
-#define __ia64_readq   ___ia64_readq
-#define __ia64_readb_relaxed   ___ia64_readb
-#define __ia64_readw_relaxed   ___ia64_readw
-#define __ia64_readl_relaxed   ___ia64_readl
-#define __ia64_readq_relaxed   ___ia64_readq
-#define __ia64_writeb  ___ia64_writeb
-#define __ia64_writew  ___ia64_writew
-#define __ia64_writel  ___ia64_writel
-#define __ia64_writeq  ___ia64_writeq
-
 /*
  * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access 
to ensure
  * that the access has completed before executing other I/O accesses.  Since 
we're doing
@@ -156,8 +137,8 @@ __ia64_mk_io_addr (unsigned long port)
  * during optimization, which is why we use "volatile" pointers.
  */
 
-static inline unsigned int
-___ia64_inb (unsigned long port)
+#define inb inb
+static inline unsigned int inb(unsigned long port)
 {
volatile unsigned char *addr = __ia64_mk_io_addr(port);
unsigned char ret;
@@ -167,8 +148,8 @@ ___ia64_inb (unsigned long port)
return ret;
 }
 
-static inline unsigned int
-___ia64_inw (unsigned long port)
+#define inw inw
+static inline unsigned int inw(unsigned long port)
 {
volatile unsigned short *addr = __ia64_mk_io_addr(port);
unsigned short ret;
@@ -178,8 +159,8 @@ ___ia64_inw (unsigned long port)
return ret;
 }
 
-static inline unsigned int
-___ia64_inl (unsigned long port)
+#define inl inl
+static inline unsigned int inl(unsigned long port)
 {

[PATCH 06/29] tty/serial: remove the sn_console driver

[Christoph Hellwig]

The SGI SN2 support is about to be removed.  Remove this driver that
depends on the SN2 support.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/configs/generic_defconfig   |1 -
 arch/ia64/configs/gensparse_defconfig |1 -
 arch/ia64/kernel/setup.c  |7 -
 drivers/tty/serial/Kconfig|   10 -
 drivers/tty/serial/Makefile   |1 -
 drivers/tty/serial/sn_console.c   | 1036 -
 6 files changed, 1056 deletions(-)
 delete mode 100644 drivers/tty/serial/sn_console.c

diff --git a/arch/ia64/configs/generic_defconfig 
b/arch/ia64/configs/generic_defconfig
index a41afb3ef209..62698ea5d3f2 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -94,7 +94,6 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=6
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_SGI_L1_CONSOLE=y
 CONFIG_SERIAL_SGI_IOC4=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_EFI_RTC=y
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index 07484aa6f16f..b910318f2348 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -83,7 +83,6 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=6
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_SGI_L1_CONSOLE=y
 CONFIG_SERIAL_SGI_IOC4=y
 CONFIG_SERIAL_SGI_IOC3=y
 # CONFIG_HW_RANDOM is not set
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index c9cfa760cd57..a0480a4e65c1 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -463,13 +463,6 @@ early_console_setup (char *cmdline)
 {
int earlycons = 0;
 
-#ifdef CONFIG_SERIAL_SGI_L1_CONSOLE
-   {
-   extern int sn_serial_console_early_setup(void);
-   if (!sn_serial_console_early_setup())
-   earlycons++;
-   }
-#endif
 #ifdef CONFIG_EFI_PCDP
if (!efi_setup_pcdp_console(cmdline))
earlycons++;
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 3083dbae35f7..e9930af78acc 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -855,16 +855,6 @@ config SERIAL_CPM_CONSOLE
  your boot loader (lilo or loadlin) about how to pass options to the
  kernel at boot time.)
 
-config SERIAL_SGI_L1_CONSOLE
-   bool "SGI Altix L1 serial console support"
-   depends on IA64_GENERIC || IA64_SGI_SN2
-   select SERIAL_CORE
-   select SERIAL_CORE_CONSOLE
-   help
-   If you have an SGI Altix and you would like to use the system
-   controller serial port as your console (you want this!),
-   say Y.  Otherwise, say N.
-
 config SERIAL_PIC32
tristate "Microchip PIC32 serial support"
depends on MACH_PIC32
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 15a0fccadf7e..caa978980a6e 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -41,7 +41,6 @@ obj-$(CONFIG_SERIAL_HS_LPC32XX) += lpc32xx_hs.o
 obj-$(CONFIG_SERIAL_DZ) += dz.o
 obj-$(CONFIG_SERIAL_ZS) += zs.o
 obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
-obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o
 obj-$(CONFIG_SERIAL_CPM) += cpm_uart/
 obj-$(CONFIG_SERIAL_IMX) += imx.o
 obj-$(CONFIG_SERIAL_MPC52xx) += mpc52xx_uart.o
diff --git a/drivers/tty/serial/sn_console.c b/drivers/tty/serial/sn_console.c
deleted file mode 100644
index 283493358a62..
--- a/drivers/tty/serial/sn_console.c
+++ /dev/null
@@ -1,1036 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * C-Brick Serial Port (and console) driver for SGI Altix machines.
- *
- * This driver is NOT suitable for talking to the l1-controller for
- * anything other than 'console activities' --- please use the l1
- * driver for that.
- *
- *
- * Copyright (c) 2004-2006 Silicon Graphics, Inc.  All Rights Reserved.
- *
- * Contact information:  Silicon Graphics, Inc., 1500 Crittenden Lane,
- * Mountain View, CA  94043, or:
- *
- * http://www.sgi.com
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/NoticeExplan
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include  /* for mdelay */
-#include 
-#include 
-
-#include 
-#include 
-#include 
-
-/* number of characters we can transmit to the SAL console at a time */
-#define SN_SAL_MAX_CHARS 120
-
-/* 64K, when we're asynch, it must be at least printk's LOG_BUF_LEN to
- * avoid losing chars, (always has to be a power of 2) */
-#define SN_SAL_BUFFER_SIZE (64 * (1 << 10))
-
-#define SN_SAL_UART_FIFO_DEPTH 16
-#define SN_SAL_UART_FIFO_SPEED_CPS (9600/10)
-
-/* sn_transmit_chars() calling args */
-#define TRANSMIT_BUFFERED  0
-#define TRANSMIT_RAW   1
-
-/* To use dynamic numbers only and not use the assigned major and minor,
- * define the following.. */
-  

[PATCH 18/29] ia64: remove CONFIG_PCI ifdefs

[Christoph Hellwig]

Now that hpsim support is gone, CONFIG_PCI is forced on for ia64, and
we can remove a few ifdefs for it.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/Makefile  |  2 +-
 arch/ia64/hp/common/sba_iommu.c | 10 +-
 arch/ia64/include/asm/dma.h |  6 +-
 arch/ia64/kernel/sys_ia64.c | 18 --
 arch/ia64/mm/init.c |  2 --
 5 files changed, 3 insertions(+), 35 deletions(-)

diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile
index 8f650541d4eb..54424415851c 100644
--- a/arch/ia64/Makefile
+++ b/arch/ia64/Makefile
@@ -51,7 +51,7 @@ core-$(CONFIG_IA64_HP_ZX1)+= arch/ia64/dig/
 core-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += arch/ia64/dig/
 core-$(CONFIG_IA64_SGI_UV) += arch/ia64/uv/
 
-drivers-$(CONFIG_PCI)  += arch/ia64/pci/
+drivers-y  += arch/ia64/pci/
 drivers-$(CONFIG_IA64_HP_ZX1)  += arch/ia64/hp/common/ arch/ia64/hp/zx1/
 drivers-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += arch/ia64/hp/common/ arch/ia64/hp/zx1/
 drivers-$(CONFIG_IA64_GENERIC) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ 
arch/ia64/uv/
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index 3d24cc43385b..18321ce8bfa0 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -251,12 +251,8 @@ static SBA_INLINE void sba_free_range(struct ioc *, 
dma_addr_t, size_t);
 static u64 prefetch_spill_page;
 #endif
 
-#ifdef CONFIG_PCI
-# define GET_IOC(dev)  ((dev_is_pci(dev))  
\
+#define GET_IOC(dev)   ((dev_is_pci(dev))  
\
 ? ((struct ioc *) 
PCI_CONTROLLER(to_pci_dev(dev))->iommu) : NULL)
-#else
-# define GET_IOC(dev)  NULL
-#endif
 
 /*
 ** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
@@ -1741,9 +1737,7 @@ ioc_sac_init(struct ioc *ioc)
controller->iommu = ioc;
sac->sysdata = controller;
sac->dma_mask = 0xUL;
-#ifdef CONFIG_PCI
sac->dev.bus = _bus_type;
-#endif
ioc->sac_only_dev = sac;
 }
 
@@ -2121,13 +2115,11 @@ sba_init(void)
}
 #endif
 
-#ifdef CONFIG_PCI
{
struct pci_bus *b = NULL;
while ((b = pci_find_next_bus(b)) != NULL)
sba_connect_bus(b);
}
-#endif
 
 #ifdef CONFIG_PROC_FS
ioc_proc_init();
diff --git a/arch/ia64/include/asm/dma.h b/arch/ia64/include/asm/dma.h
index 23604d6a2cb2..59625e9c1f9c 100644
--- a/arch/ia64/include/asm/dma.h
+++ b/arch/ia64/include/asm/dma.h
@@ -12,11 +12,7 @@
 
 extern unsigned long MAX_DMA_ADDRESS;
 
-#ifdef CONFIG_PCI
-  extern int isa_dma_bridge_buggy;
-#else
-# define isa_dma_bridge_buggy  (0)
-#endif
+extern int isa_dma_bridge_buggy;
 
 #define free_dma(x)
 
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c
index 9ebe1d633abc..e14db25146c2 100644
--- a/arch/ia64/kernel/sys_ia64.c
+++ b/arch/ia64/kernel/sys_ia64.c
@@ -166,21 +166,3 @@ ia64_mremap (unsigned long addr, unsigned long old_len, 
unsigned long new_len, u
force_successful_syscall_return();
return addr;
 }
-
-#ifndef CONFIG_PCI
-
-asmlinkage long
-sys_pciconfig_read (unsigned long bus, unsigned long dfn, unsigned long off, 
unsigned long len,
-   void *buf)
-{
-   return -ENOSYS;
-}
-
-asmlinkage long
-sys_pciconfig_write (unsigned long bus, unsigned long dfn, unsigned long off, 
unsigned long len,
-void *buf)
-{
-   return -ENOSYS;
-}
-
-#endif /* CONFIG_PCI */
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index aae75fd7b810..9a4a16439900 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -632,14 +632,12 @@ mem_init (void)
BUG_ON(PTRS_PER_PMD * sizeof(pmd_t) != PAGE_SIZE);
BUG_ON(PTRS_PER_PTE * sizeof(pte_t) != PAGE_SIZE);
 
-#ifdef CONFIG_PCI
/*
 * This needs to be called _after_ the command line has been parsed but 
_before_
 * any drivers that may need the PCI DMA interface are initialized or 
bootmem has
 * been freed.
 */
platform_dma_init();
-#endif
 
 #ifdef CONFIG_FLATMEM
BUG_ON(!mem_map);
-- 
2.20.1

[PATCH 20/29] ia64: remove the zx1 swiotlb machvec

[Christoph Hellwig]

The aim of this machvec is to support devices with < 32-bit dma
masks.  But given that ia64 only has a ZONE_DMA32 and not a ZONE_DMA
that isn't supported by swiotlb either.

Signed-off-by: Christoph Hellwig 
---
 .../admin-guide/kernel-parameters.txt |  2 +-
 arch/ia64/Kconfig | 13 +---
 arch/ia64/Kconfig.debug   |  2 +-
 arch/ia64/Makefile|  2 -
 arch/ia64/hp/common/Makefile  |  2 -
 arch/ia64/hp/common/hwsw_iommu.c  | 60 ---
 arch/ia64/hp/common/sba_iommu.c   | 15 +
 arch/ia64/hp/zx1/Makefile |  2 +-
 arch/ia64/hp/zx1/hpzx1_swiotlb_machvec.c  |  3 -
 arch/ia64/include/asm/acpi.h  |  2 -
 arch/ia64/include/asm/dma-mapping.h   |  8 +--
 arch/ia64/include/asm/machvec.h   | 15 -
 arch/ia64/include/asm/machvec_hpzx1_swiotlb.h | 20 ---
 arch/ia64/kernel/dma-mapping.c|  6 --
 drivers/char/agp/Kconfig  |  2 +-
 15 files changed, 7 insertions(+), 147 deletions(-)
 delete mode 100644 arch/ia64/hp/common/hwsw_iommu.c
 delete mode 100644 arch/ia64/hp/zx1/hpzx1_swiotlb_machvec.c
 delete mode 100644 arch/ia64/include/asm/machvec_hpzx1_swiotlb.h

diff --git a/Documentation/admin-guide/kernel-parameters.txt 
b/Documentation/admin-guide/kernel-parameters.txt
index 47d981a86e2f..33ab47447ef1 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -2373,7 +2373,7 @@
 
machvec=[IA-64] Force the use of a particular machine-vector
(machvec) in a generic kernel.
-   Example: machvec=hpzx1_swiotlb
+   Example: machvec=hpzx1
 
machtype=   [Loongson] Share the same kernel image file between 
different
 yeeloong laptop.
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 63db7a5378ac..a42ab41ee8ab 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -138,7 +138,6 @@ config IA64_GENERIC
  DIG-compliant For DIG ("Developer's Interface Guide") 
compliant systems
  DIG+Intel+IOMMU   For DIG systems with Intel IOMMU
  HP-zx1/sx1000 For HP systems
- HP-zx1/sx1000+swiotlb For HP systems with (broken) DMA-constrained 
devices.
  SGI-UVFor SGI UV systems
 
  If you don't know what to do, choose "generic".
@@ -158,16 +157,6 @@ config IA64_HP_ZX1
  Build a kernel that runs on HP zx1 and sx1000 systems.  This adds
  support for the HP I/O MMU.
 
-config IA64_HP_ZX1_SWIOTLB
-   bool "HP-zx1/sx1000 with software I/O TLB"
-   select SWIOTLB
-   help
- Build a kernel that runs on HP zx1 and sx1000 systems even when they
- have broken PCI devices which cannot DMA to full 32 bits.  Apart
- from support for the HP I/O MMU, this includes support for the 
software
- I/O TLB, which allows supporting the broken devices at the expense of
- wasting some kernel memory (about 2MB by default).
-
 config IA64_SGI_UV
bool "SGI-UV"
select NUMA
@@ -350,7 +339,7 @@ config ARCH_SPARSEMEM_ENABLE
select SPARSEMEM_VMEMMAP_ENABLE
 
 config ARCH_DISCONTIGMEM_DEFAULT
-   def_bool y if (IA64_GENERIC || IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB)
+   def_bool y if (IA64_GENERIC || IA64_HP_ZX1)
depends on ARCH_DISCONTIGMEM_ENABLE
 
 config NUMA
diff --git a/arch/ia64/Kconfig.debug b/arch/ia64/Kconfig.debug
index 793a613c54ab..abf8d04ab6ab 100644
--- a/arch/ia64/Kconfig.debug
+++ b/arch/ia64/Kconfig.debug
@@ -14,7 +14,7 @@ config IA64_GRANULE_16MB
 
 config IA64_GRANULE_64MB
bool "64MB"
-   depends on !(IA64_GENERIC || IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB)
+   depends on !(IA64_GENERIC || IA64_HP_ZX1)
 
 endchoice
 
diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile
index 54424415851c..d87e49a39171 100644
--- a/arch/ia64/Makefile
+++ b/arch/ia64/Makefile
@@ -48,12 +48,10 @@ core-$(CONFIG_IA64_DIG) += arch/ia64/dig/
 core-$(CONFIG_IA64_DIG_VTD)+= arch/ia64/dig/
 core-$(CONFIG_IA64_GENERIC)+= arch/ia64/dig/
 core-$(CONFIG_IA64_HP_ZX1) += arch/ia64/dig/
-core-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += arch/ia64/dig/
 core-$(CONFIG_IA64_SGI_UV) += arch/ia64/uv/
 
 drivers-y  += arch/ia64/pci/
 drivers-$(CONFIG_IA64_HP_ZX1)  += arch/ia64/hp/common/ arch/ia64/hp/zx1/
-drivers-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += arch/ia64/hp/common/ arch/ia64/hp/zx1/
 drivers-$(CONFIG_IA64_GENERIC) += arch/ia64/hp/common/ arch/ia64/hp/zx1/ 
arch/ia64/uv/
 drivers-$(CONFIG_OPROFILE) += arch/ia64/oprofile/
 
diff --git a/arch/ia64/hp/common/Makefile b/arch/ia64/hp/common/Makefile
index 6026308f9a62..47c8f6ecb6f4 100644
--- a/arch/ia64/hp/common/Makefile
+++ b/arch/ia64/hp/common/Makefile
@@ -7,6 +7,4 @@
 #
 
 obj-y := sba_iommu.o

[PATCH 14/29] drivers: remove the SGI SN2 IOC4 base support

[Christoph Hellwig]

The IOC4 is a multi-function chip seen on SGI SN2 and some SGI MIPS
systems.  This removes the base driver, which while not having an SN2
Kconfig dependency was only for sub-drivers that had one.

Signed-off-by: Christoph Hellwig 
---
 Documentation/driver-api/sgi-ioc4.rst|  49 ---
 arch/ia64/configs/generic_defconfig  |   1 -
 arch/ia64/configs/gensparse_defconfig|   1 -
 arch/mips/configs/bigsur_defconfig   |   1 -
 arch/mips/configs/ip32_defconfig |   1 -
 arch/mips/configs/markeins_defconfig |   1 -
 arch/mips/configs/rm200_defconfig|   1 -
 arch/mips/configs/sb1250_swarm_defconfig |   1 -
 drivers/misc/Kconfig |  12 -
 drivers/misc/Makefile|   1 -
 drivers/misc/ioc4.c  | 498 ---
 include/linux/ioc4.h | 184 -
 include/linux/pci_ids.h  |   1 -
 13 files changed, 752 deletions(-)
 delete mode 100644 Documentation/driver-api/sgi-ioc4.rst
 delete mode 100644 drivers/misc/ioc4.c
 delete mode 100644 include/linux/ioc4.h

diff --git a/Documentation/driver-api/sgi-ioc4.rst 
b/Documentation/driver-api/sgi-ioc4.rst
deleted file mode 100644
index 72709222d3c0..
--- a/Documentation/driver-api/sgi-ioc4.rst
+++ /dev/null
@@ -1,49 +0,0 @@
-
-SGI IOC4 PCI (multi function) device
-
-
-The SGI IOC4 PCI device is a bit of a strange beast, so some notes on
-it are in order.
-
-First, even though the IOC4 performs multiple functions, such as an
-IDE controller, a serial controller, a PS/2 keyboard/mouse controller,
-and an external interrupt mechanism, it's not implemented as a
-multifunction device.  The consequence of this from a software
-standpoint is that all these functions share a single IRQ, and
-they can't all register to own the same PCI device ID.  To make
-matters a bit worse, some of the register blocks (and even registers
-themselves) present in IOC4 are mixed-purpose between these several
-functions, meaning that there's no clear "owning" device driver.
-
-The solution is to organize the IOC4 driver into several independent
-drivers, "ioc4", "sgiioc4", and "ioc4_serial".  Note that there is no
-PS/2 controller driver as this functionality has never been wired up
-on a shipping IO card.
-
-ioc4
-
-This is the core (or shim) driver for IOC4.  It is responsible for
-initializing the basic functionality of the chip, and allocating
-the PCI resources that are shared between the IOC4 functions.
-
-This driver also provides registration functions that the other
-IOC4 drivers can call to make their presence known.  Each driver
-needs to provide a probe and remove function, which are invoked
-by the core driver at appropriate times.  The interface of these
-IOC4 function probe and remove operations isn't precisely the same
-as PCI device probe and remove operations, but is logically the
-same operation.
-
-sgiioc4
-===
-This is the IDE driver for IOC4.  Its name isn't very descriptive
-simply for historical reasons (it used to be the only IOC4 driver
-component).  There's not much to say about it other than it hooks
-up to the ioc4 driver via the appropriate registration, probe, and
-remove functions.
-
-ioc4_serial
-===
-This is the serial driver for IOC4.  There's not much to say about it
-other than it hooks up to the ioc4 driver via the appropriate registration,
-probe, and remove functions.
diff --git a/arch/ia64/configs/generic_defconfig 
b/arch/ia64/configs/generic_defconfig
index 8dd921dce4b5..661d90b3e148 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -44,7 +44,6 @@ CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
-CONFIG_SGI_IOC4=y
 CONFIG_SGI_XP=m
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECD=y
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index 5d5ea744f7e6..7844e6a956a4 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -36,7 +36,6 @@ CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
-CONFIG_SGI_IOC4=y
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECD=y
 CONFIG_IDE_GENERIC=y
diff --git a/arch/mips/configs/bigsur_defconfig 
b/arch/mips/configs/bigsur_defconfig
index 66566026409d..f14ad0538f4e 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -103,7 +103,6 @@ CONFIG_FW_LOADER=m
 CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
-CONFIG_SGI_IOC4=m
 CONFIG_EEPROM_LEGACY=y
 CONFIG_EEPROM_MAX6875=y
 CONFIG_IDE=y
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 572cab91670c..370884018aad 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -46,7 +46,6 @@ CONFIG_CONNECTOR=y
 CONFIG_BLK_DEV_LOOP=m
 

Re: [PATCH 5/5] serial: lantiq: Add support for Lightning Mountain SoC

[Andy Shevchenko]

On Wed, Aug 07, 2019 at 05:21:35PM +0800, Rahul Tanwar wrote:
> This patch adds IRQ & ISR support in the driver for Lightning Mountain SoC.

> +#define ASC_IRNCR_MASK   0x7

GENMASK() ?

> +static irqreturn_t lqasc_irq(int irq, void *p)
> +{
> + unsigned long flags;
> + u32 stat;
> + struct uart_port *port = p;
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> +
> + spin_lock_irqsave(_port->lock, flags);
> + stat = readl(port->membase + LTQ_ASC_IRNCR);
> + if (!(stat & ASC_IRNCR_MASK)) {
> + spin_unlock_irqrestore(_port->lock, flags);
> + return IRQ_NONE;
> + }

> + spin_unlock_irqrestore(_port->lock, flags);

Are you sure the below does not need a serialization?

If it's not the case, you may unlock the lock immediately after readl().

> +
> + if (stat & ASC_IRNCR_TIR)
> + lqasc_tx_int(irq, p);
> +
> + if (stat & ASC_IRNCR_RIR)
> + lqasc_rx_int(irq, p);
> +
> + if (stat & ASC_IRNCR_EIR)
> + lqasc_err_int(irq, p);
> +
> + return IRQ_HANDLED;
> +}

> +static int fetch_irq_intel(struct platform_device *pdev,
> +struct ltq_uart_port *ltq_port)
> +{
> + struct uart_port *port = _port->port;
> + int ret;
> +
> + ret = of_irq_get(pdev->dev.of_node, 0);
> + if (ret < 0) {
> + dev_err(>dev,
> + "failed to fetch IRQ for serial port\n");

> + return -ENODEV;

return ret;

> + }
> + ltq_port->common_irq = ret;
> + port->irq = ret;
> +

> + return ret;

Same as per patch 3, i.e.

return 0;

> +}

> +static int request_irq_intel(struct uart_port *port)
> +{
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> + int retval;
> +
> + retval = request_irq(ltq_port->common_irq, lqasc_irq, 0,
> +  "asc_irq", port);

> + if (retval) {
> + dev_err(port->dev, "failed to request asc_irq\n");
> + return retval;
> + }
> +
> + return 0;

if (retval)
dev_err();

return retval;

> +}

> +
> +

One blank line is enough.

-- 
With Best Regards,
Andy Shevchenko

[PATCH 13/29] drivers: remove the SGI SN2 IOC3 base support

[Christoph Hellwig]

The IOC3 is a multi-function chip seen on SGI SN2 and some SGI
MIPS systems.  This removes the last bit of SN2 specific support,
while the bits used by the mips ports are still around (and being
substantially rewritten at the moment).

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/Kconfig |   2 -
 arch/ia64/configs/gensparse_defconfig |   1 -
 drivers/Makefile  |   1 -
 drivers/sn/Kconfig|  22 -
 drivers/sn/Makefile   |   7 -
 drivers/sn/ioc3.c | 844 --
 6 files changed, 877 deletions(-)
 delete mode 100644 drivers/sn/Kconfig
 delete mode 100644 drivers/sn/Makefile
 delete mode 100644 drivers/sn/ioc3.c

diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 7468d8e50467..43f3a3076ab2 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -493,8 +493,6 @@ config IA64_HP_AML_NFW
  the "force" module parameter, e.g., with the "aml_nfw.force"
  kernel command line option.
 
-source "drivers/sn/Kconfig"
-
 config KEXEC
bool "kexec system call"
depends on !IA64_HP_SIM && (!SMP || HOTPLUG_CPU)
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index d82d07d060d6..5d5ea744f7e6 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -19,7 +19,6 @@ CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_IA64_MCA_RECOVERY=y
 CONFIG_PERFMON=y
 CONFIG_IA64_PALINFO=y
-CONFIG_SGI_IOC3=y
 CONFIG_EFI_VARS=y
 CONFIG_BINFMT_MISC=m
 CONFIG_ACPI_BUTTON=m
diff --git a/drivers/Makefile b/drivers/Makefile
index 6d37564e783c..05be8c798c51 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -132,7 +132,6 @@ obj-y   += mmc/
 obj-$(CONFIG_MEMSTICK) += memstick/
 obj-$(CONFIG_NEW_LEDS) += leds/
 obj-$(CONFIG_INFINIBAND)   += infiniband/
-obj-$(CONFIG_SGI_SN)   += sn/
 obj-y  += firmware/
 obj-$(CONFIG_CRYPTO)   += crypto/
 obj-$(CONFIG_SUPERH)   += sh/
diff --git a/drivers/sn/Kconfig b/drivers/sn/Kconfig
deleted file mode 100644
index a6c443d31a3c..
--- a/drivers/sn/Kconfig
+++ /dev/null
@@ -1,22 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Miscellaneous SN-specific devices
-#
-
-menu "SN Devices"
-   depends on SGI_SN
-
-config SGI_IOC3
-   tristate "SGI IOC3 Base IO support"
-   default m
-   ---help---
-   This option enables basic support for the SGI IOC3-based Base IO
-   controller card.  This option does not enable any specific
-   functions on such a card, but provides necessary infrastructure
-   for other drivers to utilize.
-
-   If you have an SGI Altix with an IOC3-based
-   I/O controller or a PCI IOC3 serial card say Y.
-   Otherwise say N.
-
-endmenu
diff --git a/drivers/sn/Makefile b/drivers/sn/Makefile
deleted file mode 100644
index f0e809a38b2d..
--- a/drivers/sn/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# Makefile for the Altix device drivers.
-#
-#
-
-obj-$(CONFIG_SGI_IOC3) += ioc3.o
diff --git a/drivers/sn/ioc3.c b/drivers/sn/ioc3.c
deleted file mode 100644
index 358025af4918..
--- a/drivers/sn/ioc3.c
+++ /dev/null
@@ -1,844 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * SGI IOC3 master driver and IRQ demuxer
- *
- * Copyright (c) 2005 Stanislaw Skowronek 
- * Heavily based on similar work by:
- *   Brent Casavant  - IOC4 master driver
- *   Pat Gefre  - IOC3 serial port IRQ demuxer
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define IOC3_PCI_SIZE 0x10
-
-static LIST_HEAD(ioc3_devices);
-static int ioc3_counter;
-static DECLARE_RWSEM(ioc3_devices_rwsem);
-
-static struct ioc3_submodule *ioc3_submodules[IOC3_MAX_SUBMODULES];
-static struct ioc3_submodule *ioc3_ethernet;
-static DEFINE_RWLOCK(ioc3_submodules_lock);
-
-/* NIC probing code */
-
-#define GPCR_MLAN_EN0x0020  /* enable MCR to pin 8 */
-
-static inline unsigned mcr_pack(unsigned pulse, unsigned sample)
-{
-   return (pulse << 10) | (sample << 2);
-}
-
-static int nic_wait(struct ioc3_driver_data *idd)
-{
-   unsigned mcr;
-
-do {
-mcr = readl(>vma->mcr);
-} while (!(mcr & 2));
-
-return mcr & 1;
-}
-
-static int nic_reset(struct ioc3_driver_data *idd)
-{
-int presence;
-   unsigned long flags;
-
-   local_irq_save(flags);
-   writel(mcr_pack(500, 65), >vma->mcr);
-   presence = nic_wait(idd);
-   local_irq_restore(flags);
-
-   udelay(500);
-
-return presence;
-}
-
-static int nic_read_bit(struct ioc3_driver_data *idd)
-{
-   int result;
-   unsigned long flags;
-
-   local_irq_save(flags);
-   writel(mcr_pack(6, 13), >vma->mcr);
-   result = nic_wait(idd);
-   local_irq_restore(flags);
-
-   

[PATCH 08/29] tty/serial: remove the ioc3_serial driver

[Christoph Hellwig]

The SGI SN2 support is about to be removed.  Remove this driver that
depends on the SN2 support.

Signed-off-by: Christoph Hellwig 
---
 MAINTAINERS   |6 -
 arch/ia64/configs/gensparse_defconfig |1 -
 drivers/tty/serial/Kconfig|8 -
 drivers/tty/serial/Makefile   |1 -
 drivers/tty/serial/ioc3_serial.c  | 2195 -
 5 files changed, 2211 deletions(-)
 delete mode 100644 drivers/tty/serial/ioc3_serial.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 47800d32cfbc..80079a9c4440 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8399,12 +8399,6 @@ L:   linux-m...@vger.kernel.org
 S: Maintained
 F: drivers/net/ethernet/sgi/ioc3-eth.c
 
-IOC3 SERIAL DRIVER
-M: Pat Gefre 
-L: linux-ser...@vger.kernel.org
-S: Maintained
-F: drivers/tty/serial/ioc3_serial.c
-
 IOMAP FILESYSTEM LIBRARY
 M: Christoph Hellwig 
 M: Darrick J. Wong 
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index 6e450a4fc93e..d82d07d060d6 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -83,7 +83,6 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=6
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
-CONFIG_SERIAL_SGI_IOC3=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_EFI_RTC=y
 CONFIG_RAW_DRIVER=m
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index d33bd894b9f2..2f631501c75f 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -972,14 +972,6 @@ config SERIAL_JSM
  To compile this driver as a module, choose M here: the
  module will be called jsm.
 
-config SERIAL_SGI_IOC3
-   tristate "SGI Altix IOC3 serial support"
-   depends on (IA64_GENERIC || IA64_SGI_SN2) && SGI_IOC3
-   select SERIAL_CORE
-   help
- If you have an SGI Altix with an IOC3 serial card,
- say Y or M.  Otherwise, say N.
-
 config SERIAL_MSM
tristate "MSM on-chip serial port support"
depends on ARCH_QCOM
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index df8f9a8f7651..d2f44879384e 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -52,7 +52,6 @@ obj-$(CONFIG_SERIAL_SC16IS7XX_CORE) += sc16is7xx.o
 obj-$(CONFIG_SERIAL_JSM) += jsm/
 obj-$(CONFIG_SERIAL_TXX9) += serial_txx9.o
 obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o
-obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
 obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
 obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
 obj-$(CONFIG_SERIAL_MSM) += msm_serial.o
diff --git a/drivers/tty/serial/ioc3_serial.c b/drivers/tty/serial/ioc3_serial.c
deleted file mode 100644
index d8a1cdd6a53d..
--- a/drivers/tty/serial/ioc3_serial.c
+++ /dev/null
@@ -1,2195 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2005 Silicon Graphics, Inc.  All Rights Reserved.
- */
-
-/*
- * This file contains a module version of the ioc3 serial driver. This
- * includes all the support functions needed (support functions, etc.)
- * and the serial driver itself.
- */
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-/*
- * Interesting things about the ioc3
- */
-
-#define LOGICAL_PORTS  2   /* rs232(0) and rs422(1) */
-#define PORTS_PER_CARD 2
-#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS)
-#define MAX_CARDS  8
-#define MAX_LOGICAL_PORTS  (LOGICAL_PORTS_PER_CARD * MAX_CARDS)
-
-/* determine given the sio_ir what port it applies to */
-#define GET_PORT_FROM_SIO_IR(_x)   (_x & SIO_IR_SA) ? 0 : 1
-
-
-/*
- * we have 2 logical ports (rs232, rs422) for each physical port
- * evens are rs232, odds are rs422
- */
-#define GET_PHYSICAL_PORT(_x)  ((_x) >> 1)
-#define GET_LOGICAL_PORT(_x)   ((_x) & 1)
-#define IS_PHYSICAL_PORT(_x)   !((_x) & 1)
-#define IS_RS232(_x)   !((_x) & 1)
-
-static unsigned int Num_of_ioc3_cards;
-static unsigned int Submodule_slot;
-
-/* defining this will get you LOTS of great debug info */
-//#define DEBUG_INTERRUPTS
-#define DPRINT_CONFIG(_x...)   ;
-//#define DPRINT_CONFIG(_x...)  printk _x
-#define NOT_PROGRESS() ;
-//#define NOT_PROGRESS()   printk("%s : fails %d\n", __func__, __LINE__)
-
-/* number of characters we want to transmit to the lower level at a time */
-#define MAX_CHARS  256
-#define FIFO_SIZE  (MAX_CHARS-1)   /* it's a uchar */
-
-/* Device name we're using */
-#define DEVICE_NAME"ttySIOC"
-#define DEVICE_MAJOR   204
-#define DEVICE_MINOR   116
-
-/* flags for next_char_state */
-#define NCS_BREAK  0x1
-#define NCS_PARITY 0x2
-#define NCS_FRAMING0x4
-#define NCS_OVERRUN0x8
-
-/* cause we need SOME parameters ... */
-#define MIN_BAUD_SUPPORTED 1200
-#define MAX_BAUD_SUPPORTED 115200
-

[PATCH 05/29] PCI/hotplug: remove the sgi_hotplug driver

[Christoph Hellwig]

The SGI SN2 support is about to be removed.  Remove this driver that
depends on the SN2 support.

Signed-off-by: Christoph Hellwig 
---
 drivers/pci/hotplug/Kconfig   |   9 -
 drivers/pci/hotplug/Makefile  |   1 -
 drivers/pci/hotplug/sgi_hotplug.c | 700 --
 3 files changed, 710 deletions(-)
 delete mode 100644 drivers/pci/hotplug/sgi_hotplug.c

diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index e9f78eb390d2..e7b493c22bf3 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -147,15 +147,6 @@ config HOTPLUG_PCI_RPA_DLPAR
 
  When in doubt, say N.
 
-config HOTPLUG_PCI_SGI
-   tristate "SGI PCI Hotplug Support"
-   depends on IA64_SGI_SN2 || IA64_GENERIC
-   help
- Say Y here if you want to use the SGI Altix Hotplug
- Driver for PCI devices.
-
- When in doubt, say N.
-
 config HOTPLUG_PCI_S390
bool "System z PCI Hotplug Support"
depends on S390 && 64BIT
diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
index 7e3331603714..5196983220df 100644
--- a/drivers/pci/hotplug/Makefile
+++ b/drivers/pci/hotplug/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_HOTPLUG_PCI_SHPC)+= shpchp.o
 obj-$(CONFIG_HOTPLUG_PCI_POWERNV)  += pnv-php.o
 obj-$(CONFIG_HOTPLUG_PCI_RPA)  += rpaphp.o
 obj-$(CONFIG_HOTPLUG_PCI_RPA_DLPAR)+= rpadlpar_io.o
-obj-$(CONFIG_HOTPLUG_PCI_SGI)  += sgi_hotplug.o
 obj-$(CONFIG_HOTPLUG_PCI_ACPI) += acpiphp.o
 obj-$(CONFIG_HOTPLUG_PCI_S390) += s390_pci_hpc.o
 
diff --git a/drivers/pci/hotplug/sgi_hotplug.c 
b/drivers/pci/hotplug/sgi_hotplug.c
deleted file mode 100644
index 231f5bdd3d2d..
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ /dev/null
@@ -1,700 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2005-2006 Silicon Graphics, Inc. All rights reserved.
- *
- * This work was based on the 2.4/2.6 kernel development by Dick Reigner.
- * Work to add BIOS PROM support was completed by Mike Habeck.
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "../pci.h"
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("SGI (pra...@sgi.com, dic...@sgi.com, hab...@sgi.com)");
-MODULE_DESCRIPTION("SGI Altix Hot Plug PCI Controller Driver");
-
-
-/* SAL call error codes. Keep in sync with prom header io/include/pcibr.h */
-#define PCI_SLOT_ALREADY_UP2   /* slot already up */
-#define PCI_SLOT_ALREADY_DOWN  3   /* slot already down */
-#define PCI_L1_ERR 7   /* L1 console command error */
-#define PCI_EMPTY_33MHZ15  /* empty 33 MHz bus */
-
-
-#define PCIIO_ASIC_TYPE_TIOCA  4
-#define PCI_L1_QSIZE   128 /* our L1 message buffer size */
-#define SN_MAX_HP_SLOTS32  /* max hotplug slots */
-#define SN_SLOT_NAME_SIZE  33  /* size of name string */
-
-/* internal list head */
-static struct list_head sn_hp_list;
-
-/* hotplug_slot struct's private pointer */
-struct slot {
-   int device_num;
-   struct pci_bus *pci_bus;
-   /* this struct for glue internal only */
-   struct hotplug_slot hotplug_slot;
-   struct list_head hp_list;
-   char physical_path[SN_SLOT_NAME_SIZE];
-};
-
-struct pcibr_slot_enable_resp {
-   int resp_sub_errno;
-   char resp_l1_msg[PCI_L1_QSIZE + 1];
-};
-
-struct pcibr_slot_disable_resp {
-   int resp_sub_errno;
-   char resp_l1_msg[PCI_L1_QSIZE + 1];
-};
-
-enum sn_pci_req_e {
-   PCI_REQ_SLOT_ELIGIBLE,
-   PCI_REQ_SLOT_DISABLE
-};
-
-static int enable_slot(struct hotplug_slot *slot);
-static int disable_slot(struct hotplug_slot *slot);
-static inline int get_power_status(struct hotplug_slot *slot, u8 *value);
-
-static const struct hotplug_slot_ops sn_hotplug_slot_ops = {
-   .enable_slot= enable_slot,
-   .disable_slot   = disable_slot,
-   .get_power_status   = get_power_status,
-};
-
-static DEFINE_MUTEX(sn_hotplug_mutex);
-
-static struct slot *to_slot(struct hotplug_slot *bss_hotplug_slot)
-{
-   return container_of(bss_hotplug_slot, struct slot, hotplug_slot);
-}
-
-static ssize_t path_show(struct pci_slot *pci_slot, char *buf)
-{
-   int retval = -ENOENT;
-   struct slot *slot = to_slot(pci_slot->hotplug);
-
-   if (!slot)
-   return retval;
-
-   retval = sprintf(buf, "%s\n", slot->physical_path);
-   return retval;
-}
-
-static struct pci_slot_attribute sn_slot_path_attr = __ATTR_RO(path);
-
-static int sn_pci_slot_valid(struct pci_bus *pci_bus, int device)
-{
-   struct pcibus_info *pcibus_info;
-   u16 busnum, segment, ioboard_type;
-
-   pcibus_info = 

[PATCH 11/29] qla1280: remove SGI SN2 support

[Christoph Hellwig]

The SGI SN2 support is about to be removed, so drops the bits
specific to it from this driver.

Signed-off-by: Christoph Hellwig 
---
 drivers/scsi/qla1280.c | 37 -
 drivers/scsi/qla1280.h |  3 ---
 2 files changed, 40 deletions(-)

diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c
index e5760c4a27f0..832af4213046 100644
--- a/drivers/scsi/qla1280.c
+++ b/drivers/scsi/qla1280.c
@@ -357,10 +357,6 @@
 #include 
 #include 
 
-#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
-#include 
-#endif
-
 
 /*
  * Compile time Options:
@@ -380,11 +376,6 @@
 
 #define NVRAM_DELAY()  udelay(500) /* 2 microseconds */
 
-#if defined(__ia64__) && !defined(ia64_platform_is)
-#define ia64_platform_is(foo)  (!strcmp(x, platform_name))
-#endif
-
-
 #define IS_ISP1040(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020)
 #define IS_ISP1x40(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020 || \
ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1240)
@@ -1427,15 +1418,6 @@ qla1280_initialize_adapter(struct scsi_qla_host *ha)
ha->flags.reset_active = 0;
ha->flags.abort_isp_active = 0;
 
-#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
-   if (ia64_platform_is("sn2")) {
-   printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
-  "dual channel lockup workaround\n", ha->host_no);
-   ha->flags.use_pci_vchannel = 1;
-   driver_setup.no_nvram = 1;
-   }
-#endif
-
/* TODO: implement support for the 1040 nvram format */
if (IS_ISP1040(ha))
driver_setup.no_nvram = 1;
@@ -2251,13 +2233,6 @@ qla1280_nvram_config(struct scsi_qla_host *ha)
mb[1] = nv->firmware_feature.f.enable_fast_posting;
mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1;
mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5;
-#if defined(CONFIG_IA64_GENERIC) || defined (CONFIG_IA64_SGI_SN2)
-   if (ia64_platform_is("sn2")) {
-   printk(KERN_INFO "scsi(%li): Enabling SN2 PCI DMA "
-  "workaround\n", ha->host_no);
-   mb[1] |= nv->firmware_feature.f.unused_9 << 9; /* XXX */
-   }
-#endif
status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb);
 
/* Retry count and delay. */
@@ -2888,12 +2863,6 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, 
struct srb * sp)
break;
 
dma_handle = sg_dma_address(s);
-#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
-   if (ha->flags.use_pci_vchannel)
-   sn_pci_set_vchan(ha->pdev,
-(unsigned long *)_handle,
-SCSI_BUS_32(cmd));
-#endif
*dword_ptr++ =
cpu_to_le32(lower_32_bits(dma_handle));
*dword_ptr++ =
@@ -2950,12 +2919,6 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, 
struct srb * sp)
if (cnt == 5)
break;
dma_handle = sg_dma_address(s);
-#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
-   if (ha->flags.use_pci_vchannel)
-   sn_pci_set_vchan(ha->pdev,
-(unsigned long 
*)_handle,
-SCSI_BUS_32(cmd));
-#endif
*dword_ptr++ =
cpu_to_le32(lower_32_bits(dma_handle));
*dword_ptr++ =
diff --git a/drivers/scsi/qla1280.h b/drivers/scsi/qla1280.h
index b496206362a9..a1a8aefc7cc3 100644
--- a/drivers/scsi/qla1280.h
+++ b/drivers/scsi/qla1280.h
@@ -1055,9 +1055,6 @@ struct scsi_qla_host {
uint32_t reset_active:1;/* 3 */
uint32_t abort_isp_active:1;/* 4 */
uint32_t disable_risc_code_load:1;  /* 5 */
-#ifdef __ia64__
-   uint32_t use_pci_vchannel:1;
-#endif
} flags;
 
struct nvram nvram;
-- 
2.20.1

[PATCH 03/29] char/agp: remove the sgi-agp driver

[Christoph Hellwig]

The SGI SN2 support is about to be removed.  Remove this driver that
depends on the SN2 support.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/configs/generic_defconfig   |   1 -
 arch/ia64/configs/gensparse_defconfig |   1 -
 drivers/char/agp/Kconfig  |   7 -
 drivers/char/agp/Makefile |   1 -
 drivers/char/agp/sgi-agp.c| 338 --
 5 files changed, 348 deletions(-)
 delete mode 100644 drivers/char/agp/sgi-agp.c

diff --git a/arch/ia64/configs/generic_defconfig 
b/arch/ia64/configs/generic_defconfig
index 1fc4d5a77e0d..79b88384c885 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -104,7 +104,6 @@ CONFIG_HPET=y
 CONFIG_AGP=m
 CONFIG_AGP_I460=m
 CONFIG_AGP_HP_ZX1=m
-CONFIG_AGP_SGI_TIOCA=m
 CONFIG_DRM=m
 CONFIG_DRM_TDFX=m
 CONFIG_DRM_R128=m
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index 289ed714ad8b..f1490580ed69 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -94,7 +94,6 @@ CONFIG_HPET=y
 CONFIG_AGP=m
 CONFIG_AGP_I460=m
 CONFIG_AGP_HP_ZX1=m
-CONFIG_AGP_SGI_TIOCA=m
 CONFIG_DRM=m
 CONFIG_DRM_TDFX=m
 CONFIG_DRM_R128=m
diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig
index 6231714ef3c8..be50d7a93f4c 100644
--- a/drivers/char/agp/Kconfig
+++ b/drivers/char/agp/Kconfig
@@ -150,13 +150,6 @@ config AGP_EFFICEON
  This option gives you AGP support for the Transmeta Efficeon
  series processors with integrated northbridges.
 
-config AGP_SGI_TIOCA
-tristate "SGI TIO chipset AGP support"
-depends on AGP && (IA64_SGI_SN2 || IA64_GENERIC)
-help
-  This option gives you AGP GART support for the SGI TIO chipset
-  for IA64 processors.
-
 config INTEL_GTT
tristate
depends on X86 && PCI
diff --git a/drivers/char/agp/Makefile b/drivers/char/agp/Makefile
index 4a786ffd9dee..cb2497d157f6 100644
--- a/drivers/char/agp/Makefile
+++ b/drivers/char/agp/Makefile
@@ -16,7 +16,6 @@ obj-$(CONFIG_AGP_I460)+= i460-agp.o
 obj-$(CONFIG_AGP_INTEL)+= intel-agp.o
 obj-$(CONFIG_INTEL_GTT)+= intel-gtt.o
 obj-$(CONFIG_AGP_NVIDIA)   += nvidia-agp.o
-obj-$(CONFIG_AGP_SGI_TIOCA)+= sgi-agp.o
 obj-$(CONFIG_AGP_SIS)  += sis-agp.o
 obj-$(CONFIG_AGP_SWORKS)   += sworks-agp.o
 obj-$(CONFIG_AGP_UNINORTH) += uninorth-agp.o
diff --git a/drivers/char/agp/sgi-agp.c b/drivers/char/agp/sgi-agp.c
deleted file mode 100644
index e7d5bdc02d93..
--- a/drivers/char/agp/sgi-agp.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
- */
-
-/*
- * SGI TIOCA AGPGART routines.
- *
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include "agp.h"
-
-extern int agp_memory_reserved;
-extern uint32_t tioca_gart_found;
-extern struct list_head tioca_list;
-static struct agp_bridge_data **sgi_tioca_agp_bridges;
-
-/*
- * The aperature size and related information is set up at TIOCA init time.
- * Values for this table will be extracted and filled in at
- * sgi_tioca_fetch_size() time.
- */
-
-static struct aper_size_info_fixed sgi_tioca_sizes[] = {
-   {0, 0, 0},
-};
-
-static struct page *sgi_tioca_alloc_page(struct agp_bridge_data *bridge)
-{
-   struct page *page;
-   int nid;
-   struct tioca_kernel *info =
-   (struct tioca_kernel *)bridge->dev_private_data;
-
-   nid = info->ca_closest_node;
-   page = alloc_pages_node(nid, GFP_KERNEL, 0);
-   if (!page)
-   return NULL;
-
-   get_page(page);
-   atomic_inc(_bridge->current_memory_agp);
-   return page;
-}
-
-/*
- * Flush GART tlb's.  Cannot selectively flush based on memory so the mem
- * arg is ignored.
- */
-
-static void sgi_tioca_tlbflush(struct agp_memory *mem)
-{
-   tioca_tlbflush(mem->bridge->dev_private_data);
-}
-
-/*
- * Given an address of a host physical page, turn it into a valid gart
- * entry.
- */
-static unsigned long
-sgi_tioca_mask_memory(struct agp_bridge_data *bridge, dma_addr_t addr,
- int type)
-{
-   return tioca_physpage_to_gart(addr);
-}
-
-static void sgi_tioca_agp_enable(struct agp_bridge_data *bridge, u32 mode)
-{
-   tioca_fastwrite_enable(bridge->dev_private_data);
-}
-
-/*
- * sgi_tioca_configure() doesn't have anything to do since the base CA driver
- * has alreay set up the GART.
- */
-
-static int sgi_tioca_configure(void)
-{
-   return 0;
-}
-
-/*
- * Determine gfx aperature size.  This has already been determined by the
- * CA driver init, so just need to set agp_bridge values accordingly.
- */
-
-static int 

[PATCH 04/29] ide: remove the sgiioc4 driver

[Christoph Hellwig]

The SGI SN2 support is about to be removed.  Remove this driver that
depends on the SN2 support.

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/configs/generic_defconfig   |   1 -
 arch/ia64/configs/gensparse_defconfig |   1 -
 drivers/Kconfig   |   2 -
 drivers/ide/Kconfig   |   9 -
 drivers/ide/Makefile  |   1 -
 drivers/ide/sgiioc4.c | 630 --
 6 files changed, 644 deletions(-)
 delete mode 100644 drivers/ide/sgiioc4.c

diff --git a/arch/ia64/configs/generic_defconfig 
b/arch/ia64/configs/generic_defconfig
index 79b88384c885..a41afb3ef209 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -51,7 +51,6 @@ CONFIG_BLK_DEV_IDECD=y
 CONFIG_BLK_DEV_GENERIC=y
 CONFIG_BLK_DEV_CMD64X=y
 CONFIG_BLK_DEV_PIIX=y
-CONFIG_BLK_DEV_SGIIOC4=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
 CONFIG_BLK_DEV_SR=m
diff --git a/arch/ia64/configs/gensparse_defconfig 
b/arch/ia64/configs/gensparse_defconfig
index f1490580ed69..07484aa6f16f 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -44,7 +44,6 @@ CONFIG_IDE_GENERIC=y
 CONFIG_BLK_DEV_GENERIC=y
 CONFIG_BLK_DEV_CMD64X=y
 CONFIG_BLK_DEV_PIIX=y
-CONFIG_BLK_DEV_SGIIOC4=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 61cf4ea2c229..477d63d0364d 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -30,8 +30,6 @@ source "drivers/block/Kconfig"
 
 source "drivers/nvme/Kconfig"
 
-# misc before ide - BLK_DEV_SGIIOC4 depends on SGI_IOC4
-
 source "drivers/misc/Kconfig"
 
 source "drivers/ide/Kconfig"
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 9eada392df15..1c227ea8ecd3 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -567,15 +567,6 @@ config BLK_DEV_SVWKS
  This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
  chipsets.
 
-config BLK_DEV_SGIIOC4
-   tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support"
-   depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4
-   select BLK_DEV_IDEDMA_PCI
-   help
- This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4
- chipset, which has one channel and can support two devices.
- Please say Y here if you have an Altix System from SGI.
-
 config BLK_DEV_SIIMAGE
tristate "Silicon Image chipset support"
select BLK_DEV_IDEDMA_PCI
diff --git a/drivers/ide/Makefile b/drivers/ide/Makefile
index 9f617a77970f..cac02db4098d 100644
--- a/drivers/ide/Makefile
+++ b/drivers/ide/Makefile
@@ -59,7 +59,6 @@ obj-$(CONFIG_BLK_DEV_PDC202XX_NEW)+= pdc202xx_new.o
 obj-$(CONFIG_BLK_DEV_PIIX) += piix.o
 obj-$(CONFIG_BLK_DEV_RZ1000)   += rz1000.o
 obj-$(CONFIG_BLK_DEV_SVWKS)+= serverworks.o
-obj-$(CONFIG_BLK_DEV_SGIIOC4)  += sgiioc4.o
 obj-$(CONFIG_BLK_DEV_SIIMAGE)  += siimage.o
 obj-$(CONFIG_BLK_DEV_SIS5513)  += sis5513.o
 obj-$(CONFIG_BLK_DEV_SL82C105) += sl82c105.o
diff --git a/drivers/ide/sgiioc4.c b/drivers/ide/sgiioc4.c
deleted file mode 100644
index 2d35e9f7516f..
--- a/drivers/ide/sgiioc4.c
+++ /dev/null
@@ -1,630 +0,0 @@
-/*
- * Copyright (c) 2003-2006 Silicon Graphics, Inc.  All Rights Reserved.
- * Copyright (C) 2008-2009 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it would be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- *
- * You should have received a copy of the GNU General Public
- * License along with this program; if not, write the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * For further information regarding this notice, see:
- *
- * http://oss.sgi.com/projects/GenInfo/NoticeExplan
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define DRV_NAME "SGIIOC4"
-
-/* IOC4 Specific Definitions */
-#define IOC4_CMD_OFFSET0x100
-#define IOC4_CTRL_OFFSET   0x120
-#define IOC4_DMA_OFFSET0x140
-#define IOC4_INTR_OFFSET   0x0
-
-#define IOC4_TIMING0x00
-#define IOC4_DMA_PTR_L 0x01
-#define IOC4_DMA_PTR_H 0x02
-#define IOC4_DMA_ADDR_L0x03
-#define IOC4_DMA_ADDR_H0x04
-#define IOC4_BC_DEV0x05
-#define IOC4_BC_MEM0x06
-#defineIOC4_DMA_CTRL   0x07
-#defineIOC4_DMA_END_ADDR   0x08
-
-/* Bits in the IOC4 Control/Status Register */
-#defineIOC4_S_DMA_START0x01
-#defineIOC4_S_DMA_STOP 

[PATCH 10/29] misc/sgi-xp: remove SGI SN2 support

[Christoph Hellwig]

Note this also marks xp broken on ia64 now, as the UV support, which
was disable in generic kernels before actually never compiled due to
undefined uv_gpa_to_soc_phys_ram and uv_gpa_in_mmr_space symbols since
at least commit c2c9f1157414 ("x86: uv: update XPC to handle updated
BIOS interface").

Signed-off-by: Christoph Hellwig 
---
 arch/ia64/uv/kernel/setup.c |4 -
 drivers/misc/Kconfig|5 +-
 drivers/misc/sgi-xp/Makefile|   13 +-
 drivers/misc/sgi-xp/xp.h|   19 -
 drivers/misc/sgi-xp/xp_main.c   |8 +-
 drivers/misc/sgi-xp/xp_nofault.S|   35 -
 drivers/misc/sgi-xp/xp_sn2.c|  190 ---
 drivers/misc/sgi-xp/xp_uv.c |3 +-
 drivers/misc/sgi-xp/xpc.h   |  273 ---
 drivers/misc/sgi-xp/xpc_main.c  |   31 +-
 drivers/misc/sgi-xp/xpc_partition.c |5 -
 drivers/misc/sgi-xp/xpc_sn2.c   | 2459 ---
 drivers/misc/sgi-xp/xpc_uv.c|2 +
 drivers/misc/sgi-xp/xpnet.c |2 +-
 14 files changed, 15 insertions(+), 3034 deletions(-)
 delete mode 100644 drivers/misc/sgi-xp/xp_nofault.S
 delete mode 100644 drivers/misc/sgi-xp/xp_sn2.c
 delete mode 100644 drivers/misc/sgi-xp/xpc_sn2.c

diff --git a/arch/ia64/uv/kernel/setup.c b/arch/ia64/uv/kernel/setup.c
index f1490657bafc..32d6ea2e89f8 100644
--- a/arch/ia64/uv/kernel/setup.c
+++ b/arch/ia64/uv/kernel/setup.c
@@ -19,12 +19,8 @@ EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
 
 #ifdef CONFIG_IA64_SGI_UV
 int sn_prom_type;
-long sn_partition_id;
-EXPORT_SYMBOL(sn_partition_id);
 long sn_coherency_id;
 EXPORT_SYMBOL_GPL(sn_coherency_id);
-long sn_region_size;
-EXPORT_SYMBOL(sn_region_size);
 #endif
 
 struct redir_addr {
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 6abfc8e92fcc..299032693934 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -200,9 +200,8 @@ config ENCLOSURE_SERVICES
 config SGI_XP
tristate "Support communication between SGI SSIs"
depends on NET
-   depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_UV) && 
SMP
-   select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
-   select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2
+   depends on (IA64_GENERIC || IA64_SGI_UV || X86_UV) && SMP
+   depends on X86_64 || BROKEN
select SGI_GRU if X86_64 && SMP
---help---
  An SGI machine can be divided into multiple Single System
diff --git a/drivers/misc/sgi-xp/Makefile b/drivers/misc/sgi-xp/Makefile
index bbb622c19c06..34c55a4045af 100644
--- a/drivers/misc/sgi-xp/Makefile
+++ b/drivers/misc/sgi-xp/Makefile
@@ -4,17 +4,10 @@
 #
 
 obj-$(CONFIG_SGI_XP)   += xp.o
-xp-y   := xp_main.o
-xp-$(CONFIG_IA64_SGI_SN2)  += xp_sn2.o xp_nofault.o
-xp-$(CONFIG_IA64_GENERIC)  += xp_sn2.o xp_nofault.o
-xp-$(CONFIG_IA64_SGI_UV)   += xp_uv.o
-xp-$(CONFIG_X86_64)+= xp_uv.o
+xp-y   := xp_main.o xp_uv.o
 
 obj-$(CONFIG_SGI_XP)   += xpc.o
-xpc-y  := xpc_main.o xpc_channel.o xpc_partition.o
-xpc-$(CONFIG_IA64_SGI_SN2) += xpc_sn2.o
-xpc-$(CONFIG_IA64_GENERIC) += xpc_sn2.o
-xpc-$(CONFIG_IA64_SGI_UV)  += xpc_uv.o
-xpc-$(CONFIG_X86_64)   += xpc_uv.o
+xpc-y  := xpc_main.o xpc_channel.o xpc_partition.o \
+  xpc_uv.o
 
 obj-$(CONFIG_SGI_XP)   += xpnet.o
diff --git a/drivers/misc/sgi-xp/xp.h b/drivers/misc/sgi-xp/xp.h
index b8069eec18cb..06469b12aced 100644
--- a/drivers/misc/sgi-xp/xp.h
+++ b/drivers/misc/sgi-xp/xp.h
@@ -24,23 +24,6 @@
 #define is_uv()0
 #endif
 
-#if defined CONFIG_IA64
-#include/* defines is_shub1() and is_shub2() */
-#define is_shub()  ia64_platform_is("sn2")
-#endif
-
-#ifndef is_shub1
-#define is_shub1() 0
-#endif
-
-#ifndef is_shub2
-#define is_shub2() 0
-#endif
-
-#ifndef is_shub
-#define is_shub()  0
-#endif
-
 #ifdef USE_DBUG_ON
 #define DBUG_ON(condition) BUG_ON(condition)
 #else
@@ -360,9 +343,7 @@ extern int xp_nofault_PIOR(void *);
 extern int xp_error_PIOR(void);
 
 extern struct device *xp;
-extern enum xp_retval xp_init_sn2(void);
 extern enum xp_retval xp_init_uv(void);
-extern void xp_exit_sn2(void);
 extern void xp_exit_uv(void);
 
 #endif /* _DRIVERS_MISC_SGIXP_XP_H */
diff --git a/drivers/misc/sgi-xp/xp_main.c b/drivers/misc/sgi-xp/xp_main.c
index 6d7f557fd1c1..5fd94d836070 100644
--- a/drivers/misc/sgi-xp/xp_main.c
+++ b/drivers/misc/sgi-xp/xp_main.c
@@ -233,9 +233,7 @@ xp_init(void)
for (ch_number = 0; ch_number < XPC_MAX_NCHANNELS; ch_number++)
mutex_init(_registrations[ch_number].mutex);
 
-   if (is_shub())
-   ret = xp_init_sn2();
-   else if (is_uv())
+   if (is_uv())
ret = xp_init_uv();
else
ret = 0;
@@ -251,9 +249,7 @@ module_init(xp_init);
 void __exit
 xp_exit(void)
 {
-   if 

RFC: remove sn2, hpsim and ia64 machvecs

[Christoph Hellwig]

Hi Tony,

let me know what you think of this series.  This drops the pretty much
dead sn2 and hpsim support, which then allows us to build a single ia64
kernel image that supports all remaining systems without extra indirections
in the fast path.

A git tree is also available at:

git://git.infradead.org/users/hch/misc.git ia64-remove-machvecs

Gitweb:


http://git.infradead.org/users/hch/misc.git/shortlog/refs/heads/ia64-remove-machvecs

Applied "ASoC: fsl_sai: Update Tx/Rx channel enable mask" to the asoc tree

[Mark Brown]

The patch

   ASoC: fsl_sai: Update Tx/Rx channel enable mask

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From b84f50b0fcb497a62068926fca793d2d213c7dbd Mon Sep 17 00:00:00 2001
From: Daniel Baluta 
Date: Tue, 6 Aug 2019 18:12:11 +0300
Subject: [PATCH] ASoC: fsl_sai: Update Tx/Rx channel enable mask

Tx channel enable (TCE) / Rx channel enable (RCE) bits
enable corresponding data channel for Tx/Rx operation.

Because SAI supports up the 8 channels TCE/RCE occupy
up the 8 bits inside TCR3/RCR3 registers we need to extend
the mask to reflect this.

Signed-off-by: Daniel Baluta 
Acked-by: Nicolin Chen 
Link: https://lore.kernel.org/r/20190806151214.6783-3-daniel.bal...@nxp.com
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_sai.c | 6 --
 sound/soc/fsl/fsl_sai.h | 1 +
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index e4221f2a5ee3..f2698c94c9fe 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -599,7 +599,8 @@ static int fsl_sai_startup(struct snd_pcm_substream 
*substream,
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
int ret;
 
-   regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE,
+   regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
+  FSL_SAI_CR3_TRCE_MASK,
   FSL_SAI_CR3_TRCE);
 
ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
@@ -614,7 +615,8 @@ static void fsl_sai_shutdown(struct snd_pcm_substream 
*substream,
struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 
-   regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), FSL_SAI_CR3_TRCE, 0);
+   regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx),
+  FSL_SAI_CR3_TRCE_MASK, 0);
 }
 
 static const struct snd_soc_dai_ops fsl_sai_pcm_dai_ops = {
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 4bb478041d67..20c5b9b1e8bc 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -110,6 +110,7 @@
 
 /* SAI Transmit and Receive Configuration 3 Register */
 #define FSL_SAI_CR3_TRCE   BIT(16)
+#define FSL_SAI_CR3_TRCE_MASK  GENMASK(23, 16)
 #define FSL_SAI_CR3_WDFL(x)(x)
 #define FSL_SAI_CR3_WDFL_MASK  0x1f
 
-- 
2.20.1

Applied "ASoC: fsl_sai: Add support for imx7ulp/imx8mq" to the asoc tree

[Mark Brown]

The patch

   ASoC: fsl_sai: Add support for imx7ulp/imx8mq

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From a860fac420971c5a90d4f78959b44ead793aee4f Mon Sep 17 00:00:00 2001
From: Daniel Baluta 
Date: Tue, 6 Aug 2019 18:12:13 +0300
Subject: [PATCH] ASoC: fsl_sai: Add support for imx7ulp/imx8mq

SAI module on imx7ulp/imx8m features 2 new registers (VERID and PARAM)
at the beginning of register address space.

On imx7ulp FIFOs can held up to 16 x 32 bit samples.
On imx8mq FIFOs can held up to 128 x 32 bit samples.

Signed-off-by: Daniel Baluta 
Acked-by: Nicolin Chen 
Link: https://lore.kernel.org/r/20190806151214.6783-5-daniel.bal...@nxp.com
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_sai.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 0c5452927c04..4a346fcb5630 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -1019,10 +1019,24 @@ static const struct fsl_sai_soc_data 
fsl_sai_imx6sx_data = {
.reg_offset = 0,
 };
 
+static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = {
+   .use_imx_pcm = true,
+   .fifo_depth = 16,
+   .reg_offset = 8,
+};
+
+static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = {
+   .use_imx_pcm = true,
+   .fifo_depth = 128,
+   .reg_offset = 8,
+};
+
 static const struct of_device_id fsl_sai_ids[] = {
{ .compatible = "fsl,vf610-sai", .data = _sai_vf610_data },
{ .compatible = "fsl,imx6sx-sai", .data = _sai_imx6sx_data },
{ .compatible = "fsl,imx6ul-sai", .data = _sai_imx6sx_data },
+   { .compatible = "fsl,imx7ulp-sai", .data = _sai_imx7ulp_data },
+   { .compatible = "fsl,imx8mq-sai", .data = _sai_imx8mq_data },
{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, fsl_sai_ids);
-- 
2.20.1

Applied "ASoC: fsl_sai: Add registers definition for multiple datalines" to the asoc tree

[Mark Brown]

The patch

   ASoC: fsl_sai: Add registers definition for multiple datalines

has been applied to the asoc tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 5f0ac20ed6db1d6da2eea8b862cf3d54fdfb5830 Mon Sep 17 00:00:00 2001
From: Daniel Baluta 
Date: Tue, 6 Aug 2019 18:12:10 +0300
Subject: [PATCH] ASoC: fsl_sai: Add registers definition for multiple
 datalines

SAI IP supports up to 8 data lines. The configuration of
supported number of data lines is decided at SoC integration
time.

This patch adds definitions for all related data TX/RX registers:
* TDR0..7, Transmit data register
* TFR0..7, Transmit FIFO register
* RDR0..7, Receive data register
* RFR0..7, Receive FIFO register

Signed-off-by: Daniel Baluta 
Acked-by: Nicolin Chen 
Link: https://lore.kernel.org/r/20190806151214.6783-2-daniel.bal...@nxp.com
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_sai.c | 76 +++--
 sound/soc/fsl/fsl_sai.h | 36 ---
 2 files changed, 98 insertions(+), 14 deletions(-)

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 8f4d9fa95599..e4221f2a5ee3 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -685,7 +685,14 @@ static struct reg_default fsl_sai_reg_defaults[] = {
{FSL_SAI_TCR3, 0},
{FSL_SAI_TCR4, 0},
{FSL_SAI_TCR5, 0},
-   {FSL_SAI_TDR,  0},
+   {FSL_SAI_TDR0, 0},
+   {FSL_SAI_TDR1, 0},
+   {FSL_SAI_TDR2, 0},
+   {FSL_SAI_TDR3, 0},
+   {FSL_SAI_TDR4, 0},
+   {FSL_SAI_TDR5, 0},
+   {FSL_SAI_TDR6, 0},
+   {FSL_SAI_TDR7, 0},
{FSL_SAI_TMR,  0},
{FSL_SAI_RCR1, 0},
{FSL_SAI_RCR2, 0},
@@ -704,7 +711,14 @@ static bool fsl_sai_readable_reg(struct device *dev, 
unsigned int reg)
case FSL_SAI_TCR3:
case FSL_SAI_TCR4:
case FSL_SAI_TCR5:
-   case FSL_SAI_TFR:
+   case FSL_SAI_TFR0:
+   case FSL_SAI_TFR1:
+   case FSL_SAI_TFR2:
+   case FSL_SAI_TFR3:
+   case FSL_SAI_TFR4:
+   case FSL_SAI_TFR5:
+   case FSL_SAI_TFR6:
+   case FSL_SAI_TFR7:
case FSL_SAI_TMR:
case FSL_SAI_RCSR:
case FSL_SAI_RCR1:
@@ -712,8 +726,22 @@ static bool fsl_sai_readable_reg(struct device *dev, 
unsigned int reg)
case FSL_SAI_RCR3:
case FSL_SAI_RCR4:
case FSL_SAI_RCR5:
-   case FSL_SAI_RDR:
-   case FSL_SAI_RFR:
+   case FSL_SAI_RDR0:
+   case FSL_SAI_RDR1:
+   case FSL_SAI_RDR2:
+   case FSL_SAI_RDR3:
+   case FSL_SAI_RDR4:
+   case FSL_SAI_RDR5:
+   case FSL_SAI_RDR6:
+   case FSL_SAI_RDR7:
+   case FSL_SAI_RFR0:
+   case FSL_SAI_RFR1:
+   case FSL_SAI_RFR2:
+   case FSL_SAI_RFR3:
+   case FSL_SAI_RFR4:
+   case FSL_SAI_RFR5:
+   case FSL_SAI_RFR6:
+   case FSL_SAI_RFR7:
case FSL_SAI_RMR:
return true;
default:
@@ -726,9 +754,30 @@ static bool fsl_sai_volatile_reg(struct device *dev, 
unsigned int reg)
switch (reg) {
case FSL_SAI_TCSR:
case FSL_SAI_RCSR:
-   case FSL_SAI_TFR:
-   case FSL_SAI_RFR:
-   case FSL_SAI_RDR:
+   case FSL_SAI_TFR0:
+   case FSL_SAI_TFR1:
+   case FSL_SAI_TFR2:
+   case FSL_SAI_TFR3:
+   case FSL_SAI_TFR4:
+   case FSL_SAI_TFR5:
+   case FSL_SAI_TFR6:
+   case FSL_SAI_TFR7:
+   case FSL_SAI_RFR0:
+   case FSL_SAI_RFR1:
+   case FSL_SAI_RFR2:
+   case FSL_SAI_RFR3:
+   case FSL_SAI_RFR4:
+   case FSL_SAI_RFR5:
+   case FSL_SAI_RFR6:
+   case FSL_SAI_RFR7:
+   case FSL_SAI_RDR0:
+   case FSL_SAI_RDR1:
+   case FSL_SAI_RDR2:
+   case FSL_SAI_RDR3:
+   case FSL_SAI_RDR4:
+   case FSL_SAI_RDR5:
+   case FSL_SAI_RDR6:
+   case FSL_SAI_RDR7:
return true;
default:
return false;
@@ -744,7 +793,14 @@ static bool fsl_sai_writeable_reg(struct device *dev, 
unsigned int reg)
case FSL_SAI_TCR3:
case FSL_SAI_TCR4:
case FSL_SAI_TCR5:
-   case FSL_SAI_TDR:
+   case FSL_SAI_TDR0:
+   case FSL_SAI_TDR1:
+   case FSL_SAI_TDR2:
+   

Re: [PATCH 3/5] serial: lantiq: Make IRQ & ISR assignment dynamic

[Andy Shevchenko]

On Wed, Aug 07, 2019 at 05:21:33PM +0800, Rahul Tanwar wrote:
> This driver/IP is reused across multiple SoCs. Older SoCs supported three
> separate IRQs for tx, rx & err interrupts. Newer Lightning Mountain SoC
> supports single IRQ for all of tx/rx/err interrupts. This patch modifies
> the driver design to support dynamic assignment of IRQ resources & ISRs
> based on devicetree node compatible entries.

> +struct ltq_soc_data {
> + int (*fetch_irq)(struct platform_device *pdev,
> +  struct ltq_uart_port *ltq_port);

This can be simple

int (*fetch_irq)(struct device *dev, struct ltq_uart_port 
*ltq_port);

(Note one line and struct device instead of platform_device)

> + int (*request_irq)(struct uart_port *port);
> + void(*free_irq)(struct uart_port *port);
> +};

> + retval = ltq_port->soc->request_irq(port);
> + if(retval)

Space is missed.

>   return retval;


> +static int fetch_irq_lantiq(struct platform_device *pdev,
> + struct ltq_uart_port *ltq_port)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + struct uart_port *port = _port->port;
> + struct resource irqres[3];
> + int ret;
> +
> + ret = of_irq_to_resource_table(node, irqres, 3);
> + if (ret != 3) {
> + dev_err(>dev,
> + "failed to get IRQs for serial port\n");
> + return -ENODEV;
> + }
> + ltq_port->tx_irq = irqres[0].start;
> + ltq_port->rx_irq = irqres[1].start;
> + ltq_port->err_irq = irqres[2].start;
> + port->irq = irqres[0].start;
> +

> + return ret;

I'm not sure you need to return known value. 0 will be good enough...

> +}

> + ltq_port->soc = of_device_get_match_data(>dev);
> + ret = ltq_port->soc->fetch_irq(pdev, ltq_port);

> + if (ret < 0)

...and thus simple...

if (ret)

...may be used.

> + return ret;

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH] kernfs: fix memleak in kernel_ops_readdir()

[Tony Lindgren]

Hi,

* Tejun Heo  [691231 23:00]:
> From: Andrea Arcangeli 
> 
> If getdents64 is killed or hits on segfault, it'll leave cgroups
> directories in sysfs pinned leaking memory because the kernfs node
> won't be freed on rmdir and the parent neither.

Somehow this causes a regression in Linux next for me where I'm seeing
lots of sysfs entries now missing under /sys/bus/platform/devices.

For example, I now only see one .serial entry show up in sysfs.
Things work again if I revert commit cc798c83898e ("kernfs: fix memleak
inkernel_ops_readdir()"). Any ideas why that would be?

Below is a diff -u of ls /sys/bus/platform/devices for reference
showing the missing entries with cc798c83898e.

Regards,

Tony

8< ---
--- works
+++ fails
@@ -1,227 +1,44 @@
-2c00.ethernet
 4010.interconnect
-4010.interconnect:segment@0
-40122000.mcbsp
-4012208c.target-module
-4012408c.target-module
 4012608c.target-module
-40128000.target-module
-4012c000.target-module
-4012e000.target-module
-4013.target-module
-4013.wdt
-40132000.target-module
 40138000.target-module
-40138000.timer
-4013a000.target-module
-4013a000.timer
-4013c000.target-module
-4013c000.timer
 4013e000.target-module
-4013e000.timer
-401f1000.target-module
-40304000.ocmcram
-4400.ocp
-4800.interconnect
-4800.interconnect:segment@0
-4800.interconnect:segment@20
-4802.serial
-48020050.target-module
-48032000.target-module
-48032000.timer
-48034000.target-module
-48034000.timer
-48036000.target-module
 48036000.timer
-4803e000.target-module
-4803e000.timer
 48055000.gpio
-48055000.target-module
-48057000.gpio
-48057000.target-module
-48059000.gpio
 48059000.target-module
-4805b000.gpio
-4805b000.target-module
-4805d000.gpio
 4805d000.target-module
-4806.i2c
-4806.target-module
-4806a000.serial
-4806a050.target-module
-4806c000.serial
-4806c050.target-module
 4806e000.serial
 4806e050.target-module
-4807.i2c
 4807.i2c:twl@48:gpadc
-4807.i2c:twl@48:pwm
-4807.i2c:twl@48:pwmled
-4807.i2c:twl@48:regulator-v1v8
-4807.i2c:twl@48:regulator-v2v1
 4807.i2c:twl@48:regulator-vana
-4807.i2c:twl@48:regulator-vaux1
-4807.i2c:twl@48:regulator-vaux2
-4807.i2c:twl@48:regulator-vaux3
 4807.i2c:twl@48:regulator-vcxio
-4807.i2c:twl@48:regulator-vdac
-4807.i2c:twl@48:regulator-vmmc
-4807.i2c:twl@48:regulator-vpp
-4807.i2c:twl@48:regulator-vusb
-4807.i2c:twl@48:regulator-vusim
-4807.i2c:twl@48:rtc
 4807.i2c:twl@48:usb-comparator
-4807.target-module
-48072000.i2c
-48072000.target-module
-48076000.target-module
-48078000.target-module
-48086000.target-module
 48086000.timer
-48088000.target-module
-48088000.timer
-4809608c.target-module
-48098000.spi
-48098000.target-module
-4809a000.spi
 4809a000.target-module
-4809c000.mmc
 4809c000.target-module
-480a5000.des
-480ad000.target-module
-480b2000.1w
-480b2000.target-module
-480b4000.target-module
 480b8000.spi
-480b8000.target-module
-480ba000.spi
-480ba000.target-module
-480d1000.target-module
 480d5000.mmc
-480d5000.target-module
-48240600.local-timer
 48242000.l2-cache-controller
-4835.i2c
-4835.target-module
-4a00.interconnect
-4a00.interconnect:segment@0
-4a00.interconnect:segment@10
-4a00.interconnect:segment@18
-4a00.interconnect:segment@20
-4a00.interconnect:segment@28
 4a00.interconnect:segment@30
 4a00.interconnect:segment@8
-4a002000.scm
-4a002000.scm_conf
-4a002000.target-module
-4a002260.bandgap
-4a002300.control-phy
-4a00233c.control-phy
-4a004000.cm1
-4a004000.target-module
-4a004300.mpuss_cm
-4a004400.tesla_cm
-4a004500.abe_cm
-4a008000.cm2
-4a008000.target-module
-4a008600.l4_ao_cm
-4a008700.l3_1_cm
-4a008800.l3_2_cm
-4a008900.ducati_cm
-4a008a00.l3_dma_cm
 4a008b00.l3_emif_cm
 4a008c00.d2d_cm
-4a008d00.l4_cfg_cm
 4a008e00.l3_instr_cm
-4a008f00.ivahd_cm
-4a009000.iss_cm
-4a009100.l3_dss_cm
-4a009200.l3_gfx_cm
-4a009300.l3_init_cm
-4a009400.l4_per_cm
-4a056000.dma-controller
 4a056000.target-module
-4a058000.hsi
-4a058000.target-module
 4a062000.target-module
-4a062000.usbhstll
-4a064000.target-module
 4a064000.usbhshost
 4a064800.ohci
-4a064c00.ehci
-4a066000.mmu
-4a0ab000.usb_otg_hs
 4a0ab400.target-module
-4a0ad000.ocp2scp
-4a0ad000.target-module
 4a0ad080.usb2phy
-4a0d9000.smartreflex
-4a0d9038.target-module
 4a0db000.smartreflex
-4a0db038.target-module
-4a0dd000.smartreflex
-4a0dd038.target-module
-4a0f4000.mailbox
-4a0f4000.target-module
-4a0f6000.spinlock
-4a0f6000.target-module
 4a10.target-module
 4a100040.pinmux
-4a1005a0.omap4_padconf_global
-4a100600.pbias_regulator
-4a10a000.target-module
-4a30.interconnect
-4a30.interconnect:segment@0
-4a30.interconnect:segment@1
 4a30.interconnect:segment@2
-4a306000.prm
-4a306000.target-module
-4a307bd0.regulator-abb-mpu
 4a30a000.scrm
-4a30a000.target-module
-4a30c000.target-module
 4a30c000.target-module:scm@c000
-4a31.gpio

[tip:x86/apic] x86/apic: Annotate global config variables as "read-only after init"

[tip-bot for Sean Christopherson]

Commit-ID:  6444b40eeda4f78f57b255dd7ecb8d3e5936eea2
Gitweb: https://git.kernel.org/tip/6444b40eeda4f78f57b255dd7ecb8d3e5936eea2
Author: Sean Christopherson 
AuthorDate: Mon, 5 Aug 2019 14:21:34 -0700
Committer:  Thomas Gleixner 
CommitDate: Wed, 7 Aug 2019 15:24:21 +0200

x86/apic: Annotate global config variables as "read-only after init"

Mark the APIC's global config variables that are constant after boot as
__ro_after_init to help document that the majority of the APIC config is
not changed at runtime, and to harden the kernel a smidge.

Signed-off-by: Sean Christopherson 
Signed-off-by: Thomas Gleixner 
Link: 
https://lkml.kernel.org/r/20190805212134.12001-1-sean.j.christopher...@intel.com

---
 arch/x86/kernel/apic/apic.c | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 831274e3c09f..3a31875bd0a3 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -65,10 +65,10 @@ unsigned int num_processors;
 unsigned disabled_cpus;
 
 /* Processor that is doing the boot up */
-unsigned int boot_cpu_physical_apicid = -1U;
+unsigned int boot_cpu_physical_apicid __ro_after_init = -1U;
 EXPORT_SYMBOL_GPL(boot_cpu_physical_apicid);
 
-u8 boot_cpu_apic_version;
+u8 boot_cpu_apic_version __ro_after_init;
 
 /*
  * The highest APIC ID seen during enumeration.
@@ -85,13 +85,13 @@ physid_mask_t phys_cpu_present_map;
  * disable_cpu_apicid=, mostly used for the kdump 2nd kernel to
  * avoid undefined behaviour caused by sending INIT from AP to BSP.
  */
-static unsigned int disabled_cpu_apicid __read_mostly = BAD_APICID;
+static unsigned int disabled_cpu_apicid __ro_after_init = BAD_APICID;
 
 /*
  * This variable controls which CPUs receive external NMIs.  By default,
  * external NMIs are delivered only to the BSP.
  */
-static int apic_extnmi = APIC_EXTNMI_BSP;
+static int apic_extnmi __ro_after_init = APIC_EXTNMI_BSP;
 
 /*
  * Map cpu index to physical APIC ID
@@ -114,7 +114,7 @@ EXPORT_EARLY_PER_CPU_SYMBOL(x86_cpu_to_acpiid);
 DEFINE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid, BAD_APICID);
 
 /* Local APIC was disabled by the BIOS and enabled by the kernel */
-static int enabled_via_apicbase;
+static int enabled_via_apicbase __ro_after_init;
 
 /*
  * Handle interrupt mode configuration register (IMCR).
@@ -172,23 +172,23 @@ static __init int setup_apicpmtimer(char *s)
 __setup("apicpmtimer", setup_apicpmtimer);
 #endif
 
-unsigned long mp_lapic_addr;
-int disable_apic;
+unsigned long mp_lapic_addr __ro_after_init;
+int disable_apic __ro_after_init;
 /* Disable local APIC timer from the kernel commandline or via dmi quirk */
 static int disable_apic_timer __initdata;
 /* Local APIC timer works in C2 */
-int local_apic_timer_c2_ok;
+int local_apic_timer_c2_ok __ro_after_init;
 EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok);
 
 /*
  * Debug level, exported for io_apic.c
  */
-int apic_verbosity;
+int apic_verbosity __ro_after_init;
 
-int pic_mode;
+int pic_mode __ro_after_init;
 
 /* Have we found an MP table */
-int smp_found_config;
+int smp_found_config __ro_after_init;
 
 static struct resource lapic_resource = {
.name = "Local APIC",
@@ -199,7 +199,7 @@ unsigned int lapic_timer_period = 0;
 
 static void apic_pm_activate(void);
 
-static unsigned long apic_phys;
+static unsigned long apic_phys __ro_after_init;
 
 /*
  * Get the LAPIC version
@@ -1278,7 +1278,7 @@ void __init sync_Arb_IDs(void)
APIC_INT_LEVELTRIG | APIC_DM_INIT);
 }
 
-enum apic_intr_mode_id apic_intr_mode;
+enum apic_intr_mode_id apic_intr_mode __ro_after_init;
 
 static int __init apic_intr_mode_select(void)
 {

[tip:x86/boot] x86/boot: Save fields explicitly, zero out everything else

[tip-bot for John Hubbard]

Commit-ID:  a156cadef2fe445ac423670eace517b39a01ccd0
Gitweb: https://git.kernel.org/tip/a156cadef2fe445ac423670eace517b39a01ccd0
Author: John Hubbard 
AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700
Committer:  Thomas Gleixner 
CommitDate: Wed, 7 Aug 2019 15:22:53 +0200

x86/boot: Save fields explicitly, zero out everything else

Recent gcc compilers (gcc 9.1) generate warnings about an out of bounds
memset, if the memset goes accross several fields of a struct. This
generated a couple of warnings on x86_64 builds in sanitize_boot_params().

Fix this by explicitly saving the fields in struct boot_params
that are intended to be preserved, and zeroing all the rest.

Suggested-by: Thomas Gleixner 
Suggested-by: H. Peter Anvin 
Signed-off-by: John Hubbard 
Signed-off-by: Thomas Gleixner 
Link: https://lkml.kernel.org/r/20190731054627.5627-2-jhubb...@nvidia.com
---
 arch/x86/include/asm/bootparam_utils.h | 63 ++
 1 file changed, 48 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/bootparam_utils.h 
b/arch/x86/include/asm/bootparam_utils.h
index 101eb944f13c..f5e90a849bca 100644
--- a/arch/x86/include/asm/bootparam_utils.h
+++ b/arch/x86/include/asm/bootparam_utils.h
@@ -18,6 +18,20 @@
  * Note: efi_info is commonly left uninitialized, but that field has a
  * private magic, so it is better to leave it unchanged.
  */
+
+#define sizeof_mbr(type, member) ({ sizeof(((type *)0)->member); })
+
+#define BOOT_PARAM_PRESERVE(struct_member) \
+   {   \
+   .start = offsetof(struct boot_params, struct_member),   \
+   .len   = sizeof_mbr(struct boot_params, struct_member), \
+   }
+
+struct boot_params_to_save {
+   unsigned int start;
+   unsigned int len;
+};
+
 static void sanitize_boot_params(struct boot_params *boot_params)
 {
/* 
@@ -35,21 +49,40 @@ static void sanitize_boot_params(struct boot_params 
*boot_params)
 * problems again.
 */
if (boot_params->sentinel) {
-   /* fields in boot_params are left uninitialized, clear them */
-   boot_params->acpi_rsdp_addr = 0;
-   memset(_params->ext_ramdisk_image, 0,
-  (char *)_params->efi_info -
-   (char *)_params->ext_ramdisk_image);
-   memset(_params->kbd_status, 0,
-  (char *)_params->hdr -
-  (char *)_params->kbd_status);
-   memset(_params->_pad7[0], 0,
-  (char *)_params->edd_mbr_sig_buffer[0] -
-   (char *)_params->_pad7[0]);
-   memset(_params->_pad8[0], 0,
-  (char *)_params->eddbuf[0] -
-   (char *)_params->_pad8[0]);
-   memset(_params->_pad9[0], 0, sizeof(boot_params->_pad9));
+   static struct boot_params scratch;
+   char *bp_base = (char *)boot_params;
+   char *save_base = (char *)
+   int i;
+
+   const struct boot_params_to_save to_save[] = {
+   BOOT_PARAM_PRESERVE(screen_info),
+   BOOT_PARAM_PRESERVE(apm_bios_info),
+   BOOT_PARAM_PRESERVE(tboot_addr),
+   BOOT_PARAM_PRESERVE(ist_info),
+   BOOT_PARAM_PRESERVE(acpi_rsdp_addr),
+   BOOT_PARAM_PRESERVE(hd0_info),
+   BOOT_PARAM_PRESERVE(hd1_info),
+   BOOT_PARAM_PRESERVE(sys_desc_table),
+   BOOT_PARAM_PRESERVE(olpc_ofw_header),
+   BOOT_PARAM_PRESERVE(efi_info),
+   BOOT_PARAM_PRESERVE(alt_mem_k),
+   BOOT_PARAM_PRESERVE(scratch),
+   BOOT_PARAM_PRESERVE(e820_entries),
+   BOOT_PARAM_PRESERVE(eddbuf_entries),
+   BOOT_PARAM_PRESERVE(edd_mbr_sig_buf_entries),
+   BOOT_PARAM_PRESERVE(edd_mbr_sig_buffer),
+   BOOT_PARAM_PRESERVE(e820_table),
+   BOOT_PARAM_PRESERVE(eddbuf),
+   };
+
+   memset(, 0, sizeof(scratch));
+
+   for (i = 0; i < ARRAY_SIZE(to_save); i++) {
+   memcpy(save_base + to_save[i].start,
+  bp_base + to_save[i].start, to_save[i].len);
+   }
+
+   memcpy(boot_params, save_base, sizeof(*boot_params));
}
 }
 

Re: [PATCH] i2c: imx: Allow the driver to be built for ARM64 SoCs such as i.MX8M

[Schrempf Frieder]

On 07.08.19 14:09, Alexander Stein wrote:
> On Wednesday, August 7, 2019, 1:44:06 PM CEST Schrempf Frieder wrote:
>> From: Frieder Schrempf 
>>
>> The imx I2C controller is used in some ARM64 SoCs such as i.MX8M.
>> To make use of it, append ARM64 to the list of dependencies.
>>
>> Signed-off-by: Frieder Schrempf 
>> ---
>>   drivers/i2c/busses/Kconfig | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
>> index 09367fc014c3..46b653621513 100644
>> --- a/drivers/i2c/busses/Kconfig
>> +++ b/drivers/i2c/busses/Kconfig
>> @@ -664,7 +664,7 @@ config I2C_IMG
>>   
>>   config I2C_IMX
>>  tristate "IMX I2C interface"
>> -depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE
>> +depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE || ARM64
> 
> I don't think this should be necessary at all as ARCH_MXC is also available 
> for arm64, see 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/Kconfig.platforms#n167
> I rather wonder why ARCH_MXC is not set. Same for fec.

You're right of course. I somehow managed to mess up my defconfig. I 
started over with a clean config from arch/arm64/configs/defconfig and 
everything seems fine now. Sorry for the noise.

> 
>>  help
>>Say Y here if you want to use the IIC bus controller on
>>the Freescale i.MX/MXC, Layerscape or ColdFire processors.
>>
> 
> 
> 
> 

Re: [PATCH] net: fec: Allow the driver to be built for ARM64 SoCs such as i.MX8

[Schrempf Frieder]

On 07.08.19 14:20, Fabio Estevam wrote:
> Hi Frieder,
> 
> On Wed, Aug 7, 2019 at 9:04 AM Schrempf Frieder
>  wrote:
>>
>> From: Frieder Schrempf 
>>
>> The FEC ethernet controller is used in some ARM64 SoCs such as i.MX8.
>> To make use of it, append ARM64 to the list of dependencies.
> 
> ARCH_MXC is also used by i.MX8, so there is no need for such change.

You're right of course. I somehow managed to mess up my defconfig. I 
started over with a clean config from arch/arm64/configs/defconfig and 
everything seems fine now. Sorry for the noise.

> 
> By the way: arch/arm64/configs/defconfig has CONFIG_FEC=y by default.
> 

[PATCH] of: irq: fix a trivial typo in a doc comment

[Lubomir Rintel]

Diverged from what the code does with commit 530210c7814e ("of/irq: Replace
of_irq with of_phandle_args").

Signed-off-by: Lubomir Rintel 
---
 drivers/of/irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 7f84bb4903caa..a296eaf52a5b2 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -277,7 +277,7 @@ EXPORT_SYMBOL_GPL(of_irq_parse_raw);
  * of_irq_parse_one - Resolve an interrupt for a device
  * @device: the device whose interrupt is to be resolved
  * @index: index of the interrupt to resolve
- * @out_irq: structure of_irq filled by this function
+ * @out_irq: structure of_phandle_args filled by this function
  *
  * This function resolves an interrupt for a node by walking the interrupt 
tree,
  * finding which interrupt controller node it is attached to, and returning the
-- 
2.21.0

[PATCH] PCI: OF: fix a trivial typo in a doc comment

[Lubomir Rintel]

Diverged from what the code does with commit 530210c7814e ("of/irq: Replace
of_irq with of_phandle_args").

Signed-off-by: Lubomir Rintel 
---
 drivers/pci/of.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index bc7b27a28795d..36891e7deee34 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -353,7 +353,7 @@ EXPORT_SYMBOL_GPL(devm_of_pci_get_host_bridge_resources);
 /**
  * of_irq_parse_pci - Resolve the interrupt for a PCI device
  * @pdev:   the device whose interrupt is to be resolved
- * @out_irq:structure of_irq filled by this function
+ * @out_irq:structure of_phandle_args filled by this function
  *
  * This function resolves the PCI interrupt for a given PCI device. If a
  * device-node exists for a given pci_dev, it will use normal OF tree
-- 
2.21.0

Re: [PATCH 1/9] KVM: arm64: Document PV-time interface

[Steven Price]

On 05/08/2019 17:40, Christophe de Dinechin wrote:
> 
> Steven Price writes:
> 
>> Introduce a paravirtualization interface for KVM/arm64 based on the
>> "Arm Paravirtualized Time for Arm-Base Systems" specification DEN 0057A.
>>
>> This only adds the details about "Stolen Time" as the details of "Live
>> Physical Time" have not been fully agreed.
>>
> [...]
> 
>> +
>> +Stolen Time
>> +---
>> +
>> +The structure pointed to by the PV_TIME_ST hypercall is as follows:
>> +
>> +  Field   | Byte Length | Byte Offset | Description
>> +  --- | --- | --- | --
>> +  Revision|  4  |  0  | Must be 0 for version 0.1
>> +  Attributes  |  4  |  4  | Must be 0
>> +  Stolen time |  8  |  8  | Stolen time in unsigned
>> +  | | | nanoseconds indicating how
>> +  | | | much time this VCPU thread
>> +  | | | was involuntarily not
>> +  | | | running on a physical CPU.
> 
> I know very little about the topic, but I don't understand how the spec
> as proposed allows an accurate reading of the relation between physical
> time and stolen time simultaneously. In other words, could you draw
> Figure 1 of the spec from within the guest? Or is it a non-objective?

Figure 1 is mostly attempting to explain Live Physical Time (LPT), which
is not part of this patch series. But it does touch on stolen time by
the difference between "live physical time" and "virtual time".

I'm not sure what you mean by "from within the guest". From the
perspective of the guest the parts of the diagram where the guest isn't
running don't exist (therefore there are discontinuities in the
"physical time" and "live physical time" lines).

This patch series doesn't attempt to provide the guest with a view of
"physical time" (or LPT) - but it might be able to observe that by
consulting something external (e.g. an NTP server, or an emulated RTC
which reports wall-clock time).

What it does provide is a mechanism for obtaining the difference (as
reported by the host) between "live physical time" and "virtual time" -
this is reported in nanoseconds in the above structure.

> For example, if you read the stolen time before you read CNTVCT_EL0,
> isn't it possible for a lengthy event like a migration to occur between
> the two reads, causing the stolen time to be obsolete and off by seconds?

"Lengthy events" like migration are represented by the "paused" state in
the diagram - i.e. it's the difference between "physical time" and "live
physical time". So stolen time doesn't attempt to represent that.

And yes, there is a race between reading CNTVCT_EL0 and reading stolen
time - but in practice this doesn't really matter. The usual pseudo-code
way of using stolen time is:

  * scheduler captures stolen time from structure and CNTVCT_EL0:
  before_timer = CNTVCT_EL0
  before_stolen = stolen
  * schedule in process
  * process is pre-empted (or blocked in some way)
  * scheduler captures stolen time from structure and CNTVCT_EL0:
  after_timer = CNTVCT_EL0
  after_stolen = stolen
  time = to_nsecs(after_timer - before_timer) -
 (after_stolen - before_stolen)

The scheduler can then charge the process for "time" nanoseconds of
time. This ensures that a process isn't unfairly penalised if the host
doesn't schedule the VCPU while it is supposed to be running.

The race is very small in comparison to the time the process is running,
and in the worst case just means the process is charged slightly more
(or less) than it should be.

I guess if you're really worried about it, you could do a dance like:

do {
before = stolen
timer = CNTVCT_EL0
after = stolen
} while (before != after);

But I don't see the need to have such an accurate view of elapsed time
that the VCPU was scheduled. And of course at the moment (without this
series) the guest has no idea about time stolen by the host.

Steve

Re: [PATCH 2/5] serial: lantiq: Use proper DT compatible string

[Andy Shevchenko]

On Wed, Aug 07, 2019 at 05:21:32PM +0800, Rahul Tanwar wrote:
> The patch adds change to use explicit string instead of a macro for
> DT compatible string.

For consistency you may need to convert OF_EARLYCON_DECLARE() as well.

Perhaps commit message should explain the rationale, i.e. the following patches
will add another compatible string and thus it makes sense to have them
explicitly mentioned.

> Suggested-by: Andy Shevchenko 
> Signed-off-by: Rahul Tanwar 
> ---
>  drivers/tty/serial/lantiq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
> index 42e27b48e9cc..1116261c973e 100644
> --- a/drivers/tty/serial/lantiq.c
> +++ b/drivers/tty/serial/lantiq.c
> @@ -792,7 +792,7 @@ lqasc_probe(struct platform_device *pdev)
>  }
>  
>  static const struct of_device_id ltq_asc_match[] = {
> - { .compatible = DRVNAME },
> + { .compatible = "lantiq,asc" },
>   {},
>  };
>  
> -- 
> 2.11.0
> 

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

[Vladimir Oltean]

On Wed, 7 Aug 2019 at 16:19, Vladimir Oltean  wrote:
>
> On Wed, 7 Aug 2019 at 16:09, YueHaibing  wrote:
> >
> > Fixes gcc '-Wunused-but-set-variable' warning:
> >
> > drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
> > drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
> >  variable tx_vid set but not used [-Wunused-but-set-variable]
> > drivers/net/dsa/sja1105/sja1105_main.c:1226:6: warning:
> >  variable rx_vid set but not used [-Wunused-but-set-variable]
> >
> > They are not used since commit 6d7c7d948a2e ("net: dsa:
> > sja1105: Fix broken learning with vlan_filtering disabled")
> >
> > Reported-by: Hulk Robot 
> > Signed-off-by: YueHaibing 
> > ---
>
> Reviewed-by: Vladimir Oltean 

This patch should also go to the "net" tree.

>
> >  drivers/net/dsa/sja1105/sja1105_main.c | 4 
> >  1 file changed, 4 deletions(-)
> >
> > diff --git a/drivers/net/dsa/sja1105/sja1105_main.c 
> > b/drivers/net/dsa/sja1105/sja1105_main.c
> > index d073baf..df976b25 100644
> > --- a/drivers/net/dsa/sja1105/sja1105_main.c
> > +++ b/drivers/net/dsa/sja1105/sja1105_main.c
> > @@ -1223,12 +1223,8 @@ static int sja1105_fdb_dump(struct dsa_switch *ds, 
> > int port,
> >  {
> > struct sja1105_private *priv = ds->priv;
> > struct device *dev = ds->dev;
> > -   u16 rx_vid, tx_vid;
> > int i;
> >
> > -   rx_vid = dsa_8021q_rx_vid(ds, port);
> > -   tx_vid = dsa_8021q_tx_vid(ds, port);
> > -
> > for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
> > struct sja1105_l2_lookup_entry l2_lookup = {0};
> > u8 macaddr[ETH_ALEN];
> > --
> > 2.7.4
> >
> >

Re: [PATCH 06/16] net: phy: adin: support PHY mode converters

[Andrew Lunn]

> Is it ok if we defer the solution for this drivers/patchset?

Yes, not a problem if phy-mode means phy-mode.

 Andrew

Re: [PATCH 1/5] serial: lantiq: Add SMP support

[Andy Shevchenko]

On Wed, Aug 07, 2019 at 05:21:31PM +0800, Rahul Tanwar wrote:
> The existing driver can only support single core SoC. But new multicore
> platforms which reuse the same driver/IP need SMP support. This patch adds
> multicore support in the driver.

Reviewed-by: Andy Shevchenko 

> 
> Signed-off-by: Rahul Tanwar 
> ---
>  drivers/tty/serial/lantiq.c | 47 
> ++---
>  1 file changed, 32 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/tty/serial/lantiq.c b/drivers/tty/serial/lantiq.c
> index 9de9f0f239a1..42e27b48e9cc 100644
> --- a/drivers/tty/serial/lantiq.c
> +++ b/drivers/tty/serial/lantiq.c
> @@ -99,7 +99,6 @@
>  static void lqasc_tx_chars(struct uart_port *port);
>  static struct ltq_uart_port *lqasc_port[MAXPORTS];
>  static struct uart_driver lqasc_reg;
> -static DEFINE_SPINLOCK(ltq_asc_lock);
>  
>  struct ltq_uart_port {
>   struct uart_portport;
> @@ -110,6 +109,7 @@ struct ltq_uart_port {
>   unsigned inttx_irq;
>   unsigned intrx_irq;
>   unsigned interr_irq;
> + spinlock_t  lock; /* exclusive access for multi core */
>  };
>  
>  static inline void asc_update_bits(u32 clear, u32 set, void __iomem *reg)
> @@ -135,9 +135,11 @@ static void
>  lqasc_start_tx(struct uart_port *port)
>  {
>   unsigned long flags;
> - spin_lock_irqsave(_asc_lock, flags);
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> +
> + spin_lock_irqsave(_port->lock, flags);
>   lqasc_tx_chars(port);
> - spin_unlock_irqrestore(_asc_lock, flags);
> + spin_unlock_irqrestore(_port->lock, flags);
>   return;
>  }
>  
> @@ -245,9 +247,11 @@ lqasc_tx_int(int irq, void *_port)
>  {
>   unsigned long flags;
>   struct uart_port *port = (struct uart_port *)_port;
> - spin_lock_irqsave(_asc_lock, flags);
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> +
> + spin_lock_irqsave(_port->lock, flags);
>   __raw_writel(ASC_IRNCR_TIR, port->membase + LTQ_ASC_IRNCR);
> - spin_unlock_irqrestore(_asc_lock, flags);
> + spin_unlock_irqrestore(_port->lock, flags);
>   lqasc_start_tx(port);
>   return IRQ_HANDLED;
>  }
> @@ -257,11 +261,13 @@ lqasc_err_int(int irq, void *_port)
>  {
>   unsigned long flags;
>   struct uart_port *port = (struct uart_port *)_port;
> - spin_lock_irqsave(_asc_lock, flags);
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> +
> + spin_lock_irqsave(_port->lock, flags);
>   /* clear any pending interrupts */
>   asc_update_bits(0, ASCWHBSTATE_CLRPE | ASCWHBSTATE_CLRFE |
>   ASCWHBSTATE_CLRROE, port->membase + LTQ_ASC_WHBSTATE);
> - spin_unlock_irqrestore(_asc_lock, flags);
> + spin_unlock_irqrestore(_port->lock, flags);
>   return IRQ_HANDLED;
>  }
>  
> @@ -270,10 +276,12 @@ lqasc_rx_int(int irq, void *_port)
>  {
>   unsigned long flags;
>   struct uart_port *port = (struct uart_port *)_port;
> - spin_lock_irqsave(_asc_lock, flags);
> + struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> +
> + spin_lock_irqsave(_port->lock, flags);
>   __raw_writel(ASC_IRNCR_RIR, port->membase + LTQ_ASC_IRNCR);
>   lqasc_rx_chars(port);
> - spin_unlock_irqrestore(_asc_lock, flags);
> + spin_unlock_irqrestore(_port->lock, flags);
>   return IRQ_HANDLED;
>  }
>  
> @@ -307,11 +315,13 @@ lqasc_startup(struct uart_port *port)
>  {
>   struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
>   int retval;
> + unsigned long flags;
>  
>   if (!IS_ERR(ltq_port->clk))
>   clk_prepare_enable(ltq_port->clk);
>   port->uartclk = clk_get_rate(ltq_port->freqclk);
>  
> + spin_lock_irqsave(_port->lock, flags);
>   asc_update_bits(ASCCLC_DISS | ASCCLC_RMCMASK, (1 << ASCCLC_RMCOFFSET),
>   port->membase + LTQ_ASC_CLC);
>  
> @@ -331,6 +341,8 @@ lqasc_startup(struct uart_port *port)
>   asc_update_bits(0, ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN |
>   ASCCON_ROEN, port->membase + LTQ_ASC_CON);
>  
> + spin_unlock_irqrestore(_port->lock, flags);
> +
>   retval = request_irq(ltq_port->tx_irq, lqasc_tx_int,
>   0, "asc_tx", port);
>   if (retval) {
> @@ -367,15 +379,19 @@ static void
>  lqasc_shutdown(struct uart_port *port)
>  {
>   struct ltq_uart_port *ltq_port = to_ltq_uart_port(port);
> + unsigned long flags;
> +
>   free_irq(ltq_port->tx_irq, port);
>   free_irq(ltq_port->rx_irq, port);
>   free_irq(ltq_port->err_irq, port);
>  
> + spin_lock_irqsave(_port->lock, flags);
>   __raw_writel(0, port->membase + LTQ_ASC_CON);
>   asc_update_bits(ASCRXFCON_RXFEN, ASCRXFCON_RXFFLU,
>   port->membase + LTQ_ASC_RXFCON);
>   asc_update_bits(ASCTXFCON_TXFEN, ASCTXFCON_TXFFLU,
>   port->membase + LTQ_ASC_TXFCON);
> + spin_unlock_irqrestore(_port->lock, flags);
>   if 

Re: [PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

[Vladimir Oltean]

On Wed, 7 Aug 2019 at 16:09, YueHaibing  wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
> drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
>  variable tx_vid set but not used [-Wunused-but-set-variable]
> drivers/net/dsa/sja1105/sja1105_main.c:1226:6: warning:
>  variable rx_vid set but not used [-Wunused-but-set-variable]
>
> They are not used since commit 6d7c7d948a2e ("net: dsa:
> sja1105: Fix broken learning with vlan_filtering disabled")
>
> Reported-by: Hulk Robot 
> Signed-off-by: YueHaibing 
> ---

Reviewed-by: Vladimir Oltean 

>  drivers/net/dsa/sja1105/sja1105_main.c | 4 
>  1 file changed, 4 deletions(-)
>
> diff --git a/drivers/net/dsa/sja1105/sja1105_main.c 
> b/drivers/net/dsa/sja1105/sja1105_main.c
> index d073baf..df976b25 100644
> --- a/drivers/net/dsa/sja1105/sja1105_main.c
> +++ b/drivers/net/dsa/sja1105/sja1105_main.c
> @@ -1223,12 +1223,8 @@ static int sja1105_fdb_dump(struct dsa_switch *ds, int 
> port,
>  {
> struct sja1105_private *priv = ds->priv;
> struct device *dev = ds->dev;
> -   u16 rx_vid, tx_vid;
> int i;
>
> -   rx_vid = dsa_8021q_rx_vid(ds, port);
> -   tx_vid = dsa_8021q_tx_vid(ds, port);
> -
> for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
> struct sja1105_l2_lookup_entry l2_lookup = {0};
> u8 macaddr[ETH_ALEN];
> --
> 2.7.4
>
>

Re: [PATCH 0/8] irqdomain/debugfs: Fix uses of irq_domain_alloc_fwnode

[Thomas Gleixner]

On Tue, 6 Aug 2019, Marc Zyngier wrote:

> I recently noticed that all irq_domain_alloc_fwnode were passing a VA
> to it, which is unfortunate as this is designed to appear in debugfs
> (and we don't like to leak VAs). Disaster was avoided thanks to our
> ptrval friend, but it remains that the whole thing is pretty
> useless if you have more than a single domain (they all have the same
> name and creation fails).
> 
> In order to sort it out, change all users of irq_domain_alloc_fwnode
> to pass the PA of the irqchip the domain will be associated with. One
> notable exception is the HyperV PCI controller driver which has no PA
> to associate with. This is solved by using a named fwnode instead,
> using the device GUID.
> 
> Finally, irq_domain_alloc_fwnode() is changed to pa a pionter to a PA,
> which can be safely advertised in debugfs.

Acked-by: Thomas Gleixner 

[PATCH net] net: phy: rtl8211f: do a double read to get real time link status

[Yonglong Liu]

[   27.232781] hns3 :bd:00.3 eth7: net open
[   27.237303] 8021q: adding VLAN 0 to HW filter on device eth7
[   27.242972] IPv6: ADDRCONF(NETDEV_CHANGE): eth7: link becomes ready
[   27.29] hns3 :bd:00.3: invalid speed (-1)
[   27.253904] hns3 :bd:00.3 eth7: failed to adjust link.
[   27.259379] RTL8211F Gigabit Ethernet mii-:bd:00.3:07: PHY state change 
UP -> RUNNING
[   27.924903] hns3 :bd:00.3 eth7: link up
[   28.280479] RTL8211F Gigabit Ethernet mii-:bd:00.3:07: PHY state change 
RUNNING -> NOLINK
[   29.208452] hns3 :bd:00.3 eth7: link down
[   32.376745] RTL8211F Gigabit Ethernet mii-:bd:00.3:07: PHY state change 
NOLINK -> RUNNING
[   33.208448] hns3 :bd:00.3 eth7: link up
[   35.253821] hns3 :bd:00.3 eth7: net stop
[   35.258270] hns3 :bd:00.3 eth7: link down

When using rtl8211f in polling mode, may get a invalid speed,
because of reading a fake link up and autoneg complete status
immediately after starting autoneg:

ifconfig-1176  [007] 27.232763: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x00 val:0x1040
  kworker/u257:1-670   [015] 27.232805: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x04 val:0x01e1
  kworker/u257:1-670   [015] 27.232815: mdio_access: mii-:bd:00.3 
write phy:0x07 reg:0x04 val:0x05e1
  kworker/u257:1-670   [015] 27.232869: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x01 val:0x79ad
  kworker/u257:1-670   [015] 27.232904: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x09 val:0x0200
  kworker/u257:1-670   [015] 27.232940: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x00 val:0x1040
  kworker/u257:1-670   [015] 27.232949: mdio_access: mii-:bd:00.3 
write phy:0x07 reg:0x00 val:0x1240
  kworker/u257:1-670   [015] 27.233003: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x01 val:0x79ad
  kworker/u257:1-670   [015] 27.233039: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x0a val:0x3002
  kworker/u257:1-670   [015] 27.233074: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x09 val:0x0200
  kworker/u257:1-670   [015] 27.233110: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x05 val:0x
  kworker/u257:1-670   [000] 28.280475: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x01 val:0x7989
  kworker/u257:1-670   [000] 29.304471: mdio_access: mii-:bd:00.3 
read  phy:0x07 reg:0x01 val:0x7989

According to the datasheet of rtl8211f, to get the real time
link status, need to read MII_BMSR twice.

This patch add a read_status hook for rtl8211f, and do a fake
phy_read before genphy_read_status(), so that can get real link
status in genphy_read_status().

Signed-off-by: Yonglong Liu 
---
 drivers/net/phy/realtek.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index a669945..92e27d5 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -256,6 +256,18 @@ static int rtl8366rb_config_init(struct phy_device *phydev)
return ret;
 }
 
+static int rtl8211f_read_status(struct phy_device *phydev)
+{
+   int status;
+
+   /* do a fake read */
+   status = phy_read(phydev, MII_BMSR);
+   if (status < 0)
+   return status;
+
+   return genphy_read_status(phydev);
+}
+
 static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x8201),
@@ -325,6 +337,7 @@ static struct phy_driver realtek_drvs[] = {
.resume = genphy_resume,
.read_page  = rtl821x_read_page,
.write_page = rtl821x_write_page,
+   .read_status= rtl8211f_read_status,
}, {
PHY_ID_MATCH_EXACT(0x001cc800),
.name   = "Generic Realtek PHY",
-- 
2.8.1

[tip:x86/boot] x86/boot: Save fields explicitly, zero out everything else

[tip-bot for John Hubbard]

Commit-ID:  610666f0581557944c3abec93a7c125b8303442c
Gitweb: https://git.kernel.org/tip/610666f0581557944c3abec93a7c125b8303442c
Author: John Hubbard 
AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700
Committer:  Thomas Gleixner 
CommitDate: Wed, 7 Aug 2019 15:16:04 +0200

x86/boot: Save fields explicitly, zero out everything else

Recent gcc compilers (gcc 9.1) generate warnings about an
out of bounds memset, if you trying memset across several fields
of a struct. This generated a couple of warnings on x86_64 builds.

Fix this by explicitly saving the fields in struct boot_params
that are intended to be preserved, and zeroing all the rest.

Suggested-by: Thomas Gleixner 
Suggested-by: H. Peter Anvin 
Signed-off-by: John Hubbard 
Signed-off-by: Thomas Gleixner 
Link: https://lkml.kernel.org/r/20190731054627.5627-2-jhubb...@nvidia.com

---
 arch/x86/include/asm/bootparam_utils.h | 63 ++
 1 file changed, 48 insertions(+), 15 deletions(-)

diff --git a/arch/x86/include/asm/bootparam_utils.h 
b/arch/x86/include/asm/bootparam_utils.h
index 101eb944f13c..f5e90a849bca 100644
--- a/arch/x86/include/asm/bootparam_utils.h
+++ b/arch/x86/include/asm/bootparam_utils.h
@@ -18,6 +18,20 @@
  * Note: efi_info is commonly left uninitialized, but that field has a
  * private magic, so it is better to leave it unchanged.
  */
+
+#define sizeof_mbr(type, member) ({ sizeof(((type *)0)->member); })
+
+#define BOOT_PARAM_PRESERVE(struct_member) \
+   {   \
+   .start = offsetof(struct boot_params, struct_member),   \
+   .len   = sizeof_mbr(struct boot_params, struct_member), \
+   }
+
+struct boot_params_to_save {
+   unsigned int start;
+   unsigned int len;
+};
+
 static void sanitize_boot_params(struct boot_params *boot_params)
 {
/* 
@@ -35,21 +49,40 @@ static void sanitize_boot_params(struct boot_params 
*boot_params)
 * problems again.
 */
if (boot_params->sentinel) {
-   /* fields in boot_params are left uninitialized, clear them */
-   boot_params->acpi_rsdp_addr = 0;
-   memset(_params->ext_ramdisk_image, 0,
-  (char *)_params->efi_info -
-   (char *)_params->ext_ramdisk_image);
-   memset(_params->kbd_status, 0,
-  (char *)_params->hdr -
-  (char *)_params->kbd_status);
-   memset(_params->_pad7[0], 0,
-  (char *)_params->edd_mbr_sig_buffer[0] -
-   (char *)_params->_pad7[0]);
-   memset(_params->_pad8[0], 0,
-  (char *)_params->eddbuf[0] -
-   (char *)_params->_pad8[0]);
-   memset(_params->_pad9[0], 0, sizeof(boot_params->_pad9));
+   static struct boot_params scratch;
+   char *bp_base = (char *)boot_params;
+   char *save_base = (char *)
+   int i;
+
+   const struct boot_params_to_save to_save[] = {
+   BOOT_PARAM_PRESERVE(screen_info),
+   BOOT_PARAM_PRESERVE(apm_bios_info),
+   BOOT_PARAM_PRESERVE(tboot_addr),
+   BOOT_PARAM_PRESERVE(ist_info),
+   BOOT_PARAM_PRESERVE(acpi_rsdp_addr),
+   BOOT_PARAM_PRESERVE(hd0_info),
+   BOOT_PARAM_PRESERVE(hd1_info),
+   BOOT_PARAM_PRESERVE(sys_desc_table),
+   BOOT_PARAM_PRESERVE(olpc_ofw_header),
+   BOOT_PARAM_PRESERVE(efi_info),
+   BOOT_PARAM_PRESERVE(alt_mem_k),
+   BOOT_PARAM_PRESERVE(scratch),
+   BOOT_PARAM_PRESERVE(e820_entries),
+   BOOT_PARAM_PRESERVE(eddbuf_entries),
+   BOOT_PARAM_PRESERVE(edd_mbr_sig_buf_entries),
+   BOOT_PARAM_PRESERVE(edd_mbr_sig_buffer),
+   BOOT_PARAM_PRESERVE(e820_table),
+   BOOT_PARAM_PRESERVE(eddbuf),
+   };
+
+   memset(, 0, sizeof(scratch));
+
+   for (i = 0; i < ARRAY_SIZE(to_save); i++) {
+   memcpy(save_base + to_save[i].start,
+  bp_base + to_save[i].start, to_save[i].len);
+   }
+
+   memcpy(boot_params, save_base, sizeof(*boot_params));
}
 }
 

Re: [PATCH v4 2/2] x86/purgatory: use CFLAGS_REMOVE rather than reset KBUILD_CFLAGS

[Thomas Gleixner]

On Fri, 26 Jul 2019, Thomas Gleixner wrote:

Ping...

> On Thu, 25 Jul 2019, Nick Desaulniers wrote:
> 
> > KBUILD_CFLAGS is very carefully built up in the top level Makefile,
> > particularly when cross compiling or using different build tools.
> > Resetting KBUILD_CFLAGS via := assignment is an antipattern.
> > 
> > The comment above the reset mentions that -pg is problematic.  Other
> > Makefiles use `CFLAGS_REMOVE_file.o = $(CC_FLAGS_FTRACE)` when
> > CONFIG_FUNCTION_TRACER is set. Prefer that pattern to wiping out all of
> > the important KBUILD_CFLAGS then manually having to re-add them. Seems
> > also that __stack_chk_fail references are generated when using
> > CONFIG_STACKPROTECTOR or CONFIG_STACKPROTECTOR_STRONG.
> 
> Looking at the resulting build flags. Most stuff looks correct but there
> are a few which need to be looked at twice.
> 
> removes:
> 
>  -ffreestanding
>  -fno-builtin
>  -fno-zero-initialized-in-bss
> 
> changes:
> 
>  -mcmodel=large to -mcmodel=kernel
> 
> adds:
> 
>   -mindirect-branch-register
>   -mindirect-branch=thunk-extern
> 
> The latter makes me nervous. That probably wants to have retpoline disabled
> as well. It's not having an instance right now, but ...
> 
> Thanks,
> 
>   tglx
> 

Re: [PATCH 4/5] dt-bindings: serial: lantiq: Update for new SoC

[Andy Shevchenko]

On Wed, Aug 07, 2019 at 05:21:34PM +0800, Rahul Tanwar wrote:
> There is a new Intel Atom based Lightning Mountain(LGM) network processor SoC 
> which
> reuses Lantiq ASC serial controller IP. This patch adds new compatible string
> and its expected property value in order to support the driver for LGM as 
> well.

I think it makes sense to convert to YAML before adding new properties.

> 
> Signed-off-by: Rahul Tanwar 
> ---
>  Documentation/devicetree/bindings/serial/lantiq_asc.txt | 17 
> +++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/serial/lantiq_asc.txt 
> b/Documentation/devicetree/bindings/serial/lantiq_asc.txt
> index 40e81a5818f6..18b45dd13a61 100644
> --- a/Documentation/devicetree/bindings/serial/lantiq_asc.txt
> +++ b/Documentation/devicetree/bindings/serial/lantiq_asc.txt
> @@ -1,10 +1,14 @@
>  Lantiq SoC ASC serial controller
>  
>  Required properties:
> -- compatible : Should be "lantiq,asc"
> +- compatible : Should be "lantiq,asc" or "intel,lgm-asc"
>  - reg : Address and length of the register set for the device
> -- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier
> +- interrupts:
> +  For "lantiq,asc" - the 3 (tx rx err) interrupt numbers. The interrupt 
> specifier
>depends on the interrupt-parent interrupt controller.
> + or
> +  For "intel,lgm-asc" - the common interrupt number for all of tx rx & err 
> interrupts
> +  followed by level/sense specifier.
>  
>  Optional properties:
>  - clocks: Should contain frequency clock and gate clock
> @@ -29,3 +33,12 @@ asc1: serial@e100c00 {
>   interrupt-parent = <>;
>   interrupts = <112 113 114>;
>  };
> +
> +asc0: serial@e0a0 {
> + compatible = "intel,lgm-asc";
> + reg = <0xe0a0 0x1000>;
> + interrupt-parent = <>;
> + interrupts = <128 1>;
> + clocks = < LGM_CLK_NOC4>, < LGM_GCLK_ASC0>;
> + clock-names = "freq", "asc";
> +};
> -- 
> 2.11.0
> 

-- 
With Best Regards,
Andy Shevchenko

[tip:x86/urgent] x86: mtrr: cyrix: Mark expected switch fall-through

[tip-bot for Gustavo A. R. Silva]

Commit-ID:  7468a4eae541ce5aff65595aa502aa0a4def6615
Gitweb: https://git.kernel.org/tip/7468a4eae541ce5aff65595aa502aa0a4def6615
Author: Gustavo A. R. Silva 
AuthorDate: Mon, 5 Aug 2019 15:17:12 -0500
Committer:  Thomas Gleixner 
CommitDate: Wed, 7 Aug 2019 15:12:01 +0200

x86: mtrr: cyrix: Mark expected switch fall-through

Mark switch cases where we are expecting to fall through.

Fix the following warning (Building: i386_defconfig i386):

arch/x86/kernel/cpu/mtrr/cyrix.c:99:6: warning: this statement may fall through 
[-Wimplicit-fallthrough=]

Signed-off-by: Gustavo A. R. Silva 
Signed-off-by: Thomas Gleixner 
Reviewed-by: Kees Cook 
Link: https://lkml.kernel.org/r/20190805201712.GA19927@embeddedor

---
 arch/x86/kernel/cpu/mtrr/cyrix.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/mtrr/cyrix.c b/arch/x86/kernel/cpu/mtrr/cyrix.c
index 4296c702a3f7..72182809b333 100644
--- a/arch/x86/kernel/cpu/mtrr/cyrix.c
+++ b/arch/x86/kernel/cpu/mtrr/cyrix.c
@@ -98,6 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, 
int replace_reg)
case 7:
if (size < 0x40)
break;
+   /* Else, fall through */
case 6:
case 5:
case 4:

Re: [PATCH 2/2] /proc/kpageflags: do not use uninitialized struct pages

[Michal Hocko]

On Tue 06-08-19 09:15:25, Dan Williams wrote:
> On Mon, Aug 5, 2019 at 11:47 PM Michal Hocko  wrote:
> >
> > On Mon 05-08-19 20:27:03, Dan Williams wrote:
> > > On Sun, Aug 4, 2019 at 10:31 PM Toshiki Fukasawa
> > >  wrote:
> > > >
> > > > On 2019/07/26 16:06, Michal Hocko wrote:
> > > > > On Fri 26-07-19 06:25:49, Toshiki Fukasawa wrote:
> > > > >>
> > > > >>
> > > > >> On 2019/07/25 18:03, Michal Hocko wrote:
> > > > >>> On Thu 25-07-19 02:31:18, Toshiki Fukasawa wrote:
> > > >  A kernel panic was observed during reading /proc/kpageflags for
> > > >  first few pfns allocated by pmem namespace:
> > > > 
> > > >  BUG: unable to handle page fault for address: fffe
> > > >  [  114.495280] #PF: supervisor read access in kernel mode
> > > >  [  114.495738] #PF: error_code(0x) - not-present page
> > > >  [  114.496203] PGD 17120e067 P4D 17120e067 PUD 171210067 PMD 0
> > > >  [  114.496713] Oops:  [#1] SMP PTI
> > > >  [  114.497037] CPU: 9 PID: 1202 Comm: page-types Not tainted 
> > > >  5.3.0-rc1 #1
> > > >  [  114.497621] Hardware name: QEMU Standard PC (i440FX + PIIX, 
> > > >  1996), BIOS rel-1.11.0-0-g63451fca13-prebuilt.qemu-project.org 
> > > >  04/01/2014
> > > >  [  114.498706] RIP: 0010:stable_page_flags+0x27/0x3f0
> > > >  [  114.499142] Code: 82 66 90 66 66 66 66 90 48 85 ff 0f 84 d1 03 
> > > >  00 00 41 54 55 48 89 fd 53 48 8b 57 08 48 8b 1f 48 8d 42 ff 83 e2 
> > > >  01 48 0f 44 c7 <48> 8b 00 f6 c4 02 0f 84 57 03 00 00 45 31 e4 48 
> > > >  8b 55 08 48 89 ef
> > > >  [  114.500788] RSP: 0018:a5e601a0fe60 EFLAGS: 00010202
> > > >  [  114.501373] RAX: fffe RBX:  RCX: 
> > > >  
> > > >  [  114.502009] RDX: 0001 RSI: 7ffca13a7310 RDI: 
> > > >  d0748900
> > > >  [  114.502637] RBP: d0748900 R08: 0001 R09: 
> > > >  
> > > >  [  114.503270] R10:  R11:  R12: 
> > > >  0024
> > > >  [  114.503896] R13: 0008 R14: 7ffca13a7310 R15: 
> > > >  a5e601a0ff08
> > > >  [  114.504530] FS:  7f0266c7f540() 
> > > >  GS:962dbbac() knlGS:
> > > >  [  114.505245] CS:  0010 DS:  ES:  CR0: 80050033
> > > >  [  114.505754] CR2: fffe CR3: 00023a204000 CR4: 
> > > >  06e0
> > > >  [  114.506401] Call Trace:
> > > >  [  114.506660]  kpageflags_read+0xb1/0x130
> > > >  [  114.507051]  proc_reg_read+0x39/0x60
> > > >  [  114.507387]  vfs_read+0x8a/0x140
> > > >  [  114.507686]  ksys_pread64+0x61/0xa0
> > > >  [  114.508021]  do_syscall_64+0x5f/0x1a0
> > > >  [  114.508372]  entry_SYSCALL_64_after_hwframe+0x44/0xa9
> > > >  [  114.508844] RIP: 0033:0x7f0266ba426b
> > > > 
> > > >  The reason for the panic is that stable_page_flags() which parses
> > > >  the page flags uses uninitialized struct pages reserved by the
> > > >  ZONE_DEVICE driver.
> > > > >>>
> > > > >>> Why pmem hasn't initialized struct pages?
> > > > >>
> > > > >> We proposed to initialize in previous approach but that wasn't 
> > > > >> merged.
> > > > >> (See https://marc.info/?l=linux-mm=152964792500739=2)
> > > > >>
> > > > >>> Isn't that a bug that should be addressed rather than paper over it 
> > > > >>> like this?
> > > > >>
> > > > >> I'm not sure. What do you think, Dan?
> > > > >
> > > > > Yeah, I am really curious about details. Why do we keep uninitialized
> > > > > struct pages at all? What is a random pfn walker supposed to do? What
> > > > > kind of metadata would be clobbered? In other words much more details
> > > > > please.
> > > > >
> > > > I also want to know. I do not think that initializing struct pages will
> > > > clobber any metadata.
> > >
> > > The nvdimm implementation uses vmem_altmap to arrange for the 'struct
> > > page' array to be allocated from a reservation of a pmem namespace. A
> > > namespace in this mode contains an info-block that consumes the first
> > > 8K of the namespace capacity, capacity designated for page mapping,
> > > capacity for padding the start of data to optionally 4K, 2MB, or 1GB
> > > (on x86), and then the namespace data itself. The implementation
> > > specifies a section aligned (now sub-section aligned) address to
> > > arch_add_memory() to establish the linear mapping to map the metadata,
> > > and then vmem_altmap indicates to memmap_init_zone() which pfns
> > > represent data. The implementation only specifies enough 'struct page'
> > > capacity for pfn_to_page() to operate on the data space, not the
> > > namespace metadata space.
> >
> > Maybe I am dense but I do not really understand what prevents those
> > struct pages to be initialized to whatever state nvidimm subsystem
> > expects them to be? Is that a initialization speed up 

[tip:x86/urgent] x86/ptrace: Mark expected switch fall-through

[tip-bot for Gustavo A. R. Silva]

Commit-ID:  4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f
Gitweb: https://git.kernel.org/tip/4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f
Author: Gustavo A. R. Silva 
AuthorDate: Mon, 5 Aug 2019 14:56:54 -0500
Committer:  Thomas Gleixner 
CommitDate: Wed, 7 Aug 2019 15:12:01 +0200

x86/ptrace: Mark expected switch fall-through

Mark switch cases where we are expecting to fall through.

Fix the following warning (Building: allnoconfig i386):

arch/x86/kernel/ptrace.c:202:6: warning: this statement may fall through 
[-Wimplicit-fallthrough=]
   if (unlikely(value == 0))
  ^
arch/x86/kernel/ptrace.c:206:2: note: here
  default:
  ^~~

Signed-off-by: Gustavo A. R. Silva 
Signed-off-by: Thomas Gleixner 
Reviewed-by: Kees Cook 
Link: https://lkml.kernel.org/r/20190805195654.GA17831@embeddedor

---
 arch/x86/kernel/ptrace.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 0fdbe89d0754..3c5bbe8e4120 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -201,6 +201,7 @@ static int set_segment_reg(struct task_struct *task,
case offsetof(struct user_regs_struct, ss):
if (unlikely(value == 0))
return -EIO;
+   /* Else, fall through */
 
default:
*pt_regs_access(task_pt_regs(task), offset) = value;

Re: [PATCH v5 01/10] powerpc: unify definition of M_IF_NEEDED

[Michael Ellerman]

Jason Yan  writes:
> M_IF_NEEDED is defined too many times. Move it to a common place.

The name is not great, can you call it MAS2_M_IF_NEEDED, which at least
gives a clue what it's for?

cheers

> Signed-off-by: Jason Yan 
> Cc: Diana Craciun 
> Cc: Michael Ellerman 
> Cc: Christophe Leroy 
> Cc: Benjamin Herrenschmidt 
> Cc: Paul Mackerras 
> Cc: Nicholas Piggin 
> Cc: Kees Cook 
> Reviewed-by: Christophe Leroy 
> Reviewed-by: Diana Craciun 
> Tested-by: Diana Craciun 
> ---
>  arch/powerpc/include/asm/nohash/mmu-book3e.h  | 10 ++
>  arch/powerpc/kernel/exceptions-64e.S  | 10 --
>  arch/powerpc/kernel/fsl_booke_entry_mapping.S | 10 --
>  arch/powerpc/kernel/misc_64.S |  5 -
>  4 files changed, 10 insertions(+), 25 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/nohash/mmu-book3e.h 
> b/arch/powerpc/include/asm/nohash/mmu-book3e.h
> index 4c9777d256fb..0877362e48fa 100644
> --- a/arch/powerpc/include/asm/nohash/mmu-book3e.h
> +++ b/arch/powerpc/include/asm/nohash/mmu-book3e.h
> @@ -221,6 +221,16 @@
>  #define TLBILX_T_CLASS2  6
>  #define TLBILX_T_CLASS3  7
>  
> +/*
> + * The mapping only needs to be cache-coherent on SMP, except on
> + * Freescale e500mc derivatives where it's also needed for coherent DMA.
> + */
> +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
> +#define M_IF_NEEDED  MAS2_M
> +#else
> +#define M_IF_NEEDED  0
> +#endif
> +
>  #ifndef __ASSEMBLY__
>  #include 
>  
> diff --git a/arch/powerpc/kernel/exceptions-64e.S 
> b/arch/powerpc/kernel/exceptions-64e.S
> index 1cfb3da4a84a..fd49ec07ce4a 100644
> --- a/arch/powerpc/kernel/exceptions-64e.S
> +++ b/arch/powerpc/kernel/exceptions-64e.S
> @@ -1342,16 +1342,6 @@ skpinv:addir6,r6,1 
> /* Increment */
>   sync
>   isync
>  
> -/*
> - * The mapping only needs to be cache-coherent on SMP, except on
> - * Freescale e500mc derivatives where it's also needed for coherent DMA.
> - */
> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
> -#define M_IF_NEEDED  MAS2_M
> -#else
> -#define M_IF_NEEDED  0
> -#endif
> -
>  /* 6. Setup KERNELBASE mapping in TLB[0]
>   *
>   * r3 = MAS0 w/TLBSEL & ESEL for the entry we started in
> diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S 
> b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> index ea065282b303..de0980945510 100644
> --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
> @@ -153,16 +153,6 @@ skpinv:  addir6,r6,1 /* 
> Increment */
>   tlbivax 0,r9
>   TLBSYNC
>  
> -/*
> - * The mapping only needs to be cache-coherent on SMP, except on
> - * Freescale e500mc derivatives where it's also needed for coherent DMA.
> - */
> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
> -#define M_IF_NEEDED  MAS2_M
> -#else
> -#define M_IF_NEEDED  0
> -#endif
> -
>  #if defined(ENTRY_MAPPING_BOOT_SETUP)
>  
>  /* 6. Setup KERNELBASE mapping in TLB1[0] */
> diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
> index b55a7b4cb543..26074f92d4bc 100644
> --- a/arch/powerpc/kernel/misc_64.S
> +++ b/arch/powerpc/kernel/misc_64.S
> @@ -432,11 +432,6 @@ kexec_create_tlb:
>   rlwimi  r9,r10,16,4,15  /* Setup MAS0 = TLBSEL | ESEL(r9) */
>  
>  /* Set up a temp identity mapping v:0 to p:0 and return to it. */
> -#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
> -#define M_IF_NEEDED  MAS2_M
> -#else
> -#define M_IF_NEEDED  0
> -#endif
>   mtspr   SPRN_MAS0,r9
>  
>   lis r9,(MAS1_VALID|MAS1_IPROT)@h
> -- 
> 2.17.2

Re: [PATCH] mfd: db8500-prcmu: Mark expected switch fall-throughs

[Linus Walleij]

On Mon, Jul 29, 2019 at 1:56 AM Gustavo A. R. Silva
 wrote:

> Mark switch cases where we are expecting to fall through.
>
> This patch fixes the following warnings:
>
> drivers/mfd/db8500-prcmu.c: In function 'dsiclk_rate':
> drivers/mfd/db8500-prcmu.c:1592:7: warning: this statement may fall through 
> [-Wimplicit-fallthrough=]
>div *= 2;
>^~~~
> drivers/mfd/db8500-prcmu.c:1593:2: note: here
>   case PRCM_DSI_PLLOUT_SEL_PHI_2:
>   ^~~~
> drivers/mfd/db8500-prcmu.c:1594:7: warning: this statement may fall through 
> [-Wimplicit-fallthrough=]
>div *= 2;
>^~~~
> drivers/mfd/db8500-prcmu.c:1595:2: note: here
>   case PRCM_DSI_PLLOUT_SEL_PHI:
>   ^~~~
>
> Reported-by: Stephen Rothwell 
> Signed-off-by: Gustavo A. R. Silva 

Reviewed-by: Linus Walleij 

Yours,
Linus Walleij

Re: [PATCH v5 00/10] implement KASLR for powerpc/fsl_booke/32

[Michael Ellerman]

Hi Jason,

Jason Yan  writes:
> This series implements KASLR for powerpc/fsl_booke/32, as a security
> feature that deters exploit attempts relying on knowledge of the location
> of kernel internals.

Thanks for doing this work.

Sorry I didn't get a chance to look at this until v5, I sent a few
comments just now. Nothing major though, I think this looks almost ready
to merge.

cheers

> Since CONFIG_RELOCATABLE has already supported, what we need to do is
> map or copy kernel to a proper place and relocate. Freescale Book-E
> parts expect lowmem to be mapped by fixed TLB entries(TLB1). The TLB1
> entries are not suitable to map the kernel directly in a randomized
> region, so we chose to copy the kernel to a proper place and restart to
> relocate.
>
> Entropy is derived from the banner and timer base, which will change every
> build and boot. This not so much safe so additionally the bootloader may
> pass entropy via the /chosen/kaslr-seed node in device tree.
>
> We will use the first 512M of the low memory to randomize the kernel
> image. The memory will be split in 64M zones. We will use the lower 8
> bit of the entropy to decide the index of the 64M zone. Then we chose a
> 16K aligned offset inside the 64M zone to put the kernel in.
>
> KERNELBASE
>
> |-->   64M   <--|
> |   |
> +---+++---+
> |   |||kernel||   |
> +---+++---+
> | |
> |->   offset<-|
>
>   kimage_vaddr
>
> We also check if we will overlap with some areas like the dtb area, the
> initrd area or the crashkernel area. If we cannot find a proper area,
> kaslr will be disabled and boot from the original kernel.
>
> Changes since v4:
>  - Add Reviewed-by tag from Christophe
>  - Remove an unnecessary cast
>  - Remove unnecessary parenthesis
>  - Fix checkpatch warning
>
> Changes since v3:
>  - Add Reviewed-by and Tested-by tag from Diana
>  - Change the comment in fsl_booke_entry_mapping.S to be consistent
>with the new code.
>
> Changes since v2:
>  - Remove unnecessary #ifdef
>  - Use SZ_64M instead of0x400
>  - Call early_init_dt_scan_chosen() to init boot_command_line
>  - Rename kaslr_second_init() to kaslr_late_init()
>
> Changes since v1:
>  - Remove some useless 'extern' keyword.
>  - Replace EXPORT_SYMBOL with EXPORT_SYMBOL_GPL
>  - Improve some assembly code
>  - Use memzero_explicit instead of memset
>  - Use boot_command_line and remove early_command_line
>  - Do not print kaslr offset if kaslr is disabled
>
> Jason Yan (10):
>   powerpc: unify definition of M_IF_NEEDED
>   powerpc: move memstart_addr and kernstart_addr to init-common.c
>   powerpc: introduce kimage_vaddr to store the kernel base
>   powerpc/fsl_booke/32: introduce create_tlb_entry() helper
>   powerpc/fsl_booke/32: introduce reloc_kernel_entry() helper
>   powerpc/fsl_booke/32: implement KASLR infrastructure
>   powerpc/fsl_booke/32: randomize the kernel image offset
>   powerpc/fsl_booke/kaslr: clear the original kernel if randomized
>   powerpc/fsl_booke/kaslr: support nokaslr cmdline parameter
>   powerpc/fsl_booke/kaslr: dump out kernel offset information on panic
>
>  arch/powerpc/Kconfig  |  11 +
>  arch/powerpc/include/asm/nohash/mmu-book3e.h  |  10 +
>  arch/powerpc/include/asm/page.h   |   7 +
>  arch/powerpc/kernel/Makefile  |   1 +
>  arch/powerpc/kernel/early_32.c|   2 +-
>  arch/powerpc/kernel/exceptions-64e.S  |  10 -
>  arch/powerpc/kernel/fsl_booke_entry_mapping.S |  27 +-
>  arch/powerpc/kernel/head_fsl_booke.S  |  55 ++-
>  arch/powerpc/kernel/kaslr_booke.c | 427 ++
>  arch/powerpc/kernel/machine_kexec.c   |   1 +
>  arch/powerpc/kernel/misc_64.S |   5 -
>  arch/powerpc/kernel/setup-common.c|  19 +
>  arch/powerpc/mm/init-common.c |   7 +
>  arch/powerpc/mm/init_32.c |   5 -
>  arch/powerpc/mm/init_64.c |   5 -
>  arch/powerpc/mm/mmu_decl.h|  10 +
>  arch/powerpc/mm/nohash/fsl_booke.c|   8 +-
>  17 files changed, 560 insertions(+), 50 deletions(-)
>  create mode 100644 arch/powerpc/kernel/kaslr_booke.c
>
> -- 
> 2.17.2

[PATCH net-next] fq_codel: remove set but not used variables 'prev_ecn_mark' and 'prev_drop_count'

[YueHaibing]

Fixes gcc '-Wunused-but-set-variable' warning:

net/sched/sch_fq_codel.c: In function fq_codel_dequeue:
net/sched/sch_fq_codel.c:288:23: warning: variable prev_ecn_mark set but not 
used [-Wunused-but-set-variable]
net/sched/sch_fq_codel.c:288:6: warning: variable prev_drop_count set but not 
used [-Wunused-but-set-variable]

They are not used since commit 77ddaff218fc ("fq_codel: Kill
useless per-flow dropped statistic")

Reported-by: Hulk Robot 
Signed-off-by: YueHaibing 
---
 net/sched/sch_fq_codel.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/net/sched/sch_fq_codel.c b/net/sched/sch_fq_codel.c
index 9edd0f4..c261c0a 100644
--- a/net/sched/sch_fq_codel.c
+++ b/net/sched/sch_fq_codel.c
@@ -285,7 +285,6 @@ static struct sk_buff *fq_codel_dequeue(struct Qdisc *sch)
struct sk_buff *skb;
struct fq_codel_flow *flow;
struct list_head *head;
-   u32 prev_drop_count, prev_ecn_mark;
 
 begin:
head = >new_flows;
@@ -302,9 +301,6 @@ static struct sk_buff *fq_codel_dequeue(struct Qdisc *sch)
goto begin;
}
 
-   prev_drop_count = q->cstats.drop_count;
-   prev_ecn_mark = q->cstats.ecn_mark;
-
skb = codel_dequeue(sch, >qstats.backlog, >cparams,
>cvars, >cstats, qdisc_pkt_len,
codel_get_enqueue_time, drop_func, dequeue_func);
-- 
2.7.4

Re: [PATCH v7 01/20] pinctrl: tegra: Add suspend and resume support

[Linus Walleij]

On Wed, Aug 7, 2019 at 5:40 AM Sowjanya Komatineni
 wrote:
> On 8/6/19 2:51 PM, Sowjanya Komatineni wrote:
> >
> > On 8/5/19 2:20 AM, Linus Walleij wrote:
> >> On Wed, Jul 31, 2019 at 11:11 PM Sowjanya Komatineni
> >>  wrote:
> >>
> >>> This patch adds support for Tegra pinctrl driver suspend and resume.
> >>>
> >>> During suspend, context of all pinctrl registers are stored and
> >>> on resume they are all restored to have all the pinmux and pad
> >>> configuration for normal operation.
> >>>
> >>> Acked-by: Thierry Reding 
> >>> Reviewed-by: Dmitry Osipenko 
> >>> Signed-off-by: Sowjanya Komatineni 
> >> Patch applied to the pinctrl tree.
> >>
> >> This patch seems finished.
> >>
> >> Also if the rest don't get merged for v5.4 then at least this is so
> >> your patch stack gets more shallow.
> >>
> >> I hope it's fine to merge this separately, else tell me and I'll
> >> pull it out.
> >>
> >> Yours,
> >> Linus Walleij
> >
> > Yes, this patch can be merged separately. But, there's latest feedback
> > from Dmitry to add barrier after writes to make sure pinmux register
> > writes happen.
> >
> > So will update this patch to add barrier in v8. So, need to wait for v8.
> >
> > Thanks
> >
> > Sowjanya
> >
> I see it merged. So will exclude suspend/resume patch and will add patch
> for necessary write barrier fix in v8 version.

Yeah just make an incremental patch, that's fine.
If you want to overdo it you can add a Fixes: tag to
the original patch, but I don't care much.

Yours,
Linus Walleij

Re: [PATCH v8 02/14] media: doc: add document for rkisp1 meta buffer format

[Sakari Ailus]

Hi Helen,

On Tue, Jul 30, 2019 at 03:42:44PM -0300, Helen Koike wrote:
> From: Jacob Chen 
> 
> This commit add document for rkisp1 meta buffer format
> 
> Signed-off-by: Jacob Chen 
> Acked-by: Hans Verkuil 
> [update for upstream]
> Signed-off-by: Helen Koike 
> 
> ---
> 
> Changes in v8:
> - Add SPDX in the header
> - Remove emacs configs
> - Fix doc style
> 
> Changes in v7:
> - s/correspond/corresponding
> - s/use/uses
> - s/docuemnt/document
> 
>  Documentation/media/uapi/v4l/meta-formats.rst |  2 ++
>  .../uapi/v4l/pixfmt-meta-rkisp1-params.rst| 23 +++
>  .../uapi/v4l/pixfmt-meta-rkisp1-stat.rst  | 22 ++
>  3 files changed, 47 insertions(+)
>  create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
>  create mode 100644 Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
> 
> diff --git a/Documentation/media/uapi/v4l/meta-formats.rst 
> b/Documentation/media/uapi/v4l/meta-formats.rst
> index b10ca9ee3968..5de621fea3cc 100644
> --- a/Documentation/media/uapi/v4l/meta-formats.rst
> +++ b/Documentation/media/uapi/v4l/meta-formats.rst
> @@ -24,3 +24,5 @@ These formats are used for the :ref:`metadata` interface 
> only.
>  pixfmt-meta-uvc
>  pixfmt-meta-vsp1-hgo
>  pixfmt-meta-vsp1-hgt
> +pixfmt-meta-rkisp1-params
> +pixfmt-meta-rkisp1-stat
> diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst 
> b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
> new file mode 100644
> index ..103b5cb79b7c
> --- /dev/null
> +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-params.rst
> @@ -0,0 +1,23 @@
> +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +.. _v4l2-meta-fmt-rkisp1-params:
> +
> +
> +V4L2_META_FMT_RK_ISP1_PARAMS
> +
> +
> +Rockchip ISP1 Parameters Data
> +
> +Description
> +===
> +
> +This format describes input parameters for the Rockchip ISP1.
> +
> +It uses c-struct :c:type:`rkisp1_isp_params_cfg`, which is defined in
> +the ``linux/rkisp1-config.h`` header file.

Do you have an insight on in which order the device executes the processing
steps for the image data? The pipeline may not be entirely linear either
(statistics, for instance). This should be included in the documentation.

> +
> +The parameters consist of multiple modules.
> +The module won't be updated if the corresponding bit was not set in 
> module_*_update.
> +
> +.. kernel-doc:: include/uapi/linux/rkisp1-config.h
> +   :functions: rkisp1_isp_params_cfg
> diff --git a/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst 
> b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
> new file mode 100644
> index ..4ad303f96421
> --- /dev/null
> +++ b/Documentation/media/uapi/v4l/pixfmt-meta-rkisp1-stat.rst
> @@ -0,0 +1,22 @@
> +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +.. _v4l2-meta-fmt-rkisp1-stat:
> +
> +=
> +V4L2_META_FMT_RK_ISP1_STAT_3A
> +=
> +
> +
> +Rockchip ISP1 Statistics Data
> +
> +Description
> +===
> +
> +This format describes image color statistics information generated by the 
> Rockchip
> +ISP1.
> +
> +It uses c-struct :c:type:`rkisp1_stat_buffer`, which is defined in
> +the ``linux/rkisp1-config.h`` header file.
> +
> +.. kernel-doc:: include/uapi/linux/rkisp1-config.h
> +   :functions: rkisp1_stat_buffer

-- 
Kind regards,

Sakari Ailus
sakari.ai...@linux.intel.com

[PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

[YueHaibing]

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
 variable tx_vid set but not used [-Wunused-but-set-variable]
drivers/net/dsa/sja1105/sja1105_main.c:1226:6: warning:
 variable rx_vid set but not used [-Wunused-but-set-variable]

They are not used since commit 6d7c7d948a2e ("net: dsa:
sja1105: Fix broken learning with vlan_filtering disabled")

Reported-by: Hulk Robot 
Signed-off-by: YueHaibing 
---
 drivers/net/dsa/sja1105/sja1105_main.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/dsa/sja1105/sja1105_main.c 
b/drivers/net/dsa/sja1105/sja1105_main.c
index d073baf..df976b25 100644
--- a/drivers/net/dsa/sja1105/sja1105_main.c
+++ b/drivers/net/dsa/sja1105/sja1105_main.c
@@ -1223,12 +1223,8 @@ static int sja1105_fdb_dump(struct dsa_switch *ds, int 
port,
 {
struct sja1105_private *priv = ds->priv;
struct device *dev = ds->dev;
-   u16 rx_vid, tx_vid;
int i;
 
-   rx_vid = dsa_8021q_rx_vid(ds, port);
-   tx_vid = dsa_8021q_tx_vid(ds, port);
-
for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
struct sja1105_l2_lookup_entry l2_lookup = {0};
u8 macaddr[ETH_ALEN];
-- 
2.7.4

Re: [PATCH v8 04/14] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver

[Sakari Ailus]

Hi Helen,

Thanks for the patchset.

On Tue, Jul 30, 2019 at 03:42:46PM -0300, Helen Koike wrote:
> From: Jacob Chen 
> 
> This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
> 
> Signed-off-by: Jacob Chen 
> Signed-off-by: Shunqian Zheng 
> Signed-off-by: Tomasz Figa 
> [migrate to phy framework]
> Signed-off-by: Ezequiel Garcia 
> [update for upstream]
> Signed-off-by: Helen Koike 
> 
> ---
> 
> Changes in v8:
> - Remove boiler plate license text
> 
> Changes in v7:
> - Migrate dphy specific code from
> drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
> to drivers/phy/rockchip/phy-rockchip-dphy.c
> - Drop support for rk3288
> - Drop support for dphy txrx
> - code styling and checkpatch fixes
> 
>  drivers/phy/rockchip/Kconfig |   8 +
>  drivers/phy/rockchip/Makefile|   1 +
>  drivers/phy/rockchip/phy-rockchip-dphy.c | 408 +++
>  3 files changed, 417 insertions(+)
>  create mode 100644 drivers/phy/rockchip/phy-rockchip-dphy.c
> 
> diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
> index c454c90cd99e..afd072f135e6 100644
> --- a/drivers/phy/rockchip/Kconfig
> +++ b/drivers/phy/rockchip/Kconfig
> @@ -9,6 +9,14 @@ config PHY_ROCKCHIP_DP
>   help
> Enable this to support the Rockchip Display Port PHY.
>  
> +config PHY_ROCKCHIP_DPHY
> + tristate "Rockchip MIPI Synopsys DPHY driver"
> + depends on ARCH_ROCKCHIP && OF

How about (...) || COMPILE_TEST ?

> + select GENERIC_PHY_MIPI_DPHY
> + select GENERIC_PHY
> + help
> +   Enable this to support the Rockchip MIPI Synopsys DPHY.
> +
>  config PHY_ROCKCHIP_EMMC
>   tristate "Rockchip EMMC PHY Driver"
>   depends on ARCH_ROCKCHIP && OF
> diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile
> index fd21cbaf40dd..f62e9010bcaf 100644
> --- a/drivers/phy/rockchip/Makefile
> +++ b/drivers/phy/rockchip/Makefile
> @@ -1,5 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  obj-$(CONFIG_PHY_ROCKCHIP_DP)+= phy-rockchip-dp.o
> +obj-$(CONFIG_PHY_ROCKCHIP_DPHY)  += phy-rockchip-dphy.o
>  obj-$(CONFIG_PHY_ROCKCHIP_EMMC)  += phy-rockchip-emmc.o
>  obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o
>  obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o
> diff --git a/drivers/phy/rockchip/phy-rockchip-dphy.c 
> b/drivers/phy/rockchip/phy-rockchip-dphy.c
> new file mode 100644
> index ..3a29976c2dff
> --- /dev/null
> +++ b/drivers/phy/rockchip/phy-rockchip-dphy.c
> @@ -0,0 +1,408 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Rockchip MIPI Synopsys DPHY driver
> + *
> + * Based on:
> + *
> + * Copyright (C) 2016 FuZhou Rockchip Co., Ltd.
> + * Author: Yakir Yang 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define RK3399_GRF_SOC_CON9  0x6224
> +#define RK3399_GRF_SOC_CON21 0x6254
> +#define RK3399_GRF_SOC_CON22 0x6258
> +#define RK3399_GRF_SOC_CON23 0x625c
> +#define RK3399_GRF_SOC_CON24 0x6260
> +#define RK3399_GRF_SOC_CON25 0x6264
> +#define RK3399_GRF_SOC_STATUS1   0xe2a4
> +
> +#define CLOCK_LANE_HS_RX_CONTROL 0x34
> +#define LANE0_HS_RX_CONTROL  0x44
> +#define LANE1_HS_RX_CONTROL  0x54
> +#define LANE2_HS_RX_CONTROL  0x84
> +#define LANE3_HS_RX_CONTROL  0x94
> +#define HS_RX_DATA_LANES_THS_SETTLE_CONTROL  0x75
> +
> +#define MAX_DPHY_CLK 8
> +
> +#define PHY_TESTEN_ADDR  (0x1 << 16)
> +#define PHY_TESTEN_DATA  (0x0 << 16)
> +#define PHY_TESTCLK  (0x1 << 1)
> +#define PHY_TESTCLR  (0x1 << 0)
> +#define THS_SETTLE_COUNTER_THRESHOLD 0x04
> +
> +#define HIWORD_UPDATE(val, mask, shift) \
> + ((val) << (shift) | (mask) << ((shift) + 16))
> +
> +#define GRF_SOC_CON12   0x0274
> +
> +#define GRF_EDP_REF_CLK_SEL_INTER_HIWORD_MASK   BIT(20)
> +#define GRF_EDP_REF_CLK_SEL_INTER   BIT(4)
> +
> +#define GRF_EDP_PHY_SIDDQ_HIWORD_MASK   BIT(21)
> +#define GRF_EDP_PHY_SIDDQ_ON0
> +#define GRF_EDP_PHY_SIDDQ_OFF   BIT(5)
> +
> +struct hsfreq_range {
> + u32 range_h;
> + u8 cfg_bit;
> +};
> +
> +static const struct hsfreq_range rk3399_mipidphy_hsfreq_ranges[] = {
> + {  89, 0x00}, {  99, 0x10}, { 109, 0x20}, { 129, 0x01},
> + { 139, 0x11}, { 149, 0x21}, { 169, 0x02}, { 179, 0x12},
> + { 199, 0x22}, { 219, 0x03}, { 239, 0x13}, { 249, 0x23},
> + { 269, 0x04}, { 299, 0x14}, { 329, 0x05}, { 359, 0x15},
> + { 399, 0x25}, { 449, 0x06}, { 499, 0x16}, { 549, 0x07},
> + { 599, 0x17}, { 649, 0x08}, { 699, 0x18}, { 749, 0x09},
> + { 799, 0x19}, { 849, 0x29}, { 899, 0x39}, { 949, 0x0a},
> + { 999, 0x1a}, {1049, 0x2a}, {1099, 0x3a}, {1149, 0x0b},
> + {1199, 0x1b}, {1249, 0x2b}, 

Re: [PATCH v5 09/10] powerpc/fsl_booke/kaslr: support nokaslr cmdline parameter

[Michael Ellerman]

Jason Yan  writes:
> diff --git a/arch/powerpc/kernel/kaslr_booke.c 
> b/arch/powerpc/kernel/kaslr_booke.c
> index c6b326424b54..436f9a03f385 100644
> --- a/arch/powerpc/kernel/kaslr_booke.c
> +++ b/arch/powerpc/kernel/kaslr_booke.c
> @@ -361,6 +361,18 @@ static unsigned long __init kaslr_choose_location(void 
> *dt_ptr, phys_addr_t size
>   return kaslr_offset;
>  }
>  
> +static inline __init bool kaslr_disabled(void)
> +{
> + char *str;
> +
> + str = strstr(boot_command_line, "nokaslr");
> + if (str == boot_command_line ||
> + (str > boot_command_line && *(str - 1) == ' '))
> + return true;

This extra logic doesn't work for "nokaslrfoo". Is it worth it?

cheers

Re: [PATCH v5 06/10] powerpc/fsl_booke/32: implement KASLR infrastructure

[Michael Ellerman]

Jason Yan  writes:
> This patch add support to boot kernel from places other than KERNELBASE.
> Since CONFIG_RELOCATABLE has already supported, what we need to do is
> map or copy kernel to a proper place and relocate. Freescale Book-E
> parts expect lowmem to be mapped by fixed TLB entries(TLB1). The TLB1
> entries are not suitable to map the kernel directly in a randomized
> region, so we chose to copy the kernel to a proper place and restart to
> relocate.

So to be 100% clear you are randomising the location of the kernel in
virtual and physical space, by the same amount, and retaining the 1:1
linear mapping.

> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 77f6ebf97113..755378887912 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -548,6 +548,17 @@ config RELOCATABLE
> setting can still be useful to bootwrappers that need to know the
> load address of the kernel (eg. u-boot/mkimage).
>  
> +config RANDOMIZE_BASE
> + bool "Randomize the address of the kernel image"
> + depends on (FSL_BOOKE && FLATMEM && PPC32)
> + select RELOCATABLE

I think this should depend on RELOCATABLE, rather than selecting it.

> diff --git a/arch/powerpc/kernel/kaslr_booke.c 
> b/arch/powerpc/kernel/kaslr_booke.c
> new file mode 100644
> index ..30f84c0321b2
> --- /dev/null
> +++ b/arch/powerpc/kernel/kaslr_booke.c
> @@ -0,0 +1,84 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2019 Jason Yan 
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.

You don't need that paragraph now that you have the SPDX tag.

Rather than using a '//' comment followed by a single line block comment
you can format it as:

// SPDX-License-Identifier: GPL-2.0-only
//
// Copyright (C) 2019 Jason Yan 


> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

Do you really need all those headers?

> +extern int is_second_reloc;

That should be in a header.

Any reason why it isn't a bool?

cheers

Re: [PATCH v1] perf record: Add an option to take an AUX snapshot on exit

[Arnaldo Carvalho de Melo]

Em Wed, Aug 07, 2019 at 10:40:39AM +0300, Adrian Hunter escreveu:
> On 6/08/19 5:41 PM, Alexander Shishkin wrote:
> > It is sometimes useful to generate a snapshot when perf record exits;
> > I've been using a wrapper script around the workload that would do a
> > killall -USR2 perf when the workload exits.
> > 
> > This patch makes it easier and also works when perf record is attached
> > to a pre-existing task. A new snapshot option 'e' can be specified in
> > -S to enable this behavior:
> > 
> > root@elsewhere:~# perf record -e intel_pt// -Se sleep 1
> > [ perf record: Woken up 2 times to write data ]
> > [ perf record: Captured and wrote 0.085 MB perf.data ]
> > 
> > Signed-off-by: Alexander Shishkin 
> > Co-developed-by: Adrian Hunter 
> 
> checkpatch says:
> WARNING: Co-developed-by: must be immediately followed by Signed-off-by

I can fix this.

- Arnaldo
 
> > ---
> >  tools/perf/Documentation/perf-record.txt | 11 +---
> >  tools/perf/builtin-record.c  | 34 +---
> >  tools/perf/perf.h|  1 +
> >  tools/perf/util/auxtrace.c   | 14 --
> >  tools/perf/util/auxtrace.h   |  2 +-
> >  5 files changed, 52 insertions(+), 10 deletions(-)
> > 
> > diff --git a/tools/perf/Documentation/perf-record.txt 
> > b/tools/perf/Documentation/perf-record.txt
> > index 15e0fa87241b..d5e58e0a2bca 100644
> > --- a/tools/perf/Documentation/perf-record.txt
> > +++ b/tools/perf/Documentation/perf-record.txt
> > @@ -422,9 +422,14 @@ CLOCK_BOOTTIME, CLOCK_REALTIME and CLOCK_TAI.
> >  -S::
> >  --snapshot::
> >  Select AUX area tracing Snapshot Mode. This option is valid only with an
> > -AUX area tracing event. Optionally the number of bytes to capture per
> > -snapshot can be specified. In Snapshot Mode, trace data is captured only 
> > when
> > -signal SIGUSR2 is received.
> > +AUX area tracing event. Optionally, certain snapshot capturing parameters
> > +can be specified in a string that follows this option:
> > +  'e': take one last snapshot on exit; guarantees that there is at least 
> > one
> > +   snapshot in the output file;
> > +  : if the PMU supports this, specify the desired snapshot size.
> > +
> > +In Snapshot Mode trace data is captured only when signal SIGUSR2 is 
> > received
> > +and on exit if the above 'e' option is given.
> >  
> >  --proc-map-timeout::
> >  When processing pre-existing threads /proc/XXX/mmap, it may take a long 
> > time,
> > diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
> > index d31d7a5a1be3..e9a2525ecfcc 100644
> > --- a/tools/perf/builtin-record.c
> > +++ b/tools/perf/builtin-record.c
> > @@ -613,19 +613,35 @@ static int record__auxtrace_read_snapshot_all(struct 
> > record *rec)
> > return rc;
> >  }
> >  
> > -static void record__read_auxtrace_snapshot(struct record *rec)
> > +static void record__read_auxtrace_snapshot(struct record *rec, bool 
> > on_exit)
> >  {
> > pr_debug("Recording AUX area tracing snapshot\n");
> > if (record__auxtrace_read_snapshot_all(rec) < 0) {
> > trigger_error(_snapshot_trigger);
> > } else {
> > -   if (auxtrace_record__snapshot_finish(rec->itr))
> > +   if (auxtrace_record__snapshot_finish(rec->itr, on_exit))
> > trigger_error(_snapshot_trigger);
> > else
> > trigger_ready(_snapshot_trigger);
> > }
> >  }
> >  
> > +static int record__auxtrace_snapshot_exit(struct record *rec)
> > +{
> > +   if (trigger_is_error(_snapshot_trigger))
> > +   return 0;
> > +
> > +   if (!auxtrace_record__snapshot_started &&
> > +   auxtrace_record__snapshot_start(rec->itr))
> > +   return -1;
> > +
> > +   record__read_auxtrace_snapshot(rec, true);
> 
> Buffers can get un-mapped earlier as tasks exit.  Refer
> perf_evlist__filter_pollfd() -> perf_evlist__munmap_filtered().
> Maybe we should prevent that for this case.
> e.g. do perf_mmap__get()'s on the mmaps at the start, and then 'put' them
> all here.
> 
> > +   if (trigger_is_error(_snapshot_trigger))
> > +   return -1;
> > +
> > +   return 0;
> > +}
> > +
> >  static int record__auxtrace_init(struct record *rec)
> >  {
> > int err;
> > @@ -654,7 +670,7 @@ int record__auxtrace_mmap_read(struct record *rec 
> > __maybe_unused,
> >  }
> >  
> >  static inline
> > -void record__read_auxtrace_snapshot(struct record *rec __maybe_unused)
> > +void record__read_auxtrace_snapshot(struct record *rec __maybe_unused, 
> > bool on_exit)
> >  {
> >  }
> >  
> > @@ -664,6 +680,12 @@ int auxtrace_record__snapshot_start(struct 
> > auxtrace_record *itr __maybe_unused)
> > return 0;
> >  }
> >  
> > +static inline
> > +int record__auxtrace_snapshot_exit(struct record *rec)
> > +{
> > +   return 0;
> > +}
> > +
> >  static int record__auxtrace_init(struct record *rec __maybe_unused)
> >  {
> > return 0;
> > @@ -1536,7 +1558,7 @@ static int __cmd_record(struct record *rec, int 

Re: [PATCH v5 10/10] powerpc/fsl_booke/kaslr: dump out kernel offset information on panic

[Michael Ellerman]

Jason Yan  writes:
> When kaslr is enabled, the kernel offset is different for every boot.
> This brings some difficult to debug the kernel. Dump out the kernel
> offset when panic so that we can easily debug the kernel.

Some of this is taken from the arm64 version right? Please say so when
you copy other people's code.

> diff --git a/arch/powerpc/kernel/machine_kexec.c 
> b/arch/powerpc/kernel/machine_kexec.c
> index c4ed328a7b96..078fe3d76feb 100644
> --- a/arch/powerpc/kernel/machine_kexec.c
> +++ b/arch/powerpc/kernel/machine_kexec.c
> @@ -86,6 +86,7 @@ void arch_crash_save_vmcoreinfo(void)
>   VMCOREINFO_STRUCT_SIZE(mmu_psize_def);
>   VMCOREINFO_OFFSET(mmu_psize_def, shift);
>  #endif
> + vmcoreinfo_append_str("KERNELOFFSET=%lx\n", kaslr_offset());
>  }

There's no mention of that in the commit log.

Please split it into a separate patch and describe what you're doing and
why.

> diff --git a/arch/powerpc/kernel/setup-common.c 
> b/arch/powerpc/kernel/setup-common.c
> index 1f8db666468d..064075f02837 100644
> --- a/arch/powerpc/kernel/setup-common.c
> +++ b/arch/powerpc/kernel/setup-common.c
> @@ -715,12 +715,31 @@ static struct notifier_block ppc_panic_block = {
>   .priority = INT_MIN /* may not return; must be done last */
>  };
>  
> +/*
> + * Dump out kernel offset information on panic.
> + */
> +static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
> +   void *p)
> +{
> + pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
> +  kaslr_offset(), KERNELBASE);
> +
> + return 0;
> +}
> +
> +static struct notifier_block kernel_offset_notifier = {
> + .notifier_call = dump_kernel_offset
> +};
> +
>  void __init setup_panic(void)
>  {
>   /* PPC64 always does a hard irq disable in its panic handler */
>   if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
>   return;
>   atomic_notifier_chain_register(_notifier_list, _panic_block);

> + if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
> + atomic_notifier_chain_register(_notifier_list,
> +_offset_notifier);

Don't you want to do that before the return above?

>  }

cheers

Re: [PATCH v5 07/10] powerpc/fsl_booke/32: randomize the kernel image offset

[Michael Ellerman]

Jason Yan  writes:
> After we have the basic support of relocate the kernel in some
> appropriate place, we can start to randomize the offset now.
>
> Entropy is derived from the banner and timer, which will change every
> build and boot. This not so much safe so additionally the bootloader may
> pass entropy via the /chosen/kaslr-seed node in device tree.
>
> We will use the first 512M of the low memory to randomize the kernel
> image. The memory will be split in 64M zones. We will use the lower 8
> bit of the entropy to decide the index of the 64M zone. Then we chose a
> 16K aligned offset inside the 64M zone to put the kernel in.
>
> KERNELBASE
>
> |-->   64M   <--|
> |   |
> +---+++---+
> |   |||kernel||   |
> +---+++---+
> | |
> |->   offset<-|
>
>   kimage_vaddr

Can you drop this description / diagram and any other relevant design
details in eg. Documentation/powerpc/kaslr-booke32.rst please?

See cpu_families.rst for an example of how to incorporate the ASCII
diagram.

> diff --git a/arch/powerpc/kernel/kaslr_booke.c 
> b/arch/powerpc/kernel/kaslr_booke.c
> index 30f84c0321b2..52b59b05f906 100644
> --- a/arch/powerpc/kernel/kaslr_booke.c
> +++ b/arch/powerpc/kernel/kaslr_booke.c
> @@ -34,15 +36,329 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> +#include 
> +#include 
> +
> +#ifdef DEBUG
> +#define DBG(fmt...) pr_info(fmt)
> +#else
> +#define DBG(fmt...)
> +#endif

Just use pr_debug()?

> +struct regions {
> + unsigned long pa_start;
> + unsigned long pa_end;
> + unsigned long kernel_size;
> + unsigned long dtb_start;
> + unsigned long dtb_end;
> + unsigned long initrd_start;
> + unsigned long initrd_end;
> + unsigned long crash_start;
> + unsigned long crash_end;
> + int reserved_mem;
> + int reserved_mem_addr_cells;
> + int reserved_mem_size_cells;
> +};
>  
>  extern int is_second_reloc;
>  
> +/* Simplified build-specific string for starting entropy. */
> +static const char build_str[] = UTS_RELEASE " (" LINUX_COMPILE_BY "@"
> + LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION;
> +
> +static __init void kaslr_get_cmdline(void *fdt)
> +{
> + int node = fdt_path_offset(fdt, "/chosen");
> +
> + early_init_dt_scan_chosen(node, "chosen", 1, boot_command_line);
> +}
> +
> +static unsigned long __init rotate_xor(unsigned long hash, const void *area,
> +size_t size)
> +{
> + size_t i;
> + const unsigned long *ptr = area;
> +
> + for (i = 0; i < size / sizeof(hash); i++) {
> + /* Rotate by odd number of bits and XOR. */
> + hash = (hash << ((sizeof(hash) * 8) - 7)) | (hash >> 7);
> + hash ^= ptr[i];
> + }
> +
> + return hash;
> +}

That looks suspiciously like the version Kees wrote in 2013 in
arch/x86/boot/compressed/kaslr.c ?

You should mention that in the change log at least.

> +
> +/* Attempt to create a simple but unpredictable starting entropy. */

It's simple, but I would argue unpredictable is not really true. A local
attacker can probably fingerprint the kernel version, and also has
access to the unflattened device tree, which means they can make
educated guesses about the flattened tree size.

Be careful when copying comments :)

> +static unsigned long __init get_boot_seed(void *fdt)
> +{
> + unsigned long hash = 0;
> +
> + hash = rotate_xor(hash, build_str, sizeof(build_str));
> + hash = rotate_xor(hash, fdt, fdt_totalsize(fdt));
> +
> + return hash;
> +}
> +
> +static __init u64 get_kaslr_seed(void *fdt)
> +{
> + int node, len;
> + fdt64_t *prop;
> + u64 ret;
> +
> + node = fdt_path_offset(fdt, "/chosen");
> + if (node < 0)
> + return 0;
> +
> + prop = fdt_getprop_w(fdt, node, "kaslr-seed", );
> + if (!prop || len != sizeof(u64))
> + return 0;
> +
> + ret = fdt64_to_cpu(*prop);
> + *prop = 0;
> + return ret;
> +}
> +
> +static __init bool regions_overlap(u32 s1, u32 e1, u32 s2, u32 e2)
> +{
> + return e1 >= s2 && e2 >= s1;
> +}

There's a generic helper called memory_intersects(), though it takes
void*. Might not be worth using, not sure.

...
>  static unsigned long __init kaslr_choose_location(void *dt_ptr, phys_addr_t 
> size,
> unsigned long kernel_sz)
>  {
> - /* return a fixed offset of 64M for now */
> - return SZ_64M;
> + unsigned long offset, random;
> + unsigned long ram, linear_sz;
> + unsigned long kaslr_offset;
> + u64 seed;
> + struct regions regions;

You pass that around to a lot of the functions, would it be simpler just
to make it static global and __initdata ?

cheers

Re: [PATCH v5 03/10] powerpc: introduce kimage_vaddr to store the kernel base

[Michael Ellerman]

Jason Yan  writes:
> Now the kernel base is a fixed value - KERNELBASE. To support KASLR, we
> need a variable to store the kernel base.
>
> Signed-off-by: Jason Yan 
> Cc: Diana Craciun 
> Cc: Michael Ellerman 
> Cc: Christophe Leroy 
> Cc: Benjamin Herrenschmidt 
> Cc: Paul Mackerras 
> Cc: Nicholas Piggin 
> Cc: Kees Cook 
> Reviewed-by: Christophe Leroy 
> Reviewed-by: Diana Craciun 
> Tested-by: Diana Craciun 
> ---
>  arch/powerpc/include/asm/page.h | 2 ++
>  arch/powerpc/mm/init-common.c   | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
> index 0d52f57fca04..60a68d3a54b1 100644
> --- a/arch/powerpc/include/asm/page.h
> +++ b/arch/powerpc/include/asm/page.h
> @@ -315,6 +315,8 @@ void arch_free_page(struct page *page, int order);
>  
>  struct vm_area_struct;
>  
> +extern unsigned long kimage_vaddr;
> +
>  #include 
>  #endif /* __ASSEMBLY__ */
>  #include 
> diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
> index 152ae0d21435..d4801ce48dc5 100644
> --- a/arch/powerpc/mm/init-common.c
> +++ b/arch/powerpc/mm/init-common.c
> @@ -25,6 +25,8 @@ phys_addr_t memstart_addr = (phys_addr_t)~0ull;
>  EXPORT_SYMBOL_GPL(memstart_addr);
>  phys_addr_t kernstart_addr;
>  EXPORT_SYMBOL_GPL(kernstart_addr);
> +unsigned long kimage_vaddr = KERNELBASE;
> +EXPORT_SYMBOL_GPL(kimage_vaddr);

The names of the #defines and variables we use for these values are not
very consistent already, but using kimage_vaddr makes it worse I think.

Isn't this going to have the same value as kernstart_addr, but the
virtual rather than physical address?

If so kernstart_virt_addr would seem better.

cheers

[PATCH] x86/kconfig: remove X86_DIRECT_GBPAGES dependency on !DEBUG_PAGEALLOC

[Vlastimil Babka]

These days CONFIG_DEBUG_PAGEALLOC just compiles in the code that has to be
enabled on boot time, or with an extra config option, and only then are the
large page based direct mappings disabled.

Therefore remove the config dependency, allowing 1GB direct mappings with
debug_pagealloc compiled in but not enabled.

Signed-off-by: Vlastimil Babka 
---
 arch/x86/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 222855cc0158..58eae28c3dd6 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1503,7 +1503,7 @@ config X86_5LEVEL
 
 config X86_DIRECT_GBPAGES
def_bool y
-   depends on X86_64 && !DEBUG_PAGEALLOC
+   depends on X86_64
---help---
  Certain kernel features effectively disable kernel
  linear 1 GB mappings (even if the CPU otherwise
-- 
2.22.0

Re: [PATCH v5 02/10] powerpc: move memstart_addr and kernstart_addr to init-common.c

[Michael Ellerman]

Jason Yan  writes:
> These two variables are both defined in init_32.c and init_64.c. Move
> them to init-common.c.
>
> Signed-off-by: Jason Yan 
> Cc: Diana Craciun 
> Cc: Michael Ellerman 
> Cc: Christophe Leroy 
> Cc: Benjamin Herrenschmidt 
> Cc: Paul Mackerras 
> Cc: Nicholas Piggin 
> Cc: Kees Cook 
> Reviewed-by: Christophe Leroy 
> Reviewed-by: Diana Craciun 
> Tested-by: Diana Craciun 
> ---
>  arch/powerpc/mm/init-common.c | 5 +
>  arch/powerpc/mm/init_32.c | 5 -
>  arch/powerpc/mm/init_64.c | 5 -
>  3 files changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/arch/powerpc/mm/init-common.c b/arch/powerpc/mm/init-common.c
> index a84da92920f7..152ae0d21435 100644
> --- a/arch/powerpc/mm/init-common.c
> +++ b/arch/powerpc/mm/init-common.c
> @@ -21,6 +21,11 @@
>  #include 
>  #include 
>  
> +phys_addr_t memstart_addr = (phys_addr_t)~0ull;
> +EXPORT_SYMBOL_GPL(memstart_addr);
> +phys_addr_t kernstart_addr;
> +EXPORT_SYMBOL_GPL(kernstart_addr);

Would be nice if these can be __ro_after_init ?

cheers

Re: [PATCH 7/8] PCI: hv: Allocate a named fwnode instead of an address-based one

[Marc Zyngier]

On 06/08/2019 15:57, Marc Zyngier wrote:
> To allocate its fwnode that is then used to allocate an irqdomain,
> the driver uses irq_domain_alloc_fwnode(), passing it a VA as an
> identifier. This is a rather bad idea, as this address ends up
> published in debugfs (and we want to move away from VAs there
> anyway).
> 
> Instead, let's allocate a named fwnode by using the device GUID as
> an identifier. It is allegedly unique, and can be traced back to
> the original device.
> 
> Signed-off-by: Marc Zyngier 
> ---
>  drivers/pci/controller/pci-hyperv.c | 10 +-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/pci-hyperv.c 
> b/drivers/pci/controller/pci-hyperv.c
> index 40b625458afa..f6ed2583167a 100644
> --- a/drivers/pci/controller/pci-hyperv.c
> +++ b/drivers/pci/controller/pci-hyperv.c
> @@ -2521,6 +2521,7 @@ static int hv_pci_probe(struct hv_device *hdev,
>   const struct hv_vmbus_device_id *dev_id)
>  {
>   struct hv_pcibus_device *hbus;
> + char *name;
>   int ret;
>  
>   /*
> @@ -2589,7 +2590,14 @@ static int hv_pci_probe(struct hv_device *hdev,
>   goto free_config;
>   }
>  
> - hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
> + name = kasprintf("%pUL", >dev_instance);

Of course, this is bogus. It needs a GFP_KERNEL as the first parameter.

/me adds HYPERV to .config, and fixes it locally.

M.
-- 
Jazz is not dead, it just smells funny...

[PATCH] firmware: arm_scmi: Use {get,put}_unaligned_le32 accessors

[Sudeep Holla]

Instead of type-casting the {tx,rx}.buf all over the place while
accessing them to read/write __le32 from/to the firmware, let's use
the nice existing {get,put}_unaligned_le32 accessors to hide all the
type cast ugliness.

Suggested-by: Philipp Zabel 
Signed-off-by: Sudeep Holla 
---
 drivers/firmware/arm_scmi/base.c|  2 +-
 drivers/firmware/arm_scmi/clock.c   | 10 --
 drivers/firmware/arm_scmi/common.h  |  2 ++
 drivers/firmware/arm_scmi/perf.c|  8 
 drivers/firmware/arm_scmi/power.c   |  6 +++---
 drivers/firmware/arm_scmi/reset.c   |  2 +-
 drivers/firmware/arm_scmi/sensors.c | 12 +---
 7 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/drivers/firmware/arm_scmi/base.c b/drivers/firmware/arm_scmi/base.c
index 204390297f4b..f804e8af6521 100644
--- a/drivers/firmware/arm_scmi/base.c
+++ b/drivers/firmware/arm_scmi/base.c
@@ -204,7 +204,7 @@ static int scmi_base_discover_agent_get(const struct 
scmi_handle *handle,
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(id);
+   put_unaligned_le32(id, t->tx.buf);
 
ret = scmi_do_xfer(handle, t);
if (!ret)
diff --git a/drivers/firmware/arm_scmi/clock.c 
b/drivers/firmware/arm_scmi/clock.c
index 4a32ae1822a3..199a668ea885 100644
--- a/drivers/firmware/arm_scmi/clock.c
+++ b/drivers/firmware/arm_scmi/clock.c
@@ -107,7 +107,7 @@ static int scmi_clock_attributes_get(const struct 
scmi_handle *handle,
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(clk_id);
+   put_unaligned_le32(clk_id, t->tx.buf);
attr = t->rx.buf;
 
ret = scmi_do_xfer(handle, t);
@@ -204,14 +204,12 @@ scmi_clock_rate_get(const struct scmi_handle *handle, u32 
clk_id, u64 *value)
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(clk_id);
+   put_unaligned_le32(clk_id, t->tx.buf);
 
ret = scmi_do_xfer(handle, t);
if (!ret) {
-   __le32 *pval = t->rx.buf;
-
-   *value = le32_to_cpu(*pval);
-   *value |= (u64)le32_to_cpu(*(pval + 1)) << 32;
+   *value = get_unaligned_le32(t->rx.buf);
+   *value |= (u64)get_unaligned_le32(t->rx.buf + 1) << 32;
}
 
scmi_xfer_put(handle, t);
diff --git a/drivers/firmware/arm_scmi/common.h 
b/drivers/firmware/arm_scmi/common.h
index 43884e4ceac5..5237c2ff79fe 100644
--- a/drivers/firmware/arm_scmi/common.h
+++ b/drivers/firmware/arm_scmi/common.h
@@ -15,6 +15,8 @@
 #include 
 #include 
 
+#include 
+
 #define PROTOCOL_REV_MINOR_MASKGENMASK(15, 0)
 #define PROTOCOL_REV_MAJOR_MASKGENMASK(31, 16)
 #define PROTOCOL_REV_MAJOR(x)  (u16)(FIELD_GET(PROTOCOL_REV_MAJOR_MASK, (x)))
diff --git a/drivers/firmware/arm_scmi/perf.c b/drivers/firmware/arm_scmi/perf.c
index fb7f6cab2c11..9b338e66a24e 100644
--- a/drivers/firmware/arm_scmi/perf.c
+++ b/drivers/firmware/arm_scmi/perf.c
@@ -195,7 +195,7 @@ scmi_perf_domain_attributes_get(const struct scmi_handle 
*handle, u32 domain,
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(domain);
+   put_unaligned_le32(domain, t->tx.buf);
attr = t->rx.buf;
 
ret = scmi_do_xfer(handle, t);
@@ -380,7 +380,7 @@ static int scmi_perf_mb_limits_get(const struct scmi_handle 
*handle, u32 domain,
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(domain);
+   put_unaligned_le32(domain, t->tx.buf);
 
ret = scmi_do_xfer(handle, t);
if (!ret) {
@@ -459,11 +459,11 @@ static int scmi_perf_mb_level_get(const struct 
scmi_handle *handle, u32 domain,
return ret;
 
t->hdr.poll_completion = poll;
-   *(__le32 *)t->tx.buf = cpu_to_le32(domain);
+   put_unaligned_le32(domain, t->tx.buf);
 
ret = scmi_do_xfer(handle, t);
if (!ret)
-   *level = le32_to_cpu(*(__le32 *)t->rx.buf);
+   *level = get_unaligned_le32(t->rx.buf);
 
scmi_xfer_put(handle, t);
return ret;
diff --git a/drivers/firmware/arm_scmi/power.c 
b/drivers/firmware/arm_scmi/power.c
index 62f3401a1f01..5abef7079c0a 100644
--- a/drivers/firmware/arm_scmi/power.c
+++ b/drivers/firmware/arm_scmi/power.c
@@ -96,7 +96,7 @@ scmi_power_domain_attributes_get(const struct scmi_handle 
*handle, u32 domain,
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(domain);
+   put_unaligned_le32(domain, t->tx.buf);
attr = t->rx.buf;
 
ret = scmi_do_xfer(handle, t);
@@ -147,11 +147,11 @@ scmi_power_state_get(const struct scmi_handle *handle, 
u32 domain, u32 *state)
if (ret)
return ret;
 
-   *(__le32 *)t->tx.buf = cpu_to_le32(domain);
+   put_unaligned_le32(domain, t->tx.buf);
 
ret = scmi_do_xfer(handle, t);
if (!ret)
-   *state = le32_to_cpu(*(__le32 *)t->rx.buf);
+   *state = 

Re: [PATCH v10 20/22] x86: mm: Convert dump_pagetables to use walk_page_range

[Steven Price]

On 07/08/2019 00:58, Andrew Morton wrote:
> On Wed, 31 Jul 2019 16:46:01 +0100 Steven Price  wrote:
> 
>> Make use of the new functionality in walk_page_range to remove the
>> arch page walking code and use the generic code to walk the page tables.
>>
>> The effective permissions are passed down the chain using new fields
>> in struct pg_state.
>>
>> The KASAN optimisation is implemented by including test_p?d callbacks
>> which can decide to skip an entire tree of entries
>>
>> ...
>>
>> +static const struct ptdump_range ptdump_ranges[] = {
>> +#ifdef CONFIG_X86_64
>>  
>> -#define pgd_large(a) (pgtable_l5_enabled() ? pgd_large(a) : 
>> p4d_large(__p4d(pgd_val(a
>> -#define pgd_none(a)  (pgtable_l5_enabled() ? pgd_none(a) : 
>> p4d_none(__p4d(pgd_val(a
>> +#define normalize_addr_shift (64 - (__VIRTUAL_MASK_SHIFT + 1))
>> +#define normalize_addr(u) ((signed long)(u << normalize_addr_shift) \
>> +>> normalize_addr_shift)
>>  
>> -static inline bool is_hypervisor_range(int idx)
>> -{
>> -#ifdef CONFIG_X86_64
>> -/*
>> - * A hole in the beginning of kernel address space reserved
>> - * for a hypervisor.
>> - */
>> -return  (idx >= pgd_index(GUARD_HOLE_BASE_ADDR)) &&
>> -(idx <  pgd_index(GUARD_HOLE_END_ADDR));
>> +{0, PTRS_PER_PGD * PGD_LEVEL_MULT / 2},
>> +{normalize_addr(PTRS_PER_PGD * PGD_LEVEL_MULT / 2), ~0UL},
> 
> This blows up because PGD_LEVEL_MULT is sometimes not a constant.
> 
> x86_64 allmodconfig:
> 
> In file included from ./arch/x86/include/asm/pgtable_types.h:249:0,
>  from ./arch/x86/include/asm/paravirt_types.h:45,
>  from ./arch/x86/include/asm/ptrace.h:94,
>  from ./arch/x86/include/asm/math_emu.h:5,
>  from ./arch/x86/include/asm/processor.h:12,
>  from ./arch/x86/include/asm/cpufeature.h:5,
>  from ./arch/x86/include/asm/thread_info.h:53,
>  from ./include/linux/thread_info.h:38,
>  from ./arch/x86/include/asm/preempt.h:7,
>  from ./include/linux/preempt.h:78,
>  from ./include/linux/spinlock.h:51,
>  from ./include/linux/wait.h:9,
>  from ./include/linux/wait_bit.h:8,
>  from ./include/linux/fs.h:6,
>  from ./include/linux/debugfs.h:15,
>  from arch/x86/mm/dump_pagetables.c:11:
> ./arch/x86/include/asm/pgtable_64_types.h:56:22: error: initializer element 
> is not constant
>  #define PTRS_PER_PGD 512
>   ^

This is very unhelpful of GCC - it's actually PTRS_PER_P4D which isn't
constant!

> arch/x86/mm/dump_pagetables.c:363:6: note: in expansion of macro 
> ‘PTRS_PER_PGD’
>   {0, PTRS_PER_PGD * PGD_LEVEL_MULT / 2},
>   ^~~~
> ./arch/x86/include/asm/pgtable_64_types.h:56:22: note: (near initialization 
> for ‘ptdump_ranges[0].end’)
>  #define PTRS_PER_PGD 512
>   ^
> arch/x86/mm/dump_pagetables.c:363:6: note: in expansion of macro 
> ‘PTRS_PER_PGD’
>   {0, PTRS_PER_PGD * PGD_LEVEL_MULT / 2},
>   ^~~~
> arch/x86/mm/dump_pagetables.c:360:27: error: initializer element is not 
> constant
>  #define normalize_addr(u) ((signed long)(u << normalize_addr_shift) \
>^
> arch/x86/mm/dump_pagetables.c:364:3: note: in expansion of macro 
> ‘normalize_addr’
>   {normalize_addr(PTRS_PER_PGD * PGD_LEVEL_MULT / 2), ~0UL},
>^~
> arch/x86/mm/dump_pagetables.c:360:27: note: (near initialization for 
> ‘ptdump_ranges[1].start’)
>  #define normalize_addr(u) ((signed long)(u << normalize_addr_shift) \
>^
> arch/x86/mm/dump_pagetables.c:364:3: note: in expansion of macro 
> ‘normalize_addr’
>   {normalize_addr(PTRS_PER_PGD * PGD_LEVEL_MULT / 2), ~0UL},
> 
> I don't know what to do about this so I'll drop the series.

My best solution to this is to simply make ptdump_ranges dynamic (see
below). But there are other problems with this series (thanks for
spotting them), so I'll send out another version later.

Thanks,

Steve

8<-
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 998c7f46763c..8fc129ff985e 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -353,7 +353,10 @@ static void note_page(struct ptdump_state *pt_st,
unsigned long addr, int level,
}
 }

-static const struct ptdump_range ptdump_ranges[] = {
+static void ptdump_walk_pgd_level_core(struct seq_file *m, struct
mm_struct *mm,
+  bool checkwx, bool dmesg)
+{
+   const struct ptdump_range ptdump_ranges[] = {
 #ifdef CONFIG_X86_64

 #define normalize_addr_shift (64 - (__VIRTUAL_MASK_SHIFT + 1))
@@ -368,9 +371,6 @@ static const struct ptdump_range ptdump_ranges[] = {
{0, 0}
 };

-static void ptdump_walk_pgd_level_core(struct seq_file *m, struct
mm_struct *mm,
-   

hello

[eddy william]

Hello

My name is Eddy William I am a lawyer by profession. I wish to offer you
the next of kin to my client. You will inherit the sum of ($8.5 Million)
dollars my client left in the bank before his death.

My client is a citizen of your country who died in auto crash with his wife
and only son. I will be entitled with 50% of the total fund while 50% will
be for you.
Please contact my private email here for more details:eddywilliam0...@gmail.com

Many thanks in advance,
Mr.Eddy William,

Re: NULL ptr deref in wq_worker_sleeping on 4.19

[Thomas Gleixner]

On Wed, 7 Aug 2019, Austin Kim wrote:

  A: Because it messes up the order in which people normally read text.
  Q: Why is top-posting such a bad thing?
  A: Top-posting.
  Q: What is the most annoying thing in e-mail?

  A: No.
  Q: Should I include quotations after my reply?

  http://daringfireball.net/2007/07/on_top

> I wonder what kinds of workqueue is used in case of this panic.
> 
> If system workqueue(system_wq) is used for this case, it would be a
> help to replace it with high priority workqueue(system_highpri_wq). If
> panic disappers with high priority workqueue(system_highpri_wq), we
> would think about another scenario.

How would that help? As Sebastian explained, something overwrote memory or
it is a Use After Free. How would a high priority workqueue 'fix' that?

You need to find the root cause, which is either memory corruption or a use
after free.

Thanks,

tglx

Re: [PATCH v4 2/3] OPP: Add support for bandwidth OPP tables

[Georgi Djakov]

Hi Saravana,

On 7/27/19 02:15, Saravana Kannan wrote:
> Not all devices quantify their performance points in terms of frequency.
> Devices like interconnects quantify their performance points in terms of
> bandwidth. We need a way to represent these bandwidth levels in OPP. So,
> add support for parsing bandwidth OPPs from DT.
> 
> Signed-off-by: Saravana Kannan 
> ---
>  drivers/opp/of.c  | 41 -
>  drivers/opp/opp.h |  4 +++-
>  2 files changed, 35 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/opp/of.c b/drivers/opp/of.c
> index b313aca9894f..ac73512f4416 100644
> --- a/drivers/opp/of.c
> +++ b/drivers/opp/of.c
> @@ -523,6 +523,35 @@ void dev_pm_opp_of_remove_table(struct device *dev)
>  }
>  EXPORT_SYMBOL_GPL(dev_pm_opp_of_remove_table);
>  
> +static int _read_opp_key(struct dev_pm_opp *new_opp, struct device_node *np)
> +{
> + int ret;
> + u64 rate;
> + u32 bw;
> +
> + ret = of_property_read_u64(np, "opp-hz", );
> + if (!ret) {
> + /*
> +  * Rate is defined as an unsigned long in clk API, and so
> +  * casting explicitly to its type. Must be fixed once rate is 64
> +  * bit guaranteed in clk API.
> +  */
> + new_opp->rate = (unsigned long)rate;
> + return 0;

So we can't have a single OPP table with both frequency and bandwidth?

> + }
> +
> + ret = of_property_read_u32(np, "opp-peak-KBps", );
> + if (ret)
> + return ret;
> + new_opp->rate = (unsigned long) bw;
> +
> + ret = of_property_read_u32(np, "opp-avg-KBps", );
> + if (!ret)
> + new_opp->avg_bw = (unsigned long) bw;
> +
> + return 0;
> +}
> +
>  /**
>   * _opp_add_static_v2() - Allocate static OPPs (As per 'v2' DT bindings)
>   * @opp_table:   OPP table
> @@ -560,22 +589,16 @@ static struct dev_pm_opp *_opp_add_static_v2(struct 
> opp_table *opp_table,
>   if (!new_opp)
>   return ERR_PTR(-ENOMEM);
>  
> - ret = of_property_read_u64(np, "opp-hz", );
> + ret = _read_opp_key(new_opp, np);
>   if (ret < 0) {
>   /* "opp-hz" is optional for devices like power domains. */
>   if (!opp_table->is_genpd) {
> - dev_err(dev, "%s: opp-hz not found\n", __func__);
> + dev_err(dev, "%s: opp-hz or opp-peak-bw not found\n",

s/opp-peak-bw/opp-peak-kBps/

Thanks,
Georgi

[PATCH 0/3] bus: ti-sysc: fixes for reset handling

[Tero Kristo]

Hi,

Here are a few patches to fix reset handling for ti-sysc bus driver.
Without these, the iommu won't be working properly at least.

-Tero

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCH 2/3] bus: ti-sysc: rework the reset handling

[Tero Kristo]

If reset controllers are assigned to the ti-sysc target-module, only
ti-sysc is going to be able to control these. Thus, remove all the
disable_on_idle flag usage, and assert/de-assert the reset always
in the idle path. Otherwise the reset signal will always just be
de-asserted.

Signed-off-by: Tero Kristo 
---
 drivers/bus/ti-sysc.c | 25 +
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index ad9c6d3..e08125a 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -95,7 +95,6 @@ struct sysc {
unsigned int enabled:1;
unsigned int needs_resume:1;
unsigned int child_needs_resume:1;
-   unsigned int disable_on_idle:1;
struct delayed_work idle_work;
void (*clk_enable_quirk)(struct sysc *sysc);
void (*clk_disable_quirk)(struct sysc *sysc);
@@ -1031,8 +1030,7 @@ static int __maybe_unused 
sysc_runtime_suspend_legacy(struct device *dev,
dev_err(dev, "%s: could not idle: %i\n",
__func__, error);
 
-   if (ddata->disable_on_idle)
-   reset_control_assert(ddata->rsts);
+   reset_control_assert(ddata->rsts);
 
return 0;
 }
@@ -1043,8 +1041,7 @@ static int __maybe_unused 
sysc_runtime_resume_legacy(struct device *dev,
struct ti_sysc_platform_data *pdata;
int error;
 
-   if (ddata->disable_on_idle)
-   reset_control_deassert(ddata->rsts);
+   reset_control_deassert(ddata->rsts);
 
pdata = dev_get_platdata(ddata->dev);
if (!pdata)
@@ -1091,8 +1088,7 @@ static int __maybe_unused sysc_runtime_suspend(struct 
device *dev)
ddata->enabled = false;
 
 err_allow_idle:
-   if (ddata->disable_on_idle)
-   reset_control_assert(ddata->rsts);
+   reset_control_assert(ddata->rsts);
 
sysc_clkdm_allow_idle(ddata);
 
@@ -1112,8 +1108,7 @@ static int __maybe_unused sysc_runtime_resume(struct 
device *dev)
 
sysc_clkdm_deny_idle(ddata);
 
-   if (ddata->disable_on_idle)
-   reset_control_deassert(ddata->rsts);
+   reset_control_deassert(ddata->rsts);
 
if (sysc_opt_clks_needed(ddata)) {
error = sysc_enable_opt_clocks(ddata);
@@ -1543,14 +1538,7 @@ static int sysc_rstctrl_reset_deassert(struct sysc 
*ddata, bool reset)
return error;
}
 
-   error = reset_control_deassert(ddata->rsts);
-   if (error == -EEXIST)
-   return 0;
-
-   error = readx_poll_timeout(reset_control_status, ddata->rsts, val,
-  val == 0, 100, MAX_MODULE_SOFTRESET_WAIT);
-
-   return error;
+   return reset_control_deassert(ddata->rsts);
 }
 
 /*
@@ -2449,9 +2437,6 @@ static int sysc_probe(struct platform_device *pdev)
pm_runtime_put(>dev);
}
 
-   if (!of_get_available_child_count(ddata->dev->of_node))
-   ddata->disable_on_idle = true;
-
return 0;
 
 err:
-- 
1.9.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCH 1/3] bus: ti-sysc: re-order the clkdm control around reset handling

[Tero Kristo]

Parenting clockdomain for the IP should be enabled during the reset
handling logic, otherwise the reset may not finish properly. Re-order
the clockdomain control logic to avoid this.

Signed-off-by: Tero Kristo 
---
 drivers/bus/ti-sysc.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index e6deabd..ad9c6d3 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -1091,11 +1091,11 @@ static int __maybe_unused sysc_runtime_suspend(struct 
device *dev)
ddata->enabled = false;
 
 err_allow_idle:
-   sysc_clkdm_allow_idle(ddata);
-
if (ddata->disable_on_idle)
reset_control_assert(ddata->rsts);
 
+   sysc_clkdm_allow_idle(ddata);
+
return error;
 }
 
@@ -1109,11 +1109,12 @@ static int __maybe_unused sysc_runtime_resume(struct 
device *dev)
if (ddata->enabled)
return 0;
 
-   if (ddata->disable_on_idle)
-   reset_control_deassert(ddata->rsts);
 
sysc_clkdm_deny_idle(ddata);
 
+   if (ddata->disable_on_idle)
+   reset_control_deassert(ddata->rsts);
+
if (sysc_opt_clks_needed(ddata)) {
error = sysc_enable_opt_clocks(ddata);
if (error)
-- 
1.9.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCH 3/3] bus: ti-sysc: allow reset sharing across devices

[Tero Kristo]

Some devices need to share their reset signals, like DSP MMUs, thus drop
the exclusive notation from reset request. Also, balance the init time
reset count, otherwise the resets will never be applied post boot.

Signed-off-by: Tero Kristo 
---
 drivers/bus/ti-sysc.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index e08125a..b30eb05 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -502,7 +502,7 @@ static void sysc_clkdm_allow_idle(struct sysc *ddata)
 static int sysc_init_resets(struct sysc *ddata)
 {
ddata->rsts =
-   devm_reset_control_get_optional(ddata->dev, "rstctrl");
+   devm_reset_control_get_optional_shared(ddata->dev, "rstctrl");
if (IS_ERR(ddata->rsts))
return PTR_ERR(ddata->rsts);
 
@@ -1527,7 +1527,7 @@ static int sysc_legacy_init(struct sysc *ddata)
  */
 static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset)
 {
-   int error, val;
+   int error;
 
if (!ddata->rsts)
return 0;
@@ -1538,7 +1538,9 @@ static int sysc_rstctrl_reset_deassert(struct sysc 
*ddata, bool reset)
return error;
}
 
-   return reset_control_deassert(ddata->rsts);
+   reset_control_deassert(ddata->rsts);
+
+   return 0;
 }
 
 /*
@@ -2418,6 +2420,10 @@ static int sysc_probe(struct platform_device *pdev)
goto unprepare;
}
 
+   /* Balance reset counts */
+   if (ddata->rsts)
+   reset_control_assert(ddata->rsts);
+
sysc_show_registers(ddata);
 
ddata->dev->type = _device_type;
-- 
1.9.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

Re: [PATCH v3 2/2] pinctrl: qcom: Add SC7180 pinctrl driver

[Linus Walleij]

On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak  wrote:

> From: Jitendra Sharma 
>
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for SC7180
>
> Signed-off-by: Jitendra Sharma 
> Signed-off-by: Vivek Gautam 
> [rnayak: modify to use upstream tile support
>  sort and squash some functions]
> Signed-off-by: Rajendra Nayak 
> Reviewed-by: Bjorn Andersson 
> Reviewed-by: Vinod Koul 

Patch applied!

Yours,
Linus Walleij

Re: [PATCH v3 1/2] dt-bindings: pinctrl: qcom: Add SC7180 pinctrl binding

[Linus Walleij]

On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak  wrote:

> From: Jitendra Sharma 
>
> Add the binding for the TLMM pinctrl block found in the SC7180 platform
>
> Signed-off-by: Jitendra Sharma 
> Signed-off-by: Vivek Gautam 
> [rnayak: Fix some copy-paste issues, sort and fix functions]
> Signed-off-by: Rajendra Nayak 
> Reviewed-by: Bjorn Andersson 
> Reviewed-by: Vinod Koul 

Patch applied.

Yours,
Linus Walleij

Re: [PATCH][ocfs2-next] ocfs2: ensure ret is set to zero before returning

[Colin Ian King]

On 07/08/2019 13:35, Joseph Qi wrote:
> 
> 
> On 19/8/7 20:19, Colin King wrote:
>> From: Colin Ian King 
>>
>> A previous commit introduced a regression where variable ret was
>> originally being set from the return from a call to function
>> dlm_create_debugfs_subroot and this set was removed. Currently
>> ret is now uninitialized if no alloction errors are found which
>> may end up with a bogus check on ret < 0 on the 'leave:' return
>> path.  Fix this by setting ret to zero on a successful execution
>> path.
> 
> Good catch.
> Or shall we just initialize 'ret' at first?

Initialized ret first may not catch subsequent coding errors where error
returns paths have not initialized ret, so my preference is when it is
required and not before.

> 
>>
>> Addresses-Coverity: ("Uninitialzed scalar variable")

Can this be fixed up when applied rather sending a V2?
> 
> Typo here. 
> 
> Thanks,
> Joseph
> 
>> Fixes: cba322160ef0 ("ocfs2: further debugfs cleanups")
>> Signed-off-by: Colin Ian King 
>> ---
>>  fs/ocfs2/dlm/dlmdomain.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/fs/ocfs2/dlm/dlmdomain.c b/fs/ocfs2/dlm/dlmdomain.c
>> index 5c4218d66dd2..ee6f459f9770 100644
>> --- a/fs/ocfs2/dlm/dlmdomain.c
>> +++ b/fs/ocfs2/dlm/dlmdomain.c
>> @@ -2052,6 +2052,7 @@ static struct dlm_ctxt *dlm_alloc_ctxt(const char 
>> *domain,
>>  mlog(0, "context init: refcount %u\n",
>>kref_read(>dlm_refs));
>>  
>> +ret = 0;
>>  leave:
>>  if (ret < 0 && dlm) {
>>  if (dlm->master_hash)
>>

Re: [PATCH v2 13/14] PCI/P2PDMA: No longer require no-mmu for host bridge whitelist

[Bjorn Helgaas]

On Wed, Aug 07, 2019 at 07:59:58AM +0200, Christoph Hellwig wrote:
> no-mmu sounds stange, as we use that for linux ports without paging
> hardware.  I think an "io" got lost somewhere..

I had already changed the subject to

  PCI/P2PDMA: Allow IOMMU for host bridge whitelist

but certainly open to better suggestions.

[PATCHv1] arm64: dts: imx8qm: add compatible string for usdhc3

[Oliver Graute]

add compatible string for usdhc3
---
This Patch is on top of 10/15 of this series:

https://patchwork.kernel.org/patch/11046343/

[v2,10/15] arm64: dts: imx8qm: add conn ss support

---
 arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi 
b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 00ae820d5175..8c33edf0744f 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -19,3 +19,7 @@
  {
compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc";
 };
+
+ {
+   compatible = "fsl,imx8qm-usdhc", "fsl,imx7d-usdhc";
+};
-- 
2.17.1

Re: [PATCH 6/8] gpio/ixp4xx: Register the base PA instead of its VA in fwnode

[Linus Walleij]

On Tue, Aug 6, 2019 at 4:57 PM Marc Zyngier  wrote:

> Do not expose the base VA (it appears in debugfs). Instead,
> record the PA, which at least can be used to precisely identify
> the associated irqchip and domain.
>
> Signed-off-by: Marc Zyngier 

Reviewed-by: Linus Walleij 

Please apply this directly to the irq subsystem tree with
the rest of the fixes.

Yours,
Linus Walleij

Re: [PATCH v3] gpio: mpc8xxx: Add new platforms GPIO DT node description

[Linus Walleij]

On Wed, Aug 7, 2019 at 4:22 AM Hui Song  wrote:

> From: Song Hui 
>
> Update the NXP GPIO node dt-binding file for QorIQ and
> Layerscape platforms, and add one more example with
> ls1028a GPIO node.
>
> Signed-off-by: Song Hui 

Patch applied!

Thanks,
Linus Walleij

Re: Bisected: Kernel 4.14 + has 3 times higher write IO latency than Kernel 4.4 with raid1

[Jinpu Wang]

On Wed, Aug 7, 2019 at 8:36 AM Jinpu Wang  wrote:
>
> On Wed, Aug 7, 2019 at 1:40 AM NeilBrown  wrote:
> >
> > On Tue, Aug 06 2019, Jinpu Wang wrote:
> >
> > > On Tue, Aug 6, 2019 at 9:54 AM Jinpu Wang  
> > > wrote:
> > >>
> > >> On Tue, Aug 6, 2019 at 1:46 AM NeilBrown  wrote:
> > >> >
> > >> > On Mon, Aug 05 2019, Jinpu Wang wrote:
> > >> >
> > >> > > Hi Neil,
> > >> > >
> > >> > > For the md higher write IO latency problem, I bisected it to these 
> > >> > > commits:
> > >> > >
> > >> > > 4ad23a97 MD: use per-cpu counter for writes_pending
> > >> > > 210f7cd percpu-refcount: support synchronous switch to atomic mode.
> > >> > >
> > >> > > Do you maybe have an idea? How can we fix it?
> > >> >
> > >> > Hmmm not sure.
> > >> Hi Neil,
> > >>
> > >> Thanks for reply, detailed result in line.
> >
> > Thanks for the extra testing.
> > ...
> > > [  105.133299] md md0 in_sync is 0, sb_flags 2, recovery 3, external
> > > 0, safemode 0, recovery_cp 524288
> > ...
> >
> > ahh - the resync was still happening.  That explains why set_in_sync()
> > is being called so often.  If you wait for sync to complete (or create
> > the array with --assume-clean) you should see more normal behaviour.
> I've updated my tests accordingly, thanks for the hint.
> >
> > This patch should fix it.  I think we can do better but it would be more
> > complex so no suitable for backports to -stable.
> >
> > Once you confirm it works, I'll send it upstream with a
> > Reported-and-Tested-by from you.
> >
> > Thanks,
> > NeilBrown
>
> Thanks a lot, Neil, my quick test show, yes, it fixed the problem for me.
>
> I will run more tests to be sure, will report back the test result.
Hi Neil,

I've run our regression tests with your patch, everything works fine
as expected.

So Reported-and-Tested-by: Jack Wang 

Thank you for your quick fix.

The patch should go to stable 4.12+

Regards,
Jack Wang

>
> Regards,
> Jack Wang
>
> >
> >
> > diff --git a/drivers/md/md.c b/drivers/md/md.c
> > index 24638ccedce4..624cf1ac43dc 100644
> > --- a/drivers/md/md.c
> > +++ b/drivers/md/md.c
> > @@ -8900,6 +8900,7 @@ void md_check_recovery(struct mddev *mddev)
> >
> > if (mddev_trylock(mddev)) {
> > int spares = 0;
> > +   bool try_set_sync = mddev->safemode != 0;
> >
> > if (!mddev->external && mddev->safemode == 1)
> > mddev->safemode = 0;
> > @@ -8945,7 +8946,7 @@ void md_check_recovery(struct mddev *mddev)
> > }
> > }
> >
> > -   if (!mddev->external && !mddev->in_sync) {
> > +   if (try_set_sync && !mddev->external && !mddev->in_sync) {
> > spin_lock(>lock);
> > set_in_sync(mddev);
> > spin_unlock(>lock);

Re: [PATCH][ocfs2-next] ocfs2: ensure ret is set to zero before returning

[Joseph Qi]

On 19/8/7 20:19, Colin King wrote:
> From: Colin Ian King 
> 
> A previous commit introduced a regression where variable ret was
> originally being set from the return from a call to function
> dlm_create_debugfs_subroot and this set was removed. Currently
> ret is now uninitialized if no alloction errors are found which
> may end up with a bogus check on ret < 0 on the 'leave:' return
> path.  Fix this by setting ret to zero on a successful execution
> path.

Good catch.
Or shall we just initialize 'ret' at first?

> 
> Addresses-Coverity: ("Uninitialzed scalar variable")

Typo here. 

Thanks,
Joseph

> Fixes: cba322160ef0 ("ocfs2: further debugfs cleanups")
> Signed-off-by: Colin Ian King 
> ---
>  fs/ocfs2/dlm/dlmdomain.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/fs/ocfs2/dlm/dlmdomain.c b/fs/ocfs2/dlm/dlmdomain.c
> index 5c4218d66dd2..ee6f459f9770 100644
> --- a/fs/ocfs2/dlm/dlmdomain.c
> +++ b/fs/ocfs2/dlm/dlmdomain.c
> @@ -2052,6 +2052,7 @@ static struct dlm_ctxt *dlm_alloc_ctxt(const char 
> *domain,
>   mlog(0, "context init: refcount %u\n",
> kref_read(>dlm_refs));
>  
> + ret = 0;
>  leave:
>   if (ret < 0 && dlm) {
>   if (dlm->master_hash)
> 

[PATCH v4 20/20] RISC-V: KVM: Add MAINTAINERS entry

[Anup Patel]

Add myself as maintainer for KVM RISC-V as Atish as designated reviewer.

For time being, we use my GitHub repo as KVM RISC-V gitrepo. We will
update this once we have common KVM RISC-V gitrepo under kernel.org.

Signed-off-by: Atish Patra 
Signed-off-by: Anup Patel 
---
 MAINTAINERS | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a2c343ee3b2c..a2923ba8908a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8869,6 +8869,16 @@ F:   arch/powerpc/include/asm/kvm*
 F: arch/powerpc/kvm/
 F: arch/powerpc/kernel/kvm*
 
+KERNEL VIRTUAL MACHINE FOR RISC-V (KVM/riscv)
+M: Anup Patel 
+R: Atish Patra 
+L: linux-ri...@lists.infradead.org
+T: git git://github.com/avpatel/linux.git
+S: Maintained
+F: arch/riscv/include/uapi/asm/kvm*
+F: arch/riscv/include/asm/kvm*
+F: arch/riscv/kvm/
+
 KERNEL VIRTUAL MACHINE for s390 (KVM/s390)
 M: Christian Borntraeger 
 M: Janosch Frank 
-- 
2.17.1

[PATCH v4 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers

[Anup Patel]

From: Atish Patra 

Add a KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctl interface for floating
point registers such as F0-F31 and FCSR. This support is added for
both 'F' and 'D' extensions.

Signed-off-by: Atish Patra 
Signed-off-by: Anup Patel 
---
 arch/riscv/include/uapi/asm/kvm.h |  10 +++
 arch/riscv/kvm/vcpu.c | 104 ++
 2 files changed, 114 insertions(+)

diff --git a/arch/riscv/include/uapi/asm/kvm.h 
b/arch/riscv/include/uapi/asm/kvm.h
index 024f220eb17e..c9f03363bb28 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -83,6 +83,16 @@ struct kvm_sregs {
 #define KVM_REG_RISCV_CSR_REG(name)\
(offsetof(struct kvm_sregs, name) / sizeof(unsigned long))
 
+/* F extension registers are mapped as type4 */
+#define KVM_REG_RISCV_FP_F (0x04 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_FP_F_REG(name)   \
+   (offsetof(struct __riscv_f_ext_state, name) / sizeof(u32))
+
+/* D extension registers are mapped as type 5 */
+#define KVM_REG_RISCV_FP_D (0x05 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_FP_D_REG(name)   \
+   (offsetof(struct __riscv_d_ext_state, name) / sizeof(u64))
+
 #endif
 
 #endif /* __LINUX_KVM_RISCV_H */
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index e7c5fe09c3bc..ad7b67dc80aa 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -426,6 +426,98 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu 
*vcpu,
return 0;
 }
 
+static int kvm_riscv_vcpu_get_reg_fp(struct kvm_vcpu *vcpu,
+const struct kvm_one_reg *reg,
+unsigned long rtype)
+{
+   struct kvm_cpu_context *cntx = >arch.guest_context;
+   unsigned long isa = vcpu->arch.isa;
+   unsigned long __user *uaddr =
+   (unsigned long __user *)(unsigned long)reg->addr;
+   unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
+   KVM_REG_SIZE_MASK |
+   rtype);
+   void *reg_val;
+
+   if ((rtype == KVM_REG_RISCV_FP_F) &&
+   riscv_isa_extension_available(, f)) {
+   if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+   return -EINVAL;
+   if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
+   reg_val = >fp.f.fcsr;
+   else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+   reg_val = >fp.f.f[reg_num];
+   else
+   return -EINVAL;
+   } else if ((rtype == KVM_REG_RISCV_FP_D) &&
+  riscv_isa_extension_available(, d)) {
+   if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
+   if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+   return -EINVAL;
+   reg_val = >fp.d.fcsr;
+   } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) &&
+  reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
+   if (KVM_REG_SIZE(reg->id) != sizeof(u64))
+   return -EINVAL;
+   reg_val = >fp.d.f[reg_num];
+   } else
+   return -EINVAL;
+   } else
+   return -EINVAL;
+
+   if (copy_to_user(uaddr, reg_val, KVM_REG_SIZE(reg->id)))
+   return -EFAULT;
+
+   return 0;
+}
+
+static int kvm_riscv_vcpu_set_reg_fp(struct kvm_vcpu *vcpu,
+const struct kvm_one_reg *reg,
+unsigned long rtype)
+{
+   struct kvm_cpu_context *cntx = >arch.guest_context;
+   unsigned long isa = vcpu->arch.isa;
+   unsigned long __user *uaddr =
+   (unsigned long __user *)(unsigned long)reg->addr;
+   unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
+   KVM_REG_SIZE_MASK |
+   rtype);
+   void *reg_val;
+
+   if ((rtype == KVM_REG_RISCV_FP_F) &&
+   riscv_isa_extension_available(, f)) {
+   if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+   return -EINVAL;
+   if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
+   reg_val = >fp.f.fcsr;
+   else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
+ reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+   reg_val = >fp.f.f[reg_num];
+   else
+   return -EINVAL;
+   } else if ((rtype == KVM_REG_RISCV_FP_D) &&
+  riscv_isa_extension_available(, d)) {
+   if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) {
+   if (KVM_REG_SIZE(reg->id) != sizeof(u32))
+   

[PATCH v4 18/20] RISC-V: KVM: Add SBI v0.1 support

[Anup Patel]

From: Atish Patra 

The KVM host kernel running in HS-mode needs to handle SBI calls coming
from guest kernel running in VS-mode.

This patch adds SBI v0.1 support in KVM RISC-V. All the SBI calls are
implemented correctly except remote tlb flushes. For remote TLB flushes,
we are doing full TLB flush and this will be optimized in future.

Signed-off-by: Atish Patra 
Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |   2 +
 arch/riscv/kvm/Makefile   |   2 +-
 arch/riscv/kvm/vcpu_exit.c|   3 +
 arch/riscv/kvm/vcpu_sbi.c | 119 ++
 4 files changed, 125 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/kvm/vcpu_sbi.c

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index 2af3a179c08e..0b1eceaef59f 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -241,4 +241,6 @@ bool kvm_riscv_vcpu_has_interrupt(struct kvm_vcpu *vcpu);
 void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
 void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
 
+int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu);
+
 #endif /* __RISCV_KVM_HOST_H__ */
diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
index 3e0c7558320d..b56dc1650d2c 100644
--- a/arch/riscv/kvm/Makefile
+++ b/arch/riscv/kvm/Makefile
@@ -9,6 +9,6 @@ ccflags-y := -Ivirt/kvm -Iarch/riscv/kvm
 kvm-objs := $(common-objs-y)
 
 kvm-objs += main.o vm.o vmid.o tlb.o mmu.o
-kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o
+kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o vcpu_sbi.o
 
 obj-$(CONFIG_KVM)  += kvm.o
diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
index fbc04fe335ad..87b83fcf9a14 100644
--- a/arch/riscv/kvm/vcpu_exit.c
+++ b/arch/riscv/kvm/vcpu_exit.c
@@ -534,6 +534,9 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct 
kvm_run *run,
(vcpu->arch.guest_context.hstatus & HSTATUS_STL))
ret = stage2_page_fault(vcpu, run, scause, stval);
break;
+   case EXC_SUPERVISOR_SYSCALL:
+   if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV)
+   ret = kvm_riscv_vcpu_sbi_ecall(vcpu);
default:
break;
};
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c
new file mode 100644
index ..5793202eb514
--- /dev/null
+++ b/arch/riscv/kvm/vcpu_sbi.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0
+/**
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SBI_VERSION_MAJOR  0
+#define SBI_VERSION_MINOR  1
+
+/* TODO: Handle traps due to unpriv load and redirect it back to VS-mode */
+static unsigned long kvm_sbi_unpriv_load(const unsigned long *addr,
+struct kvm_vcpu *vcpu)
+{
+   unsigned long flags, val;
+   unsigned long __hstatus, __sstatus;
+
+   local_irq_save(flags);
+   __hstatus = csr_read(CSR_HSTATUS);
+   __sstatus = csr_read(CSR_SSTATUS);
+   csr_write(CSR_HSTATUS, vcpu->arch.guest_context.hstatus | HSTATUS_SPRV);
+   csr_write(CSR_SSTATUS, vcpu->arch.guest_context.sstatus);
+   val = *addr;
+   csr_write(CSR_HSTATUS, __hstatus);
+   csr_write(CSR_SSTATUS, __sstatus);
+   local_irq_restore(flags);
+
+   return val;
+}
+
+static void kvm_sbi_system_shutdown(struct kvm_vcpu *vcpu, u32 type)
+{
+   int i;
+   struct kvm_vcpu *tmp;
+
+   kvm_for_each_vcpu(i, tmp, vcpu->kvm)
+   tmp->arch.power_off = true;
+   kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
+
+   memset(>run->system_event, 0, sizeof(vcpu->run->system_event));
+   vcpu->run->system_event.type = type;
+   vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
+}
+
+int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu)
+{
+   int ret = 1;
+   u64 next_cycle;
+   int vcpuid;
+   struct kvm_vcpu *remote_vcpu;
+   ulong dhart_mask;
+   struct kvm_cpu_context *cp = >arch.guest_context;
+
+   if (!cp)
+   return -EINVAL;
+   switch (cp->a7) {
+   case SBI_SET_TIMER:
+#if __riscv_xlen == 32
+   next_cycle = ((u64)cp->a1 << 32) | (u64)cp->a0;
+#else
+   next_cycle = (u64)cp->a0;
+#endif
+   kvm_riscv_vcpu_timer_next_event(vcpu, next_cycle);
+   break;
+   case SBI_CONSOLE_PUTCHAR:
+   /* Not implemented */
+   cp->a0 = -ENOTSUPP;
+   break;
+   case SBI_CONSOLE_GETCHAR:
+   /* Not implemented */
+   cp->a0 = -ENOTSUPP;
+   break;
+   case SBI_CLEAR_IPI:
+   kvm_riscv_vcpu_unset_interrupt(vcpu, IRQ_S_SOFT);
+   break;
+   case SBI_SEND_IPI:
+   dhart_mask = 

[PATCH v4 19/20] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig

[Anup Patel]

This patch enables more VIRTIO drivers (such as console, rpmsg, 9p,
rng, etc.) which are usable on KVM RISC-V Guest and Xvisor RISC-V
Guest.

Signed-off-by: Anup Patel 
---
 arch/riscv/configs/defconfig  | 13 +
 arch/riscv/configs/rv32_defconfig | 13 +
 2 files changed, 26 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 93205c0bf71d..420a0dbef386 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 CONFIG_NETLINK_DIAG=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_HOST_GENERIC=y
@@ -39,6 +41,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_VIRTIO=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -54,11 +57,15 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
 CONFIG_HVC_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_SPI=y
 CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
+CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -71,7 +78,12 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
 CONFIG_MMC=y
 CONFIG_MMC_SPI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_VIRTIO_MMIO=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_AUTOFS4_FS=y
@@ -84,6 +96,7 @@ CONFIG_NFS_V4=y
 CONFIG_NFS_V4_1=y
 CONFIG_NFS_V4_2=y
 CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
diff --git a/arch/riscv/configs/rv32_defconfig 
b/arch/riscv/configs/rv32_defconfig
index d5449ef805a3..b28267404d55 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 CONFIG_NETLINK_DIAG=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_HOST_GENERIC=y
@@ -38,6 +40,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_VIRTIO=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -53,9 +56,13 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
 CONFIG_HVC_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_VIRTIO=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
+CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -66,7 +73,12 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_VIRTIO_MMIO=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
 CONFIG_SIFIVE_PLIC=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
@@ -80,6 +92,7 @@ CONFIG_NFS_V4=y
 CONFIG_NFS_V4_1=y
 CONFIG_NFS_V4_2=y
 CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
-- 
2.17.1

[PATCH v4 14/20] RISC-V: KVM: Implement MMU notifiers

[Anup Patel]

This patch implements MMU notifiers for KVM RISC-V so that Guest
physical address space is in-sync with Host physical address space.

This will allow swapping, page migration, etc to work transparently
with KVM RISC-V.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |   7 ++
 arch/riscv/kvm/Kconfig|   1 +
 arch/riscv/kvm/mmu.c  | 200 +-
 arch/riscv/kvm/vm.c   |   1 +
 4 files changed, 208 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index a37775c92586..ab33e59a3d88 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -192,6 +192,13 @@ static inline void kvm_arch_vcpu_block_finish(struct 
kvm_vcpu *vcpu) {}
 int kvm_riscv_setup_vsip(void);
 void kvm_riscv_cleanup_vsip(void);
 
+#define KVM_ARCH_WANT_MMU_NOTIFIER
+int kvm_unmap_hva_range(struct kvm *kvm,
+   unsigned long start, unsigned long end);
+int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
+int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
+int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
+
 extern void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long vmid,
 unsigned long gpa);
 extern void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid);
diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig
index 35fd30d0e432..002e14ee37f6 100644
--- a/arch/riscv/kvm/Kconfig
+++ b/arch/riscv/kvm/Kconfig
@@ -20,6 +20,7 @@ if VIRTUALIZATION
 config KVM
tristate "Kernel-based Virtual Machine (KVM) support"
depends on OF
+   select MMU_NOTIFIER
select PREEMPT_NOTIFIERS
select ANON_INODES
select KVM_MMIO
diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
index 9e95ab6769f6..0b8e46aebb02 100644
--- a/arch/riscv/kvm/mmu.c
+++ b/arch/riscv/kvm/mmu.c
@@ -67,6 +67,66 @@ static void *stage2_cache_alloc(struct kvm_mmu_page_cache 
*pcache)
return p;
 }
 
+static int stage2_pgdp_test_and_clear_young(pgd_t *pgd)
+{
+   return ptep_test_and_clear_young(NULL, 0, (pte_t *)pgd);
+}
+
+static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
+{
+   return ptep_test_and_clear_young(NULL, 0, (pte_t *)pmd);
+}
+
+static int stage2_ptep_test_and_clear_young(pte_t *pte)
+{
+   return ptep_test_and_clear_young(NULL, 0, pte);
+}
+
+static bool stage2_get_leaf_entry(struct kvm *kvm, gpa_t addr,
+ pgd_t **pgdpp, pmd_t **pmdpp, pte_t **ptepp)
+{
+   pgd_t *pgdp;
+   pmd_t *pmdp;
+   pte_t *ptep;
+
+   *pgdpp = NULL;
+   *pmdpp = NULL;
+   *ptepp = NULL;
+
+   pgdp = >arch.pgd[pgd_index(addr)];
+   if (!pgd_val(*pgdp))
+   return false;
+   if (pgd_val(*pgdp) & _PAGE_LEAF) {
+   *pgdpp = pgdp;
+   return true;
+   }
+
+   if (stage2_have_pmd) {
+   pmdp = (void *)pgd_page_vaddr(*pgdp);
+   pmdp = [pmd_index(addr)];
+   if (!pmd_present(*pmdp))
+   return false;
+   if (pmd_val(*pmdp) & _PAGE_LEAF) {
+   *pmdpp = pmdp;
+   return true;
+   }
+
+   ptep = (void *)pmd_page_vaddr(*pmdp);
+   } else {
+   ptep = (void *)pgd_page_vaddr(*pgdp);
+   }
+
+   ptep = [pte_index(addr)];
+   if (!pte_present(*ptep))
+   return false;
+   if (pte_val(*ptep) & _PAGE_LEAF) {
+   *ptepp = ptep;
+   return true;
+   }
+
+   return false;
+}
+
 struct local_guest_tlb_info {
struct kvm_vmid *vmid;
gpa_t addr;
@@ -444,6 +504,38 @@ int stage2_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t 
hpa,
 
 }
 
+static int handle_hva_to_gpa(struct kvm *kvm,
+unsigned long start,
+unsigned long end,
+int (*handler)(struct kvm *kvm,
+   gpa_t gpa, u64 size,
+   void *data),
+void *data)
+{
+   struct kvm_memslots *slots;
+   struct kvm_memory_slot *memslot;
+   int ret = 0;
+
+   slots = kvm_memslots(kvm);
+
+   /* we only care about the pages that the guest sees */
+   kvm_for_each_memslot(memslot, slots) {
+   unsigned long hva_start, hva_end;
+   gfn_t gpa;
+
+   hva_start = max(start, memslot->userspace_addr);
+   hva_end = min(end, memslot->userspace_addr +
+   (memslot->npages << PAGE_SHIFT));
+   if (hva_start >= hva_end)
+   continue;
+
+   gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
+   ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
+ 

[PATCH v4 13/20] RISC-V: KVM: Implement stage2 page table programming

[Anup Patel]

This patch implements all required functions for programming
the stage2 page table for each Guest/VM.

At high-level, the flow of stage2 related functions is similar
from KVM ARM/ARM64 implementation but the stage2 page table
format is quite different for KVM RISC-V.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |  10 +
 arch/riscv/include/asm/pgtable-bits.h |   1 +
 arch/riscv/kvm/mmu.c  | 637 +-
 3 files changed, 638 insertions(+), 10 deletions(-)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index 3b09158f80f2..a37775c92586 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -72,6 +72,13 @@ struct kvm_mmio_decode {
int shift;
 };
 
+#define KVM_MMU_PAGE_CACHE_NR_OBJS 32
+
+struct kvm_mmu_page_cache {
+   int nobjs;
+   void *objects[KVM_MMU_PAGE_CACHE_NR_OBJS];
+};
+
 struct kvm_cpu_context {
unsigned long zero;
unsigned long ra;
@@ -163,6 +170,9 @@ struct kvm_vcpu_arch {
/* MMIO instruction details */
struct kvm_mmio_decode mmio_decode;
 
+   /* Cache pages needed to program page tables with spinlock held */
+   struct kvm_mmu_page_cache mmu_page_cache;
+
/* VCPU power-off state */
bool power_off;
 
diff --git a/arch/riscv/include/asm/pgtable-bits.h 
b/arch/riscv/include/asm/pgtable-bits.h
index bbaeb5d35842..be49d62fcc2b 100644
--- a/arch/riscv/include/asm/pgtable-bits.h
+++ b/arch/riscv/include/asm/pgtable-bits.h
@@ -26,6 +26,7 @@
 
 #define _PAGE_SPECIAL   _PAGE_SOFT
 #define _PAGE_TABLE _PAGE_PRESENT
+#define _PAGE_LEAF  (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
 
 /*
  * _PAGE_PROT_NONE is set on not-present pages (and ignored by the hardware) to
diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
index 2b965f9aac07..9e95ab6769f6 100644
--- a/arch/riscv/kvm/mmu.c
+++ b/arch/riscv/kvm/mmu.c
@@ -18,6 +18,432 @@
 #include 
 #include 
 
+#ifdef CONFIG_64BIT
+#define stage2_have_pmdtrue
+#define stage2_gpa_size((phys_addr_t)(1ULL << 39))
+#define stage2_cache_min_pages 2
+#else
+#define pmd_index(x)   0
+#define pfn_pmd(x, y)  ({ pmd_t __x = { 0 }; __x; })
+#define stage2_have_pmdfalse
+#define stage2_gpa_size((phys_addr_t)(1ULL << 32))
+#define stage2_cache_min_pages 1
+#endif
+
+static int stage2_cache_topup(struct kvm_mmu_page_cache *pcache,
+ int min, int max)
+{
+   void *page;
+
+   BUG_ON(max > KVM_MMU_PAGE_CACHE_NR_OBJS);
+   if (pcache->nobjs >= min)
+   return 0;
+   while (pcache->nobjs < max) {
+   page = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
+   if (!page)
+   return -ENOMEM;
+   pcache->objects[pcache->nobjs++] = page;
+   }
+
+   return 0;
+}
+
+static void stage2_cache_flush(struct kvm_mmu_page_cache *pcache)
+{
+   while (pcache && pcache->nobjs)
+   free_page((unsigned long)pcache->objects[--pcache->nobjs]);
+}
+
+static void *stage2_cache_alloc(struct kvm_mmu_page_cache *pcache)
+{
+   void *p;
+
+   if (!pcache)
+   return NULL;
+
+   BUG_ON(!pcache->nobjs);
+   p = pcache->objects[--pcache->nobjs];
+
+   return p;
+}
+
+struct local_guest_tlb_info {
+   struct kvm_vmid *vmid;
+   gpa_t addr;
+};
+
+static void local_guest_tlb_flush_vmid_gpa(void *info)
+{
+   struct local_guest_tlb_info *infop = info;
+
+   __kvm_riscv_hfence_gvma_vmid_gpa(READ_ONCE(infop->vmid->vmid_version),
+infop->addr);
+}
+
+static void stage2_remote_tlb_flush(struct kvm *kvm, gpa_t addr)
+{
+   struct local_guest_tlb_info info;
+   struct kvm_vmid *vmid = >arch.vmid;
+
+   /* TODO: This should be SBI call */
+   info.vmid = vmid;
+   info.addr = addr;
+   preempt_disable();
+   smp_call_function_many(cpu_all_mask, local_guest_tlb_flush_vmid_gpa,
+  , true);
+   preempt_enable();
+}
+
+static int stage2_set_pgd(struct kvm *kvm, gpa_t addr, const pgd_t *new_pgd)
+{
+   pgd_t *pgdp = >arch.pgd[pgd_index(addr)];
+
+   *pgdp = *new_pgd;
+   if (pgd_val(*pgdp) & _PAGE_LEAF)
+   stage2_remote_tlb_flush(kvm, addr);
+
+   return 0;
+}
+
+static int stage2_set_pmd(struct kvm *kvm, struct kvm_mmu_page_cache *pcache,
+ gpa_t addr, const pmd_t *new_pmd)
+{
+   int rc;
+   pmd_t *pmdp;
+   pgd_t new_pgd;
+   pgd_t *pgdp = >arch.pgd[pgd_index(addr)];
+
+   if (!pgd_val(*pgdp)) {
+   pmdp = stage2_cache_alloc(pcache);
+   if (!pmdp)
+   return -ENOMEM;
+   new_pgd = pfn_pgd(PFN_DOWN(__pa(pmdp)), __pgprot(_PAGE_TABLE));
+   rc = stage2_set_pgd(kvm, addr, _pgd);
+   if (rc)
+

[PATCH v4 15/20] RISC-V: KVM: Add timer functionality

[Anup Patel]

From: Atish Patra 

The RISC-V hypervisor specification doesn't have any virtual timer
feature.

Due to this, the guest VCPU timer will be programmed via SBI calls.
The host will use a separate hrtimer event for each guest VCPU to
provide timer functionality. We inject a virtual timer interrupt to
the guest VCPU whenever the guest VCPU hrtimer event expires.

The following features are not supported yet and will be added in
future:
1. A time offset to adjust guest time from host time
2. A saved next event in guest vcpu for vm migration

Signed-off-by: Atish Patra 
Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h   |   4 +
 arch/riscv/include/asm/kvm_vcpu_timer.h |  32 +++
 arch/riscv/kvm/Makefile |   2 +-
 arch/riscv/kvm/vcpu.c   |   6 ++
 arch/riscv/kvm/vcpu_timer.c | 106 
 drivers/clocksource/timer-riscv.c   |   8 ++
 include/clocksource/timer-riscv.h   |  16 
 7 files changed, 173 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/include/asm/kvm_vcpu_timer.h
 create mode 100644 arch/riscv/kvm/vcpu_timer.c
 create mode 100644 include/clocksource/timer-riscv.h

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index ab33e59a3d88..d2a2e45eefc0 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_64BIT
 #define KVM_MAX_VCPUS  (1U << 16)
@@ -167,6 +168,9 @@ struct kvm_vcpu_arch {
unsigned long irqs_pending;
unsigned long irqs_pending_mask;
 
+   /* VCPU Timer */
+   struct kvm_vcpu_timer timer;
+
/* MMIO instruction details */
struct kvm_mmio_decode mmio_decode;
 
diff --git a/arch/riscv/include/asm/kvm_vcpu_timer.h 
b/arch/riscv/include/asm/kvm_vcpu_timer.h
new file mode 100644
index ..df67ea86988e
--- /dev/null
+++ b/arch/riscv/include/asm/kvm_vcpu_timer.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra 
+ */
+
+#ifndef __KVM_VCPU_RISCV_TIMER_H
+#define __KVM_VCPU_RISCV_TIMER_H
+
+#include 
+
+#define VCPU_TIMER_PROGRAM_THRESHOLD_NS1000
+
+struct kvm_vcpu_timer {
+   bool init_done;
+   /* Check if the timer is programmed */
+   bool is_set;
+   struct hrtimer hrt;
+   /* Mult & Shift values to get nanosec from cycles */
+   u32 mult;
+   u32 shift;
+};
+
+int kvm_riscv_vcpu_timer_init(struct kvm_vcpu *vcpu);
+int kvm_riscv_vcpu_timer_deinit(struct kvm_vcpu *vcpu);
+int kvm_riscv_vcpu_timer_reset(struct kvm_vcpu *vcpu);
+int kvm_riscv_vcpu_timer_next_event(struct kvm_vcpu *vcpu,
+   unsigned long ncycles);
+
+#endif
diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
index c0f57f26c13d..3e0c7558320d 100644
--- a/arch/riscv/kvm/Makefile
+++ b/arch/riscv/kvm/Makefile
@@ -9,6 +9,6 @@ ccflags-y := -Ivirt/kvm -Iarch/riscv/kvm
 kvm-objs := $(common-objs-y)
 
 kvm-objs += main.o vm.o vmid.o tlb.o mmu.o
-kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o
+kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o vcpu_timer.o
 
 obj-$(CONFIG_KVM)  += kvm.o
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 6124077d154f..018fca436776 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -54,6 +54,8 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 
memcpy(cntx, reset_cntx, sizeof(*cntx));
 
+   kvm_riscv_vcpu_timer_reset(vcpu);
+
WRITE_ONCE(vcpu->arch.irqs_pending, 0);
WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);
 }
@@ -108,6 +110,9 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
cntx->hstatus |= HSTATUS_SP2P;
cntx->hstatus |= HSTATUS_SPV;
 
+   /* Setup VCPU timer */
+   kvm_riscv_vcpu_timer_init(vcpu);
+
/* Reset VCPU */
kvm_riscv_reset_vcpu(vcpu);
 
@@ -116,6 +121,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
 {
+   kvm_riscv_vcpu_timer_deinit(vcpu);
kvm_riscv_stage2_flush_cache(vcpu);
kmem_cache_free(kvm_vcpu_cache, vcpu);
 }
diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c
new file mode 100644
index ..a45ca06e1aa6
--- /dev/null
+++ b/arch/riscv/kvm/vcpu_timer.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static enum hrtimer_restart kvm_riscv_vcpu_hrtimer_expired(struct hrtimer *h)
+{
+   struct kvm_vcpu_timer *t = container_of(h, struct kvm_vcpu_timer, hrt);
+   struct kvm_vcpu *vcpu = container_of(t, struct kvm_vcpu, arch.timer);
+
+   t->is_set = false;
+   

[PATCH v4 10/20] RISC-V: KVM: Handle MMIO exits for VCPU

[Anup Patel]

We will get stage2 page faults whenever Guest/VM access SW emulated
MMIO device or unmapped Guest RAM.

This patch implements MMIO read/write emulation by extracting MMIO
details from the trapped load/store instruction and forwarding the
MMIO read/write to user-space. The actual MMIO emulation will happen
in user-space and KVM kernel module will only take care of register
updates before resuming the trapped VCPU.

The handling for stage2 page faults for unmapped Guest RAM will be
implemeted by a separate patch later.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |  11 +
 arch/riscv/kvm/mmu.c  |   7 +
 arch/riscv/kvm/vcpu_exit.c| 436 +-
 3 files changed, 451 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index 18f1097f1d8d..4388bace6d70 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -53,6 +53,12 @@ struct kvm_arch {
phys_addr_t pgd_phys;
 };
 
+struct kvm_mmio_decode {
+   unsigned long insn;
+   int len;
+   int shift;
+};
+
 struct kvm_cpu_context {
unsigned long zero;
unsigned long ra;
@@ -141,6 +147,9 @@ struct kvm_vcpu_arch {
unsigned long irqs_pending;
unsigned long irqs_pending_mask;
 
+   /* MMIO instruction details */
+   struct kvm_mmio_decode mmio_decode;
+
/* VCPU power-off state */
bool power_off;
 
@@ -160,6 +169,8 @@ static inline void kvm_arch_vcpu_block_finish(struct 
kvm_vcpu *vcpu) {}
 int kvm_riscv_setup_vsip(void);
 void kvm_riscv_cleanup_vsip(void);
 
+int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned long hva,
+bool is_write);
 void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu);
 int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm);
 void kvm_riscv_stage2_free_pgd(struct kvm *kvm);
diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c
index 04dd089b86ff..2b965f9aac07 100644
--- a/arch/riscv/kvm/mmu.c
+++ b/arch/riscv/kvm/mmu.c
@@ -61,6 +61,13 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
return 0;
 }
 
+int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned long hva,
+bool is_write)
+{
+   /* TODO: */
+   return 0;
+}
+
 void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu)
 {
/* TODO: */
diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
index e4d7c8f0807a..efc06198c259 100644
--- a/arch/riscv/kvm/vcpu_exit.c
+++ b/arch/riscv/kvm/vcpu_exit.c
@@ -6,9 +6,371 @@
  * Anup Patel 
  */
 
+#include 
 #include 
 #include 
 #include 
+#include 
+
+#define INSN_MATCH_LB  0x3
+#define INSN_MASK_LB   0x707f
+#define INSN_MATCH_LH  0x1003
+#define INSN_MASK_LH   0x707f
+#define INSN_MATCH_LW  0x2003
+#define INSN_MASK_LW   0x707f
+#define INSN_MATCH_LD  0x3003
+#define INSN_MASK_LD   0x707f
+#define INSN_MATCH_LBU 0x4003
+#define INSN_MASK_LBU  0x707f
+#define INSN_MATCH_LHU 0x5003
+#define INSN_MASK_LHU  0x707f
+#define INSN_MATCH_LWU 0x6003
+#define INSN_MASK_LWU  0x707f
+#define INSN_MATCH_SB  0x23
+#define INSN_MASK_SB   0x707f
+#define INSN_MATCH_SH  0x1023
+#define INSN_MASK_SH   0x707f
+#define INSN_MATCH_SW  0x2023
+#define INSN_MASK_SW   0x707f
+#define INSN_MATCH_SD  0x3023
+#define INSN_MASK_SD   0x707f
+
+#define INSN_MATCH_C_LD0x6000
+#define INSN_MASK_C_LD 0xe003
+#define INSN_MATCH_C_SD0xe000
+#define INSN_MASK_C_SD 0xe003
+#define INSN_MATCH_C_LW0x4000
+#define INSN_MASK_C_LW 0xe003
+#define INSN_MATCH_C_SW0xc000
+#define INSN_MASK_C_SW 0xe003
+#define INSN_MATCH_C_LDSP  0x6002
+#define INSN_MASK_C_LDSP   0xe003
+#define INSN_MATCH_C_SDSP  0xe002
+#define INSN_MASK_C_SDSP   0xe003
+#define INSN_MATCH_C_LWSP  0x4002
+#define INSN_MASK_C_LWSP   0xe003
+#define INSN_MATCH_C_SWSP  0xc002
+#define INSN_MASK_C_SWSP   0xe003
+
+#define INSN_LEN(insn) insn) & 0x3) < 0x3) ? 2 : 4)
+
+#ifdef CONFIG_64BIT
+#define LOG_REGBYTES   3
+#else
+#define LOG_REGBYTES   2
+#endif
+#define REGBYTES   (1 << LOG_REGBYTES)
+
+#define SH_RD  7
+#define SH_RS1 15
+#define SH_RS2 20
+#define SH_RS2C2
+
+#define RV_X(x, s, n)  (((x) >> (s)) & ((1 << (n)) - 1))
+#define RVC_LW_IMM(x)  ((RV_X(x, 6, 1) << 2) | \
+(RV_X(x, 10, 3) << 3) | \
+(RV_X(x, 5, 1) << 6))
+#define RVC_LD_IMM(x)  ((RV_X(x, 10, 3) << 3) | \
+(RV_X(x, 5, 2) << 6))
+#define RVC_LWSP_IMM(x)((RV_X(x, 4, 3) << 2) 

[PATCH v4 16/20] RISC-V: KVM: FP lazy save/restore

[Anup Patel]

From: Atish Patra 

This patch adds floating point (F and D extension) context save/restore
for guest VCPUs. The FP context is saved and restored lazily only when
kernel enter/exits the in-kernel run loop and not during the KVM world
switch. This way FP save/restore has minimal impact on KVM performance.

Signed-off-by: Atish Patra 
Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |   5 +
 arch/riscv/kernel/asm-offsets.c   |  72 +
 arch/riscv/kvm/vcpu.c |  81 ++
 arch/riscv/kvm/vcpu_switch.S  | 174 ++
 4 files changed, 332 insertions(+)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index d2a2e45eefc0..2af3a179c08e 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -116,6 +116,7 @@ struct kvm_cpu_context {
unsigned long sepc;
unsigned long sstatus;
unsigned long hstatus;
+   union __riscv_fp_state fp;
 };
 
 struct kvm_vcpu_csr {
@@ -227,6 +228,10 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct 
kvm_run *run,
unsigned long scause, unsigned long stval);
 
 void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch);
+void __kvm_riscv_vcpu_fp_f_save(struct kvm_cpu_context *context);
+void __kvm_riscv_vcpu_fp_f_restore(struct kvm_cpu_context *context);
+void __kvm_riscv_vcpu_fp_d_save(struct kvm_cpu_context *context);
+void __kvm_riscv_vcpu_fp_d_restore(struct kvm_cpu_context *context);
 
 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index 711656710190..9980069a1acf 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -185,6 +185,78 @@ void asm_offsets(void)
OFFSET(KVM_ARCH_HOST_SSCRATCH, kvm_vcpu_arch, host_sscratch);
OFFSET(KVM_ARCH_HOST_STVEC, kvm_vcpu_arch, host_stvec);
 
+   /* F extension */
+
+   OFFSET(KVM_ARCH_FP_F_F0, kvm_cpu_context, fp.f.f[0]);
+   OFFSET(KVM_ARCH_FP_F_F1, kvm_cpu_context, fp.f.f[1]);
+   OFFSET(KVM_ARCH_FP_F_F2, kvm_cpu_context, fp.f.f[2]);
+   OFFSET(KVM_ARCH_FP_F_F3, kvm_cpu_context, fp.f.f[3]);
+   OFFSET(KVM_ARCH_FP_F_F4, kvm_cpu_context, fp.f.f[4]);
+   OFFSET(KVM_ARCH_FP_F_F5, kvm_cpu_context, fp.f.f[5]);
+   OFFSET(KVM_ARCH_FP_F_F6, kvm_cpu_context, fp.f.f[6]);
+   OFFSET(KVM_ARCH_FP_F_F7, kvm_cpu_context, fp.f.f[7]);
+   OFFSET(KVM_ARCH_FP_F_F8, kvm_cpu_context, fp.f.f[8]);
+   OFFSET(KVM_ARCH_FP_F_F9, kvm_cpu_context, fp.f.f[9]);
+   OFFSET(KVM_ARCH_FP_F_F10, kvm_cpu_context, fp.f.f[10]);
+   OFFSET(KVM_ARCH_FP_F_F11, kvm_cpu_context, fp.f.f[11]);
+   OFFSET(KVM_ARCH_FP_F_F12, kvm_cpu_context, fp.f.f[12]);
+   OFFSET(KVM_ARCH_FP_F_F13, kvm_cpu_context, fp.f.f[13]);
+   OFFSET(KVM_ARCH_FP_F_F14, kvm_cpu_context, fp.f.f[14]);
+   OFFSET(KVM_ARCH_FP_F_F15, kvm_cpu_context, fp.f.f[15]);
+   OFFSET(KVM_ARCH_FP_F_F16, kvm_cpu_context, fp.f.f[16]);
+   OFFSET(KVM_ARCH_FP_F_F17, kvm_cpu_context, fp.f.f[17]);
+   OFFSET(KVM_ARCH_FP_F_F18, kvm_cpu_context, fp.f.f[18]);
+   OFFSET(KVM_ARCH_FP_F_F19, kvm_cpu_context, fp.f.f[19]);
+   OFFSET(KVM_ARCH_FP_F_F20, kvm_cpu_context, fp.f.f[20]);
+   OFFSET(KVM_ARCH_FP_F_F21, kvm_cpu_context, fp.f.f[21]);
+   OFFSET(KVM_ARCH_FP_F_F22, kvm_cpu_context, fp.f.f[22]);
+   OFFSET(KVM_ARCH_FP_F_F23, kvm_cpu_context, fp.f.f[23]);
+   OFFSET(KVM_ARCH_FP_F_F24, kvm_cpu_context, fp.f.f[24]);
+   OFFSET(KVM_ARCH_FP_F_F25, kvm_cpu_context, fp.f.f[25]);
+   OFFSET(KVM_ARCH_FP_F_F26, kvm_cpu_context, fp.f.f[26]);
+   OFFSET(KVM_ARCH_FP_F_F27, kvm_cpu_context, fp.f.f[27]);
+   OFFSET(KVM_ARCH_FP_F_F28, kvm_cpu_context, fp.f.f[28]);
+   OFFSET(KVM_ARCH_FP_F_F29, kvm_cpu_context, fp.f.f[29]);
+   OFFSET(KVM_ARCH_FP_F_F30, kvm_cpu_context, fp.f.f[30]);
+   OFFSET(KVM_ARCH_FP_F_F31, kvm_cpu_context, fp.f.f[31]);
+   OFFSET(KVM_ARCH_FP_F_FCSR, kvm_cpu_context, fp.f.fcsr);
+
+   /* D extension */
+
+   OFFSET(KVM_ARCH_FP_D_F0, kvm_cpu_context, fp.d.f[0]);
+   OFFSET(KVM_ARCH_FP_D_F1, kvm_cpu_context, fp.d.f[1]);
+   OFFSET(KVM_ARCH_FP_D_F2, kvm_cpu_context, fp.d.f[2]);
+   OFFSET(KVM_ARCH_FP_D_F3, kvm_cpu_context, fp.d.f[3]);
+   OFFSET(KVM_ARCH_FP_D_F4, kvm_cpu_context, fp.d.f[4]);
+   OFFSET(KVM_ARCH_FP_D_F5, kvm_cpu_context, fp.d.f[5]);
+   OFFSET(KVM_ARCH_FP_D_F6, kvm_cpu_context, fp.d.f[6]);
+   OFFSET(KVM_ARCH_FP_D_F7, kvm_cpu_context, fp.d.f[7]);
+   OFFSET(KVM_ARCH_FP_D_F8, kvm_cpu_context, fp.d.f[8]);
+   OFFSET(KVM_ARCH_FP_D_F9, kvm_cpu_context, fp.d.f[9]);
+   OFFSET(KVM_ARCH_FP_D_F10, kvm_cpu_context, fp.d.f[10]);
+   OFFSET(KVM_ARCH_FP_D_F11, kvm_cpu_context, fp.d.f[11]);
+   OFFSET(KVM_ARCH_FP_D_F12, 

[PATCH v4 12/20] RISC-V: KVM: Implement VMID allocator

[Anup Patel]

We implement a simple VMID allocator for Guests/VMs which:
1. Detects number of VMID bits at boot-time
2. Uses atomic number to track VMID version and increments
   VMID version whenever we run-out of VMIDs
3. Flushes Guest TLBs on all host CPUs whenever we run-out
   of VMIDs
4. Force updates HW Stage2 VMID for each Guest VCPU whenever
   VMID changes using VCPU request KVM_REQ_UPDATE_HGATP

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |  25 ++
 arch/riscv/kvm/Makefile   |   3 +-
 arch/riscv/kvm/main.c |   4 +
 arch/riscv/kvm/tlb.S  |  43 +++
 arch/riscv/kvm/vcpu.c |   9 +++
 arch/riscv/kvm/vm.c   |   6 ++
 arch/riscv/kvm/vmid.c | 123 ++
 7 files changed, 212 insertions(+), 1 deletion(-)
 create mode 100644 arch/riscv/kvm/tlb.S
 create mode 100644 arch/riscv/kvm/vmid.c

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index 4388bace6d70..3b09158f80f2 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -27,6 +27,7 @@
 #define KVM_REQ_SLEEP \
KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1)
+#define KVM_REQ_UPDATE_HGATP   KVM_ARCH_REQ(2)
 
 struct kvm_vm_stat {
ulong remote_tlb_flush;
@@ -47,7 +48,19 @@ struct kvm_vcpu_stat {
 struct kvm_arch_memory_slot {
 };
 
+struct kvm_vmid {
+   /*
+* Writes to vmid_version and vmid happen with vmid_lock held
+* whereas reads happen without any lock held.
+*/
+   unsigned long vmid_version;
+   unsigned long vmid;
+};
+
 struct kvm_arch {
+   /* stage2 vmid */
+   struct kvm_vmid vmid;
+
/* stage2 page table */
pgd_t *pgd;
phys_addr_t pgd_phys;
@@ -169,6 +182,12 @@ static inline void kvm_arch_vcpu_block_finish(struct 
kvm_vcpu *vcpu) {}
 int kvm_riscv_setup_vsip(void);
 void kvm_riscv_cleanup_vsip(void);
 
+extern void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long vmid,
+unsigned long gpa);
+extern void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid);
+extern void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa);
+extern void __kvm_riscv_hfence_gvma_all(void);
+
 int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned long hva,
 bool is_write);
 void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu);
@@ -176,6 +195,12 @@ int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm);
 void kvm_riscv_stage2_free_pgd(struct kvm *kvm);
 void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu);
 
+void kvm_riscv_stage2_vmid_detect(void);
+unsigned long kvm_riscv_stage2_vmid_bits(void);
+int kvm_riscv_stage2_vmid_init(struct kvm *kvm);
+bool kvm_riscv_stage2_vmid_ver_changed(struct kvm_vmid *vmid);
+void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu);
+
 int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
unsigned long scause, unsigned long stval);
diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile
index 845579273727..c0f57f26c13d 100644
--- a/arch/riscv/kvm/Makefile
+++ b/arch/riscv/kvm/Makefile
@@ -8,6 +8,7 @@ ccflags-y := -Ivirt/kvm -Iarch/riscv/kvm
 
 kvm-objs := $(common-objs-y)
 
-kvm-objs += main.o vm.o mmu.o vcpu.o vcpu_exit.o vcpu_switch.o
+kvm-objs += main.o vm.o vmid.o tlb.o mmu.o
+kvm-objs += vcpu.o vcpu_exit.o vcpu_switch.o
 
 obj-$(CONFIG_KVM)  += kvm.o
diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
index d088247843c5..55df85184241 100644
--- a/arch/riscv/kvm/main.c
+++ b/arch/riscv/kvm/main.c
@@ -72,8 +72,12 @@ int kvm_arch_init(void *opaque)
if (ret)
return ret;
 
+   kvm_riscv_stage2_vmid_detect();
+
kvm_info("hypervisor extension available\n");
 
+   kvm_info("host has %ld VMID bits\n", kvm_riscv_stage2_vmid_bits());
+
return 0;
 }
 
diff --git a/arch/riscv/kvm/tlb.S b/arch/riscv/kvm/tlb.S
new file mode 100644
index ..453fca8d7940
--- /dev/null
+++ b/arch/riscv/kvm/tlb.S
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel 
+ */
+
+#include 
+#include 
+
+   .text
+   .altmacro
+   .option norelax
+
+   /*
+* Instruction encoding of hfence.gvma is:
+* 0110001 rs2(5) rs1(5) 000 0 1110011
+*/
+
+ENTRY(__kvm_riscv_hfence_gvma_vmid_gpa)
+   /* hfence.gvma a1, a0 */
+   .word 0x62a60073
+   ret
+ENDPROC(__kvm_riscv_hfence_gvma_vmid_gpa)
+
+ENTRY(__kvm_riscv_hfence_gvma_vmid)
+   /* hfence.gvma zero, a0 */
+   .word 0x62a00073
+   ret
+ENDPROC(__kvm_riscv_hfence_gvma_vmid)
+
+ENTRY(__kvm_riscv_hfence_gvma_gpa)
+   /* hfence.gvma a0 */
+   

[PATCH v4 09/20] RISC-V: KVM: Implement VCPU world-switch

[Anup Patel]

This patch implements the VCPU world-switch for KVM RISC-V.

The KVM RISC-V world-switch (i.e. __kvm_riscv_switch_to()) mostly
switches general purpose registers, SSTATUS, STVEC, SSCRATCH and
HSTATUS CSRs. Other CSRs are switched via vcpu_load() and vcpu_put()
interface in kvm_arch_vcpu_load() and kvm_arch_vcpu_put() functions
respectively.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |   9 +-
 arch/riscv/kernel/asm-offsets.c   |  76 
 arch/riscv/kvm/Makefile   |   2 +-
 arch/riscv/kvm/vcpu.c |  32 -
 arch/riscv/kvm/vcpu_switch.S  | 194 ++
 5 files changed, 309 insertions(+), 4 deletions(-)
 create mode 100644 arch/riscv/kvm/vcpu_switch.S

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index d801216da6d0..18f1097f1d8d 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -110,6 +110,13 @@ struct kvm_vcpu_arch {
/* ISA feature bits (similar to MISA) */
unsigned long isa;
 
+   /* SSCRATCH and STVEC of Host */
+   unsigned long host_sscratch;
+   unsigned long host_stvec;
+
+   /* CPU context of Host */
+   struct kvm_cpu_context host_context;
+
/* CPU context of Guest VCPU */
struct kvm_cpu_context guest_context;
 
@@ -162,7 +169,7 @@ int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, 
struct kvm_run *run);
 int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
unsigned long scause, unsigned long stval);
 
-static inline void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch) {}
+void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch);
 
 int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
 int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index 9f5628c38ac9..711656710190 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -7,7 +7,9 @@
 #define GENERATING_ASM_OFFSETS
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -109,6 +111,80 @@ void asm_offsets(void)
OFFSET(PT_SBADADDR, pt_regs, sbadaddr);
OFFSET(PT_SCAUSE, pt_regs, scause);
 
+   OFFSET(KVM_ARCH_GUEST_ZERO, kvm_vcpu_arch, guest_context.zero);
+   OFFSET(KVM_ARCH_GUEST_RA, kvm_vcpu_arch, guest_context.ra);
+   OFFSET(KVM_ARCH_GUEST_SP, kvm_vcpu_arch, guest_context.sp);
+   OFFSET(KVM_ARCH_GUEST_GP, kvm_vcpu_arch, guest_context.gp);
+   OFFSET(KVM_ARCH_GUEST_TP, kvm_vcpu_arch, guest_context.tp);
+   OFFSET(KVM_ARCH_GUEST_T0, kvm_vcpu_arch, guest_context.t0);
+   OFFSET(KVM_ARCH_GUEST_T1, kvm_vcpu_arch, guest_context.t1);
+   OFFSET(KVM_ARCH_GUEST_T2, kvm_vcpu_arch, guest_context.t2);
+   OFFSET(KVM_ARCH_GUEST_S0, kvm_vcpu_arch, guest_context.s0);
+   OFFSET(KVM_ARCH_GUEST_S1, kvm_vcpu_arch, guest_context.s1);
+   OFFSET(KVM_ARCH_GUEST_A0, kvm_vcpu_arch, guest_context.a0);
+   OFFSET(KVM_ARCH_GUEST_A1, kvm_vcpu_arch, guest_context.a1);
+   OFFSET(KVM_ARCH_GUEST_A2, kvm_vcpu_arch, guest_context.a2);
+   OFFSET(KVM_ARCH_GUEST_A3, kvm_vcpu_arch, guest_context.a3);
+   OFFSET(KVM_ARCH_GUEST_A4, kvm_vcpu_arch, guest_context.a4);
+   OFFSET(KVM_ARCH_GUEST_A5, kvm_vcpu_arch, guest_context.a5);
+   OFFSET(KVM_ARCH_GUEST_A6, kvm_vcpu_arch, guest_context.a6);
+   OFFSET(KVM_ARCH_GUEST_A7, kvm_vcpu_arch, guest_context.a7);
+   OFFSET(KVM_ARCH_GUEST_S2, kvm_vcpu_arch, guest_context.s2);
+   OFFSET(KVM_ARCH_GUEST_S3, kvm_vcpu_arch, guest_context.s3);
+   OFFSET(KVM_ARCH_GUEST_S4, kvm_vcpu_arch, guest_context.s4);
+   OFFSET(KVM_ARCH_GUEST_S5, kvm_vcpu_arch, guest_context.s5);
+   OFFSET(KVM_ARCH_GUEST_S6, kvm_vcpu_arch, guest_context.s6);
+   OFFSET(KVM_ARCH_GUEST_S7, kvm_vcpu_arch, guest_context.s7);
+   OFFSET(KVM_ARCH_GUEST_S8, kvm_vcpu_arch, guest_context.s8);
+   OFFSET(KVM_ARCH_GUEST_S9, kvm_vcpu_arch, guest_context.s9);
+   OFFSET(KVM_ARCH_GUEST_S10, kvm_vcpu_arch, guest_context.s10);
+   OFFSET(KVM_ARCH_GUEST_S11, kvm_vcpu_arch, guest_context.s11);
+   OFFSET(KVM_ARCH_GUEST_T3, kvm_vcpu_arch, guest_context.t3);
+   OFFSET(KVM_ARCH_GUEST_T4, kvm_vcpu_arch, guest_context.t4);
+   OFFSET(KVM_ARCH_GUEST_T5, kvm_vcpu_arch, guest_context.t5);
+   OFFSET(KVM_ARCH_GUEST_T6, kvm_vcpu_arch, guest_context.t6);
+   OFFSET(KVM_ARCH_GUEST_SEPC, kvm_vcpu_arch, guest_context.sepc);
+   OFFSET(KVM_ARCH_GUEST_SSTATUS, kvm_vcpu_arch, guest_context.sstatus);
+   OFFSET(KVM_ARCH_GUEST_HSTATUS, kvm_vcpu_arch, guest_context.hstatus);
+
+   OFFSET(KVM_ARCH_HOST_ZERO, kvm_vcpu_arch, host_context.zero);
+   OFFSET(KVM_ARCH_HOST_RA, kvm_vcpu_arch, host_context.ra);
+   OFFSET(KVM_ARCH_HOST_SP, kvm_vcpu_arch, host_context.sp);
+   OFFSET(KVM_ARCH_HOST_GP, kvm_vcpu_arch, 

[PATCH v4 11/20] RISC-V: KVM: Handle WFI exits for VCPU

[Anup Patel]

We get illegal instruction trap whenever Guest/VM executes WFI
instruction.

This patch handles WFI trap by blocking the trapped VCPU using
kvm_vcpu_block() API. The blocked VCPU will be automatically
resumed whenever a VCPU interrupt is injected from user-space
or from in-kernel IRQCHIP emulation.

Signed-off-by: Anup Patel 
---
 arch/riscv/kvm/vcpu_exit.c | 88 ++
 1 file changed, 88 insertions(+)

diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
index efc06198c259..fbc04fe335ad 100644
--- a/arch/riscv/kvm/vcpu_exit.c
+++ b/arch/riscv/kvm/vcpu_exit.c
@@ -12,6 +12,9 @@
 #include 
 #include 
 
+#define INSN_MASK_WFI  0xff00
+#define INSN_MATCH_WFI 0x1050
+
 #define INSN_MATCH_LB  0x3
 #define INSN_MASK_LB   0x707f
 #define INSN_MATCH_LH  0x1003
@@ -179,6 +182,87 @@ static ulong get_insn(struct kvm_vcpu *vcpu)
return val;
 }
 
+typedef int (*illegal_insn_func)(struct kvm_vcpu *vcpu,
+struct kvm_run *run,
+ulong insn);
+
+static int truly_illegal_insn(struct kvm_vcpu *vcpu,
+ struct kvm_run *run,
+ ulong insn)
+{
+   /* TODO: Redirect trap to Guest VCPU */
+   return -ENOTSUPP;
+}
+
+static int system_opcode_insn(struct kvm_vcpu *vcpu,
+ struct kvm_run *run,
+ ulong insn)
+{
+   if ((insn & INSN_MASK_WFI) == INSN_MATCH_WFI) {
+   vcpu->stat.wfi_exit_stat++;
+   if (!kvm_arch_vcpu_runnable(vcpu)) {
+   srcu_read_unlock(>kvm->srcu, vcpu->arch.srcu_idx);
+   kvm_vcpu_block(vcpu);
+   vcpu->arch.srcu_idx = srcu_read_lock(>kvm->srcu);
+   kvm_clear_request(KVM_REQ_UNHALT, vcpu);
+   }
+   vcpu->arch.guest_context.sepc += INSN_LEN(insn);
+   return 1;
+   }
+
+   return truly_illegal_insn(vcpu, run, insn);
+}
+
+static illegal_insn_func illegal_insn_table[32] = {
+   truly_illegal_insn, /* 0 */
+   truly_illegal_insn, /* 1 */
+   truly_illegal_insn, /* 2 */
+   truly_illegal_insn, /* 3 */
+   truly_illegal_insn, /* 4 */
+   truly_illegal_insn, /* 5 */
+   truly_illegal_insn, /* 6 */
+   truly_illegal_insn, /* 7 */
+   truly_illegal_insn, /* 8 */
+   truly_illegal_insn, /* 9 */
+   truly_illegal_insn, /* 10 */
+   truly_illegal_insn, /* 11 */
+   truly_illegal_insn, /* 12 */
+   truly_illegal_insn, /* 13 */
+   truly_illegal_insn, /* 14 */
+   truly_illegal_insn, /* 15 */
+   truly_illegal_insn, /* 16 */
+   truly_illegal_insn, /* 17 */
+   truly_illegal_insn, /* 18 */
+   truly_illegal_insn, /* 19 */
+   truly_illegal_insn, /* 20 */
+   truly_illegal_insn, /* 21 */
+   truly_illegal_insn, /* 22 */
+   truly_illegal_insn, /* 23 */
+   truly_illegal_insn, /* 24 */
+   truly_illegal_insn, /* 25 */
+   truly_illegal_insn, /* 26 */
+   truly_illegal_insn, /* 27 */
+   system_opcode_insn, /* 28 */
+   truly_illegal_insn, /* 29 */
+   truly_illegal_insn, /* 30 */
+   truly_illegal_insn  /* 31 */
+};
+
+static int illegal_inst_fault(struct kvm_vcpu *vcpu, struct kvm_run *run,
+ unsigned long stval)
+{
+   ulong insn = stval;
+
+   if (unlikely((insn & 3) != 3)) {
+   if (insn == 0)
+   insn = get_insn(vcpu);
+   if ((insn & 3) != 3)
+   return truly_illegal_insn(vcpu, run, insn);
+   }
+
+   return illegal_insn_table[(insn & 0x7c) >> 2](vcpu, run, insn);
+}
+
 static int emulate_load(struct kvm_vcpu *vcpu, struct kvm_run *run,
unsigned long fault_addr)
 {
@@ -439,6 +523,10 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct 
kvm_run *run,
ret = -EFAULT;
run->exit_reason = KVM_EXIT_UNKNOWN;
switch (scause) {
+   case EXC_INST_ILLEGAL:
+   if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV)
+   ret = illegal_inst_fault(vcpu, run, stval);
+   break;
case EXC_INST_PAGE_FAULT:
case EXC_LOAD_PAGE_FAULT:
case EXC_STORE_PAGE_FAULT:
-- 
2.17.1

Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C

[Bin Meng]

On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley  wrote:
>
>
> The baseline ISA support requirement for the RISC-V Linux kernel
> mandates compressed instructions, so it doesn't make sense for
> compressed instruction support to be configurable.
>
> Signed-off-by: Paul Walmsley 
> Cc: Atish Patra 
>
> ---
>  arch/riscv/Kconfig  | 10 --
>  arch/riscv/Makefile |  2 +-
>  2 files changed, 1 insertion(+), 11 deletions(-)
>

Reviewed-by: Bin Meng 

[PATCH v4 00/20] KVM RISC-V Support

[Anup Patel]

This series adds initial KVM RISC-V support. Currently, we are able to boot
RISC-V 64bit Linux Guests with multiple VCPUs.

Few key aspects of KVM RISC-V added by this series are:
1. Minimal possible KVM world-switch which touches only GPRs and few CSRs.
2. Full Guest/VM switch is done via vcpu_get/vcpu_put infrastructure.
3. KVM ONE_REG interface for VCPU register access from user-space.
4. PLIC emulation is done in user-space. In-kernel PLIC emulation, will
   be added in future.
5. Timer and IPI emuation is done in-kernel.
6. MMU notifiers supported.
7. FP lazy save/restore supported.
8. SBI v0.1 emulation for KVM Guest available.

Here's a brief TODO list which we will work upon after this series:
1. Handle trap from unpriv access in reading Guest instruction
2. Handle trap from unpriv access in SBI v0.1 emulation
3. Implement recursive stage2 page table programing
4. SBI v0.2 emulation in-kernel
5. SBI v0.2 hart hotplug emulation in-kernel
6. In-kernel PLIC emulation
7. . and more .

This series can be found in riscv_kvm_v4 branch at:
https//github.com/avpatel/linux.git

Our work-in-progress KVMTOOL RISC-V port can be found in riscv_v1 branch at:
https//github.com/avpatel/kvmtool.git

We need OpenSBI with RISC-V hypervisor extension support which can be
found in hyp_ext_changes_v1 branch at:
https://github.com/riscv/opensbi.git

The QEMU RISC-V hypervisor emulation is done by Alistair and is available
in riscv-hyp-work.next branch at:
https://github.com/alistair23/qemu.git

To play around with KVM RISC-V, here are few reference commands:
1) To cross-compile KVMTOOL:
   $ make lkvm-static
2) To launch RISC-V Host Linux:
   $ qemu-system-riscv64 -monitor null -cpu rv64,h=true -M virt \
   -m 512M -display none -serial mon:stdio \
   -kernel opensbi/build/platform/qemu/virt/firmware/fw_jump.elf \
   -device loader,file=build-riscv64/arch/riscv/boot/Image,addr=0x8020 \
   -initrd ./rootfs_kvm_riscv64.img \
   -append "root=/dev/ram rw console=ttyS0 earlycon=sbi"
3) To launch RISC-V Guest Linux with 9P rootfs:
   $ ./apps/lkvm-static run -m 128 -c2 --console serial \
   -p "console=ttyS0 earlycon=uart8250,mmio,0x3f8" -k ./apps/Image --debug
4) To launch RISC-V Guest Linux with initrd:
   $ ./apps/lkvm-static run -m 128 -c2 --console serial \
   -p "console=ttyS0 earlycon=uart8250,mmio,0x3f8" -k ./apps/Image \
   -i ./apps/rootfs.img --debug

Changes since v3:
- Moved patch for ISA bitmap from KVM prep series to this series
- Make vsip_shadow as run-time percpu variable instead of compile-time
- Flush Guest TLBs on all Host CPUs whenever we run-out of VMIDs

Changes since v2:
- Removed references of KVM_REQ_IRQ_PENDING from all patches
- Use kvm->srcu within in-kernel KVM run loop
- Added percpu vsip_shadow to track last value programmed in VSIP CSR
- Added comments about irqs_pending and irqs_pending_mask
- Used kvm_arch_vcpu_runnable() in-place-of kvm_riscv_vcpu_has_interrupt()
  in system_opcode_insn()
- Removed unwanted smp_wmb() in kvm_riscv_stage2_vmid_update()
- Use kvm_flush_remote_tlbs() in kvm_riscv_stage2_vmid_update()
- Use READ_ONCE() in kvm_riscv_stage2_update_hgatp() for vmid

Changes since v1:
- Fixed compile errors in building KVM RISC-V as module
- Removed unused kvm_riscv_halt_guest() and kvm_riscv_resume_guest()
- Set KVM_CAP_SYNC_MMU capability only after MMU notifiers are implemented
- Made vmid_version as unsigned long instead of atomic
- Renamed KVM_REQ_UPDATE_PGTBL to KVM_REQ_UPDATE_HGATP
- Renamed kvm_riscv_stage2_update_pgtbl() to kvm_riscv_stage2_update_hgatp()
- Configure HIDELEG and HEDELEG in kvm_arch_hardware_enable()
- Updated ONE_REG interface for CSR access to user-space
- Removed irqs_pending_lock and use atomic bitops instead
- Added separate patch for FP ONE_REG interface
- Added separate patch for updating MAINTAINERS file

Anup Patel (15):
  KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
  RISC-V: Add bitmap reprensenting ISA features common across CPUs
  RISC-V: Add hypervisor extension related CSR defines
  RISC-V: Add initial skeletal KVM support
  RISC-V: KVM: Implement VCPU create, init and destroy functions
  RISC-V: KVM: Implement VCPU interrupts and requests handling
  RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls
  RISC-V: KVM: Implement VCPU world-switch
  RISC-V: KVM: Handle MMIO exits for VCPU
  RISC-V: KVM: Handle WFI exits for VCPU
  RISC-V: KVM: Implement VMID allocator
  RISC-V: KVM: Implement stage2 page table programming
  RISC-V: KVM: Implement MMU notifiers
  RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig
  RISC-V: KVM: Add MAINTAINERS entry

Atish Patra (5):
  RISC-V: Export few kernel symbols
  RISC-V: KVM: Add timer functionality
  RISC-V: KVM: FP lazy save/restore
  RISC-V: KVM: Implement ONE REG interface for FP registers
  RISC-V: KVM: Add SBI v0.1 support

 MAINTAINERS |  10 +
 arch/riscv/Kconfig  |   2 +
 arch/riscv/Makefile |   

[PATCH v4 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls

[Anup Patel]

For KVM RISC-V, we use KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls to access
VCPU config and registers from user-space.

We have three types of VCPU registers:
1. CONFIG - these are VCPU config and capabilities
2. CORE   - these are VCPU general purpose registers
3. CSR- these are VCPU control and status registers

The CONFIG registers available to user-space are ISA and TIMEBASE. Out
of these, TIMEBASE is a read-only register which inform user-space about
VCPU timer base frequency. The ISA register is a read and write register
where user-space can only write the desired VCPU ISA capabilities before
running the VCPU.

The CORE registers available to user-space are PC, RA, SP, GP, TP, A0-A7,
T0-T6, S0-S11 and MODE. Most of these are RISC-V general registers except
PC and MODE. The PC register represents program counter whereas the MODE
register represent VCPU privilege mode (i.e. S/U-mode).

The CSRs available to user-space are SSTATUS, SIE, STVEC, SSCRATCH, SEPC,
SCAUSE, STVAL, SIP, and SATP. All of these are read/write registers.

In future, more VCPU register types will be added (such as FP) for the
KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/uapi/asm/kvm.h |  40 -
 arch/riscv/kvm/vcpu.c | 235 +-
 2 files changed, 272 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/uapi/asm/kvm.h 
b/arch/riscv/include/uapi/asm/kvm.h
index 6dbc056d58ba..024f220eb17e 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -23,8 +23,15 @@
 
 /* for KVM_GET_REGS and KVM_SET_REGS */
 struct kvm_regs {
+   /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
+   struct user_regs_struct regs;
+   unsigned long mode;
 };
 
+/* Possible privilege modes for kvm_regs */
+#define KVM_RISCV_MODE_S   1
+#define KVM_RISCV_MODE_U   0
+
 /* for KVM_GET_FPU and KVM_SET_FPU */
 struct kvm_fpu {
 };
@@ -41,10 +48,41 @@ struct kvm_guest_debug_arch {
 struct kvm_sync_regs {
 };
 
-/* dummy definition */
+/* for KVM_GET_SREGS and KVM_SET_SREGS */
 struct kvm_sregs {
+   unsigned long sstatus;
+   unsigned long sie;
+   unsigned long stvec;
+   unsigned long sscratch;
+   unsigned long sepc;
+   unsigned long scause;
+   unsigned long stval;
+   unsigned long sip;
+   unsigned long satp;
 };
 
+#define KVM_REG_SIZE(id)   \
+   (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
+
+/* If you need to interpret the index values, here is the key: */
+#define KVM_REG_RISCV_TYPE_MASK0xFF00
+#define KVM_REG_RISCV_TYPE_SHIFT   24
+
+/* Config registers are mapped as type 1 */
+#define KVM_REG_RISCV_CONFIG   (0x01 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_CONFIG_ISA   0x0
+#define KVM_REG_RISCV_CONFIG_TIMEBASE  0x1
+
+/* Core registers are mapped as type 2 */
+#define KVM_REG_RISCV_CORE (0x02 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_CORE_REG(name)   \
+   (offsetof(struct kvm_regs, name) / sizeof(unsigned long))
+
+/* Control and status registers are mapped as type 3 */
+#define KVM_REG_RISCV_CSR  (0x03 << KVM_REG_RISCV_TYPE_SHIFT)
+#define KVM_REG_RISCV_CSR_REG(name)\
+   (offsetof(struct kvm_sregs, name) / sizeof(unsigned long))
+
 #endif
 
 #endif /* __LINUX_KVM_RISCV_H */
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 7f59e85c6af8..9396a83c0611 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -164,6 +164,215 @@ vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, 
struct vm_fault *vmf)
return VM_FAULT_SIGBUS;
 }
 
+static int kvm_riscv_vcpu_get_reg_config(struct kvm_vcpu *vcpu,
+const struct kvm_one_reg *reg)
+{
+   unsigned long __user *uaddr =
+   (unsigned long __user *)(unsigned long)reg->addr;
+   unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
+   KVM_REG_SIZE_MASK |
+   KVM_REG_RISCV_CONFIG);
+   unsigned long reg_val;
+
+   if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
+   return -EINVAL;
+
+   switch (reg_num) {
+   case KVM_REG_RISCV_CONFIG_ISA:
+   reg_val = vcpu->arch.isa;
+   break;
+   case KVM_REG_RISCV_CONFIG_TIMEBASE:
+   reg_val = riscv_timebase;
+   break;
+   default:
+   return -EINVAL;
+   };
+
+   if (copy_to_user(uaddr, _val, KVM_REG_SIZE(reg->id)))
+   return -EFAULT;
+
+   return 0;
+}
+
+static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
+const struct kvm_one_reg *reg)
+{
+   unsigned long __user *uaddr =
+   (unsigned long __user *)(unsigned long)reg->addr;
+   unsigned long reg_num = reg->id & 

[PATCH v4 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs

[Anup Patel]

This patch adds riscv_isa bitmap which represents Host ISA features
common across all Host CPUs. The riscv_isa is not same as elf_hwcap
because elf_hwcap will only have ISA features relevant for user-space
apps whereas riscv_isa will have ISA features relevant to both kernel
and user-space apps.

One of the use-case for riscv_isa bitmap is in KVM hypervisor where
we will use it to do following operations:

1. Check whether hypervisor extension is available
2. Find ISA features that need to be virtualized (e.g. floating
   point support, vector extension, etc.)

Signed-off-by: Anup Patel 
Signed-off-by: Atish Patra 
---
 arch/riscv/include/asm/hwcap.h | 26 +++
 arch/riscv/kernel/cpufeature.c | 79 --
 2 files changed, 102 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 7ecb7c6a57b1..9b657375aa51 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -8,6 +8,7 @@
 #ifndef __ASM_HWCAP_H
 #define __ASM_HWCAP_H
 
+#include 
 #include 
 
 #ifndef __ASSEMBLY__
@@ -22,5 +23,30 @@ enum {
 };
 
 extern unsigned long elf_hwcap;
+
+#define RISCV_ISA_EXT_a('a' - 'a')
+#define RISCV_ISA_EXT_c('c' - 'a')
+#define RISCV_ISA_EXT_d('d' - 'a')
+#define RISCV_ISA_EXT_f('f' - 'a')
+#define RISCV_ISA_EXT_h('h' - 'a')
+#define RISCV_ISA_EXT_i('i' - 'a')
+#define RISCV_ISA_EXT_m('m' - 'a')
+#define RISCV_ISA_EXT_s('s' - 'a')
+#define RISCV_ISA_EXT_u('u' - 'a')
+#define RISCV_ISA_EXT_zicsr(('z' - 'a') + 1)
+#define RISCV_ISA_EXT_zifencei (('z' - 'a') + 2)
+#define RISCV_ISA_EXT_zam  (('z' - 'a') + 3)
+#define RISCV_ISA_EXT_ztso (('z' - 'a') + 4)
+
+#define RISCV_ISA_EXT_MAX  256
+
+unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
+
+#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
+
+bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
+#define riscv_isa_extension_available(isa_bitmap, ext) \
+   __riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
+
 #endif
 #endif
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index b1ade9a49347..4ce71ce5e290 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -6,21 +6,64 @@
  * Copyright (C) 2017 SiFive
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 
 unsigned long elf_hwcap __read_mostly;
+
+/* Host ISA bitmap */
+static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly;
+
 #ifdef CONFIG_FPU
 bool has_fpu __read_mostly;
 #endif
 
+/**
+ * riscv_isa_extension_base - Get base extension word
+ *
+ * @isa_bitmap ISA bitmap to use
+ * @returns base extension word as unsigned long value
+ *
+ * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
+ */
+unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap)
+{
+   if (!isa_bitmap)
+   return riscv_isa[0];
+   return isa_bitmap[0];
+}
+EXPORT_SYMBOL_GPL(riscv_isa_extension_base);
+
+/**
+ * __riscv_isa_extension_available - Check whether given extension
+ * is available or not
+ *
+ * @isa_bitmap ISA bitmap to use
+ * @bit bit position of the desired extension
+ * @returns true or false
+ *
+ * NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
+ */
+bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit)
+{
+   const unsigned long *bmap = (isa_bitmap) ? isa_bitmap : riscv_isa;
+
+   if (bit >= RISCV_ISA_EXT_MAX)
+   return false;
+
+   return test_bit(bit, bmap) ? true : false;
+}
+EXPORT_SYMBOL_GPL(__riscv_isa_extension_available);
+
 void riscv_fill_hwcap(void)
 {
struct device_node *node;
const char *isa;
-   size_t i;
+   char print_str[BITS_PER_LONG+1];
+   size_t i, j, isa_len;
static unsigned long isa2hwcap[256] = {0};
 
isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
@@ -32,8 +75,11 @@ void riscv_fill_hwcap(void)
 
elf_hwcap = 0;
 
+   bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX);
+
for_each_of_cpu_node(node) {
unsigned long this_hwcap = 0;
+   unsigned long this_isa = 0;
 
if (riscv_of_processor_hartid(node) < 0)
continue;
@@ -43,8 +89,20 @@ void riscv_fill_hwcap(void)
continue;
}
 
-   for (i = 0; i < strlen(isa); ++i)
+   i = 0;
+   isa_len = strlen(isa);
+#if defined(CONFIG_32BIT)
+   if (!strncmp(isa, "rv32", 4))
+   i += 4;
+#elif defined(CONFIG_64BIT)
+   if (!strncmp(isa, "rv64", 4))
+   i += 4;
+#endif
+   for (; i < isa_len; ++i) {
this_hwcap |= isa2hwcap[(unsigned 

[PATCH v4 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions

[Anup Patel]

This patch implements VCPU create, init and destroy functions
required by generic KVM module. We don't have much dynamic
resources in struct kvm_vcpu_arch so thest functions are quite
simple for KVM RISC-V.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h | 68 +++
 arch/riscv/kvm/vcpu.c | 68 +--
 2 files changed, 132 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index 9459709656be..dab32c9c3470 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -53,7 +53,75 @@ struct kvm_arch {
phys_addr_t pgd_phys;
 };
 
+struct kvm_cpu_context {
+   unsigned long zero;
+   unsigned long ra;
+   unsigned long sp;
+   unsigned long gp;
+   unsigned long tp;
+   unsigned long t0;
+   unsigned long t1;
+   unsigned long t2;
+   unsigned long s0;
+   unsigned long s1;
+   unsigned long a0;
+   unsigned long a1;
+   unsigned long a2;
+   unsigned long a3;
+   unsigned long a4;
+   unsigned long a5;
+   unsigned long a6;
+   unsigned long a7;
+   unsigned long s2;
+   unsigned long s3;
+   unsigned long s4;
+   unsigned long s5;
+   unsigned long s6;
+   unsigned long s7;
+   unsigned long s8;
+   unsigned long s9;
+   unsigned long s10;
+   unsigned long s11;
+   unsigned long t3;
+   unsigned long t4;
+   unsigned long t5;
+   unsigned long t6;
+   unsigned long sepc;
+   unsigned long sstatus;
+   unsigned long hstatus;
+};
+
+struct kvm_vcpu_csr {
+   unsigned long vsstatus;
+   unsigned long vsie;
+   unsigned long vstvec;
+   unsigned long vsscratch;
+   unsigned long vsepc;
+   unsigned long vscause;
+   unsigned long vstval;
+   unsigned long vsip;
+   unsigned long vsatp;
+};
+
 struct kvm_vcpu_arch {
+   /* VCPU ran atleast once */
+   bool ran_atleast_once;
+
+   /* ISA feature bits (similar to MISA) */
+   unsigned long isa;
+
+   /* CPU context of Guest VCPU */
+   struct kvm_cpu_context guest_context;
+
+   /* CPU CSR context of Guest VCPU */
+   struct kvm_vcpu_csr guest_csr;
+
+   /* CPU context upon Guest VCPU reset */
+   struct kvm_cpu_context guest_reset_context;
+
+   /* CPU CSR context upon Guest VCPU reset */
+   struct kvm_vcpu_csr guest_reset_csr;
+
/* Don't run the VCPU (blocked) */
bool pause;
 
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 48536cb0c8e7..8272b05d6ce4 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -31,10 +31,48 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
{ NULL }
 };
 
+#define KVM_RISCV_ISA_ALLOWED  (riscv_isa_extension_mask(a) | \
+riscv_isa_extension_mask(c) | \
+riscv_isa_extension_mask(d) | \
+riscv_isa_extension_mask(f) | \
+riscv_isa_extension_mask(i) | \
+riscv_isa_extension_mask(m) | \
+riscv_isa_extension_mask(s) | \
+riscv_isa_extension_mask(u))
+
+static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
+{
+   struct kvm_vcpu_csr *csr = >arch.guest_csr;
+   struct kvm_vcpu_csr *reset_csr = >arch.guest_reset_csr;
+   struct kvm_cpu_context *cntx = >arch.guest_context;
+   struct kvm_cpu_context *reset_cntx = >arch.guest_reset_context;
+
+   memcpy(csr, reset_csr, sizeof(*csr));
+
+   memcpy(cntx, reset_cntx, sizeof(*cntx));
+}
+
 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
 {
-   /* TODO: */
-   return NULL;
+   int err;
+   struct kvm_vcpu *vcpu;
+
+   vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
+   if (!vcpu) {
+   err = -ENOMEM;
+   goto out;
+   }
+
+   err = kvm_vcpu_init(vcpu, kvm, id);
+   if (err)
+   goto free_vcpu;
+
+   return vcpu;
+
+free_vcpu:
+   kmem_cache_free(kvm_vcpu_cache, vcpu);
+out:
+   return ERR_PTR(err);
 }
 
 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
@@ -48,13 +86,32 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
 
 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 {
-   /* TODO: */
+   struct kvm_cpu_context *cntx;
+
+   /* Mark this VCPU never ran */
+   vcpu->arch.ran_atleast_once = false;
+
+   /* Setup ISA features available to VCPU */
+   vcpu->arch.isa = riscv_isa_extension_base(NULL) & KVM_RISCV_ISA_ALLOWED;
+
+   /* Setup reset state of shadow SSTATUS and HSTATUS CSRs */
+   cntx = >arch.guest_reset_context;
+   cntx->sstatus = SR_SPP | SR_SPIE;
+   cntx->hstatus = 0;
+   cntx->hstatus |= HSTATUS_SP2V;
+   cntx->hstatus |= 

[PATCH v4 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling

[Anup Patel]

This patch implements VCPU interrupts and requests which are both
asynchronous events.

The VCPU interrupts can be set/unset using KVM_INTERRUPT ioctl from
user-space. In future, the in-kernel IRQCHIP emulation will use
kvm_riscv_vcpu_set_interrupt() and kvm_riscv_vcpu_unset_interrupt()
functions to set/unset VCPU interrupts.

Important VCPU requests implemented by this patch are:
KVM_REQ_SLEEP   - set whenever VCPU itself goes to sleep state
KVM_REQ_VCPU_RESET  - set whenever VCPU reset is requested

The WFI trap-n-emulate (added later) will use KVM_REQ_SLEEP request
and kvm_riscv_vcpu_has_interrupt() function.

The KVM_REQ_VCPU_RESET request will be used by SBI emulation (added
later) to power-up a VCPU in power-off state. The user-space can use
the GET_MPSTATE/SET_MPSTATE ioctls to get/set power state of a VCPU.

Signed-off-by: Anup Patel 
---
 arch/riscv/include/asm/kvm_host.h |  26 +
 arch/riscv/include/uapi/asm/kvm.h |   3 +
 arch/riscv/kvm/main.c |   8 ++
 arch/riscv/kvm/vcpu.c | 184 +++---
 4 files changed, 208 insertions(+), 13 deletions(-)

diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
index dab32c9c3470..d801216da6d0 100644
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -122,6 +122,21 @@ struct kvm_vcpu_arch {
/* CPU CSR context upon Guest VCPU reset */
struct kvm_vcpu_csr guest_reset_csr;
 
+   /*
+* VCPU interrupts
+*
+* We have a lockless approach for tracking pending VCPU interrupts
+* implemented using atomic bitops. The irqs_pending bitmap represent
+* pending interrupts whereas irqs_pending_mask represent bits changed
+* in irqs_pending. Our approach is modeled around multiple producer
+* and single consumer problem where the consumer is the VCPU itself.
+*/
+   unsigned long irqs_pending;
+   unsigned long irqs_pending_mask;
+
+   /* VCPU power-off state */
+   bool power_off;
+
/* Don't run the VCPU (blocked) */
bool pause;
 
@@ -135,6 +150,9 @@ static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu 
*vcpu) {}
 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
 
+int kvm_riscv_setup_vsip(void);
+void kvm_riscv_cleanup_vsip(void);
+
 void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu);
 int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm);
 void kvm_riscv_stage2_free_pgd(struct kvm *kvm);
@@ -146,4 +164,12 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct 
kvm_run *run,
 
 static inline void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch) {}
 
+int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
+int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
+void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu);
+void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu);
+bool kvm_riscv_vcpu_has_interrupt(struct kvm_vcpu *vcpu);
+void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
+void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
+
 #endif /* __RISCV_KVM_HOST_H__ */
diff --git a/arch/riscv/include/uapi/asm/kvm.h 
b/arch/riscv/include/uapi/asm/kvm.h
index d15875818b6e..6dbc056d58ba 100644
--- a/arch/riscv/include/uapi/asm/kvm.h
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -18,6 +18,9 @@
 
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
 
+#define KVM_INTERRUPT_SET  -1U
+#define KVM_INTERRUPT_UNSET-2U
+
 /* for KVM_GET_REGS and KVM_SET_REGS */
 struct kvm_regs {
 };
diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c
index e1ffe6d42f39..d088247843c5 100644
--- a/arch/riscv/kvm/main.c
+++ b/arch/riscv/kvm/main.c
@@ -48,6 +48,8 @@ int kvm_arch_hardware_enable(void)
hideleg |= SIE_SEIE;
csr_write(CSR_HIDELEG, hideleg);
 
+   csr_write(CSR_VSIP, 0);
+
return 0;
 }
 
@@ -59,11 +61,17 @@ void kvm_arch_hardware_disable(void)
 
 int kvm_arch_init(void *opaque)
 {
+   int ret;
+
if (!riscv_isa_extension_available(NULL, h)) {
kvm_info("hypervisor extension not available\n");
return -ENODEV;
}
 
+   ret = kvm_riscv_setup_vsip();
+   if (ret)
+   return ret;
+
kvm_info("hypervisor extension available\n");
 
return 0;
diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 8272b05d6ce4..7f59e85c6af8 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -40,6 +41,8 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
 riscv_isa_extension_mask(s) | \
 riscv_isa_extension_mask(u))
 
+static unsigned long __percpu *vsip_shadow;
+
 static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 {
struct 

[PATCH v4 05/20] RISC-V: Add initial skeletal KVM support

[Anup Patel]

This patch adds initial skeletal KVM RISC-V support which has:
1. A simple implementation of arch specific VM functions
   except kvm_vm_ioctl_get_dirty_log() which will implemeted
   in-future as part of stage2 page loging.
2. Stubs of required arch specific VCPU functions except
   kvm_arch_vcpu_ioctl_run() which is semi-complete and
   extended by subsequent patches.
3. Stubs for required arch specific stage2 MMU functions.

Signed-off-by: Anup Patel 
---
 arch/riscv/Kconfig|   2 +
 arch/riscv/Makefile   |   2 +
 arch/riscv/include/asm/kvm_host.h |  81 
 arch/riscv/include/uapi/asm/kvm.h |  47 +
 arch/riscv/kvm/Kconfig|  33 
 arch/riscv/kvm/Makefile   |  13 ++
 arch/riscv/kvm/main.c |  80 
 arch/riscv/kvm/mmu.c  |  83 
 arch/riscv/kvm/vcpu.c | 312 ++
 arch/riscv/kvm/vcpu_exit.c|  35 
 arch/riscv/kvm/vm.c   |  79 
 11 files changed, 767 insertions(+)
 create mode 100644 arch/riscv/include/asm/kvm_host.h
 create mode 100644 arch/riscv/include/uapi/asm/kvm.h
 create mode 100644 arch/riscv/kvm/Kconfig
 create mode 100644 arch/riscv/kvm/Makefile
 create mode 100644 arch/riscv/kvm/main.c
 create mode 100644 arch/riscv/kvm/mmu.c
 create mode 100644 arch/riscv/kvm/vcpu.c
 create mode 100644 arch/riscv/kvm/vcpu_exit.c
 create mode 100644 arch/riscv/kvm/vm.c

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 59a4727ecd6c..906104b8dc74 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -289,3 +289,5 @@ menu "Power management options"
 source "kernel/power/Kconfig"
 
 endmenu
+
+source "arch/riscv/kvm/Kconfig"
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index 7a117be8297c..9f4f418978b1 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -74,6 +74,8 @@ head-y := arch/riscv/kernel/head.o
 
 core-y += arch/riscv/kernel/ arch/riscv/mm/ arch/riscv/net/
 
+core-$(CONFIG_KVM) += arch/riscv/kvm/
+
 libs-y += arch/riscv/lib/
 
 PHONY += vdso_install
diff --git a/arch/riscv/include/asm/kvm_host.h 
b/arch/riscv/include/asm/kvm_host.h
new file mode 100644
index ..9459709656be
--- /dev/null
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel 
+ */
+
+#ifndef __RISCV_KVM_HOST_H__
+#define __RISCV_KVM_HOST_H__
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_64BIT
+#define KVM_MAX_VCPUS  (1U << 16)
+#else
+#define KVM_MAX_VCPUS  (1U << 9)
+#endif
+
+#define KVM_USER_MEM_SLOTS 512
+#define KVM_HALT_POLL_NS_DEFAULT   50
+
+#define KVM_VCPU_MAX_FEATURES  0
+
+#define KVM_REQ_SLEEP \
+   KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
+#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1)
+
+struct kvm_vm_stat {
+   ulong remote_tlb_flush;
+};
+
+struct kvm_vcpu_stat {
+   u64 halt_successful_poll;
+   u64 halt_attempted_poll;
+   u64 halt_poll_invalid;
+   u64 halt_wakeup;
+   u64 ecall_exit_stat;
+   u64 wfi_exit_stat;
+   u64 mmio_exit_user;
+   u64 mmio_exit_kernel;
+   u64 exits;
+};
+
+struct kvm_arch_memory_slot {
+};
+
+struct kvm_arch {
+   /* stage2 page table */
+   pgd_t *pgd;
+   phys_addr_t pgd_phys;
+};
+
+struct kvm_vcpu_arch {
+   /* Don't run the VCPU (blocked) */
+   bool pause;
+
+   /* SRCU lock index for in-kernel run loop */
+   int srcu_idx;
+};
+
+static inline void kvm_arch_hardware_unsetup(void) {}
+static inline void kvm_arch_sync_events(struct kvm *kvm) {}
+static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
+static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
+static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
+
+void kvm_riscv_stage2_flush_cache(struct kvm_vcpu *vcpu);
+int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm);
+void kvm_riscv_stage2_free_pgd(struct kvm *kvm);
+void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu);
+
+int kvm_riscv_vcpu_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run);
+int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
+   unsigned long scause, unsigned long stval);
+
+static inline void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch) {}
+
+#endif /* __RISCV_KVM_HOST_H__ */
diff --git a/arch/riscv/include/uapi/asm/kvm.h 
b/arch/riscv/include/uapi/asm/kvm.h
new file mode 100644
index ..d15875818b6e
--- /dev/null
+++ b/arch/riscv/include/uapi/asm/kvm.h
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel 
+ */
+
+#ifndef __LINUX_KVM_RISCV_H
+#define __LINUX_KVM_RISCV_H
+
+#ifndef __ASSEMBLY__
+
+#include 
+#include 
+