[PATCH 4/5] arm64: dts : ls1088a-qds: remove useless property of rtc

[Biwen Li]

From: Biwen Li 

Remove useless property interrupts of rtc

Signed-off-by: Biwen Li 
---
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
index 5b2699fe4e5d..329a9428ae8b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
@@ -90,8 +90,6 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
-   /* IRQ10_B */
-   interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
};
 
eeprom@56 {
-- 
2.17.1

[PATCH 5/5] arm64: dts: ls1046a-qds: remove useless property of rtc

[Biwen Li]

From: Biwen Li 

Remove useless property interrupts of rtc

Signed-off-by: Biwen Li 
---
 arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
index 35fa10a5d594..f13a45bdf4e9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
@@ -122,8 +122,6 @@
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
-   /* IRQ10_B */
-   interrupts = <0 150 0x4>;
};
 
eeprom@56 {
-- 
2.17.1

[RESEND v2] arm64: dts: lx2160a-rdb: fix shunt-resistor value

[Biwen Li]

From: Biwen Li 

Fix value of shunt-resistor property.
The LX2160A-RDB has 500 uOhm shunt for
the INA220, not 1000 uOhm. Unless
it will get wrong power consumption(1/2)

Signed-off-by: Biwen Li 
---
 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 22d0308..54fe8cd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -121,7 +121,7 @@
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
-   shunt-resistor = <1000>;
+   shunt-resistor = <500>;
};
};
 
-- 
2.7.4

[v2 PATCH] dts: arm64: lx2160a-rdb: fix shunt-resistor value

[Biwen Li]

From: Biwen Li 

Fix value of shunt-resistor property.
The LX2160A-RDB has 500 uOhm shunt for
the INA220, not 1000 uOhm. Unless
it will get wrong power consumption(1/2)

Signed-off-by: Biwen Li 
---
v2:
- update description

 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 22d0308..54fe8cd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -121,7 +121,7 @@
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
-   shunt-resistor = <1000>;
+   shunt-resistor = <500>;
};
};
 
-- 
2.7.4

RE: [PATCH] dts: arm64: lx2160a-rdb: fix shunt-resistor

[Biwen Li (OSS)]

> On Fri, Jun 19, 2020 at 04:46:07PM +0800, Biwen Li wrote:
> > From: Biwen Li 
> >
> > Fix value of shunt-resistor property
> >
> > Signed-off-by: Biwen Li 
> 
> 'arm64: dts: ...' as subject prefix please.
> 
> Also can you improve commit log to better describe the problem the patch is
> fixing?
Sure, will update in v2.
> 
> Shawn
> 
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > index e266d8a170ea..dce79018d397 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > @@ -141,7 +141,7 @@
> > power-monitor@40 {
> > compatible = "ti,ina220";
> > reg = <0x40>;
> > -   shunt-resistor = <1000>;
> > +   shunt-resistor = <500>;
> > };
> > };
> >
> > --
> > 2.17.1
> >

[v3 4/4] arm: dts: ls1021a: add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch add ftm_alarm0 DT node
- add rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li 
---
Change in v3:
- sort alphabetically

Change in v2:
- use generic name

 arch/arm/boot/dts/ls1021a.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c..f7b19c4 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -59,6 +59,7 @@
ethernet0 = 
ethernet1 = 
ethernet2 = 
+   rtc1 = _alarm0;
serial0 = 
serial1 = 
serial2 = 
@@ -1002,5 +1003,19 @@
big-endian;
};
 
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+   };
+
+   ftm_alarm0: timer0@29d {
+   compatible = "fsl,ls1021a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   reg-names = "ftm";
+   fsl,rcpm-wakeup = < 0x2 0x0>;
+   interrupts = ;
+   big-endian;
+   };
};
 };
-- 
2.7.4

[v3 2/4] arm64: dts: ls1028a: Add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node for LS1028ARDB board
FlexTimer1 module is used to wakeup the system

Signed-off-by: Biwen Li 
---
Change in v3:
- none

Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 055f114..7bcb225 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -17,6 +17,10 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   aliases {
+   rtc1 = _alarm0;
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -983,6 +987,19 @@
};
};
};
+
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x1c>;
+   #fsl,rcpm-wakeup-cells = <7>;
+   };
+
+   ftm_alarm0: timer@280 {
+   compatible = "fsl,ls1028a-ftm-alarm";
+   reg = <0x0 0x280 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x0 0x0 0x0 0x0 0x4000 0x0 
0x0>;
+   interrupts = ;
+   };
};
 
malidp0: display@f08 {
-- 
2.7.4

[v3 3/4] arm64: dts: ls1012a/ls1043a/ls1046a/ls1088a/ls208xa: add ftm_alarm0 node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node
- add new rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li 
---
Change in v3:
- sort alphabetically

Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++
 5 files changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 006e544..ff19ec4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -17,6 +17,7 @@
 
aliases {
crypto = 
+   rtc1 = _alarm0;
rtic-a = _a;
rtic-b = _b;
rtic-c = _c;
@@ -512,6 +513,20 @@
< 0 0 4  0 113 
IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1012a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3b641bd..55ceae7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -27,6 +27,7 @@
ethernet4 = 
ethernet5 = 
ethernet6 = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -829,6 +830,19 @@
big-endian;
};
 
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1043a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index d4c1da3..3c92c21 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -28,6 +28,7 @@
ethernet5 = 
ethernet6 = 
ethernet7 = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -765,6 +766,20 @@
queue-sizes = <64 64>;
big-endian;
};
+
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1046a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
reserved-memory {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 36a7995..169f474 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -18,6 +18,7 @@
 
aliases {
crypto = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -781,6 +782,19 @@
};
};
};
+
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x18>;
+  

[v3 1/4] arm64: dts: lx2160a: add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node for Soc LX2160A
FlexTimer1 module is used to wakeup the system in deep sleep

Signed-off-by: Biwen Li 
---
Change in v3:
- none

Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index abaeb58..d571b7d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -16,6 +16,10 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   aliases {
+   rtc1 = _alarm0;
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -888,6 +892,20 @@
timeout-sec = <30>;
};
 
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,lx2160a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x1c>;
+   #fsl,rcpm-wakeup-cells = <7>;
+   little-endian;
+   };
+
+   ftm_alarm0: timer@280 {
+   compatible = "fsl,lx2160a-ftm-alarm";
+   reg = <0x0 0x280 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x0 0x0 0x0 0x0 0x4000 0x0 
0x0>;
+   interrupts = ;
+   };
+
usb0: usb@310 {
compatible = "snps,dwc3";
reg = <0x0 0x310 0x0 0x1>;
-- 
2.7.4

RE: [v2 3/4] arm64: dts: ls1012a/ls1043a/ls1046a/ls1088a/ls208xa: add ftm_alarm0 node

[Biwen Li (OSS)]

> > Signed-off-by: Biwen Li 
> > ---
> > Change in v2:
> > - use generic name
> > - use definition
> >
> >  arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++
> > arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++
> > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++
> > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++
> > arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++
> >  5 files changed, 72 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > index 006e544..4742efe 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> > @@ -22,6 +22,7 @@
> > rtic-c = _c;
> > rtic-d = _d;
> > sec-mon = _mon;
> > +   rtc1 = _alarm0;
> 
> Sorry. I did not catch it during v1 review.  But we want to keep them sort
> alphabetically.
Okay, got it, i will sort them in v3.

[PATCH] dts: arm64: lx2160a-rdb: fix shunt-resistor

[Biwen Li]

From: Biwen Li 

Fix value of shunt-resistor property

Signed-off-by: Biwen Li 
---
 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index e266d8a170ea..dce79018d397 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -141,7 +141,7 @@
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
-   shunt-resistor = <1000>;
+   shunt-resistor = <500>;
};
};
 
-- 
2.17.1

[v2 4/4] arm: dts: ls1021a: add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch add ftm_alarm0 DT node
- add rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li 
---
Change in v2:
- use generic name

 arch/arm/boot/dts/ls1021a.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c..5af45ef 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -66,6 +66,7 @@
serial4 = 
serial5 = 
sysclk = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -1002,5 +1003,19 @@
big-endian;
};
 
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+   };
+
+   ftm_alarm0: timer0@29d {
+   compatible = "fsl,ls1021a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   reg-names = "ftm";
+   fsl,rcpm-wakeup = < 0x2 0x0>;
+   interrupts = ;
+   big-endian;
+   };
};
 };
-- 
2.7.4

[v2 1/4] arm64: dts: lx2160a: add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node for Soc LX2160A
FlexTimer1 module is used to wakeup the system in deep sleep

Signed-off-by: Biwen Li 
---
Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index abaeb58..d571b7d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -16,6 +16,10 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   aliases {
+   rtc1 = _alarm0;
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -888,6 +892,20 @@
timeout-sec = <30>;
};
 
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,lx2160a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x1c>;
+   #fsl,rcpm-wakeup-cells = <7>;
+   little-endian;
+   };
+
+   ftm_alarm0: timer@280 {
+   compatible = "fsl,lx2160a-ftm-alarm";
+   reg = <0x0 0x280 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x0 0x0 0x0 0x0 0x4000 0x0 
0x0>;
+   interrupts = ;
+   };
+
usb0: usb@310 {
compatible = "snps,dwc3";
reg = <0x0 0x310 0x0 0x1>;
-- 
2.7.4

[v2 3/4] arm64: dts: ls1012a/ls1043a/ls1046a/ls1088a/ls208xa: add ftm_alarm0 node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node
- add new rcpm node
- add ftm_alarm0 node
- aliases ftm_alarm0 as rtc1

Signed-off-by: Biwen Li 
---
Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 15 +++
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 14 ++
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 15 +++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 14 ++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 14 ++
 5 files changed, 72 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 006e544..4742efe 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -22,6 +22,7 @@
rtic-c = _c;
rtic-d = _d;
sec-mon = _mon;
+   rtc1 = _alarm0;
};
 
cpus {
@@ -512,6 +513,20 @@
< 0 0 4  0 113 
IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
+
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1012a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index 3b641bd..55ceae7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -27,6 +27,7 @@
ethernet4 = 
ethernet5 = 
ethernet6 = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -829,6 +830,19 @@
big-endian;
};
 
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1043a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
firmware {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index d4c1da3..3c92c21 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -28,6 +28,7 @@
ethernet5 = 
ethernet6 = 
ethernet7 = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -765,6 +766,20 @@
queue-sizes = <64 64>;
big-endian;
};
+
+   rcpm: power-controller@1ee2140 {
+   compatible = "fsl,ls1046a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x4>;
+   #fsl,rcpm-wakeup-cells = <1>;
+   };
+
+   ftm_alarm0: timer@29d {
+   compatible = "fsl,ls1046a-ftm-alarm";
+   reg = <0x0 0x29d 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x2>;
+   interrupts = ;
+   big-endian;
+   };
};
 
reserved-memory {
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 36a7995..169f474 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -18,6 +18,7 @@
 
aliases {
crypto = 
+   rtc1 = _alarm0;
};
 
cpus {
@@ -781,6 +782,19 @@
};
};
};
+
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x18>;
+   #fsl,rcpm-wakeup-cells = <6>;
+   };
+

[v2 2/4] arm64: dts: ls1028a: Add ftm_alarm0 DT node

[Biwen Li]

From: Biwen Li 

The patch adds ftm_alarm0 DT node for LS1028ARDB board
FlexTimer1 module is used to wakeup the system

Signed-off-by: Biwen Li 
---
Change in v2:
- use generic name
- use definition

 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 055f114..7bcb225 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -17,6 +17,10 @@
#address-cells = <2>;
#size-cells = <2>;
 
+   aliases {
+   rtc1 = _alarm0;
+   };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -983,6 +987,19 @@
};
};
};
+
+   rcpm: power-controller@1e34040 {
+   compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1e34040 0x0 0x1c>;
+   #fsl,rcpm-wakeup-cells = <7>;
+   };
+
+   ftm_alarm0: timer@280 {
+   compatible = "fsl,ls1028a-ftm-alarm";
+   reg = <0x0 0x280 0x0 0x1>;
+   fsl,rcpm-wakeup = < 0x0 0x0 0x0 0x0 0x4000 0x0 
0x0>;
+   interrupts = ;
+   };
};
 
malidp0: display@f08 {
-- 
2.7.4

[v3 2/2] dts: ppc: t1024rdb: remove interrupts property

[Biwen Li]

From: Biwen Li 

Since the interrupt pin for RTC DS1339 is not connected
to the CPU on T1024RDB, remove the interrupt property
from the device tree.

This also fix the following warning for hwclock.util-linux:
$ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t1024rdb.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts 
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..605ceec66af3 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,6 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
};
};
 
-- 
2.17.1

[v3 1/2] dts: ppc: t4240rdb: remove interrupts property

[Biwen Li]

From: Biwen Li 

Since the interrupt pin for RTC DS1374 is not connected
to the CPU on T4240RDB, remove the interrupt property
from the device tree.

This also fix the following warning for hwclock.util-linux:
$ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t4240rdb.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts 
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..145896f2eef6 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,6 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
};
};
 
-- 
2.17.1

[v2 1/2] dts: ppc: t4240rdb: remove interrupts property

[Biwen Li]

From: Biwen Li 

This removes interrupts property to drop warning as follows:
- $ hwclock.util-linux
  hwclock.util-linux: select() to /dev/rtc0
  to wait for clock tick timed out

My case:
- RTC ds1374's INT pin is connected to VCC on T4240RDB,
  then the RTC cannot inform cpu about the alarm interrupt

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t4240rdb.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts 
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..145896f2eef6 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,6 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
};
};
 
-- 
2.17.1

[v2 2/2] dts: ppc: t1024rdb: remove interrupts property

[Biwen Li]

From: Biwen Li 

This removes interrupts property to drop warning as follows:
- $ hwclock.util-linux
  hwclock.util-linux: select() to /dev/rtc0
  to wait for clock tick timed out

My case:
- RTC ds1339s INT pin isn't connected to cpus INT pin on T1024RDB,
  then the RTC cannot inform cpu about alarm interrupt

How to fix it?
- remove IRQ line

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t1024rdb.dts | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts 
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..605ceec66af3 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,6 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
};
};
 
-- 
2.17.1

RE: [RESEND 1/4] arm64: dts: lx2160a: add ftm_alarm0 DT node

[Biwen Li (OSS)]

> > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > index e5ee5591e52b..e0d8d68ce070 100644
> > > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > > @@ -16,6 +16,10 @@
> > > > #address-cells = <2>;
> > > > #size-cells = <2>;
> > > >
> > > > +   aliases {
> > > > +   rtc1 = _alarm0;
> > > > +   };
> > > > +
> > > > cpus {
> > > > #address-cells = <1>;
> > > > #size-cells = <0>;
> > > > @@ -768,6 +772,20 @@
> > > > timeout-sec = <30>;
> > > > };
> > > >
> > > > +   rcpm: rcpm@1e34040 {
> > >
> > > Keep the node sort in unit-address.  Also, try to use a generic node name.
> > Hi Shawn,
> > Sorry for late reply.
> > The node sort will be updated in v2.
> > rcpm is called as Run Control and Power Management. Don't Have a
> > generic node name, any suggestions?
> 
> It sounds like some sort of power controller, so maybe 'power-controller'?
Okay, How about replace it with "rcpm: power-controller@1e34040 {"?
> 
> Shawn

RE: [PATCH 2/3] dts: ppc: t4240rdb: add uie_unsupported property to drop warning

[Biwen Li (OSS)]

> 
> On 08/05/2020 13:49:24+0800, Biwen Li wrote:
> > From: Biwen Li 
> >
> > This adds uie_unsupported property to drop warning as follows:
> > - $ hwclock.util-linux
> >   hwclock.util-linux: select() to /dev/rtc0
> >   to wait for clock tick timed out
> >
> > My case:
> > - RTC ds1374's INT pin is connected to VCC on T4240RDB,
> >   then the RTC cannot inform cpu about the alarm interrupt
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  arch/powerpc/boot/dts/fsl/t4240rdb.dts | 6 +-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > index a56a705d41f7..ccdd10202e56 100644
> > --- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > +++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > @@ -144,7 +144,11 @@
> > rtc@68 {
> > compatible = "dallas,ds1374";
> > reg = <0x68>;
> > -   interrupts = <0x1 0x1 0 0>;
> 
> removing the interrupt should be enough to solve your issue
Okay, got it. Thanks.
> 
> > +   // The ds1374's INT pin isn't
> > +   // connected to cpu's INT pin,
> > +   // so the rtc cannot synchronize
> > +   // clock tick per second.
> > +   uie_unsupported;
> > };
> > };
> >
> > --
> > 2.17.1
> >
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

RE: [PATCH 1/3] rtc: ds1374: add uie_unsupported property to drop warning

[Biwen Li (OSS)]

> 
> Hi,
> 
> On 08/05/2020 13:49:23+0800, Biwen Li wrote:
> > From: Biwen Li 
> >
> > Add uie_unsupported property to drop warning as follows:
> > - $ hwclock.util-linux
> >   hwclock.util-liux: select() /dev/rtc0
> >   to wait for clock tick timed out
> >
> > My case:
> > - RTC ds1374's INT pin is connected to VCC on T4240RDB,
> >   then the RTC cannot inform cpu about the alarm
> >   interrupt
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  drivers/rtc/rtc-ds1374.c | 4 
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index
> > 9c51a12cf70f..e530e887a17e 100644
> > --- a/drivers/rtc/rtc-ds1374.c
> > +++ b/drivers/rtc/rtc-ds1374.c
> > @@ -651,6 +651,10 @@ static int ds1374_probe(struct i2c_client *client,
> > if (ret)
> > return ret;
> >
> > +   if (of_property_read_bool(client->dev.of_node,
> > +"uie_unsupported"))
> > +   ds1374->rtc->uie_unsupported = true;
> > +
> 
> This is not how this is supposed to work, either the RTC support uie or 
> don't, it is
> not board dependent and certainly doesn't require an
> (undocumented) DT property.
Okay, got it. Thanks.
> 
> >  #ifdef CONFIG_RTC_DRV_DS1374_WDT
> > save_client = client;
> > ret = misc_register(_miscdev);
> > --
> > 2.17.1
> >
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

RE: [RESEND 1/4] arm64: dts: lx2160a: add ftm_alarm0 DT node

[Biwen Li (OSS)]

> 
> On Tue, Apr 07, 2020 at 02:42:48PM +0800, Biwen Li wrote:
> > From: Biwen Li 
> >
> > The patch adds ftm_alarm0 DT node for Soc LX2160A
> > FlexTimer1 module is used to wakeup the system in deep sleep
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 18
> > ++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > index e5ee5591e52b..e0d8d68ce070 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > @@ -16,6 +16,10 @@
> > #address-cells = <2>;
> > #size-cells = <2>;
> >
> > +   aliases {
> > +   rtc1 = _alarm0;
> > +   };
> > +
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > @@ -768,6 +772,20 @@
> > timeout-sec = <30>;
> > };
> >
> > +   rcpm: rcpm@1e34040 {
> 
> Keep the node sort in unit-address.  Also, try to use a generic node name.
Hi Shawn,
Sorry for late reply.
The node sort will be updated in v2.
rcpm is called as Run Control and Power Management. Don't
Have a generic node name, any suggestions?

> 
> Shawn
> 
> > +   compatible = "fsl,lx2160a-rcpm", "fsl,qoriq-rcpm-2.1+";
> > +   reg = <0x0 0x1e34040 0x0 0x1c>;
> > +   #fsl,rcpm-wakeup-cells = <7>;
> > +   little-endian;
> > +   };
> > +
> > +   ftm_alarm0: timer@280 {
> > +   compatible = "fsl,lx2160a-ftm-alarm";
> > +   reg = <0x0 0x280 0x0 0x1>;
> > +   fsl,rcpm-wakeup = < 0x0 0x0 0x0 0x0 0x4000 0x0 
> > 0x0>;
> > +   interrupts = <0 44 4>;
> 
> IRQ_TYPE_LEVEL_HIGH
Got it, thanks. Will replace it in v2.
> 
> Shawn
> 
> > +   };
> > +
> > usb0: usb@310 {
> > compatible = "snps,dwc3";
> > reg = <0x0 0x310 0x0 0x1>;
> > --
> > 2.17.1
> >

[PATCH 2/3] dts: ppc: t4240rdb: add uie_unsupported property to drop warning

[Biwen Li]

From: Biwen Li 

This adds uie_unsupported property to drop warning as follows:
- $ hwclock.util-linux
  hwclock.util-linux: select() to /dev/rtc0
  to wait for clock tick timed out

My case:
- RTC ds1374's INT pin is connected to VCC on T4240RDB,
  then the RTC cannot inform cpu about the alarm interrupt

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t4240rdb.dts | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts 
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..ccdd10202e56 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,11 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
+   // The ds1374's INT pin isn't
+   // connected to cpu's INT pin,
+   // so the rtc cannot synchronize
+   // clock tick per second.
+   uie_unsupported;
};
};
 
-- 
2.17.1

[PATCH 3/3] dts: ppc: t1024rdb: add wakeup-source property to drop warning

[Biwen Li]

From: Biwen Li 

This adds wakeup-source property to drop warning as follows:
- $ hwclock.util-linux
  hwclock.util-linux: select() to /dev/rtc0
  to wait for clock tick timed out

My case:
- RTC ds1339s INT pin isn't connected to cpus INT pin on T1024RDB,
  then the RTC cannot inform cpu about alarm interrupt

How to fix it?
- add wakeup-source property and remove IRQ line
  to set uie_unsupported flag

Signed-off-by: Biwen Li 
---
 arch/powerpc/boot/dts/fsl/t1024rdb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts 
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..191cbf5cda4e 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,7 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
-   interrupts = <0x1 0x1 0 0>;
+   wakeup-source;
};
};
 
-- 
2.17.1

[PATCH 1/3] rtc: ds1374: add uie_unsupported property to drop warning

[Biwen Li]

From: Biwen Li 

Add uie_unsupported property to drop warning as follows:
- $ hwclock.util-linux
  hwclock.util-liux: select() /dev/rtc0
  to wait for clock tick timed out

My case:
- RTC ds1374's INT pin is connected to VCC on T4240RDB,
  then the RTC cannot inform cpu about the alarm
  interrupt

Signed-off-by: Biwen Li 
---
 drivers/rtc/rtc-ds1374.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 9c51a12cf70f..e530e887a17e 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -651,6 +651,10 @@ static int ds1374_probe(struct i2c_client *client,
if (ret)
return ret;
 
+   if (of_property_read_bool(client->dev.of_node,
+"uie_unsupported"))
+   ds1374->rtc->uie_unsupported = true;
+
 #ifdef CONFIG_RTC_DRV_DS1374_WDT
save_client = client;
ret = misc_register(_miscdev);
-- 
2.17.1

[v5,1/3] dt-bindings: i2c: support property idle-state

[Biwen Li]

This supports property idle-state

Signed-off-by: Biwen Li 
---
Change in v5:
- none

Change in v4:
- none

Change in v3:
- update subject and description
- add some information for property idle-state

Change in v2:
- update subject and description
- add property idle-state

 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..7abda506b828 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -25,6 +25,8 @@ Required Properties:
 Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the reset input.
+  - idle-state: if present, overrides i2c-mux-idle-disconnect,
+Please refer to Documentation/devicetree/bindings/mux/mux-controller.txt
   - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
 children in idle state. This is necessary for example, if there are several
 multiplexers on the bus and the devices behind them use same I2C addresses.
-- 
2.17.1

[v5,2/3] i2c: mux: pca954x: support property idle-state

[Biwen Li]

This supports property idle-state,if present,
overrides i2c-mux-idle-disconnect.

My use cases:
- Use the property idle-state to fix
  an errata on LS2085ARDB and LS2088ARDB.
- Errata id: E-00013(board LS2085ARDB and
  LS2088ARDB revision on Rev.B, Rev.C and Rev.D).
- About E-00013:
  - Description: I2C1 and I2C3 buses
are missing pull-up.
  - Impact: When the PCA954x device is tri-stated, the I2C bus
will float. This makes the I2C bus and its associated
downstream devices inaccessible.
  - Hardware fix: Populate resistors R189 and R190 for I2C1
and resistors R228 and R229 for I2C3.
  - Software fix: Remove the tri-state option from the PCA954x
driver(PCA954x always on enable status, specify a
channel zero in dts to fix the errata E-00013).

Signed-off-by: Biwen Li 
---
Change in v5:
- add extra precaution for pca954x_init 

Change in v4:
- rename function
  pca954x_calculate_chan -> pca954x_regval

Change in v3:
- update subject and description
- add a helper function pca954x_calculate_chan()

Change in v2:
- update subject and description
- add property idle-state

 drivers/i2c/muxes/i2c-mux-pca954x.c | 67 +++--
 1 file changed, 44 insertions(+), 23 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..218ba1a5ed7e 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -86,7 +86,7 @@ struct pca954x {
 
u8 last_chan;   /* last register value */
/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
-   s8 idle_state;
+   s32 idle_state;
 
struct i2c_client *client;
 
@@ -229,20 +229,23 @@ static int pca954x_reg_write(struct i2c_adapter *adap,
I2C_SMBUS_BYTE, );
 }
 
+static u8 pca954x_regval(struct pca954x *data, u8 chan)
+{
+   /* We make switches look like muxes, not sure how to be smarter. */
+   if (data->chip->muxtype == pca954x_ismux)
+   return chan | data->chip->enable;
+   else
+   return 1 << chan;
+}
+
 static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   const struct chip_desc *chip = data->chip;
u8 regval;
int ret = 0;
 
-   /* we make switches look like muxes, not sure how to be smarter */
-   if (chip->muxtype == pca954x_ismux)
-   regval = chan | chip->enable;
-   else
-   regval = 1 << chan;
-
+   regval = pca954x_regval(data, chan);
/* Only select the channel if its different from the last channel */
if (data->last_chan != regval) {
ret = pca954x_reg_write(muxc->parent, client, regval);
@@ -256,7 +259,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   s8 idle_state;
+   s32 idle_state;
 
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -402,6 +405,25 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc)
i2c_mux_del_adapters(muxc);
 }
 
+static int pca954x_init(struct i2c_client *client, struct pca954x *data)
+{
+   int ret;
+   if (data->idle_state >= 0) {
+   data->last_chan = pca954x_regval(data, data->idle_state);
+   } else {
+   /* Disconnect multiplexer */
+   data->last_chan = 0;
+   }
+   ret = i2c_smbus_write_byte(client, data->last_chan);
+   if (ret < 0) {
+   data->last_chan = 0;
+   dev_err(>dev, "failed to verify the mux, \
+   the mux maybe not present in fact\n");
+   }
+
+   return ret;
+}
+
 /*
  * I2C init/probing/exit functions
  */
@@ -411,7 +433,6 @@ static int pca954x_probe(struct i2c_client *client,
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
struct device_node *np = dev->of_node;
-   bool idle_disconnect_dt;
struct gpio_desc *gpio;
struct i2c_mux_core *muxc;
struct pca954x *data;
@@ -462,23 +483,24 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
-   /* Write the mux register at addr to verify
+   data->idle_state = MUX_IDLE_AS_IS;
+   if (of_property_read_u32(np, "idle-state", >idle_state)) {
+   if (np && of_property_read_bool(np, "i2c-mux-idle-disconnect"))
+   data->idle_state = MUX_IDLE_DISCONNECT;
+   }
+

[v5,3/3] arm64: dts: fsl-ls208xa-rdb: fix an errata E-00013

[Biwen Li]

Specify a channel zero in idle state to
avoid enterring tri-stated state for PCA9547.
About E-00013:
- Description: I2C1 and I2C3 buses
  are missing pull-up.
- Impact: When the PCA954x device is tri-stated, the I2C bus
  will float. This makes the I2C bus and its associated
  downstream devices inaccessible.
- Hardware fix: Populate resistors R189 and R190 for I2C1
  and resistors R228 and R229 for I2C3.
- Software fix: Remove the tri-state option from the PCA954x
  driver(PCA954x always on enable status, specify a
  channel zero in dts to fix the errata E-00013).

Signed-off-by: Biwen Li 
---
Change in v5:
- specify a channel zero when pca9547 in idle state.

 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi 
b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
index 6fd7f63085c9..412f1bc0db5f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -49,6 +49,7 @@
reg = <0x75>;
#address-cells = <1>;
#size-cells = <0>;
+   idle-state = <0>;
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
-- 
2.17.1

RE: [EXT] Re: [v4,2/2] i2c: mux: pca954x: support property idle-state

[Biwen Li]

> Caution: EXT Email
> 
> On 2019-10-21 10:00, Biwen Li wrote:
> > This supports property idle-state
> >
> 
> You should expand this a little bit to explain that idle-state, if present, 
> overrides
> i2c-mux-idle-disconnect. You could also mention your use case where you need
> to avoid disconnects on probe/resume.
Okay, got it. I will add some information in v5.
> 
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v4:
> >   - rename function
> > pca954x_calculate_chan -> pca954x_regval
> >
> > Change in v3:
> >   - update subject and description
> >   - add a helper function pca954x_calculate_chan()
> >
> > Change in v2:
> >   - update subject and description
> >   - add property idle-state
> >
> >  drivers/i2c/muxes/i2c-mux-pca954x.c | 59
> > ++---
> >  1 file changed, 36 insertions(+), 23 deletions(-)
> >
> > diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > index 923aa3a5a3dc..e566c4cd8ba5 100644
> > --- a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > @@ -86,7 +86,7 @@ struct pca954x {
> >
> >   u8 last_chan;   /* last register value */
> >   /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   struct i2c_client *client;
> >
> > @@ -229,20 +229,23 @@ static int pca954x_reg_write(struct i2c_adapter
> *adap,
> >   I2C_SMBUS_BYTE, );  }
> >
> > +static u8 pca954x_regval(struct pca954x *data, u8 chan) {
> > + /* we make switches look like muxes, not sure how to be smarter
> > +*/
> 
> I know you are just moving the comment around, but please fix the sentence to
> start with a capital letter and end with a period. Sorry I didn't catch this 
> in v3.
Okay, got it, I will fix it in v5.
> 
> > + if (data->chip->muxtype == pca954x_ismux)
> > + return chan | data->chip->enable;
> > + else
> > + return 1 << chan;
> > +}
> > +
> >  static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
> > {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - const struct chip_desc *chip = data->chip;
> >   u8 regval;
> >   int ret = 0;
> >
> > - /* we make switches look like muxes, not sure how to be smarter */
> > - if (chip->muxtype == pca954x_ismux)
> > - regval = chan | chip->enable;
> > - else
> > - regval = 1 << chan;
> > -
> > + regval = pca954x_regval(data, (u8)(chan & 0xff));
> 
> Both a mask and a cast to do what the compiler should be doing all by itself?
> If you need to kill a warning, or something, please do just one or them. But
> personally I prefer the short, sweet and uncluttered:
Okay, got it, thanks. I will adjust it in v5.
> 
> regval = pca954x_regval(data, chan);
> 
> >   /* Only select the channel if its different from the last channel */
> >   if (data->last_chan != regval) {
> >   ret = pca954x_reg_write(muxc->parent, client, regval);
> > @@ -256,7 +259,7 @@ static int pca954x_deselect_mux(struct
> > i2c_mux_core *muxc, u32 chan)  {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   idle_state = READ_ONCE(data->idle_state);
> >   if (idle_state >= 0)
> > @@ -402,6 +405,17 @@ static void pca954x_cleanup(struct i2c_mux_core
> *muxc)
> >   i2c_mux_del_adapters(muxc);
> >  }
> >
> > +static int pca954x_init(struct i2c_client *client, struct pca954x
> > +*data) {
> > + if (data->idle_state >= 0) {
> > + data->last_chan = pca954x_regval(data,
> > +(u8)(data->idle_state & 0xff));
> 
> Dito.

Got it, thanks.
> 
> > + } else {
> > + /* Disconnect multiplexer */
> > + data->last_chan = 0;
> > + }
> > + return i2c_smbus_write_byte(client, data->last_chan);
> 
> Here's another thing I missed in the earlier iterations. If 
> i2c_smbus_write_byte
> fails here, I think you should set data->last_chan to zero. For the call from 
> probe
> it obviously doesn't matter much, but I think the call during resume is 
>

[v4,2/2] i2c: mux: pca954x: support property idle-state

[Biwen Li]

This supports property idle-state

Signed-off-by: Biwen Li 
---
Change in v4:
- rename function
  pca954x_calculate_chan -> pca954x_regval

Change in v3:
- update subject and description
- add a helper function pca954x_calculate_chan()

Change in v2:
- update subject and description
- add property idle-state

 drivers/i2c/muxes/i2c-mux-pca954x.c | 59 ++---
 1 file changed, 36 insertions(+), 23 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..e566c4cd8ba5 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -86,7 +86,7 @@ struct pca954x {
 
u8 last_chan;   /* last register value */
/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
-   s8 idle_state;
+   s32 idle_state;
 
struct i2c_client *client;
 
@@ -229,20 +229,23 @@ static int pca954x_reg_write(struct i2c_adapter *adap,
I2C_SMBUS_BYTE, );
 }
 
+static u8 pca954x_regval(struct pca954x *data, u8 chan)
+{
+   /* we make switches look like muxes, not sure how to be smarter */
+   if (data->chip->muxtype == pca954x_ismux)
+   return chan | data->chip->enable;
+   else
+   return 1 << chan;
+}
+
 static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   const struct chip_desc *chip = data->chip;
u8 regval;
int ret = 0;
 
-   /* we make switches look like muxes, not sure how to be smarter */
-   if (chip->muxtype == pca954x_ismux)
-   regval = chan | chip->enable;
-   else
-   regval = 1 << chan;
-
+   regval = pca954x_regval(data, (u8)(chan & 0xff));
/* Only select the channel if its different from the last channel */
if (data->last_chan != regval) {
ret = pca954x_reg_write(muxc->parent, client, regval);
@@ -256,7 +259,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   s8 idle_state;
+   s32 idle_state;
 
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -402,6 +405,17 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc)
i2c_mux_del_adapters(muxc);
 }
 
+static int pca954x_init(struct i2c_client *client, struct pca954x *data)
+{
+   if (data->idle_state >= 0) {
+   data->last_chan = pca954x_regval(data, (u8)(data->idle_state & 
0xff));
+   } else {
+   /* Disconnect multiplexer */
+   data->last_chan = 0;
+   }
+   return i2c_smbus_write_byte(client, data->last_chan);
+}
+
 /*
  * I2C init/probing/exit functions
  */
@@ -411,7 +425,6 @@ static int pca954x_probe(struct i2c_client *client,
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
struct device_node *np = dev->of_node;
-   bool idle_disconnect_dt;
struct gpio_desc *gpio;
struct i2c_mux_core *muxc;
struct pca954x *data;
@@ -462,23 +475,24 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
-   /* Write the mux register at addr to verify
+   data->idle_state = MUX_IDLE_AS_IS;
+   if (of_property_read_u32(np, "idle-state", >idle_state)) {
+   if (np && of_property_read_bool(np, "i2c-mux-idle-disconnect"))
+   data->idle_state = MUX_IDLE_DISCONNECT;
+   }
+
+   /*
+* Write the mux register at addr to verify
 * that the mux is in fact present. This also
-* initializes the mux to disconnected state.
+* initializes the mux to a channel
+* or disconnected state.
 */
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   ret = pca954x_init(client, data);
+   if (ret < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
-   data->idle_state = MUX_IDLE_AS_IS;
-
-   idle_disconnect_dt = np &&
-   of_property_read_bool(np, "i2c-mux-idle-disconnect");
-   if (idle_disconnect_dt)
-   data->idle_state = MUX_IDLE_DISCONNECT;
-
ret = pca954x_irq_setup(muxc);
if (ret)
goto fail_cleanup;
@@ -531,8 +545,7 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   return pca954x_init(client, data);
 }
 #endif
 
-- 
2.17.1

[v4,1/2] dt-bindings: i2c: support property idle-state

[Biwen Li]

This supports property idle-state

Signed-off-by: Biwen Li 
---
Change in v4:
- none

Change in v3:
- update subject and description
- add some information for property idle-state

Change in v2:
- update subject and description
- add property idle-state

 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..7abda506b828 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -25,6 +25,8 @@ Required Properties:
 Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the reset input.
+  - idle-state: if present, overrides i2c-mux-idle-disconnect,
+Please refer to Documentation/devicetree/bindings/mux/mux-controller.txt
   - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
 children in idle state. This is necessary for example, if there are several
 multiplexers on the bus and the devices behind them use same I2C addresses.
-- 
2.17.1

RE: [EXT] Re: [v3,2/2] i2c: mux: pca954x: support property idle-state

[Biwen Li]

> On 2019-10-16 06:09, Biwen Li wrote:
> > This supports property idle-state
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v3:
> >   - update subject and description
> >   - add a helper function pca954x_calculate_chan()
> >
> > Change in v2:
> >   - update subject and description
> >   - add property idle-state
> >
> >  drivers/i2c/muxes/i2c-mux-pca954x.c | 64
> > ++---
> >  1 file changed, 39 insertions(+), 25 deletions(-)
> >
> > diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > index 923aa3a5a3dc..8777d429269c 100644
> > --- a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > @@ -86,7 +86,7 @@ struct pca954x {
> >
> >   u8 last_chan;   /* last register value */
> >   /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   struct i2c_client *client;
> >
> > @@ -229,22 +229,25 @@ static int pca954x_reg_write(struct i2c_adapter
> *adap,
> >   I2C_SMBUS_BYTE, );  }
> >
> > +static int pca954x_calculate_chan(struct pca954x *data, u32 chan)
> 
> Should return u8, and "chan" is not what is calculated. Perhaps name the
> function pca954x_regval?
Okay, got it, I will change it in v4.
> 
> (Yes, last_chan is also clearly a bad name, and I suspect you may have
> based this name on it, but changing that is a separate patch.)
> 
> > +{
> > + /* we make switches look like muxes, not sure how to be smarter */
> > + if (data->chip->muxtype == pca954x_ismux)
> > + return chan | data->chip->enable;
> > + else
> > + return 1 << chan;
> > +}
> > +
> >  static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
> > {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - const struct chip_desc *chip = data->chip;
> >   u8 regval;
> >   int ret = 0;
> >
> > - /* we make switches look like muxes, not sure how to be smarter */
> > - if (chip->muxtype == pca954x_ismux)
> > - regval = chan | chip->enable;
> > - else
> > - regval = 1 << chan;
> > -
> > + regval = pca954x_calculate_chan(data, chan);
> 
> I think I would have kept the empty line here. Not important...
> 
> >   /* Only select the channel if its different from the last channel */
> > - if (data->last_chan != regval) {
> > + if ((data->last_chan & 0xff) != regval) {
> 
> The changes on this line are not needed (last_chan and regval are both u8)
> and just clutters up the code.
Okay, got it, I will not change it in v4.
> 
> >   ret = pca954x_reg_write(muxc->parent, client, regval);
> >   data->last_chan = ret < 0 ? 0 : regval;
> >   }
> > @@ -256,7 +259,7 @@ static int pca954x_deselect_mux(struct
> > i2c_mux_core *muxc, u32 chan)  {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   idle_state = READ_ONCE(data->idle_state);
> >   if (idle_state >= 0)
> > @@ -402,6 +405,23 @@ static void pca954x_cleanup(struct
> i2c_mux_core *muxc)
> >   i2c_mux_del_adapters(muxc);
> >  }
> >
> > +static int pca954x_init(struct i2c_client *client, struct pca954x
> > +*data) {
> > + /*
> > +  * Write the mux register at addr to verify
> > +  * that the mux is in fact present. This also
> > +  * initializes the mux to a channel
> > +  * or disconnected state.
> > +  */
> 
> Again, this comment belongs in pca954x_probe before the call to this
> function.
> It does not apply (at least not the first sentence) when pca954x_init is 
> called
> from pca954x_resume.
Okay, got it, thanks, I will move it in v4.
> 
> Hmmm, it could be argued that specifying MUX_IDLE_AS_IS should not
> trigger a disconnect on init (since the mux is always idle at init) and that
> some other method should be used to determine if the chip is present. The
> difference is that with the idle-state property you can explicitly request
> MUX_IDLE_AS_IS, while the old code only had some default behavior if
> i2c-mux-idle-disconnect was not present.
> 
> The easy way ou

[v3,1/2] dt-bindings: i2c: support property idle-state

[Biwen Li]

This supports property idle-state

Signed-off-by: Biwen Li 
---
Change in v3:
- update subject and description
- add some information for property idle-state

Change in v2:
- update subject and description
- add property idle-state

 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..7abda506b828 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -25,6 +25,8 @@ Required Properties:
 Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the reset input.
+  - idle-state: if present, overrides i2c-mux-idle-disconnect,
+Please refer to Documentation/devicetree/bindings/mux/mux-controller.txt
   - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
 children in idle state. This is necessary for example, if there are several
 multiplexers on the bus and the devices behind them use same I2C addresses.
-- 
2.17.1

[v3,2/2] i2c: mux: pca954x: support property idle-state

[Biwen Li]

This supports property idle-state

Signed-off-by: Biwen Li 
---
Change in v3:
- update subject and description
- add a helper function pca954x_calculate_chan()

Change in v2:
- update subject and description
- add property idle-state

 drivers/i2c/muxes/i2c-mux-pca954x.c | 64 ++---
 1 file changed, 39 insertions(+), 25 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..8777d429269c 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -86,7 +86,7 @@ struct pca954x {
 
u8 last_chan;   /* last register value */
/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
-   s8 idle_state;
+   s32 idle_state;
 
struct i2c_client *client;
 
@@ -229,22 +229,25 @@ static int pca954x_reg_write(struct i2c_adapter *adap,
I2C_SMBUS_BYTE, );
 }
 
+static int pca954x_calculate_chan(struct pca954x *data, u32 chan)
+{
+   /* we make switches look like muxes, not sure how to be smarter */
+   if (data->chip->muxtype == pca954x_ismux)
+   return chan | data->chip->enable;
+   else
+   return 1 << chan;
+}
+
 static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   const struct chip_desc *chip = data->chip;
u8 regval;
int ret = 0;
 
-   /* we make switches look like muxes, not sure how to be smarter */
-   if (chip->muxtype == pca954x_ismux)
-   regval = chan | chip->enable;
-   else
-   regval = 1 << chan;
-
+   regval = pca954x_calculate_chan(data, chan);
/* Only select the channel if its different from the last channel */
-   if (data->last_chan != regval) {
+   if ((data->last_chan & 0xff) != regval) {
ret = pca954x_reg_write(muxc->parent, client, regval);
data->last_chan = ret < 0 ? 0 : regval;
}
@@ -256,7 +259,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   s8 idle_state;
+   s32 idle_state;
 
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -402,6 +405,23 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc)
i2c_mux_del_adapters(muxc);
 }
 
+static int pca954x_init(struct i2c_client *client, struct pca954x *data)
+{
+   /*
+* Write the mux register at addr to verify
+* that the mux is in fact present. This also
+* initializes the mux to a channel
+* or disconnected state.
+*/
+   if (data->idle_state >= 0) {
+   data->last_chan = pca954x_calculate_chan(data, 
data->idle_state);
+   } else {
+   /* Disconnect multiplexer */
+   data->last_chan = 0;
+   }
+   return i2c_smbus_write_byte(client, data->last_chan);
+}
+
 /*
  * I2C init/probing/exit functions
  */
@@ -411,7 +431,6 @@ static int pca954x_probe(struct i2c_client *client,
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
struct device_node *np = dev->of_node;
-   bool idle_disconnect_dt;
struct gpio_desc *gpio;
struct i2c_mux_core *muxc;
struct pca954x *data;
@@ -462,22 +481,18 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
-   /* Write the mux register at addr to verify
-* that the mux is in fact present. This also
-* initializes the mux to disconnected state.
-*/
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   data->idle_state = MUX_IDLE_AS_IS;
+   if (np && of_property_read_u32(np, "idle-state", >idle_state)) {
+   if (np && of_property_read_bool(np, "i2c-mux-idle-disconnect"))
+   data->idle_state = MUX_IDLE_DISCONNECT;
+   }
+
+   ret = pca954x_init(client, data);
+   if (ret < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
-   data->idle_state = MUX_IDLE_AS_IS;
-
-   idle_disconnect_dt = np &&
-   of_property_read_bool(np, "i2c-mux-idle-disconnect");
-   if (idle_disconnect_dt)
-   data->idle_state = MUX_IDLE_DISCONNECT;
 
ret = pca954x_irq_setup(muxc);
if (ret)
@@ -531,8 +546,7 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   return pca954x_init(client, data);
 }
 #endif
 
-- 
2.17.1

RE: [EXT] Re: [v2,2/2] i2c: mux: pca954x: add property idle-state

[Biwen Li]

> 
> On 2019-10-15 06:48, Biwen Li wrote:
> > This adds property idle-state
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v2:
> >   - update subject and description
> >   - add property idle-state
> >
> >  drivers/i2c/muxes/i2c-mux-pca954x.c | 47
> > ++---
> >  1 file changed, 30 insertions(+), 17 deletions(-)
> >
> > diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > index 923aa3a5a3dc..8ec586342b92 100644
> > --- a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > @@ -86,7 +86,7 @@ struct pca954x {
> >
> >   u8 last_chan;   /* last register value */
> >   /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   struct i2c_client *client;
> >
> > @@ -256,7 +256,7 @@ static int pca954x_deselect_mux(struct
> > i2c_mux_core *muxc, u32 chan)  {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   idle_state = READ_ONCE(data->idle_state);
> >   if (idle_state >= 0)
> > @@ -402,6 +402,25 @@ static void pca954x_cleanup(struct
> i2c_mux_core *muxc)
> >   i2c_mux_del_adapters(muxc);
> >  }
> >
> > +static int pca954x_init(struct i2c_client *client, struct pca954x
> > +*data) {
> > + /*
> > +  * Write the mux register at addr to verify
> > +  * that the mux is in fact present. This also
> > +  * initializes the mux to disconnected state.
> > +  */
> 
> This comment belongs in pca954x_probe, before the call to this function.
> However, the comment may now be be wrong since the mux is not always
> initialized to the disconnected state.
Got it, I will update it in v3.
> 
> > + if (data->idle_state >= 0) {
> > + /* Always enable multiplexer */
> 
> While I understand that it is important for your case that the mux is always
> enabled, this is just a side effect of having a specific idle-state. I 
> suggest that
> you remove this comment.
Got it, I will remove it in v3.
> 
> > + if (data->chip->muxtype == pca954x_ismux)
> > + data->last_chan = data->idle_state |
> data->chip->enable;
> > + else
> > + data->last_chan = 1 << data->idle_state;
> 
> The meat of this "if" is still duplicated, I was suggesting a helper that 
> only did
> the regval calculation so that the new helper could also be used from
> pca954x_select_chan.o
> 
> > + } else {
> > + /* Disconnect multiplexer */
> > + data->last_chan = 0; /* force the first selection */
> 
> These two comments should be combined.
Got it.
> 
> > + }
> > + return i2c_smbus_write_byte(client, data->last_chan); }
> >  /*
> >   * I2C init/probing/exit functions
> >   */
> > @@ -411,7 +430,6 @@ static int pca954x_probe(struct i2c_client *client,
> >   struct i2c_adapter *adap = client->adapter;
> >   struct device *dev = >dev;
> >   struct device_node *np = dev->of_node;
> > - bool idle_disconnect_dt;
> >   struct gpio_desc *gpio;
> >   struct i2c_mux_core *muxc;
> >   struct pca954x *data;
> > @@ -462,22 +480,18 @@ static int pca954x_probe(struct i2c_client
> *client,
> >   }
> >   }
> >
> > - /* Write the mux register at addr to verify
> > -  * that the mux is in fact present. This also
> > -  * initializes the mux to disconnected state.
> > -  */
> > - if (i2c_smbus_write_byte(client, 0) < 0) {
> > + if (of_property_read_u32(np, "idle-state", >idle_state))
> > + data->idle_state = MUX_IDLE_AS_IS;
> > +
> > + if (of_property_read_bool(np, "i2c-mux-idle-disconnect"))
> > + data->idle_state = MUX_IDLE_DISCONNECT;
> 
> I think you should ignore i2c-mux-idle-disconnect if idle-state is present.
> I.e. move this "if" statement into the body of the former "if". Also, you have
> broken things if np is NULL.
Got it, I will modify it in v3.
> 
> Cheers,
> Peter
> 
> > +
> > + ret = pca954x_init(client, data);
> > + if (ret < 0) {
> >   dev_warn(dev, "probe failed\n");

RE: [EXT] Re: [v2,1/2] dt-bindings: i2c: add property idle-state

[Biwen Li]

> 
> On 2019-10-15 06:48, Biwen Li wrote:
> > This adds property idle-state
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v2:
> >   - update subject and description
> >   - add property idle-state
> >
> >  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > index 30ac6a60f041..2c7875d338fb 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > @@ -34,6 +34,7 @@ Optional Properties:
> >  - first cell is the pin number
> >  - second cell is used to specify flags.
> >  See also
> > Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> > +  - idle-state: Please refer to
> > + Documentation/devicetree/bindings/mux/mux-controller.txt
> >
> >  Example:
> >
> >
> 
> As per my comments on the code, you should mention that idle-state, if
> present, overrides i2c-mux-idle-disconnect. I also think you should keep
> idle-state and i2c-mux-idle-disconnect right next to each other.
Got it, I will adjust it in v3.
> 
> Cheers,
> Peter

[v2,1/2] dt-bindings: i2c: add property idle-state

[Biwen Li]

This adds property idle-state

Signed-off-by: Biwen Li 
---
Change in v2:
- update subject and description
- add property idle-state

 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..2c7875d338fb 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -34,6 +34,7 @@ Optional Properties:
 - first cell is the pin number
 - second cell is used to specify flags.
 See also 
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+  - idle-state: Please refer to 
Documentation/devicetree/bindings/mux/mux-controller.txt
 
 Example:
 
-- 
2.17.1

[v2,2/2] i2c: mux: pca954x: add property idle-state

[Biwen Li]

This adds property idle-state

Signed-off-by: Biwen Li 
---
Change in v2:
- update subject and description
- add property idle-state

 drivers/i2c/muxes/i2c-mux-pca954x.c | 47 ++---
 1 file changed, 30 insertions(+), 17 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..8ec586342b92 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -86,7 +86,7 @@ struct pca954x {
 
u8 last_chan;   /* last register value */
/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
-   s8 idle_state;
+   s32 idle_state;
 
struct i2c_client *client;
 
@@ -256,7 +256,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   s8 idle_state;
+   s32 idle_state;
 
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -402,6 +402,25 @@ static void pca954x_cleanup(struct i2c_mux_core *muxc)
i2c_mux_del_adapters(muxc);
 }
 
+static int pca954x_init(struct i2c_client *client, struct pca954x *data)
+{
+   /*
+* Write the mux register at addr to verify
+* that the mux is in fact present. This also
+* initializes the mux to disconnected state.
+*/
+   if (data->idle_state >= 0) {
+   /* Always enable multiplexer */
+   if (data->chip->muxtype == pca954x_ismux)
+   data->last_chan = data->idle_state | data->chip->enable;
+   else
+   data->last_chan = 1 << data->idle_state;
+   } else {
+   /* Disconnect multiplexer */
+   data->last_chan = 0; /* force the first selection */
+   }
+   return i2c_smbus_write_byte(client, data->last_chan);
+}
 /*
  * I2C init/probing/exit functions
  */
@@ -411,7 +430,6 @@ static int pca954x_probe(struct i2c_client *client,
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
struct device_node *np = dev->of_node;
-   bool idle_disconnect_dt;
struct gpio_desc *gpio;
struct i2c_mux_core *muxc;
struct pca954x *data;
@@ -462,22 +480,18 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
-   /* Write the mux register at addr to verify
-* that the mux is in fact present. This also
-* initializes the mux to disconnected state.
-*/
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   if (of_property_read_u32(np, "idle-state", >idle_state))
+   data->idle_state = MUX_IDLE_AS_IS;
+
+   if (of_property_read_bool(np, "i2c-mux-idle-disconnect"))
+   data->idle_state = MUX_IDLE_DISCONNECT;
+
+   ret = pca954x_init(client, data);
+   if (ret < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
-   data->idle_state = MUX_IDLE_AS_IS;
-
-   idle_disconnect_dt = np &&
-   of_property_read_bool(np, "i2c-mux-idle-disconnect");
-   if (idle_disconnect_dt)
-   data->idle_state = MUX_IDLE_DISCONNECT;
 
ret = pca954x_irq_setup(muxc);
if (ret)
@@ -531,8 +545,7 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   return pca954x_init(client, data);
 }
 #endif
 
-- 
2.17.1

RE: [EXT] Re: [PATCH 1/2] dt-bindings: i2c: replace property i2c-mux-idle-disconnect

[Biwen Li]

> Caution: EXT Email
> 
> On 2019-10-14 13:25, Biwen Li wrote:
> > This replaces property i2c-mux-idle-disconnect with idle-state
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > index 30ac6a60f041..f2db517b1635 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > @@ -25,9 +25,7 @@ Required Properties:
> >  Optional Properties:
> >
> >- reset-gpios: Reference to the GPIO connected to the reset input.
> > -  - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect
> all
> > -children in idle state. This is necessary for example, if there are 
> > several
> > -multiplexers on the bus and the devices behind them use same I2C
> addresses.
> > +  - idle-state: Please refer to
> > + Documentation/devicetree/bindings/mux/mux-controller.txt
> >- interrupts: Interrupt mapping for IRQ.
> >- interrupt-controller: Marks the device node as an interrupt controller.
> >- #interrupt-cells : Should be two.
> >
> 
> You can't just remove i2c-mux-idle-disconnect. It needs to remain, and the
> driver needs to maintain support for this in case a new kernel is running
> with an old devicetree.
You are right, I will add it in v2.
> 
> Cheers,
> Peter

RE: [EXT] Re: [PATCH 2/2] i2c: mux: pca954x: replace property i2c-mux-idle-disconnect

[Biwen Li]

> 
> Caution: EXT Email
> 
> On 2019-10-14 13:25, Biwen Li wrote:
> > This replaces property i2c-mux-idle-disconnect with idle-state
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  drivers/i2c/muxes/i2c-mux-pca954x.c | 44
> > -
> >  1 file changed, 31 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > index 923aa3a5a3dc..a330929c4d67 100644
> > --- a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > @@ -86,7 +86,7 @@ struct pca954x {
> >
> >   u8 last_chan;   /* last register value */
> >   /* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   struct i2c_client *client;
> >
> > @@ -256,7 +256,7 @@ static int pca954x_deselect_mux(struct
> > i2c_mux_core *muxc, u32 chan)  {
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >   struct i2c_client *client = data->client;
> > - s8 idle_state;
> > + s32 idle_state;
> >
> >   idle_state = READ_ONCE(data->idle_state);
> >   if (idle_state >= 0)
> > @@ -411,7 +411,6 @@ static int pca954x_probe(struct i2c_client *client,
> >   struct i2c_adapter *adap = client->adapter;
> >   struct device *dev = >dev;
> >   struct device_node *np = dev->of_node;
> > - bool idle_disconnect_dt;
> >   struct gpio_desc *gpio;
> >   struct i2c_mux_core *muxc;
> >   struct pca954x *data;
> > @@ -462,22 +461,31 @@ static int pca954x_probe(struct i2c_client
> *client,
> >   }
> >   }
> >
> > + if (of_property_read_u32(np, "idle-state", >idle_state))
> > + data->idle_state = MUX_IDLE_AS_IS;
> > +
> >   /* Write the mux register at addr to verify
> >* that the mux is in fact present. This also
> >* initializes the mux to disconnected state.
> >*/
> > - if (i2c_smbus_write_byte(client, 0) < 0) {
> > + if (data->idle_state >= 0){
> 
> Space before {
Okay, got it, I will add it in v2.
> 
> > + data->last_chan = data->idle_state;
> 
> data->last_chan should have the actual register value, i.e. (untested)
Okay, got it, I will adjust it in v2.
> 
> if (data->chip->muxtype == pca954x_ismux)
> data->last_chan = data->idle_state |
> data->chip->enable;
> else
> data->last_chan = 1 << data->idle_state;
> 
> ret = i2c_smbus_write_byte(client, data->last_chan);
> 
> But since this regval calculation is now needed in three places, it should be
> moved to a helper function.
You are right, I will add a helper function in v2.
> 
> > + /* Always enable multiplexer */
> > + ret = i2c_smbus_write_byte(client, data->last_chan |
> > + (data->chip->muxtype ==
> pca954x_ismux ?
> > +  data->chip->enable : 0));
> > + }
> > + else{
> 
> Space before {
Got it, I will add it in v2.
> 
> Naturally, you have the exact same issues in the pca954x_resume hunk,
> below.
Got it
> 
> > + data->last_chan = 0;   /* force the first
> selection */
> > + /* Disconnect multiplexer */
> > + ret = i2c_smbus_write_byte(client, data->last_chan);
> > + }
> > +
> > + if (ret < 0) {
> >   dev_warn(dev, "probe failed\n");
> >   return -ENODEV;
> >   }
> >
> > - data->last_chan = 0;   /* force the first selection */
> > - data->idle_state = MUX_IDLE_AS_IS;
> > -
> > - idle_disconnect_dt = np &&
> > - of_property_read_bool(np, "i2c-mux-idle-disconnect");
> > - if (idle_disconnect_dt)
> > - data->idle_state = MUX_IDLE_DISCONNECT;
> 
> In case the idle-state property is missing, you need to fall back to the old
> behavior and handle i2c-mux-idle-disconnect as before.
Okay, got it, I will add it in v2.
> 
> Cheers,
> Peter
> 
> >
> >   ret = pca954x_irq_setup(muxc);
> >   if (ret)
> > @@ -531,8 +539,18 @@ static int pca954x_resume(struct device *dev)
> >   struct i2c_mux_core *muxc = i2c_get_clientdata(client);
> >   struct pca954x *data = i2c_mux_priv(muxc);
> >
> > - data->last_chan = 0;
> > - return i2c_smbus_write_byte(client, 0);
> > + if (data->idle_state >= 0){
> > + data->last_chan = data->idle_state;
> > + /* Always enable multiplexer */
> > + return i2c_smbus_write_byte(client, data->last_chan |
> > + (data->chip->muxtype ==
> pca954x_ismux ?
> > +  data->chip->enable : 0));
> > + }
> > + else{
> > + data->last_chan = 0;
> > + /* Disconnect multiplexer */
> > + return i2c_smbus_write_byte(client, data->last_chan);
> > + }
> >  }
> >  #endif
> >
> >

RE: [PATCH 1/2] dt-bindings: i2c: replace property i2c-mux-idle-disconnect

[Biwen Li]

Hi Peter, Rob

This patch is a new method for https://lore.kernel.org/patchwork/patch/1132445/

Best Regards,
Biwen Li
> 
> This replaces property i2c-mux-idle-disconnect with idle-state
> 
> Signed-off-by: Biwen Li 
> ---
>  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> index 30ac6a60f041..f2db517b1635 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> @@ -25,9 +25,7 @@ Required Properties:
>  Optional Properties:
> 
>- reset-gpios: Reference to the GPIO connected to the reset input.
> -  - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect
> all
> -children in idle state. This is necessary for example, if there are 
> several
> -multiplexers on the bus and the devices behind them use same I2C
> addresses.
> +  - idle-state: Please refer to
> Documentation/devicetree/bindings/mux/mux-controller.txt
>- interrupts: Interrupt mapping for IRQ.
>- interrupt-controller: Marks the device node as an interrupt controller.
>- #interrupt-cells : Should be two.
> --
> 2.17.1

[PATCH 1/2] dt-bindings: i2c: replace property i2c-mux-idle-disconnect

[Biwen Li]

This replaces property i2c-mux-idle-disconnect with idle-state

Signed-off-by: Biwen Li 
---
 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..f2db517b1635 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -25,9 +25,7 @@ Required Properties:
 Optional Properties:
 
   - reset-gpios: Reference to the GPIO connected to the reset input.
-  - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
-children in idle state. This is necessary for example, if there are several
-multiplexers on the bus and the devices behind them use same I2C addresses.
+  - idle-state: Please refer to 
Documentation/devicetree/bindings/mux/mux-controller.txt
   - interrupts: Interrupt mapping for IRQ.
   - interrupt-controller: Marks the device node as an interrupt controller.
   - #interrupt-cells : Should be two.
-- 
2.17.1

[PATCH 2/2] i2c: mux: pca954x: replace property i2c-mux-idle-disconnect

[Biwen Li]

This replaces property i2c-mux-idle-disconnect with idle-state

Signed-off-by: Biwen Li 
---
 drivers/i2c/muxes/i2c-mux-pca954x.c | 44 -
 1 file changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..a330929c4d67 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -86,7 +86,7 @@ struct pca954x {
 
u8 last_chan;   /* last register value */
/* MUX_IDLE_AS_IS, MUX_IDLE_DISCONNECT or >= 0 for channel */
-   s8 idle_state;
+   s32 idle_state;
 
struct i2c_client *client;
 
@@ -256,7 +256,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
 {
struct pca954x *data = i2c_mux_priv(muxc);
struct i2c_client *client = data->client;
-   s8 idle_state;
+   s32 idle_state;
 
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
@@ -411,7 +411,6 @@ static int pca954x_probe(struct i2c_client *client,
struct i2c_adapter *adap = client->adapter;
struct device *dev = >dev;
struct device_node *np = dev->of_node;
-   bool idle_disconnect_dt;
struct gpio_desc *gpio;
struct i2c_mux_core *muxc;
struct pca954x *data;
@@ -462,22 +461,31 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
+   if (of_property_read_u32(np, "idle-state", >idle_state))
+   data->idle_state = MUX_IDLE_AS_IS;
+
/* Write the mux register at addr to verify
 * that the mux is in fact present. This also
 * initializes the mux to disconnected state.
 */
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   if (data->idle_state >= 0){
+   data->last_chan = data->idle_state;
+   /* Always enable multiplexer */
+   ret = i2c_smbus_write_byte(client, data->last_chan |
+   (data->chip->muxtype == pca954x_ismux ?
+data->chip->enable : 0));
+   }
+   else{
+   data->last_chan = 0;   /* force the first selection 
*/
+   /* Disconnect multiplexer */
+   ret = i2c_smbus_write_byte(client, data->last_chan);
+   }
+
+   if (ret < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
-   data->idle_state = MUX_IDLE_AS_IS;
-
-   idle_disconnect_dt = np &&
-   of_property_read_bool(np, "i2c-mux-idle-disconnect");
-   if (idle_disconnect_dt)
-   data->idle_state = MUX_IDLE_DISCONNECT;
 
ret = pca954x_irq_setup(muxc);
if (ret)
@@ -531,8 +539,18 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   if (data->idle_state >= 0){
+   data->last_chan = data->idle_state;
+   /* Always enable multiplexer */
+   return i2c_smbus_write_byte(client, data->last_chan |
+   (data->chip->muxtype == pca954x_ismux ?
+data->chip->enable : 0));
+   }
+   else{
+   data->last_chan = 0;
+   /* Disconnect multiplexer */
+   return i2c_smbus_write_byte(client, data->last_chan);
+   }
 }
 #endif
 
-- 
2.17.1

RE: [EXT] Re: [v2,2/2] dt-bindings: i2c-mux-pca954x: Add optional property i2c-mux-never-disable

[Biwen Li]

> 
> On 2019-10-14 06:16, Biwen Li wrote:
> >>
> >>>
> >>> On Mon, Sep 30, 2019 at 11:25:03AM +0800, Biwen Li wrote:
> >>>> The patch adds an optional property i2c-mux-never-disable
> >>>>
> >>>> Signed-off-by: Biwen Li 
> >>>> ---
> >>>> Change in v2:
> >>>>   - update documentation
> >>>>
> >>>>  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
> >>>>  1 file changed, 1 insertion(+)
> >>>>
> >>>> diff --git
> >>>> a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> >>>> b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> >>>> index 30ac6a60f041..71b73d0fdb62 100644
> >>>> --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> >>>> +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> >>>> @@ -34,6 +34,7 @@ Optional Properties:
> >>>>  - first cell is the pin number
> >>>>  - second cell is used to specify flags.
> >>>>  See also
> >>>> Documentation/devicetree/bindings/interrupt-controller/interrupts.t
> >>>> x
> >>>> t
> >>>> +  - i2c-mux-never-disable: always forces mux to be enabled.
> >>>
> >>> Either needs to have a vendor prefix or be documented as a common
> >>> property.
> > I choose to be documented as a common property.
> 
> Can we please just drop the never-disable approach and focus on idle-state
> instead?
I will focus on idle-state property, thanks.
> 
> >>>
> >>> IIRC, we already have a property for mux default state which seems
> >>> like that would cover this unless you need to leave it in different 
> >>> states.
> >> Okay, you are right, thank you so much. I will try it in v3.
> > Do you mean that the property is i2c-mux-idle-disconnect in
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt?
> > If so, the property i2c-mux-idle-disconnect is not good for me.
> > Because condition of the property i2c-mux-idle-disconnect is in idle
> state(sometimes).
> > But I need always enable i2c multiplexer in whatever state(anytime), so I
> add a common property i2c-mux-never-disable.
> 
> No, I do not think any new property is needed. AFAICT, idle-state fits
> perfectly, and I will not consider this i2c-mux-never-disable approach until
> some compelling reason is presented why idle-state is not appropriate. You
> promised to take a stab at it, and until I hear back on that, this series is 
> on
> hold. As indicated here [1].
> 
> You need to patch the driver to look at the idle-state property instead of
> inventing a new (and less flexible) property. If you implement idle-state for
> this driver and set the idle-state to some channel in the dts, the mux will
> never disconnect. Problem solved.
> Perhaps not your first solution, but it does solve your problem and may
> actually be useful for other purposes than your broken hardware.
> And it is consistent across other i2c-muxes. I see no downside.
Got it, thanks, I will try it.
> 
> Cheers,
> Peter
> 
> [1]
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.k
> ernel.org%2Flkml%2F07d85748-0721-39d4-d2be-13eb16b0f1de%40axenti
> a.se%2Fdata=02%7C01%7Cbiwen.li%40nxp.com%7C4fdea02b48b94
> ed1031f08d7507509ac%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%
> 7C0%7C637066335914038253sdata=aZfxDhLPX%2FSMFGuW8ryM
> %2BcxQetFUDpdxxLa%2BuUQs7I4%3Dreserved=0

RE: [EXT] Re: [v2,2/2] dt-bindings: i2c-mux-pca954x: Add optional property i2c-mux-never-disable

[Biwen Li]

> 
> >
> > On Mon, Sep 30, 2019 at 11:25:03AM +0800, Biwen Li wrote:
> > > The patch adds an optional property i2c-mux-never-disable
> > >
> > > Signed-off-by: Biwen Li 
> > > ---
> > > Change in v2:
> > >   - update documentation
> > >
> > >  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > > b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > > index 30ac6a60f041..71b73d0fdb62 100644
> > > --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > > +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > > @@ -34,6 +34,7 @@ Optional Properties:
> > >  - first cell is the pin number
> > >  - second cell is used to specify flags.
> > >  See also
> > > Documentation/devicetree/bindings/interrupt-controller/interrupts.tx
> > > t
> > > +  - i2c-mux-never-disable: always forces mux to be enabled.
> >
> > Either needs to have a vendor prefix or be documented as a common
> > property.
I choose to be documented as a common property.
> >
> > IIRC, we already have a property for mux default state which seems
> > like that would cover this unless you need to leave it in different states.
> Okay, you are right, thank you so much. I will try it in v3.
Do you mean that the property is i2c-mux-idle-disconnect in 
Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt?
If so, the property i2c-mux-idle-disconnect is not good for me.
Because condition of the property i2c-mux-idle-disconnect is in idle 
state(sometimes).
But I need always enable i2c multiplexer in whatever state(anytime), so I add a 
common property i2c-mux-never-disable.
> >
> > Rob

RE: [EXT] Re: [v2,2/2] dt-bindings: i2c-mux-pca954x: Add optional property i2c-mux-never-disable

[Biwen Li]

> 
> On Mon, Sep 30, 2019 at 11:25:03AM +0800, Biwen Li wrote:
> > The patch adds an optional property i2c-mux-never-disable
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v2:
> >   - update documentation
> >
> >  Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > index 30ac6a60f041..71b73d0fdb62 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
> > @@ -34,6 +34,7 @@ Optional Properties:
> >  - first cell is the pin number
> >  - second cell is used to specify flags.
> >  See also
> > Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> > +  - i2c-mux-never-disable: always forces mux to be enabled.
> 
> Either needs to have a vendor prefix or be documented as a common
> property.
> 
> IIRC, we already have a property for mux default state which seems like that
> would cover this unless you need to leave it in different states.
Okay, you are right, thank you so much. I will try it in v3.
> 
> Rob

[RESEND v2] i2c: imx: support slave mode for imx I2C driver

[Biwen Li]

The patch supports slave mode for imx I2C driver

Signed-off-by: Biwen Li 
---
Change in v2:
- remove MACRO CONFIG_I2C_SLAVE

 drivers/i2c/busses/i2c-imx.c | 180 ---
 1 file changed, 166 insertions(+), 14 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index a3b61336fe55..d9858bc63656 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -203,6 +203,7 @@ struct imx_i2c_struct {
struct pinctrl_state *pinctrl_pins_gpio;
 
struct imx_i2c_dma  *dma;
+   struct i2c_client   *slave;
 };
 
 static const struct imx_i2c_hwdata imx1_i2c_hwdata = {
@@ -588,23 +589,38 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 }
 
-static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
+/* Clear interrupt flag bit */
+static void i2c_imx_clr_if_bit(struct imx_i2c_struct *i2c_imx)
 {
-   struct imx_i2c_struct *i2c_imx = dev_id;
-   unsigned int temp;
+   unsigned int status;
 
-   temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
-   if (temp & I2SR_IIF) {
-   /* save status register */
-   i2c_imx->i2csr = temp;
-   temp &= ~I2SR_IIF;
-   temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
-   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
-   wake_up(_imx->queue);
-   return IRQ_HANDLED;
-   }
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   status &= ~I2SR_IIF;
+   status |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
+   imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
+}
 
-   return IRQ_NONE;
+/* Clear arbitration lost bit */
+static void i2c_imx_clr_al_bit(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status;
+
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   status &= ~I2SR_IAL;
+   imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
+}
+
+static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status;
+
+   /* Save status register */
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   i2c_imx->i2csr = status | I2SR_IIF;
+
+   wake_up(_imx->queue);
+
+   return IRQ_HANDLED;
 }
 
 static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
@@ -1048,11 +1064,147 @@ static u32 i2c_imx_func(struct i2c_adapter *adapter)
| I2C_FUNC_SMBUS_READ_BLOCK_DATA;
 }
 
+static void i2c_imx_slave_init(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int temp;
+
+   dev_dbg(_imx->adapter.dev, "<%s>\n", __func__);
+
+   /* Set slave addr. */
+   imx_i2c_write_reg((i2c_imx->slave->addr << 1), i2c_imx, IMX_I2C_IADR);
+
+   /* Disable i2c module */
+   temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN;
+   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
+
+   /* Reset status register */
+   imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx,
+ IMX_I2C_I2SR);
+
+   /* Enable module and enable interrupt from i2c module */
+   temp = i2c_imx->hwdata->i2cr_ien_opcode | I2CR_IIEN;
+   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
+
+   /* Wait controller to be stable */
+   usleep_range(50, 150);
+}
+
+static irqreturn_t i2c_imx_slave_isr(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status, ctl;
+   u8 value;
+
+   if (!i2c_imx->slave) {
+   dev_err(_imx->adapter.dev, "cannot deal with slave 
irq,i2c_imx->slave is null");
+   return IRQ_NONE;
+   }
+
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   ctl = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
+   if (status & I2SR_IAL) { /* Arbitration lost */
+   i2c_imx_clr_al_bit(i2c_imx);
+   } else if (status & I2SR_IAAS) { /* Addressed as a slave */
+   if (status & I2SR_SRW) { /* Master wants to read from us*/
+   dev_dbg(_imx->adapter.dev, "read requested");
+   i2c_slave_event(i2c_imx->slave, 
I2C_SLAVE_READ_REQUESTED, );
+
+   /* Slave transmit */
+   ctl |= I2CR_MTX;
+   imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR);
+
+   /* Send data */
+   imx_i2c_write_reg(value, i2c_imx, IMX_I2C_I2DR);
+   } else { /* Master wants to write to us */
+   dev_dbg(_imx->adapter.dev, "write requested");
+   i2c_slave_event(i2c_imx->slave, 
I2C_SLAVE_WRITE_REQUESTED, );
+
+   /* Slave receive */
+   ctl &= ~I2CR_MTX;
+   imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR);
+  

[v2] i2c: imx: support slave mode for imx I2C driver

[Biwen Li]

The patch supports slave mode for imx I2C driver

Signed-off-by: Biwen Li 
---
Change in v2:
- remove MACRO CONFIG_I2C_SLAVE

 drivers/i2c/busses/i2c-imx.c | 180 ---
 1 file changed, 166 insertions(+), 14 deletions(-)

diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index a3b61336fe55..aceb3d97bf5c 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -203,6 +203,7 @@ struct imx_i2c_struct {
struct pinctrl_state *pinctrl_pins_gpio;
 
struct imx_i2c_dma  *dma;
+   struct i2c_client   *slave;
 };
 
 static const struct imx_i2c_hwdata imx1_i2c_hwdata = {
@@ -588,23 +589,38 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
 }
 
-static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
+/* Clear interrupt flag bit */
+static void i2c_imx_clr_if_bit(struct imx_i2c_struct *i2c_imx)
 {
-   struct imx_i2c_struct *i2c_imx = dev_id;
-   unsigned int temp;
+   unsigned int status;
 
-   temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
-   if (temp & I2SR_IIF) {
-   /* save status register */
-   i2c_imx->i2csr = temp;
-   temp &= ~I2SR_IIF;
-   temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
-   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
-   wake_up(_imx->queue);
-   return IRQ_HANDLED;
-   }
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   status &= ~I2SR_IIF;
+   status |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
+   imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
+}
 
-   return IRQ_NONE;
+/* Clear arbitration lost bit */
+static void i2c_imx_clr_al_bit(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status;
+
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   status &= ~I2SR_IAL;
+   imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
+}
+
+static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status;
+
+   /* Save status register */
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   i2c_imx->i2csr = status | I2SR_IIF;
+
+   wake_up(_imx->queue);
+
+   return IRQ_HANDLED;
 }
 
 static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
@@ -1048,11 +1064,147 @@ static u32 i2c_imx_func(struct i2c_adapter *adapter)
| I2C_FUNC_SMBUS_READ_BLOCK_DATA;
 }
 
+static void i2c_imx_slave_init(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int temp;
+
+   dev_dbg(_imx->adapter.dev, "<%s>\n", __func__);
+
+   /* Set slave addr. */
+   imx_i2c_write_reg((i2c_imx->slave->addr << 1), i2c_imx, IMX_I2C_IADR);
+
+   /* Disable i2c module */
+   temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN;
+   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
+
+   /* Reset status register */
+   imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx,
+ IMX_I2C_I2SR);
+
+   /* Enable module and enable interrupt from i2c module */
+   temp = i2c_imx->hwdata->i2cr_ien_opcode | I2CR_IIEN;
+   imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
+
+   /* Wait controller to be stable */
+   usleep_range(50, 150);
+}
+
+static irqreturn_t i2c_imx_slave_isr(struct imx_i2c_struct *i2c_imx)
+{
+   unsigned int status, ctl;
+   u8 value;
+
+   if (!i2c_imx->slave) {
+   dev_err(_imx->adapter.dev, "cannot deal with slave 
irq,i2c_imx->slave is null");
+   return IRQ_NONE;
+   }
+
+   status = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
+   ctl = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
+   if (status & I2SR_IAL) { /* Arbitration lost */
+   i2c_imx_clr_al_bit(i2c_imx);
+   } else if (status & I2SR_IAAS) { /* Addressed as a slave */
+   if (status & I2SR_SRW) { /* Master wants to read from us*/
+   dev_dbg(_imx->adapter.dev, "read requested");
+   i2c_slave_event(i2c->slave, I2C_SLAVE_READ_REQUESTED, 
);
+
+   /* Slave transmit */
+   ctl |= I2CR_MTX;
+   imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR);
+
+   /* Send data */
+   imx_i2c_write_reg(value, i2c_imx, IMX_I2C_I2DR);
+   } else { /* Master wants to write to us */
+   dev_dbg(_imx->adapter.dev, "write requested");
+   i2c_slave_event(i2c_imx->slave, 
I2C_SLAVE_WRITE_REQUESTED, );
+
+   /* Slave receive */
+   ctl &= ~I2CR_MTX;
+   imx_i2c_write_reg(ctl, i2c_imx, IMX_I2C_I2CR);
+  

RE: [EXT] Re: [v4,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr1-alt-addr' property

[Biwen Li]

> 
> On Thu, Sep 26, 2019 at 10:41:18AM +0800, Biwen Li wrote:
> > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata
> > A-008646 on LS1021A
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v4:
> >   - rename property name
> > fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
> >
> > Change in v3:
> >   - rename property name
> > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> >
> > Change in v2:
> >   - update desc of the property 'fsl,rcpm-scfg'
> >
> >  .../devicetree/bindings/soc/fsl/rcpm.txt  | 21
> +++
> >  1 file changed, 21 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > index 5a33619d881d..751a7655b694 100644
> > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -34,6 +34,13 @@ Chassis VersionExample Chips
> >  Optional properties:
> >   - little-endian : RCPM register block is Little Endian. Without it RCPM
> > will be Big Endian (default case).
> > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
> > +   on SoC LS1021A and only needed on SoC LS1021A.
> > +   Must include 1 + 2 entries.
> > +   The first entry must be a link to the SCFG device node.
> > +   The non-first entry must be offset of registers of SCFG.
> > +   The second and third entry compose an alt offset address
> > +   for IPPDEXPCR1(SCFG_SPARECR8)
> 
> If only on 1 SoC, can't all this be implied by "fsl,ls1021a-rcpm"?
Currently on SoC LS1021A. Maybe other soc need this!
> 
> Adding a property means you need both a new dtb and kernel to fix the
> errata. Using the compatible string means you only need a new kernel.
You are right, but it will be more flexible. Thanks.
> 
> >
> >  Example:
> >  The RCPM node for T4240:
> > @@ -43,6 +50,20 @@ The RCPM node for T4240:
> >   #fsl,rcpm-wakeup-cells = <2>;
> >   };
> >
> > +The RCPM node for LS1021A:
> > + rcpm: rcpm@1ee2140 {
> > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
> 
> Both of these compatible strings aren't documented.
These compatible strings is here: https://patchwork.kernel.org/patch/11105281/
> 
> > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > + #fsl,rcpm-wakeup-cells = <2>;
> > +
> > + /*
> > +  * The second and third entry compose an alt offset
> > +  * address for IPPDEXPCR1(SCFG_SPARECR8)
> > +  */
> > + fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
> > + };
> > +
> > +
> >  * Freescale RCPM Wakeup Source Device Tree Bindings
> >  ---
> >  Required fsl,rcpm-wakeup property should be added to a device node if
> > the device
> > --
> > 2.17.1
> >

[v2,2/2] dt-bindings: i2c-mux-pca954x: Add optional property i2c-mux-never-disable

[Biwen Li]

The patch adds an optional property i2c-mux-never-disable

Signed-off-by: Biwen Li 
---
Change in v2:
- update documentation

 Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt 
b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 30ac6a60f041..71b73d0fdb62 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -34,6 +34,7 @@ Optional Properties:
 - first cell is the pin number
 - second cell is used to specify flags.
 See also 
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+  - i2c-mux-never-disable: always forces mux to be enabled.
 
 Example:
 
-- 
2.17.1

[v2,1/2] i2c: pca954x: Add property to skip disabling PCA954x MUX device

[Biwen Li]

On some Layerscape boards like LS2085ARDB and LS2088ARDB,
input pull-up resistors on PCA954x MUX device are missing on board,
So, if MUX are disabled after powered-on, input lines will float
leading to incorrect functionality.

Hence, PCA954x MUX device should never be turned-off after
power-on.

Add property to skip disabling PCA954x MUX device
if device tree contains "i2c-mux-never-disable"
for PCA954x device node.

Errata ID: E-00013 on board LS2085ARDB and LS2088ARDB
(The hardware bug found on board revision
Rev.B, Rev.C and Rev.D)

Signed-off-by: Biwen Li 
---
Change in v2:
- update variable name
  disable_mux->never_disable

 drivers/i2c/muxes/i2c-mux-pca954x.c | 37 +
 1 file changed, 33 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..b4647b033163 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -93,6 +93,11 @@ struct pca954x {
struct irq_domain *irq;
unsigned int irq_mask;
raw_spinlock_t lock;
+   /*
+* never disable value will write to control register of mux
+* to always enable mux
+*/
+   u8 never_disable;
 };
 
 /* Provide specs for the PCA954x types we know about */
@@ -258,6 +263,11 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
struct i2c_client *client = data->client;
s8 idle_state;
 
+   if (data->never_disable) {
+   data->last_chan = data->chip->nchans;
+   return pca954x_reg_write(muxc->parent, client, 
data->never_disable);
+   }
+
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
/* Set the mux back to a predetermined channel */
@@ -462,16 +472,32 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
+   /* Errata ID E-00013 on board LS2088ARDB and LS2088ARDB:
+* The point here is that you must not disable a mux if there
+* are no pullups on the input or you mess up the I2C. This
+* needs to be put into the DTS really as the kernel cannot
+* know this otherwise.
+*/
+
+   data->never_disable = np &&
+   of_property_read_bool(np, "i2c-mux-never-disable") &&
+   data->chip->muxtype == pca954x_ismux ?
+   data->chip->enable : 0;
+
/* Write the mux register at addr to verify
 * that the mux is in fact present. This also
 * initializes the mux to disconnected state.
 */
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   if (i2c_smbus_write_byte(client, data->never_disable) < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
+   if (data->never_disable)
+   data->last_chan = data->chip->nchans;
+   else
+   data->last_chan = 0;   /* force the first selection 
*/
+
data->idle_state = MUX_IDLE_AS_IS;
 
idle_disconnect_dt = np &&
@@ -531,8 +557,11 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   if (data->never_disable)
+   data->last_chan = data->chip->nchans;
+   else
+   data->last_chan = 0;
+   return i2c_smbus_write_byte(client, data->never_disable);
 }
 #endif
 
-- 
2.17.1

RE: [EXT] Re: [PATCH] i2c: pca954x: Add property to skip disabling PCA954x MUX device

[Biwen Li]

> 
> Hello Biwen,
> 
> > +   /* Errata ID E-00013 on board LS2088ARDB and LS2088ARDB:
> > +* The point here is that you must not disable a mux if there
> > +* are no pullups on the input or you mess up the I2C. This
> > +* needs to be put into the DTS really as the kernel cannot
> > +* know this otherwise.
> > +*/
> 
> Can you please explain what a "mess up" is?
This is a hardware bug that happened on NXP board LS2085ARDB and LS2088ARDB.
So give a software fix for the hardware bug.
> 
> And also, should we put this new DTS property in related default bindings?
> 
> If not, are you planning a documentation update for the users to notify them
> about this?
I will update bindings document on v2.
> 
> --
> Cengiz Can 

RE: [EXT] Re: [PATCH] i2c: pca954x: Add property to skip disabling PCA954x MUX device

[Biwen Li]

> 
> On 2019-09-29 12:36, Biwen Li wrote:
> > On some Layerscape boards like LS2085ARDB and LS2088ARDB, input
> > pull-up resistors on PCA954x MUX device are missing on board, So, if
> > MUX are disabled after powered-on, input lines will float leading to
> > incorrect functionality.
> 
> Hi!
> 
> Are you saying that the parent bus of the mux is relying on some pull-ups 
> inside
> the mux?
Yes, as follows:

VCC

---

  |---
  ||

  \\

  /10K resister  / 10k resister

  \\

  ||
  ||
   I2C1_SCL   I2C1_SCL   |  
 --
|SCL   |  
|SCL  |
   I2C1_SDA  |   PCA9547   |I2C1_SDA   |   |
PCA9547  |  
|SDA   |  
|---|SDA |
    
 --
  --wrong design(need software fix as above or hardware fix)--  
--proper design--
> 
> > Hence, PCA954x MUX device should never be turned-off after power-on.
> >
> > Add property to skip disabling PCA954x MUX device if device tree
> > contains "i2c-mux-never-disable"
> > for PCA954x device node.
> >
> > Errata ID: E-00013 on board LS2085ARDB and LS2088ARDB (Board revision
> > found on Rev.B, Rev.C and Rev.D)
> 
> I think you should follow the example of the i2c-mux-gpio driver and implement
> the idle-state property instead.
> 
> That is a lot more consistent, assuming it solves the problem at hand?
Got it, thanks, I will try it.
> 
> >
> > Signed-off-by: Biwen Li 
> > ---
> >  drivers/i2c/muxes/i2c-mux-pca954x.c | 33
> > +
> >  1 file changed, 29 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > index 923aa3a5a3dc..ea8aca54d572 100644
> > --- a/drivers/i2c/muxes/i2c-mux-pca954x.c
> > +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
> > @@ -93,6 +93,7 @@ struct pca954x {
> >   struct irq_domain *irq;
> >   unsigned int irq_mask;
> >   raw_spinlock_t lock;
> > + u8 disable_mux; /* do not disable mux if val not 0 */
> 
> Awful number of negations there. The name is also backwards given that a
> non-zero value means that the mux should *not* be disabled. I would have
> reused the name from the binding.
> 
> bool never_disable;
> 
> A bit less confusing...
Got it,thanks, I will let it clear in v2.
> 
> >  };
> >
> >  /* Provide specs for the PCA954x types we know about */ @@ -258,6
> > +259,11 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc,
> u32 chan)
> >   struct i2c_client *client = data->client;
> >   s8 idle_state;
> >
> > + if (data->disable_mux != 0) {
> 
> Please drop " != 0" and use the variable as a truth value. More instances 
> below...
Got it, I will correct it in v2.
> 
> > + data->last_chan = data->chip->nchans;
> > + return pca954x_reg_write(muxc->parent, client,
> data->disable_mux);
> > + }
> > +
> >   idle_state = READ_ONCE(data->idle_state);
> >   if (idle_state >= 0)
> >   /* Set the mux back to a predetermined channel */ @@
> > -462,16 +468,32 @@ static int pca954x_probe(struct i2c_client *client,
> >   }
> >   }
> >
> > + /* Errata ID E-00013 on board LS2088ARDB and LS2088ARDB:
> > +  * The point here is that you must not disable a mux if there
> > +  * are no pullups on the input or you mess

[PATCH] i2c: pca954x: Add property to skip disabling PCA954x MUX device

[Biwen Li]

On some Layerscape boards like LS2085ARDB and LS2088ARDB,
input pull-up resistors on PCA954x MUX device are missing on board,
So, if MUX are disabled after powered-on, input lines will float
leading to incorrect functionality.

Hence, PCA954x MUX device should never be turned-off after
power-on.

Add property to skip disabling PCA954x MUX device
if device tree contains "i2c-mux-never-disable"
for PCA954x device node.

Errata ID: E-00013 on board LS2085ARDB and LS2088ARDB
(Board revision found on Rev.B, Rev.C and Rev.D)

Signed-off-by: Biwen Li 
---
 drivers/i2c/muxes/i2c-mux-pca954x.c | 33 +
 1 file changed, 29 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 923aa3a5a3dc..ea8aca54d572 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -93,6 +93,7 @@ struct pca954x {
struct irq_domain *irq;
unsigned int irq_mask;
raw_spinlock_t lock;
+   u8 disable_mux; /* do not disable mux if val not 0 */
 };
 
 /* Provide specs for the PCA954x types we know about */
@@ -258,6 +259,11 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, 
u32 chan)
struct i2c_client *client = data->client;
s8 idle_state;
 
+   if (data->disable_mux != 0) {
+   data->last_chan = data->chip->nchans;
+   return pca954x_reg_write(muxc->parent, client, 
data->disable_mux);
+   }
+
idle_state = READ_ONCE(data->idle_state);
if (idle_state >= 0)
/* Set the mux back to a predetermined channel */
@@ -462,16 +468,32 @@ static int pca954x_probe(struct i2c_client *client,
}
}
 
+   /* Errata ID E-00013 on board LS2088ARDB and LS2088ARDB:
+* The point here is that you must not disable a mux if there
+* are no pullups on the input or you mess up the I2C. This
+* needs to be put into the DTS really as the kernel cannot
+* know this otherwise.
+*/
+
+   data->disable_mux = np &&
+   of_property_read_bool(np, "i2c-mux-never-disable") &&
+   data->chip->muxtype == pca954x_ismux ?
+   data->chip->enable : 0;
+
/* Write the mux register at addr to verify
 * that the mux is in fact present. This also
 * initializes the mux to disconnected state.
 */
-   if (i2c_smbus_write_byte(client, 0) < 0) {
+   if (i2c_smbus_write_byte(client, data->disable_mux) < 0) {
dev_warn(dev, "probe failed\n");
return -ENODEV;
}
 
-   data->last_chan = 0;   /* force the first selection */
+   if (data->disable_mux != 0)
+   data->last_chan = data->chip->nchans;
+   else
+   data->last_chan = 0;   /* force the first selection 
*/
+
data->idle_state = MUX_IDLE_AS_IS;
 
idle_disconnect_dt = np &&
@@ -531,8 +553,11 @@ static int pca954x_resume(struct device *dev)
struct i2c_mux_core *muxc = i2c_get_clientdata(client);
struct pca954x *data = i2c_mux_priv(muxc);
 
-   data->last_chan = 0;
-   return i2c_smbus_write_byte(client, 0);
+   if (data->disable_mux != 0)
+   data->last_chan = data->chip->nchans;
+   else
+   data->last_chan = 0;
+   return i2c_smbus_write_byte(client, data->disable_mux);
 }
 #endif
 
-- 
2.17.1

RE: [v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A

[Biwen Li]

Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer dts, 
need apply these patches as follows:

1. RCPM driver:

https://patchwork.kernel.org/series/162731/mbox/ 
(https://patchwork.kernel.org/patch/11105279/)

2. FlexTimer dts:

https://lore.kernel.org/patchwork/series/405653/mbox/ 
(https://lore.kernel.org/patchwork/patch/1112493/)

3. FlexTimer driver:

https://patchwork.ozlabs.org/series/124718/mbox/ 
(https://patchwork.ozlabs.org/patch/1145999/)

https://patchwork.ozlabs.org/series/126942/mbox/ 
(https://patchwork.ozlabs.org/patch/1152085/)

4. Adjust drivers/soc/fsl/Makefile:

   remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to 
resolve a compilation error

> Description:
>   - Reading configuration register RCPM_IPPDEXPCR1
> always return zero
> 
> Workaround:
>   - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
> 
> Impact:
>   - FlexTimer module will cannot wakeup system in
> deep sleep on SoC LS1021A
> 
> Signed-off-by: Biwen Li 
> ---
> Change in v4:
>   - rename property name
> fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
> 
> Change in v3:
>   - update commit message
>   - rename property name
> fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> 
> Change in v2:
>   - fix stype problems
> 
>  drivers/soc/fsl/rcpm.c | 33 +
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..9a29c482fc2e 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
> 
>  #define RCPM_WAKEUP_CELL_MAX_SIZE7
> 
> @@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
>   struct rcpm *rcpm;
>   u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
>   int i, ret, idx;
> + struct regmap *scfg_addr_regmap = NULL;
> + u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
> 
>   rcpm = dev_get_drvdata(dev);
>   if (!rcpm)
> @@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
>   tmp |= value[i + 1];
>   iowrite32be(tmp, rcpm->ippdexpcr_base + 
> i * 4);
>   }
> + /* Workaround of errata A-008646 on SoC LS1021A:
> +  * There is a bug of register ippdexpcr1.
> +  * Reading configuration register 
> RCPM_IPPDEXPCR1
> +  * always return zero. So save ippdexpcr1's 
> value
> +  * to register SCFG_SPARECR8.And the value of
> +  * ippdexpcr1 will be read from SCFG_SPARECR8.
> +  */
> + scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> "fsl,ippdexpcr1-alt-addr");
> + if (scfg_addr_regmap && (1 == i)) {
> + if 
> (of_property_read_u32_array(dev->of_node,
> + "fsl,ippdexpcr1-alt-addr",
> + reg_offset,
> + 1 + sizeof(u64)/sizeof(u32))) {
> + scfg_addr_regmap = NULL;
> + continue;
> + }
> + /* Read value from register 
> SCFG_SPARECR8 */
> + regmap_read(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1] 
> << (sizeof(u32) *
> 8) |
> + reg_offset[2])) & 
> 0x),
> + _value);
> + /* Write value to register 
> SCFG_SPARECR8 */
> + regmap_write(scfg_addr_regmap,
> +  (u32)(((u64)(reg_offset[1] 
> << (sizeof(u32) *
> 8) |
> +  reg_offset[2])) & 
> 0x),
> +  tmp | reg_value);
> + }
>   }
>   }
>   } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1

[v4,2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep

[Biwen Li]

The patch fixes a bug that FlexTimer cannot
wakeup system in deep sleep.

Signed-off-by: Biwen Li 
---
Change in v4:
- update property name
  fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr

Change in v3:
- update property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
  
Change in v2:
- None

 arch/arm/boot/dts/ls1021a.dtsi | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..ae427f039e8b 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,6 +1000,12 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+
+   /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+   fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
};
 
ftm_alarm0: timer0@29d {
-- 
2.17.1

[v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A

[Biwen Li]

Description:
- Reading configuration register RCPM_IPPDEXPCR1
  always return zero

Workaround:
- Save register RCPM_IPPDEXPCR1's value to
  register SCFG_SPARECR8.(uboot's psci also
  need reading value from the register SCFG_SPARECR8
  to set register RCPM_IPPDEXPCR1)

Impact:
- FlexTimer module will cannot wakeup system in
  deep sleep on SoC LS1021A

Signed-off-by: Biwen Li 
---
Change in v4:
- rename property name
  fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr

Change in v3:
- update commit message
- rename property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr

Change in v2:
- fix stype problems

 drivers/soc/fsl/rcpm.c | 33 +
 1 file changed, 33 insertions(+)

diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..9a29c482fc2e 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define RCPM_WAKEUP_CELL_MAX_SIZE  7
 
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+   struct regmap *scfg_addr_regmap = NULL;
+   u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+   u32 reg_value = 0;
 
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base + 
i * 4);
}
+   /* Workaround of errata A-008646 on SoC LS1021A:
+* There is a bug of register ippdexpcr1.
+* Reading configuration register 
RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's 
value
+* to register SCFG_SPARECR8.And the value of
+* ippdexpcr1 will be read from SCFG_SPARECR8.
+*/
+   scfg_addr_regmap = 
syscon_regmap_lookup_by_phandle(np,
+   
   "fsl,ippdexpcr1-alt-addr");
+   if (scfg_addr_regmap && (1 == i)) {
+   if 
(of_property_read_u32_array(dev->of_node,
+   "fsl,ippdexpcr1-alt-addr",
+   reg_offset,
+   1 + sizeof(u64)/sizeof(u32))) {
+   scfg_addr_regmap = NULL;
+   continue;
+   }
+   /* Read value from register 
SCFG_SPARECR8 */
+   regmap_read(scfg_addr_regmap,
+   (u32)(((u64)(reg_offset[1] 
<< (sizeof(u32) * 8) |
+   reg_offset[2])) & 
0x),
+   _value);
+   /* Write value to register 
SCFG_SPARECR8 */
+   regmap_write(scfg_addr_regmap,
+(u32)(((u64)(reg_offset[1] 
<< (sizeof(u32) * 8) |
+reg_offset[2])) & 
0x),
+tmp | reg_value);
+   }
}
}
} while (ws = wakeup_source_get_next(ws));
-- 
2.17.1

[v4,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr1-alt-addr' property

[Biwen Li]

The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A

Signed-off-by: Biwen Li 
---
Change in v4:
- rename property name
  fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr

Change in v3:
- rename property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr

Change in v2:
- update desc of the property 'fsl,rcpm-scfg'

 .../devicetree/bindings/soc/fsl/rcpm.txt  | 21 +++
 1 file changed, 21 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..751a7655b694 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,13 @@ Chassis Version  Example Chips
 Optional properties:
  - little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
+   on SoC LS1021A and only needed on SoC LS1021A.
+   Must include 1 + 2 entries.
+   The first entry must be a link to the SCFG device node.
+   The non-first entry must be offset of registers of SCFG.
+   The second and third entry compose an alt offset address
+   for IPPDEXPCR1(SCFG_SPARECR8)
 
 Example:
 The RCPM node for T4240:
@@ -43,6 +50,20 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
 
+The RCPM node for LS1021A:
+   rcpm: rcpm@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+
+   /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+   fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
+   };
+
+
 * Freescale RCPM Wakeup Source Device Tree Bindings
 ---
 Required fsl,rcpm-wakeup property should be added to a device node if the 
device
-- 
2.17.1

RE: [EXT] Re: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> Caution: EXT Email
> 
> On Tue, Sep 24, 2019 at 11:27 PM Biwen Li  wrote:
> >
> > > > >
> > > > > > > > > > >
> > > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to
> > > > > > > > > > > handle an errata
> > > > > > > > > > > A-008646 on LS1021A
> > > > > > > > > > >
> > > > > > > > > > > Signed-off-by: Biwen Li 
> > > > > > > > > > > ---
> > > > > > > > > > > Change in v3:
> > > > > > > > > > >   - rename property name
> > > > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > > > > > > > > >
> > > > > > > > > > > Change in v2:
> > > > > > > > > > >   - update desc of the property 'fsl,rcpm-scfg'
> > > > > > > > > > >
> > > > > > > > > > >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > > > | 14
> > > > > > > > > > > ++
> > > > > > > > > > >  1 file changed, 14 insertions(+)
> > > > > > > > > > >
> > > > > > > > > > > diff --git
> > > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > > > index 5a33619d881d..157dcf6da17c 100644
> > > > > > > > > > > ---
> > > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm
> > > > > > > > > > > +++ .txt
> > > > > > > > > > > @@ -34,6 +34,11 @@ Chassis VersionExample
> > > > > Chips
> > > > > > > > > > >  Optional properties:
> > > > > > > > > > >   - little-endian : RCPM register block is Little Endian.
> > > > > > > > > > > Without it
> > > > > > RCPM
> > > > > > > > > > > will be Big Endian (default case).
> > > > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property
> > > > > > > > > > > + for SoC LS1021A,
> > > > > > > > > >
> > > > > > > > > > You probably should mention this is related to a
> > > > > > > > > > hardware issue on LS1021a and only needed on LS1021a.
> > > > > > > > > Okay, got it, thanks, I will add this in v4.
> > > > > > > > > >
> > > > > > > > > > > +   Must include n + 1 entries (n =
> > > > > > > > > > > + #fsl,rcpm-wakeup-cells, such
> > > > as:
> > > > > > > > > > > +   #fsl,rcpm-wakeup-cells equal to 2, then must
> > > > > > > > > > > + include
> > > > > > > > > > > + 2
> > > > > > > > > > > + +
> > > > > > > > > > > + 1
> > > > > > entries).
> > > > > > > > > >
> > > > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR
> > > > > > > > > > registers on an
> > > > > > SoC.
> > > > > > > > > > However you are defining an offset to scfg registers here.
> > > > > > > > > > Why these two are related?  The length here should
> > > > > > > > > > actually be related to the #address-cells of the soc/.
> > > > > > > > > > But since this is only needed for LS1021, you can
> > > > > > > > > just make it 3.
> > > > > > > > > I need set the value of IPPDEXPCR resgiters from
> > > > > > > > > ftm_alarm0 device node(fsl,rcpm-wakeup = < 0x0
> > > > > > > > > 0x2000>;
> > > > > > > > > 0x0 is a value for IPPDE

RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> > >
> > > > > > > > >
> > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle
> > > > > > > > > an errata
> > > > > > > > > A-008646 on LS1021A
> > > > > > > > >
> > > > > > > > > Signed-off-by: Biwen Li 
> > > > > > > > > ---
> > > > > > > > > Change in v3:
> > > > > > > > >   - rename property name
> > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > > > > > > >
> > > > > > > > > Change in v2:
> > > > > > > > >   - update desc of the property 'fsl,rcpm-scfg'
> > > > > > > > >
> > > > > > > > >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > > > > > > ++
> > > > > > > > >  1 file changed, 14 insertions(+)
> > > > > > > > >
> > > > > > > > > diff --git
> > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > index 5a33619d881d..157dcf6da17c 100644
> > > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > > @@ -34,6 +34,11 @@ Chassis VersionExample
> > > Chips
> > > > > > > > >  Optional properties:
> > > > > > > > >   - little-endian : RCPM register block is Little Endian.
> > > > > > > > > Without it
> > > > RCPM
> > > > > > > > > will be Big Endian (default case).
> > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for
> > > > > > > > > + SoC LS1021A,
> > > > > > > >
> > > > > > > > You probably should mention this is related to a hardware
> > > > > > > > issue on LS1021a and only needed on LS1021a.
> > > > > > > Okay, got it, thanks, I will add this in v4.
> > > > > > > >
> > > > > > > > > +   Must include n + 1 entries (n =
> > > > > > > > > + #fsl,rcpm-wakeup-cells, such
> > as:
> > > > > > > > > +   #fsl,rcpm-wakeup-cells equal to 2, then must include
> > > > > > > > > + 2
> > > > > > > > > + +
> > > > > > > > > + 1
> > > > entries).
> > > > > > > >
> > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR
> > > > > > > > registers on an
> > > > SoC.
> > > > > > > > However you are defining an offset to scfg registers here.
> > > > > > > > Why these two are related?  The length here should
> > > > > > > > actually be related to the #address-cells of the soc/.
> > > > > > > > But since this is only needed for LS1021, you can
> > > > > > > just make it 3.
> > > > > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0
> > > > > > > device node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > > > > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for
> > > > IPPDEXPCR1).
> > > > > > > But because of the hardware issue on LS1021A, I need store
> > > > > > > the value of IPPDEXPCR registers to an alt address. So I
> > > > > > > defining an offset to scfg registers, then RCPM driver get
> > > > > > > an abosolute address from offset, RCPM driver write the
> > > > > > > value of IPPDEXPCR registers to these abosolute
> > > > > > > addresses(backup the value of IPPDEXPCR
> > > > registers).
> > > > > >
> > > > > > I understand what you are trying to do.  The problem is that
> > > > > > the new fsl,ippdexpcr-alt-addr property contains a phandle and an
> offset.
> > > > > > The size of it shouldn't be related to #fs

RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> >
> > > > > > > >
> > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an
> > > > > > > > errata
> > > > > > > > A-008646 on LS1021A
> > > > > > > >
> > > > > > > > Signed-off-by: Biwen Li 
> > > > > > > > ---
> > > > > > > > Change in v3:
> > > > > > > > - rename property name
> > > > > > > >   fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > > > > > >
> > > > > > > > Change in v2:
> > > > > > > > - update desc of the property 'fsl,rcpm-scfg'
> > > > > > > >
> > > > > > > >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > > > > > ++
> > > > > > > >  1 file changed, 14 insertions(+)
> > > > > > > >
> > > > > > > > diff --git
> > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > index 5a33619d881d..157dcf6da17c 100644
> > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > > > @@ -34,6 +34,11 @@ Chassis Version  Example
> > Chips
> > > > > > > >  Optional properties:
> > > > > > > >   - little-endian : RCPM register block is Little Endian.
> > > > > > > > Without it
> > > RCPM
> > > > > > > > will be Big Endian (default case).
> > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC
> > > > > > > > + LS1021A,
> > > > > > >
> > > > > > > You probably should mention this is related to a hardware
> > > > > > > issue on LS1021a and only needed on LS1021a.
> > > > > > Okay, got it, thanks, I will add this in v4.
> > > > > > >
> > > > > > > > +   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such
> as:
> > > > > > > > +   #fsl,rcpm-wakeup-cells equal to 2, then must include 2
> > > > > > > > + +
> > > > > > > > + 1
> > > entries).
> > > > > > >
> > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers
> > > > > > > on an
> > > SoC.
> > > > > > > However you are defining an offset to scfg registers here.
> > > > > > > Why these two are related?  The length here should actually
> > > > > > > be related to the #address-cells of the soc/.  But since
> > > > > > > this is only needed for LS1021, you can
> > > > > > just make it 3.
> > > > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0
> > > > > > device node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > > > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for
> > > IPPDEXPCR1).
> > > > > > But because of the hardware issue on LS1021A, I need store the
> > > > > > value of IPPDEXPCR registers to an alt address. So I defining
> > > > > > an offset to scfg registers, then RCPM driver get an abosolute
> > > > > > address from offset, RCPM driver write the value of IPPDEXPCR
> > > > > > registers to these abosolute addresses(backup the value of
> > > > > > IPPDEXPCR
> > > registers).
> > > > >
> > > > > I understand what you are trying to do.  The problem is that the
> > > > > new fsl,ippdexpcr-alt-addr property contains a phandle and an offset.
> > > > > The size of it shouldn't be related to #fsl,rcpm-wakeup-cells.
> > > > You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/*
> > > > SCFG_SPARECR8 */
> > >
> > > No.  The #address-cell for the soc/ is 2, so the offset to scfg
> > > should be 0x0 0x51c.  The total size should be 3, but it shouldn't
> > > be coming from #fsl,rcpm-wakeup-cells like you mentioned in the binding.
> > Oh, I got it. You want that fsl,ippdexpcr-alt-add 

RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> > > > > >
> > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an
> > > > > > errata
> > > > > > A-008646 on LS1021A
> > > > > >
> > > > > > Signed-off-by: Biwen Li 
> > > > > > ---
> > > > > > Change in v3:
> > > > > > - rename property name
> > > > > >   fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > > > >
> > > > > > Change in v2:
> > > > > > - update desc of the property 'fsl,rcpm-scfg'
> > > > > >
> > > > > >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > > > ++
> > > > > >  1 file changed, 14 insertions(+)
> > > > > >
> > > > > > diff --git
> > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > index 5a33619d881d..157dcf6da17c 100644
> > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > @@ -34,6 +34,11 @@ Chassis Version  Example Chips
> > > > > >  Optional properties:
> > > > > >   - little-endian : RCPM register block is Little Endian. Without it
> RCPM
> > > > > > will be Big Endian (default case).
> > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC
> > > > > > + LS1021A,
> > > > >
> > > > > You probably should mention this is related to a hardware issue
> > > > > on LS1021a and only needed on LS1021a.
> > > > Okay, got it, thanks, I will add this in v4.
> > > > >
> > > > > > +   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > > > > > +   #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1
> entries).
> > > > >
> > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an
> SoC.
> > > > > However you are defining an offset to scfg registers here.  Why
> > > > > these two are related?  The length here should actually be
> > > > > related to the #address-cells of the soc/.  But since this is
> > > > > only needed for LS1021, you can
> > > > just make it 3.
> > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device
> > > > node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for
> IPPDEXPCR1).
> > > > But because of the hardware issue on LS1021A, I need store the
> > > > value of IPPDEXPCR registers to an alt address. So I defining an
> > > > offset to scfg registers, then RCPM driver get an abosolute
> > > > address from offset, RCPM driver write the value of IPPDEXPCR
> > > > registers to these abosolute addresses(backup the value of IPPDEXPCR
> registers).
> > >
> > > I understand what you are trying to do.  The problem is that the new
> > > fsl,ippdexpcr-alt-addr property contains a phandle and an offset.
> > > The size of it shouldn't be related to #fsl,rcpm-wakeup-cells.
> > You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/*
> > SCFG_SPARECR8 */
> 
> No.  The #address-cell for the soc/ is 2, so the offset to scfg should be 0x0
> 0x51c.  The total size should be 3, but it shouldn't be coming from
> #fsl,rcpm-wakeup-cells like you mentioned in the binding.
Oh, I got it. You want that fsl,ippdexpcr-alt-add is relative with 
#address-cells instead of #fsl,rcpm-wakeup-cells.
> 
> > >
> > > > >
> > > > > > +   The first entry must be a link to the SCFG device node.
> > > > > > +   The non-first entry must be offset of registers of SCFG.
> > > > > >
> > > > > >  Example:
> > > > > >  The RCPM node for T4240:
> > > > > > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > > > > > #fsl,rcpm-wakeup-cells = <2>;
> > > > > > };
> > > > > >
> > > > > > +The RCPM node for LS1021A:
> > > > > > +   rcpm: rcpm@1ee2140 {
> > > > > > +   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-
> > 2.1+";
> > > > > > +   reg = <0x0 0x1ee2140 0x0 0x8>;
> > > > > > +   #fsl,rcpm-wakeup-cells = <2>;
> > > > > > +   fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > > > > > SCFG_SPARECR8 */
> > > > > > +   };
> > > > > > +
> > > > > > +
> > > > > >  * Freescale RCPM Wakeup Source Device Tree Bindings
> > > > > >  ---
> > > > > >  Required fsl,rcpm-wakeup property should be added to a device
> > > > > > node if the device
> > > > > > --
> > > > > > 2.17.1

RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> > > >
> > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata
> > > > A-008646 on LS1021A
> > > >
> > > > Signed-off-by: Biwen Li 
> > > > ---
> > > > Change in v3:
> > > > - rename property name
> > > >   fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > >
> > > > Change in v2:
> > > > - update desc of the property 'fsl,rcpm-scfg'
> > > >
> > > >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > ++
> > > >  1 file changed, 14 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > index 5a33619d881d..157dcf6da17c 100644
> > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > @@ -34,6 +34,11 @@ Chassis Version  Example Chips
> > > >  Optional properties:
> > > >   - little-endian : RCPM register block is Little Endian. Without it 
> > > > RCPM
> > > > will be Big Endian (default case).
> > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC
> > > > + LS1021A,
> > >
> > > You probably should mention this is related to a hardware issue on
> > > LS1021a and only needed on LS1021a.
> > Okay, got it, thanks, I will add this in v4.
> > >
> > > > +   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > > > +   #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
> > >
> > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an SoC.
> > > However you are defining an offset to scfg registers here.  Why
> > > these two are related?  The length here should actually be related
> > > to the #address-cells of the soc/.  But since this is only needed
> > > for LS1021, you can
> > just make it 3.
> > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device
> > node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for IPPDEXPCR1).
> > But because of the hardware issue on LS1021A, I need store the value
> > of IPPDEXPCR registers to an alt address. So I defining an offset to
> > scfg registers, then RCPM driver get an abosolute address from offset,
> > RCPM driver write the value of IPPDEXPCR registers to these abosolute
> > addresses(backup the value of IPPDEXPCR registers).
> 
> I understand what you are trying to do.  The problem is that the new
> fsl,ippdexpcr-alt-addr property contains a phandle and an offset.  The size
> of it shouldn't be related to #fsl,rcpm-wakeup-cells.
You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/* SCFG_SPARECR8 */
> 
> > >
> > > > +   The first entry must be a link to the SCFG device node.
> > > > +   The non-first entry must be offset of registers of SCFG.
> > > >
> > > >  Example:
> > > >  The RCPM node for T4240:
> > > > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > > > #fsl,rcpm-wakeup-cells = <2>;
> > > > };
> > > >
> > > > +The RCPM node for LS1021A:
> > > > +   rcpm: rcpm@1ee2140 {
> > > > +   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
> > > > +   reg = <0x0 0x1ee2140 0x0 0x8>;
> > > > +   #fsl,rcpm-wakeup-cells = <2>;
> > > > +   fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > > > SCFG_SPARECR8 */
> > > > +   };
> > > > +
> > > > +
> > > >  * Freescale RCPM Wakeup Source Device Tree Bindings
> > > >  ---
> > > >  Required fsl,rcpm-wakeup property should be added to a device
> > > > node if the device
> > > > --
> > > > 2.17.1

RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

> >
> > The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata
> > A-008646 on LS1021A
> >
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v3:
> > - rename property name
> >   fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> >
> > Change in v2:
> > - update desc of the property 'fsl,rcpm-scfg'
> >
> >  Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > ++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > index 5a33619d881d..157dcf6da17c 100644
> > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -34,6 +34,11 @@ Chassis Version  Example Chips
> >  Optional properties:
> >   - little-endian : RCPM register block is Little Endian. Without it RCPM
> > will be Big Endian (default case).
> > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC LS1021A,
> 
> You probably should mention this is related to a hardware issue on LS1021a
> and only needed on LS1021a.
Okay, got it, thanks, I will add this in v4.
> 
> > +   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > +   #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
> 
> #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an SoC.
> However you are defining an offset to scfg registers here.  Why these two
> are related?  The length here should actually be related to the #address-cells
> of the soc/.  But since this is only needed for LS1021, you can just make it 
> 3.
I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device 
node(fsl,rcpm-wakeup = < 0x0 0x2000>;
0x0 is a value for IPPDEXPCR0, 0x2000 is a value for IPPDEXPCR1).
But because of the hardware issue on LS1021A, I need store the value of 
IPPDEXPCR registers
to an alt address. So I defining an offset to scfg registers, then RCPM driver 
get an abosolute address from offset,
 RCPM driver write the value of IPPDEXPCR registers to these abosolute 
addresses(backup the value of IPPDEXPCR registers).
> 
> > +   The first entry must be a link to the SCFG device node.
> > +   The non-first entry must be offset of registers of SCFG.
> >
> >  Example:
> >  The RCPM node for T4240:
> > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > #fsl,rcpm-wakeup-cells = <2>;
> > };
> >
> > +The RCPM node for LS1021A:
> > +   rcpm: rcpm@1ee2140 {
> > +   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
> > +   reg = <0x0 0x1ee2140 0x0 0x8>;
> > +   #fsl,rcpm-wakeup-cells = <2>;
> > +   fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > SCFG_SPARECR8 */
> > +   };
> > +
> > +
> >  * Freescale RCPM Wakeup Source Device Tree Bindings
> >  ---
> >  Required fsl,rcpm-wakeup property should be added to a device node if
> > the device
> > --
> > 2.17.1

[v3,2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep

[Biwen Li]

The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.

Signed-off-by: Biwen Li 
---
Change in v3:
- update property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
  
Change in v2:
- None
 
 arch/arm/boot/dts/ls1021a.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..383b2dcd5720 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,6 +1000,7 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+   fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /* 
SCFG_SPARECR8 */
};
 
ftm_alarm0: timer0@29d {
-- 
2.17.1

[v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property

[Biwen Li]

The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata A-008646
on LS1021A

Signed-off-by: Biwen Li 
---
Change in v3:
- rename property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr

Change in v2:
- update desc of the property 'fsl,rcpm-scfg'

 Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..157dcf6da17c 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,11 @@ Chassis Version  Example Chips
 Optional properties:
  - little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr-alt-addr : Must add the property for SoC LS1021A,
+   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
+   #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
+   The first entry must be a link to the SCFG device node.
+   The non-first entry must be offset of registers of SCFG.
 
 Example:
 The RCPM node for T4240:
@@ -43,6 +48,15 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
 
+The RCPM node for LS1021A:
+   rcpm: rcpm@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+   fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+   };
+
+
 * Freescale RCPM Wakeup Source Device Tree Bindings
 ---
 Required fsl,rcpm-wakeup property should be added to a device node if the 
device
-- 
2.17.1

[v3,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A

[Biwen Li]

Description:
- Reading configuration register RCPM_IPPDEXPCR1
  always return zero

Workaround:
- Save register RCPM_IPPDEXPCR1's value to
  register SCFG_SPARECR8.(uboot's psci also
  need reading value from the register SCFG_SPARECR8
  to set register RCPM_IPPDEXPCR1)

Impact:
- FlexTimer module will cannot wakeup system in
  deep sleep on SoC LS1021A

Signed-off-by: Biwen Li 
---
Change in v3:
- update commit message
- rename property name
  fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr

Change in v2:
- fix stype problems

 drivers/soc/fsl/rcpm.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..7f42b17d3f29 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define RCPM_WAKEUP_CELL_MAX_SIZE  7
 
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+   struct regmap * scfg_addr_regmap = NULL;
+   u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+   u32 reg_value = 0;
 
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,22 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base + 
i * 4);
}
+   /* Workaround of errata A-008646 on SoC 
LS1021A: There is a bug of
+* register ippdexpcr1. Reading configuration 
register RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's 
value to register SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read 
from SCFG_SPARECR8.
+*/
+   scfg_addr_regmap = 
syscon_regmap_lookup_by_phandle(np, "fsl,ippdexpcr-alt-addr");
+   if (scfg_addr_regmap) {
+   if 
(of_property_read_u32_array(dev->of_node,
+   "fsl,ippdexpcr-alt-addr", 
reg_offset, rcpm->wakeup_cells + 1)) {
+   scfg_addr_regmap = NULL;
+   continue;
+   }
+   regmap_read(scfg_addr_regmap, 
reg_offset[i + 1], _value);
+   /* Write value to register 
SCFG_SPARECR8 */
+   regmap_write(scfg_addr_regmap, 
reg_offset[i + 1], tmp | reg_value);
+   }
}
}
} while (ws = wakeup_source_get_next(ws));
-- 
2.17.1

[v5,2/2] rtc: pcf85263/pcf85363: support PM, wakeup device, improve performance

[Biwen Li]

Add some features as follow:
- Set quartz oscillator load capacitance by DT
  (generate more accuracy frequency)
- Set quartz oscillator drive control by DT
  (reduce/increase the current consumption)
- Set low jitter mode by DT
  (improve jitter performance)
- Set wakeup source by DT
  (wakeup device from suspend
- Select interrupt output pin by DT
  (INTA/TS(INTB))
- Select interrupt type by DT
- Add power management
- Add ioctl to check rtc status
  (check whether oscillator of pcf85263/pcf85363 is stopped)

Datasheet url:
- https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf
- https://www.nxp.com/docs/en/data-sheet/PCF85363A.pdf

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v5:
- Replace nxp,quartz-drive-strength
  with quartz-drive-strength-ohms
- Select ohm unit for quartz drive strength

Change in v4:
- Add nxp,rtc-interrupt-type property
- Interrupt output pin Cooperate with interrupt type

Change in v3:
- Fix compilation error

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Set default interrupt-output-pin as "INTA"

 drivers/rtc/rtc-pcf85363.c | 372 ++---
 1 file changed, 349 insertions(+), 23 deletions(-)

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index 3450d615974d..4240c6b57875 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -18,6 +18,16 @@
 #include 
 #include 
 
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_NORMAL0
+#define PCF85363_QUARTZDRIVE_LOW   1
+#define PCF85363_QUARTZDRIVE_HIGH  2
+
 /*
  * Date/Time registers
  */
@@ -96,10 +106,20 @@
 #define FLAGS_PIF  BIT(7)
 
 #define PIN_IO_INTAPM  GENMASK(1, 0)
-#define PIN_IO_INTA_CLK0
-#define PIN_IO_INTA_BAT1
-#define PIN_IO_INTA_OUT2
-#define PIN_IO_INTA_HIZ3
+#define PIN_IO_INTAPM_SHIFT0
+#define PIN_IO_INTA_CLK(0 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_BAT(1 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_OUT(2 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_HIZ(3 << PIN_IO_INTAPM_SHIFT)
+
+#define PIN_IO_TSPM GENMASK(3, 2)
+#define PIN_IO_TSPM_SHIFT  2
+#define PIN_IO_TS_DISABLE  (0x0 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_INTB_OUT (0x1 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_CLK_OUT  (0x2 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_IN   (0x3 << PIN_IO_TSPM_SHIFT)
+
+#define PIN_IO_CLKPM   BIT(7) /* 0 = enable CLK pin,1 = disable CLK pin */
 
 #define STOP_EN_STOP   BIT(0)
 
@@ -107,9 +127,35 @@
 
 #define NVRAM_SIZE 0x40
 
+#define DT_SECS_OS BIT(7)
+
+#define CTRL_OSCILLATOR_CL_MASKGENMASK(1, 0)
+#define CTRL_OSCILLATOR_CL_SHIFT   0
+#define CTRL_OSCILLATOR_OSCD_MASK  GENMASK(3, 2)
+#define CTRL_OSCILLATOR_OSCD_SHIFT 2
+#define CTRL_OSCILLATOR_LOWJ   BIT(4)
+
+#define CTRL_FUNCTION_COF_OFF  0x7 /* No clock output */
+
+enum pcf85363_irqpin {
+   IRQPIN_INTA,
+   IRQPIN_INTB,
+   IRQPIN_MAX,
+};
+
+static const char *const pcf85363_irqpin_names[] = {
+   [IRQPIN_INTA] = "INTA",
+   [IRQPIN_INTB] = "INTB",
+   [IRQPIN_MAX] = "",
+};
+
+
 struct pcf85363 {
+   struct device *dev;
struct rtc_device   *rtc;
struct regmap   *regmap;
+   int irq;
+   u8 irq_type[IRQPIN_MAX];
 };
 
 struct pcf85x63_config {
@@ -205,26 +251,60 @@ static int pcf85363_rtc_read_alarm(struct device *dev, 
struct rtc_wkalrm *alrm)
return 0;
 }
 
-static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
- int enabled)
+static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363,
+ unsigned int enabled,
+ int irq_pin)
 {
-   unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
+   unsigned int alarm1_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
   ALRM_DAY_A1E | ALRM_MON_A1E;
-   int ret;
+   unsigned int alarm2_flags = ALRM_MIN_A2E | ALRM_HR_A2E | ALRM_DAY_A2E;
+   unsigned int alarm_flags = 0;
+   int ret, reg;
+   u8 reg_val = 0, ctrl_flags = FLAGS_A1F;
+
+   if (pcf85363->irq_type[irq_pin] & INT_A1IE) {
+   alarm_flags = alarm1_flags;
+   ctrl_flags = FLAGS_A1F;
+   }
 
+   if (pcf85363->irq_type[irq_pin] & INT_A2IE

[v5,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

Add some properties for pcf85263/pcf85363 as follows:
  - nxp,rtc-interrupt-type: integer type
  - nxp,rtc-interrupt-output-pin: string type
  - quartz-load-femtofarads: integer type
  - quartz-drive-strength-ohms: integer type
  - nxp,quartz-low-jitter: bool type
  - wakeup-source: bool type

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v5:
- Replace nxp,quartz-drive-strength with
  quartz-drive-strength-ohms
- Select ohm unit for quartz drive strength

Change in v4:
- Drop robust defines in include/dt-bindings/rtc/pcf85363.h
- Add nxp,rtc-interrupt-type property
- Replace interrupt-output-pin with nxp,rtc-interrupt-output-pin

Change in v3:
- None

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Replace drive strength name
  PCF85263_QUARTZDRIVE_NORMAL -> PCF85263_QUARTZDRIVE_100ko
  PCF85263_QUARTZDRIVE_LOW -> PCF85263_QUARTZDRIVE_60ko
  PCF85263_QUARTZDRIVE_HIGH -> PCF85263_QUARTZDRIVE_500ko
- Set default interrupt-output-pin as "INTA"

 .../devicetree/bindings/rtc/pcf85363.txt  | 44 ++-
 include/dt-bindings/rtc/pcf85363.h| 14 ++
 2 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/rtc/pcf85363.h

diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt 
b/Documentation/devicetree/bindings/rtc/pcf85363.txt
index 94adc1cf93d9..7f907581d5db 100644
--- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
+++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
@@ -8,10 +8,52 @@ Required properties:
 Optional properties:
 - interrupts: IRQ line for the RTC (not implemented).
 
+- nxp,rtc-interrupt-type: integer property, represent the interrupt's
+  type. Valid values are
+  INT_PIE(periodic interrupt enable),
+  INT_OIE(offset correction interrupt enable),
+  INT_A1IE(alarm1 interrupt enable),
+  INT_A2IE(alarm2 interrupt enable),
+  INT_TSRIE(timestamp register interrupt enable)
+  INT_BSIE(battery switch interrupt enable),
+  INT_WDIE(WatchDog interrupt enable,and
+  compose these values such as: INT_A1IE | INT_A2IE,
+  but currently only support INT_A1IE, default value is INT_A1IE.
+  The property and property nxp,rtc-interrupt-output-pin
+  work together to generate some interrupts on some pins.
+
+- nxp,rtc-interrupt-output-pin: The interrupt output pin must be
+  "INTA" or "INTB", default value is "INTA". The property and property
+  nxp,rtc-interrupt-type work together to generate some interrupts on
+  some pins.
+
+- quartz-load-femtofarads: The internal capacitor to select for the quartz,
+  expressed in femto Farad (fF). Valid values are 6000, 7000 and 12500.
+  Default value is 12500fF.
+
+- quartz-drive-strength-ohms: Drive strength for the quartz,
+  expressed in ohm, Valid values are 6, 10 and 50.
+  Default value is 10 ohm.
+
+- nxp,quartz-low-jitter: Boolean property, if present enables low jitter mode
+  which reduces jitter at the cost of increased power consumption.
+
+- wakeup-source: Boolean property, Please refer to
+  Documentation/devicetree/bindings/power/wakeup-source.txt
+
 Example:
 
 pcf85363: pcf85363@51 {
compatible = "nxp,pcf85363";
reg = <0x51>;
-};
 
+   interrupt-parent = <>;
+   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+   wakeup-source;
+   nxp,rtc-interrupt-output-pin = "INTA";
+   nxp,rtc-interrupt-type = ;
+   quartz-load-femtofarads = <12500>;
+   quartz-drive-strength-ohms = <6>;
+   nxp,quartz-low-jitter;
+};
diff --git a/include/dt-bindings/rtc/pcf85363.h 
b/include/dt-bindings/rtc/pcf85363.h
new file mode 100644
index ..6340bf2da8f5
--- /dev/null
+++ b/include/dt-bindings/rtc/pcf85363.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_RTC_PCF85363_H
+#define _DT_BINDINGS_RTC_PCF85363_H
+
+/* Interrupt type */
+#define INT_WDIE   (1 << 0)
+#define INT_BSIE   (1 << 1)
+#define INT_TSRIE  (1 << 2)
+#define INT_A2IE   (1 << 3)
+#define INT_A1IE   (1 << 4)
+#define INT_OIE(1 << 5)
+#define INT_PIE(1 << 6)
+
+#endif /* _DT_BINDINGS_RTC_PCF85363_H */
-- 
2.17.1

RE: [EXT] Re: [v4,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> 
> Caution: EXT Email
> 
> On 10/09/2019 18:42:46+0800, Biwen Li wrote:
> > Add some properties for pcf85263/pcf85363 as follows:
> >   - nxp,rtc-interrupt-type: integer type
> >   - nxp,rtc-interrupt-output-pin: string type
> >   - quartz-load-femtofarads: integer type
> >   - nxp,quartz-drive-strength: integer type
> >   - nxp,quartz-low-jitter: bool type
> >   - wakeup-source: bool type
> >
> > Signed-off-by: Martin Fuzzey 
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v4:
> >   - Drop robust defines in include/dt-bindings/rtc/pcf85363.h
> >   - Add nxp,rtc-interrupt-type property
> >   - Replace interrupt-output-pin with nxp,rtc-interrupt-output-pin
> >
> > Change in v3:
> >   - None
> >
> > Change in v2:
> >   - Replace properties name
> > quartz-load-capacitance -> quartz-load-femtofarads
> > quartz-drive-strength -> nxp,quartz-drive-strength
> > quartz-low-jitter -> nxp,quartz-low-jitter
> >   - Replace drive strength name
> > PCF85263_QUARTZDRIVE_NORMAL ->
> PCF85263_QUARTZDRIVE_100ko
> > PCF85263_QUARTZDRIVE_LOW ->
> PCF85263_QUARTZDRIVE_60ko
> > PCF85263_QUARTZDRIVE_HIGH ->
> PCF85263_QUARTZDRIVE_500ko
> >   - Set default interrupt-output-pin as "INTA"
> >
> >  .../devicetree/bindings/rtc/pcf85363.txt  | 44
> ++-
> >  include/dt-bindings/rtc/pcf85363.h| 14 ++
> >  2 files changed, 57 insertions(+), 1 deletion(-)  create mode 100644
> > include/dt-bindings/rtc/pcf85363.h
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > index 94adc1cf93d9..fc1579463657 100644
> > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > @@ -8,10 +8,52 @@ Required properties:
> >  Optional properties:
> >  - interrupts: IRQ line for the RTC (not implemented).
> >
> > +- nxp,rtc-interrupt-type: integer property, represent the interrupt's
> > +  type. Valid values are
> > +  INT_PIE(periodic interrupt enable),
> > +  INT_OIE(offset correction interrupt enable),
> > +  INT_A1IE(alarm1 interrupt enable),
> > +  INT_A2IE(alarm2 interrupt enable),
> > +  INT_TSRIE(timestamp register interrupt enable)
> > +  INT_BSIE(battery switch interrupt enable),
> > +  INT_WDIE(WatchDog interrupt enable,and
> > +  compose these values such as: INT_A1IE | INT_A2IE,
> > +  but currently only support INT_A1IE, default value is INT_A1IE.
> > +  The property and property nxp,rtc-interrupt-output-pin
> > +  work together to generate some interrupts on some pins.
> > +
> > +- nxp,rtc-interrupt-output-pin: The interrupt output pin must be
> > +  "INTA" or "INTB", default value is "INTA". The property and
> > +property
> > +  nxp,rtc-interrupt-type work together to generate some interrupts on
> > +  some pins.
> > +
> 
> This binding still doesn't work because there may be any combination of
> interrupts on any of the two pins that this binding doesn't allow.
Combination of interrupt maybe need users to select.So it is flexibity. 
> 
> > +- quartz-load-femtofarads: The internal capacitor to select for the
> > +quartz,
> > +  expressed in femto Farad (fF). Valid values are 6000, 7000 and 12500.
> > +  Default value is 12500fF.
> > +
> > +- nxp,quartz-drive-strength: Drive strength for the quartz,
> > +  expressed in kilo ohms (kOhm) Valid values are 60, 100 and 500.
> > +  Default value is 100kOhm.
> > +
> 
> It makes more sense to have quartz-drive-strength-ohms as a generic
> property.
Got it, thanks
> 
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbootl
> in.comdata=02%7C01%7Cbiwen.li%40nxp.com%7C34fc927717674d
> 73cd8d08d73b4b577a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7
> C0%7C637043067081363670sdata=SXAXKb5qQMf4eXJNB46CGdvh
> oA%2F%2BG2r26yYaC2tEGX0%3Dreserved=0

RE: [EXT] Re: [PATCH] devicetree: property-units: Add kohms unit

[Biwen Li]

> 
> Caution: EXT Email
> 
> Hi Biwen,
> 
> On Tue, Sep 17, 2019 at 10:09 AM Biwen Li  wrote:
> > The patch adds kohms unit
> >
> > Signed-off-by: Biwen Li 
> 
> Thanks for your patch!
> 
> > --- a/Documentation/devicetree/bindings/property-units.txt
> > +++ b/Documentation/devicetree/bindings/property-units.txt
> > @@ -27,6 +27,7 @@ Electricity
> >  -microamp  : microampere
> >  -microamp-hours : microampere hour
> >  -ohms  : ohm
> > +-kohms : kiloohm
> >  -micro-ohms: microohm
> >  -microwatt-hours: microwatt hour
> >  -microvolt : microvolt
> 
> What's your rationale for adding "kohms"?
> Do you need to specify resistance values that do not fit in 32-bit, and thus
32-bit is enough, I have three values, 60 kohm, 100 kohm and 500 kohm
> cannot be specified using "ohms"?
If replace with ohms, the value is as follows:
6 ohm, 10 ohm, 50 ohm.
It's so long for everyone.

> 
> Gr{oetje,eeting}s,
> 
> Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But 
> when
> I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds

RE: [EXT] Re: [v4,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> 
> Caution: EXT Email
> 
> On Tue, Sep 10, 2019 at 5:53 AM Biwen Li  wrote:
> >
> > Add some properties for pcf85263/pcf85363 as follows:
> >   - nxp,rtc-interrupt-type: integer type
> >   - nxp,rtc-interrupt-output-pin: string type
> >   - quartz-load-femtofarads: integer type
> >   - nxp,quartz-drive-strength: integer type
> >   - nxp,quartz-low-jitter: bool type
> >   - wakeup-source: bool type
> >
> > Signed-off-by: Martin Fuzzey 
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v4:
> > - Drop robust defines in include/dt-bindings/rtc/pcf85363.h
> > - Add nxp,rtc-interrupt-type property
> > - Replace interrupt-output-pin with
> > nxp,rtc-interrupt-output-pin
> >
> > Change in v3:
> > - None
> >
> > Change in v2:
> > - Replace properties name
> >   quartz-load-capacitance -> quartz-load-femtofarads
> >   quartz-drive-strength -> nxp,quartz-drive-strength
> >   quartz-low-jitter -> nxp,quartz-low-jitter
> > - Replace drive strength name
> >   PCF85263_QUARTZDRIVE_NORMAL ->
> PCF85263_QUARTZDRIVE_100ko
> >   PCF85263_QUARTZDRIVE_LOW ->
> PCF85263_QUARTZDRIVE_60ko
> >   PCF85263_QUARTZDRIVE_HIGH ->
> PCF85263_QUARTZDRIVE_500ko
> > - Set default interrupt-output-pin as "INTA"
> >
> >  .../devicetree/bindings/rtc/pcf85363.txt  | 44 ++-
> >  include/dt-bindings/rtc/pcf85363.h| 14 ++
> >  2 files changed, 57 insertions(+), 1 deletion(-)  create mode 100644
> > include/dt-bindings/rtc/pcf85363.h
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > index 94adc1cf93d9..fc1579463657 100644
> > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > @@ -8,10 +8,52 @@ Required properties:
> >  Optional properties:
> >  - interrupts: IRQ line for the RTC (not implemented).
> >
> > +- nxp,rtc-interrupt-type: integer property, represent the interrupt's
> > +  type. Valid values are
> > +  INT_PIE(periodic interrupt enable),
> > +  INT_OIE(offset correction interrupt enable),
> > +  INT_A1IE(alarm1 interrupt enable),
> > +  INT_A2IE(alarm2 interrupt enable),
> > +  INT_TSRIE(timestamp register interrupt enable)
> > +  INT_BSIE(battery switch interrupt enable),
> > +  INT_WDIE(WatchDog interrupt enable,and
> > +  compose these values such as: INT_A1IE | INT_A2IE,
> > +  but currently only support INT_A1IE, default value is INT_A1IE.
> > +  The property and property nxp,rtc-interrupt-output-pin
> > +  work together to generate some interrupts on some pins.
> > +
> > +- nxp,rtc-interrupt-output-pin: The interrupt output pin must be
> > +  "INTA" or "INTB", default value is "INTA". The property and
> > +property
> > +  nxp,rtc-interrupt-type work together to generate some interrupts on
> > +  some pins.
> > +
> > +- quartz-load-femtofarads: The internal capacitor to select for the
> > +quartz,
> > +  expressed in femto Farad (fF). Valid values are 6000, 7000 and 12500.
> > +  Default value is 12500fF.
> > +
> > +- nxp,quartz-drive-strength: Drive strength for the quartz,
> > +  expressed in kilo ohms (kOhm) Valid values are 60, 100 and 500.
> > +  Default value is 100kOhm.
> 
> This needs a unit as defined in property-units.txt.
Ok, got it, I will replace it with nxp,quartz-drive-strength-kohms in v5.
I added a new unit 'kohms' to property-units.txt,
please review the patch http://patchwork.ozlabs.org/patch/1163214/ ,
thanks.

Best Regards,
Biwen Li
> 
> > +
> > +- nxp,quartz-low-jitter: Boolean property, if present enables low
> > +jitter mode
> > +  which reduces jitter at the cost of increased power consumption.
> > +
> > +- wakeup-source: Boolean property, Please refer to
> > +  Documentation/devicetree/bindings/power/wakeup-source.txt
> > +
> >  Example:
> >
> >  pcf85363: pcf85363@51 {
> > compatible = "nxp,pcf85363";
> > reg = <0x51>;
> > -};
> >
> > +   interrupt-parent = <>;
> > +   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
> > +
> > +   wakeup-source;
> > +   nxp,rtc-interrupt-output-pin = "INTA";
> > +   nxp,rtc-interrupt-type = ;
> > +   quartz-load-femtofarads = <12500>;
> > +  

[PATCH] devicetree: property-units: Add kohms unit

[Biwen Li]

The patch adds kohms unit

Signed-off-by: Biwen Li 
---
 Documentation/devicetree/bindings/property-units.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/property-units.txt 
b/Documentation/devicetree/bindings/property-units.txt
index e9b8360b3288..97feb8995d1f 100644
--- a/Documentation/devicetree/bindings/property-units.txt
+++ b/Documentation/devicetree/bindings/property-units.txt
@@ -27,6 +27,7 @@ Electricity
 -microamp  : microampere
 -microamp-hours : microampere hour
 -ohms  : ohm
+-kohms : kiloohm
 -micro-ohms: microohm
 -microwatt-hours: microwatt hour
 -microvolt : microvolt
-- 
2.17.1

RE: [v2,1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A

[Biwen Li]

Hi all,
the linux patches depended by RCPM driver,FlexTimer driver and 
FlexTimer dts, need apply these patches as follows:

1. RCPM driver:

https://patchwork.kernel.org/series/162731/mbox/ 
(https://patchwork.kernel.org/patch/11105279/)

2. FlexTimer dts:

https://lore.kernel.org/patchwork/series/405653/mbox/ 
(https://lore.kernel.org/patchwork/patch/1112493/)

3. FlexTimer driver:

https://patchwork.ozlabs.org/series/124718/mbox/ 
(https://patchwork.ozlabs.org/patch/1145999/)

https://patchwork.ozlabs.org/series/126942/mbox/ 
(https://patchwork.ozlabs.org/patch/1152085/)

4. Adjust drivers/soc/fsl/Makefile:

remove the line 'obj-y += ftm_alarm.o' in 
drivers/soc/fsl/Makefile to resolve a compilation error

> Why:
> - Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
>   Register RCPM_IPPDEXPCR1's default value is zero.
>   So the register value that reading from register
>   RCPM_IPPDEXPCR1 is always zero.
> 
> How:
> - Save register RCPM_IPPDEXPCR1's value to
>   register SCFG_SPARECR8.(uboot's psci also
>   need reading value from the register SCFG_SPARECR8
>   to set register RCPM_IPPDEXPCR1)
> 
> Signed-off-by: Biwen Li 
> ---
> Change in v2:
>   - fix stype problems
> 
>  drivers/soc/fsl/rcpm.c | 27 +++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..0b710c24999c 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
> 
>  #define RCPM_WAKEUP_CELL_MAX_SIZE7
> 
> @@ -63,6 +65,31 @@ static int rcpm_pm_prepare(struct device *dev)
>   tmp |= value[i + 1];
>   iowrite32be(tmp, rcpm->ippdexpcr_base + 
> i * 4);
>   }
> + #ifdef CONFIG_SOC_LS1021A
> + /* Workaround: There is a bug of register 
> ippdexpcr1,
> +  * cannot write it but can read it.Tt's default 
> value is zero,
> +  * then read it will always returns zero.
> +  * So save ippdexpcr1's value to register 
> SCFG_SPARECR8.
> +  * And the value of ippdexpcr1 will be read from
> SCFG_SPARECR8.
> +  */
> + {
> + struct regmap *rcpm_scfg_regmap = NULL;
> + u32 
> reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
> +
> + rcpm_scfg_regmap =
> syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
> + if (rcpm_scfg_regmap) {
> + if 
> (of_property_read_u32_array(dev->of_node,
> + "fsl,rcpm-scfg", reg_offset,
> rcpm->wakeup_cells + 1)) {
> + rcpm_scfg_regmap = NULL;
> + continue;
> + }
> + regmap_read(rcpm_scfg_regmap, 
> reg_offset[i + 1],
> _value);
> + /* Write value to register 
> SCFG_SPARECR8 */
> + regmap_write(rcpm_scfg_regmap, 
> reg_offset[i +
> 1], tmp | reg_value);
> + }
> + }
> + #endif //CONFIG_SOC_LS1021A
>   }
>   }
>   } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1

[v2,3/3] Documentation: dt: binding: fsl: Add 'fsl,rcpm-scfg' property

[Biwen Li]

The 'fsl,rcpm-scfg' property is used to fix a bug
that FlexTimer cannot wakeup system in deep sleep on LS1021A

Signed-off-by: Biwen Li 
---
Change in v2:
- update desc of the property 'fsl,rcpm-scfg'

 Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 13 +
 1 file changed, 13 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..f8dce247357a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,11 @@ Chassis Version  Example Chips
 Optional properties:
  - little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,rcpm-scfg : LS1021A has defect of failing to get data when
+   reading ippdexpcr. So add this property to help store one
+   copy to specified scfg_scrachpad_addr register for others
+   (such as U-Boot) reference. The first entry must be a link to the
+   SCFG device node, then followed by the offset of registers of SCFG.
 
 Example:
 The RCPM node for T4240:
@@ -43,6 +48,14 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
 
+The RCPM node for LS1021A:
+   rcpm: rcpm@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+   fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+   };
+
 * Freescale RCPM Wakeup Source Device Tree Bindings
 ---
 Required fsl,rcpm-wakeup property should be added to a device node if the 
device
-- 
2.17.1

[v2,1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A

[Biwen Li]

Why:
- Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
  Register RCPM_IPPDEXPCR1's default value is zero.
  So the register value that reading from register
  RCPM_IPPDEXPCR1 is always zero.

How:
- Save register RCPM_IPPDEXPCR1's value to
  register SCFG_SPARECR8.(uboot's psci also
  need reading value from the register SCFG_SPARECR8
  to set register RCPM_IPPDEXPCR1)

Signed-off-by: Biwen Li 
---
Change in v2:
- fix stype problems

 drivers/soc/fsl/rcpm.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..0b710c24999c 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define RCPM_WAKEUP_CELL_MAX_SIZE  7
 
@@ -63,6 +65,31 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base + 
i * 4);
}
+   #ifdef CONFIG_SOC_LS1021A
+   /* Workaround: There is a bug of register 
ippdexpcr1,
+* cannot write it but can read it.Tt's default 
value is zero,
+* then read it will always returns zero.
+* So save ippdexpcr1's value to register 
SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read 
from SCFG_SPARECR8.
+*/
+   {
+   struct regmap *rcpm_scfg_regmap = NULL;
+   u32 
reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+   u32 reg_value = 0;
+
+   rcpm_scfg_regmap = 
syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
+   if (rcpm_scfg_regmap) {
+   if 
(of_property_read_u32_array(dev->of_node,
+   "fsl,rcpm-scfg", 
reg_offset, rcpm->wakeup_cells + 1)) {
+   rcpm_scfg_regmap = NULL;
+   continue;
+   }
+   regmap_read(rcpm_scfg_regmap, 
reg_offset[i + 1], _value);
+   /* Write value to register 
SCFG_SPARECR8 */
+   regmap_write(rcpm_scfg_regmap, 
reg_offset[i + 1], tmp | reg_value);
+   }
+   }
+   #endif //CONFIG_SOC_LS1021A
}
}
} while (ws = wakeup_source_get_next(ws));
-- 
2.17.1

[v2,2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep

[Biwen Li]

The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.

Signed-off-by: Biwen Li 
---
Change in v2:
- None

 arch/arm/boot/dts/ls1021a.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..377bb4717584 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,12 +1000,13 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+   fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
};
 
ftm_alarm0: timer0@29d {
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d 0x0 0x1>;
-   fsl,rcpm-wakeup = < 0x0 0x2000>;
+   fsl,rcpm-wakeup = < 0x0 0x3000>; /* FlexTimer1 
and OCRAM1 are not powerdown during LPM20(sleep) */
interrupts = ;
big-endian;
};
-- 
2.17.1

RE: [1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A

[Biwen Li]

Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer 
dts, need apply these patches as follows:

1. RCPM driver:

https://patchwork.kernel.org/series/162731/mbox/ 
(https://patchwork.kernel.org/patch/11105279/)

2. FlexTimer dts:

https://lore.kernel.org/patchwork/series/405653/mbox/ 
(https://lore.kernel.org/patchwork/patch/1112493/)

3. FlexTimer driver:

https://patchwork.ozlabs.org/series/124718/mbox/ 
(https://patchwork.ozlabs.org/patch/1145999/)

https://patchwork.ozlabs.org/series/126942/mbox/ 
(https://patchwork.ozlabs.org/patch/1152085/)

4. Adjust drivers/soc/fsl/Makefile:

remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to resolve a 
compilation error 
> Why:
> - Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
>   Register RCPM_IPPDEXPCR1's default value is zero.
>   So the register value that reading from register
>   RCPM_IPPDEXPCR1 is always zero.
> 
> How:
> - Save register RCPM_IPPDEXPCR1's value to
>   register SCFG_SPARECR8.(uboot's psci also
>   need reading value from the register SCFG_SPARECR8
>   to set register RCPM_IPPDEXPCR1)
> 
> Signed-off-by: Biwen Li 
> ---
>  drivers/soc/fsl/rcpm.c | 29 +
>  1 file changed, 29 insertions(+)
> 
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..2bf37d38efe5 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
> 
>  #define RCPM_WAKEUP_CELL_MAX_SIZE7
> 
> @@ -63,6 +65,33 @@ static int rcpm_pm_prepare(struct device *dev)
>   tmp |= value[i + 1];
>   iowrite32be(tmp, rcpm->ippdexpcr_base + 
> i * 4);
>   }
> + #ifdef CONFIG_SOC_LS1021A
> + /* Workaround: There is a bug of register 
> ippdexpcr1,
> +  * cannot write it but can read it.Tt's default 
> value is zero,
> +  * then read it will always returns zero.
> +  * So save ippdexpcr1's value to register 
> SCFG_SPARECR8.
> +  * And the value of ippdexpcr1 will be read from
> SCFG_SPARECR8.
> +  */
> + {
> + struct regmap * rcpm_scfg_regmap = NULL;
> + u32 
> reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
> +
> + rcpm_scfg_regmap =
> syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
> + if (rcpm_scfg_regmap) {
> + if 
> (of_property_read_u32_array(dev->of_node,
> + "fsl,rcpm-scfg", reg_offset,
> rcpm->wakeup_cells + 1)) {
> + rcpm_scfg_regmap = NULL;
> + continue;
> + }
> + regmap_read(rcpm_scfg_regmap, 
> reg_offset[i + 1],
> _value);
> + /* Write value to register 
> SCFG_SPARECR8 */
> + regmap_write(rcpm_scfg_regmap, 
> reg_offset[i +
> 1], tmp | reg_value);
> + }
> + }
> + #endif
> +
> +
>   }
>   }
>   } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1

[3/3] Documentation: dt: binding: fsl: Add 'fsl,rcpm-scfg' property

[Biwen Li]

The 'fsl,rcpm-scfg' property is used to fix a bug
that FlexTimer cannot wakeup system in deep sleep on LS1021A

Signed-off-by: Biwen Li 
---
 .../devicetree/bindings/soc/fsl/rcpm.txt  | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt 
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..31e22f092b51 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,12 @@ Chassis Version  Example Chips
 Optional properties:
  - little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,rcpm-scfg : Must add the property for SoC LS1021A,
+   Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
+   #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
+   The first entry must be a link to the SCFG device node.
+   The non-first entry must be offset of registers of SCFG.
+   (Currently only support SoC LS1021A)
 
 Example:
 The RCPM node for T4240:
@@ -43,6 +49,15 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
 
+The RCPM node for LS1021A:
+   rcpm: rcpm@1ee2140 {
+   compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+   reg = <0x0 0x1ee2140 0x0 0x8>;
+   #fsl,rcpm-wakeup-cells = <2>;
+   fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+   };
+
+
 * Freescale RCPM Wakeup Source Device Tree Bindings
 ---
 Required fsl,rcpm-wakeup property should be added to a device node if the 
device
-- 
2.17.1

[1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A

[Biwen Li]

Why:
- Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
  Register RCPM_IPPDEXPCR1's default value is zero.
  So the register value that reading from register
  RCPM_IPPDEXPCR1 is always zero.

How:
- Save register RCPM_IPPDEXPCR1's value to
  register SCFG_SPARECR8.(uboot's psci also
  need reading value from the register SCFG_SPARECR8
  to set register RCPM_IPPDEXPCR1)

Signed-off-by: Biwen Li 
---
 drivers/soc/fsl/rcpm.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..2bf37d38efe5 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define RCPM_WAKEUP_CELL_MAX_SIZE  7
 
@@ -63,6 +65,33 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base + 
i * 4);
}
+   #ifdef CONFIG_SOC_LS1021A
+   /* Workaround: There is a bug of register 
ippdexpcr1,
+* cannot write it but can read it.Tt's default 
value is zero,
+* then read it will always returns zero.
+* So save ippdexpcr1's value to register 
SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read 
from SCFG_SPARECR8.
+*/
+   {
+   struct regmap * rcpm_scfg_regmap = NULL;
+   u32 
reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+   u32 reg_value = 0;
+
+   rcpm_scfg_regmap = 
syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
+   if (rcpm_scfg_regmap) {
+   if 
(of_property_read_u32_array(dev->of_node,
+   "fsl,rcpm-scfg", 
reg_offset, rcpm->wakeup_cells + 1)) {
+   rcpm_scfg_regmap = NULL;
+   continue;
+   }
+   regmap_read(rcpm_scfg_regmap, 
reg_offset[i + 1], _value);
+   /* Write value to register 
SCFG_SPARECR8 */
+   regmap_write(rcpm_scfg_regmap, 
reg_offset[i + 1], tmp | reg_value);
+   }
+   }
+   #endif
+
+
}
}
} while (ws = wakeup_source_get_next(ws));
-- 
2.17.1

[2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep

[Biwen Li]

The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.

Signed-off-by: Biwen Li 
---
 arch/arm/boot/dts/ls1021a.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..377bb4717584 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,12 +1000,13 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+   fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
};
 
ftm_alarm0: timer0@29d {
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d 0x0 0x1>;
-   fsl,rcpm-wakeup = < 0x0 0x2000>;
+   fsl,rcpm-wakeup = < 0x0 0x3000>; /* FlexTimer1 
and OCRAM1 are not powerdown during LPM20(sleep) */
interrupts = ;
big-endian;
};
-- 
2.17.1

RE: [v2] ACPI: support for NXP i2c controller

[Biwen Li]

Hi rafael, wolfram
Any comments about this?
> 
> Enable NXP i2c controller to boot with ACPI
> 
> Signed-off-by: Meenakshi Aggarwal 
> Signed-off-by: Udit Kumar 
> Signed-off-by: Chuanhua Han 
> Signed-off-by: Biwen Li 
> ---
> Change in v2:
>   - Simplify code
>   - Adjust header file order
>   - Not use ACPI_PTR()
> 
>  drivers/acpi/acpi_apd.c  |  7 +++
>  drivers/i2c/busses/i2c-imx.c | 17 +
>  2 files changed, 20 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c index
> 7cd0c9ac71ea..71511ae2dfcd 100644
> --- a/drivers/acpi/acpi_apd.c
> +++ b/drivers/acpi/acpi_apd.c
> @@ -160,11 +160,17 @@ static const struct apd_device_desc hip08_i2c_desc
> = {
>   .setup = acpi_apd_setup,
>   .fixed_clk_rate = 25000,
>  };
> +
>  static const struct apd_device_desc thunderx2_i2c_desc = {
>   .setup = acpi_apd_setup,
>   .fixed_clk_rate = 12500,
>  };
> 
> +static const struct apd_device_desc nxp_i2c_desc = {
> + .setup = acpi_apd_setup,
> + .fixed_clk_rate = 35000,
> +};
> +
>  static const struct apd_device_desc hip08_spi_desc = {
>   .setup = acpi_apd_setup,
>   .fixed_clk_rate = 25000,
> @@ -238,6 +244,7 @@ static const struct acpi_device_id acpi_apd_device_ids[]
> = {
>   { "HISI02A1", APD_ADDR(hip07_i2c_desc) },
>   { "HISI02A2", APD_ADDR(hip08_i2c_desc) },
>   { "HISI0173", APD_ADDR(hip08_spi_desc) },
> + { "NXP0001", APD_ADDR(nxp_i2c_desc) },
>  #endif
>   { }
>  };
> diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index
> 15f6cde6452f..a3b61336fe55 100644
> --- a/drivers/i2c/busses/i2c-imx.c
> +++ b/drivers/i2c/busses/i2c-imx.c
> @@ -20,6 +20,7 @@
>   *
>   */
> 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -255,6 +256,12 @@ static const struct of_device_id i2c_imx_dt_ids[] =
> {  };  MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
> 
> +static const struct acpi_device_id i2c_imx_acpi_ids[] = {
> + {"NXP0001", .driver_data = (kernel_ulong_t)_i2c_hwdata},
> + { }
> +};
> +MODULE_DEVICE_TABLE(acpi, i2c_imx_acpi_ids);
> +
>  static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)  {
>   return i2c_imx->hwdata->devtype == IMX1_I2C; @@ -1048,14 +1055,13
> @@ static const struct i2c_algorithm i2c_imx_algo = {
> 
>  static int i2c_imx_probe(struct platform_device *pdev)  {
> - const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
> ->dev);
>   struct imx_i2c_struct *i2c_imx;
>   struct resource *res;
>   struct imxi2c_platform_data *pdata = dev_get_platdata(>dev);
>   void __iomem *base;
>   int irq, ret;
>   dma_addr_t phy_addr;
> + const struct imx_i2c_hwdata *match;
> 
>   dev_dbg(>dev, "<%s>\n", __func__);
> 
> @@ -1075,8 +1081,9 @@ static int i2c_imx_probe(struct platform_device
> *pdev)
>   if (!i2c_imx)
>   return -ENOMEM;
> 
> - if (of_id)
> - i2c_imx->hwdata = of_id->data;
> + match = device_get_match_data(>dev);
> + if (match)
> + i2c_imx->hwdata = match;
>   else
>   i2c_imx->hwdata = (struct imx_i2c_hwdata *)
>   platform_get_device_id(pdev)->driver_data;
> @@ -1089,6 +1096,7 @@ static int i2c_imx_probe(struct platform_device
> *pdev)
>   i2c_imx->adapter.nr = pdev->id;
>   i2c_imx->adapter.dev.of_node= pdev->dev.of_node;
>   i2c_imx->base   = base;
> + ACPI_COMPANION_SET(_imx->adapter.dev,
> ACPI_COMPANION(>dev));
> 
>   /* Get I2C clock */
>   i2c_imx->clk = devm_clk_get(>dev, NULL); @@ -1247,6 +1255,7
> @@ static struct platform_driver i2c_imx_driver = {
>   .name = DRIVER_NAME,
>   .pm = _imx_pm_ops,
>   .of_match_table = i2c_imx_dt_ids,
> + .acpi_match_table = i2c_imx_acpi_ids,
>   },
>   .id_table = imx_i2c_devtype,
>  };
> --
> 2.17.1

RE: [EXT] Re: [v2] ACPI: support for NXP i2c controller

[Biwen Li]

、> 
> Caution: EXT Email
> 
> On Fri, Sep 6, 2019 at 11:03 AM Biwen Li  wrote:
> >
> > From: Chuanhua Han 
> >
> > Enable NXP i2c controller to boot with ACPI
> >
> 
> Thanks, the code looks good to me,
> Reviewed-by: Andy Shevchenko 
> 
> though...
> 
> > Signed-off-by: Meenakshi Aggarwal 
> > Signed-off-by: Udit Kumar 
> > Signed-off-by: Chuanhua Han 
> 
> This SoB chain is a bit odd. Who is the author of this? The first SoB in the 
> chain
> usually points to the first (main) author. There is also possible to change 
> that,
> though in that case for the rest we now use Co-developed-by tag rather than
> SoB.
> In any case, if Rafael and Wolfram are okay with this, I have no objections.
Thanks.
> 
> > Signed-off-by: Biwen Li 
> > ---
> > Change in v2:
> > - Simplify code
> > - Adjust header file order
> > - Not use ACPI_PTR()
> >
> >  drivers/acpi/acpi_apd.c  |  7 +++
> >  drivers/i2c/busses/i2c-imx.c | 17 +
> >  2 files changed, 20 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c index
> > 7cd0c9ac71ea..71511ae2dfcd 100644
> > --- a/drivers/acpi/acpi_apd.c
> > +++ b/drivers/acpi/acpi_apd.c
> > @@ -160,11 +160,17 @@ static const struct apd_device_desc
> hip08_i2c_desc = {
> > .setup = acpi_apd_setup,
> > .fixed_clk_rate = 25000,
> >  };
> > +
> >  static const struct apd_device_desc thunderx2_i2c_desc = {
> > .setup = acpi_apd_setup,
> > .fixed_clk_rate = 12500,
> >  };
> >
> > +static const struct apd_device_desc nxp_i2c_desc = {
> > +   .setup = acpi_apd_setup,
> > +   .fixed_clk_rate = 35000,
> > +};
> > +
> >  static const struct apd_device_desc hip08_spi_desc = {
> > .setup = acpi_apd_setup,
> > .fixed_clk_rate = 25000,
> > @@ -238,6 +244,7 @@ static const struct acpi_device_id
> acpi_apd_device_ids[] = {
> > { "HISI02A1", APD_ADDR(hip07_i2c_desc) },
> > { "HISI02A2", APD_ADDR(hip08_i2c_desc) },
> > { "HISI0173", APD_ADDR(hip08_spi_desc) },
> > +   { "NXP0001", APD_ADDR(nxp_i2c_desc) },
> >  #endif
> > { }
> >  };
> > diff --git a/drivers/i2c/busses/i2c-imx.c
> > b/drivers/i2c/busses/i2c-imx.c index 15f6cde6452f..a3b61336fe55 100644
> > --- a/drivers/i2c/busses/i2c-imx.c
> > +++ b/drivers/i2c/busses/i2c-imx.c
> > @@ -20,6 +20,7 @@
> >   *
> >   */
> >
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -255,6 +256,12 @@ static const struct of_device_id i2c_imx_dt_ids[]
> > = {  };  MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
> >
> > +static const struct acpi_device_id i2c_imx_acpi_ids[] = {
> > +   {"NXP0001", .driver_data = (kernel_ulong_t)_i2c_hwdata},
> > +   { }
> > +};
> > +MODULE_DEVICE_TABLE(acpi, i2c_imx_acpi_ids);
> > +
> >  static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)  {
> > return i2c_imx->hwdata->devtype == IMX1_I2C; @@ -1048,14
> > +1055,13 @@ static const struct i2c_algorithm i2c_imx_algo = {
> >
> >  static int i2c_imx_probe(struct platform_device *pdev)  {
> > -   const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
> > -
> >dev);
> > struct imx_i2c_struct *i2c_imx;
> > struct resource *res;
> > struct imxi2c_platform_data *pdata =
> dev_get_platdata(>dev);
> > void __iomem *base;
> > int irq, ret;
> > dma_addr_t phy_addr;
> > +   const struct imx_i2c_hwdata *match;
> >
> > dev_dbg(>dev, "<%s>\n", __func__);
> >
> > @@ -1075,8 +1081,9 @@ static int i2c_imx_probe(struct platform_device
> *pdev)
> > if (!i2c_imx)
> > return -ENOMEM;
> >
> > -   if (of_id)
> > -   i2c_imx->hwdata = of_id->data;
> > +   match = device_get_match_data(>dev);
> > +   if (match)
> > +   i2c_imx->hwdata = match;
> > else
> > i2c_imx->hwdata = (struct imx_i2c_hwdata *)
> >
> platform_get_device_id(pdev)->driver_data;
> > @@ -1089,6 +1096,7 @@ static int i2c_imx_probe(struct platform_device
> *pdev)
> > i2c_imx->adapter.nr = pdev->id;
> > i2c_imx->adapter.dev.of_node= pdev->dev.of_node;
> > i2c_imx->base   = base;
> > +   ACPI_COMPANION_SET(_imx->adapter.dev,
> ACPI_COMPANION(>dev));
> >
> > /* Get I2C clock */
> > i2c_imx->clk = devm_clk_get(>dev, NULL);
> > @@ -1247,6 +1255,7 @@ static struct platform_driver i2c_imx_driver = {
> > .name = DRIVER_NAME,
> > .pm = _imx_pm_ops,
> > .of_match_table = i2c_imx_dt_ids,
> > +   .acpi_match_table = i2c_imx_acpi_ids,
> > },
> > .id_table = imx_i2c_devtype,
> >  };
> > --
> > 2.17.1
> >
> 
> 
> --
> With Best Regards,
> Andy Shevchenko

[v4,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

Add some properties for pcf85263/pcf85363 as follows:
  - nxp,rtc-interrupt-type: integer type
  - nxp,rtc-interrupt-output-pin: string type
  - quartz-load-femtofarads: integer type
  - nxp,quartz-drive-strength: integer type
  - nxp,quartz-low-jitter: bool type
  - wakeup-source: bool type

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v4:
- Drop robust defines in include/dt-bindings/rtc/pcf85363.h
- Add nxp,rtc-interrupt-type property
- Replace interrupt-output-pin with nxp,rtc-interrupt-output-pin

Change in v3:
- None

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Replace drive strength name
  PCF85263_QUARTZDRIVE_NORMAL -> PCF85263_QUARTZDRIVE_100ko
  PCF85263_QUARTZDRIVE_LOW -> PCF85263_QUARTZDRIVE_60ko
  PCF85263_QUARTZDRIVE_HIGH -> PCF85263_QUARTZDRIVE_500ko
- Set default interrupt-output-pin as "INTA"

 .../devicetree/bindings/rtc/pcf85363.txt  | 44 ++-
 include/dt-bindings/rtc/pcf85363.h| 14 ++
 2 files changed, 57 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/rtc/pcf85363.h

diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt 
b/Documentation/devicetree/bindings/rtc/pcf85363.txt
index 94adc1cf93d9..fc1579463657 100644
--- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
+++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
@@ -8,10 +8,52 @@ Required properties:
 Optional properties:
 - interrupts: IRQ line for the RTC (not implemented).
 
+- nxp,rtc-interrupt-type: integer property, represent the interrupt's
+  type. Valid values are
+  INT_PIE(periodic interrupt enable),
+  INT_OIE(offset correction interrupt enable),
+  INT_A1IE(alarm1 interrupt enable),
+  INT_A2IE(alarm2 interrupt enable),
+  INT_TSRIE(timestamp register interrupt enable)
+  INT_BSIE(battery switch interrupt enable),
+  INT_WDIE(WatchDog interrupt enable,and
+  compose these values such as: INT_A1IE | INT_A2IE,
+  but currently only support INT_A1IE, default value is INT_A1IE.
+  The property and property nxp,rtc-interrupt-output-pin
+  work together to generate some interrupts on some pins.
+
+- nxp,rtc-interrupt-output-pin: The interrupt output pin must be
+  "INTA" or "INTB", default value is "INTA". The property and property
+  nxp,rtc-interrupt-type work together to generate some interrupts on
+  some pins.
+
+- quartz-load-femtofarads: The internal capacitor to select for the quartz,
+  expressed in femto Farad (fF). Valid values are 6000, 7000 and 12500.
+  Default value is 12500fF.
+
+- nxp,quartz-drive-strength: Drive strength for the quartz,
+  expressed in kilo ohms (kOhm) Valid values are 60, 100 and 500.
+  Default value is 100kOhm.
+
+- nxp,quartz-low-jitter: Boolean property, if present enables low jitter mode
+  which reduces jitter at the cost of increased power consumption.
+
+- wakeup-source: Boolean property, Please refer to
+  Documentation/devicetree/bindings/power/wakeup-source.txt
+
 Example:
 
 pcf85363: pcf85363@51 {
compatible = "nxp,pcf85363";
reg = <0x51>;
-};
 
+   interrupt-parent = <>;
+   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+   wakeup-source;
+   nxp,rtc-interrupt-output-pin = "INTA";
+   nxp,rtc-interrupt-type = ;
+   quartz-load-femtofarads = <12500>;
+   nxp,quartz-drive-strength = <60>;
+   nxp,quartz-low-jitter;
+};
diff --git a/include/dt-bindings/rtc/pcf85363.h 
b/include/dt-bindings/rtc/pcf85363.h
new file mode 100644
index ..6340bf2da8f5
--- /dev/null
+++ b/include/dt-bindings/rtc/pcf85363.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_RTC_PCF85363_H
+#define _DT_BINDINGS_RTC_PCF85363_H
+
+/* Interrupt type */
+#define INT_WDIE   (1 << 0)
+#define INT_BSIE   (1 << 1)
+#define INT_TSRIE  (1 << 2)
+#define INT_A2IE   (1 << 3)
+#define INT_A1IE   (1 << 4)
+#define INT_OIE(1 << 5)
+#define INT_PIE(1 << 6)
+
+#endif /* _DT_BINDINGS_RTC_PCF85363_H */
-- 
2.17.1

[v4,2/2] rtc: pcf85263/pcf85363: support PM, wakeup device, improve performance

[Biwen Li]

Add some features as follow:
- Set quartz oscillator load capacitance by DT
  (generate more accuracy frequency)
- Set quartz oscillator drive control by DT
  (reduce/increase the current consumption)
- Set low jitter mode by DT
  (improve jitter performance)
- Set wakeup source by DT
  (wakeup device from suspend
- Select interrupt output pin by DT
  (INTA/TS(INTB))
- Select interrupt type by DT
- Add power management
- Add ioctl to check rtc status
  (check whether oscillator of pcf85263/pcf85363 is stopped)

Datasheet url:
- https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf
- https://www.nxp.com/docs/en/data-sheet/PCF85363A.pdf

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v4:
- Add nxp,rtc-interrupt-type property
- Interrupt output pin Cooperate with interrupt type

Change in v3:
- Fix compilation error

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Set default interrupt-output-pin as "INTA"

 drivers/rtc/rtc-pcf85363.c | 372 ++---
 1 file changed, 349 insertions(+), 23 deletions(-)

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index 3450d615974d..56d51aca49ec 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -18,6 +18,16 @@
 #include 
 #include 
 
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_NORMAL0
+#define PCF85363_QUARTZDRIVE_LOW   1
+#define PCF85363_QUARTZDRIVE_HIGH  2
+
 /*
  * Date/Time registers
  */
@@ -96,10 +106,20 @@
 #define FLAGS_PIF  BIT(7)
 
 #define PIN_IO_INTAPM  GENMASK(1, 0)
-#define PIN_IO_INTA_CLK0
-#define PIN_IO_INTA_BAT1
-#define PIN_IO_INTA_OUT2
-#define PIN_IO_INTA_HIZ3
+#define PIN_IO_INTAPM_SHIFT0
+#define PIN_IO_INTA_CLK(0 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_BAT(1 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_OUT(2 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_HIZ(3 << PIN_IO_INTAPM_SHIFT)
+
+#define PIN_IO_TSPM GENMASK(3, 2)
+#define PIN_IO_TSPM_SHIFT  2
+#define PIN_IO_TS_DISABLE  (0x0 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_INTB_OUT (0x1 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_CLK_OUT  (0x2 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_IN   (0x3 << PIN_IO_TSPM_SHIFT)
+
+#define PIN_IO_CLKPM   BIT(7) /* 0 = enable CLK pin,1 = disable CLK pin */
 
 #define STOP_EN_STOP   BIT(0)
 
@@ -107,9 +127,35 @@
 
 #define NVRAM_SIZE 0x40
 
+#define DT_SECS_OS BIT(7)
+
+#define CTRL_OSCILLATOR_CL_MASKGENMASK(1, 0)
+#define CTRL_OSCILLATOR_CL_SHIFT   0
+#define CTRL_OSCILLATOR_OSCD_MASK  GENMASK(3, 2)
+#define CTRL_OSCILLATOR_OSCD_SHIFT 2
+#define CTRL_OSCILLATOR_LOWJ   BIT(4)
+
+#define CTRL_FUNCTION_COF_OFF  0x7 /* No clock output */
+
+enum pcf85363_irqpin {
+   IRQPIN_INTA,
+   IRQPIN_INTB,
+   IRQPIN_MAX,
+};
+
+static const char *const pcf85363_irqpin_names[] = {
+   [IRQPIN_INTA] = "INTA",
+   [IRQPIN_INTB] = "INTB",
+   [IRQPIN_MAX] = "",
+};
+
+
 struct pcf85363 {
+   struct device *dev;
struct rtc_device   *rtc;
struct regmap   *regmap;
+   int irq;
+   u8 irq_type[IRQPIN_MAX];
 };
 
 struct pcf85x63_config {
@@ -205,26 +251,60 @@ static int pcf85363_rtc_read_alarm(struct device *dev, 
struct rtc_wkalrm *alrm)
return 0;
 }
 
-static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
- int enabled)
+static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363,
+ unsigned int enabled,
+ int irq_pin)
 {
-   unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
+   unsigned int alarm1_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
   ALRM_DAY_A1E | ALRM_MON_A1E;
-   int ret;
+   unsigned int alarm2_flags = ALRM_MIN_A2E | ALRM_HR_A2E | ALRM_DAY_A2E;
+   unsigned int alarm_flags = 0;
+   int ret, reg;
+   u8 reg_val = 0, ctrl_flags = FLAGS_A1F;
+
+   if (pcf85363->irq_type[irq_pin] & INT_A1IE) {
+   alarm_flags = alarm1_flags;
+   ctrl_flags = FLAGS_A1F;
+   }
 
+   if (pcf85363->irq_type[irq_pin] & INT_A2IE) {
+   alarm_flags |= alarm2_flags;
+   ctrl_flags |= FLAGS_A2F;
+   }
ret = regmap_update_bits(pcf85363-

RE: [EXT] Re: [v3,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> Caution: EXT Email
> 
> On Tue, Sep 03, 2019 at 11:37:01AM +0200, Martin Fuzzey wrote:
> > On 03/09/2019 08:18, Biwen Li wrote:
> > > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > > index 94adc1cf93d9..588f688b30d1 100644
> > > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > > @@ -8,10 +8,39 @@ Required properties:
> > >   Optional properties:
> > >   - interrupts: IRQ line for the RTC (not implemented).
> > > +- interrupt-output-pin: The interrupt output pin must be
> > > +  "INTA" or "INTB", default value is "INTA"
> > > +
> >
> >
> > The hardware has 2 interrupt pins which can be mapped to various
> > interrupt sources (alarm1, alarm2, periodic, ...)
> >
> > Currently the driver only supports alarm1.
> >
> > It is even possible to use both pins for the same interrupt (eg if
> > INTA were wired to the SoC, INTB to a PMIC and both used for alarm...)
> >
> >
> > So maybe it would be better to have
> >
> > alarm1-interrupt-output-pin: The interrupt output pin used for the
> > alarm function. Must be "INTA", "INTB" or "BOTH"
> 
> That's a property per source. 2 properties possible sources (either a mask or 
> list)
> would be my preference.
> 
> Also, whatever you end up with needs a vendor prefix.
> 
> >
> > Then, if and when other types of interrupts are supported by the
> > driver new properties could be added for them.
> >
> >
> >
> > > +- quartz-load-femtofarads: The internal capacitor to select for the 
> > > quartz:
> > > +   PCF85263_QUARTZCAP_7pF  [0]
> > > +   PCF85263_QUARTZCAP_6pF  [1]
> > > +   PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
> > > +
> >
> >
> > The standard DT property "quartz-load-femtofarads" takes the real
> > physical value in femto Farads ie values should be 7000, 6000, 12500 without
> defines.
> 
> I believe I said this on the last version.
Yes, I will fix it in v4.
> 
> >
> >
> > > +- nxp,quartz-drive-strength: Drive strength for the quartz:
> > > +   PCF85263_QUARTZDRIVE_100ko  [0] DEFAULT
> > > +   PCF85263_QUARTZDRIVE_60ko   [1]
> > > +   PCF85263_QUARTZDRIVE_500ko  [2]
> > > +
> >
> >
> > Not sure about this.
> >
> > Wouldn't it be better to either use a real impedence value in ohms
> > (like load property above, even though it is a vendor specific value)
> > rather than a define, or defines for "Low, Medium, High"?
> >
> >
> > Martin
> >
> >

RE: [EXT] Re: [v3,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> 
> On 03/09/2019 08:18, Biwen Li wrote:
> > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > index 94adc1cf93d9..588f688b30d1 100644
> > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > @@ -8,10 +8,39 @@ Required properties:
> >   Optional properties:
> >   - interrupts: IRQ line for the RTC (not implemented).
> >
> > +- interrupt-output-pin: The interrupt output pin must be
> > +  "INTA" or "INTB", default value is "INTA"
> > +
> 
> 
> The hardware has 2 interrupt pins which can be mapped to various interrupt
> sources (alarm1, alarm2, periodic, ...)
> 
> Currently the driver only supports alarm1.
> 
> It is even possible to use both pins for the same interrupt (eg if INTA were
> wired to the SoC, INTB to a PMIC and both used for alarm...)
> 
> 
> So maybe it would be better to have
> 
> alarm1-interrupt-output-pin: The interrupt output pin used for the alarm
> function. Must be "INTA", "INTB" or "BOTH"
I will fix it in v4.
> 
> Then, if and when other types of interrupts are supported by the driver new
> properties could be added for them.
> 
> 
> 
> > +- quartz-load-femtofarads: The internal capacitor to select for the quartz:
> > + PCF85263_QUARTZCAP_7pF  [0]
> > + PCF85263_QUARTZCAP_6pF  [1]
> > + PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
> > +
> 
> 
> The standard DT property "quartz-load-femtofarads" takes the real physical
> value in femto Farads ie values should be 7000, 6000, 12500 without
> defines.

Ok, I will remove these defines in v4.
> 
> 
> > +- nxp,quartz-drive-strength: Drive strength for the quartz:
> > + PCF85263_QUARTZDRIVE_100ko  [0] DEFAULT
> > + PCF85263_QUARTZDRIVE_60ko   [1]
> > + PCF85263_QUARTZDRIVE_500ko  [2]
> > +
> 
> 
> Not sure about this.
> 
> Wouldn't it be better to either use a real impedence value in ohms (like load
> property above, even though it is a vendor specific value) rather than a
> define, or defines for "Low, Medium, High"?
Ok, I will replace defines with a real impedence value in v4.
> 
> 
> Martin
> 

[v2] ACPI: support for NXP i2c controller

[Biwen Li]

From: Chuanhua Han 

Enable NXP i2c controller to boot with ACPI

Signed-off-by: Meenakshi Aggarwal 
Signed-off-by: Udit Kumar 
Signed-off-by: Chuanhua Han 
Signed-off-by: Biwen Li 
---
Change in v2:
- Simplify code
- Adjust header file order
- Not use ACPI_PTR()

 drivers/acpi/acpi_apd.c  |  7 +++
 drivers/i2c/busses/i2c-imx.c | 17 +
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/acpi/acpi_apd.c b/drivers/acpi/acpi_apd.c
index 7cd0c9ac71ea..71511ae2dfcd 100644
--- a/drivers/acpi/acpi_apd.c
+++ b/drivers/acpi/acpi_apd.c
@@ -160,11 +160,17 @@ static const struct apd_device_desc hip08_i2c_desc = {
.setup = acpi_apd_setup,
.fixed_clk_rate = 25000,
 };
+
 static const struct apd_device_desc thunderx2_i2c_desc = {
.setup = acpi_apd_setup,
.fixed_clk_rate = 12500,
 };
 
+static const struct apd_device_desc nxp_i2c_desc = {
+   .setup = acpi_apd_setup,
+   .fixed_clk_rate = 35000,
+};
+
 static const struct apd_device_desc hip08_spi_desc = {
.setup = acpi_apd_setup,
.fixed_clk_rate = 25000,
@@ -238,6 +244,7 @@ static const struct acpi_device_id acpi_apd_device_ids[] = {
{ "HISI02A1", APD_ADDR(hip07_i2c_desc) },
{ "HISI02A2", APD_ADDR(hip08_i2c_desc) },
{ "HISI0173", APD_ADDR(hip08_spi_desc) },
+   { "NXP0001", APD_ADDR(nxp_i2c_desc) },
 #endif
{ }
 };
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 15f6cde6452f..a3b61336fe55 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -20,6 +20,7 @@
  *
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -255,6 +256,12 @@ static const struct of_device_id i2c_imx_dt_ids[] = {
 };
 MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
 
+static const struct acpi_device_id i2c_imx_acpi_ids[] = {
+   {"NXP0001", .driver_data = (kernel_ulong_t)_i2c_hwdata},
+   { }
+};
+MODULE_DEVICE_TABLE(acpi, i2c_imx_acpi_ids);
+
 static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
 {
return i2c_imx->hwdata->devtype == IMX1_I2C;
@@ -1048,14 +1055,13 @@ static const struct i2c_algorithm i2c_imx_algo = {
 
 static int i2c_imx_probe(struct platform_device *pdev)
 {
-   const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
-  >dev);
struct imx_i2c_struct *i2c_imx;
struct resource *res;
struct imxi2c_platform_data *pdata = dev_get_platdata(>dev);
void __iomem *base;
int irq, ret;
dma_addr_t phy_addr;
+   const struct imx_i2c_hwdata *match;
 
dev_dbg(>dev, "<%s>\n", __func__);
 
@@ -1075,8 +1081,9 @@ static int i2c_imx_probe(struct platform_device *pdev)
if (!i2c_imx)
return -ENOMEM;
 
-   if (of_id)
-   i2c_imx->hwdata = of_id->data;
+   match = device_get_match_data(>dev);
+   if (match)
+   i2c_imx->hwdata = match;
else
i2c_imx->hwdata = (struct imx_i2c_hwdata *)
platform_get_device_id(pdev)->driver_data;
@@ -1089,6 +1096,7 @@ static int i2c_imx_probe(struct platform_device *pdev)
i2c_imx->adapter.nr = pdev->id;
i2c_imx->adapter.dev.of_node= pdev->dev.of_node;
i2c_imx->base   = base;
+   ACPI_COMPANION_SET(_imx->adapter.dev, ACPI_COMPANION(>dev));
 
/* Get I2C clock */
i2c_imx->clk = devm_clk_get(>dev, NULL);
@@ -1247,6 +1255,7 @@ static struct platform_driver i2c_imx_driver = {
.name = DRIVER_NAME,
.pm = _imx_pm_ops,
.of_match_table = i2c_imx_dt_ids,
+   .acpi_match_table = i2c_imx_acpi_ids,
},
.id_table = imx_i2c_devtype,
 };
-- 
2.17.1

RE: [PATCH] ACPI: support for NXP i2c controller

[Biwen Li]

> 
> > Hi,
> >
> > On 02.09.19 23:16, Andy Shevchenko wrote:
> > > On Mon, Sep 2, 2019 at 11:58 PM Rafael J. Wysocki
> > > 
> > wrote:
> > >>
> > >> On Thu, Jul 11, 2019 at 12:35 PM Chuanhua Han
> > >> 
> > wrote:
> > >>>
> > >>> Enable NXP i2c controller to boot with ACPI
> > >>>
> > >>> Signed-off-by: Meenakshi Aggarwal 
> > >>> Signed-off-by: Udit Kumar 
> > >>> Signed-off-by: Chuanhua Han 
> > >>
> > >> Wolfram, any objections to this from the i2c side?
> > >
> > > May I propose amendment(s)?
> > >
> > >>> @@ -44,6 +44,7 @@
> > >>>   #include 
> > >>>   #include 
> > >>>   #include 
> > >
> > >>> +#include 
> > >
> > > If it's kept in order, better to go with it. (Yes, it is as I have
> > > checked) However, property.h should be included instead, see below.
Ok, got it. I will fix it in v2.
> > >
> > >>>  const struct of_device_id *of_id =
> > of_match_device(i2c_imx_dt_ids,
> > >>>
> > >>> >dev);
> > >>> +   const struct acpi_device_id *acpi_id =
> > >>> +   acpi_match_device(i2c_imx_acpi_ids,
> > >>> + >dev);
> > >
> > >
> > >>>  if (of_id)
> > >>>  i2c_imx->hwdata = of_id->data;
> > >>> +   else if (acpi_id)
> > >>> +   i2c_imx->hwdata = (struct imx_i2c_hwdata *)
> > >>> +   acpi_id->driver_data;
> > >
> > >
> > > The above altogher may be replaced with
> > >
> > > const struct imx_i2c_hwdata *match;
> > > ...
> > > match = device_get_match_data(>dev);
> > > if (match)
> > >   i2c_imx->hwdata = match;
> > > else
> > > ...
> >
Ok, I will correct it in v2.
> > Instead of "may be replaced", I would say: it should be replaced :)
> >
> > >>> +   .acpi_match_table = ACPI_PTR(i2c_imx_acpi_ids),
> > >
> > > Since there is no #ifdef guard no need to use ACPI_PTR().
> > >
> >
> > What iMX/(other NXP?) SoCs are with ACPI support?  Where I can get
> > one? I would like to know more about it.
> - Nxp has variety Socs, include i.MX, Layerscape, etc.
> - You can get one from here
> https://www.nxp.com/design/qoriq-developer-resources/qoriq-lx2160a-develo
> pment-board:LX2160A-RDB
> 
> >
> > Kind regards,
> > Oleksij Rempel
> >
> > --
> > Pengutronix e.K.   |
> > |
> > Industrial Linux Solutions |
> > https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.p
> > e
> ngutronix.de%2Fdata=02%7C01%7Cmeenakshi.aggarwal%40nxp.com%
> >
> 7C640eb015a91f4959d3b508d7303168fb%7C686ea1d3bc2b4c6fa92cd99c5c
> >
> 301635%7C0%7C0%7C637030861076879938sdata=sPWtkVtHHDvoRR
> > ZmWJuipCO%2BEwG%2BcupgZvcIV1%2BrlEY%3Dreserved=0  |
> Peiner Str.
> > 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0
> > |
> > Amtsgericht Hildesheim, HRA 2686   | Fax:
> > +49-5121-206917- |

RE: [PATCH] ACPI: support for NXP i2c controller

[Biwen Li]

> Hi,
> 
> On 02.09.19 23:16, Andy Shevchenko wrote:
> > On Mon, Sep 2, 2019 at 11:58 PM Rafael J. Wysocki 
> wrote:
> >>
> >> On Thu, Jul 11, 2019 at 12:35 PM Chuanhua Han 
> wrote:
> >>>
> >>> Enable NXP i2c controller to boot with ACPI
> >>>
> >>> Signed-off-by: Meenakshi Aggarwal 
> >>> Signed-off-by: Udit Kumar 
> >>> Signed-off-by: Chuanhua Han 
> >>
> >> Wolfram, any objections to this from the i2c side?
> >
> > May I propose amendment(s)?
> >
> >>> @@ -44,6 +44,7 @@
> >>>   #include 
> >>>   #include 
> >>>   #include 
> >
> >>> +#include 
> >
> > If it's kept in order, better to go with it. (Yes, it is as I have
> > checked) However, property.h should be included instead, see below.
> >
> >>>  const struct of_device_id *of_id =
> of_match_device(i2c_imx_dt_ids,
> >>>
> >>> >dev);
> >>> +   const struct acpi_device_id *acpi_id =
> >>> +   acpi_match_device(i2c_imx_acpi_ids,
> >>> + >dev);
> >
> >
> >>>  if (of_id)
> >>>  i2c_imx->hwdata = of_id->data;
> >>> +   else if (acpi_id)
> >>> +   i2c_imx->hwdata = (struct imx_i2c_hwdata *)
> >>> +   acpi_id->driver_data;
> >
> >
> > The above altogher may be replaced with
> >
> > const struct imx_i2c_hwdata *match;
> > ...
> > match = device_get_match_data(>dev);
> > if (match)
> >   i2c_imx->hwdata = match;
> > else
> > ...
> 
> Instead of "may be replaced", I would say: it should be replaced :)
> 
> >>> +   .acpi_match_table = ACPI_PTR(i2c_imx_acpi_ids),
> >
> > Since there is no #ifdef guard no need to use ACPI_PTR().
> >
> 
> What iMX/(other NXP?) SoCs are with ACPI support?  Where I can get one? I
> would like to know more about it.
- Nxp has variety Socs, include i.MX, Layerscape, etc.
- You can get one from here 
https://www.nxp.com/design/qoriq-developer-resources/qoriq-lx2160a-development-board:LX2160A-RDB

> 
> Kind regards,
> Oleksij Rempel
> 
> --
> Pengutronix e.K.   |
> |
> Industrial Linux Solutions |
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe
> ngutronix.de%2Fdata=02%7C01%7Cmeenakshi.aggarwal%40nxp.com%
> 7C640eb015a91f4959d3b508d7303168fb%7C686ea1d3bc2b4c6fa92cd99c5c
> 301635%7C0%7C0%7C637030861076879938sdata=sPWtkVtHHDvoRR
> ZmWJuipCO%2BEwG%2BcupgZvcIV1%2BrlEY%3Dreserved=0  |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0
> |
> Amtsgericht Hildesheim, HRA 2686   | Fax:
> +49-5121-206917- |

arm64: ls1028a-qds: correct bus of rtc

[Biwen Li]

The rtc is on i2c2 bus(hardware), not on i2c1 channel 3,
so correct it

Signed-off-by: Biwen Li 
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts 
b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
index de6ef39f3118..6c0540ad9c59 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
@@ -133,11 +133,6 @@
vcc-supply = <_3v3>;
};
 
-   rtc@51 {
-   compatible = "nxp,pcf2129";
-   reg = <0x51>;
-   };
-
eeprom@56 {
compatible = "atmel,24c512";
reg = <0x56>;
@@ -166,6 +161,14 @@
};
 };
 
+ {
+   status = "okay";
+   rtc@51 {
+   compatible = "nxp,pcf2129";
+   reg = <0x51>;
+   };
+};
+
  {
status = "okay";
 };
-- 
2.17.1

[v3,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

Add some properties for pcf85263/pcf85363 as follows:
  - interrupt-output-pin: string type
  - quartz-load-femtofarads: integer type
  - nxp,quartz-drive-strength: integer type
  - nxp,quartz-low-jitter: bool type
  - wakeup-source: bool type

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v3:
- None

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Replace drive strength name
  PCF85263_QUARTZDRIVE_NORMAL -> PCF85263_QUARTZDRIVE_100ko
  PCF85263_QUARTZDRIVE_LOW -> PCF85263_QUARTZDRIVE_60ko
  PCF85263_QUARTZDRIVE_HIGH -> PCF85263_QUARTZDRIVE_500ko
- Set default interrupt-output-pin as "INTA"

 .../devicetree/bindings/rtc/pcf85363.txt  | 29 +++
 include/dt-bindings/rtc/pcf85363.h| 15 ++
 2 files changed, 44 insertions(+)
 create mode 100644 include/dt-bindings/rtc/pcf85363.h

diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt 
b/Documentation/devicetree/bindings/rtc/pcf85363.txt
index 94adc1cf93d9..588f688b30d1 100644
--- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
+++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
@@ -8,10 +8,39 @@ Required properties:
 Optional properties:
 - interrupts: IRQ line for the RTC (not implemented).
 
+- interrupt-output-pin: The interrupt output pin must be
+  "INTA" or "INTB", default value is "INTA"
+
+- quartz-load-femtofarads: The internal capacitor to select for the quartz:
+   PCF85263_QUARTZCAP_7pF  [0]
+   PCF85263_QUARTZCAP_6pF  [1]
+   PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
+
+- nxp,quartz-drive-strength: Drive strength for the quartz:
+   PCF85263_QUARTZDRIVE_100ko  [0] DEFAULT
+   PCF85263_QUARTZDRIVE_60ko   [1]
+   PCF85263_QUARTZDRIVE_500ko  [2]
+
+- nxp,quartz-low-jitter: Boolean property, if present enables low jitter mode
+  which reduces jitter at the cost of increased power consumption.
+
+- wakeup-source: Boolean property, Please refer to
+  Documentation/devicetree/bindings/power/wakeup-source.txt
+
 Example:
 
 pcf85363: pcf85363@51 {
compatible = "nxp,pcf85363";
reg = <0x51>;
+
+   interrupt-parent = <>;
+   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+   #include 
+   wakeup-source;
+   interrupt-output-pin = "INTA";
+   quartz-load-femtofarads = ;
+   nxp,quartz-drive-strength = ;
+   nxp,quartz-low-jitter;
 };
 
diff --git a/include/dt-bindings/rtc/pcf85363.h 
b/include/dt-bindings/rtc/pcf85363.h
new file mode 100644
index ..f71b151bc481
--- /dev/null
+++ b/include/dt-bindings/rtc/pcf85363.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_RTC_PCF85363_H
+#define _DT_BINDINGS_RTC_PCF85363_H
+
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_100ko 0
+#define PCF85363_QUARTZDRIVE_60ko  1
+#define PCF85363_QUARTZDRIVE_500ko 2
+
+#endif /* _DT_BINDINGS_RTC_PCF85363_H */
-- 
2.17.1

[v3,2/2] rtc: pcf85263/pcf85363: support PM, wakeup device, improve performance

[Biwen Li]

Add some features as follow:
- Set quartz oscillator load capacitance by DT
  (generate more accuracy frequency)
- Set quartz oscillator drive control by DT
  (reduce/increase the current consumption)
- Set low jitter mode by DT
  (improve jitter performance)
- Set wakeup source by DT
  (wakeup device from suspend
- Select interrupt output pin by DT
  (INTA/TS(INTB))
- Add power management
- Add ioctl to check rtc status
  (check whether oscillator of pcf85263/pcf85363 is stopped)

Datasheet url:
- https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf
- https://www.nxp.com/docs/en/data-sheet/PCF85363A.pdf

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v3:
- Fix compilation error

Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Set default interrupt-output-pin as "INTA"

 drivers/rtc/rtc-pcf85363.c | 278 +++--
 1 file changed, 265 insertions(+), 13 deletions(-)

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index 3450d615974d..81a9af16d5bc 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -18,6 +18,16 @@
 #include 
 #include 
 
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_100ko 0
+#define PCF85363_QUARTZDRIVE_60ko  1
+#define PCF85363_QUARTZDRIVE_500ko 2
+
 /*
  * Date/Time registers
  */
@@ -96,10 +106,20 @@
 #define FLAGS_PIF  BIT(7)
 
 #define PIN_IO_INTAPM  GENMASK(1, 0)
-#define PIN_IO_INTA_CLK0
-#define PIN_IO_INTA_BAT1
-#define PIN_IO_INTA_OUT2
-#define PIN_IO_INTA_HIZ3
+#define PIN_IO_INTAPM_SHIFT0
+#define PIN_IO_INTA_CLK(0 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_BAT(1 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_OUT(2 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_HIZ(3 << PIN_IO_INTAPM_SHIFT)
+
+#define PIN_IO_TSPM GENMASK(3, 2)
+#define PIN_IO_TSPM_SHIFT  2
+#define PIN_IO_TS_DISABLE  (0x0 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_INTB_OUT (0x1 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_CLK_OUT  (0x2 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_IN   (0x3 << PIN_IO_TSPM_SHIFT)
+
+#define PIN_IO_CLKPM   BIT(7) /* 0 = enable CLK pin,1 = disable CLK pin */
 
 #define STOP_EN_STOP   BIT(0)
 
@@ -107,9 +127,33 @@
 
 #define NVRAM_SIZE 0x40
 
+#define DT_SECS_OS BIT(7)
+
+#define CTRL_OSCILLATOR_CL_MASKGENMASK(1, 0)
+#define CTRL_OSCILLATOR_CL_SHIFT   0
+#define CTRL_OSCILLATOR_OSCD_MASK  GENMASK(3, 2)
+#define CTRL_OSCILLATOR_OSCD_SHIFT 2
+#define CTRL_OSCILLATOR_LOWJ   BIT(4)
+
+#define CTRL_FUNCTION_COF_OFF  0x7 /* No clock output */
+
+enum pcf85363_irqpin {
+   IRQPIN_INTA,
+   IRQPIN_INTB
+};
+
+static const char *const pcf85363_irqpin_names[] = {
+   [IRQPIN_INTA] = "INTA",
+   [IRQPIN_INTB] = "INTB"
+};
+
+
 struct pcf85363 {
+   struct device *dev;
struct rtc_device   *rtc;
struct regmap   *regmap;
+   enum pcf85363_irqpin irq_pin;
+   int irq;
 };
 
 struct pcf85x63_config {
@@ -210,14 +254,26 @@ static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 
*pcf85363, unsigned
 {
unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
   ALRM_DAY_A1E | ALRM_MON_A1E;
-   int ret;
+   int ret, reg;
 
ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
 enabled ? alarm_flags : 0);
if (ret)
return ret;
 
-   ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
+   switch (pcf85363->irq_pin) {
+   case IRQPIN_INTA:
+   reg = CTRL_INTA_EN;
+   break;
+
+   case IRQPIN_INTB:
+   reg = CTRL_INTB_EN;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+   ret = regmap_update_bits(pcf85363->regmap, reg,
 INT_A1IE, enabled ? INT_A1IE : 0);
 
if (ret || enabled)
@@ -282,12 +338,55 @@ static irqreturn_t pcf85363_rtc_handle_irq(int irq, void 
*dev_id)
return IRQ_NONE;
 }
 
+static int pcf85363_osc_is_stopped(struct pcf85363 *pcf85363)
+{
+   unsigned int regval;
+   int ret;
+
+   ret = regmap_read(pcf85363->regmap, DT_SECS, );
+   if (ret)
+   return ret;
+
+   ret = regval & DT_SECS_OS ? 1 : 0;
+   if (ret)
+   dev_warn(pcf85363->dev, "Oscillator stop d

[v2,2/2] rtc: pcf85263/pcf85363: support PM, wakeup device, improve performance

[Biwen Li]

Add some features as follow:
- Set quartz oscillator load capacitance by DT
  (generate more accuracy frequency)
- Set quartz oscillator drive control by DT
  (reduce/increase the current consumption)
- Set low jitter mode by DT
  (improve jitter performance)
- Set wakeup source by DT
  (wakeup device from suspend
- Select interrupt output pin by DT
  (INTA/TS(INTB))
- Add power management
- Add ioctl to check rtc status
  (check whether oscillator of pcf85263/pcf85363 is stopped)

Datasheet url:
- https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf
- https://www.nxp.com/docs/en/data-sheet/PCF85363A.pdf

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Set default interrupt-output-pin as "INTA"

 drivers/rtc/rtc-pcf85363.c | 278 +++--
 1 file changed, 265 insertions(+), 13 deletions(-)

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index 3450d615974d..030da4e764eb 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -18,6 +18,16 @@
 #include 
 #include 
 
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_100ko 0
+#define PCF85363_QUARTZDRIVE_60ko  1
+#define PCF85363_QUARTZDRIVE_500ko 2
+
 /*
  * Date/Time registers
  */
@@ -96,10 +106,20 @@
 #define FLAGS_PIF  BIT(7)
 
 #define PIN_IO_INTAPM  GENMASK(1, 0)
-#define PIN_IO_INTA_CLK0
-#define PIN_IO_INTA_BAT1
-#define PIN_IO_INTA_OUT2
-#define PIN_IO_INTA_HIZ3
+#define PIN_IO_INTAPM_SHIFT0
+#define PIN_IO_INTA_CLK(0 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_BAT(1 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_OUT(2 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_HIZ(3 << PIN_IO_INTAPM_SHIFT)
+
+#define PIN_IO_TSPM GENMASK(3, 2)
+#define PIN_IO_TSPM_SHIFT  2
+#define PIN_IO_TS_DISABLE  (0x0 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_INTB_OUT (0x1 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_CLK_OUT  (0x2 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_IN   (0x3 << PIN_IO_TSPM_SHIFT)
+
+#define PIN_IO_CLKPM   BIT(7) /* 0 = enable CLK pin,1 = disable CLK pin */
 
 #define STOP_EN_STOP   BIT(0)
 
@@ -107,9 +127,33 @@
 
 #define NVRAM_SIZE 0x40
 
+#define DT_SECS_OS BIT(7)
+
+#define CTRL_OSCILLATOR_CL_MASKGENMASK(1, 0)
+#define CTRL_OSCILLATOR_CL_SHIFT   0
+#define CTRL_OSCILLATOR_OSCD_MASK  GENMASK(3, 2)
+#define CTRL_OSCILLATOR_OSCD_SHIFT 2
+#define CTRL_OSCILLATOR_LOWJ   BIT(4)
+
+#define CTRL_FUNCTION_COF_OFF  0x7 /* No clock output */
+
+enum pcf85363_irqpin {
+   IRQPIN_INTA,
+   IRQPIN_INTB
+};
+
+static const char *const pcf85363_irqpin_names[] = {
+   [IRQPIN_INTA] = "INTA",
+   [IRQPIN_INTB] = "INTB"
+};
+
+
 struct pcf85363 {
+   struct device *dev;
struct rtc_device   *rtc;
struct regmap   *regmap;
+   enum pcf85363_irqpin irq_pin;
+   int irq;
 };
 
 struct pcf85x63_config {
@@ -210,14 +254,26 @@ static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 
*pcf85363, unsigned
 {
unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
   ALRM_DAY_A1E | ALRM_MON_A1E;
-   int ret;
+   int ret, reg;
 
ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
 enabled ? alarm_flags : 0);
if (ret)
return ret;
 
-   ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
+   switch (pcf85363->irq_pin) {
+   case IRQPIN_INTA:
+   reg = CTRL_INTA_EN;
+   break;
+
+   case IRQPIN_INTB:
+   reg = CTRL_INTB_EN;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+   ret = regmap_update_bits(pcf85363->regmap, reg,
 INT_A1IE, enabled ? INT_A1IE : 0);
 
if (ret || enabled)
@@ -282,12 +338,55 @@ static irqreturn_t pcf85363_rtc_handle_irq(int irq, void 
*dev_id)
return IRQ_NONE;
 }
 
+static int pcf85363_osc_is_stopped(struct pcf85363 *pcf85363)
+{
+   unsigned int regval;
+   int ret;
+
+   ret = regmap_read(pcf85363->regmap, DT_SECS, );
+   if (ret)
+   return ret;
+
+   ret = regval & DT_SECS_OS ? 1 : 0;
+   if (ret)
+   dev_warn(pcf85363->dev, "Oscillator stop detected, date/time is 
not reliable.\n");
+
+   return

[v2,1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

Add some properties for pcf85263/pcf85363 as follows:
  - interrupt-output-pin: string type
  - quartz-load-femtofarads: integer type
  - nxp,quartz-drive-strength: integer type
  - nxp,quartz-low-jitter: bool type
  - wakeup-source: bool type

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
Change in v2:
- Replace properties name
  quartz-load-capacitance -> quartz-load-femtofarads
  quartz-drive-strength -> nxp,quartz-drive-strength
  quartz-low-jitter -> nxp,quartz-low-jitter
- Replace drive strength name
  PCF85263_QUARTZDRIVE_NORMAL -> PCF85263_QUARTZDRIVE_100ko
  PCF85263_QUARTZDRIVE_LOW -> PCF85263_QUARTZDRIVE_60ko
  PCF85263_QUARTZDRIVE_HIGH -> PCF85263_QUARTZDRIVE_500ko
- Set default interrupt-output-pin as "INTA"

 .../devicetree/bindings/rtc/pcf85363.txt  | 29 +++
 include/dt-bindings/rtc/pcf85363.h| 15 ++
 2 files changed, 44 insertions(+)
 create mode 100644 include/dt-bindings/rtc/pcf85363.h

diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt 
b/Documentation/devicetree/bindings/rtc/pcf85363.txt
index 94adc1cf93d9..588f688b30d1 100644
--- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
+++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
@@ -8,10 +8,39 @@ Required properties:
 Optional properties:
 - interrupts: IRQ line for the RTC (not implemented).
 
+- interrupt-output-pin: The interrupt output pin must be
+  "INTA" or "INTB", default value is "INTA"
+
+- quartz-load-femtofarads: The internal capacitor to select for the quartz:
+   PCF85263_QUARTZCAP_7pF  [0]
+   PCF85263_QUARTZCAP_6pF  [1]
+   PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
+
+- nxp,quartz-drive-strength: Drive strength for the quartz:
+   PCF85263_QUARTZDRIVE_100ko  [0] DEFAULT
+   PCF85263_QUARTZDRIVE_60ko   [1]
+   PCF85263_QUARTZDRIVE_500ko  [2]
+
+- nxp,quartz-low-jitter: Boolean property, if present enables low jitter mode
+  which reduces jitter at the cost of increased power consumption.
+
+- wakeup-source: Boolean property, Please refer to
+  Documentation/devicetree/bindings/power/wakeup-source.txt
+
 Example:
 
 pcf85363: pcf85363@51 {
compatible = "nxp,pcf85363";
reg = <0x51>;
+
+   interrupt-parent = <>;
+   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+   #include 
+   wakeup-source;
+   interrupt-output-pin = "INTA";
+   quartz-load-femtofarads = ;
+   nxp,quartz-drive-strength = ;
+   nxp,quartz-low-jitter;
 };
 
diff --git a/include/dt-bindings/rtc/pcf85363.h 
b/include/dt-bindings/rtc/pcf85363.h
new file mode 100644
index ..f71b151bc481
--- /dev/null
+++ b/include/dt-bindings/rtc/pcf85363.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_RTC_PCF85363_H
+#define _DT_BINDINGS_RTC_PCF85363_H
+
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_100ko 0
+#define PCF85363_QUARTZDRIVE_60ko  1
+#define PCF85363_QUARTZDRIVE_500ko 2
+
+#endif /* _DT_BINDINGS_RTC_PCF85363_H */
-- 
2.17.1

RE: [EXT] Re: [1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> 
> Caution: EXT Email
> 
> On Fri, Aug 30, 2019 at 05:17:19PM +0800, Biwen Li wrote:
> > Add some properties for pcf85263/pcf85363 as follows:
> >   - interrupt-output-pin: string type
> >   - quartz-load-capacitance: integer type
> >   - quartz-drive-strength: integer type
> >   - quartz-low-jitter: bool type
> >   - wakeup-source: bool type
> >
> > Signed-off-by: Martin Fuzzey 
> > Signed-off-by: Biwen Li 
> > ---
> >  .../devicetree/bindings/rtc/pcf85363.txt  | 31
> +++
> >  include/dt-bindings/rtc/pcf85363.h| 15 +
> >  2 files changed, 46 insertions(+)
> >  create mode 100644 include/dt-bindings/rtc/pcf85363.h
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > index 94adc1cf93d9..d83359990bd7 100644
> > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > @@ -8,10 +8,41 @@ Required properties:
> >  Optional properties:
> >  - interrupts: IRQ line for the RTC (not implemented).
> >
> > +- interrupt-output-pin: The interrupt output pin must be
> > +  "NONE", "INTA" or "INTB", default value is "NONE"
> > +
> > +- quartz-load-capacitance: The internal capacitor to select for the quartz:
> > + PCF85263_QUARTZCAP_7pF  [0]
> > + PCF85263_QUARTZCAP_6pF  [1]
> > + PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
> 
> We have a common property for this. Use it.
Ok, I will replace it in v2.
> 
> > +
> > +- quartz-drive-strength: Drive strength for the quartz:
> > + PCF85263_QUARTZDRIVE_NORMAL [0] DEFAULT
> > + PCF85263_QUARTZDRIVE_LOW[1]
> > + PCF85263_QUARTZDRIVE_HIGH   [2]
> > +
> > +- quartz-low-jitter: Boolean property, if present enables low jitter
> > +mode
> > +  which reduces jitter at the cost of increased power consumption.
> 
> These 2  need vendor prefixes.
Okay, I will add vendor prefixes in v2.
> 
> > +
> > +- wakeup-source: Boolean property, mark the chip as a wakeup source,
> > +  independently of the availability of an IRQ line connected to the SoC.
> > +  This is useful if the IRQ line is connected to a PMIC or other
> > +circuit
> > +  that can power up the device rather than to a normal SOC interrupt.
> > +
> >  Example:
> >
> >  pcf85363: pcf85363@51 {
> >   compatible = "nxp,pcf85363";
> >   reg = <0x51>;
> > +
> > + interrupt-parent = <>;
> > + interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
> > +
> > + #include 
> > + wakeup-source;
> > + interrupt-output-pin = "INTA";
> > + quartz-load-capacitance = ;
> > + quartz-drive-strength = ;
> > + quartz-low-jitter;
> >  };
> >
> > diff --git a/include/dt-bindings/rtc/pcf85363.h
> > b/include/dt-bindings/rtc/pcf85363.h
> > new file mode 100644
> > index ..2c06c28eb5ff
> > --- /dev/null
> > +++ b/include/dt-bindings/rtc/pcf85363.h
> > @@ -0,0 +1,15 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */ #ifndef
> > +_DT_BINDINGS_RTC_PCF85363_H #define
> _DT_BINDINGS_RTC_PCF85363_H
> > +
> > +/* Quartz capacitance */
> > +#define PCF85363_QUARTZCAP_7pF   0
> > +#define PCF85363_QUARTZCAP_6pF   1
> > +#define PCF85363_QUARTZCAP_12p5pF2
> > +
> > +/* Quartz drive strength */
> > +#define PCF85363_QUARTZDRIVE_NORMAL  0
> > +#define PCF85363_QUARTZDRIVE_LOW 1
> > +#define PCF85363_QUARTZDRIVE_HIGH2
> > +
> > +#endif /* _DT_BINDINGS_RTC_PCF85363_H */
> > --
> > 2.17.1
> >

RE: [EXT] Re: [1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

> 
> On 30/08/2019 17:17:19+0800, Biwen Li wrote:
> > Add some properties for pcf85263/pcf85363 as follows:
> >   - interrupt-output-pin: string type
> >   - quartz-load-capacitance: integer type
> >   - quartz-drive-strength: integer type
> >   - quartz-low-jitter: bool type
> >   - wakeup-source: bool type
> >
> > Signed-off-by: Martin Fuzzey 
> > Signed-off-by: Biwen Li 
> > ---
> >  .../devicetree/bindings/rtc/pcf85363.txt  | 31
> +++
> >  include/dt-bindings/rtc/pcf85363.h| 15 +
> >  2 files changed, 46 insertions(+)
> >  create mode 100644 include/dt-bindings/rtc/pcf85363.h
> >
> > diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > index 94adc1cf93d9..d83359990bd7 100644
> > --- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > +++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
> > @@ -8,10 +8,41 @@ Required properties:
> >  Optional properties:
> >  - interrupts: IRQ line for the RTC (not implemented).
> >
> > +- interrupt-output-pin: The interrupt output pin must be
> > +  "NONE", "INTA" or "INTB", default value is "NONE"
> > +
> 
> default value can't be none if there is an interrupts property. Also, both 
> pins
> can be enabled at the same time and this binding would prevent that.
> Finally, it may also be desirable to have some interrupts on one pin and
> other interrupts on another pin e.g. alarms and timestamping on INTA going
> to the SoC and only alarms on INTB going to a PMIC.
Ok, got it, I will correct it on v2.
> 
> > +- quartz-load-capacitance: The internal capacitor to select for the quartz:
> > + PCF85263_QUARTZCAP_7pF  [0]
> > + PCF85263_QUARTZCAP_6pF  [1]
> > + PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
> > +
> 
> The correct generic property is quartz-load-femtofarads.
I will replace it on v2.
> 
> > +- quartz-drive-strength: Drive strength for the quartz:
> > + PCF85263_QUARTZDRIVE_NORMAL [0] DEFAULT
> > + PCF85263_QUARTZDRIVE_LOW[1]
> > + PCF85263_QUARTZDRIVE_HIGH   [2]
> > +
> 
> This has to take a value in ohm to be generic and then you don't need the
> include file.
I will adjust it on v2.
> 
> > +- quartz-low-jitter: Boolean property, if present enables low jitter
> > +mode
> > +  which reduces jitter at the cost of increased power consumption.
> > +
> 
> I think that property needs to be nxp specific.
I will replace it with nxp,quartz-low-jitter on v2.
> 
> > +- wakeup-source: Boolean property, mark the chip as a wakeup source,
> > +  independently of the availability of an IRQ line connected to the SoC.
> > +  This is useful if the IRQ line is connected to a PMIC or other
> > +circuit
> > +  that can power up the device rather than to a normal SOC interrupt.
> > +
> 
> This is already defined in bindings/power/wakeup-source.txt I guess you can
> simply refer to it.
I will correct it on v2.
> 
> >  Example:
> >
> >  pcf85363: pcf85363@51 {
> >   compatible = "nxp,pcf85363";
> >   reg = <0x51>;
> > +
> > + interrupt-parent = <>;
> > + interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
> > +
> > + #include 
> > + wakeup-source;
> > + interrupt-output-pin = "INTA";
> > + quartz-load-capacitance = ;
> > + quartz-drive-strength = ;
> > + quartz-low-jitter;
> >  };
> >
> > diff --git a/include/dt-bindings/rtc/pcf85363.h
> > b/include/dt-bindings/rtc/pcf85363.h
> > new file mode 100644
> > index ..2c06c28eb5ff
> > --- /dev/null
> > +++ b/include/dt-bindings/rtc/pcf85363.h
> > @@ -0,0 +1,15 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */ #ifndef
> > +_DT_BINDINGS_RTC_PCF85363_H #define
> _DT_BINDINGS_RTC_PCF85363_H
> > +
> > +/* Quartz capacitance */
> > +#define PCF85363_QUARTZCAP_7pF   0
> > +#define PCF85363_QUARTZCAP_6pF   1
> > +#define PCF85363_QUARTZCAP_12p5pF2
> > +
> > +/* Quartz drive strength */
> > +#define PCF85363_QUARTZDRIVE_NORMAL  0
> > +#define PCF85363_QUARTZDRIVE_LOW 1
> > +#define PCF85363_QUARTZDRIVE_HIGH2
> > +
> > +#endif /* _DT_BINDINGS_RTC_PCF85363_H */
> > --
> > 2.17.1
> >
> 
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbootl
> in.comdata=02%7C01%7Cbiwen.li%40nxp.com%7C0a2e5b50f8fc45a
> ef6a208d72d2ebe2e%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0
> %7C637027551094795780sdata=PMMS6PMBPkuuIYgMJFmtOaoD%
> 2B7fCO3eZvOtlYhTEL5w%3Dreserved=0

[1/2] dt-bindings: rtc: pcf85263/pcf85363: add some properties

[Biwen Li]

Add some properties for pcf85263/pcf85363 as follows:
  - interrupt-output-pin: string type
  - quartz-load-capacitance: integer type
  - quartz-drive-strength: integer type
  - quartz-low-jitter: bool type
  - wakeup-source: bool type

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
 .../devicetree/bindings/rtc/pcf85363.txt  | 31 +++
 include/dt-bindings/rtc/pcf85363.h| 15 +
 2 files changed, 46 insertions(+)
 create mode 100644 include/dt-bindings/rtc/pcf85363.h

diff --git a/Documentation/devicetree/bindings/rtc/pcf85363.txt 
b/Documentation/devicetree/bindings/rtc/pcf85363.txt
index 94adc1cf93d9..d83359990bd7 100644
--- a/Documentation/devicetree/bindings/rtc/pcf85363.txt
+++ b/Documentation/devicetree/bindings/rtc/pcf85363.txt
@@ -8,10 +8,41 @@ Required properties:
 Optional properties:
 - interrupts: IRQ line for the RTC (not implemented).
 
+- interrupt-output-pin: The interrupt output pin must be
+  "NONE", "INTA" or "INTB", default value is "NONE"
+
+- quartz-load-capacitance: The internal capacitor to select for the quartz:
+   PCF85263_QUARTZCAP_7pF  [0]
+   PCF85263_QUARTZCAP_6pF  [1]
+   PCF85263_QUARTZCAP_12p5pF   [2] DEFAULT
+
+- quartz-drive-strength: Drive strength for the quartz:
+   PCF85263_QUARTZDRIVE_NORMAL [0] DEFAULT
+   PCF85263_QUARTZDRIVE_LOW[1]
+   PCF85263_QUARTZDRIVE_HIGH   [2]
+
+- quartz-low-jitter: Boolean property, if present enables low jitter mode
+  which reduces jitter at the cost of increased power consumption.
+
+- wakeup-source: Boolean property, mark the chip as a wakeup source,
+  independently of the availability of an IRQ line connected to the SoC.
+  This is useful if the IRQ line is connected to a PMIC or other circuit
+  that can power up the device rather than to a normal SOC interrupt.
+
 Example:
 
 pcf85363: pcf85363@51 {
compatible = "nxp,pcf85363";
reg = <0x51>;
+
+   interrupt-parent = <>;
+   interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+   #include 
+   wakeup-source;
+   interrupt-output-pin = "INTA";
+   quartz-load-capacitance = ;
+   quartz-drive-strength = ;
+   quartz-low-jitter;
 };
 
diff --git a/include/dt-bindings/rtc/pcf85363.h 
b/include/dt-bindings/rtc/pcf85363.h
new file mode 100644
index ..2c06c28eb5ff
--- /dev/null
+++ b/include/dt-bindings/rtc/pcf85363.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _DT_BINDINGS_RTC_PCF85363_H
+#define _DT_BINDINGS_RTC_PCF85363_H
+
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_NORMAL0
+#define PCF85363_QUARTZDRIVE_LOW   1
+#define PCF85363_QUARTZDRIVE_HIGH  2
+
+#endif /* _DT_BINDINGS_RTC_PCF85363_H */
-- 
2.17.1

[2/2] rtc: pcf85263/pcf85363: support PM, wakeup device, improve performance

[Biwen Li]

Add some features as follow:
- Set quartz oscillator load capacitance by DT
  (generate more accuracy frequency)
- Set quartz oscillator drive control by DT
  (reduce/increase the current consumption)
- Set low jitter mode by DT
  (improve jitter performance)
- Set wakeup source by DT
  (wakeup device from suspend
- Select interrupt output pin by DT
  (INTA/TS(INTB)/NONE)
- Add power management
- Add ioctl to check rtc status
  (check whether oscillator of pcf85263/pcf85363 is stopped)

Datasheet url:
- https://www.nxp.com/docs/en/data-sheet/PCF85263A.pdf
- https://www.nxp.com/docs/en/data-sheet/PCF85363A.pdf

Signed-off-by: Martin Fuzzey 
Signed-off-by: Biwen Li 
---
 drivers/rtc/rtc-pcf85363.c | 287 +++--
 1 file changed, 274 insertions(+), 13 deletions(-)

diff --git a/drivers/rtc/rtc-pcf85363.c b/drivers/rtc/rtc-pcf85363.c
index a075e77617dc..f8916497efd4 100644
--- a/drivers/rtc/rtc-pcf85363.c
+++ b/drivers/rtc/rtc-pcf85363.c
@@ -18,6 +18,17 @@
 #include 
 #include 
 
+/* Quartz capacitance */
+#define PCF85363_QUARTZCAP_7pF 0
+#define PCF85363_QUARTZCAP_6pF 1
+#define PCF85363_QUARTZCAP_12p5pF  2
+
+/* Quartz drive strength */
+#define PCF85363_QUARTZDRIVE_NORMAL0
+#define PCF85363_QUARTZDRIVE_LOW   1
+#define PCF85363_QUARTZDRIVE_HIGH  2
+
+
 /*
  * Date/Time registers
  */
@@ -96,10 +107,20 @@
 #define FLAGS_PIF  BIT(7)
 
 #define PIN_IO_INTAPM  GENMASK(1, 0)
-#define PIN_IO_INTA_CLK0
-#define PIN_IO_INTA_BAT1
-#define PIN_IO_INTA_OUT2
-#define PIN_IO_INTA_HIZ3
+#define PIN_IO_INTAPM_SHIFT0
+#define PIN_IO_INTA_CLK(0 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_BAT(1 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_OUT(2 << PIN_IO_INTAPM_SHIFT)
+#define PIN_IO_INTA_HIZ(3 << PIN_IO_INTAPM_SHIFT)
+
+#define PIN_IO_TSPM GENMASK(3, 2)
+#define PIN_IO_TSPM_SHIFT  2
+#define PIN_IO_TS_DISABLE  (0x0 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_INTB_OUT (0x1 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_CLK_OUT  (0x2 << PIN_IO_TSPM_SHIFT)
+#define PIN_IO_TS_IN   (0x3 << PIN_IO_TSPM_SHIFT)
+
+#define PIN_IO_CLKPM   BIT(7) /* 0 = enable CLK pin,1 = disable CLK pin */
 
 #define STOP_EN_STOP   BIT(0)
 
@@ -107,9 +128,35 @@
 
 #define NVRAM_SIZE 0x40
 
+#define DT_SECS_OS BIT(7)
+
+#define CTRL_OSCILLATOR_CL_MASKGENMASK(1, 0)
+#define CTRL_OSCILLATOR_CL_SHIFT   0
+#define CTRL_OSCILLATOR_OSCD_MASK  GENMASK(3, 2)
+#define CTRL_OSCILLATOR_OSCD_SHIFT 2
+#define CTRL_OSCILLATOR_LOWJ   BIT(4)
+
+#define CTRL_FUNCTION_COF_OFF  0x7 /* No clock output */
+
+enum pcf85363_irqpin {
+   IRQPIN_NONE,
+   IRQPIN_INTA,
+   IRQPIN_INTB
+};
+
+static const char *const pcf85363_irqpin_names[] = {
+   [IRQPIN_NONE] = "NONE",
+   [IRQPIN_INTA] = "INTA",
+   [IRQPIN_INTB] = "INTB"
+};
+
+
 struct pcf85363 {
+   struct device *dev;
struct rtc_device   *rtc;
struct regmap   *regmap;
+   enum pcf85363_irqpin irq_pin;
+   int irq;
 };
 
 struct pcf85x63_config {
@@ -205,14 +252,29 @@ static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 
*pcf85363, unsigned
 {
unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
   ALRM_DAY_A1E | ALRM_MON_A1E;
-   int ret;
+   int ret, reg;
 
ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
 enabled ? alarm_flags : 0);
if (ret)
return ret;
 
-   ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
+   switch (pcf85363->irq_pin) {
+   case IRQPIN_NONE:
+   return 0;
+
+   case IRQPIN_INTA:
+   reg = CTRL_INTA_EN;
+   break;
+
+   case IRQPIN_INTB:
+   reg = CTRL_INTB_EN;
+   break;
+
+   default:
+   return -EINVAL;
+   }
+   ret = regmap_update_bits(pcf85363->regmap, reg,
 INT_A1IE, enabled ? INT_A1IE : 0);
 
if (ret || enabled)
@@ -277,12 +339,55 @@ static irqreturn_t pcf85363_rtc_handle_irq(int irq, void 
*dev_id)
return IRQ_NONE;
 }
 
+static int pcf85363_osc_is_stopped(struct pcf85363 *pcf85363)
+{
+   unsigned int regval;
+   int ret;
+
+   ret = regmap_read(pcf85363->regmap, DT_SECS, );
+   if (ret)
+   return ret;
+
+   ret = regval & DT_SECS_OS ? 1 : 0;
+   if (ret)
+   dev_warn(pcf85363->dev, "Oscillator stop detected, date/time is 
not reliable.\n");
+
+   return ret;
+}
+
+static int pcf85363_ioctl(struct device *dev,
+ unsigned int cmd, unsigned long arg)
+{
+   struct pcf85363 *pcf85363 =