[PATCH 1/7] crypto: sun4i-ss: linearize buffers content must be kept
When running the non-optimized cipher function, SS produce partial random
output.
This is due to linearize buffers being reseted after each loop.
Fixes: 8d3bcb9900ca ("crypto: sun4i-ss - reduce stack usage")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index b72de8939497..b92d175b5d2a 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -163,6 +163,8 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
unsigned int todo;
struct sg_mapping_iter mi, mo;
unsigned int oi, oo;/* offset for in and out */
+ char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */
+ char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */
unsigned int ob = 0;/* offset in buf */
unsigned int obo = 0; /* offset in bufo*/
unsigned int obl = 0; /* length of data in bufo */
@@ -233,8 +235,6 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
while (oleft) {
if (ileft) {
- char buf[4 * SS_RX_MAX];/* buffer for linearize SG src
*/
-
/*
* todo is the number of consecutive 4byte word that we
* can read from current SG
@@ -295,8 +295,6 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
oo = 0;
}
} else {
- char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG
dst */
-
/*
* read obl bytes in bufo, we read at maximum for
* emptying the device
--
2.26.2
[PATCH 5/7] crypto: sun4i-ss: initialize need_fallback
The need_fallback is never initialized and seem to be always true at runtime.
So all hardware operations are always bypassed.
Fixes: 0ae1f46c55f87 ("crypto: sun4i-ss - fallback when length is not multiple
of blocksize")
Cc:
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index d66bb9cf657c..c21a1a0a8b16 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -181,7 +181,7 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
unsigned int obo = 0; /* offset in bufo*/
unsigned int obl = 0; /* length of data in bufo */
unsigned long flags;
- bool need_fallback;
+ bool need_fallback = false;
if (!areq->cryptlen)
return 0;
--
2.26.2
[PATCH 4/7] crypto: sun4i-ss: handle BigEndian for cipher
Ciphers produce invalid results on BE.
Key and IV need to be written in LE.
Furthermore, the non-optimized function is too complicated to convert,
let's simply fallback on BE for the moment.
Fixes: 6298e948215f2 ("crypto: sunxi-ss - Add Allwinner Security System crypto
accelerator")
Cc:
Signed-off-by: Corentin Labbe
---
.../crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index c6c25204780d..d66bb9cf657c 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -52,13 +52,13 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct
skcipher_request *areq)
spin_lock_irqsave(>slock, flags);
- for (i = 0; i < op->keylen; i += 4)
- writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
+ for (i = 0; i < op->keylen / 4; i++)
+ writel(cpu_to_le32(op->key[i]), ss->base + SS_KEY0 + i * 4);
if (areq->iv) {
for (i = 0; i < 4 && i < ivsize / 4; i++) {
v = *(u32 *)(areq->iv + i * 4);
- writel(v, ss->base + SS_IV0 + i * 4);
+ writel(cpu_to_le32(v), ss->base + SS_IV0 + i * 4);
}
}
writel(mode, ss->base + SS_CTL);
@@ -213,6 +213,11 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
if (no_chunk == 1 && !need_fallback)
return sun4i_ss_opti_poll(areq);
+/* The non aligned function does not work on BE. Probably due to buf/bufo
handling.*/
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ need_fallback = true;
+#endif
+
if (need_fallback)
return sun4i_ss_cipher_poll_fallback(areq);
@@ -225,13 +230,13 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
spin_lock_irqsave(>slock, flags);
- for (i = 0; i < op->keylen; i += 4)
- writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
+ for (i = 0; i < op->keylen / 4; i++)
+ writel(cpu_to_le32(op->key[i]), ss->base + SS_KEY0 + i * 4);
if (areq->iv) {
for (i = 0; i < 4 && i < ivsize / 4; i++) {
v = *(u32 *)(areq->iv + i * 4);
- writel(v, ss->base + SS_IV0 + i * 4);
+ writel(cpu_to_le32(v), ss->base + SS_IV0 + i * 4);
}
}
writel(mode, ss->base + SS_CTL);
--
2.26.2
[PATCH 7/7] crypto: sun4i-ss: add SPDX header and remove blank lines
This patchs fixes some remaining style issue.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c | 3 ---
drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c | 1 +
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index be6599220e9d..2011aa4f0415 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -137,7 +137,6 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct
skcipher_request *areq)
return err;
}
-
static int noinline_for_stack sun4i_ss_cipher_poll_fallback(struct
skcipher_request *areq)
{
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
@@ -549,7 +548,6 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm)
sizeof(struct sun4i_cipher_req_ctx) +
crypto_skcipher_reqsize(op->fallback_tfm));
-
err = pm_runtime_get_sync(op->ss->dev);
if (err < 0)
goto error_pm;
@@ -636,5 +634,4 @@ int sun4i_ss_des3_setkey(struct crypto_skcipher *tfm, const
u8 *key,
crypto_skcipher_set_flags(op->fallback_tfm, tfm->base.crt_flags &
CRYPTO_TFM_REQ_MASK);
return crypto_skcipher_setkey(op->fallback_tfm, key, keylen);
-
}
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c
index 102f8a90ce0f..4d1610952e90 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-prng.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
#include "sun4i-ss.h"
int sun4i_ss_prng_seed(struct crypto_rng *tfm, const u8 *seed,
--
2.26.2
[PATCH 0/7] crypto: sun4i-ss: prevent always fallback for ciphers
Hello For help testing on "crypto: sun4i-ss - Fix sparse endianness markers", I have added "stats" support like other allwinner's crypto drivers. Seeing stats showed a clear problem, the ciphers function were not used at all. This is due to the not-inialized need_fallback which is "init" as true everytime. So basicly, since the patch introduced it, this probem hidden some bugs. This serie fixes all hidden problems, then fix the initialization of "need_fallback" and then add the stats like other allwinner drivers. Corentin Labbe (7): crypto: sun4i-ss: linearize buffers content must be kept crypto: sun4i-ss: checking sg length is not sufficient crypto: sun4i-ss: IV register does not work on A10 and A13 crypto: sun4i-ss: handle BigEndian for cipher crypto: sun4i-ss: initialize need_fallback crypto: sun4i-ss: enabled stats via debugfs crypto: sun4i-ss: add SPDX header and remove blank lines drivers/crypto/allwinner/Kconfig | 9 ++ .../allwinner/sun4i-ss/sun4i-ss-cipher.c | 87 ++- .../crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 54 .../crypto/allwinner/sun4i-ss/sun4i-ss-hash.c | 8 ++ .../crypto/allwinner/sun4i-ss/sun4i-ss-prng.c | 6 ++ drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h | 11 +++ 6 files changed, 153 insertions(+), 22 deletions(-) -- 2.26.2
[PATCH 6/7] crypto: sun4i-ss: enabled stats via debugfs
This patch enable to access usage stats for each algorithm.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 9
.../allwinner/sun4i-ss/sun4i-ss-cipher.c | 21
.../crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 54 +++
.../crypto/allwinner/sun4i-ss/sun4i-ss-hash.c | 8 +++
.../crypto/allwinner/sun4i-ss/sun4i-ss-prng.c | 5 ++
drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h | 11
6 files changed, 108 insertions(+)
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 0e72543ad1f1..e9b7f7e3d307 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -51,6 +51,15 @@ config CRYPTO_DEV_SUN4I_SS_PRNG
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Security System.
+config CRYPTO_DEV_SUN4I_SS_DEBUG
+ bool "Enable sun4i-ss stats"
+ depends on CRYPTO_DEV_SUN4I_SS
+ depends on DEBUG_FS
+ help
+ Say y to enable sun4i-ss debug stats.
+ This will create /sys/kernel/debug/sun4i-ss/stats for displaying
+ the number of requests per algorithm.
+
config CRYPTO_DEV_SUN8I_CE
tristate "Support for Allwinner Crypto Engine cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index c21a1a0a8b16..be6599220e9d 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -34,6 +34,10 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct
skcipher_request *areq)
struct sg_mapping_iter mi, mo;
unsigned int oi, oo; /* offset for in and out */
unsigned long flags;
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG
+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+ struct sun4i_ss_alg_template *algt;
+#endif
if (!areq->cryptlen)
return 0;
@@ -50,6 +54,12 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct
skcipher_request *areq)
scatterwalk_map_and_copy(backup_iv, areq->src, areq->cryptlen -
ivsize, ivsize, 0);
}
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG
+ algt = container_of(alg, struct sun4i_ss_alg_template, alg.crypto);
+ algt->stat_opti++;
+ algt->stat_bytes += areq->cryptlen;
+#endif
+
spin_lock_irqsave(>slock, flags);
for (i = 0; i < op->keylen / 4; i++)
@@ -134,7 +144,13 @@ static int noinline_for_stack
sun4i_ss_cipher_poll_fallback(struct skcipher_requ
struct sun4i_tfm_ctx *op = crypto_skcipher_ctx(tfm);
struct sun4i_cipher_req_ctx *ctx = skcipher_request_ctx(areq);
int err;
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG
+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
+ struct sun4i_ss_alg_template *algt;
+ algt = container_of(alg, struct sun4i_ss_alg_template, alg.crypto);
+ algt->stat_fb++;
+#endif
skcipher_request_set_tfm(>fallback_req, op->fallback_tfm);
skcipher_request_set_callback(>fallback_req, areq->base.flags,
areq->base.complete, areq->base.data);
@@ -228,6 +244,11 @@ static int sun4i_ss_cipher_poll(struct skcipher_request
*areq)
scatterwalk_map_and_copy(backup_iv, areq->src, areq->cryptlen -
ivsize, ivsize, 0);
}
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG
+ algt->stat_req++;
+ algt->stat_bytes += areq->cryptlen;
+#endif
+
spin_lock_irqsave(>slock, flags);
for (i = 0; i < op->keylen / 4; i++)
diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
index a2b67f7f8a81..d044eb8f88b6 100644
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
@@ -234,6 +234,53 @@ static struct sun4i_ss_alg_template ss_algs[] = {
#endif
};
+#ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG
+static int sun4i_ss_dbgfs_read(struct seq_file *seq, void *v)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
+ if (!ss_algs[i].ss)
+ continue;
+ switch (ss_algs[i].type) {
+ case CRYPTO_ALG_TYPE_SKCIPHER:
+ seq_printf(seq, "%s %s reqs=%lu opti=%lu fallback=%lu
tsize=%lu\n",
+ ss_algs[i].alg.crypto.base.cra_driver_name,
+ ss_algs[i].alg.crypto.base.cra_name,
+ ss_algs[i].stat_req, ss_algs[i].stat_opti,
ss_algs[i].stat_fb,
+ ss_algs[i].stat_bytes);
+ break;
+ case CRYPTO_ALG_TYPE_RNG:
+
Re: [PATCH v2 4/4] crypto: allwinner/sun8i - Simplify with dev_err_probe()
On Thu, Sep 10, 2020 at 09:29:19PM +0200, Krzysztof Kozlowski wrote:
> Common pattern of handling deferred probe can be simplified with
> dev_err_probe(). Less code and the error value gets printed.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Changes since v1:
> 1. None
> ---
> drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 +++--
> drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 9 +++--
> 2 files changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> index 138759dc8190..e3c62051c595 100644
> --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> @@ -573,12 +573,9 @@ static int sun8i_ce_probe(struct platform_device *pdev)
> return irq;
>
> ce->reset = devm_reset_control_get(>dev, NULL);
> - if (IS_ERR(ce->reset)) {
> - if (PTR_ERR(ce->reset) == -EPROBE_DEFER)
> - return PTR_ERR(ce->reset);
> - dev_err(>dev, "No reset control found\n");
> - return PTR_ERR(ce->reset);
> - }
> + if (IS_ERR(ce->reset))
> + return dev_err_probe(>dev, PTR_ERR(ce->reset),
> + "No reset control found\n");
>
> mutex_init(>mlock);
>
> diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
> b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
> index 9a23515783a6..576df8c8df51 100644
> --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
> +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
> @@ -545,12 +545,9 @@ static int sun8i_ss_probe(struct platform_device *pdev)
> return irq;
>
> ss->reset = devm_reset_control_get(>dev, NULL);
> - if (IS_ERR(ss->reset)) {
> - if (PTR_ERR(ss->reset) == -EPROBE_DEFER)
> - return PTR_ERR(ss->reset);
> - dev_err(>dev, "No reset control found\n");
> - return PTR_ERR(ss->reset);
> - }
> + if (IS_ERR(ss->reset))
> + return dev_err_probe(>dev, PTR_ERR(ss->reset),
> + "No reset control found\n");
>
> mutex_init(>mlock);
>
> --
> 2.17.1
>
Hello
Acked-by: Corentin Labbe
Tested-by: Corentin Labbe
Thanks
Re: [v2 PATCH] crypto: sun4i-ss - Fix sparse endianness markers
On Fri, Sep 11, 2020 at 02:13:55PM +1000, Herbert Xu wrote: > On Thu, Sep 10, 2020 at 02:22:48PM +0200, Corentin Labbe wrote: > > > > I get some md5 error on both A20+BE: > > alg: ahash: md5 test failed (wrong result) on test vector \"random: > > psize=129 ksize=0\", cfg=\"random: inplace use_finup nosimd > > src_divs=[85.99%@+3999, 5.85%@+30, 0.96%@+25, > > 5.9%@+2263, 2.11%@+1950] iv_offset=2 > > key_offset=43\" > > and A33+BE: > > [ 84.469045] alg: ahash: md5 test failed (wrong result) on test vector > > \"random: psize=322 ksize=0\", cfg=\"random: inplace may_sleep use_finup > > src_divs=[99.1%@+2668, 0.88%@alignmask+3630, > > 0.11%@+3403] iv_offset=33\" > > +[ 84.469074] need:35966fc8 b31ea266 2bf064e9 f20f40ad > > +[ 84.469084] have:e29e4491 f3b6effc fa366691 00e04bd9 > > > > Thoses errors are random. (1 boot out of 2) > > Do these really go away without this patch applied? AFAICS the > generated code should be identical. > I got this on next-20200910/multi_v7_defconfig BigEndian [ 12.137856] alg: hash: skipping comparison tests for md5-sun4i-ss because md5-generic is unavailable md5-sun4i-ss md5 reqs=763 [ 98.286632] alg: ahash: md5 test failed (wrong result) on test vector \"random: psize=65 ksize=0\", cfg=\"random: use_finup src_divs=[95.28%@+1052, 0.61%@+4046, 0.87%@+24, 3.24%@+542] key_offset=54\" So sun4i-ss is not involved. Strangely /proc/crypto show: name : md5 driver : md5-generic module : md5 priority : 0 refcnt : 1 selftest : passed internal : no type : shash blocksize: 64 digestsize : 16 and I didnt see anything failed/unknow in /proc/crypto Why the failed algorithm is not visible ?
Re: [v2 PATCH] crypto: sun4i-ss - Fix sparse endianness markers
On Fri, Sep 11, 2020 at 02:13:55PM +1000, Herbert Xu wrote: > On Thu, Sep 10, 2020 at 02:22:48PM +0200, Corentin Labbe wrote: > > > > I get some md5 error on both A20+BE: > > alg: ahash: md5 test failed (wrong result) on test vector \"random: > > psize=129 ksize=0\", cfg=\"random: inplace use_finup nosimd > > src_divs=[85.99%@+3999, 5.85%@+30, 0.96%@+25, > > 5.9%@+2263, 2.11%@+1950] iv_offset=2 > > key_offset=43\" > > and A33+BE: > > [ 84.469045] alg: ahash: md5 test failed (wrong result) on test vector > > \"random: psize=322 ksize=0\", cfg=\"random: inplace may_sleep use_finup > > src_divs=[99.1%@+2668, 0.88%@alignmask+3630, > > 0.11%@+3403] iv_offset=33\" > > +[ 84.469074] need:35966fc8 b31ea266 2bf064e9 f20f40ad > > +[ 84.469084] have:e29e4491 f3b6effc fa366691 00e04bd9 > > > > Thoses errors are random. (1 boot out of 2) > > Do these really go away without this patch applied? AFAICS the > generated code should be identical. > It happens without your patch, so your patch is unrelated to this issue. You can add: Tested-by: Corentin Labbe Acked-by: Corentin Labbe
Re: [v2 PATCH] crypto: sun4i-ss - Fix sparse endianness markers
On Tue, Sep 08, 2020 at 03:00:36PM +1000, Herbert Xu wrote:
> On Mon, Sep 07, 2020 at 06:00:29PM +0200, Corentin Labbe wrote:
> >
> > The put_unaligned should be _le32.
> >
> > This fix the modprobe tcrypt fail.
>
> Thanks. Yes the original code was correct.
>
> ---8<---
> This patch also fixes the incorrect endianness markings in the
> sun4i-ss driver. It should have no effect in the genereated code.
>
> Instead of using cpu_to_Xe32 followed by a memcpy, this patch
> converts the final hash write to use put_unaligned_X instead.
>
> Reported-by: kernel test robot
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> index dc35edd90034..1dff48558f53 100644
> --- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> +++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> @@ -9,6 +9,7 @@
> * You could find the datasheet in Documentation/arm/sunxi.rst
> */
> #include "sun4i-ss.h"
> +#include
> #include
>
> /* This is a totally arbitrary value */
> @@ -196,7 +197,7 @@ static int sun4i_hash(struct ahash_request *areq)
> struct sg_mapping_iter mi;
> int in_r, err = 0;
> size_t copied = 0;
> - __le32 wb = 0;
> + u32 wb = 0;
>
> dev_dbg(ss->dev, "%s %s bc=%llu len=%u mode=%x wl=%u h0=%0x",
> __func__, crypto_tfm_alg_name(areq->base.tfm),
> @@ -408,7 +409,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> nbw = op->len - 4 * nwait;
> if (nbw) {
> - wb = cpu_to_le32(*(u32 *)(op->buf + nwait * 4));
> + wb = le32_to_cpup((__le32 *)(op->buf + nwait * 4));
> wb &= GENMASK((nbw * 8) - 1, 0);
>
> op->byte_count += nbw;
> @@ -417,7 +418,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> /* write the remaining bytes of the nbw buffer */
> wb |= ((1 << 7) << (nbw * 8));
> - bf[j++] = le32_to_cpu(wb);
> + ((__le32 *)bf)[j++] = cpu_to_le32(wb);
>
> /*
>* number of space to pad to obtain 64o minus 8(size) minus 4 (final 1)
> @@ -479,16 +480,16 @@ static int sun4i_hash(struct ahash_request *areq)
> /* Get the hash from the device */
> if (op->mode == SS_OP_SHA1) {
> for (i = 0; i < 5; i++) {
> + v = readl(ss->base + SS_MD0 + i * 4);
> if (ss->variant->sha1_in_be)
> - v = cpu_to_le32(readl(ss->base + SS_MD0 + i *
> 4));
> + put_unaligned_le32(v, areq->result + i * 4);
> else
> - v = cpu_to_be32(readl(ss->base + SS_MD0 + i *
> 4));
> - memcpy(areq->result + i * 4, , 4);
> + put_unaligned_be32(v, areq->result + i * 4);
> }
> } else {
> for (i = 0; i < 4; i++) {
> - v = cpu_to_le32(readl(ss->base + SS_MD0 + i * 4));
> - memcpy(areq->result + i * 4, , 4);
> + v = readl(ss->base + SS_MD0 + i * 4);
> + put_unaligned_le32(v, areq->result + i * 4);
> }
> }
>
I get some md5 error on both A20+BE:
alg: ahash: md5 test failed (wrong result) on test vector \"random: psize=129
ksize=0\", cfg=\"random: inplace use_finup nosimd
src_divs=[85.99%@+3999, 5.85%@+30, 0.96%@+25,
5.9%@+2263, 2.11%@+1950] iv_offset=2
key_offset=43\"
and A33+BE:
[ 84.469045] alg: ahash: md5 test failed (wrong result) on test vector
\"random: psize=322 ksize=0\", cfg=\"random: inplace may_sleep use_finup
src_divs=[99.1%@+2668, 0.88%@alignmask+3630, 0.11%@+3403]
iv_offset=33\"
+[ 84.469074] need:35966fc8 b31ea266 2bf064e9 f20f40ad
+[ 84.469084] have:e29e4491 f3b6effc fa366691 00e04bd9
Thoses errors are random. (1 boot out of 2)
The ahash-md5-sun4i-ss is set as "selftest: passed" and I didnt see any
failling/absent test in /proc/crypto
So what is this md5 which fail ?
I am still investigating and will try on more platform.
[PATCH v3] dt-bindings: crypto: Specify that allwinner,sun8i-a33-crypto needs reset
When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
Furthermore, there are no need to use items to list only one compatible
in compatible list.
Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS")
Signed-off-by: Corentin Labbe
---
Change since v2:
- fixed enum syntax
Change since v1:
- use an enum for adding allwinner,sun8i-a33-crypto to "reset list"
.../bindings/crypto/allwinner,sun4i-a10-crypto.yaml| 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
index fc823572bcff..90c6d039b91b 100644
--- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
@@ -23,8 +23,7 @@ properties:
- items:
- const: allwinner,sun7i-a20-crypto
- const: allwinner,sun4i-a10-crypto
- - items:
- - const: allwinner,sun8i-a33-crypto
+ - const: allwinner,sun8i-a33-crypto
reg:
maxItems: 1
@@ -59,7 +58,9 @@ if:
properties:
compatible:
contains:
-const: allwinner,sun6i-a31-crypto
+enum:
+ - allwinner,sun6i-a31-crypto
+ - allwinner,sun8i-a33-crypto
then:
required:
--
2.26.2
Re: [PATCH] crypto: sun4i-ss - Fix SHA1 hash on A33-variant with BE CPU
On Mon, Sep 07, 2020 at 04:24:00PM +1000, Herbert Xu wrote:
> On Sun, Sep 06, 2020 at 04:52:24PM +0800, kernel test robot wrote:
> >
> > >> drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > >> sparse: incorrect type in assignment (different base types) @@
> > >> expected unsigned int [assigned] [usertype] v @@ got restricted
> > >> __le32 [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > expected unsigned int [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > got restricted __le32 [usertype]
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > sparse: incorrect type in assignment (different base types) @@ expected
> > unsigned int [assigned] [usertype] v @@ got restricted __be32
> > [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > expected unsigned int [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > got restricted __be32 [usertype]
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > sparse: incorrect type in assignment (different base types) @@ expected
> > unsigned int [addressable] [assigned] [usertype] v @@ got restricted
> > __le32 [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > expected unsigned int [addressable] [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > got restricted __le32 [usertype]
>
> This appears to be a genuine bug, on big-endian CPUs at least.
>
> ---8<---
> When the hash is written out on the A33 variant, it is incorrectly
> swabbed on big-endian CPUs, when it should simply be written out as
> is because it's already in the right format. This was caught by
> sparse warnings.
>
> Instead of using cpu_to_Xe32 followed by a memcpy, this patch
> converts the final hash write to use put_unaligned instead. This
> simplifies the code and makes the A33 variant handling a lot clearer.
>
> This patch also fixes the incorrect endianness marking on wb,
> although this should have no effect in the genereated code.
>
> Fixes: 1e02e6fbdadb ("crypto: sun4i-ss - add the A33 variant of SS")
> Reported-by: kernel test robot
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> index dc35edd90034..84f7921de577 100644
> --- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> +++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> @@ -9,6 +9,7 @@
> * You could find the datasheet in Documentation/arm/sunxi.rst
> */
> #include "sun4i-ss.h"
> +#include
> #include
>
> /* This is a totally arbitrary value */
> @@ -196,7 +197,7 @@ static int sun4i_hash(struct ahash_request *areq)
> struct sg_mapping_iter mi;
> int in_r, err = 0;
> size_t copied = 0;
> - __le32 wb = 0;
> + u32 wb = 0;
>
> dev_dbg(ss->dev, "%s %s bc=%llu len=%u mode=%x wl=%u h0=%0x",
> __func__, crypto_tfm_alg_name(areq->base.tfm),
> @@ -408,7 +409,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> nbw = op->len - 4 * nwait;
> if (nbw) {
> - wb = cpu_to_le32(*(u32 *)(op->buf + nwait * 4));
> + wb = le32_to_cpup((__le32 *)(op->buf + nwait * 4));
> wb &= GENMASK((nbw * 8) - 1, 0);
>
> op->byte_count += nbw;
> @@ -417,7 +418,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> /* write the remaining bytes of the nbw buffer */
> wb |= ((1 << 7) << (nbw * 8));
> - bf[j++] = le32_to_cpu(wb);
> + ((__le32 *)bf)[j++] = cpu_to_le32(wb);
>
> /*
>* number of space to pad to obtain 64o minus 8(size) minus 4 (final 1)
> @@ -479,16 +480,16 @@ static int sun4i_hash(struct ahash_request *areq)
> /* Get the hash from the device */
> if (op->mode == SS_OP_SHA1) {
> for (i = 0; i < 5; i++) {
> + v = readl(ss->base + SS_MD0 + i * 4);
> if (ss->variant->sha1_in_be)
> - v = cpu_to_le32(readl(ss->base + SS_MD0 + i *
> 4));
> + put_unaligned(v, areq->result + i * 4);
The put_unaligned should be _le32.
This fix the modprobe tcrypt fail.
Re: [PATCH] crypto: sun4i-ss - Fix SHA1 hash on A33-variant with BE CPU
On Mon, Sep 07, 2020 at 04:24:00PM +1000, Herbert Xu wrote:
> On Sun, Sep 06, 2020 at 04:52:24PM +0800, kernel test robot wrote:
> >
> > >> drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > >> sparse: incorrect type in assignment (different base types) @@
> > >> expected unsigned int [assigned] [usertype] v @@ got restricted
> > >> __le32 [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > expected unsigned int [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:483:35: sparse:
> > got restricted __le32 [usertype]
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > sparse: incorrect type in assignment (different base types) @@ expected
> > unsigned int [assigned] [usertype] v @@ got restricted __be32
> > [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > expected unsigned int [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:485:35: sparse:
> > got restricted __be32 [usertype]
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > sparse: incorrect type in assignment (different base types) @@ expected
> > unsigned int [addressable] [assigned] [usertype] v @@ got restricted
> > __le32 [usertype] @@
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > expected unsigned int [addressable] [assigned] [usertype] v
> >drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c:490:27: sparse:
> > got restricted __le32 [usertype]
>
> This appears to be a genuine bug, on big-endian CPUs at least.
>
> ---8<---
> When the hash is written out on the A33 variant, it is incorrectly
> swabbed on big-endian CPUs, when it should simply be written out as
> is because it's already in the right format. This was caught by
> sparse warnings.
>
> Instead of using cpu_to_Xe32 followed by a memcpy, this patch
> converts the final hash write to use put_unaligned instead. This
> simplifies the code and makes the A33 variant handling a lot clearer.
>
> This patch also fixes the incorrect endianness marking on wb,
> although this should have no effect in the genereated code.
>
> Fixes: 1e02e6fbdadb ("crypto: sun4i-ss - add the A33 variant of SS")
> Reported-by: kernel test robot
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> index dc35edd90034..84f7921de577 100644
> --- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> +++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-hash.c
> @@ -9,6 +9,7 @@
> * You could find the datasheet in Documentation/arm/sunxi.rst
> */
> #include "sun4i-ss.h"
> +#include
> #include
>
> /* This is a totally arbitrary value */
> @@ -196,7 +197,7 @@ static int sun4i_hash(struct ahash_request *areq)
> struct sg_mapping_iter mi;
> int in_r, err = 0;
> size_t copied = 0;
> - __le32 wb = 0;
> + u32 wb = 0;
>
> dev_dbg(ss->dev, "%s %s bc=%llu len=%u mode=%x wl=%u h0=%0x",
> __func__, crypto_tfm_alg_name(areq->base.tfm),
> @@ -408,7 +409,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> nbw = op->len - 4 * nwait;
> if (nbw) {
> - wb = cpu_to_le32(*(u32 *)(op->buf + nwait * 4));
> + wb = le32_to_cpup((__le32 *)(op->buf + nwait * 4));
> wb &= GENMASK((nbw * 8) - 1, 0);
>
> op->byte_count += nbw;
> @@ -417,7 +418,7 @@ static int sun4i_hash(struct ahash_request *areq)
>
> /* write the remaining bytes of the nbw buffer */
> wb |= ((1 << 7) << (nbw * 8));
> - bf[j++] = le32_to_cpu(wb);
> + ((__le32 *)bf)[j++] = cpu_to_le32(wb);
>
> /*
>* number of space to pad to obtain 64o minus 8(size) minus 4 (final 1)
> @@ -479,16 +480,16 @@ static int sun4i_hash(struct ahash_request *areq)
> /* Get the hash from the device */
> if (op->mode == SS_OP_SHA1) {
> for (i = 0; i < 5; i++) {
> + v = readl(ss->base + SS_MD0 + i * 4);
> if (ss->variant->sha1_in_be)
> - v = cpu_to_le32(readl(ss->base + SS_MD0 + i *
> 4));
> + put_unaligned(v, areq->result + i * 4);
> else
> - v = cpu_to_be32(readl(ss->base + SS_MD0 + i *
> 4));
> - memcpy(areq->result + i * 4, , 4);
> + put_unaligned_be32(v, areq->result + i * 4);
> }
> } else {
> for (i = 0; i < 4; i++) {
> - v = cpu_to_le32(readl(ss->base + SS_MD0 + i * 4));
> - memcpy(areq->result + i * 4, , 4);
> + v = readl(ss->base + SS_MD0 + i * 4);
> +
Re: [linux-sunxi] Re: [PATCH v6 18/18] crypto: sun8i-ce: fix some style issue
On Fri, Sep 04, 2020 at 12:37:19PM -0700, Joe Perches wrote: > On Fri, 2020-09-04 at 11:10 +0000, Corentin Labbe wrote: > > This patch fix a double empty line issue reported by checkpatch. > > While at it, since now the maximum line length is now 100, reorder some > > wrapped line. > [] > > diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c > > b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c > [] > > @@ -164,12 +164,10 @@ static int sun8i_ce_cipher_prepare(struct > > crypto_engine *engine, void *async_req > > goto theend_key; > > } > > offset = areq->cryptlen - ivsize; > > - scatterwalk_map_and_copy(rctx->backup_iv, areq->src, > > -offset, ivsize, 0); > > + scatterwalk_map_and_copy(rctx->backup_iv, areq->src, > > offset, ivsize, 0); > > } > > memcpy(rctx->bounce_iv, areq->iv, ivsize); > > - addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen, > > -DMA_TO_DEVICE); > > + addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen, > > DMA_TO_DEVICE); > > coding-style.rst: > >Statements longer than 80 columns should be broken into sensible chunks, >unless exceeding 80 columns significantly increases readability and does >not hide information. > > Do these longer lines make the code significantly more readable? > I don't think they do. > Oh I saw the increase in checkpatch.pl but didnt saw that it was still 80 in coding-style.rst. Anyway as maintainer of this driver, I prefer unwrapped lines. I let Herbert to choose to apply the serie without this last patch or not.
[PATCH v6 15/18] crypto: sun8i-ce: Add support for the TRNG
This patch had support for the TRNG present in the CE.
Note that according to the algorithm ID, 2 version of the TRNG exists,
the first present in H3/H5/R40/A64 and the second present in H6.
This patch adds support for both, but only the second is working
reliabily according to rngtest.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 ++
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 18 +++
.../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 127 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 18 +++
5 files changed, 172 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index bf4d2a6328dc..0e72543ad1f1 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -96,6 +96,14 @@ config CRYPTO_DEV_SUN8I_CE_PRNG
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Crypto Engine.
+config CRYPTO_DEV_SUN8I_CE_TRNG
+ bool "Support for Allwinner Crypto Engine TRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select HW_RANDOM
+ help
+ Select this option if you want to provide kernel-side support for
+ the True Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index c0ea81da2c7d..0842eb2d9408 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG) += sun8i-ce-trng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 9b7f8fdc4992..116425e3d2b9 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -47,6 +47,7 @@ static const struct ce_variant ce_h3_variant = {
},
.esr = ESR_H3,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h5_variant = {
@@ -63,6 +64,7 @@ static const struct ce_variant ce_h5_variant = {
},
.esr = ESR_H5,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h6_variant = {
@@ -76,6 +78,7 @@ static const struct ce_variant ce_h6_variant = {
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
.prng_t_dlen_in_bytes = true,
+ .trng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -83,6 +86,7 @@ static const struct ce_variant ce_h6_variant = {
},
.esr = ESR_H6,
.prng = CE_ALG_PRNG_V2,
+ .trng = CE_ALG_TRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -99,6 +103,7 @@ static const struct ce_variant ce_a64_variant = {
},
.esr = ESR_A64,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_r40_variant = {
@@ -115,6 +120,7 @@ static const struct ce_variant ce_r40_variant = {
},
.esr = ESR_R40,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
/*
@@ -589,6 +595,10 @@ static int sun8i_ce_dbgfs_read(struct seq_file *seq, void
*v)
break;
}
}
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ seq_printf(seq, "HWRNG %lu %lu\n",
+ ce->hwrng_stat_req, ce->hwrng_stat_bytes);
+#endif
return 0;
}
@@ -939,6 +949,10 @@ static int sun8i_ce_probe(struct platform_device *pdev)
if (err < 0)
goto error_alg;
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_register(ce);
+#endif
+
v = readl(ce->base + CE_CTR);
v >>= CE_DIE_ID_SHIFT;
v &= CE_DIE_ID_MASK;
@@ -968,6 +982,10 @@ static int sun8i_ce_remove(struct platform_device *pdev)
{
struct sun8i_ce_dev *ce = platform_get_drvdata(pdev);
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_unregister(ce);
+#endif
+
sun8i_ce_unregister_algs(ce);
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
new file mode 100644
index ..af9
[PATCH v6 02/18] crypto: sun8i-ss: Add support for the PRNG
This patch had support for the PRNG present in the SS.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 39
.../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 173 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 25 +++
5 files changed, 246 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 96fed786ee75..b5f4f1c090ce 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -104,3 +104,11 @@ config CRYPTO_DEV_SUN8I_SS_DEBUG
Say y to enable sun8i-ss debug stats.
This will create /sys/kernel/debug/sun8i-ss/stats for displaying
the number of requests per flow and per algorithm.
+
+config CRYPTO_DEV_SUN8I_SS_PRNG
+ bool "Support for Allwinner Security System PRNG"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Security System.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index add7b0543fd5..49f2f912c816 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 97012128385f..ae8321f9a1db 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ss.h"
@@ -264,6 +265,25 @@ static struct sun8i_ss_alg_template ss_algs[] = {
.decrypt= sun8i_ss_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ss-prng",
+ .cra_priority = 300,
+ .cra_ctxsize = sizeof(struct sun8i_ss_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_prng_init,
+ .cra_exit = sun8i_ss_prng_exit,
+ },
+ .generate = sun8i_ss_prng_generate,
+ .seed = sun8i_ss_prng_seed,
+ .seedsize = PRNG_SEED_SIZE,
+ }
+},
+#endif
};
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
@@ -285,6 +305,12 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ seq_printf(seq, "%s %s %lu %lu\n",
+ ss_algs[i].alg.rng.base.cra_driver_name,
+ ss_algs[i].alg.rng.base.cra_name,
+ ss_algs[i].stat_req, ss_algs[i].stat_bytes);
+ break;
}
}
return 0;
@@ -448,6 +474,14 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
return err;
}
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ err = crypto_register_rng(_algs[i].alg.rng);
+ if (err) {
+ dev_err(ss->dev, "Fail to register %s\n",
+ ss_algs[i].alg.rng.base.cra_name);
+ ss_algs[i].ss = NULL;
+ }
+ break;
default:
ss_algs[i].ss = NULL;
dev_err(ss->dev, "ERROR: tried to register an unknown
algo\n");
@@ -469,6 +503,11 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev
*ss)
ss_algs[i].alg.skcipher.base.cra_name);
crypto_unregister_skcipher(_algs[i].alg.skcipher);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ dev_info(ss->dev, "Unregister %d %s\n", i,
+
[PATCH v6 03/18] crypto: sun8i-ss: support hash algorithms
The SS support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224 and SHA256.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 9 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 155 ++
.../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 444 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 58 +++
5 files changed, 667 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index b5f4f1c090ce..b346850a91b9 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -112,3 +112,12 @@ config CRYPTO_DEV_SUN8I_SS_PRNG
help
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Security System.
+
+config CRYPTO_DEV_SUN8I_SS_HASH
+ bool "Enable support for hash on sun8i-ss"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select MD5
+ select SHA1
+ select SHA256
+ help
+ Say y to enable support for hash algorithms.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index 49f2f912c816..aabfd893c817 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_HASH) += sun8i-ss-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index ae8321f9a1db..5cf00d03be1f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -41,6 +41,8 @@ static const struct ss_variant ss_a80_variant = {
static const struct ss_variant ss_a83t_variant = {
.alg_cipher = { SS_ALG_AES, SS_ALG_DES, SS_ALG_3DES,
},
+ .alg_hash = { SS_ALG_MD5, SS_ALG_SHA1, SS_ALG_SHA224, SS_ALG_SHA256,
+ },
.op_mode = { SS_OP_ECB, SS_OP_CBC,
},
.ss_clks = {
@@ -284,6 +286,128 @@ static struct sun8i_ss_alg_template ss_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+ .cra_name = "md5",
+ .cra_driver_name = "md5-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+ .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct
sun8i_ss_hash_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_hash_crainit,
+ .cra_exit = sun8i_ss_hash_craexit,
+ }
+ }
+ }
+},
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_SHA1,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = SHA1_DIGEST_SIZE,
+ .statesize = sizeof(struct sha1_state),
+ .base = {
+ .cra_name = "sha1",
+ .cra_driver_name = "sha1-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+
[PATCH v6 04/18] crypto: sun8i-ss: fix a trivial typo
This fixes a trivial typo.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 377ea7acb54d..da71d8059019 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -100,7 +100,7 @@ struct ss_clock {
* @alg_hash: list of supported hashes. for each SS_ID_ this will give the
* corresponding SS_ALG_XXX value
* @op_mode: list of supported block modes
- * @ss_clks! list of clock needed by this variant
+ * @ss_clks: list of clock needed by this variant
*/
struct ss_variant {
char alg_cipher[SS_ID_CIPHER_MAX];
--
2.26.2
[PATCH v6 05/18] crypto: sun8i-ss: Add more comment on some structures
This patch adds some comment on structures used by sun8i-ss.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index da71d8059019..1a66457f4a20 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -195,6 +195,8 @@ struct sun8i_cipher_req_ctx {
* @keylen:len of the key
* @ss:pointer to the private data of driver handling
this TFM
* @fallback_tfm: pointer to the fallback TFM
+ *
+ * enginectx must be the first element
*/
struct sun8i_cipher_tfm_ctx {
struct crypto_engine_ctx enginectx;
--
2.26.2
[PATCH v6 06/18] crypto: sun8i-ss: better debug printing
This patch reworks the way debug info are printed.
Instead of printing raw numbers, let's add a bit of context.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 5cf00d03be1f..739874596c72 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -424,19 +424,19 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
continue;
switch (ss_algs[i].type) {
case CRYPTO_ALG_TYPE_SKCIPHER:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.skcipher.base.cra_driver_name,
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
case CRYPTO_ALG_TYPE_RNG:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu tsize=%lu\n",
ss_algs[i].alg.rng.base.cra_driver_name,
ss_algs[i].alg.rng.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_bytes);
break;
case CRYPTO_ALG_TYPE_AHASH:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.hash.halg.base.cra_driver_name,
ss_algs[i].alg.hash.halg.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
--
2.26.2
[PATCH v6 17/18] crypto: sun8i-ss: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 739874596c72..c9cfe20b383d 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -414,7 +414,7 @@ static struct sun8i_ss_alg_template ss_algs[] = {
static int sun8i_ss_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ss_dev *ss = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ss->flows[i].stat_req);
@@ -571,7 +571,8 @@ static void sun8i_ss_pm_exit(struct sun8i_ss_dev *ss)
static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
{
- int ss_method, err, id, i;
+ int ss_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
ss_algs[i].ss = ss;
@@ -642,7 +643,7 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
static void sun8i_ss_unregister_algs(struct sun8i_ss_dev *ss)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
if (!ss_algs[i].ss)
--
2.26.2
[PATCH v6 10/18] crypto: sun8i-ce: handle different error registers
Error registers are different across SoCs.
This patch handle those difference.
Signed-off-by: Corentin Labbe
---
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 62 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 8 +++
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 08ed1ca12baf..65748dfa7a48 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -40,7 +40,8 @@ static const struct ce_variant ce_h3_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 5000, 0 },
- }
+ },
+ .esr = ESR_H3,
};
static const struct ce_variant ce_h5_variant = {
@@ -51,7 +52,8 @@ static const struct ce_variant ce_h5_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_H5,
};
static const struct ce_variant ce_h6_variant = {
@@ -64,7 +66,8 @@ static const struct ce_variant ce_h6_variant = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
- }
+ },
+ .esr = ESR_H6,
};
static const struct ce_variant ce_a64_variant = {
@@ -75,7 +78,8 @@ static const struct ce_variant ce_a64_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_A64,
};
static const struct ce_variant ce_r40_variant = {
@@ -86,7 +90,8 @@ static const struct ce_variant ce_r40_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_R40,
};
/*
@@ -102,6 +107,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
{
u32 v;
int err = 0;
+ struct ce_task *cet = ce->chanlist[flow].tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
ce->chanlist[flow].stat_req++;
@@ -131,19 +137,56 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
msecs_to_jiffies(ce->chanlist[flow].timeout));
if (ce->chanlist[flow].status == 0) {
- dev_err(ce->dev, "DMA timeout for %s\n", name);
+ dev_err(ce->dev, "DMA timeout for %s (tm=%d) on flow %d\n",
name,
+ ce->chanlist[flow].timeout, flow);
err = -EFAULT;
}
/* No need to lock for this read, the channel is locked so
* nothing could modify the error value for this channel
*/
v = readl(ce->base + CE_ESR);
- if (v) {
+ switch (ce->variant->esr) {
+ case ESR_H3:
+ /* Sadly, the error bit is not per flow */
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_A64:
+ case ESR_H5:
+ case ESR_R40:
v >>= (flow * 4);
+ v &= 0xF;
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_H6:
+ v >>= (flow * 8);
[PATCH v6 14/18] crypto: sun8i-ce: Add support for the PRNG
This patch had support for the PRNG present in the CE.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 58 ++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 164 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 31
5 files changed, 261 insertions(+), 1 deletion(-)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index fa34df7fbf78..bf4d2a6328dc 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -88,6 +88,14 @@ config CRYPTO_DEV_SUN8I_CE_HASH
help
Say y to enable support for hash algorithms.
+config CRYPTO_DEV_SUN8I_CE_PRNG
+ bool "Support for Allwinner Crypto Engine PRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index d1b1f0e86c79..c0ea81da2c7d 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 3ef5b1079be3..9b7f8fdc4992 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ce.h"
@@ -45,6 +46,7 @@ static const struct ce_variant ce_h3_variant = {
{ "mod", 5000, 0 },
},
.esr = ESR_H3,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h5_variant = {
@@ -60,6 +62,7 @@ static const struct ce_variant ce_h5_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_H5,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h6_variant = {
@@ -72,12 +75,14 @@ static const struct ce_variant ce_h6_variant = {
},
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
+ .prng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
},
.esr = ESR_H6,
+ .prng = CE_ALG_PRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -93,6 +98,7 @@ static const struct ce_variant ce_a64_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_A64,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_r40_variant = {
@@ -108,15 +114,17 @@ static const struct ce_variant ce_r40_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_R40,
+ .prng = CE_ALG_PRNG,
};
/*
* sun8i_ce_get_engine_number() get the next channel slot
* This is a simple round-robin way of getting the next channel
+ * The flow 3 is reserve for xRNG operations
*/
int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce)
{
- return atomic_inc_return(>flow) % MAXFLOW;
+ return atomic_inc_return(>flow) % (MAXFLOW - 1);
}
int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
@@ -527,6 +535,25 @@ static struct sun8i_ce_alg_template ce_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ce-prng",
+ .cra_priority = 300,
+ .cra_ctxsize= sizeof(struct
sun8i_ce_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ce_prng_init,
+ .cra_exit = sun8i_ce_prng_exit,
+ },
+ .generate = sun8i_ce_prng_generate,
+ .seed = sun8i_ce_prng_seed,
+ .seedsize
[PATCH v6 12/18] crypto: sun8i-ce: support hash algorithms
The CE support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224, SHA256, SHA384 and SHA512.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 10 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 229 ++
.../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 413 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 58 +++
5 files changed, 711 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index b346850a91b9..fa34df7fbf78 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -78,6 +78,16 @@ config CRYPTO_DEV_SUN8I_CE_DEBUG
This will create /sys/kernel/debug/sun8i-ce/stats for displaying
the number of requests per flow and per algorithm.
+config CRYPTO_DEV_SUN8I_CE_HASH
+ bool "Enable support for hash on sun8i-ce"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select MD5
+ select SHA1
+ select SHA256
+ select SHA512
+ help
+ Say y to enable support for hash algorithms.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index 08b68c3c1ca9..d1b1f0e86c79 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 688976011f07..3ef5b1079be3 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -35,6 +35,9 @@
static const struct ce_variant ce_h3_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -47,6 +50,9 @@ static const struct ce_variant ce_h3_variant = {
static const struct ce_variant ce_h5_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -59,9 +65,13 @@ static const struct ce_variant ce_h5_variant = {
static const struct ce_variant ce_h6_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.cipher_t_dlen_in_bytes = true,
+ .hash_t_dlen_in_bits = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -73,6 +83,9 @@ static const struct ce_variant ce_h6_variant = {
static const struct ce_variant ce_a64_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -85,6 +98,9 @@ static const struct ce_variant ce_a64_variant = {
static const struct ce_variant ce_r40_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -329,6 +345,188 @@ static struct sun8i_ce_alg_template ce_algs[] = {
.decrypt= sun8i_ce_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ce_algo_id = CE_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ce_hash_init,
+ .update = sun8i_ce_hash_update,
+ .final = sun8i_ce_hash_final,
+ .finup = sun8i_ce_hash_finup,
+ .digest = sun8i_ce_hash_digest,
+ .export = sun8i_ce_hash_export,
+ .import = sun8i_ce_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+
[PATCH v6 18/18] crypto: sun8i-ce: fix some style issue
This patch fix a double empty line issue reported by checkpatch.
While at it, since now the maximum line length is now 100, reorder some
wrapped line.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 34 ++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 ++---
2 files changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index 2dcf508b0f18..9dae2be26e48 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -164,12 +164,10 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
-offset, ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
offset, ivsize, 0);
}
memcpy(rctx->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
dev_err(ce->dev, "Cannot DMA MAP IV\n");
@@ -179,8 +177,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
}
if (areq->src == areq->dst) {
- nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
- DMA_BIDIRECTIONAL);
+ nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
DMA_BIDIRECTIONAL);
if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
err = -EINVAL;
@@ -188,15 +185,13 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
}
nr_sgd = nr_sgs;
} else {
- nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
- DMA_TO_DEVICE);
+ nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
DMA_TO_DEVICE);
if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
err = -EINVAL;
goto theend_iv;
}
- nr_sgd = dma_map_sg(ce->dev, areq->dst, sg_nents(areq->dst),
- DMA_FROM_DEVICE);
+ nr_sgd = dma_map_sg(ce->dev, areq->dst, sg_nents(areq->dst),
DMA_FROM_DEVICE);
if (nr_sgd <= 0 || nr_sgd > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgd);
err = -EINVAL;
@@ -251,15 +246,13 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
memcpy(areq->iv, rctx->backup_iv, ivsize);
kfree_sensitive(rctx->backup_iv);
} else {
- scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
kfree(rctx->bounce_iv);
}
@@ -315,15 +308,13 @@ static int sun8i_ce_cipher_unprepare(struct crypto_engine
*engine, void *async_r
if (areq->iv && ivsize > 0) {
if (cet->t_iv)
- dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
memcpy(areq->iv, rctx->backup_iv, ivsize);
[PATCH v6 11/18] crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
Hash algorithms will need also a spetial t_dlen handling, but since the
meaning will be different, rename the current flag to specify it apply
only on ciphers algorithms.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index fa12c966c45f..2dcf508b0f18 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -119,7 +119,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
common |= rctx->op_dir | CE_COMM_INT;
cet->t_common_ctl = cpu_to_le32(common);
/* CTS and recent CE (H6) need length in bytes, in word otherwise */
- if (ce->variant->has_t_dlen_in_bytes)
+ if (ce->variant->cipher_t_dlen_in_bytes)
cet->t_dlen = cpu_to_le32(areq->cryptlen);
else
cet->t_dlen = cpu_to_le32(areq->cryptlen / 4);
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 65748dfa7a48..688976011f07 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -61,7 +61,7 @@ static const struct ce_variant ce_h6_variant = {
},
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
- .has_t_dlen_in_bytes = true,
+ .cipher_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index eea0847dc1e8..3dbf8ca47b7c 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -97,7 +97,7 @@ struct ce_clock {
* @alg_cipher:list of supported ciphers. for each CE_ID_ this will
give the
* coresponding CE_ALG_XXX value
* @op_mode: list of supported block modes
- * @has_t_dlen_in_bytes: Does the request size for cipher is in
+ * @cipher_t_dlen_in_bytes:Does the request size for cipher is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
* @esr: The type of error register
@@ -105,7 +105,7 @@ struct ce_clock {
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
u32 op_mode[CE_ID_OP_MAX];
- bool has_t_dlen_in_bytes;
+ bool cipher_t_dlen_in_bytes;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
int esr;
};
--
2.26.2
[PATCH] MAINTAINERS: media: cec: fix files location
Files have moved, fixes their path.
Fixes: 4be5e8648b0c ("media: move CEC platform drivers to a separate directory")
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1123f26e2891..3b2202b8dec5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2453,7 +2453,7 @@ L:linux-samsung-...@vger.kernel.org (moderated
for non-subscribers)
L: linux-me...@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/media/s5p-cec.txt
-F: drivers/media/platform/s5p-cec/
+F: drivers/media/cec/platform/s5p/
ARM/SAMSUNG S5P SERIES JPEG CODEC SUPPORT
M: Andrzej Pietrasiewicz
@@ -2598,7 +2598,7 @@ L:linux-te...@vger.kernel.org
L: linux-me...@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/media/tegra-cec.txt
-F: drivers/media/platform/tegra-cec/
+F: drivers/media/cec/platform/tegra/
ARM/TETON BGA MACHINE SUPPORT
M: "Mark F. Brown"
@@ -4042,7 +4042,7 @@ S:Supported
W: http://linuxtv.org
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/cec-gpio.txt
-F: drivers/media/platform/cec-gpio/
+F: drivers/media/cec/platform/cec-gpio/
CELL BROADBAND ENGINE ARCHITECTURE
M: Arnd Bergmann
@@ -11364,8 +11364,8 @@ S: Supported
W: http://linux-meson.com/
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml
-F: drivers/media/platform/meson/ao-cec-g12a.c
-F: drivers/media/platform/meson/ao-cec.c
+F: drivers/media/cec/platform/meson/ao-cec-g12a.c
+F: drivers/media/cec/platform/meson/ao-cec.c
MESON NAND CONTROLLER DRIVER FOR AMLOGIC SOCS
M: Liang Yang
@@ -15574,8 +15574,8 @@ F: drivers/mmc/host/sdricoh_cs.c
SECO BOARDS CEC DRIVER
M: Ettore Chimenti
S: Maintained
-F: drivers/media/platform/seco-cec/seco-cec.c
-F: drivers/media/platform/seco-cec/seco-cec.h
+F: drivers/media/cec/platform/seco/seco-cec.c
+F: drivers/media/cec/platform/seco/seco-cec.h
SECURE COMPUTING
M: Kees Cook
@@ -16608,7 +16608,7 @@ STI CEC DRIVER
M: Benjamin Gaignard
S: Maintained
F: Documentation/devicetree/bindings/media/stih-cec.txt
-F: drivers/media/platform/sti/cec/
+F: drivers/media/cec/platform/sti/
STK1160 USB VIDEO CAPTURE DRIVER
M: Ezequiel Garcia
--
2.26.2
[PATCH v6 13/18] crypto: sun8i-ce: Add stat_bytes debugfs
This patch adds a new stat_bytes counter in the sun8i-ce debugfs.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 6bbafdf9d40c..910b510d7bb2 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -276,6 +276,7 @@ struct sun8i_ce_hash_reqctx {
* @alg: one of sub struct must be used
* @stat_req: number of request done on this template
* @stat_fb: number of request which has fallbacked
+ * @stat_bytes:total data size done by this template
*/
struct sun8i_ce_alg_template {
u32 type;
@@ -289,6 +290,7 @@ struct sun8i_ce_alg_template {
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
unsigned long stat_req;
unsigned long stat_fb;
+ unsigned long stat_bytes;
#endif
};
--
2.26.2
[PATCH v6 16/18] crypto: sun8i-ce: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 116425e3d2b9..cf320898a4b1 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -566,7 +566,7 @@ static struct sun8i_ce_alg_template ce_algs[] = {
static int sun8i_ce_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ce_dev *ce = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ce->chanlist[i].stat_req);
@@ -778,7 +778,8 @@ static int sun8i_ce_get_clks(struct sun8i_ce_dev *ce)
static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
{
- int ce_method, err, id, i;
+ int ce_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
ce_algs[i].ce = ce;
@@ -858,7 +859,7 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
static void sun8i_ce_unregister_algs(struct sun8i_ce_dev *ce)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
if (!ce_algs[i].ce)
--
2.26.2
[PATCH v6 08/18] crypto: sun8i-ce: move iv data to request context
Instead of storing IV data in the channel context, store them in the
request context.
Storing them in the channel structure was conceptualy wrong since they
are per request related.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 27 +--
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 10 ---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index b4d5fea27d20..2252604d821b 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -88,7 +88,6 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
struct scatterlist *sg;
unsigned int todo, len, offset, ivsize;
dma_addr_t addr_iv = 0, addr_key = 0;
- void *backup_iv = NULL;
u32 common, sym;
int flow, i;
int nr_sgs = 0;
@@ -151,24 +150,24 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
ivsize = crypto_skcipher_ivsize(tfm);
if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) {
- chan->ivlen = ivsize;
- chan->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
- if (!chan->bounce_iv) {
+ rctx->ivlen = ivsize;
+ rctx->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
+ if (!rctx->bounce_iv) {
err = -ENOMEM;
goto theend_key;
}
if (rctx->op_dir & CE_DECRYPTION) {
- backup_iv = kzalloc(ivsize, GFP_KERNEL);
- if (!backup_iv) {
+ rctx->backup_iv = kzalloc(ivsize, GFP_KERNEL);
+ if (!rctx->backup_iv) {
err = -ENOMEM;
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(backup_iv, areq->src, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
+offset, ivsize, 0);
}
- memcpy(chan->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, chan->bounce_iv, chan->ivlen,
+ memcpy(rctx->bounce_iv, areq->iv, ivsize);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
@@ -249,17 +248,17 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, chan->ivlen,
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
- memcpy(areq->iv, backup_iv, ivsize);
- kfree_sensitive(backup_iv);
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
} else {
scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
- kfree(chan->bounce_iv);
+ kfree(rctx->bounce_iv);
}
theend_key:
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 963645fe4adb..fc4800e8 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -129,8 +129,6 @@ struct ce_task {
/*
* struct sun8i_ce_flow - Information used by each flow
* @engine:ptr to the crypto_engine for this flow
- * @bounce_iv: buffer which contain the IV
- * @ivlen: size of bounce_iv
* @complete: completion for the current task on this flow
* @status:set to 1 by interrupt if task is done
* @t_phy: Physical address of task
@@ -139,8 +137,6 @@ struct ce_task {
*/
struct sun8i_ce_flow {
struct crypto_engine *engine;
- void *bounce_iv;
- unsigned int ivlen;
struct completion complete;
int status;
dma_addr_t t_phy;
@@ -183,11 +179,17 @@ struct sun8i_ce_dev {
* struct sun8i_cipher_req_ctx - context for a skcipher request
* @op_dir:direction (encrypt vs decrypt) for this request
* @flow:
[PATCH v6 07/18] crypto: sun8i-ce: handle endianness of t_common_ctl
t_common_ctl is LE32 so we need to convert its value before using it.
This value is only used on H6 (ignored on other SoCs) and not handling
the endianness cause failure on xRNG/hashes operations on H6 when running BE.
Fixes: 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 138759dc8190..08ed1ca12baf 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -120,7 +120,10 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
/* Be sure all data is written before enabling the task */
wmb();
- v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
+ /* Only H6 needs to write a part of t_common_ctl along with "1", but
since it is ignored
+* on older SoCs, we have no reason to complicate things.
+*/
+ v = 1 | ((le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) <<
8);
writel(v, ce->base + CE_TLR);
mutex_unlock(>mlock);
--
2.26.2
[PATCH v6 09/18] crypto: sun8i-ce: split into prepare/run/unprepare
This patch split the do_one_request into three.
Prepare will handle all DMA mapping and initialisation of the task
structure.
Unprepare will clean all DMA mapping.
And the do_one_request will be limited to just executing the task.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 70 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 4 ++
2 files changed, 66 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index 2252604d821b..fa12c966c45f 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -75,8 +75,9 @@ static int sun8i_ce_cipher_fallback(struct skcipher_request
*areq)
return err;
}
-static int sun8i_ce_cipher(struct skcipher_request *areq)
+static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void
*async_req)
{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
struct sun8i_ce_dev *ce = op->ce;
@@ -234,7 +235,9 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
}
chan->timeout = areq->cryptlen;
- err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(areq->base.tfm));
+ rctx->nr_sgs = nr_sgs;
+ rctx->nr_sgd = nr_sgd;
+ return 0;
theend_sgs:
if (areq->src == areq->dst) {
@@ -268,13 +271,64 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
return err;
}
-static int sun8i_ce_handle_cipher_request(struct crypto_engine *engine, void
*areq)
+static int sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq)
{
- int err;
struct skcipher_request *breq = container_of(areq, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(breq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(breq);
+ int flow, err;
- err = sun8i_ce_cipher(breq);
+ flow = rctx->flow;
+ err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(breq->base.tfm));
crypto_finalize_skcipher_request(engine, breq, err);
+ return 0;
+}
+
+static int sun8i_ce_cipher_unprepare(struct crypto_engine *engine, void
*async_req)
+{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
+ struct sun8i_ce_flow *chan;
+ struct ce_task *cet;
+ unsigned int ivsize, offset;
+ int nr_sgs = rctx->nr_sgs;
+ int nr_sgd = rctx->nr_sgd;
+ int flow;
+
+ flow = rctx->flow;
+ chan = >chanlist[flow];
+ cet = chan->tl;
+ ivsize = crypto_skcipher_ivsize(tfm);
+
+ if (areq->src == areq->dst) {
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_BIDIRECTIONAL);
+ } else {
+ if (nr_sgs > 0)
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_TO_DEVICE);
+ dma_unmap_sg(ce->dev, areq->dst, nr_sgd, DMA_FROM_DEVICE);
+ }
+
+ if (areq->iv && ivsize > 0) {
+ if (cet->t_iv)
+ dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
+DMA_TO_DEVICE);
+ offset = areq->cryptlen - ivsize;
+ if (rctx->op_dir & CE_DECRYPTION) {
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
+ } else {
+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
+ivsize, 0);
+ }
+ kfree(rctx->bounce_iv);
+ }
+
+ dma_unmap_single(ce->dev, cet->t_key, op->keylen, DMA_TO_DEVICE);
return 0;
}
@@ -346,9 +400,9 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm)
crypto_tfm_alg_driver_name(>base),
crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)));
- op->enginectx.op.do_one_request = sun8i_ce_handle_cipher_request;
- op->enginectx.op.prepare_request = NULL;
- op->enginectx.op.unprepare_request = NULL;
+ op->enginectx.op.do_one_request = sun8i_ce_cipher_run;
+ op->enginectx.op.prepare_request = sun8i_ce_cipher_
[PATCH v6 01/18] crypto: sun8i-ss: Add SS_START define
Instead of using an hardcoded value, let's use a defined value for
SS_START.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 9a23515783a6..97012128385f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -61,7 +61,7 @@ int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct
sun8i_cipher_req_ctx *rctx
const char *name)
{
int flow = rctx->flow;
- u32 v = 1;
+ u32 v = SS_START;
int i;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 0405767f1f7e..f3ffaea3a59f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -13,6 +13,8 @@
#include
#include
+#define SS_START 1
+
#define SS_ENCRYPTION 0
#define SS_DECRYPTION BIT(6)
--
2.26.2
[PATCH v6 00/18] crypto: allwinner: add xRNG and hashes
Hello The main goal of this serie is to add support for TRNG, PRNG and hashes to the sun8i-ss/sun8i-ce driver. The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading tcrypt. The PRNG and TRNG are tested with rngtest. Both LE and BE kernel are tested. This serie was tested on: - sun50i-a64-pine64 - sun8i-a83t-bananapi-m3 - sun8i-r40-bananapi-m2-ultra - sun50i-h5-libretech-all-h3-cc - sun8i-h3-orangepi-pc Regards Change since v1: - removed _crypto_rng_cast patch Change since v2: - cleaned unused variables from sun8i-ce-prng - added some missing memzero_explicit Change since v3: - rebased on latest next - removed useless cpu_to_le32() in sun8i-ss - added 2 last patches - add handle endianness of t_common_ctl patch Change since v4: - added a style issue patch Changes since v5: - handle failure pattern of pm_runtime_get_sync - Add missing linux/dma-mapping.h Corentin Labbe (18): crypto: sun8i-ss: Add SS_START define crypto: sun8i-ss: Add support for the PRNG crypto: sun8i-ss: support hash algorithms crypto: sun8i-ss: fix a trivial typo crypto: sun8i-ss: Add more comment on some structures crypto: sun8i-ss: better debug printing crypto: sun8i-ce: handle endianness of t_common_ctl crypto: sun8i-ce: move iv data to request context crypto: sun8i-ce: split into prepare/run/unprepare crypto: sun8i-ce: handle different error registers crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes crypto: sun8i-ce: support hash algorithms crypto: sun8i-ce: Add stat_bytes debugfs crypto: sun8i-ce: Add support for the PRNG crypto: sun8i-ce: Add support for the TRNG crypto: sun8i-ce: fix comparison of integer expressions of different signedness crypto: sun8i-ss: fix comparison of integer expressions of different signedness crypto: sun8i-ce: fix some style issue drivers/crypto/allwinner/Kconfig | 43 ++ drivers/crypto/allwinner/sun8i-ce/Makefile| 3 + .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 117 +++-- .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 386 ++- .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 413 .../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 164 +++ .../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 127 + drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 135 +- drivers/crypto/allwinner/sun8i-ss/Makefile| 2 + .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 205 +++- .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 444 ++ .../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 173 +++ drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 89 +++- 13 files changed, 2233 insertions(+), 68 deletions(-) create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c -- 2.26.2
[PATCH v2] dt-bindings: crypto: Specify that allwinner,sun8i-a33-crypto needs reset
When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
Furthermore, there are no need to use items to list only one compatible
in compatible list.
Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS")
Signed-off-by: Corentin Labbe
---
Change since v1:
- use an enum for adding allwinner,sun8i-a33-crypto to "reset list"
.../bindings/crypto/allwinner,sun4i-a10-crypto.yaml| 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
index fc823572bcff..279f4a2e1dd7 100644
--- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
@@ -23,8 +23,7 @@ properties:
- items:
- const: allwinner,sun7i-a20-crypto
- const: allwinner,sun4i-a10-crypto
- - items:
- - const: allwinner,sun8i-a33-crypto
+ - const: allwinner,sun8i-a33-crypto
reg:
maxItems: 1
@@ -59,7 +58,9 @@ if:
properties:
compatible:
contains:
-const: allwinner,sun6i-a31-crypto
+enum:
+ - const: allwinner,sun6i-a31-crypto
+ - const: allwinner,sun8i-a33-crypto
then:
required:
--
2.26.2
[PATCH] dt-bindings: crypto: Specify that allwinner,sun8i-a33-crypto needs reset
When adding allwinner,sun8i-a33-crypto, I forgot to add that it needs reset.
Furthermore, there are no need to use items to list only one compatible
in compatible list.
Fixes: f81547ba7a98 ("dt-bindings: crypto: add new compatible for A33 SS")
Signed-off-by: Corentin Labbe
---
.../bindings/crypto/allwinner,sun4i-a10-crypto.yaml| 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
index fc823572bcff..1075f0e75368 100644
--- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
+++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
@@ -23,8 +23,7 @@ properties:
- items:
- const: allwinner,sun7i-a20-crypto
- const: allwinner,sun4i-a10-crypto
- - items:
- - const: allwinner,sun8i-a33-crypto
+ - const: allwinner,sun8i-a33-crypto
reg:
maxItems: 1
@@ -59,7 +58,9 @@ if:
properties:
compatible:
contains:
-const: allwinner,sun6i-a31-crypto
+oneOf:
+ - const: allwinner,sun6i-a31-crypto
+ - const: allwinner,sun8i-a33-crypto
then:
required:
--
2.26.2
Re: [PATCH v2 1/3] dt-bindings: crypto: add new compatible for V3s
On Tue, Sep 01, 2020 at 01:40:15PM +0200, Maxime Ripard wrote: > On Tue, Sep 01, 2020 at 12:57:19PM +0200, Corentin Labbe wrote: > > On Tue, Sep 01, 2020 at 11:32:49AM +0200, Maxime Ripard wrote: > > > On Mon, Aug 31, 2020 at 09:30:59AM +0200, Martin Cerveny wrote: > > > > Like A33 "sun4i-ss" has a difference, it give SHA1 digest > > > > directly in BE. So add new compatible. > > > > > > > > Tested-by: Martin Cerveny > > > > > > The Tested-by tag is for the other developpers. You're very much > > > expected to have tested your patch before contributing it. > > > > > > > Signed-off-by: Martin Cerveny > > > > --- > > > > .../bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 5 - > > > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > > > > > > > b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > > > index fc823572b..180efd13a 100644 > > > > --- > > > > a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > > > +++ > > > > b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > > > @@ -25,6 +25,7 @@ properties: > > > >- const: allwinner,sun4i-a10-crypto > > > >- items: > > > >- const: allwinner,sun8i-a33-crypto > > > > + - const: allwinner,sun8i-v3s-crypto > > > > > > If it's compatible with the A33, why do we need to introduce a new > > > compatible? > > > > > > > > > > >reg: > > > > maxItems: 1 > > > > @@ -59,7 +60,9 @@ if: > > > >properties: > > > > compatible: > > > >contains: > > > > -const: allwinner,sun6i-a31-crypto > > > > +oneOf: > > > > + - const: allwinner,sun6i-a31-crypto > > > > + - const: allwinner,sun8i-v3s-crypto > > > > > > I guess the A33 compatible should be on that list as well? > > > > This is the list of "need reset". > > So we cannot use allwinner,sun8i-a33-crypto > > Probably this explanation should be in the commit message. > > But the A33 has a reset in the DTSI > Oh right so I need to send a fix for that and Martin Cerveny could simply use the "allwinner,sun8i-a33-crypto" (and so keep only patch #1(DTS)) Regards
Re: [PATCH v2 1/3] dt-bindings: crypto: add new compatible for V3s
On Tue, Sep 01, 2020 at 11:32:49AM +0200, Maxime Ripard wrote: > On Mon, Aug 31, 2020 at 09:30:59AM +0200, Martin Cerveny wrote: > > Like A33 "sun4i-ss" has a difference, it give SHA1 digest > > directly in BE. So add new compatible. > > > > Tested-by: Martin Cerveny > > The Tested-by tag is for the other developpers. You're very much > expected to have tested your patch before contributing it. > > > Signed-off-by: Martin Cerveny > > --- > > .../bindings/crypto/allwinner,sun4i-a10-crypto.yaml | 5 - > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git > > a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > index fc823572b..180efd13a 100644 > > --- > > a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > +++ > > b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml > > @@ -25,6 +25,7 @@ properties: > >- const: allwinner,sun4i-a10-crypto > >- items: > >- const: allwinner,sun8i-a33-crypto > > + - const: allwinner,sun8i-v3s-crypto > > If it's compatible with the A33, why do we need to introduce a new compatible? > > > > >reg: > > maxItems: 1 > > @@ -59,7 +60,9 @@ if: > >properties: > > compatible: > >contains: > > -const: allwinner,sun6i-a31-crypto > > +oneOf: > > + - const: allwinner,sun6i-a31-crypto > > + - const: allwinner,sun8i-v3s-crypto > > I guess the A33 compatible should be on that list as well? This is the list of "need reset". So we cannot use allwinner,sun8i-a33-crypto Probably this explanation should be in the commit message. Regards
Re: [PATCH v2 3/3] crypto: sun4i-ss - add the V3s variant of SS
On Mon, Aug 31, 2020 at 09:31:01AM +0200, Martin Cerveny wrote: > Like A33 "sun4i-ss" has a difference, it give SHA1 digest > directly in BE. So add new compatible. > > Tested-by: Martin Cerveny > Signed-off-by: Martin Cerveny > --- > drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 7 +++ > 1 file changed, 7 insertions(+) > Your commit message is wrong, "sun4i-ss" has no difference, but V3S yes. Your other patch has the same problem. Otherwise you could add: Acked-by: Corentin Labbe Regards
Re: [PATCH] ARM: dts: sun8i: v3s: Enable crypto engine
On Thu, Aug 27, 2020 at 08:00:27PM +0200, Martin Cerveny wrote:
> V3S contains crypto engine that is compatible with "sun4i-ss".
>
> Tested-by: Martin Cerveny
> Signed-off-by: Martin Cerveny
> ---
> .../bindings/crypto/allwinner,sun4i-a10-crypto.yaml| 5 -
> arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++
> drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c | 7 +++
> 3 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git
> a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
> b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
> index fc823572b..180efd13a 100644
> --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
> +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml
> @@ -25,6 +25,7 @@ properties:
>- const: allwinner,sun4i-a10-crypto
>- items:
>- const: allwinner,sun8i-a33-crypto
> + - const: allwinner,sun8i-v3s-crypto
>
>reg:
> maxItems: 1
> @@ -59,7 +60,9 @@ if:
>properties:
> compatible:
>contains:
> -const: allwinner,sun6i-a31-crypto
> +oneOf:
> + - const: allwinner,sun6i-a31-crypto
> + - const: allwinner,sun8i-v3s-crypto
>
> then:
>required:
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi
> b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index e5312869c..4fec84c40 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -234,6 +234,16 @@
> #size-cells = <0>;
> };
>
> + crypto: crypto@1c15000 {
> + compatible = "allwinner,sun8i-v3s-crypto";
> + reg = <0x01c15000 0x1000>;
> + interrupts = ;
> + clocks = < CLK_BUS_CE>, < CLK_CE>;
> + clock-names = "ahb", "mod";
> + resets = < RST_BUS_CE>;
> + reset-names = "ahb";
> + };
> +
> usb_otg: usb@1c19000 {
> compatible = "allwinner,sun8i-h3-musb";
> reg = <0x01c19000 0x0400>;
> diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
> b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
> index a2b67f7f8..d24496cac 100644
> --- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
> +++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-core.c
> @@ -31,6 +31,10 @@ static const struct ss_variant ss_a33_variant = {
> .sha1_in_be = true,
> };
>
> +static const struct ss_variant ss_v3s_variant = {
> + .sha1_in_be = true,
> +};
> +
> static struct sun4i_ss_alg_template ss_algs[] = {
> { .type = CRYPTO_ALG_TYPE_AHASH,
> .mode = SS_OP_MD5,
> @@ -505,6 +509,9 @@ static const struct of_device_id
> a20ss_crypto_of_match_table[] = {
> { .compatible = "allwinner,sun8i-a33-crypto",
> .data = _a33_variant
> },
> + { .compatible = "allwinner,sun8i-v3s-crypto",
> + .data = _v3s_variant
> + },
> {}
> };
> MODULE_DEVICE_TABLE(of, a20ss_crypto_of_match_table);
> --
> 2.17.1
>
You should split at least drivers/crypto and the dts part, as drivers/crypto
patchs are merged via the cryptodev tree and dts/doc will be merged via the
sunxi tree.
And ideally split patch in 3, the doc, the dts and the crypto.
See how I added the same for A33 in:
https://lore.kernel.org/linux-arm-kernel/20191120152833.20443-1-clabbe.montj...@gmail.com/
Anyway the content is good.
Acked-by: Corentin Labbe
Thanks
Re: [PATCH v2 1/4] crypto: inside-secure - use kfree_sensitive()
On Thu, Aug 27, 2020 at 09:43:59AM +0300, Denis Efremov wrote: > Use kfree_sensitive() instead of open-coding it. > > Signed-off-by: Denis Efremov > --- > drivers/crypto/inside-secure/safexcel_hash.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/crypto/inside-secure/safexcel_hash.c > b/drivers/crypto/inside-secure/safexcel_hash.c > index 16a467969d8e..5ffdc1cd5847 100644 > --- a/drivers/crypto/inside-secure/safexcel_hash.c > +++ b/drivers/crypto/inside-secure/safexcel_hash.c > @@ -1082,8 +1082,7 @@ static int safexcel_hmac_init_pad(struct ahash_request > *areq, > } > > /* Avoid leaking */ > - memzero_explicit(keydup, keylen); > - kfree(keydup); > + kfree_sensitive(keydup); > > if (ret) > return ret; > -- > 2.26.2 > The maintainer of this driver was not TO/CC. I Add him. Regards
Re: [PATCH v2 2/4] crypto: amlogic - use kfree_sensitive()
On Thu, Aug 27, 2020 at 09:44:00AM +0300, Denis Efremov wrote: > Use kfree_sensitive() instead of open-coding it. > > Signed-off-by: Denis Efremov > --- > drivers/crypto/amlogic/amlogic-gxl-cipher.c | 10 ++ > 1 file changed, 2 insertions(+), 8 deletions(-) > For the whole serie you didnt use getmaintainers, so nor sunxi and amlogic maintainers where CC. And my baylibre address which is the address for this driver. Anyway, for this case the patch is trivial enough. Tested-by: Corentin Labbe Acked-by: Corentin Labbe Regards
Re: [PATCH v2 3/4] crypto: sun8i-ce - use kfree_sensitive()
On Thu, Aug 27, 2020 at 09:44:01AM +0300, Denis Efremov wrote: > Use kfree_sensitive() instead of open-coding it. > > Signed-off-by: Denis Efremov > --- > .../crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 15 +++ > 1 file changed, 3 insertions(+), 12 deletions(-) > Acked-by: Corentin Labbe Tested-by: Corentin Labbe Thanks
Re: [PATCH v2 4/4] crypto: sun8i-ss - use kfree_sensitive()
On Thu, Aug 27, 2020 at 09:44:02AM +0300, Denis Efremov wrote: > Use kfree_sensitive() instead of open-coding it. > > Signed-off-by: Denis Efremov > --- > .../crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c | 15 +++ > 1 file changed, 3 insertions(+), 12 deletions(-) > Acked-by: Corentin Labbe Tested-by: Corentin Labbe Thanks
Re: [PATCH] crypto: sun8i-ss - remove redundant memzero_explicit()
On Thu, Aug 27, 2020 at 10:40:23AM +0300, Denis Efremov wrote:
> Remove redundant memzero_explicit() in sun8i_ss_cipher() before calling
> kfree_sensitive(). kfree_sensitive() will zero the memory with
> memzero_explicit().
>
> Signed-off-by: Denis Efremov
> ---
> drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c
> b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c
> index deb8b39a86db..ed2a69f82e1c 100644
> --- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c
> +++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-cipher.c
> @@ -248,7 +248,6 @@ static int sun8i_ss_cipher(struct skcipher_request *areq)
> offset = areq->cryptlen - ivsize;
> if (rctx->op_dir & SS_DECRYPTION) {
> memcpy(areq->iv, backup_iv, ivsize);
> - memzero_explicit(backup_iv, ivsize);
> kfree_sensitive(backup_iv);
> } else {
> scatterwalk_map_and_copy(areq->iv, areq->dst,
> offset,
> --
> 2.26.2
>
Hello
Could you add:
Fixes: 453431a54934 ("mm, treewide: rename kzfree() to kfree_sensitive()")
Regards
Re: [PATCH] crypto: amlogic - use kfree_sensitive()
On Wed, Aug 26, 2020 at 04:16:57PM +0300, Denis Efremov wrote:
> Use kfree_sensitive() instead of open-coding it.
>
> Signed-off-by: Denis Efremov
> ---
> drivers/crypto/amlogic/amlogic-gxl-cipher.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
> b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
> index d93210726697..f3dca456d9f8 100644
> --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c
> +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c
> @@ -341,8 +341,7 @@ void meson_cipher_exit(struct crypto_tfm *tfm)
> struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm);
>
> if (op->key) {
> - memzero_explicit(op->key, op->keylen);
> - kfree(op->key);
> + kfree_sensitive(op->key);
> }
> crypto_free_skcipher(op->fallback_tfm);
> }
> @@ -368,8 +367,7 @@ int meson_aes_setkey(struct crypto_skcipher *tfm, const
> u8 *key,
> return -EINVAL;
> }
> if (op->key) {
> - memzero_explicit(op->key, op->keylen);
> - kfree(op->key);
> + kfree_sensitive(op->key);
> }
> op->keylen = keylen;
> op->key = kmemdup(key, keylen, GFP_KERNEL | GFP_DMA);
> --
So the {} are no longer necessary.
Same for the "if (op->key)" test since kfree handle NULL.
Thanks
[PATCH v5 13/18] crypto: sun8i-ce: Add stat_bytes debugfs
This patch adds a new stat_bytes counter in the sun8i-ce debugfs.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 6bbafdf9d40c..910b510d7bb2 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -276,6 +276,7 @@ struct sun8i_ce_hash_reqctx {
* @alg: one of sub struct must be used
* @stat_req: number of request done on this template
* @stat_fb: number of request which has fallbacked
+ * @stat_bytes:total data size done by this template
*/
struct sun8i_ce_alg_template {
u32 type;
@@ -289,6 +290,7 @@ struct sun8i_ce_alg_template {
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
unsigned long stat_req;
unsigned long stat_fb;
+ unsigned long stat_bytes;
#endif
};
--
2.26.2
[PATCH v5 11/18] crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
Hash algorithms will need also a spetial t_dlen handling, but since the
meaning will be different, rename the current flag to specify it apply
only on ciphers algorithms.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index fa12c966c45f..2dcf508b0f18 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -119,7 +119,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
common |= rctx->op_dir | CE_COMM_INT;
cet->t_common_ctl = cpu_to_le32(common);
/* CTS and recent CE (H6) need length in bytes, in word otherwise */
- if (ce->variant->has_t_dlen_in_bytes)
+ if (ce->variant->cipher_t_dlen_in_bytes)
cet->t_dlen = cpu_to_le32(areq->cryptlen);
else
cet->t_dlen = cpu_to_le32(areq->cryptlen / 4);
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 65748dfa7a48..688976011f07 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -61,7 +61,7 @@ static const struct ce_variant ce_h6_variant = {
},
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
- .has_t_dlen_in_bytes = true,
+ .cipher_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index eea0847dc1e8..3dbf8ca47b7c 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -97,7 +97,7 @@ struct ce_clock {
* @alg_cipher:list of supported ciphers. for each CE_ID_ this will
give the
* coresponding CE_ALG_XXX value
* @op_mode: list of supported block modes
- * @has_t_dlen_in_bytes: Does the request size for cipher is in
+ * @cipher_t_dlen_in_bytes:Does the request size for cipher is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
* @esr: The type of error register
@@ -105,7 +105,7 @@ struct ce_clock {
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
u32 op_mode[CE_ID_OP_MAX];
- bool has_t_dlen_in_bytes;
+ bool cipher_t_dlen_in_bytes;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
int esr;
};
--
2.26.2
[PATCH v5 03/18] crypto: sun8i-ss: support hash algorithms
The SS support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224 and SHA256.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 9 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 155 ++
.../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 442 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 58 +++
5 files changed, 665 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index b5f4f1c090ce..b346850a91b9 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -112,3 +112,12 @@ config CRYPTO_DEV_SUN8I_SS_PRNG
help
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Security System.
+
+config CRYPTO_DEV_SUN8I_SS_HASH
+ bool "Enable support for hash on sun8i-ss"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select MD5
+ select SHA1
+ select SHA256
+ help
+ Say y to enable support for hash algorithms.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index 49f2f912c816..aabfd893c817 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_HASH) += sun8i-ss-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index ae8321f9a1db..5cf00d03be1f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -41,6 +41,8 @@ static const struct ss_variant ss_a80_variant = {
static const struct ss_variant ss_a83t_variant = {
.alg_cipher = { SS_ALG_AES, SS_ALG_DES, SS_ALG_3DES,
},
+ .alg_hash = { SS_ALG_MD5, SS_ALG_SHA1, SS_ALG_SHA224, SS_ALG_SHA256,
+ },
.op_mode = { SS_OP_ECB, SS_OP_CBC,
},
.ss_clks = {
@@ -284,6 +286,128 @@ static struct sun8i_ss_alg_template ss_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+ .cra_name = "md5",
+ .cra_driver_name = "md5-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+ .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct
sun8i_ss_hash_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_hash_crainit,
+ .cra_exit = sun8i_ss_hash_craexit,
+ }
+ }
+ }
+},
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_SHA1,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = SHA1_DIGEST_SIZE,
+ .statesize = sizeof(struct sha1_state),
+ .base = {
+ .cra_name = "sha1",
+ .cra_driver_name = "sha1-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+
[PATCH v5 16/18] crypto: sun8i-ce: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 116425e3d2b9..cf320898a4b1 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -566,7 +566,7 @@ static struct sun8i_ce_alg_template ce_algs[] = {
static int sun8i_ce_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ce_dev *ce = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ce->chanlist[i].stat_req);
@@ -778,7 +778,8 @@ static int sun8i_ce_get_clks(struct sun8i_ce_dev *ce)
static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
{
- int ce_method, err, id, i;
+ int ce_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
ce_algs[i].ce = ce;
@@ -858,7 +859,7 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
static void sun8i_ce_unregister_algs(struct sun8i_ce_dev *ce)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
if (!ce_algs[i].ce)
--
2.26.2
[PATCH v5 15/18] crypto: sun8i-ce: Add support for the TRNG
This patch had support for the TRNG present in the CE.
Note that according to the algorithm ID, 2 version of the TRNG exists,
the first present in H3/H5/R40/A64 and the second present in H6.
This patch adds support for both, but only the second is working
reliabily according to rngtest.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 ++
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 18 +++
.../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 124 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 18 +++
5 files changed, 169 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index bf4d2a6328dc..0e72543ad1f1 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -96,6 +96,14 @@ config CRYPTO_DEV_SUN8I_CE_PRNG
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Crypto Engine.
+config CRYPTO_DEV_SUN8I_CE_TRNG
+ bool "Support for Allwinner Crypto Engine TRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select HW_RANDOM
+ help
+ Select this option if you want to provide kernel-side support for
+ the True Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index c0ea81da2c7d..0842eb2d9408 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG) += sun8i-ce-trng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 9b7f8fdc4992..116425e3d2b9 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -47,6 +47,7 @@ static const struct ce_variant ce_h3_variant = {
},
.esr = ESR_H3,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h5_variant = {
@@ -63,6 +64,7 @@ static const struct ce_variant ce_h5_variant = {
},
.esr = ESR_H5,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h6_variant = {
@@ -76,6 +78,7 @@ static const struct ce_variant ce_h6_variant = {
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
.prng_t_dlen_in_bytes = true,
+ .trng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -83,6 +86,7 @@ static const struct ce_variant ce_h6_variant = {
},
.esr = ESR_H6,
.prng = CE_ALG_PRNG_V2,
+ .trng = CE_ALG_TRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -99,6 +103,7 @@ static const struct ce_variant ce_a64_variant = {
},
.esr = ESR_A64,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_r40_variant = {
@@ -115,6 +120,7 @@ static const struct ce_variant ce_r40_variant = {
},
.esr = ESR_R40,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
/*
@@ -589,6 +595,10 @@ static int sun8i_ce_dbgfs_read(struct seq_file *seq, void
*v)
break;
}
}
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ seq_printf(seq, "HWRNG %lu %lu\n",
+ ce->hwrng_stat_req, ce->hwrng_stat_bytes);
+#endif
return 0;
}
@@ -939,6 +949,10 @@ static int sun8i_ce_probe(struct platform_device *pdev)
if (err < 0)
goto error_alg;
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_register(ce);
+#endif
+
v = readl(ce->base + CE_CTR);
v >>= CE_DIE_ID_SHIFT;
v &= CE_DIE_ID_MASK;
@@ -968,6 +982,10 @@ static int sun8i_ce_remove(struct platform_device *pdev)
{
struct sun8i_ce_dev *ce = platform_get_drvdata(pdev);
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_unregister(ce);
+#endif
+
sun8i_ce_unregister_algs(ce);
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
new file mode 100644
index ..188
[PATCH v5 12/18] crypto: sun8i-ce: support hash algorithms
The CE support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224, SHA256, SHA384 and SHA512.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 10 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 229 ++
.../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 411 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 58 +++
5 files changed, 709 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index b346850a91b9..fa34df7fbf78 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -78,6 +78,16 @@ config CRYPTO_DEV_SUN8I_CE_DEBUG
This will create /sys/kernel/debug/sun8i-ce/stats for displaying
the number of requests per flow and per algorithm.
+config CRYPTO_DEV_SUN8I_CE_HASH
+ bool "Enable support for hash on sun8i-ce"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select MD5
+ select SHA1
+ select SHA256
+ select SHA512
+ help
+ Say y to enable support for hash algorithms.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index 08b68c3c1ca9..d1b1f0e86c79 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 688976011f07..3ef5b1079be3 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -35,6 +35,9 @@
static const struct ce_variant ce_h3_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -47,6 +50,9 @@ static const struct ce_variant ce_h3_variant = {
static const struct ce_variant ce_h5_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -59,9 +65,13 @@ static const struct ce_variant ce_h5_variant = {
static const struct ce_variant ce_h6_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.cipher_t_dlen_in_bytes = true,
+ .hash_t_dlen_in_bits = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -73,6 +83,9 @@ static const struct ce_variant ce_h6_variant = {
static const struct ce_variant ce_a64_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -85,6 +98,9 @@ static const struct ce_variant ce_a64_variant = {
static const struct ce_variant ce_r40_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -329,6 +345,188 @@ static struct sun8i_ce_alg_template ce_algs[] = {
.decrypt= sun8i_ce_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ce_algo_id = CE_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ce_hash_init,
+ .update = sun8i_ce_hash_update,
+ .final = sun8i_ce_hash_final,
+ .finup = sun8i_ce_hash_finup,
+ .digest = sun8i_ce_hash_digest,
+ .export = sun8i_ce_hash_export,
+ .import = sun8i_ce_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+
[PATCH v5 18/18] crypto: sun8i-ce: fix some style issue
This patch fix a double empty line issue reported by checkpatch.
While at it, since now the maximum line length is now 100, reorder some
wrapped line.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 34 ++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 9 ++---
2 files changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index 2dcf508b0f18..9dae2be26e48 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -164,12 +164,10 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
-offset, ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
offset, ivsize, 0);
}
memcpy(rctx->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
dev_err(ce->dev, "Cannot DMA MAP IV\n");
@@ -179,8 +177,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
}
if (areq->src == areq->dst) {
- nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
- DMA_BIDIRECTIONAL);
+ nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
DMA_BIDIRECTIONAL);
if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
err = -EINVAL;
@@ -188,15 +185,13 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
}
nr_sgd = nr_sgs;
} else {
- nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
- DMA_TO_DEVICE);
+ nr_sgs = dma_map_sg(ce->dev, areq->src, sg_nents(areq->src),
DMA_TO_DEVICE);
if (nr_sgs <= 0 || nr_sgs > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgs);
err = -EINVAL;
goto theend_iv;
}
- nr_sgd = dma_map_sg(ce->dev, areq->dst, sg_nents(areq->dst),
- DMA_FROM_DEVICE);
+ nr_sgd = dma_map_sg(ce->dev, areq->dst, sg_nents(areq->dst),
DMA_FROM_DEVICE);
if (nr_sgd <= 0 || nr_sgd > MAX_SG) {
dev_err(ce->dev, "Invalid sg number %d\n", nr_sgd);
err = -EINVAL;
@@ -251,15 +246,13 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
memcpy(areq->iv, rctx->backup_iv, ivsize);
kfree_sensitive(rctx->backup_iv);
} else {
- scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
kfree(rctx->bounce_iv);
}
@@ -315,15 +308,13 @@ static int sun8i_ce_cipher_unprepare(struct crypto_engine
*engine, void *async_r
if (areq->iv && ivsize > 0) {
if (cet->t_iv)
- dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
-DMA_TO_DEVICE);
+ dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
memcpy(areq->iv, rctx->backup_iv, ivsize);
[PATCH v5 17/18] crypto: sun8i-ss: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 739874596c72..c9cfe20b383d 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -414,7 +414,7 @@ static struct sun8i_ss_alg_template ss_algs[] = {
static int sun8i_ss_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ss_dev *ss = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ss->flows[i].stat_req);
@@ -571,7 +571,8 @@ static void sun8i_ss_pm_exit(struct sun8i_ss_dev *ss)
static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
{
- int ss_method, err, id, i;
+ int ss_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
ss_algs[i].ss = ss;
@@ -642,7 +643,7 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
static void sun8i_ss_unregister_algs(struct sun8i_ss_dev *ss)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
if (!ss_algs[i].ss)
--
2.26.2
[PATCH v5 14/18] crypto: sun8i-ce: Add support for the PRNG
This patch had support for the PRNG present in the CE.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 58 ++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 161 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 31
5 files changed, 258 insertions(+), 1 deletion(-)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index fa34df7fbf78..bf4d2a6328dc 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -88,6 +88,14 @@ config CRYPTO_DEV_SUN8I_CE_HASH
help
Say y to enable support for hash algorithms.
+config CRYPTO_DEV_SUN8I_CE_PRNG
+ bool "Support for Allwinner Crypto Engine PRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index d1b1f0e86c79..c0ea81da2c7d 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 3ef5b1079be3..9b7f8fdc4992 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ce.h"
@@ -45,6 +46,7 @@ static const struct ce_variant ce_h3_variant = {
{ "mod", 5000, 0 },
},
.esr = ESR_H3,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h5_variant = {
@@ -60,6 +62,7 @@ static const struct ce_variant ce_h5_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_H5,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h6_variant = {
@@ -72,12 +75,14 @@ static const struct ce_variant ce_h6_variant = {
},
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
+ .prng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
},
.esr = ESR_H6,
+ .prng = CE_ALG_PRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -93,6 +98,7 @@ static const struct ce_variant ce_a64_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_A64,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_r40_variant = {
@@ -108,15 +114,17 @@ static const struct ce_variant ce_r40_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_R40,
+ .prng = CE_ALG_PRNG,
};
/*
* sun8i_ce_get_engine_number() get the next channel slot
* This is a simple round-robin way of getting the next channel
+ * The flow 3 is reserve for xRNG operations
*/
int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce)
{
- return atomic_inc_return(>flow) % MAXFLOW;
+ return atomic_inc_return(>flow) % (MAXFLOW - 1);
}
int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
@@ -527,6 +535,25 @@ static struct sun8i_ce_alg_template ce_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ce-prng",
+ .cra_priority = 300,
+ .cra_ctxsize= sizeof(struct
sun8i_ce_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ce_prng_init,
+ .cra_exit = sun8i_ce_prng_exit,
+ },
+ .generate = sun8i_ce_prng_generate,
+ .seed = sun8i_ce_prng_seed,
+ .seedsize
[PATCH v5 10/18] crypto: sun8i-ce: handle different error registers
Error registers are different across SoCs.
This patch handle those difference.
Signed-off-by: Corentin Labbe
---
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 62 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 8 +++
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 08ed1ca12baf..65748dfa7a48 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -40,7 +40,8 @@ static const struct ce_variant ce_h3_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 5000, 0 },
- }
+ },
+ .esr = ESR_H3,
};
static const struct ce_variant ce_h5_variant = {
@@ -51,7 +52,8 @@ static const struct ce_variant ce_h5_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_H5,
};
static const struct ce_variant ce_h6_variant = {
@@ -64,7 +66,8 @@ static const struct ce_variant ce_h6_variant = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
- }
+ },
+ .esr = ESR_H6,
};
static const struct ce_variant ce_a64_variant = {
@@ -75,7 +78,8 @@ static const struct ce_variant ce_a64_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_A64,
};
static const struct ce_variant ce_r40_variant = {
@@ -86,7 +90,8 @@ static const struct ce_variant ce_r40_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_R40,
};
/*
@@ -102,6 +107,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
{
u32 v;
int err = 0;
+ struct ce_task *cet = ce->chanlist[flow].tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
ce->chanlist[flow].stat_req++;
@@ -131,19 +137,56 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
msecs_to_jiffies(ce->chanlist[flow].timeout));
if (ce->chanlist[flow].status == 0) {
- dev_err(ce->dev, "DMA timeout for %s\n", name);
+ dev_err(ce->dev, "DMA timeout for %s (tm=%d) on flow %d\n",
name,
+ ce->chanlist[flow].timeout, flow);
err = -EFAULT;
}
/* No need to lock for this read, the channel is locked so
* nothing could modify the error value for this channel
*/
v = readl(ce->base + CE_ESR);
- if (v) {
+ switch (ce->variant->esr) {
+ case ESR_H3:
+ /* Sadly, the error bit is not per flow */
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_A64:
+ case ESR_H5:
+ case ESR_R40:
v >>= (flow * 4);
+ v &= 0xF;
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_H6:
+ v >>= (flow * 8);
[PATCH v5 09/18] crypto: sun8i-ce: split into prepare/run/unprepare
This patch split the do_one_request into three.
Prepare will handle all DMA mapping and initialisation of the task
structure.
Unprepare will clean all DMA mapping.
And the do_one_request will be limited to just executing the task.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 70 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 4 ++
2 files changed, 66 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index 2252604d821b..fa12c966c45f 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -75,8 +75,9 @@ static int sun8i_ce_cipher_fallback(struct skcipher_request
*areq)
return err;
}
-static int sun8i_ce_cipher(struct skcipher_request *areq)
+static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void
*async_req)
{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
struct sun8i_ce_dev *ce = op->ce;
@@ -234,7 +235,9 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
}
chan->timeout = areq->cryptlen;
- err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(areq->base.tfm));
+ rctx->nr_sgs = nr_sgs;
+ rctx->nr_sgd = nr_sgd;
+ return 0;
theend_sgs:
if (areq->src == areq->dst) {
@@ -268,13 +271,64 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
return err;
}
-static int sun8i_ce_handle_cipher_request(struct crypto_engine *engine, void
*areq)
+static int sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq)
{
- int err;
struct skcipher_request *breq = container_of(areq, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(breq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(breq);
+ int flow, err;
- err = sun8i_ce_cipher(breq);
+ flow = rctx->flow;
+ err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(breq->base.tfm));
crypto_finalize_skcipher_request(engine, breq, err);
+ return 0;
+}
+
+static int sun8i_ce_cipher_unprepare(struct crypto_engine *engine, void
*async_req)
+{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
+ struct sun8i_ce_flow *chan;
+ struct ce_task *cet;
+ unsigned int ivsize, offset;
+ int nr_sgs = rctx->nr_sgs;
+ int nr_sgd = rctx->nr_sgd;
+ int flow;
+
+ flow = rctx->flow;
+ chan = >chanlist[flow];
+ cet = chan->tl;
+ ivsize = crypto_skcipher_ivsize(tfm);
+
+ if (areq->src == areq->dst) {
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_BIDIRECTIONAL);
+ } else {
+ if (nr_sgs > 0)
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_TO_DEVICE);
+ dma_unmap_sg(ce->dev, areq->dst, nr_sgd, DMA_FROM_DEVICE);
+ }
+
+ if (areq->iv && ivsize > 0) {
+ if (cet->t_iv)
+ dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
+DMA_TO_DEVICE);
+ offset = areq->cryptlen - ivsize;
+ if (rctx->op_dir & CE_DECRYPTION) {
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
+ } else {
+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
+ivsize, 0);
+ }
+ kfree(rctx->bounce_iv);
+ }
+
+ dma_unmap_single(ce->dev, cet->t_key, op->keylen, DMA_TO_DEVICE);
return 0;
}
@@ -346,9 +400,9 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm)
crypto_tfm_alg_driver_name(>base),
crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)));
- op->enginectx.op.do_one_request = sun8i_ce_handle_cipher_request;
- op->enginectx.op.prepare_request = NULL;
- op->enginectx.op.unprepare_request = NULL;
+ op->enginectx.op.do_one_request = sun8i_ce_cipher_run;
+ op->enginectx.op.prepare_request = sun8i_ce_cipher_
[PATCH v5 06/18] crypto: sun8i-ss: better debug printing
This patch reworks the way debug info are printed.
Instead of printing raw numbers, let's add a bit of context.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 5cf00d03be1f..739874596c72 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -424,19 +424,19 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
continue;
switch (ss_algs[i].type) {
case CRYPTO_ALG_TYPE_SKCIPHER:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.skcipher.base.cra_driver_name,
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
case CRYPTO_ALG_TYPE_RNG:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu tsize=%lu\n",
ss_algs[i].alg.rng.base.cra_driver_name,
ss_algs[i].alg.rng.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_bytes);
break;
case CRYPTO_ALG_TYPE_AHASH:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.hash.halg.base.cra_driver_name,
ss_algs[i].alg.hash.halg.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
--
2.26.2
[PATCH v5 08/18] crypto: sun8i-ce: move iv data to request context
Instead of storing IV data in the channel context, store them in the
request context.
Storing them in the channel structure was conceptualy wrong since they
are per request related.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 27 +--
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 10 ---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index b4d5fea27d20..2252604d821b 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -88,7 +88,6 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
struct scatterlist *sg;
unsigned int todo, len, offset, ivsize;
dma_addr_t addr_iv = 0, addr_key = 0;
- void *backup_iv = NULL;
u32 common, sym;
int flow, i;
int nr_sgs = 0;
@@ -151,24 +150,24 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
ivsize = crypto_skcipher_ivsize(tfm);
if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) {
- chan->ivlen = ivsize;
- chan->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
- if (!chan->bounce_iv) {
+ rctx->ivlen = ivsize;
+ rctx->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
+ if (!rctx->bounce_iv) {
err = -ENOMEM;
goto theend_key;
}
if (rctx->op_dir & CE_DECRYPTION) {
- backup_iv = kzalloc(ivsize, GFP_KERNEL);
- if (!backup_iv) {
+ rctx->backup_iv = kzalloc(ivsize, GFP_KERNEL);
+ if (!rctx->backup_iv) {
err = -ENOMEM;
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(backup_iv, areq->src, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
+offset, ivsize, 0);
}
- memcpy(chan->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, chan->bounce_iv, chan->ivlen,
+ memcpy(rctx->bounce_iv, areq->iv, ivsize);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
@@ -249,17 +248,17 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, chan->ivlen,
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
- memcpy(areq->iv, backup_iv, ivsize);
- kfree_sensitive(backup_iv);
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
} else {
scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
- kfree(chan->bounce_iv);
+ kfree(rctx->bounce_iv);
}
theend_key:
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 963645fe4adb..fc4800e8 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -129,8 +129,6 @@ struct ce_task {
/*
* struct sun8i_ce_flow - Information used by each flow
* @engine:ptr to the crypto_engine for this flow
- * @bounce_iv: buffer which contain the IV
- * @ivlen: size of bounce_iv
* @complete: completion for the current task on this flow
* @status:set to 1 by interrupt if task is done
* @t_phy: Physical address of task
@@ -139,8 +137,6 @@ struct ce_task {
*/
struct sun8i_ce_flow {
struct crypto_engine *engine;
- void *bounce_iv;
- unsigned int ivlen;
struct completion complete;
int status;
dma_addr_t t_phy;
@@ -183,11 +179,17 @@ struct sun8i_ce_dev {
* struct sun8i_cipher_req_ctx - context for a skcipher request
* @op_dir:direction (encrypt vs decrypt) for this request
* @flow:
[PATCH v5 07/18] crypto: sun8i-ce: handle endianness of t_common_ctl
t_common_ctl is LE32 so we need to convert its value before using it.
This value is only used on H6 (ignored on other SoCs) and not handling
the endianness cause failure on xRNG/hashes operations on H6 when running BE.
Fixes: 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 138759dc8190..08ed1ca12baf 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -120,7 +120,10 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
/* Be sure all data is written before enabling the task */
wmb();
- v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
+ /* Only H6 needs to write a part of t_common_ctl along with "1", but
since it is ignored
+* on older SoCs, we have no reason to complicate things.
+*/
+ v = 1 | ((le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) <<
8);
writel(v, ce->base + CE_TLR);
mutex_unlock(>mlock);
--
2.26.2
[PATCH v5 05/18] crypto: sun8i-ss: Add more comment on some structures
This patch adds some comment on structures used by sun8i-ss.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index da71d8059019..1a66457f4a20 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -195,6 +195,8 @@ struct sun8i_cipher_req_ctx {
* @keylen:len of the key
* @ss:pointer to the private data of driver handling
this TFM
* @fallback_tfm: pointer to the fallback TFM
+ *
+ * enginectx must be the first element
*/
struct sun8i_cipher_tfm_ctx {
struct crypto_engine_ctx enginectx;
--
2.26.2
[PATCH v5 04/18] crypto: sun8i-ss: fix a trivial typo
This fixes a trivial typo.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 377ea7acb54d..da71d8059019 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -100,7 +100,7 @@ struct ss_clock {
* @alg_hash: list of supported hashes. for each SS_ID_ this will give the
* corresponding SS_ALG_XXX value
* @op_mode: list of supported block modes
- * @ss_clks! list of clock needed by this variant
+ * @ss_clks: list of clock needed by this variant
*/
struct ss_variant {
char alg_cipher[SS_ID_CIPHER_MAX];
--
2.26.2
[PATCH v5 02/18] crypto: sun8i-ss: Add support for the PRNG
This patch had support for the PRNG present in the SS.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 39
.../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 25 +++
5 files changed, 243 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 96fed786ee75..b5f4f1c090ce 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -104,3 +104,11 @@ config CRYPTO_DEV_SUN8I_SS_DEBUG
Say y to enable sun8i-ss debug stats.
This will create /sys/kernel/debug/sun8i-ss/stats for displaying
the number of requests per flow and per algorithm.
+
+config CRYPTO_DEV_SUN8I_SS_PRNG
+ bool "Support for Allwinner Security System PRNG"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Security System.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index add7b0543fd5..49f2f912c816 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 97012128385f..ae8321f9a1db 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ss.h"
@@ -264,6 +265,25 @@ static struct sun8i_ss_alg_template ss_algs[] = {
.decrypt= sun8i_ss_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ss-prng",
+ .cra_priority = 300,
+ .cra_ctxsize = sizeof(struct sun8i_ss_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_prng_init,
+ .cra_exit = sun8i_ss_prng_exit,
+ },
+ .generate = sun8i_ss_prng_generate,
+ .seed = sun8i_ss_prng_seed,
+ .seedsize = PRNG_SEED_SIZE,
+ }
+},
+#endif
};
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
@@ -285,6 +305,12 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ seq_printf(seq, "%s %s %lu %lu\n",
+ ss_algs[i].alg.rng.base.cra_driver_name,
+ ss_algs[i].alg.rng.base.cra_name,
+ ss_algs[i].stat_req, ss_algs[i].stat_bytes);
+ break;
}
}
return 0;
@@ -448,6 +474,14 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
return err;
}
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ err = crypto_register_rng(_algs[i].alg.rng);
+ if (err) {
+ dev_err(ss->dev, "Fail to register %s\n",
+ ss_algs[i].alg.rng.base.cra_name);
+ ss_algs[i].ss = NULL;
+ }
+ break;
default:
ss_algs[i].ss = NULL;
dev_err(ss->dev, "ERROR: tried to register an unknown
algo\n");
@@ -469,6 +503,11 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev
*ss)
ss_algs[i].alg.skcipher.base.cra_name);
crypto_unregister_skcipher(_algs[i].alg.skcipher);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ dev_info(ss->dev, "Unregister %d %s\n", i,
+
[PATCH v5 00/18] crypto: allwinner: add xRNG and hashes
Hello The main goal of this serie is to add support for TRNG, PRNG and hashes to the sun8i-ss/sun8i-ce driver. The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading tcrypt. The PRNG and TRNG are tested with rngtest. Both LE and BE kernel are tested. This serie was tested on: - sun50i-a64-pine64 - sun8i-a83t-bananapi-m3 - sun8i-r40-bananapi-m2-ultra - sun50i-h5-libretech-all-h3-cc - sun8i-h3-orangepi-pc Regards Change since v1: - removed _crypto_rng_cast patch Change since v2: - cleaned unused variables from sun8i-ce-prng - added some missing memzero_explicit Change since v3: - rebased on latest next - removed useless cpu_to_le32() in sun8i-ss - added 2 last patches - add handle endianness of t_common_ctl patch Change since v4: - added a style issue patch Corentin Labbe (18): crypto: sun8i-ss: Add SS_START define crypto: sun8i-ss: Add support for the PRNG crypto: sun8i-ss: support hash algorithms crypto: sun8i-ss: fix a trivial typo crypto: sun8i-ss: Add more comment on some structures crypto: sun8i-ss: better debug printing crypto: sun8i-ce: handle endianness of t_common_ctl crypto: sun8i-ce: move iv data to request context crypto: sun8i-ce: split into prepare/run/unprepare crypto: sun8i-ce: handle different error registers crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes crypto: sun8i-ce: support hash algorithms crypto: sun8i-ce: Add stat_bytes debugfs crypto: sun8i-ce: Add support for the PRNG crypto: sun8i-ce: Add support for the TRNG crypto: sun8i-ce: fix comparison of integer expressions of different signedness crypto: sun8i-ss: fix comparison of integer expressions of different signedness crypto: sun8i-ce: fix some style issue drivers/crypto/allwinner/Kconfig | 43 ++ drivers/crypto/allwinner/sun8i-ce/Makefile| 3 + .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 117 +++-- .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 386 ++- .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 411 .../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 161 +++ .../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 124 + drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 135 +- drivers/crypto/allwinner/sun8i-ss/Makefile| 2 + .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 205 +++- .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 442 ++ .../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 +++ drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 89 +++- 13 files changed, 2220 insertions(+), 68 deletions(-) create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c -- 2.26.2
[PATCH v5 01/18] crypto: sun8i-ss: Add SS_START define
Instead of using an hardcoded value, let's use a defined value for
SS_START.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 9a23515783a6..97012128385f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -61,7 +61,7 @@ int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct
sun8i_cipher_req_ctx *rctx
const char *name)
{
int flow = rctx->flow;
- u32 v = 1;
+ u32 v = SS_START;
int i;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 0405767f1f7e..f3ffaea3a59f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -13,6 +13,8 @@
#include
#include
+#define SS_START 1
+
#define SS_ENCRYPTION 0
#define SS_DECRYPTION BIT(6)
--
2.26.2
Re: [PATCH] drivers/hwmon/adm1029.c: use simple i2c probe
On Thu, Aug 13, 2020 at 06:11:29PM +0200, Stephen Kitt wrote:
> This driver doesn't use the id information provided by the old i2c
> probe function, so it can trivially be converted to the simple
> ("probe_new") form.
>
> Signed-off-by: Stephen Kitt
> ---
> drivers/hwmon/adm1029.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwmon/adm1029.c b/drivers/hwmon/adm1029.c
> index f7752a5bef31..50b1df7b008c 100644
> --- a/drivers/hwmon/adm1029.c
> +++ b/drivers/hwmon/adm1029.c
> @@ -352,8 +352,7 @@ static int adm1029_init_client(struct i2c_client *client)
> return 1;
> }
>
> -static int adm1029_probe(struct i2c_client *client,
> - const struct i2c_device_id *id)
> +static int adm1029_probe(struct i2c_client *client)
> {
> struct device *dev = >dev;
> struct adm1029_data *data;
> @@ -390,7 +389,7 @@ static struct i2c_driver adm1029_driver = {
> .driver = {
> .name = "adm1029",
> },
> - .probe = adm1029_probe,
> + .probe_new = adm1029_probe,
> .id_table = adm1029_id,
> .detect = adm1029_detect,
> .address_list = normal_i2c,
> --
> 2.25.4
>
Hello
Tested-by: Corentin Labbe
Thanks
Re: [PATCH] drivers/hwmon/adm1029.c: use simple i2c probe
On Thu, Aug 13, 2020 at 06:11:29PM +0200, Stephen Kitt wrote:
> This driver doesn't use the id information provided by the old i2c
> probe function, so it can trivially be converted to the simple
> ("probe_new") form.
>
> Signed-off-by: Stephen Kitt
> ---
> drivers/hwmon/adm1029.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwmon/adm1029.c b/drivers/hwmon/adm1029.c
> index f7752a5bef31..50b1df7b008c 100644
> --- a/drivers/hwmon/adm1029.c
> +++ b/drivers/hwmon/adm1029.c
> @@ -352,8 +352,7 @@ static int adm1029_init_client(struct i2c_client *client)
> return 1;
> }
>
> -static int adm1029_probe(struct i2c_client *client,
> - const struct i2c_device_id *id)
> +static int adm1029_probe(struct i2c_client *client)
> {
> struct device *dev = >dev;
> struct adm1029_data *data;
> @@ -390,7 +389,7 @@ static struct i2c_driver adm1029_driver = {
> .driver = {
> .name = "adm1029",
> },
> - .probe = adm1029_probe,
> + .probe_new = adm1029_probe,
> .id_table = adm1029_id,
> .detect = adm1029_detect,
> .address_list = normal_i2c,
> --
> 2.25.4
>
Hello
Acked-by: Corentin LABBE
But please give me a few day to test it.
Re: [PATCH] crypto: sun8i-ce - Fix writel byte-order on big-endian
On Tue, Jul 28, 2020 at 04:00:40PM +1000, Herbert Xu wrote:
> On Tue, Jul 28, 2020 at 01:10:13PM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> > master
> > head: 92ed301919932f13b9172e525674157e983d
> > commit: 93c7f4d357de68f1e3a998b2fc775466d75c4c07 crypto: sun8i-ce - enable
> > working on big endian
> > date: 8 months ago
> > config: arm64-randconfig-s031-20200728 (attached as .config)
> > compiler: aarch64-linux-gcc (GCC) 9.3.0
> > reproduce:
> > wget
> > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
> > ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # apt-get install sparse
> > # sparse version: v0.6.2-94-geb6779f6-dirty
> > git checkout 93c7f4d357de68f1e3a998b2fc775466d75c4c07
> > # save the attached .config to linux build tree
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1
> > CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64
> >
> > If you fix the issue, kindly add following tag as appropriate
> > Reported-by: kernel test robot
>
> This looks like a real bug.
>
> ---8<---
> As writel does endianness swapping by default we need to undo
> any swapping that we have done before using it.
>
> Reported-by: kernel test robot
> Fixes: 93c7f4d357de ("crypto: sun8i-ce - enable working on big...")
> Signed-off-by: Herbert Xu
>
> diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> index 138759dc8190..703a60d4e2f6 100644
> --- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> +++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
> @@ -120,7 +120,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
> const char *name)
> /* Be sure all data is written before enabling the task */
> wmb();
>
> - v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
> + v = 1 | (le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) << 8;
> writel(v, ce->base + CE_TLR);
> mutex_unlock(>mlock);
>
> --
> Email: Herbert Xu
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
This is fixed in my v4 serie and the current driver is unaffected, only
hashes/rng could hit a problem and v4 bring them along with the fix.
[PATCH v4 07/17] crypto: sun8i-ce: handle endianness of t_common_ctl
t_common_ctl is LE32 so we need to convert its value before using it.
This value is only used on H6 (ignored on other SoCs) and not handling
the endianness cause failure on xRNG/hashes operations on H6 when running BE.
Fixes: 06f751b61329 ("crypto: allwinner - Add sun8i-ce Crypto Engine")
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 0bf8f29c5ae8..0b47a51e1cfc 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -120,7 +120,10 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
/* Be sure all data is written before enabling the task */
wmb();
- v = 1 | (ce->chanlist[flow].tl->t_common_ctl & 0x7F) << 8;
+ /* Only H6 needs to write a part of t_common_ctl along with "1", but
since it is ignored
+* on older SoCs, we have no reason to complicate things.
+*/
+ v = 1 | ((le32_to_cpu(ce->chanlist[flow].tl->t_common_ctl) & 0x7F) <<
8);
writel(v, ce->base + CE_TLR);
mutex_unlock(>mlock);
--
2.26.2
[PATCH v4 02/17] crypto: sun8i-ss: Add support for the PRNG
This patch had support for the PRNG present in the SS.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 39
.../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 25 +++
5 files changed, 243 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index d315427ea1ba..a0bdb26d0fe4 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -95,3 +95,11 @@ config CRYPTO_DEV_SUN8I_SS_DEBUG
Say y to enable sun8i-ss debug stats.
This will create /sys/kernel/debug/sun8i-ss/stats for displaying
the number of requests per flow and per algorithm.
+
+config CRYPTO_DEV_SUN8I_SS_PRNG
+ bool "Support for Allwinner Security System PRNG"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Security System.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index add7b0543fd5..49f2f912c816 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 3a9723441e46..48e073ef956e 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ss.h"
@@ -264,6 +265,25 @@ static struct sun8i_ss_alg_template ss_algs[] = {
.decrypt= sun8i_ss_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ss-prng",
+ .cra_priority = 300,
+ .cra_ctxsize = sizeof(struct sun8i_ss_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_prng_init,
+ .cra_exit = sun8i_ss_prng_exit,
+ },
+ .generate = sun8i_ss_prng_generate,
+ .seed = sun8i_ss_prng_seed,
+ .seedsize = PRNG_SEED_SIZE,
+ }
+},
+#endif
};
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
@@ -285,6 +305,12 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ seq_printf(seq, "%s %s %lu %lu\n",
+ ss_algs[i].alg.rng.base.cra_driver_name,
+ ss_algs[i].alg.rng.base.cra_name,
+ ss_algs[i].stat_req, ss_algs[i].stat_bytes);
+ break;
}
}
return 0;
@@ -448,6 +474,14 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
return err;
}
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ err = crypto_register_rng(_algs[i].alg.rng);
+ if (err) {
+ dev_err(ss->dev, "Fail to register %s\n",
+ ss_algs[i].alg.rng.base.cra_name);
+ ss_algs[i].ss = NULL;
+ }
+ break;
default:
ss_algs[i].ss = NULL;
dev_err(ss->dev, "ERROR: tried to register an unknown
algo\n");
@@ -469,6 +503,11 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev
*ss)
ss_algs[i].alg.skcipher.base.cra_name);
crypto_unregister_skcipher(_algs[i].alg.skcipher);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ dev_info(ss->dev, "Unregister %d %s\n", i,
+
[PATCH v4 08/17] crypto: sun8i-ce: move iv data to request context
Instead of storing IV data in the channel context, store them in the
request context.
Storing them in the channel structure was conceptualy wrong since they
are per request related.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 27 +--
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 10 ---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index b4d5fea27d20..2252604d821b 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -88,7 +88,6 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
struct scatterlist *sg;
unsigned int todo, len, offset, ivsize;
dma_addr_t addr_iv = 0, addr_key = 0;
- void *backup_iv = NULL;
u32 common, sym;
int flow, i;
int nr_sgs = 0;
@@ -151,24 +150,24 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
ivsize = crypto_skcipher_ivsize(tfm);
if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) {
- chan->ivlen = ivsize;
- chan->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
- if (!chan->bounce_iv) {
+ rctx->ivlen = ivsize;
+ rctx->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
+ if (!rctx->bounce_iv) {
err = -ENOMEM;
goto theend_key;
}
if (rctx->op_dir & CE_DECRYPTION) {
- backup_iv = kzalloc(ivsize, GFP_KERNEL);
- if (!backup_iv) {
+ rctx->backup_iv = kzalloc(ivsize, GFP_KERNEL);
+ if (!rctx->backup_iv) {
err = -ENOMEM;
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(backup_iv, areq->src, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
+offset, ivsize, 0);
}
- memcpy(chan->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, chan->bounce_iv, chan->ivlen,
+ memcpy(rctx->bounce_iv, areq->iv, ivsize);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
@@ -249,17 +248,17 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, chan->ivlen,
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
- memcpy(areq->iv, backup_iv, ivsize);
- kfree_sensitive(backup_iv);
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
} else {
scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
- kfree(chan->bounce_iv);
+ kfree(rctx->bounce_iv);
}
theend_key:
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 963645fe4adb..fc4800e8 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -129,8 +129,6 @@ struct ce_task {
/*
* struct sun8i_ce_flow - Information used by each flow
* @engine:ptr to the crypto_engine for this flow
- * @bounce_iv: buffer which contain the IV
- * @ivlen: size of bounce_iv
* @complete: completion for the current task on this flow
* @status:set to 1 by interrupt if task is done
* @t_phy: Physical address of task
@@ -139,8 +137,6 @@ struct ce_task {
*/
struct sun8i_ce_flow {
struct crypto_engine *engine;
- void *bounce_iv;
- unsigned int ivlen;
struct completion complete;
int status;
dma_addr_t t_phy;
@@ -183,11 +179,17 @@ struct sun8i_ce_dev {
* struct sun8i_cipher_req_ctx - context for a skcipher request
* @op_dir:direction (encrypt vs decrypt) for this request
* @flow:
[PATCH v4 06/17] crypto: sun8i-ss: better debug printing
This patch reworks the way debug info are printed.
Instead of printing raw numbers, let's add a bit of context.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 12fa24e0c127..de32107817b3 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -424,19 +424,19 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
continue;
switch (ss_algs[i].type) {
case CRYPTO_ALG_TYPE_SKCIPHER:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.skcipher.base.cra_driver_name,
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
case CRYPTO_ALG_TYPE_RNG:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu tsize=%lu\n",
ss_algs[i].alg.rng.base.cra_driver_name,
ss_algs[i].alg.rng.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_bytes);
break;
case CRYPTO_ALG_TYPE_AHASH:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.hash.halg.base.cra_driver_name,
ss_algs[i].alg.hash.halg.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
--
2.26.2
[PATCH v4 10/17] crypto: sun8i-ce: handle different error registers
Error registers are different across SoCs.
This patch handle those difference.
Signed-off-by: Corentin Labbe
---
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 62 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 8 +++
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 0b47a51e1cfc..4cc98180be3f 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -40,7 +40,8 @@ static const struct ce_variant ce_h3_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 5000, 0 },
- }
+ },
+ .esr = ESR_H3,
};
static const struct ce_variant ce_h5_variant = {
@@ -51,7 +52,8 @@ static const struct ce_variant ce_h5_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_H5,
};
static const struct ce_variant ce_h6_variant = {
@@ -64,7 +66,8 @@ static const struct ce_variant ce_h6_variant = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
- }
+ },
+ .esr = ESR_H6,
};
static const struct ce_variant ce_a64_variant = {
@@ -75,7 +78,8 @@ static const struct ce_variant ce_a64_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_A64,
};
static const struct ce_variant ce_r40_variant = {
@@ -86,7 +90,8 @@ static const struct ce_variant ce_r40_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_R40,
};
/*
@@ -102,6 +107,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
{
u32 v;
int err = 0;
+ struct ce_task *cet = ce->chanlist[flow].tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
ce->chanlist[flow].stat_req++;
@@ -131,19 +137,56 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
msecs_to_jiffies(ce->chanlist[flow].timeout));
if (ce->chanlist[flow].status == 0) {
- dev_err(ce->dev, "DMA timeout for %s\n", name);
+ dev_err(ce->dev, "DMA timeout for %s (tm=%d) on flow %d\n",
name,
+ ce->chanlist[flow].timeout, flow);
err = -EFAULT;
}
/* No need to lock for this read, the channel is locked so
* nothing could modify the error value for this channel
*/
v = readl(ce->base + CE_ESR);
- if (v) {
+ switch (ce->variant->esr) {
+ case ESR_H3:
+ /* Sadly, the error bit is not per flow */
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_A64:
+ case ESR_H5:
+ case ESR_R40:
v >>= (flow * 4);
+ v &= 0xF;
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_H6:
+ v >>= (flow * 8);
[PATCH v4 00/17] crypto: allwinner: add xRNG and hashes
Hello The main goal of this serie is to add support for TRNG, PRNG and hashes to the sun8i-ss/sun8i-ce driver. The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading tcrypt. The PRNG and TRNG are tested with rngtest. Both LE and BE kernel are tested. This serie was tested on: - sun50i-a64-pine64 - sun8i-a83t-bananapi-m3 - sun8i-r40-bananapi-m2-ultra - sun50i-h5-libretech-all-h3-cc - sun8i-h3-orangepi-pc Regards Change since v1: - removed _crypto_rng_cast patch Change since v2: - cleaned unused variables from sun8i-ce-prng - added some missing memzero_explicit Change since v3: - rebased on latest next - removed useless cpu_to_le32() in sun8i-ss - added 2 last patches - add handle endianness of t_common_ctl patch Corentin Labbe (17): crypto: sun8i-ss: Add SS_START define crypto: sun8i-ss: Add support for the PRNG crypto: sun8i-ss: support hash algorithms crypto: sun8i-ss: fix a trivial typo crypto: sun8i-ss: Add more comment on some structures crypto: sun8i-ss: better debug printing crypto: sun8i-ce: handle endianness of t_common_ctl crypto: sun8i-ce: move iv data to request context crypto: sun8i-ce: split into prepare/run/unprepare crypto: sun8i-ce: handle different error registers crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes crypto: sun8i-ce: support hash algorithms crypto: sun8i-ce: Add stat_bytes debugfs crypto: sun8i-ce: Add support for the PRNG crypto: sun8i-ce: Add support for the TRNG crypto: sun8i-ce: fix comparison of integer expressions of different signedness crypto: sun8i-ss: fix comparison of integer expressions of different signedness drivers/crypto/allwinner/Kconfig | 43 ++ drivers/crypto/allwinner/sun8i-ce/Makefile| 3 + .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 99 +++- .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 381 ++- .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 411 .../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 161 +++ .../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 124 + drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 135 +- drivers/crypto/allwinner/sun8i-ss/Makefile| 2 + .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 205 +++- .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 442 ++ .../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 +++ drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 89 +++- 13 files changed, 2216 insertions(+), 49 deletions(-) create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c -- 2.26.2
[PATCH v4 04/17] crypto: sun8i-ss: fix a trivial typo
This fixes a trivial typo.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 377ea7acb54d..da71d8059019 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -100,7 +100,7 @@ struct ss_clock {
* @alg_hash: list of supported hashes. for each SS_ID_ this will give the
* corresponding SS_ALG_XXX value
* @op_mode: list of supported block modes
- * @ss_clks! list of clock needed by this variant
+ * @ss_clks: list of clock needed by this variant
*/
struct ss_variant {
char alg_cipher[SS_ID_CIPHER_MAX];
--
2.26.2
[PATCH v4 09/17] crypto: sun8i-ce: split into prepare/run/unprepare
This patch split the do_one_request into three.
Prepare will handle all DMA mapping and initialisation of the task
structure.
Unprepare will clean all DMA mapping.
And the do_one_request will be limited to just executing the task.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 70 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 4 ++
2 files changed, 66 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index 2252604d821b..fa12c966c45f 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -75,8 +75,9 @@ static int sun8i_ce_cipher_fallback(struct skcipher_request
*areq)
return err;
}
-static int sun8i_ce_cipher(struct skcipher_request *areq)
+static int sun8i_ce_cipher_prepare(struct crypto_engine *engine, void
*async_req)
{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
struct sun8i_ce_dev *ce = op->ce;
@@ -234,7 +235,9 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
}
chan->timeout = areq->cryptlen;
- err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(areq->base.tfm));
+ rctx->nr_sgs = nr_sgs;
+ rctx->nr_sgd = nr_sgd;
+ return 0;
theend_sgs:
if (areq->src == areq->dst) {
@@ -268,13 +271,64 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
return err;
}
-static int sun8i_ce_handle_cipher_request(struct crypto_engine *engine, void
*areq)
+static int sun8i_ce_cipher_run(struct crypto_engine *engine, void *areq)
{
- int err;
struct skcipher_request *breq = container_of(areq, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(breq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(breq);
+ int flow, err;
- err = sun8i_ce_cipher(breq);
+ flow = rctx->flow;
+ err = sun8i_ce_run_task(ce, flow, crypto_tfm_alg_name(breq->base.tfm));
crypto_finalize_skcipher_request(engine, breq, err);
+ return 0;
+}
+
+static int sun8i_ce_cipher_unprepare(struct crypto_engine *engine, void
*async_req)
+{
+ struct skcipher_request *areq = container_of(async_req, struct
skcipher_request, base);
+ struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq);
+ struct sun8i_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm);
+ struct sun8i_ce_dev *ce = op->ce;
+ struct sun8i_cipher_req_ctx *rctx = skcipher_request_ctx(areq);
+ struct sun8i_ce_flow *chan;
+ struct ce_task *cet;
+ unsigned int ivsize, offset;
+ int nr_sgs = rctx->nr_sgs;
+ int nr_sgd = rctx->nr_sgd;
+ int flow;
+
+ flow = rctx->flow;
+ chan = >chanlist[flow];
+ cet = chan->tl;
+ ivsize = crypto_skcipher_ivsize(tfm);
+
+ if (areq->src == areq->dst) {
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_BIDIRECTIONAL);
+ } else {
+ if (nr_sgs > 0)
+ dma_unmap_sg(ce->dev, areq->src, nr_sgs, DMA_TO_DEVICE);
+ dma_unmap_sg(ce->dev, areq->dst, nr_sgd, DMA_FROM_DEVICE);
+ }
+
+ if (areq->iv && ivsize > 0) {
+ if (cet->t_iv)
+ dma_unmap_single(ce->dev, cet->t_iv, rctx->ivlen,
+DMA_TO_DEVICE);
+ offset = areq->cryptlen - ivsize;
+ if (rctx->op_dir & CE_DECRYPTION) {
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kfree_sensitive(rctx->backup_iv);
+ } else {
+ scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
+ivsize, 0);
+ }
+ kfree(rctx->bounce_iv);
+ }
+
+ dma_unmap_single(ce->dev, cet->t_key, op->keylen, DMA_TO_DEVICE);
return 0;
}
@@ -346,9 +400,9 @@ int sun8i_ce_cipher_init(struct crypto_tfm *tfm)
crypto_tfm_alg_driver_name(>base),
crypto_tfm_alg_driver_name(crypto_skcipher_tfm(op->fallback_tfm)));
- op->enginectx.op.do_one_request = sun8i_ce_handle_cipher_request;
- op->enginectx.op.prepare_request = NULL;
- op->enginectx.op.unprepare_request = NULL;
+ op->enginectx.op.do_one_request = sun8i_ce_cipher_run;
+ op->enginectx.op.prepare_request = sun8i_ce_cipher_
[PATCH v4 11/17] crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
Hash algorithms will need also a spetial t_dlen handling, but since the
meaning will be different, rename the current flag to specify it apply
only on ciphers algorithms.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index fa12c966c45f..2dcf508b0f18 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -119,7 +119,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
common |= rctx->op_dir | CE_COMM_INT;
cet->t_common_ctl = cpu_to_le32(common);
/* CTS and recent CE (H6) need length in bytes, in word otherwise */
- if (ce->variant->has_t_dlen_in_bytes)
+ if (ce->variant->cipher_t_dlen_in_bytes)
cet->t_dlen = cpu_to_le32(areq->cryptlen);
else
cet->t_dlen = cpu_to_le32(areq->cryptlen / 4);
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 4cc98180be3f..de4d70f87a9c 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -61,7 +61,7 @@ static const struct ce_variant ce_h6_variant = {
},
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
- .has_t_dlen_in_bytes = true,
+ .cipher_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index eea0847dc1e8..3dbf8ca47b7c 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -97,7 +97,7 @@ struct ce_clock {
* @alg_cipher:list of supported ciphers. for each CE_ID_ this will
give the
* coresponding CE_ALG_XXX value
* @op_mode: list of supported block modes
- * @has_t_dlen_in_bytes: Does the request size for cipher is in
+ * @cipher_t_dlen_in_bytes:Does the request size for cipher is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
* @esr: The type of error register
@@ -105,7 +105,7 @@ struct ce_clock {
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
u32 op_mode[CE_ID_OP_MAX];
- bool has_t_dlen_in_bytes;
+ bool cipher_t_dlen_in_bytes;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
int esr;
};
--
2.26.2
[PATCH v4 15/17] crypto: sun8i-ce: Add support for the TRNG
This patch had support for the TRNG present in the CE.
Note that according to the algorithm ID, 2 version of the TRNG exists,
the first present in H3/H5/R40/A64 and the second present in H6.
This patch adds support for both, but only the second is working
reliabily according to rngtest.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 ++
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 18 +++
.../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 124 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 18 +++
5 files changed, 169 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 223a5823867c..6aec31f7d2be 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -87,6 +87,14 @@ config CRYPTO_DEV_SUN8I_CE_PRNG
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Crypto Engine.
+config CRYPTO_DEV_SUN8I_CE_TRNG
+ bool "Support for Allwinner Crypto Engine TRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select HW_RANDOM
+ help
+ Select this option if you want to provide kernel-side support for
+ the True Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index c0ea81da2c7d..0842eb2d9408 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -2,3 +2,4 @@ obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG) += sun8i-ce-trng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 81cd7024ef2a..3901e3401c6b 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -47,6 +47,7 @@ static const struct ce_variant ce_h3_variant = {
},
.esr = ESR_H3,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h5_variant = {
@@ -63,6 +64,7 @@ static const struct ce_variant ce_h5_variant = {
},
.esr = ESR_H5,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_h6_variant = {
@@ -76,6 +78,7 @@ static const struct ce_variant ce_h6_variant = {
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
.prng_t_dlen_in_bytes = true,
+ .trng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -83,6 +86,7 @@ static const struct ce_variant ce_h6_variant = {
},
.esr = ESR_H6,
.prng = CE_ALG_PRNG_V2,
+ .trng = CE_ALG_TRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -99,6 +103,7 @@ static const struct ce_variant ce_a64_variant = {
},
.esr = ESR_A64,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
static const struct ce_variant ce_r40_variant = {
@@ -115,6 +120,7 @@ static const struct ce_variant ce_r40_variant = {
},
.esr = ESR_R40,
.prng = CE_ALG_PRNG,
+ .trng = CE_ID_NOTSUPP,
};
/*
@@ -589,6 +595,10 @@ static int sun8i_ce_dbgfs_read(struct seq_file *seq, void
*v)
break;
}
}
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ seq_printf(seq, "HWRNG %lu %lu\n",
+ ce->hwrng_stat_req, ce->hwrng_stat_bytes);
+#endif
return 0;
}
@@ -939,6 +949,10 @@ static int sun8i_ce_probe(struct platform_device *pdev)
if (err < 0)
goto error_alg;
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_register(ce);
+#endif
+
v = readl(ce->base + CE_CTR);
v >>= CE_DIE_ID_SHIFT;
v &= CE_DIE_ID_MASK;
@@ -968,6 +982,10 @@ static int sun8i_ce_remove(struct platform_device *pdev)
{
struct sun8i_ce_dev *ce = platform_get_drvdata(pdev);
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_TRNG
+ sun8i_ce_hwrng_unregister(ce);
+#endif
+
sun8i_ce_unregister_algs(ce);
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c
new file mode 100644
index ..188
[PATCH v4 14/17] crypto: sun8i-ce: Add support for the PRNG
This patch had support for the PRNG present in the CE.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 58 ++-
.../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 161 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 31
5 files changed, 258 insertions(+), 1 deletion(-)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 93cc67adb1ed..223a5823867c 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -79,6 +79,14 @@ config CRYPTO_DEV_SUN8I_CE_HASH
help
Say y to enable support for hash algorithms.
+config CRYPTO_DEV_SUN8I_CE_PRNG
+ bool "Support for Allwinner Crypto Engine PRNG"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Crypto Engine.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index d1b1f0e86c79..c0ea81da2c7d 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG) += sun8i-ce-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index c9e73d254a88..81cd7024ef2a 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ce.h"
@@ -45,6 +46,7 @@ static const struct ce_variant ce_h3_variant = {
{ "mod", 5000, 0 },
},
.esr = ESR_H3,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h5_variant = {
@@ -60,6 +62,7 @@ static const struct ce_variant ce_h5_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_H5,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_h6_variant = {
@@ -72,12 +75,14 @@ static const struct ce_variant ce_h6_variant = {
},
.cipher_t_dlen_in_bytes = true,
.hash_t_dlen_in_bits = true,
+ .prng_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
},
.esr = ESR_H6,
+ .prng = CE_ALG_PRNG_V2,
};
static const struct ce_variant ce_a64_variant = {
@@ -93,6 +98,7 @@ static const struct ce_variant ce_a64_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_A64,
+ .prng = CE_ALG_PRNG,
};
static const struct ce_variant ce_r40_variant = {
@@ -108,15 +114,17 @@ static const struct ce_variant ce_r40_variant = {
{ "mod", 3, 0 },
},
.esr = ESR_R40,
+ .prng = CE_ALG_PRNG,
};
/*
* sun8i_ce_get_engine_number() get the next channel slot
* This is a simple round-robin way of getting the next channel
+ * The flow 3 is reserve for xRNG operations
*/
int sun8i_ce_get_engine_number(struct sun8i_ce_dev *ce)
{
- return atomic_inc_return(>flow) % MAXFLOW;
+ return atomic_inc_return(>flow) % (MAXFLOW - 1);
}
int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow, const char *name)
@@ -527,6 +535,25 @@ static struct sun8i_ce_alg_template ce_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ce-prng",
+ .cra_priority = 300,
+ .cra_ctxsize= sizeof(struct
sun8i_ce_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ce_prng_init,
+ .cra_exit = sun8i_ce_prng_exit,
+ },
+ .generate = sun8i_ce_prng_generate,
+ .seed = sun8i_ce_prng_seed,
+ .seedsize
[PATCH v4 16/17] crypto: sun8i-ce: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 3901e3401c6b..7b2a142c9b8d 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -566,7 +566,7 @@ static struct sun8i_ce_alg_template ce_algs[] = {
static int sun8i_ce_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ce_dev *ce = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ce->chanlist[i].stat_req);
@@ -778,7 +778,8 @@ static int sun8i_ce_get_clks(struct sun8i_ce_dev *ce)
static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
{
- int ce_method, err, id, i;
+ int ce_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
ce_algs[i].ce = ce;
@@ -858,7 +859,7 @@ static int sun8i_ce_register_algs(struct sun8i_ce_dev *ce)
static void sun8i_ce_unregister_algs(struct sun8i_ce_dev *ce)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ce_algs); i++) {
if (!ce_algs[i].ce)
--
2.26.2
[PATCH v4 17/17] crypto: sun8i-ss: fix comparison of integer expressions of different signedness
This patch fixes the warning:
warning: comparison of integer expressions of different signedness: 'int' and
'long unsigned int' [-Wsign-compare]
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index de32107817b3..a17241483b8e 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -414,7 +414,7 @@ static struct sun8i_ss_alg_template ss_algs[] = {
static int sun8i_ss_dbgfs_read(struct seq_file *seq, void *v)
{
struct sun8i_ss_dev *ss = seq->private;
- int i;
+ unsigned int i;
for (i = 0; i < MAXFLOW; i++)
seq_printf(seq, "Channel %d: nreq %lu\n", i,
ss->flows[i].stat_req);
@@ -571,7 +571,8 @@ static void sun8i_ss_pm_exit(struct sun8i_ss_dev *ss)
static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
{
- int ss_method, err, id, i;
+ int ss_method, err, id;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
ss_algs[i].ss = ss;
@@ -642,7 +643,7 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
static void sun8i_ss_unregister_algs(struct sun8i_ss_dev *ss)
{
- int i;
+ unsigned int i;
for (i = 0; i < ARRAY_SIZE(ss_algs); i++) {
if (!ss_algs[i].ss)
--
2.26.2
[PATCH v4 13/17] crypto: sun8i-ce: Add stat_bytes debugfs
This patch adds a new stat_bytes counter in the sun8i-ce debugfs.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 6bbafdf9d40c..910b510d7bb2 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -276,6 +276,7 @@ struct sun8i_ce_hash_reqctx {
* @alg: one of sub struct must be used
* @stat_req: number of request done on this template
* @stat_fb: number of request which has fallbacked
+ * @stat_bytes:total data size done by this template
*/
struct sun8i_ce_alg_template {
u32 type;
@@ -289,6 +290,7 @@ struct sun8i_ce_alg_template {
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
unsigned long stat_req;
unsigned long stat_fb;
+ unsigned long stat_bytes;
#endif
};
--
2.26.2
[PATCH v4 12/17] crypto: sun8i-ce: support hash algorithms
The CE support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224, SHA256, SHA384 and SHA512.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 10 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 229 ++
.../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 411 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 58 +++
5 files changed, 709 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 945228b3a8c4..93cc67adb1ed 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -69,6 +69,16 @@ config CRYPTO_DEV_SUN8I_CE_DEBUG
This will create /sys/kernel/debug/sun8i-ce/stats for displaying
the number of requests per flow and per algorithm.
+config CRYPTO_DEV_SUN8I_CE_HASH
+ bool "Enable support for hash on sun8i-ce"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select MD5
+ select SHA1
+ select SHA256
+ select SHA512
+ help
+ Say y to enable support for hash algorithms.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index 08b68c3c1ca9..d1b1f0e86c79 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index de4d70f87a9c..c9e73d254a88 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -35,6 +35,9 @@
static const struct ce_variant ce_h3_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -47,6 +50,9 @@ static const struct ce_variant ce_h3_variant = {
static const struct ce_variant ce_h5_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -59,9 +65,13 @@ static const struct ce_variant ce_h5_variant = {
static const struct ce_variant ce_h6_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.cipher_t_dlen_in_bytes = true,
+ .hash_t_dlen_in_bits = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -73,6 +83,9 @@ static const struct ce_variant ce_h6_variant = {
static const struct ce_variant ce_a64_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -85,6 +98,9 @@ static const struct ce_variant ce_a64_variant = {
static const struct ce_variant ce_r40_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -329,6 +345,188 @@ static struct sun8i_ce_alg_template ce_algs[] = {
.decrypt= sun8i_ce_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ce_algo_id = CE_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ce_hash_init,
+ .update = sun8i_ce_hash_update,
+ .final = sun8i_ce_hash_final,
+ .finup = sun8i_ce_hash_finup,
+ .digest = sun8i_ce_hash_digest,
+ .export = sun8i_ce_hash_export,
+ .import = sun8i_ce_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+
[PATCH v4 03/17] crypto: sun8i-ss: support hash algorithms
The SS support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224 and SHA256.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 9 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 155 ++
.../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 442 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 58 +++
5 files changed, 665 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index a0bdb26d0fe4..945228b3a8c4 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -103,3 +103,12 @@ config CRYPTO_DEV_SUN8I_SS_PRNG
help
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Security System.
+
+config CRYPTO_DEV_SUN8I_SS_HASH
+ bool "Enable support for hash on sun8i-ss"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select MD5
+ select SHA1
+ select SHA256
+ help
+ Say y to enable support for hash algorithms.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index 49f2f912c816..aabfd893c817 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_HASH) += sun8i-ss-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 48e073ef956e..12fa24e0c127 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -41,6 +41,8 @@ static const struct ss_variant ss_a80_variant = {
static const struct ss_variant ss_a83t_variant = {
.alg_cipher = { SS_ALG_AES, SS_ALG_DES, SS_ALG_3DES,
},
+ .alg_hash = { SS_ALG_MD5, SS_ALG_SHA1, SS_ALG_SHA224, SS_ALG_SHA256,
+ },
.op_mode = { SS_OP_ECB, SS_OP_CBC,
},
.ss_clks = {
@@ -284,6 +286,128 @@ static struct sun8i_ss_alg_template ss_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+ .cra_name = "md5",
+ .cra_driver_name = "md5-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+ .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct
sun8i_ss_hash_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_hash_crainit,
+ .cra_exit = sun8i_ss_hash_craexit,
+ }
+ }
+ }
+},
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_SHA1,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = SHA1_DIGEST_SIZE,
+ .statesize = sizeof(struct sha1_state),
+ .base = {
+ .cra_name = "sha1",
+ .cra_driver_name = "sha1-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+
[PATCH v4 05/17] crypto: sun8i-ss: Add more comment on some structures
This patch adds some comment on structures used by sun8i-ss.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index da71d8059019..1a66457f4a20 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -195,6 +195,8 @@ struct sun8i_cipher_req_ctx {
* @keylen:len of the key
* @ss:pointer to the private data of driver handling
this TFM
* @fallback_tfm: pointer to the fallback TFM
+ *
+ * enginectx must be the first element
*/
struct sun8i_cipher_tfm_ctx {
struct crypto_engine_ctx enginectx;
--
2.26.2
[PATCH v4 01/17] crypto: sun8i-ss: Add SS_START define
Instead of using an hardcoded value, let's use a defined value for
SS_START.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index d9767e2c84d9..3a9723441e46 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -61,7 +61,7 @@ int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct
sun8i_cipher_req_ctx *rctx
const char *name)
{
int flow = rctx->flow;
- u32 v = 1;
+ u32 v = SS_START;
int i;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 0405767f1f7e..f3ffaea3a59f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -13,6 +13,8 @@
#include
#include
+#define SS_START 1
+
#define SS_ENCRYPTION 0
#define SS_DECRYPTION BIT(6)
--
2.26.2
Re: [PATCH -next] crypto: allwinner - Convert to DEFINE_SHOW_ATTRIBUTE
On Thu, Jul 16, 2020 at 05:06:32PM +0800, Qinglang Miao wrote: > From: Chen Huang > > Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. > > Signed-off-by: Chen Huang > --- > drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 15 ++- > drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 15 ++- > 2 files changed, 4 insertions(+), 26 deletions(-) > Acked-by: Corentin Labbe Tested-by: Corentin Labbe Thanks
Re: [PATCH v3 00/16] Allwinner A100 Initial support
On Wed, Jul 08, 2020 at 03:19:26PM +0800, Frank Lee wrote: > This patch set adds initial support for allwinner a100 soc, > which is a 64-bit tablet chip. > Hello Does a product already exists with it ? I couldnt found any. Does a datasheet is availlable ? Regards
[PATCH] sparc: sparc64_defconfig: add necessary configs for qemu
The sparc64 qemu machines uses pcnet32 network hardware by default, so for simple boot testing using qemu, having PCNET32 is useful. Same for its storage which is a PATA_CMD64. Signed-off-by: Corentin Labbe --- arch/sparc/configs/sparc64_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/sparc/configs/sparc64_defconfig b/arch/sparc/configs/sparc64_defconfig index bde4d21a8ac8..61073f48a7a1 100644 --- a/arch/sparc/configs/sparc64_defconfig +++ b/arch/sparc/configs/sparc64_defconfig @@ -236,3 +236,6 @@ CONFIG_CRYPTO_TWOFISH=m CONFIG_CRC16=m CONFIG_LIBCRC32C=m CONFIG_VCC=m +CONFIG_ATA=y +CONFIG_PATA_CMD64X=y +CONFIG_PCNET32=y -- 2.26.2
[PATCH v3 03/14] crypto: sun8i-ss: support hash algorithms
The SS support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224 and SHA256.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 9 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 155 ++
.../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 446 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 60 +++
5 files changed, 671 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index a0bdb26d0fe4..945228b3a8c4 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -103,3 +103,12 @@ config CRYPTO_DEV_SUN8I_SS_PRNG
help
Select this option if you want to provide kernel-side support for
the Pseudo-Random Number Generator found in the Security System.
+
+config CRYPTO_DEV_SUN8I_SS_HASH
+ bool "Enable support for hash on sun8i-ss"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select MD5
+ select SHA1
+ select SHA256
+ help
+ Say y to enable support for hash algorithms.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index 49f2f912c816..aabfd893c817 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,3 +1,4 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_HASH) += sun8i-ss-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 592ee35616ba..cd408969bd03 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -41,6 +41,8 @@ static const struct ss_variant ss_a80_variant = {
static const struct ss_variant ss_a83t_variant = {
.alg_cipher = { SS_ALG_AES, SS_ALG_DES, SS_ALG_3DES,
},
+ .alg_hash = { SS_ALG_MD5, SS_ALG_SHA1, SS_ALG_SHA224, SS_ALG_SHA256,
+ },
.op_mode = { SS_OP_ECB, SS_OP_CBC,
},
.ss_clks = {
@@ -280,6 +282,128 @@ static struct sun8i_ss_alg_template ss_algs[] = {
}
},
#endif
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+ .cra_name = "md5",
+ .cra_driver_name = "md5-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+ .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
+ .cra_ctxsize = sizeof(struct
sun8i_ss_hash_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_hash_crainit,
+ .cra_exit = sun8i_ss_hash_craexit,
+ }
+ }
+ }
+},
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ss_algo_id = SS_ID_HASH_SHA1,
+ .alg.hash = {
+ .init = sun8i_ss_hash_init,
+ .update = sun8i_ss_hash_update,
+ .final = sun8i_ss_hash_final,
+ .finup = sun8i_ss_hash_finup,
+ .digest = sun8i_ss_hash_digest,
+ .export = sun8i_ss_hash_export,
+ .import = sun8i_ss_hash_import,
+ .halg = {
+ .digestsize = SHA1_DIGEST_SIZE,
+ .statesize = sizeof(struct sha1_state),
+ .base = {
+ .cra_name = "sha1",
+ .cra_driver_name = "sha1-sun8i-ss",
+ .cra_priority = 300,
+ .cra_alignmask = 3,
+ .cra_flags = CRYPTO_ALG_TYPE_AHASH |
+ CRYPTO_ALG_ASYNC |
+ CRYPTO_ALG_NEED_FALLBACK,
+
[PATCH v3 02/14] crypto: sun8i-ss: Add support for the PRNG
This patch had support for the PRNG present in the SS.
The output was tested with rngtest without any failure.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 8 +
drivers/crypto/allwinner/sun8i-ss/Makefile| 1 +
.../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 39
.../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 ++
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 25 +++
5 files changed, 243 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index d315427ea1ba..a0bdb26d0fe4 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -95,3 +95,11 @@ config CRYPTO_DEV_SUN8I_SS_DEBUG
Say y to enable sun8i-ss debug stats.
This will create /sys/kernel/debug/sun8i-ss/stats for displaying
the number of requests per flow and per algorithm.
+
+config CRYPTO_DEV_SUN8I_SS_PRNG
+ bool "Support for Allwinner Security System PRNG"
+ depends on CRYPTO_DEV_SUN8I_SS
+ select CRYPTO_RNG
+ help
+ Select this option if you want to provide kernel-side support for
+ the Pseudo-Random Number Generator found in the Security System.
diff --git a/drivers/crypto/allwinner/sun8i-ss/Makefile
b/drivers/crypto/allwinner/sun8i-ss/Makefile
index add7b0543fd5..49f2f912c816 100644
--- a/drivers/crypto/allwinner/sun8i-ss/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ss/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_SS) += sun8i-ss.o
sun8i-ss-y += sun8i-ss-core.o sun8i-ss-cipher.o
+sun8i-ss-$(CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG) += sun8i-ss-prng.o
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 81eff935fb5c..592ee35616ba 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include
#include "sun8i-ss.h"
@@ -260,6 +261,25 @@ static struct sun8i_ss_alg_template ss_algs[] = {
.decrypt= sun8i_ss_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_PRNG
+{
+ .type = CRYPTO_ALG_TYPE_RNG,
+ .alg.rng = {
+ .base = {
+ .cra_name = "stdrng",
+ .cra_driver_name= "sun8i-ss-prng",
+ .cra_priority = 300,
+ .cra_ctxsize = sizeof(struct sun8i_ss_rng_tfm_ctx),
+ .cra_module = THIS_MODULE,
+ .cra_init = sun8i_ss_prng_init,
+ .cra_exit = sun8i_ss_prng_exit,
+ },
+ .generate = sun8i_ss_prng_generate,
+ .seed = sun8i_ss_prng_seed,
+ .seedsize = PRNG_SEED_SIZE,
+ }
+},
+#endif
};
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
@@ -281,6 +301,12 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ seq_printf(seq, "%s %s %lu %lu\n",
+ ss_algs[i].alg.rng.base.cra_driver_name,
+ ss_algs[i].alg.rng.base.cra_name,
+ ss_algs[i].stat_req, ss_algs[i].stat_bytes);
+ break;
}
}
return 0;
@@ -444,6 +470,14 @@ static int sun8i_ss_register_algs(struct sun8i_ss_dev *ss)
return err;
}
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ err = crypto_register_rng(_algs[i].alg.rng);
+ if (err) {
+ dev_err(ss->dev, "Fail to register %s\n",
+ ss_algs[i].alg.rng.base.cra_name);
+ ss_algs[i].ss = NULL;
+ }
+ break;
default:
ss_algs[i].ss = NULL;
dev_err(ss->dev, "ERROR: tried to register an unknown
algo\n");
@@ -465,6 +499,11 @@ static void sun8i_ss_unregister_algs(struct sun8i_ss_dev
*ss)
ss_algs[i].alg.skcipher.base.cra_name);
crypto_unregister_skcipher(_algs[i].alg.skcipher);
break;
+ case CRYPTO_ALG_TYPE_RNG:
+ dev_info(ss->dev, "Unregister %d %s\n", i,
+
[PATCH v3 11/14] crypto: sun8i-ce: support hash algorithms
The CE support multiples hash algorithms, this patch adds support for
MD5, SHA1, SHA224, SHA256, SHA384 and SHA512.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 10 +
drivers/crypto/allwinner/sun8i-ce/Makefile| 1 +
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 229 ++
.../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 415 ++
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 58 +++
5 files changed, 713 insertions(+)
create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c
diff --git a/drivers/crypto/allwinner/Kconfig b/drivers/crypto/allwinner/Kconfig
index 945228b3a8c4..93cc67adb1ed 100644
--- a/drivers/crypto/allwinner/Kconfig
+++ b/drivers/crypto/allwinner/Kconfig
@@ -69,6 +69,16 @@ config CRYPTO_DEV_SUN8I_CE_DEBUG
This will create /sys/kernel/debug/sun8i-ce/stats for displaying
the number of requests per flow and per algorithm.
+config CRYPTO_DEV_SUN8I_CE_HASH
+ bool "Enable support for hash on sun8i-ce"
+ depends on CRYPTO_DEV_SUN8I_CE
+ select MD5
+ select SHA1
+ select SHA256
+ select SHA512
+ help
+ Say y to enable support for hash algorithms.
+
config CRYPTO_DEV_SUN8I_SS
tristate "Support for Allwinner Security System cryptographic offloader"
select CRYPTO_SKCIPHER
diff --git a/drivers/crypto/allwinner/sun8i-ce/Makefile
b/drivers/crypto/allwinner/sun8i-ce/Makefile
index 08b68c3c1ca9..d1b1f0e86c79 100644
--- a/drivers/crypto/allwinner/sun8i-ce/Makefile
+++ b/drivers/crypto/allwinner/sun8i-ce/Makefile
@@ -1,2 +1,3 @@
obj-$(CONFIG_CRYPTO_DEV_SUN8I_CE) += sun8i-ce.o
sun8i-ce-y += sun8i-ce-core.o sun8i-ce-cipher.o
+sun8i-ce-$(CONFIG_CRYPTO_DEV_SUN8I_CE_HASH) += sun8i-ce-hash.o
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 8091ea1d5afc..2cebec5f5aea 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -35,6 +35,9 @@
static const struct ce_variant ce_h3_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -47,6 +50,9 @@ static const struct ce_variant ce_h3_variant = {
static const struct ce_variant ce_h5_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -59,9 +65,13 @@ static const struct ce_variant ce_h5_variant = {
static const struct ce_variant ce_h6_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ALG_SHA384, CE_ALG_SHA512
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.cipher_t_dlen_in_bytes = true,
+ .hash_t_dlen_in_bits = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
@@ -73,6 +83,9 @@ static const struct ce_variant ce_h6_variant = {
static const struct ce_variant ce_a64_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -85,6 +98,9 @@ static const struct ce_variant ce_a64_variant = {
static const struct ce_variant ce_r40_variant = {
.alg_cipher = { CE_ALG_AES, CE_ALG_DES, CE_ALG_3DES,
},
+ .alg_hash = { CE_ALG_MD5, CE_ALG_SHA1, CE_ALG_SHA224, CE_ALG_SHA256,
+ CE_ID_NOTSUPP, CE_ID_NOTSUPP
+ },
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
.ce_clks = {
@@ -322,6 +338,188 @@ static struct sun8i_ce_alg_template ce_algs[] = {
.decrypt= sun8i_ce_skdecrypt,
}
},
+#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_HASH
+{ .type = CRYPTO_ALG_TYPE_AHASH,
+ .ce_algo_id = CE_ID_HASH_MD5,
+ .alg.hash = {
+ .init = sun8i_ce_hash_init,
+ .update = sun8i_ce_hash_update,
+ .final = sun8i_ce_hash_final,
+ .finup = sun8i_ce_hash_finup,
+ .digest = sun8i_ce_hash_digest,
+ .export = sun8i_ce_hash_export,
+ .import = sun8i_ce_hash_import,
+ .halg = {
+ .digestsize = MD5_DIGEST_SIZE,
+ .statesize = sizeof(struct md5_state),
+ .base = {
+
[PATCH v3 04/14] crypto: sun8i-ss: fix a trivial typo
This fixes a trivial typo.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 350a611b0b9e..056fcdd14201 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -100,7 +100,7 @@ struct ss_clock {
* @alg_hash: list of supported hashes. for each SS_ID_ this will give the
* corresponding SS_ALG_XXX value
* @op_mode: list of supported block modes
- * @ss_clks! list of clock needed by this variant
+ * @ss_clks: list of clock needed by this variant
*/
struct ss_variant {
char alg_cipher[SS_ID_CIPHER_MAX];
--
2.26.2
[PATCH v3 06/14] crypto: sun8i-ss: better debug printing
This patch reworks the way debug info are printed.
Instead of printing raw numbers, let's add a bit of context.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index cd408969bd03..8ab154842c9e 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -420,19 +420,19 @@ static int sun8i_ss_dbgfs_read(struct seq_file *seq, void
*v)
continue;
switch (ss_algs[i].type) {
case CRYPTO_ALG_TYPE_SKCIPHER:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.skcipher.base.cra_driver_name,
ss_algs[i].alg.skcipher.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
break;
case CRYPTO_ALG_TYPE_RNG:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu tsize=%lu\n",
ss_algs[i].alg.rng.base.cra_driver_name,
ss_algs[i].alg.rng.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_bytes);
break;
case CRYPTO_ALG_TYPE_AHASH:
- seq_printf(seq, "%s %s %lu %lu\n",
+ seq_printf(seq, "%s %s reqs=%lu fallback=%lu\n",
ss_algs[i].alg.hash.halg.base.cra_driver_name,
ss_algs[i].alg.hash.halg.base.cra_name,
ss_algs[i].stat_req, ss_algs[i].stat_fb);
--
2.26.2
[PATCH v3 10/14] crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes
Hash algorithms will need also a spetial t_dlen handling, but since the
meaning will be different, rename the current flag to specify it apply
only on ciphers algorithms.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h| 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index d662dac83361..ee7add582e90 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -122,7 +122,7 @@ static int sun8i_ce_cipher_prepare(struct crypto_engine
*engine, void *async_req
common |= rctx->op_dir | CE_COMM_INT;
cet->t_common_ctl = cpu_to_le32(common);
/* CTS and recent CE (H6) need length in bytes, in word otherwise */
- if (ce->variant->has_t_dlen_in_bytes)
+ if (ce->variant->cipher_t_dlen_in_bytes)
cet->t_dlen = cpu_to_le32(areq->cryptlen);
else
cet->t_dlen = cpu_to_le32(areq->cryptlen / 4);
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 94969f86b967..8091ea1d5afc 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -61,7 +61,7 @@ static const struct ce_variant ce_h6_variant = {
},
.op_mode = { CE_OP_ECB, CE_OP_CBC
},
- .has_t_dlen_in_bytes = true,
+ .cipher_t_dlen_in_bytes = true,
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index ed1a91da967b..0a70fcc102f1 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -97,7 +97,7 @@ struct ce_clock {
* @alg_cipher:list of supported ciphers. for each CE_ID_ this will
give the
* coresponding CE_ALG_XXX value
* @op_mode: list of supported block modes
- * @has_t_dlen_in_bytes: Does the request size for cipher is in
+ * @cipher_t_dlen_in_bytes:Does the request size for cipher is in
* bytes or words
* @ce_clks: list of clocks needed by this variant
* @esr: The type of error register
@@ -105,7 +105,7 @@ struct ce_clock {
struct ce_variant {
char alg_cipher[CE_ID_CIPHER_MAX];
u32 op_mode[CE_ID_OP_MAX];
- bool has_t_dlen_in_bytes;
+ bool cipher_t_dlen_in_bytes;
struct ce_clock ce_clks[CE_MAX_CLOCKS];
int esr;
};
--
2.26.2
[PATCH v3 09/14] crypto: sun8i-ce: handle different error registers
Error registers are different across SoCs.
This patch handle those difference.
Signed-off-by: Corentin Labbe
---
.../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 62 ---
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 8 +++
2 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index b957061424a1..94969f86b967 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -40,7 +40,8 @@ static const struct ce_variant ce_h3_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 5000, 0 },
- }
+ },
+ .esr = ESR_H3,
};
static const struct ce_variant ce_h5_variant = {
@@ -51,7 +52,8 @@ static const struct ce_variant ce_h5_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_H5,
};
static const struct ce_variant ce_h6_variant = {
@@ -64,7 +66,8 @@ static const struct ce_variant ce_h6_variant = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
{ "ram", 0, 4 },
- }
+ },
+ .esr = ESR_H6,
};
static const struct ce_variant ce_a64_variant = {
@@ -75,7 +78,8 @@ static const struct ce_variant ce_a64_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_A64,
};
static const struct ce_variant ce_r40_variant = {
@@ -86,7 +90,8 @@ static const struct ce_variant ce_r40_variant = {
.ce_clks = {
{ "bus", 0, 2 },
{ "mod", 3, 0 },
- }
+ },
+ .esr = ESR_R40,
};
/*
@@ -102,6 +107,7 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
{
u32 v;
int err = 0;
+ struct ce_task *cet = ce->chanlist[flow].tl;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG
ce->chanlist[flow].stat_req++;
@@ -128,19 +134,56 @@ int sun8i_ce_run_task(struct sun8i_ce_dev *ce, int flow,
const char *name)
msecs_to_jiffies(ce->chanlist[flow].timeout));
if (ce->chanlist[flow].status == 0) {
- dev_err(ce->dev, "DMA timeout for %s\n", name);
+ dev_err(ce->dev, "DMA timeout for %s (tm=%d) on flow %d\n",
name,
+ ce->chanlist[flow].timeout, flow);
err = -EFAULT;
}
/* No need to lock for this read, the channel is locked so
* nothing could modify the error value for this channel
*/
v = readl(ce->base + CE_ESR);
- if (v) {
+ switch (ce->variant->esr) {
+ case ESR_H3:
+ /* Sadly, the error bit is not per flow */
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_A64:
+ case ESR_H5:
+ case ESR_R40:
v >>= (flow * 4);
+ v &= 0xF;
+ if (v) {
+ dev_err(ce->dev, "CE ERROR: %x for flow %x\n", v, flow);
+ err = -EFAULT;
+ print_hex_dump(KERN_INFO, "TASK: ", DUMP_PREFIX_NONE,
16, 4,
+ cet, sizeof(struct ce_task), false);
+ }
+ if (v & CE_ERR_ALGO_NOTSUP)
+ dev_err(ce->dev, "CE ERROR: algorithm not supported\n");
+ if (v & CE_ERR_DATALEN)
+ dev_err(ce->dev, "CE ERROR: data length error\n");
+ if (v & CE_ERR_KEYSRAM)
+ dev_err(ce->dev, "CE ERROR: keysram access error for
AES\n");
+ break;
+ case ESR_H6:
+ v >>= (flow * 8);
[PATCH v3 00/14] crypto: allwinner: add xRNG and hashes
Hello The main goal of this serie is to add support for TRNG, PRNG and hashes to the sun8i-ss/sun8i-ce. The whole serie is tested with CRYPTO_EXTRA_TESTS enabled and loading tcrypt. The PRNG and TRNG are tested with rngtest. Regards Change since v1: - removed _crypto_rng_cast patch Change since v2: - cleaned unused variables from sun8i-ce-prng - added some missing memzero_explicit Corentin Labbe (14): crypto: sun8i-ss: Add SS_START define crypto: sun8i-ss: Add support for the PRNG crypto: sun8i-ss: support hash algorithms crypto: sun8i-ss: fix a trivial typo crypto: sun8i-ss: Add more comment on some structures crypto: sun8i-ss: better debug printing crypto: sun8i-ce: move iv data to request context crypto: sun8i-ce: split into prepare/run/unprepare crypto: sun8i-ce: handle different error registers crypto: sun8i-ce: rename has_t_dlen_in_bytes to cipher_t_dlen_in_bytes crypto: sun8i-ce: support hash algorithms crypto: sun8i-ce: Add stat_bytes debugfs crypto: sun8i-ce: Add support for the PRNG crypto: sun8i-ce: Add support for the TRNG drivers/crypto/allwinner/Kconfig | 43 ++ drivers/crypto/allwinner/sun8i-ce/Makefile| 3 + .../allwinner/sun8i-ce/sun8i-ce-cipher.c | 99 +++- .../crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 369 ++- .../crypto/allwinner/sun8i-ce/sun8i-ce-hash.c | 415 .../crypto/allwinner/sun8i-ce/sun8i-ce-prng.c | 161 +++ .../crypto/allwinner/sun8i-ce/sun8i-ce-trng.c | 124 + drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 135 +- drivers/crypto/allwinner/sun8i-ss/Makefile| 2 + .../crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 198 +++- .../crypto/allwinner/sun8i-ss/sun8i-ss-hash.c | 446 ++ .../crypto/allwinner/sun8i-ss/sun8i-ss-prng.c | 170 +++ drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 93 +++- 13 files changed, 2216 insertions(+), 42 deletions(-) create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-prng.c create mode 100644 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-trng.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-hash.c create mode 100644 drivers/crypto/allwinner/sun8i-ss/sun8i-ss-prng.c -- 2.26.2
[PATCH v3 07/14] crypto: sun8i-ce: move iv data to request context
Instead of storing IV data in the channel context, store them in the
request context.
Storing them in the channel structure was conceptualy wrong since they
are per request related.
Signed-off-by: Corentin Labbe
---
.../allwinner/sun8i-ce/sun8i-ce-cipher.c | 27 +--
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h | 10 ---
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
index a6abb701bfc6..7716fa2d3250 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-cipher.c
@@ -91,7 +91,6 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
struct scatterlist *sg;
unsigned int todo, len, offset, ivsize;
dma_addr_t addr_iv = 0, addr_key = 0;
- void *backup_iv = NULL;
u32 common, sym;
int flow, i;
int nr_sgs = 0;
@@ -154,24 +153,24 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
ivsize = crypto_skcipher_ivsize(tfm);
if (areq->iv && crypto_skcipher_ivsize(tfm) > 0) {
- chan->ivlen = ivsize;
- chan->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
- if (!chan->bounce_iv) {
+ rctx->ivlen = ivsize;
+ rctx->bounce_iv = kzalloc(ivsize, GFP_KERNEL | GFP_DMA);
+ if (!rctx->bounce_iv) {
err = -ENOMEM;
goto theend_key;
}
if (rctx->op_dir & CE_DECRYPTION) {
- backup_iv = kzalloc(ivsize, GFP_KERNEL);
- if (!backup_iv) {
+ rctx->backup_iv = kzalloc(ivsize, GFP_KERNEL);
+ if (!rctx->backup_iv) {
err = -ENOMEM;
goto theend_key;
}
offset = areq->cryptlen - ivsize;
- scatterwalk_map_and_copy(backup_iv, areq->src, offset,
-ivsize, 0);
+ scatterwalk_map_and_copy(rctx->backup_iv, areq->src,
+offset, ivsize, 0);
}
- memcpy(chan->bounce_iv, areq->iv, ivsize);
- addr_iv = dma_map_single(ce->dev, chan->bounce_iv, chan->ivlen,
+ memcpy(rctx->bounce_iv, areq->iv, ivsize);
+ addr_iv = dma_map_single(ce->dev, rctx->bounce_iv, rctx->ivlen,
DMA_TO_DEVICE);
cet->t_iv = cpu_to_le32(addr_iv);
if (dma_mapping_error(ce->dev, addr_iv)) {
@@ -252,17 +251,17 @@ static int sun8i_ce_cipher(struct skcipher_request *areq)
theend_iv:
if (areq->iv && ivsize > 0) {
if (addr_iv)
- dma_unmap_single(ce->dev, addr_iv, chan->ivlen,
+ dma_unmap_single(ce->dev, addr_iv, rctx->ivlen,
DMA_TO_DEVICE);
offset = areq->cryptlen - ivsize;
if (rctx->op_dir & CE_DECRYPTION) {
- memcpy(areq->iv, backup_iv, ivsize);
- kzfree(backup_iv);
+ memcpy(areq->iv, rctx->backup_iv, ivsize);
+ kzfree(rctx->backup_iv);
} else {
scatterwalk_map_and_copy(areq->iv, areq->dst, offset,
ivsize, 0);
}
- kfree(chan->bounce_iv);
+ kfree(rctx->bounce_iv);
}
theend_key:
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 0e9eac397e1b..c9c7ef8299e2 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -129,8 +129,6 @@ struct ce_task {
/*
* struct sun8i_ce_flow - Information used by each flow
* @engine:ptr to the crypto_engine for this flow
- * @bounce_iv: buffer which contain the IV
- * @ivlen: size of bounce_iv
* @complete: completion for the current task on this flow
* @status:set to 1 by interrupt if task is done
* @t_phy: Physical address of task
@@ -139,8 +137,6 @@ struct ce_task {
*/
struct sun8i_ce_flow {
struct crypto_engine *engine;
- void *bounce_iv;
- unsigned int ivlen;
struct completion complete;
int status;
dma_addr_t t_phy;
@@ -183,10 +179,16 @@ struct sun8i_ce_dev {
* struct sun8i_cipher_req_ctx - context for a skcipher request
* @op_dir:direction (encrypt vs decrypt) for this request
* @flow: the flow to use for this request
+
[PATCH v3 05/14] crypto: sun8i-ss: Add more comment on some structures
This patch adds some comment on structures used by sun8i-ss.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 056fcdd14201..b2668e5b612f 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -171,6 +171,8 @@ struct sun8i_ss_dev {
* @ivlen: size of biv
* @keylen:keylen for this request
* @biv: buffer which contain the IV
+ *
+ * t_src, t_dst, p_key, p_iv op_mode, op_dir and method must be in LE32
*/
struct sun8i_cipher_req_ctx {
struct sginfo t_src[MAX_SG];
@@ -193,6 +195,8 @@ struct sun8i_cipher_req_ctx {
* @keylen:len of the key
* @ss:pointer to the private data of driver handling
this TFM
* @fallback_tfm: pointer to the fallback TFM
+ *
+ * enginectx must be the first element
*/
struct sun8i_cipher_tfm_ctx {
struct crypto_engine_ctx enginectx;
--
2.26.2
[PATCH v3 01/14] crypto: sun8i-ss: Add SS_START define
Instead of using an hardcoded value, let's use a defined value for
SS_START.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c | 2 +-
drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
index 5d9d0fedcb06..81eff935fb5c 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss-core.c
@@ -61,7 +61,7 @@ int sun8i_ss_run_task(struct sun8i_ss_dev *ss, struct
sun8i_cipher_req_ctx *rctx
const char *name)
{
int flow = rctx->flow;
- u32 v = 1;
+ u32 v = SS_START;
int i;
#ifdef CONFIG_CRYPTO_DEV_SUN8I_SS_DEBUG
diff --git a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
index 29c44f279112..f7a64033fc03 100644
--- a/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
+++ b/drivers/crypto/allwinner/sun8i-ss/sun8i-ss.h
@@ -13,6 +13,8 @@
#include
#include
+#define SS_START 1
+
#define SS_ENCRYPTION 0
#define SS_DECRYPTION BIT(6)
--
2.26.2
