[PATCH v9 14/15] dt-bindings: power: rockchip: Add bindings for RK3568 Soc
From: Elaine Zhang Add the compatible string for RK3568 SoC. Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker Acked-by: Rob Herring --- Changed V8: Add pd-node ref schema --- Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index f71569de9..9b9d71087 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -40,6 +40,7 @@ properties: - rockchip,rk3366-power-controller - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller + - rockchip,rk3568-power-controller "#power-domain-cells": const: 1 @@ -117,6 +118,7 @@ $defs: "include/dt-bindings/power/rk3366-power.h" "include/dt-bindings/power/rk3368-power.h" "include/dt-bindings/power/rk3399-power.h" + "include/dt-bindings/power/rk3568-power.h" clocks: minItems: 1 -- 2.11.0
[PATCH v9 15/15] soc: rockchip: power-domain: add rk3568 powerdomains
From: Elaine Zhang
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 1d1b06672..0868b7d40 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
struct rockchip_domain_info {
const char *name;
@@ -135,6 +136,9 @@ struct rockchip_pmu {
#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
DOMAIN(name, pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3568(name, pwr, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
+
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
struct rockchip_pmu *pmu = pd->pmu;
@@ -848,6 +852,18 @@ static const struct rockchip_domain_info
rk3399_pm_domains[] = {
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31),
BIT(29), true),
};
+static const struct rockchip_domain_info rk3568_pm_domains[] = {
+ [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false),
+ [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false),
+ [RK3568_PD_VI] = DOMAIN_RK3568("vi", BIT(6), BIT(3), false),
+ [RK3568_PD_VO] = DOMAIN_RK3568("vo", BIT(7), BIT(4), false),
+ [RK3568_PD_RGA] = DOMAIN_RK3568("rga", BIT(5), BIT(5), false),
+ [RK3568_PD_VPU] = DOMAIN_RK3568("vpu", BIT(2), BIT(6), false),
+ [RK3568_PD_RKVDEC] = DOMAIN_RK3568("vdec", BIT(4), BIT(8), false),
+ [RK3568_PD_RKVENC] = DOMAIN_RK3568("venc", BIT(3), BIT(7), false),
+ [RK3568_PD_PIPE]= DOMAIN_RK3568("pipe", BIT(8), BIT(11), false),
+};
+
static const struct rockchip_pmu_info px30_pmu = {
.pwr_offset = 0x18,
.status_offset = 0x20,
@@ -983,6 +999,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
.domain_info = rk3399_pm_domains,
};
+static const struct rockchip_pmu_info rk3568_pmu = {
+ .pwr_offset = 0xa0,
+ .status_offset = 0x98,
+ .req_offset = 0x50,
+ .idle_offset = 0x68,
+ .ack_offset = 0x60,
+
+ .num_domains = ARRAY_SIZE(rk3568_pm_domains),
+ .domain_info = rk3568_pm_domains,
+};
+
static const struct of_device_id rockchip_pm_domain_dt_match[] = {
{
.compatible = "rockchip,px30-power-controller",
@@ -1028,6 +1055,10 @@ static const struct of_device_id
rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3399-power-controller",
.data = (void *)&rk3399_pmu,
},
+ {
+ .compatible = "rockchip,rk3568-power-controller",
+ .data = (void *)&rk3568_pmu,
+ },
{ /* sentinel */ },
};
--
2.11.0
[PATCH v9 11/15] dt-bindings: arm: rockchip: convert pmu.txt to YAML
Current dts files with 'pmu' nodes are manually verified.
In order to automate this process pmu.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
Reviewed-by: Rob Herring
---
.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ---
.../devicetree/bindings/arm/rockchip/pmu.yaml | 49 ++
2 files changed, 49 insertions(+), 16 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
b/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
deleted file mode 100644
index 3ee9b428b..0
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Rockchip power-management-unit:
-
-The pmu is used to turn off and on different power domains of the SoCs
-This includes the power to the CPU cores.
-
-Required node properties:
-- compatible value : = "rockchip,rk3066-pmu";
-- reg : physical base address and the size of the registers window
-
-Example:
-
- pmu@20004000 {
- compatible = "rockchip,rk3066-pmu";
- reg = <0x20004000 0x100>;
- };
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
new file mode 100644
index 0..0b816943d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip Power Management Unit (PMU)
+
+maintainers:
+ - Elaine Zhang
+ - Heiko Stuebner
+
+description: |
+ The PMU is used to turn on and off different power domains of the SoCs.
+ This includes the power to the CPU cores.
+
+select:
+ properties:
+compatible:
+ contains:
+enum:
+ - rockchip,rk3066-pmu
+
+ required:
+- compatible
+
+properties:
+ compatible:
+items:
+ - enum:
+ - rockchip,rk3066-pmu
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: true
+
+examples:
+ - |
+pmu@20004000 {
+ compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
+ reg = <0x20004000 0x100>;
+};
--
2.11.0
[PATCH v9 13/15] dt-bindings: power: rockchip: Convert to json-schema
From: Enric Balletbo i Serra Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker --- Note for rob+dt: A tag was not added on purpose, because: Add "rockchip," prefix to the qos compatible name in example. Changed maintainers. Size reg description is reduced. Little style changes '' to "" Restyle patternProperties Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "assigned-clocks" and "assigned-clock-parents" properties till there is consensus of what to do with it. --- Changed V9: Rename definitions to $defs Restyle patternProperties Changed V8: Add pd-node ref schema Changed V7: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example Changed V6: Changed author Changed V5: Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause Remove a maintainer Changed patternProperties to power-domain Add "clocks", "assigned-clocks" and "assigned-clock-parents" Changed V4: Remove new compatible string Style changes '' to "" Changed V3: Use Enric's conversion with rk3399 example Changed V2: Convert power_domain.txt to YAML with rk3568 example --- .../bindings/power/rockchip,power-controller.yaml | 246 + .../bindings/soc/rockchip/power_domain.txt | 136 2 files changed, 246 insertions(+), 136 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml new file mode 100644 index 0..f71569de9 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -0,0 +1,246 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Domains + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + Rockchip processors include support for multiple power domains + which can be powered up/down by software based on different + application scenarios to save power. + + Power domains contained within power-controller node are + generic power domain providers documented in + Documentation/devicetree/bindings/power/power-domain.yaml. + + IP cores belonging to a power domain should contain a + "power-domains" property that is a phandle for the + power domain node representing the domain. + +properties: + $nodename: +const: power-controller + + compatible: +enum: + - rockchip,px30-power-controller + - rockchip,rk3036-power-controller + - rockchip,rk3066-power-controller + - rockchip,rk3128-power-controller + - rockchip,rk3188-power-controller + - rockchip,rk3228-power-controller + - rockchip,rk3288-power-controller + - rockchip,rk3328-power-controller + - rockchip,rk3366-power-controller + - rockchip,rk3368-power-controller + - rockchip,rk3399-power-controller + + "#power-domain-cells": +const: 1 + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +required: + - compatible + - "#power-domain-cells" + +additionalProperties: false + +patternProperties: + "^power-domain@[0-9a-f]+$": + +$ref: "#/$defs/pd-node" + +unevaluatedProperties: false + +properties: + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +patternProperties: + "^power-domain@[0-9a-f]+$": + +$ref: "#/$defs/pd-node" + +unevaluatedProperties: false + +properties: + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +patternProperties: + "^power-domain@[0-9a-f]+$": + +$ref: "#/$defs/pd-node" + +unevaluatedProperties: false + +properties: + "#power-domain-cells": +const: 0 + +$defs: + pd-node: +type: object +description: | + Represents the power domains within the power controller node. + +properties: + reg: +maxItems: 1 +description: | + Power domain index. Valid values are defined in + "include/
[PATCH v9 12/15] dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml
The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,px30-pmu", "syscon", "simple-mfd" "rockchip,rk3288-pmu", "syscon", "simple-mfd" "rockchip,rk3328-pmu", "syscon", "simple-mfd" "rockchip,rk3399-pmu", "syscon", "simple-mfd" for pmu nodes to pmu.yaml. Signed-off-by: Johan Jonker Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml index 0b816943d..678be9011 100644 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -19,7 +19,11 @@ select: compatible: contains: enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu required: - compatible @@ -28,7 +32,11 @@ properties: compatible: items: - enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu - const: syscon - const: simple-mfd -- 2.11.0
[PATCH v9 10/15] dt-bindings: add power-domain header for RK3568 SoCs
From: Elaine Zhang According to a description from TRM, add all the power domains Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Acked-by: Rob Herring --- include/dt-bindings/power/rk3568-power.h | 32 1 file changed, 32 insertions(+) create mode 100644 include/dt-bindings/power/rk3568-power.h diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h new file mode 100644 index 0..6cc1af1a9 --- /dev/null +++ b/include/dt-bindings/power/rk3568-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ +#define __DT_BINDINGS_POWER_RK3568_POWER_H__ + +/* VD_CORE */ +#define RK3568_PD_CPU_00 +#define RK3568_PD_CPU_11 +#define RK3568_PD_CPU_22 +#define RK3568_PD_CPU_33 +#define RK3568_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RK3568_PD_PMU 5 + +/* VD_NPU */ +#define RK3568_PD_NPU 6 + +/* VD_GPU */ +#define RK3568_PD_GPU 7 + +/* VD_LOGIC */ +#define RK3568_PD_VI 8 +#define RK3568_PD_VO 9 +#define RK3568_PD_RGA 10 +#define RK3568_PD_VPU 11 +#define RK3568_PD_CENTER 12 +#define RK3568_PD_RKVDEC 13 +#define RK3568_PD_RKVENC 14 +#define RK3568_PD_PIPE 15 +#define RK3568_PD_LOGIC_ALIVE 16 + +#endif -- 2.11.0
[PATCH v9 08/15] arm64: dts: rockchip: add #power-domain-cells to power domain nodes
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20
3 files changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 2b43c3d72..c96ebfe3e 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -250,12 +250,14 @@
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_SDCARD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_GMAC {
reg = ;
@@ -264,6 +266,7 @@
<&cru SCLK_MAC_REF>,
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_MMC_NAND {
reg = ;
@@ -277,6 +280,7 @@
<&cru SCLK_SFC>;
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VPU {
reg = ;
@@ -284,6 +288,7 @@
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VO {
reg = ;
@@ -300,6 +305,7 @@
<&cru SCLK_VOPB_PWM>;
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VI {
reg = ;
@@ -311,11 +317,13 @@
pm_qos = <&qos_isp_128>, <&qos_isp_rd>,
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_GPU {
reg = ;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 35df57535..470da614e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -302,13 +302,16 @@
power-domain@RK3328_PD_HEVC {
reg = ;
+ #power-domain-cells = <0>;
};
power-domain@RK3328_PD_VIDEO {
reg = ;
+ #power-domain-cells = <0>;
};
power-domain@RK3328_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ #power-domain-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 19614c2ce..99f85b1d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk
[PATCH v9 09/15] soc: rockchip: pm-domains: Add a meaningful power domain name
From: Elaine Zhang
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix TAB warning
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 221 --
1 file changed, 114 insertions(+), 107 deletions(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5..1d1b06672 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -29,6 +29,7 @@
#include
struct rockchip_domain_info {
+ const char *name;
int pwr_mask;
int status_mask;
int req_mask;
@@ -85,8 +86,9 @@ struct rockchip_pmu {
#define to_rockchip_pd(gpd) container_of(gpd, struct rockchip_pm_domain, genpd)
-#define DOMAIN(pwr, status, req, idle, ack, wakeup)\
+#define DOMAIN(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_mask = (pwr), \
.status_mask = (status),\
.req_mask = (req), \
@@ -95,8 +97,9 @@ struct rockchip_pmu {
.active_wakeup = (wakeup), \
}
-#define DOMAIN_M(pwr, status, req, idle, ack, wakeup) \
+#define DOMAIN_M(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_w_mask = (pwr) << 16, \
.pwr_mask = (pwr), \
.status_mask = (status),\
@@ -107,8 +110,9 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_RK3036(req, ack, idle, wakeup) \
+#define DOMAIN_RK3036(_name, req, ack, idle, wakeup) \
{ \
+ .name = _name, \
.req_mask = (req), \
.req_w_mask = (req) << 16, \
.ack_mask = (ack), \
@@ -116,20 +120,20 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_PX30(pwr, status, req, wakeup) \
- DOMAIN_M(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_PX30(name, pwr, status, req, wakeup)\
+ DOMAIN_M(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3288(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, (req) << 16, wakeup)
+#define DOMAIN_RK3288(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, (req) << 16, wakeup)
-#define DOMAIN_RK3328(pwr, status, req, wakeup)\
- DOMAIN_M(pwr, pwr, req, (req) << 10, req, wakeup)
+#define DOMAIN_RK3328(name, pwr, status, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, (req) << 10, req, wakeup)
-#define DOMAIN_RK3368(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_RK3368(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3399(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, req, wakeup)
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
@@ -490,7 +494,10 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu
*pmu,
goto err_unprepare_clocks;
}
- pd->genpd.name = node->name;
+ if (pd->info->name)
+ pd->genpd.name = pd->info->name;
+ else
+ pd->genpd.name = kbasename(node->full_name);
pd->genpd.power_off = rockchip_pd_power_off;
pd->genpd.power_on = rockchip_pd_power_on;
pd->genpd.attach_dev = rockchip_pd_attach_dev;
@@ -716,129 +723,129 @@ static int rockchip_pm_domain_probe(struct
platform_device *pdev)
}
static const struct rockchip_domain_info px30_pm_domains[] = {
- [PX30_PD_USB] = DOMAIN_PX30(BIT(5), BIT(5), BIT(10), false),
- [PX30_PD_SDCARD]= DOMAIN_PX30(BIT(8), BIT(8), BIT(9), false),
- [PX30_PD_GMAC] = DOMAIN_PX30(BIT(10), BIT(10), BIT(6), false),
- [PX30_PD_MMC_NAND] = DOMAIN_PX30(BIT(11), BIT(11), BIT(5), false),
- [PX30_PD_VPU] = DOMAIN_PX30(BIT(12), BIT(12), BIT(14), false),
- [PX30_PD_VO]= DOMAIN_PX30(BIT(13), BIT(13), BIT(7), false),
- [PX30_PD_VI]
[PATCH v9 07/15] arm64: dts: rockchip: Fix power-controller node names for rk3399
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0f2879cc1..19614c2ce 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -968,26 +968,26 @@
#size-cells = <0>;
/* These power domains are grouped by VD_CENTER */
- pd_iep@RK3399_PD_IEP {
+ power-domain@RK3399_PD_IEP {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru HCLK_IEP>;
pm_qos = <&qos_iep>;
};
- pd_rga@RK3399_PD_RGA {
+ power-domain@RK3399_PD_RGA {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru HCLK_RGA>;
pm_qos = <&qos_rga_r>,
<&qos_rga_w>;
};
- pd_vcodec@RK3399_PD_VCODEC {
+ power-domain@RK3399_PD_VCODEC {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video_m0>;
};
- pd_vdu@RK3399_PD_VDU {
+ power-domain@RK3399_PD_VDU {
reg = ;
clocks = <&cru ACLK_VDU>,
<&cru HCLK_VDU>;
@@ -996,94 +996,94 @@
};
/* These power domains are grouped by VD_GPU */
- pd_gpu@RK3399_PD_GPU {
+ power-domain@RK3399_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
};
/* These power domains are grouped by VD_LOGIC */
- pd_edp@RK3399_PD_EDP {
+ power-domain@RK3399_PD_EDP {
reg = ;
clocks = <&cru PCLK_EDP_CTRL>;
};
- pd_emmc@RK3399_PD_EMMC {
+ power-domain@RK3399_PD_EMMC {
reg = ;
clocks = <&cru ACLK_EMMC>;
pm_qos = <&qos_emmc>;
};
- pd_gmac@RK3399_PD_GMAC {
+ power-domain@RK3399_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>;
pm_qos = <&qos_gmac>;
};
- pd_sd@RK3399_PD_SD {
+ power-domain@RK3399_PD_SD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sd>;
};
- pd_sdioaudio@RK3399_PD_SDIOAUDIO {
+ power-domain@RK3399_PD_SDIOAUDIO {
reg = ;
clocks = <&cru HCLK_SDIO>;
pm_qos = <&qos_sdioaudio>;
};
- pd_tcpc0@RK3399_PD_TCPD0 {
+ power-domain@RK3399_PD_TCPD0 {
reg = ;
clocks = <&cru SCLK_UPHY0_TCPDCORE>,
<&cru SCLK_UPHY0_TCPDPHY_REF>;
};
- pd_tcpc1@RK3399_PD_TCPD1 {
+ power-domain@RK3399_PD_TCPD1 {
reg = ;
clocks = <&cru SCLK_UPHY1_TCPDCORE>,
<&cru SCLK_UPHY1_TCPDPHY_REF>;
};
-
[PATCH v9 05/15] arm64: dts: rockchip: Fix power-controller node names for px30
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 09baa8a16..2b43c3d72 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -244,20 +244,20 @@
#size-cells = <0>;
/* These power domains are grouped by VD_LOGIC */
- pd_usb@PX30_PD_USB {
+ power-domain@PX30_PD_USB {
reg = ;
clocks = <&cru HCLK_HOST>,
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
};
- pd_sdcard@PX30_PD_SDCARD {
+ power-domain@PX30_PD_SDCARD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
};
- pd_gmac@PX30_PD_GMAC {
+ power-domain@PX30_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>,
@@ -265,7 +265,7 @@
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
};
- pd_mmc_nand@PX30_PD_MMC_NAND {
+ power-domain@PX30_PD_MMC_NAND {
reg = ;
clocks = <&cru HCLK_NANDC>,
<&cru HCLK_EMMC>,
@@ -278,14 +278,14 @@
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
};
- pd_vpu@PX30_PD_VPU {
+ power-domain@PX30_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>,
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
};
- pd_vo@PX30_PD_VO {
+ power-domain@PX30_PD_VO {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru ACLK_VOPB>,
@@ -301,7 +301,7 @@
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
};
- pd_vi@PX30_PD_VI {
+ power-domain@PX30_PD_VI {
reg = ;
clocks = <&cru ACLK_CIF>,
<&cru ACLK_ISP>,
@@ -312,7 +312,7 @@
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
};
- pd_gpu@PX30_PD_GPU {
+ power-domain@PX30_PD_GPU {
reg = ;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v9 03/15] ARM: dts: rockchip: Fix power-controller node names for rk3288
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ea7416c31..6f4d7929e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -769,7 +769,7 @@
* *_HDMI HDMI
* *_MIPI_*MIPI
*/
- pd_vio@RK3288_PD_VIO {
+ power-domain@RK3288_PD_VIO {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>,
@@ -811,7 +811,7 @@
* Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC).
*/
- pd_hevc@RK3288_PD_HEVC {
+ power-domain@RK3288_PD_HEVC {
reg = ;
clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>,
@@ -825,7 +825,7 @@
* (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/
- pd_video@RK3288_PD_VIDEO {
+ power-domain@RK3288_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
@@ -836,7 +836,7 @@
* Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC).
*/
- pd_gpu@RK3288_PD_GPU {
+ power-domain@RK3288_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
--
2.11.0
[PATCH v9 06/15] arm64: dts: rockchip: Fix power-controller node names for rk3328
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 5bab61784..35df57535 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -300,13 +300,13 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = ;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = ;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
};
--
2.11.0
[PATCH v9 04/15] ARM: dts: rockchip: add #power-domain-cells to power domain nodes
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a.dtsi | 3 +++
arch/arm/boot/dts/rk3188.dtsi | 3 +++
arch/arm/boot/dts/rk3288.dtsi | 4
3 files changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index bbc3bff50..8e087c34b 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -780,6 +780,7 @@
<&qos_cif1>,
<&qos_ipp>,
<&qos_rga>;
+ #power-domain-cells = <0>;
};
power-domain@RK3066_PD_VIDEO {
@@ -789,12 +790,14 @@
<&cru HCLK_VDPU>,
<&cru HCLK_VEPU>;
pm_qos = <&qos_vpu>;
+ #power-domain-cells = <0>;
};
power-domain@RK3066_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 5db32fdbe..f438170b4 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -719,6 +719,7 @@
<&qos_cif0>,
<&qos_ipp>,
<&qos_rga>;
+ #power-domain-cells = <0>;
};
power-domain@RK3188_PD_VIDEO {
@@ -728,12 +729,14 @@
<&cru HCLK_VDPU>,
<&cru HCLK_VEPU>;
pm_qos = <&qos_vpu>;
+ #power-domain-cells = <0>;
};
power-domain@RK3188_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6f4d7929e..bf2d8ab61 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -805,6 +805,7 @@
<&qos_vio2_rga_r>,
<&qos_vio2_rga_w>,
<&qos_vio1_isp_r>;
+ #power-domain-cells = <0>;
};
/*
@@ -818,6 +819,7 @@
<&cru SCLK_HEVC_CORE>;
pm_qos = <&qos_hevc_r>,
<&qos_hevc_w>;
+ #power-domain-cells = <0>;
};
/*
@@ -830,6 +832,7 @@
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video>;
+ #power-domain-cells = <0>;
};
/*
@@ -841,6 +844,7 @@
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
<&qos_gpu_w>;
+ #power-domain-cells = <0>;
};
};
--
2.11.0
[PATCH v9 02/15] ARM: dts: rockchip: Fix power-controller node names for rk3188
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 2298a8d84..5db32fdbe 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -699,7 +699,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3188_PD_VIO {
+ power-domain@RK3188_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -721,7 +721,7 @@
<&qos_rga>;
};
- pd_video@RK3188_PD_VIDEO {
+ power-domain@RK3188_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -730,7 +730,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3188_PD_GPU {
+ power-domain@RK3188_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v9 01/15] ARM: dts: rockchip: Fix power-controller node names for rk3066a
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
Changed
---
arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 252750c97..bbc3bff50 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -755,7 +755,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3066_PD_VIO {
+ power-domain@RK3066_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -782,7 +782,7 @@
<&qos_rga>;
};
- pd_video@RK3066_PD_VIDEO {
+ power-domain@RK3066_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -791,7 +791,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3066_PD_GPU {
+ power-domain@RK3066_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v9 00/15] soc: rockchip: power-domain: add rk3568 powerdomains
Fix power-controller node names for dtbs_check. Convert power domain documentation to json-schema. Add a meaningful power domain name. Support power domain function for RK3568 Soc. Changed in V9: [PATCH v9 13/15]: Rename definitions to $defs Restyle patternProperties Changed in V8: Add #power-domain-cells to power domain nodes. Convert pmu.txt to YAML. Add more compatible strings to pmu.yaml [PATCH v8 13/15]: Add pd-node ref schema. Changed in V7: [PATCH v7 07/11]: Fix TAB warning Fix alignment [PATCH v7 09/11]: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example [PATCH v7 11/11]: Fix alignment Changed in V6: [PATCH v6 7/11]: Use kbasename(node->full_name). [PATCH v6 9/11]: Update the commit message. Changed in V5: [PATCH v5 1/11]: New. [PATCH v5 2/11]: New. [PATCH v5 3/11]: New. [PATCH v5 4/11]: New. [PATCH v5 5/11]: New. [PATCH v5 6/11]: New. [PATCH v5 7/11]: New. [PATCH v5 8/11]: No change. Same as [PATCH v4 1/4]. [PATCH v5 9/11]: [PATCH v4 2/4] Fix up yaml code styles. [PATCH v5 10/11]: No change. Same as [PATCH v4 3/4]. [PATCH v5 11/11]: [PATCH v4 4/4] add a meaningful power domain name for RK3568 Soc. Changed in V4: [PATCH v4 2/4]: Fix up yaml code styles. Remove the new compatible to [PATCH v4 3/4] [PATCH v4 3/4]: Adding new compatible for RK3568 Soc. [PATCH v4 4/4]: No change. Same as [PATCH v3 3/3]. Changed in V3: [PATCH v3 2/3]: Fix up the code styles and add rk3568 base on: https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/ Changed in V2: [PATCH v2 2/3]: Fix up yaml code styles. Elaine Zhang (10): ARM: dts: rockchip: Fix power-controller node names for rk3066a ARM: dts: rockchip: Fix power-controller node names for rk3188 ARM: dts: rockchip: Fix power-controller node names for rk3288 arm64: dts: rockchip: Fix power-controller node names for px30 arm64: dts: rockchip: Fix power-controller node names for rk3328 arm64: dts: rockchip: Fix power-controller node names for rk3399 soc: rockchip: pm-domains: Add a meaningful power domain name dt-bindings: add power-domain header for RK3568 SoCs dt-bindings: power: rockchip: Add bindings for RK3568 Soc soc: rockchip: power-domain: add rk3568 powerdomains Enric Balletbo i Serra (1): dt-bindings: power: rockchip: Convert to json-schema Johan Jonker (4): ARM: dts: rockchip: add #power-domain-cells to power domain nodes arm64: dts: rockchip: add #power-domain-cells to power domain nodes dt-bindings: arm: rockchip: convert pmu.txt to YAML dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml .../devicetree/bindings/arm/rockchip/pmu.txt | 16 -- .../devicetree/bindings/arm/rockchip/pmu.yaml | 57 + .../bindings/power/rockchip,power-controller.yaml | 248 .../bindings/soc/rockchip/power_domain.txt | 136 --- arch/arm/boot/dts/rk3066a.dtsi | 9 +- arch/arm/boot/dts/rk3188.dtsi | 9 +- arch/arm/boot/dts/rk3288.dtsi | 12 +- arch/arm64/boot/dts/rockchip/px30.dtsi | 24 +- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 9 +- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 60 +++-- drivers/soc/rockchip/pm_domains.c | 252 - include/dt-bindings/power/rk3568-power.h | 32 +++ 12 files changed, 564 insertions(+), 300 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt create mode 100644 include/dt-bindings/power/rk3568-power.h -- 2.11.0
[PATCH v8 14/15] dt-bindings: power: rockchip: Add bindings for RK3568 Soc
From: Elaine Zhang Add the compatible string for RK3568 SoC. Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker --- A note for rob+dt and others: A review and ack tag was not added, because in this version the schema layout changed a bit Please have a look at it again Changed V8: Add pd-node ref schema --- Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index 2b9950fd6..24eb00834 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -40,6 +40,7 @@ properties: - rockchip,rk3366-power-controller - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller + - rockchip,rk3568-power-controller "#power-domain-cells": const: 1 @@ -135,6 +136,7 @@ definitions: "include/dt-bindings/power/rk3366-power.h" "include/dt-bindings/power/rk3368-power.h" "include/dt-bindings/power/rk3399-power.h" + "include/dt-bindings/power/rk3568-power.h" clocks: minItems: 1 -- 2.11.0
[PATCH v8 15/15] soc: rockchip: power-domain: add rk3568 powerdomains
From: Elaine Zhang
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 1d1b06672..0868b7d40 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
struct rockchip_domain_info {
const char *name;
@@ -135,6 +136,9 @@ struct rockchip_pmu {
#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
DOMAIN(name, pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3568(name, pwr, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
+
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
struct rockchip_pmu *pmu = pd->pmu;
@@ -848,6 +852,18 @@ static const struct rockchip_domain_info
rk3399_pm_domains[] = {
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31),
BIT(29), true),
};
+static const struct rockchip_domain_info rk3568_pm_domains[] = {
+ [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false),
+ [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false),
+ [RK3568_PD_VI] = DOMAIN_RK3568("vi", BIT(6), BIT(3), false),
+ [RK3568_PD_VO] = DOMAIN_RK3568("vo", BIT(7), BIT(4), false),
+ [RK3568_PD_RGA] = DOMAIN_RK3568("rga", BIT(5), BIT(5), false),
+ [RK3568_PD_VPU] = DOMAIN_RK3568("vpu", BIT(2), BIT(6), false),
+ [RK3568_PD_RKVDEC] = DOMAIN_RK3568("vdec", BIT(4), BIT(8), false),
+ [RK3568_PD_RKVENC] = DOMAIN_RK3568("venc", BIT(3), BIT(7), false),
+ [RK3568_PD_PIPE]= DOMAIN_RK3568("pipe", BIT(8), BIT(11), false),
+};
+
static const struct rockchip_pmu_info px30_pmu = {
.pwr_offset = 0x18,
.status_offset = 0x20,
@@ -983,6 +999,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
.domain_info = rk3399_pm_domains,
};
+static const struct rockchip_pmu_info rk3568_pmu = {
+ .pwr_offset = 0xa0,
+ .status_offset = 0x98,
+ .req_offset = 0x50,
+ .idle_offset = 0x68,
+ .ack_offset = 0x60,
+
+ .num_domains = ARRAY_SIZE(rk3568_pm_domains),
+ .domain_info = rk3568_pm_domains,
+};
+
static const struct of_device_id rockchip_pm_domain_dt_match[] = {
{
.compatible = "rockchip,px30-power-controller",
@@ -1028,6 +1055,10 @@ static const struct of_device_id
rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3399-power-controller",
.data = (void *)&rk3399_pmu,
},
+ {
+ .compatible = "rockchip,rk3568-power-controller",
+ .data = (void *)&rk3568_pmu,
+ },
{ /* sentinel */ },
};
--
2.11.0
[PATCH v8 13/15] dt-bindings: power: rockchip: Convert to json-schema
From: Enric Balletbo i Serra Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker --- Note for rob+dt: A tag was not added on purpose, because: Add "rockchip," prefix to the qos compatible name in example. Changed maintainers. Size reg description is reduced. Little style changes '' to "" Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "assigned-clocks" and "assigned-clock-parents" properties till there is consensus of what to do with it. --- Changed V8: Add pd-node ref schema Changed V7: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example Changed V6: Changed author Changed V5: Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause Remove a maintainer Changed patternProperties to power-domain Add "clocks", "assigned-clocks" and "assigned-clock-parents" Changed V4: Remove new compatible string Style changes '' to "" Changed V3: Use Enric's conversion with rk3399 example Changed V2: Convert power_domain.txt to YAML with rk3568 example --- .../bindings/power/rockchip,power-controller.yaml | 257 + .../bindings/soc/rockchip/power_domain.txt | 136 --- 2 files changed, 257 insertions(+), 136 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml new file mode 100644 index 0..2b9950fd6 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -0,0 +1,257 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Domains + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + Rockchip processors include support for multiple power domains + which can be powered up/down by software based on different + application scenarios to save power. + + Power domains contained within power-controller node are + generic power domain providers documented in + Documentation/devicetree/bindings/power/power-domain.yaml. + + IP cores belonging to a power domain should contain a + "power-domains" property that is a phandle for the + power domain node representing the domain. + +properties: + $nodename: +const: power-controller + + compatible: +enum: + - rockchip,px30-power-controller + - rockchip,rk3036-power-controller + - rockchip,rk3066-power-controller + - rockchip,rk3128-power-controller + - rockchip,rk3188-power-controller + - rockchip,rk3228-power-controller + - rockchip,rk3288-power-controller + - rockchip,rk3328-power-controller + - rockchip,rk3366-power-controller + - rockchip,rk3368-power-controller + - rockchip,rk3399-power-controller + + "#power-domain-cells": +const: 1 + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +patternProperties: + "^power-domain@[0-9a-f]+$": +properties: + + "#power-domain-cells": +enum: [0, 1] +description: + Must be 0 for nodes representing a single PM domain and 1 for nodes + providing multiple PM domains. + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +$ref: "#/definitions/pd-node" + +patternProperties: + "^power-domain@[0-9a-f]+$": +properties: + + "#power-domain-cells": +enum: [0, 1] + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +$ref: "#/definitions/pd-node" + +patternProperties: + "^power-domain@[0-9a-f]+$": +properties: + + "#power-domain-cells": +const: 0 + +$ref: "#/definitions/pd-node" + +required: + - "#power-domain-cells" + +unevaluatedProperties: false + +required: + - "#power-domain-cells" + +unevaluatedProperties: false + +required: + - "#power-domain-cells" + +unevaluatedProperties: false
[PATCH v8 12/15] dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml
The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,px30-pmu", "syscon", "simple-mfd" "rockchip,rk3288-pmu", "syscon", "simple-mfd" "rockchip,rk3328-pmu", "syscon", "simple-mfd" "rockchip,rk3399-pmu", "syscon", "simple-mfd" for pmu nodes to pmu.yaml. Signed-off-by: Johan Jonker --- Documentation/devicetree/bindings/arm/rockchip/pmu.yaml | 8 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml index 0b816943d..678be9011 100644 --- a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml @@ -19,7 +19,11 @@ select: compatible: contains: enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu required: - compatible @@ -28,7 +32,11 @@ properties: compatible: items: - enum: + - rockchip,px30-pmu - rockchip,rk3066-pmu + - rockchip,rk3288-pmu + - rockchip,rk3328-pmu + - rockchip,rk3399-pmu - const: syscon - const: simple-mfd -- 2.11.0
[PATCH v8 11/15] dt-bindings: arm: rockchip: convert pmu.txt to YAML
Current dts files with 'pmu' nodes are manually verified.
In order to automate this process pmu.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
---
.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ---
.../devicetree/bindings/arm/rockchip/pmu.yaml | 49 ++
2 files changed, 49 insertions(+), 16 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
b/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
deleted file mode 100644
index 3ee9b428b..0
--- a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Rockchip power-management-unit:
-
-The pmu is used to turn off and on different power domains of the SoCs
-This includes the power to the CPU cores.
-
-Required node properties:
-- compatible value : = "rockchip,rk3066-pmu";
-- reg : physical base address and the size of the registers window
-
-Example:
-
- pmu@20004000 {
- compatible = "rockchip,rk3066-pmu";
- reg = <0x20004000 0x100>;
- };
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
new file mode 100644
index 0..0b816943d
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip Power Management Unit (PMU)
+
+maintainers:
+ - Elaine Zhang
+ - Heiko Stuebner
+
+description: |
+ The PMU is used to turn on and off different power domains of the SoCs.
+ This includes the power to the CPU cores.
+
+select:
+ properties:
+compatible:
+ contains:
+enum:
+ - rockchip,rk3066-pmu
+
+ required:
+- compatible
+
+properties:
+ compatible:
+items:
+ - enum:
+ - rockchip,rk3066-pmu
+ - const: syscon
+ - const: simple-mfd
+
+ reg:
+maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: true
+
+examples:
+ - |
+pmu@20004000 {
+ compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd";
+ reg = <0x20004000 0x100>;
+};
--
2.11.0
[PATCH v8 09/15] soc: rockchip: pm-domains: Add a meaningful power domain name
From: Elaine Zhang
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix TAB warning
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 221 --
1 file changed, 114 insertions(+), 107 deletions(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5..1d1b06672 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -29,6 +29,7 @@
#include
struct rockchip_domain_info {
+ const char *name;
int pwr_mask;
int status_mask;
int req_mask;
@@ -85,8 +86,9 @@ struct rockchip_pmu {
#define to_rockchip_pd(gpd) container_of(gpd, struct rockchip_pm_domain, genpd)
-#define DOMAIN(pwr, status, req, idle, ack, wakeup)\
+#define DOMAIN(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_mask = (pwr), \
.status_mask = (status),\
.req_mask = (req), \
@@ -95,8 +97,9 @@ struct rockchip_pmu {
.active_wakeup = (wakeup), \
}
-#define DOMAIN_M(pwr, status, req, idle, ack, wakeup) \
+#define DOMAIN_M(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_w_mask = (pwr) << 16, \
.pwr_mask = (pwr), \
.status_mask = (status),\
@@ -107,8 +110,9 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_RK3036(req, ack, idle, wakeup) \
+#define DOMAIN_RK3036(_name, req, ack, idle, wakeup) \
{ \
+ .name = _name, \
.req_mask = (req), \
.req_w_mask = (req) << 16, \
.ack_mask = (ack), \
@@ -116,20 +120,20 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_PX30(pwr, status, req, wakeup) \
- DOMAIN_M(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_PX30(name, pwr, status, req, wakeup)\
+ DOMAIN_M(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3288(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, (req) << 16, wakeup)
+#define DOMAIN_RK3288(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, (req) << 16, wakeup)
-#define DOMAIN_RK3328(pwr, status, req, wakeup)\
- DOMAIN_M(pwr, pwr, req, (req) << 10, req, wakeup)
+#define DOMAIN_RK3328(name, pwr, status, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, (req) << 10, req, wakeup)
-#define DOMAIN_RK3368(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_RK3368(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3399(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, req, wakeup)
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
@@ -490,7 +494,10 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu
*pmu,
goto err_unprepare_clocks;
}
- pd->genpd.name = node->name;
+ if (pd->info->name)
+ pd->genpd.name = pd->info->name;
+ else
+ pd->genpd.name = kbasename(node->full_name);
pd->genpd.power_off = rockchip_pd_power_off;
pd->genpd.power_on = rockchip_pd_power_on;
pd->genpd.attach_dev = rockchip_pd_attach_dev;
@@ -716,129 +723,129 @@ static int rockchip_pm_domain_probe(struct
platform_device *pdev)
}
static const struct rockchip_domain_info px30_pm_domains[] = {
- [PX30_PD_USB] = DOMAIN_PX30(BIT(5), BIT(5), BIT(10), false),
- [PX30_PD_SDCARD]= DOMAIN_PX30(BIT(8), BIT(8), BIT(9), false),
- [PX30_PD_GMAC] = DOMAIN_PX30(BIT(10), BIT(10), BIT(6), false),
- [PX30_PD_MMC_NAND] = DOMAIN_PX30(BIT(11), BIT(11), BIT(5), false),
- [PX30_PD_VPU] = DOMAIN_PX30(BIT(12), BIT(12), BIT(14), false),
- [PX30_PD_VO]= DOMAIN_PX30(BIT(13), BIT(13), BIT(7), false),
- [PX30_PD_VI]
[PATCH v8 10/15] dt-bindings: add power-domain header for RK3568 SoCs
From: Elaine Zhang According to a description from TRM, add all the power domains Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker Acked-by: Rob Herring --- include/dt-bindings/power/rk3568-power.h | 32 1 file changed, 32 insertions(+) create mode 100644 include/dt-bindings/power/rk3568-power.h diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h new file mode 100644 index 0..6cc1af1a9 --- /dev/null +++ b/include/dt-bindings/power/rk3568-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ +#define __DT_BINDINGS_POWER_RK3568_POWER_H__ + +/* VD_CORE */ +#define RK3568_PD_CPU_00 +#define RK3568_PD_CPU_11 +#define RK3568_PD_CPU_22 +#define RK3568_PD_CPU_33 +#define RK3568_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RK3568_PD_PMU 5 + +/* VD_NPU */ +#define RK3568_PD_NPU 6 + +/* VD_GPU */ +#define RK3568_PD_GPU 7 + +/* VD_LOGIC */ +#define RK3568_PD_VI 8 +#define RK3568_PD_VO 9 +#define RK3568_PD_RGA 10 +#define RK3568_PD_VPU 11 +#define RK3568_PD_CENTER 12 +#define RK3568_PD_RKVDEC 13 +#define RK3568_PD_RKVENC 14 +#define RK3568_PD_PIPE 15 +#define RK3568_PD_LOGIC_ALIVE 16 + +#endif -- 2.11.0
[PATCH v8 08/15] arm64: dts: rockchip: add #power-domain-cells to power domain nodes
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20
3 files changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 2b43c3d72..c96ebfe3e 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -250,12 +250,14 @@
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_SDCARD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_GMAC {
reg = ;
@@ -264,6 +266,7 @@
<&cru SCLK_MAC_REF>,
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_MMC_NAND {
reg = ;
@@ -277,6 +280,7 @@
<&cru SCLK_SFC>;
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VPU {
reg = ;
@@ -284,6 +288,7 @@
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VO {
reg = ;
@@ -300,6 +305,7 @@
<&cru SCLK_VOPB_PWM>;
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_VI {
reg = ;
@@ -311,11 +317,13 @@
pm_qos = <&qos_isp_128>, <&qos_isp_rd>,
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
+ #power-domain-cells = <0>;
};
power-domain@PX30_PD_GPU {
reg = ;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 35df57535..470da614e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -302,13 +302,16 @@
power-domain@RK3328_PD_HEVC {
reg = ;
+ #power-domain-cells = <0>;
};
power-domain@RK3328_PD_VIDEO {
reg = ;
+ #power-domain-cells = <0>;
};
power-domain@RK3328_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ #power-domain-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 19614c2ce..99f85b1d9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk
[PATCH v8 07/15] arm64: dts: rockchip: Fix power-controller node names for rk3399
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0f2879cc1..19614c2ce 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -968,26 +968,26 @@
#size-cells = <0>;
/* These power domains are grouped by VD_CENTER */
- pd_iep@RK3399_PD_IEP {
+ power-domain@RK3399_PD_IEP {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru HCLK_IEP>;
pm_qos = <&qos_iep>;
};
- pd_rga@RK3399_PD_RGA {
+ power-domain@RK3399_PD_RGA {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru HCLK_RGA>;
pm_qos = <&qos_rga_r>,
<&qos_rga_w>;
};
- pd_vcodec@RK3399_PD_VCODEC {
+ power-domain@RK3399_PD_VCODEC {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video_m0>;
};
- pd_vdu@RK3399_PD_VDU {
+ power-domain@RK3399_PD_VDU {
reg = ;
clocks = <&cru ACLK_VDU>,
<&cru HCLK_VDU>;
@@ -996,94 +996,94 @@
};
/* These power domains are grouped by VD_GPU */
- pd_gpu@RK3399_PD_GPU {
+ power-domain@RK3399_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
};
/* These power domains are grouped by VD_LOGIC */
- pd_edp@RK3399_PD_EDP {
+ power-domain@RK3399_PD_EDP {
reg = ;
clocks = <&cru PCLK_EDP_CTRL>;
};
- pd_emmc@RK3399_PD_EMMC {
+ power-domain@RK3399_PD_EMMC {
reg = ;
clocks = <&cru ACLK_EMMC>;
pm_qos = <&qos_emmc>;
};
- pd_gmac@RK3399_PD_GMAC {
+ power-domain@RK3399_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>;
pm_qos = <&qos_gmac>;
};
- pd_sd@RK3399_PD_SD {
+ power-domain@RK3399_PD_SD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sd>;
};
- pd_sdioaudio@RK3399_PD_SDIOAUDIO {
+ power-domain@RK3399_PD_SDIOAUDIO {
reg = ;
clocks = <&cru HCLK_SDIO>;
pm_qos = <&qos_sdioaudio>;
};
- pd_tcpc0@RK3399_PD_TCPD0 {
+ power-domain@RK3399_PD_TCPD0 {
reg = ;
clocks = <&cru SCLK_UPHY0_TCPDCORE>,
<&cru SCLK_UPHY0_TCPDPHY_REF>;
};
- pd_tcpc1@RK3399_PD_TCPD1 {
+ power-domain@RK3399_PD_TCPD1 {
reg = ;
clocks = <&cru SCLK_UPHY1_TCPDCORE>,
<&cru SCLK_UPHY1_TCPDPHY_REF>;
};
-
[PATCH v8 06/15] arm64: dts: rockchip: Fix power-controller node names for rk3328
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 5bab61784..35df57535 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -300,13 +300,13 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = ;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = ;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
};
--
2.11.0
[PATCH v8 05/15] arm64: dts: rockchip: Fix power-controller node names for px30
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 09baa8a16..2b43c3d72 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -244,20 +244,20 @@
#size-cells = <0>;
/* These power domains are grouped by VD_LOGIC */
- pd_usb@PX30_PD_USB {
+ power-domain@PX30_PD_USB {
reg = ;
clocks = <&cru HCLK_HOST>,
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
};
- pd_sdcard@PX30_PD_SDCARD {
+ power-domain@PX30_PD_SDCARD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
};
- pd_gmac@PX30_PD_GMAC {
+ power-domain@PX30_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>,
@@ -265,7 +265,7 @@
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
};
- pd_mmc_nand@PX30_PD_MMC_NAND {
+ power-domain@PX30_PD_MMC_NAND {
reg = ;
clocks = <&cru HCLK_NANDC>,
<&cru HCLK_EMMC>,
@@ -278,14 +278,14 @@
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
};
- pd_vpu@PX30_PD_VPU {
+ power-domain@PX30_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>,
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
};
- pd_vo@PX30_PD_VO {
+ power-domain@PX30_PD_VO {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru ACLK_VOPB>,
@@ -301,7 +301,7 @@
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
};
- pd_vi@PX30_PD_VI {
+ power-domain@PX30_PD_VI {
reg = ;
clocks = <&cru ACLK_CIF>,
<&cru ACLK_ISP>,
@@ -312,7 +312,7 @@
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
};
- pd_gpu@PX30_PD_GPU {
+ power-domain@PX30_PD_GPU {
reg = ;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v8 04/15] ARM: dts: rockchip: add #power-domain-cells to power domain nodes
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a.dtsi | 3 +++
arch/arm/boot/dts/rk3188.dtsi | 3 +++
arch/arm/boot/dts/rk3288.dtsi | 4
3 files changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index bbc3bff50..8e087c34b 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -780,6 +780,7 @@
<&qos_cif1>,
<&qos_ipp>,
<&qos_rga>;
+ #power-domain-cells = <0>;
};
power-domain@RK3066_PD_VIDEO {
@@ -789,12 +790,14 @@
<&cru HCLK_VDPU>,
<&cru HCLK_VEPU>;
pm_qos = <&qos_vpu>;
+ #power-domain-cells = <0>;
};
power-domain@RK3066_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 5db32fdbe..f438170b4 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -719,6 +719,7 @@
<&qos_cif0>,
<&qos_ipp>,
<&qos_rga>;
+ #power-domain-cells = <0>;
};
power-domain@RK3188_PD_VIDEO {
@@ -728,12 +729,14 @@
<&cru HCLK_VDPU>,
<&cru HCLK_VEPU>;
pm_qos = <&qos_vpu>;
+ #power-domain-cells = <0>;
};
power-domain@RK3188_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
};
};
};
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 6f4d7929e..bf2d8ab61 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -805,6 +805,7 @@
<&qos_vio2_rga_r>,
<&qos_vio2_rga_w>,
<&qos_vio1_isp_r>;
+ #power-domain-cells = <0>;
};
/*
@@ -818,6 +819,7 @@
<&cru SCLK_HEVC_CORE>;
pm_qos = <&qos_hevc_r>,
<&qos_hevc_w>;
+ #power-domain-cells = <0>;
};
/*
@@ -830,6 +832,7 @@
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video>;
+ #power-domain-cells = <0>;
};
/*
@@ -841,6 +844,7 @@
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
<&qos_gpu_w>;
+ #power-domain-cells = <0>;
};
};
--
2.11.0
[PATCH v8 02/15] ARM: dts: rockchip: Fix power-controller node names for rk3188
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 2298a8d84..5db32fdbe 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -699,7 +699,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3188_PD_VIO {
+ power-domain@RK3188_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -721,7 +721,7 @@
<&qos_rga>;
};
- pd_video@RK3188_PD_VIDEO {
+ power-domain@RK3188_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -730,7 +730,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3188_PD_GPU {
+ power-domain@RK3188_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v8 03/15] ARM: dts: rockchip: Fix power-controller node names for rk3288
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ea7416c31..6f4d7929e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -769,7 +769,7 @@
* *_HDMI HDMI
* *_MIPI_*MIPI
*/
- pd_vio@RK3288_PD_VIO {
+ power-domain@RK3288_PD_VIO {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>,
@@ -811,7 +811,7 @@
* Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC).
*/
- pd_hevc@RK3288_PD_HEVC {
+ power-domain@RK3288_PD_HEVC {
reg = ;
clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>,
@@ -825,7 +825,7 @@
* (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/
- pd_video@RK3288_PD_VIDEO {
+ power-domain@RK3288_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
@@ -836,7 +836,7 @@
* Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC).
*/
- pd_gpu@RK3288_PD_GPU {
+ power-domain@RK3288_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
--
2.11.0
[PATCH v8 01/15] ARM: dts: rockchip: Fix power-controller node names for rk3066a
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
Changed
---
arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 252750c97..bbc3bff50 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -755,7 +755,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3066_PD_VIO {
+ power-domain@RK3066_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -782,7 +782,7 @@
<&qos_rga>;
};
- pd_video@RK3066_PD_VIDEO {
+ power-domain@RK3066_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -791,7 +791,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3066_PD_GPU {
+ power-domain@RK3066_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v8 00/15] soc: rockchip: power-domain: add rk3568 powerdomains
Fix power-controller node names for dtbs_check. Convert power domain documentation to json-schema. Add a meaningful power domain name. Support power domain function for RK3568 Soc. Changed in V8: Add #power-domain-cells to power domain nodes. Convert pmu.txt to YAML. Add more compatible strings to pmu.yaml Add pd-node ref schema. Changed in V7: [PATCH v7 07/11]: Fix TAB warning Fix alignment [PATCH v7 09/11]: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example [PATCH v7 11/11]: Fix alignment Changed in V6: [PATCH v6 7/11]: Use kbasename(node->full_name). [PATCH v6 9/11]: Update the commit message. Changed in V5: [PATCH v5 1/11]: New. [PATCH v5 2/11]: New. [PATCH v5 3/11]: New. [PATCH v5 4/11]: New. [PATCH v5 5/11]: New. [PATCH v5 6/11]: New. [PATCH v5 7/11]: New. [PATCH v5 8/11]: No change. Same as [PATCH v4 1/4]. [PATCH v5 9/11]: [PATCH v4 2/4] Fix up yaml code styles. [PATCH v5 10/11]: No change. Same as [PATCH v4 3/4]. [PATCH v5 11/11]: [PATCH v4 4/4] add a meaningful power domain name for RK3568 Soc. Changed in V4: [PATCH v4 2/4]: Fix up yaml code styles. Remove the new compatible to [PATCH v4 3/4] [PATCH v4 3/4]: Adding new compatible for RK3568 Soc. [PATCH v4 4/4]: No change. Same as [PATCH v3 3/3]. Changed in V3: [PATCH v3 2/3]: Fix up the code styles and add rk3568 base on: https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/ Changed in V2: [PATCH v2 2/3]: Fix up yaml code styles. Elaine Zhang (10): ARM: dts: rockchip: Fix power-controller node names for rk3066a ARM: dts: rockchip: Fix power-controller node names for rk3188 ARM: dts: rockchip: Fix power-controller node names for rk3288 arm64: dts: rockchip: Fix power-controller node names for px30 arm64: dts: rockchip: Fix power-controller node names for rk3328 arm64: dts: rockchip: Fix power-controller node names for rk3399 soc: rockchip: pm-domains: Add a meaningful power domain name dt-bindings: add power-domain header for RK3568 SoCs dt-bindings: power: rockchip: Add bindings for RK3568 Soc soc: rockchip: power-domain: add rk3568 powerdomains Enric Balletbo i Serra (1): dt-bindings: power: rockchip: Convert to json-schema Johan Jonker (4): ARM: dts: rockchip: add #power-domain-cells to power domain nodes arm64: dts: rockchip: add #power-domain-cells to power domain nodes dt-bindings: arm: rockchip: convert pmu.txt to YAML dt-bindings: arm: rockchip: add more compatible strings to pmu.yaml .../devicetree/bindings/arm/rockchip/pmu.txt | 16 -- .../devicetree/bindings/arm/rockchip/pmu.yaml | 57 + .../bindings/power/rockchip,power-controller.yaml | 259 + .../bindings/soc/rockchip/power_domain.txt | 136 --- arch/arm/boot/dts/rk3066a.dtsi | 9 +- arch/arm/boot/dts/rk3188.dtsi | 9 +- arch/arm/boot/dts/rk3288.dtsi | 12 +- arch/arm64/boot/dts/rockchip/px30.dtsi | 24 +- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 9 +- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 60 +++-- drivers/soc/rockchip/pm_domains.c | 252 +++- include/dt-bindings/power/rk3568-power.h | 32 +++ 12 files changed, 575 insertions(+), 300 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.txt create mode 100644 Documentation/devicetree/bindings/arm/rockchip/pmu.yaml create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt create mode 100644 include/dt-bindings/power/rk3568-power.h -- 2.11.0
[PATCH v7 10/11] dt-bindings: power: rockchip: Add bindings for RK3568 Soc
From: Elaine Zhang Add the compatible string for RK3568 SoC. Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker --- Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml index 934308006..1354f1dc0 100644 --- a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -37,6 +37,7 @@ properties: - rockchip,rk3366-power-controller - rockchip,rk3368-power-controller - rockchip,rk3399-power-controller + - rockchip,rk3568-power-controller "#power-domain-cells": const: 1 @@ -82,6 +83,7 @@ patternProperties: "include/dt-bindings/power/rk3366-power.h" "include/dt-bindings/power/rk3368-power.h" "include/dt-bindings/power/rk3399-power.h" + "include/dt-bindings/power/rk3568-power.h" clocks: description: | -- 2.11.0
[PATCH v7 09/11] dt-bindings: power: rockchip: Convert to json-schema
From: Enric Balletbo i Serra Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker --- Note for rob+dt: A tag was not added on purpose, because: Add "rockchip," prefix to the qos compatible name in example. Changed maintainers. Size reg description is reduced. Little style changes '' to "" Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "assigned-clocks" and "assigned-clock-parents" properties till there is consensus of what to do with it. --- Changed V7: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example Changed V6: Changed author Changed V5: Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause Remove a maintainer Changed patternProperties to power-domain Add "clocks", "assigned-clocks" and "assigned-clock-parents" Changed V4: Remove new compatible string Style changes '' to "" Changed V3: Use Enric's conversion with rk3399 example Changed V2: Convert power_domain.txt to YAML with rk3568 example --- .../bindings/power/rockchip,power-controller.yaml | 283 + .../bindings/soc/rockchip/power_domain.txt | 136 -- 2 files changed, 283 insertions(+), 136 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml new file mode 100644 index 0..934308006 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -0,0 +1,283 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Domains + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + Rockchip processors include support for multiple power domains which can be + powered up/down by software based on different application scenarios to save power. + + Power domains contained within power-controller node are generic power domain + providers documented in Documentation/devicetree/bindings/power/power-domain.yaml. + + IP cores belonging to a power domain should contain a "power-domains" + property that is a phandle for the power domain node representing the domain. + +properties: + $nodename: +const: power-controller + + compatible: +enum: + - rockchip,px30-power-controller + - rockchip,rk3036-power-controller + - rockchip,rk3066-power-controller + - rockchip,rk3128-power-controller + - rockchip,rk3188-power-controller + - rockchip,rk3228-power-controller + - rockchip,rk3288-power-controller + - rockchip,rk3328-power-controller + - rockchip,rk3366-power-controller + - rockchip,rk3368-power-controller + - rockchip,rk3399-power-controller + + "#power-domain-cells": +const: 1 + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + +patternProperties: + "^power-domain@[0-9a-f]+$": +type: object +description: | + Represents the power domains within the power controller node as documented + in Documentation/devicetree/bindings/power/power-domain.yaml. + +properties: + + "#power-domain-cells": +description: + Must be 0 for nodes representing a single PM domain and 1 for nodes + providing multiple PM domains. + + "#address-cells": +const: 1 + + "#size-cells": +const: 0 + + reg: +maxItems: 1 +description: | + Power domain index. Valid values are defined in + "include/dt-bindings/power/px30-power.h" + "include/dt-bindings/power/rk3036-power.h" + "include/dt-bindings/power/rk3066-power.h" + "include/dt-bindings/power/rk3128-power.h" + "include/dt-bindings/power/rk3188-power.h" + "include/dt-bindings/power/rk3228-power.h" + "include/dt-bindings/power/rk3288-power.h" + "include/dt-bindings/power/rk3328-power.h" + "include/dt-bindings/power/rk3366-power.h" + "include/dt-bindings/power/rk3368-power.h" + "include/dt-bindings/power/rk3399-power.h&quo
[PATCH v7 11/11] soc: rockchip: power-domain: add rk3568 powerdomains
From: Elaine Zhang
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 1d1b06672..0868b7d40 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -27,6 +27,7 @@
#include
#include
#include
+#include
struct rockchip_domain_info {
const char *name;
@@ -135,6 +136,9 @@ struct rockchip_pmu {
#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
DOMAIN(name, pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3568(name, pwr, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
+
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
struct rockchip_pmu *pmu = pd->pmu;
@@ -848,6 +852,18 @@ static const struct rockchip_domain_info
rk3399_pm_domains[] = {
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31),
BIT(29), true),
};
+static const struct rockchip_domain_info rk3568_pm_domains[] = {
+ [RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false),
+ [RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false),
+ [RK3568_PD_VI] = DOMAIN_RK3568("vi", BIT(6), BIT(3), false),
+ [RK3568_PD_VO] = DOMAIN_RK3568("vo", BIT(7), BIT(4), false),
+ [RK3568_PD_RGA] = DOMAIN_RK3568("rga", BIT(5), BIT(5), false),
+ [RK3568_PD_VPU] = DOMAIN_RK3568("vpu", BIT(2), BIT(6), false),
+ [RK3568_PD_RKVDEC] = DOMAIN_RK3568("vdec", BIT(4), BIT(8), false),
+ [RK3568_PD_RKVENC] = DOMAIN_RK3568("venc", BIT(3), BIT(7), false),
+ [RK3568_PD_PIPE]= DOMAIN_RK3568("pipe", BIT(8), BIT(11), false),
+};
+
static const struct rockchip_pmu_info px30_pmu = {
.pwr_offset = 0x18,
.status_offset = 0x20,
@@ -983,6 +999,17 @@ static const struct rockchip_pmu_info rk3399_pmu = {
.domain_info = rk3399_pm_domains,
};
+static const struct rockchip_pmu_info rk3568_pmu = {
+ .pwr_offset = 0xa0,
+ .status_offset = 0x98,
+ .req_offset = 0x50,
+ .idle_offset = 0x68,
+ .ack_offset = 0x60,
+
+ .num_domains = ARRAY_SIZE(rk3568_pm_domains),
+ .domain_info = rk3568_pm_domains,
+};
+
static const struct of_device_id rockchip_pm_domain_dt_match[] = {
{
.compatible = "rockchip,px30-power-controller",
@@ -1028,6 +1055,10 @@ static const struct of_device_id
rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3399-power-controller",
.data = (void *)&rk3399_pmu,
},
+ {
+ .compatible = "rockchip,rk3568-power-controller",
+ .data = (void *)&rk3568_pmu,
+ },
{ /* sentinel */ },
};
--
2.11.0
[PATCH v7 07/11] soc: rockchip: pm-domains: Add a meaningful power domain name
From: Elaine Zhang
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix TAB warning
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 221 --
1 file changed, 114 insertions(+), 107 deletions(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5..1d1b06672 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -29,6 +29,7 @@
#include
struct rockchip_domain_info {
+ const char *name;
int pwr_mask;
int status_mask;
int req_mask;
@@ -85,8 +86,9 @@ struct rockchip_pmu {
#define to_rockchip_pd(gpd) container_of(gpd, struct rockchip_pm_domain, genpd)
-#define DOMAIN(pwr, status, req, idle, ack, wakeup)\
+#define DOMAIN(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_mask = (pwr), \
.status_mask = (status),\
.req_mask = (req), \
@@ -95,8 +97,9 @@ struct rockchip_pmu {
.active_wakeup = (wakeup), \
}
-#define DOMAIN_M(pwr, status, req, idle, ack, wakeup) \
+#define DOMAIN_M(_name, pwr, status, req, idle, ack, wakeup) \
{ \
+ .name = _name, \
.pwr_w_mask = (pwr) << 16, \
.pwr_mask = (pwr), \
.status_mask = (status),\
@@ -107,8 +110,9 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_RK3036(req, ack, idle, wakeup) \
+#define DOMAIN_RK3036(_name, req, ack, idle, wakeup) \
{ \
+ .name = _name, \
.req_mask = (req), \
.req_w_mask = (req) << 16, \
.ack_mask = (ack), \
@@ -116,20 +120,20 @@ struct rockchip_pmu {
.active_wakeup = wakeup,\
}
-#define DOMAIN_PX30(pwr, status, req, wakeup) \
- DOMAIN_M(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_PX30(name, pwr, status, req, wakeup)\
+ DOMAIN_M(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3288(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, (req) << 16, wakeup)
+#define DOMAIN_RK3288(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, (req) << 16, wakeup)
-#define DOMAIN_RK3328(pwr, status, req, wakeup)\
- DOMAIN_M(pwr, pwr, req, (req) << 10, req, wakeup)
+#define DOMAIN_RK3328(name, pwr, status, req, wakeup) \
+ DOMAIN_M(name, pwr, pwr, req, (req) << 10, req, wakeup)
-#define DOMAIN_RK3368(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, (req) << 16, req, wakeup)
+#define DOMAIN_RK3368(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, (req) << 16, req, wakeup)
-#define DOMAIN_RK3399(pwr, status, req, wakeup)\
- DOMAIN(pwr, status, req, req, req, wakeup)
+#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
+ DOMAIN(name, pwr, status, req, req, req, wakeup)
static bool rockchip_pmu_domain_is_idle(struct rockchip_pm_domain *pd)
{
@@ -490,7 +494,10 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu
*pmu,
goto err_unprepare_clocks;
}
- pd->genpd.name = node->name;
+ if (pd->info->name)
+ pd->genpd.name = pd->info->name;
+ else
+ pd->genpd.name = kbasename(node->full_name);
pd->genpd.power_off = rockchip_pd_power_off;
pd->genpd.power_on = rockchip_pd_power_on;
pd->genpd.attach_dev = rockchip_pd_attach_dev;
@@ -716,129 +723,129 @@ static int rockchip_pm_domain_probe(struct
platform_device *pdev)
}
static const struct rockchip_domain_info px30_pm_domains[] = {
- [PX30_PD_USB] = DOMAIN_PX30(BIT(5), BIT(5), BIT(10), false),
- [PX30_PD_SDCARD]= DOMAIN_PX30(BIT(8), BIT(8), BIT(9), false),
- [PX30_PD_GMAC] = DOMAIN_PX30(BIT(10), BIT(10), BIT(6), false),
- [PX30_PD_MMC_NAND] = DOMAIN_PX30(BIT(11), BIT(11), BIT(5), false),
- [PX30_PD_VPU] = DOMAIN_PX30(BIT(12), BIT(12), BIT(14), false),
- [PX30_PD_VO]= DOMAIN_PX30(BIT(13), BIT(13), BIT(7), false),
- [PX30_PD_VI]
[PATCH v7 08/11] dt-bindings: add power-domain header for RK3568 SoCs
From: Elaine Zhang According to a description from TRM, add all the power domains Signed-off-by: Elaine Zhang Reviewed-by: Enric Balletbo i Serra Signed-off-by: Johan Jonker --- include/dt-bindings/power/rk3568-power.h | 32 1 file changed, 32 insertions(+) create mode 100644 include/dt-bindings/power/rk3568-power.h diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h new file mode 100644 index 0..6cc1af1a9 --- /dev/null +++ b/include/dt-bindings/power/rk3568-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ +#define __DT_BINDINGS_POWER_RK3568_POWER_H__ + +/* VD_CORE */ +#define RK3568_PD_CPU_00 +#define RK3568_PD_CPU_11 +#define RK3568_PD_CPU_22 +#define RK3568_PD_CPU_33 +#define RK3568_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RK3568_PD_PMU 5 + +/* VD_NPU */ +#define RK3568_PD_NPU 6 + +/* VD_GPU */ +#define RK3568_PD_GPU 7 + +/* VD_LOGIC */ +#define RK3568_PD_VI 8 +#define RK3568_PD_VO 9 +#define RK3568_PD_RGA 10 +#define RK3568_PD_VPU 11 +#define RK3568_PD_CENTER 12 +#define RK3568_PD_RKVDEC 13 +#define RK3568_PD_RKVENC 14 +#define RK3568_PD_PIPE 15 +#define RK3568_PD_LOGIC_ALIVE 16 + +#endif -- 2.11.0
[PATCH v7 06/11] arm64: dts: rockchip: Fix power-controller node names for rk3399
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 0f2879cc1..19614c2ce 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -968,26 +968,26 @@
#size-cells = <0>;
/* These power domains are grouped by VD_CENTER */
- pd_iep@RK3399_PD_IEP {
+ power-domain@RK3399_PD_IEP {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru HCLK_IEP>;
pm_qos = <&qos_iep>;
};
- pd_rga@RK3399_PD_RGA {
+ power-domain@RK3399_PD_RGA {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru HCLK_RGA>;
pm_qos = <&qos_rga_r>,
<&qos_rga_w>;
};
- pd_vcodec@RK3399_PD_VCODEC {
+ power-domain@RK3399_PD_VCODEC {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
pm_qos = <&qos_video_m0>;
};
- pd_vdu@RK3399_PD_VDU {
+ power-domain@RK3399_PD_VDU {
reg = ;
clocks = <&cru ACLK_VDU>,
<&cru HCLK_VDU>;
@@ -996,94 +996,94 @@
};
/* These power domains are grouped by VD_GPU */
- pd_gpu@RK3399_PD_GPU {
+ power-domain@RK3399_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
};
/* These power domains are grouped by VD_LOGIC */
- pd_edp@RK3399_PD_EDP {
+ power-domain@RK3399_PD_EDP {
reg = ;
clocks = <&cru PCLK_EDP_CTRL>;
};
- pd_emmc@RK3399_PD_EMMC {
+ power-domain@RK3399_PD_EMMC {
reg = ;
clocks = <&cru ACLK_EMMC>;
pm_qos = <&qos_emmc>;
};
- pd_gmac@RK3399_PD_GMAC {
+ power-domain@RK3399_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>;
pm_qos = <&qos_gmac>;
};
- pd_sd@RK3399_PD_SD {
+ power-domain@RK3399_PD_SD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sd>;
};
- pd_sdioaudio@RK3399_PD_SDIOAUDIO {
+ power-domain@RK3399_PD_SDIOAUDIO {
reg = ;
clocks = <&cru HCLK_SDIO>;
pm_qos = <&qos_sdioaudio>;
};
- pd_tcpc0@RK3399_PD_TCPD0 {
+ power-domain@RK3399_PD_TCPD0 {
reg = ;
clocks = <&cru SCLK_UPHY0_TCPDCORE>,
<&cru SCLK_UPHY0_TCPDPHY_REF>;
};
- pd_tcpc1@RK3399_PD_TCPD1 {
+ power-domain@RK3399_PD_TCPD1 {
reg = ;
clocks = <&cru SCLK_UPHY1_TCPDCORE>,
<&cru SCLK_UPHY1_TCPDPHY_REF>;
};
-
[PATCH v7 04/11] arm64: dts: rockchip: Fix power-controller node names for px30
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 09baa8a16..2b43c3d72 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -244,20 +244,20 @@
#size-cells = <0>;
/* These power domains are grouped by VD_LOGIC */
- pd_usb@PX30_PD_USB {
+ power-domain@PX30_PD_USB {
reg = ;
clocks = <&cru HCLK_HOST>,
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
};
- pd_sdcard@PX30_PD_SDCARD {
+ power-domain@PX30_PD_SDCARD {
reg = ;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
};
- pd_gmac@PX30_PD_GMAC {
+ power-domain@PX30_PD_GMAC {
reg = ;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>,
@@ -265,7 +265,7 @@
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
};
- pd_mmc_nand@PX30_PD_MMC_NAND {
+ power-domain@PX30_PD_MMC_NAND {
reg = ;
clocks = <&cru HCLK_NANDC>,
<&cru HCLK_EMMC>,
@@ -278,14 +278,14 @@
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
};
- pd_vpu@PX30_PD_VPU {
+ power-domain@PX30_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>,
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
};
- pd_vo@PX30_PD_VO {
+ power-domain@PX30_PD_VO {
reg = ;
clocks = <&cru ACLK_RGA>,
<&cru ACLK_VOPB>,
@@ -301,7 +301,7 @@
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
};
- pd_vi@PX30_PD_VI {
+ power-domain@PX30_PD_VI {
reg = ;
clocks = <&cru ACLK_CIF>,
<&cru ACLK_ISP>,
@@ -312,7 +312,7 @@
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
};
- pd_gpu@PX30_PD_GPU {
+ power-domain@PX30_PD_GPU {
reg = ;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v7 05/11] arm64: dts: rockchip: Fix power-controller node names for rk3328
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 5bab61784..35df57535 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -300,13 +300,13 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_hevc@RK3328_PD_HEVC {
+ power-domain@RK3328_PD_HEVC {
reg = ;
};
- pd_video@RK3328_PD_VIDEO {
+ power-domain@RK3328_PD_VIDEO {
reg = ;
};
- pd_vpu@RK3328_PD_VPU {
+ power-domain@RK3328_PD_VPU {
reg = ;
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
};
--
2.11.0
[PATCH v7 00/11] soc: rockchip: power-domain: add rk3568 powerdomains
Fix power-controller node names for dtbs_check. Convert power domain documentation to json-schema. Add a meaningful power domain name. Support power domain function for RK3568 Soc. Changed in V7: [PATCH v7 07/11] Fix TAB warning Fix alignment [PATCH v7 09/11]: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example [PATCH v7 11/11] Fix alignment Changed in V6: [PATCH v6 7/11]: Use kbasename(node->full_name). [PATCH v6 9/11]: Update the commit message. Changed in V5: [PATCH v5 1/11]: New. [PATCH v5 2/11]: New. [PATCH v5 3/11]: New. [PATCH v5 4/11]: New. [PATCH v5 5/11]: New. [PATCH v5 6/11]: New. [PATCH v5 7/11]: New. [PATCH v5 8/11]: No change. Same as [PATCH v4 1/4]. [PATCH v5 9/11]: [PATCH v4 2/4] Fix up yaml code styles. [PATCH v5 10/11]: No change. Same as [PATCH v4 3/4]. [PATCH v5 11/11]: [PATCH v4 4/4] add a meaningful power domain name for RK3568 Soc. Changed in V4: [PATCH v4 2/4]: Fix up yaml code styles. Remove the new compatible to [PATCH v4 3/4] [PATCH v4 3/4]: Adding new compatible for RK3568 Soc. [PATCH v4 4/4]: No change. Same as [PATCH v3 3/3]. Changed in V3: [PATCH v3 2/3]: Fix up the code styles and add rk3568 base on: https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/ Changed in V2: [PATCH v2 2/3]: Fix up yaml code styles. Elaine Zhang (10): arm: dts: rockchip: Fix power-controller node names for rk3066a arm: dts: rockchip: Fix power-controller node names for rk3188 arm: dts: rockchip: Fix power-controller node names for rk3288 arm64: dts: rockchip: Fix power-controller node names for px30 arm64: dts: rockchip: Fix power-controller node names for rk3328 arm64: dts: rockchip: Fix power-controller node names for rk3399 soc: rockchip: pm-domains: Add a meaningful power domain name dt-bindings: add power-domain header for RK3568 SoCs dt-bindings: power: rockchip: Add bindings for RK3568 Soc soc: rockchip: power-domain: add rk3568 powerdomains Enric Balletbo i Serra (1): dt-bindings: power: rockchip: Convert to json-schema .../bindings/power/rockchip,power-controller.yaml | 285 + .../bindings/soc/rockchip/power_domain.txt | 136 -- arch/arm/boot/dts/rk3066a.dtsi | 6 +- arch/arm/boot/dts/rk3188.dtsi | 6 +- arch/arm/boot/dts/rk3288.dtsi | 8 +- arch/arm64/boot/dts/rockchip/px30.dtsi | 16 +- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 +-- drivers/soc/rockchip/pm_domains.c | 252 ++ include/dt-bindings/power/rk3568-power.h | 32 +++ 10 files changed, 503 insertions(+), 284 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt create mode 100644 include/dt-bindings/power/rk3568-power.h -- 2.11.0
[PATCH v7 02/11] arm: dts: rockchip: Fix power-controller node names for rk3188
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 2298a8d84..5db32fdbe 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -699,7 +699,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3188_PD_VIO {
+ power-domain@RK3188_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -721,7 +721,7 @@
<&qos_rga>;
};
- pd_video@RK3188_PD_VIDEO {
+ power-domain@RK3188_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -730,7 +730,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3188_PD_GPU {
+ power-domain@RK3188_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v7 01/11] arm: dts: rockchip: Fix power-controller node names for rk3066a
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
Changed
---
arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 252750c97..bbc3bff50 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -755,7 +755,7 @@
#address-cells = <1>;
#size-cells = <0>;
- pd_vio@RK3066_PD_VIO {
+ power-domain@RK3066_PD_VIO {
reg = ;
clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>,
@@ -782,7 +782,7 @@
<&qos_rga>;
};
- pd_video@RK3066_PD_VIDEO {
+ power-domain@RK3066_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>,
@@ -791,7 +791,7 @@
pm_qos = <&qos_vpu>;
};
- pd_gpu@RK3066_PD_GPU {
+ power-domain@RK3066_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.11.0
[PATCH v7 03/11] arm: dts: rockchip: Fix power-controller node names for rk3288
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ea7416c31..6f4d7929e 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -769,7 +769,7 @@
* *_HDMI HDMI
* *_MIPI_*MIPI
*/
- pd_vio@RK3288_PD_VIO {
+ power-domain@RK3288_PD_VIO {
reg = ;
clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>,
@@ -811,7 +811,7 @@
* Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC).
*/
- pd_hevc@RK3288_PD_HEVC {
+ power-domain@RK3288_PD_HEVC {
reg = ;
clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>,
@@ -825,7 +825,7 @@
* (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/
- pd_video@RK3288_PD_VIDEO {
+ power-domain@RK3288_PD_VIDEO {
reg = ;
clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>;
@@ -836,7 +836,7 @@
* Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC).
*/
- pd_gpu@RK3288_PD_GPU {
+ power-domain@RK3288_PD_GPU {
reg = ;
clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>,
--
2.11.0
Re: [PATCH v2 3/7] gpio: separate gpio driver from pinctrl-rockchip driver
On 4/11/21 3:30 PM, Peter Geis wrote:
> From: Jianqun Xu
>
> Separate the gpio driver from the pinctrl driver.
>
> Signed-off-by: Jianqun Xu
> ---
> drivers/gpio/Kconfig | 8 +
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-rockchip.c | 657 +++
> drivers/pinctrl/pinctrl-rockchip.c | 685 +
> 4 files changed, 684 insertions(+), 667 deletions(-)
> create mode 100644 drivers/gpio/gpio-rockchip.c
>
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index e182bcc3b603..3cac78839b68 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -520,6 +520,14 @@ config GPIO_REG
> A 32-bit single register GPIO fixed in/out implementation. This
> can be used to represent any register as a set of GPIO signals.
>
> +config GPIO_ROCKCHIP
> + tristate "Rockchip GPIO support"
> + depends on ARCH_ROCKCHIP || COMPILE_TEST
> + select GPIOLIB_IRQCHIP
> + default ARCH_ROCKCHIP
> + help
> + Say yes here to support GPIO on Rockchip SoCs.
> +
> config GPIO_SAMA5D2_PIOBU
> tristate "SAMA5D2 PIOBU GPIO support"
> depends on MFD_SYSCON
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index 7ba71922817e..44dc78e4ddb1 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -126,6 +126,7 @@ obj-$(CONFIG_GPIO_RDA)+= gpio-rda.o
> obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
> obj-$(CONFIG_GPIO_REALTEK_OTTO) += gpio-realtek-otto.o
> obj-$(CONFIG_GPIO_REG) += gpio-reg.o
> +obj-$(CONFIG_GPIO_ROCKCHIP) += gpio-rockchip.o
> obj-$(CONFIG_ARCH_SA1100)+= gpio-sa1100.o
> obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o
> obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
> diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
> new file mode 100644
> index ..03a3d251faae
> --- /dev/null
> +++ b/drivers/gpio/gpio-rockchip.c
> @@ -0,0 +1,657 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2013 MundoReader S.L.
> + * Author: Heiko Stuebner
> + *
> + * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "../pinctrl/core.h"
> +#include "../pinctrl/pinctrl-rockchip.h"
> +
> +/* GPIO control registers */
> +#define GPIO_SWPORT_DR 0x00
> +#define GPIO_SWPORT_DDR 0x04
> +#define GPIO_INTEN 0x30
> +#define GPIO_INTMASK 0x34
> +#define GPIO_INTTYPE_LEVEL 0x38
> +#define GPIO_INT_POLARITY0x3c
> +#define GPIO_INT_STATUS 0x40
> +#define GPIO_INT_RAWSTATUS 0x44
> +#define GPIO_DEBOUNCE0x48
> +#define GPIO_PORTS_EOI 0x4c
> +#define GPIO_EXT_PORT0x50
> +#define GPIO_LS_SYNC 0x60
> +
> +static int rockchip_gpio_get_direction(struct gpio_chip *chip,
> +unsigned int offset)
> +{
> + struct rockchip_pin_bank *bank = gpiochip_get_data(chip);
> + u32 data;
> + int ret;
> +
> + ret = clk_enable(bank->clk);
> + if (ret < 0) {
> + dev_err(bank->drvdata->dev,
> + "failed to enable clock for bank %s\n", bank->name);
> + return ret;
> + }
> + data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
> + clk_disable(bank->clk);
> +
> + if (data & BIT(offset))
> + return GPIO_LINE_DIRECTION_OUT;
> +
> + return GPIO_LINE_DIRECTION_IN;
> +}
> +
> +static int rockchip_gpio_set_direction(struct gpio_chip *chip,
> +unsigned int offset, bool input)
> +{
> + struct rockchip_pin_bank *bank = gpiochip_get_data(chip);
> + unsigned long flags;
> + u32 data;
> +
> + clk_enable(bank->clk);
> + raw_spin_lock_irqsave(&bank->slock, flags);
> +
> + data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
> + /* set bit to 1 for output, 0 for input */
> + if (!input)
> + data |= BIT(offset);
> + else
> + data &= ~BIT(offset);
> + writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR);
> +
> + raw_spin_unlock_irqrestore(&bank->slock, flags);
> + clk_disable(bank->clk);
> +
> + return 0;
> +}
> +
> +static void rockchip_gpio_set(struct gpio_chip *gc, unsigned int offset,
> + int value)
> +{
> + struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
> + void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR;
> + unsigned long flags;
> + u32 data;
> +
> + clk_enable(bank->clk);
> + raw_spin_lock_irqsave(&bank->slock, flags);
> +
> + data = readl(reg);
> + data &= ~BIT(offset);
> + if (value)
> + data |= BIT(offse
Re: [PATCH v2 3/3] arm64: dts: rockchip: change gpio nodenames
On 4/13/21 1:22 AM, Peter Geis wrote: > On Mon, Apr 12, 2021 at 6:38 PM Johan Jonker wrote: >> >> Currently all gpio nodenames are sort of identical to there label. >> Nodenames should be of a generic type, so change them all. > > Currently the rockchip pinctrl driver checks np->name against the > bank->name and if they do not match it does not set the gpio-bank as > valid. > The new GPIO driver appears to follow a similar method. > This will break the driver without a correction. Given Rob's comment in version 1 maybe combine this serie with yours? With Heiko's blessing maybe add support both for legacy and for the new format? Johan > > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/pinctrl/pinctrl-rockchip.c?h=next-20210412#n3836 > >> >> Signed-off-by: Johan Jonker >> ---
[PATCH v2 3/3] arm64: dts: rockchip: change gpio nodenames
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 10 +-
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 10 +-
5 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 939440015..96924e05a 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1247,7 +1247,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff04 {
+ gpio0: gpio@ff04 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff04 0x0 0x100>;
interrupts = ;
@@ -1259,7 +1259,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff25 {
+ gpio1: gpio@ff25 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff25 0x0 0x100>;
interrupts = ;
@@ -1271,7 +1271,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff26 {
+ gpio2: gpio@ff26 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff26 0x0 0x100>;
interrupts = ;
@@ -1283,7 +1283,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff27 {
+ gpio3: gpio@ff27 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff27 0x0 0x100>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 00844a0e0..ba7dee2e8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -688,7 +688,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff22 {
+ gpio0: gpio@ff22 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff22 0x0 0x100>;
interrupts = ;
@@ -699,7 +699,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff23 {
+ gpio1: gpio@ff23 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff23 0x0 0x100>;
interrupts = ;
@@ -710,7 +710,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@ff24 {
+ gpio2: gpio@ff24 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff24 0x0 0x100>;
interrupts = ;
@@ -721,7 +721,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@ff25 {
+ gpio3: gpio@ff25 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff25 0x0 0x100>;
interrupts = ;
@@ -732,7 +732,7 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@ff26 {
+ gpio4: gpio@ff26 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff26 0x0 0x100>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index c2ca358c7..858d52e2d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -1019,7 +1019,7 @@
#size-cells = <2>;
ranges;
- gpio0: gpio0@ff21 {
+ gpio0: gpio@ff21 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff21 0x0 0x100>;
interrupts = ;
@@ -1032,7 +1032,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@ff22 {
+ gpio1: gpio@ff22 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff22 0x0 0x100>;
interrupts = ;
@@ -1045,7 +1045,7 @@
[PATCH v2 1/3] dt-bindings: gpio: add YAML description for rockchip,gpio-bank
Current dts files with "rockchip,gpio-bank" subnodes
are manually verified. In order to automate this process
the text that describes the compatible in rockchip,pinctrl.txt
is removed and converted to YAML in rockchip,gpio-bank.yaml.
Signed-off-by: Johan Jonker
---
Changed V2:
changed example gpio nodename
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++
.../bindings/pinctrl/rockchip,pinctrl.txt | 58 +--
2 files changed, 83 insertions(+), 57 deletions(-)
create mode 100644
Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
new file mode 100644
index 0..d993e002c
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip GPIO bank
+
+maintainers:
+ - Heiko Stuebner
+
+properties:
+ compatible:
+enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+const: 2
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupt-controller
+ - "#interrupt-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+pinctrl: pinctrl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio0: gpio@2000a000 {
+compatible = "rockchip,rk3188-gpio-bank0";
+reg = <0x2000a000 0x100>;
+interrupts = ;
+clocks = <&clk_gates8 9>;
+
+gpio-controller;
+#gpio-cells = <2>;
+
+interrupt-controller;
+#interrupt-cells = <2>;
+ };
+
+ gpio1: gpio@2003c000 {
+compatible = "rockchip,gpio-bank";
+reg = <0x2003c000 0x100>;
+interrupts = ;
+clocks = <&clk_gates8 10>;
+
+gpio-controller;
+#gpio-cells = <2>;
+
+interrupt-controller;
+#interrupt-cells = <2>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
index d3eae61a3..4719a6a07 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
@@ -50,23 +50,7 @@ Deprecated properties for iomux controller:
Use rockchip,grf and rockchip,pmu described above instead.
Required properties for gpio sub nodes:
- - compatible: "rockchip,gpio-bank"
- - reg: register of the gpio bank (different than the iomux registerset)
- - interrupts: base interrupt of the gpio bank in the interrupt controller
- - clocks: clock that drives this bank
- - gpio-controller: identifies the node as a gpio controller and pin bank.
- - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
-binding is used, the amount of cells must be specified as 2. See generic
-GPIO binding documentation for description of particular cells.
- - interrupt-controller: identifies the controller node as interrupt-parent.
- - #interrupt-cells: the value of this property should be 2 and the interrupt
-cells should use the standard two-cell scheme described in
-bindings/interrupt-controller/interrupts.txt
-
-Deprecated properties for gpio sub nodes:
- - compatible: "rockchip,rk3188-gpio-bank0"
- - reg: second element: separate pull register for rk3188 bank0, use
-rockchip,pmu described above instead
+See rockchip,gpio-bank.yaml
Required properties for pin configuration node:
- rockchip,pins: 3 integers array, represents a group of pins mux and config
@@ -127,43 +111,3 @@ uart2: serial@20064000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
};
-
-Example for rk3188:
-
- pinctrl@20008000 {
- compatible = "rockchip,rk3188-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmu>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio0@2000a000 {
- compatible = "rockchip,rk3188-gpio-bank0";
- reg = <0x2000a000 0x100>;
- interrupts = ;
- clocks = <&clk_gates8 9>;
-
- gpio-
[PATCH v2 2/3] ARM: dts: rockchip: change gpio nodenames
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3036.dtsi | 6 +++---
arch/arm/boot/dts/rk3066a.dtsi | 12 ++--
arch/arm/boot/dts/rk3188.dtsi | 8
arch/arm/boot/dts/rk322x.dtsi | 8
arch/arm/boot/dts/rk3288.dtsi | 18 +-
arch/arm/boot/dts/rv1108.dtsi | 8
6 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index e24230d50..33ddede4b 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -505,7 +505,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@2007c000 {
+ gpio0: gpio@2007c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2007c000 0x100>;
interrupts = ;
@@ -518,7 +518,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@2008 {
+ gpio1: gpio@2008 {
compatible = "rockchip,gpio-bank";
reg = <0x2008 0x100>;
interrupts = ;
@@ -531,7 +531,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@20084000 {
+ gpio2: gpio@20084000 {
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = ;
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 252750c97..cf3ea32e5 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -297,7 +297,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@20034000 {
+ gpio0: gpio@20034000 {
compatible = "rockchip,gpio-bank";
reg = <0x20034000 0x100>;
interrupts = ;
@@ -310,7 +310,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@2003c000 {
+ gpio1: gpio@2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = ;
@@ -323,7 +323,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@2003e000 {
+ gpio2: gpio@2003e000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003e000 0x100>;
interrupts = ;
@@ -336,7 +336,7 @@
#interrupt-cells = <2>;
};
- gpio3: gpio3@2008 {
+ gpio3: gpio@2008 {
compatible = "rockchip,gpio-bank";
reg = <0x2008 0x100>;
interrupts = ;
@@ -349,7 +349,7 @@
#interrupt-cells = <2>;
};
- gpio4: gpio4@20084000 {
+ gpio4: gpio@20084000 {
compatible = "rockchip,gpio-bank";
reg = <0x20084000 0x100>;
interrupts = ;
@@ -362,7 +362,7 @@
#interrupt-cells = <2>;
};
- gpio6: gpio6@2000a000 {
+ gpio6: gpio@2000a000 {
compatible = "rockchip,gpio-bank";
reg = <0x2000a000 0x100>;
interrupts = ;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 2298a8d84..08aac5452 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -247,7 +247,7 @@
#size-cells = <1>;
ranges;
- gpio0: gpio0@2000a000 {
+ gpio0: gpio@2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = ;
@@ -260,7 +260,7 @@
#interrupt-cells = <2>;
};
- gpio1: gpio1@2003c000 {
+ gpio1: gpio@2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = ;
@@ -273,7 +273,7 @@
#interrupt-cells = <2>;
};
- gpio2: gpio2@2003e000 {
+ gpio2: gpio@2003e000 {
compatible = "rockchip,gpio-bank&quo
Re: [PATCH v2 1/6] dt-bindings: pwm: convert pwm-rockchip.txt to YAML
On 4/12/21 10:57 PM, Rob Herring wrote: > On Sun, 11 Apr 2021 15:10:02 +0200, Johan Jonker wrote: >> Current dts files with 'pwm' nodes are manually verified. >> In order to automate this process pwm-rockchip.txt >> has to be converted to yaml. >> >> Signed-off-by: Johan Jonker >> --- >> Changed V2: >> changed schema for clocks and clock-names >> --- >> .../devicetree/bindings/pwm/pwm-rockchip.txt | 27 --- >> .../devicetree/bindings/pwm/pwm-rockchip.yaml | 91 >> ++ >> 2 files changed, 91 insertions(+), 27 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt >> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml >> > > Reviewed-by: Rob Herring > Hi This tags version 2 with a little mistake instead of version 3? Is that correct? Johan
[PATCH v3 3/4] ARM: dts: rockchip: remove clock-names from pwm nodes
A test with the command below gives this error: /arch/arm/boot/dts/rk3036-evb.dt.yaml: pwm@20050030: clock-names: ['pwm'] is too short Devices with only one pwm clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3036.dtsi | 4 arch/arm/boot/dts/rk3288.dtsi | 4 2 files changed, 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 47a787a12..e24230d50 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -355,7 +355,6 @@ reg = <0x2005 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; @@ -366,7 +365,6 @@ reg = <0x20050010 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; @@ -377,7 +375,6 @@ reg = <0x20050020 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; @@ -388,7 +385,6 @@ reg = <0x20050030 0x10>; #pwm-cells = <2>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index ea7416c31..05557ad02 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -679,7 +679,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -690,7 +689,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -701,7 +699,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -712,7 +709,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; -- 2.11.0
[PATCH v3 4/4] arm64: dts: rockchip: remove clock-names from pwm nodes
A test with the command below gives this error: /arch/arm64/boot/dts/rockchip/rk3368-evb-act8846.dt.yaml: pwm@ff680030: clock-names: ['pwm'] is too short Devices with only one pwm clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 2 files changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 61b0a2a90..7832e26a3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -561,7 +561,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -572,7 +571,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -581,7 +579,6 @@ reg = <0x0 0xff680020 0x0 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -592,7 +589,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index e93a5f320..6221b027e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1185,7 +1185,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1196,7 +1195,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1207,7 +1205,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1218,7 +1215,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3a_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; -- 2.11.0
[PATCH v3 1/4] dt-bindings: pwm: convert pwm-rockchip.txt to YAML
Current dts files with 'pwm' nodes are manually verified.
In order to automate this process pwm-rockchip.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
---
For some SoC nodes this patch serie generates notifications
for undocumented "interrupts" properties shared between
PWM channels till there is consensus of what to do with it or
someone makes a solution for the whole PWM block.
Changed V3:
fix mistake with compatibles introduced in V2
Changed V2:
changed schema for clocks and clock-names
---
.../devicetree/bindings/pwm/pwm-rockchip.txt | 27 ---
.../devicetree/bindings/pwm/pwm-rockchip.yaml | 88 ++
2 files changed, 88 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
deleted file mode 100644
index f70956dea..0
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Rockchip PWM controller
-
-Required properties:
- - compatible: should be "rockchip,-pwm"
- "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
- "rockchip,rk3288-pwm": found on RK3288 SOC
- "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
- "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- - reg: physical base address and length of the controller's registers
- - clocks: See ../clock/clock-bindings.txt
- - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
- - There is one clock that's used both to derive the functional clock
- for the device and as the bus clock.
- - For newer hardware (rk3328 and future socs): specified by name
- - "pwm": This is used to derive the functional clock.
- - "pclk": This is the APB bus clock.
- - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
- for a description of the cell format.
-
-Example:
-
- pwm0: pwm@2003 {
- compatible = "rockchip,rk2928-pwm";
- reg = <0x2003 0x10>;
- clocks = <&cru PCLK_PWM01>;
- #pwm-cells = <2>;
- };
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
new file mode 100644
index 0..19b42d31d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip PWM controller
+
+maintainers:
+ - Heiko Stuebner
+
+properties:
+ compatible:
+oneOf:
+ - const: rockchip,rk2928-pwm
+ - const: rockchip,rk3288-pwm
+ - const: rockchip,vop-pwm
+ - items:
+ - enum:
+ - rockchip,rv1108-pwm
+ - const: rockchip,rk3288-pwm
+
+ reg:
+maxItems: 1
+
+ clocks:
+minItems: 1
+maxItems: 2
+
+ clock-names:
+maxItems: 2
+
+ "#pwm-cells":
+enum: [2, 3]
+description:
+ Must be 2 (rk2928) or 3 (rk3288 and later).
+ See pwm.yaml for a description of the cell format.
+
+required:
+ - compatible
+ - reg
+ - "#pwm-cells"
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - rockchip,rv1108-pwm
+
+then:
+ properties:
+clocks:
+ items:
+- description: Used to derive the functional clock for the device.
+- description: Used as the APB bus clock.
+
+clock-names:
+ items:
+- const: pwm
+- const: pclk
+
+ required:
+- clocks
+- clock-names
+
+else:
+ properties:
+clocks:
+ maxItems: 1
+ description:
+Used both to derive the functional clock
+for the device and as the bus clock.
+
+ required:
+- clocks
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+pwm0: pwm@2003 {
+ compatible = "rockchip,rk2928-pwm";
+ reg = <0x2003 0x10>;
+ clocks = <&cru PCLK_PWM01>;
+ #pwm-cells = <2>;
+};
--
2.11.0
[PATCH v3 2/4] dt-bindings: pwm: add more compatible strings to pwm-rockchip.yaml
The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,rk3328-pwm" "rockchip,rk3036-pwm", "rockchip,rk2928-pwm" "rockchip,rk3368-pwm", "rockchip,rk3288-pwm" "rockchip,rk3399-pwm", "rockchip,rk3288-pwm" "rockchip,px30-pwm", "rockchip,rk3328-pwm" "rockchip,rk3308-pwm", "rockchip,rk3328-pwm" for pwm nodes to pwm-rockchip.yaml. Signed-off-by: Johan Jonker --- Note for rob+dt: A tag was not added on purpose, because by the change of schema for clocks and clock-names I add "rockchip,rk3328-pwm" to the "if:", so strictly speaking V1 and (V2) V3 will not be the same. Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "interrupts" properties shared between PWM channels till there is consensus of what to do with it or someone makes a solution for the whole PWM block. Changed V3: fix mistake with compatibles introduced in V2 Changed V2: changed schema for clocks and clock-names --- Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 12 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml index 19b42d31d..5596bee70 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -14,11 +14,22 @@ properties: oneOf: - const: rockchip,rk2928-pwm - const: rockchip,rk3288-pwm + - const: rockchip,rk3328-pwm - const: rockchip,vop-pwm - items: + - const: rockchip,rk3036-pwm + - const: rockchip,rk2928-pwm + - items: - enum: + - rockchip,rk3368-pwm + - rockchip,rk3399-pwm - rockchip,rv1108-pwm - const: rockchip,rk3288-pwm + - items: + - enum: + - rockchip,px30-pwm + - rockchip,rk3308-pwm + - const: rockchip,rk3328-pwm reg: maxItems: 1 @@ -46,6 +57,7 @@ if: compatible: contains: enum: + - rockchip,rk3328-pwm - rockchip,rv1108-pwm then: -- 2.11.0
Re: [PATCH v2 2/6] dt-bindings: pwm: add more compatible strings to pwm-rockchip.yaml
Hi, Sorry, made a little mistake in version 2 with "rockchip,rk3036-pwm", "rockchip,rk2928-pwm". Please trash. Will send version 3. By the change of schema for clocks and clock-names I add "rockchip,rk3328-pwm" to the "if:", so strictly speaking v1 and (v2) v3 will not be the same. Johan On 4/12/21 5:05 PM, Rob Herring wrote: > On Sun, 11 Apr 2021 15:10:03 +0200, Johan Jonker wrote: >> The compatible strings below are already in use in the Rockchip >> dtsi files, but were somehow never added to a document, so add >> >> "rockchip,rk3328-pwm" >> >> "rockchip,rk3036-pwm", "rockchip,rk2928-pwm" >> >> "rockchip,rk3368-pwm", "rockchip,rk3288-pwm" >> "rockchip,rk3399-pwm", "rockchip,rk3288-pwm" >> >> "rockchip,px30-pwm", "rockchip,rk3328-pwm" >> "rockchip,rk3308-pwm", "rockchip,rk3328-pwm" >> >> for pwm nodes to pwm-rockchip.yaml. >> >> Signed-off-by: Johan Jonker >> --- >> Changed V2: >> changed schema for clocks and clock-names >> --- >> Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 9 + >> 1 file changed, 9 insertions(+) >> > > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > there's no need to repost patches *only* to add the tags. The upstream > maintainer will do that for acks received on the version they apply. > > If a tag was not added on purpose, please state why and what changed. >
Re: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi
On 4/12/21 12:33 PM, Chen-Yu Tsai wrote: > On Mon, Apr 12, 2021 at 6:03 PM Johan Jonker wrote: >> >> On 4/12/21 5:15 AM, Chen-Yu Tsai wrote: >>> On Sun, Apr 11, 2021 at 9:11 PM Johan Jonker wrote: >>>> >>>> A test with the command below gives this error: >>>> >>>> /arch/arm/boot/dts/rv1108-evb.dt.yaml: >>>> pwm@1028: 'interrupts' does not match any of the regexes: >>>> 'pinctrl-[0-9]+' >>>> >>>> "interrupts" is an undocumented property, so remove them >>>> from pwm nodes in rv1108.dtsi. >>>> >>>> make ARCH=arm dtbs_check >>>> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml >>>> >>>> Signed-off-by: Johan Jonker >>> >>> Given that the interrupts were specified, meaning they are wired up in >>> hardware, >>> shouldn't the solution be to add the interrupts property to the binding >>> instead? >>> >>> After all, the device tree describes the actual hardware, not just what the >>> implementations need. >>> >>> ChenYu >>> >> >> Hi, >> >> The question of what to do with it was asked in version 1, but no answer >> was given, so I made a proposal. >> The device tree description should be complete, but also as lean as >> possible. If someone manages to sneak in undocumented properties without >> reason then the ultimate consequence should be removal I think. >> >> Not sure about the (missing?) rv1108 TRM, but for rk3328 the interrupt >> is used for: >> >> PWM_INTSTS 0x0040 W 0x Interrupt Status Register >> Channel Interrupt Polarity Flag >> This bit is used in capture mode in order to identify the >> transition of the input waveform when interrupt is generated. >> Channel Interrupt Status >> Interrupt generated >> >> PWM_INT_EN 0x0044 W 0x Interrupt Enable Register >> Channel Interrupt Enable >> >> Is there any current realistic use/setup for it to convince rob+dt this >> should be added to pwm-rockchip.yaml? Found: pwm3 combined with ir uses a irq. Keep that as it is for now. https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/input/remotectl/rockchip_pwm_remotectl.c > > Well, the PWM core has capture support, and pwm-sti implements it with > interrupt support, so I guess there's at least a legitimate case for > adding that to the binding. Whether someone has an actual use case for > it and adds code to implement it is another story. > >> The rk3328 interrupt rkpwm_int seems shared between channels, but only >> included to pwm3. What is the proper way for that? > > I guess the bigger question is why was the PWM controller split into > four device nodes, instead of just one encompassing the whole block. > Now we'd have to introduce a new binding to support capture mode and > interrupts. > > In that case I agree with dropping the interrupts for now, as it just > won't fit. But I would add this additional information to the commit > message. Will wait with adding "interrupts" to pwm-rockchip.yaml till someone makes a solution for the whole block. Convert only current document/binding to reduce notifications. For Heiko: patch 3 + 5 can go in the garbage bin: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi [PATCH v2 5/6] arm64: dts: rockchip: remove interrupts properties from pwm nodes rk3328.dtsi Johan > > > Regards > ChenYu >
Re: [PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi
On 4/12/21 5:15 AM, Chen-Yu Tsai wrote: > On Sun, Apr 11, 2021 at 9:11 PM Johan Jonker wrote: >> >> A test with the command below gives this error: >> >> /arch/arm/boot/dts/rv1108-evb.dt.yaml: >> pwm@1028: 'interrupts' does not match any of the regexes: >> 'pinctrl-[0-9]+' >> >> "interrupts" is an undocumented property, so remove them >> from pwm nodes in rv1108.dtsi. >> >> make ARCH=arm dtbs_check >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml >> >> Signed-off-by: Johan Jonker > > Given that the interrupts were specified, meaning they are wired up in > hardware, > shouldn't the solution be to add the interrupts property to the binding > instead? > > After all, the device tree describes the actual hardware, not just what the > implementations need. > > ChenYu > Hi, The question of what to do with it was asked in version 1, but no answer was given, so I made a proposal. The device tree description should be complete, but also as lean as possible. If someone manages to sneak in undocumented properties without reason then the ultimate consequence should be removal I think. Not sure about the (missing?) rv1108 TRM, but for rk3328 the interrupt is used for: PWM_INTSTS 0x0040 W 0x Interrupt Status Register Channel Interrupt Polarity Flag This bit is used in capture mode in order to identify the transition of the input waveform when interrupt is generated. Channel Interrupt Status Interrupt generated PWM_INT_EN 0x0044 W 0x Interrupt Enable Register Channel Interrupt Enable Is there any current realistic use/setup for it to convince rob+dt this should be added to pwm-rockchip.yaml? The rk3328 interrupt rkpwm_int seems shared between channels, but only included to pwm3. What is the proper way for that? Johan
[PATCH v1] dt-bindings: gpio: add YAML description for rockchip,gpio-bank
Current dts files with "rockchip,gpio-bank" subnodes
are manually verified. In order to automate this process
the text that describes the compatible in rockchip,pinctrl.txt
is removed and converted to YAML in rockchip,gpio-bank.yaml.
Signed-off-by: Johan Jonker
---
.../bindings/gpio/rockchip,gpio-bank.yaml | 82 ++
.../bindings/pinctrl/rockchip,pinctrl.txt | 58 +--
2 files changed, 83 insertions(+), 57 deletions(-)
create mode 100644
Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
new file mode 100644
index 0..ac2479732
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip GPIO bank
+
+maintainers:
+ - Heiko Stuebner
+
+properties:
+ compatible:
+enum:
+ - rockchip,gpio-bank
+ - rockchip,rk3188-gpio-bank0
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+
+ gpio-controller: true
+
+ "#gpio-cells":
+const: 2
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - gpio-controller
+ - "#gpio-cells"
+ - interrupt-controller
+ - "#interrupt-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+pinctrl: pinctrl {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ gpio0: gpio0@2000a000 {
+compatible = "rockchip,rk3188-gpio-bank0";
+reg = <0x2000a000 0x100>;
+interrupts = ;
+clocks = <&clk_gates8 9>;
+
+gpio-controller;
+#gpio-cells = <2>;
+
+interrupt-controller;
+#interrupt-cells = <2>;
+ };
+
+ gpio1: gpio1@2003c000 {
+compatible = "rockchip,gpio-bank";
+reg = <0x2003c000 0x100>;
+interrupts = ;
+clocks = <&clk_gates8 10>;
+
+gpio-controller;
+#gpio-cells = <2>;
+
+interrupt-controller;
+#interrupt-cells = <2>;
+ };
+};
diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
index d3eae61a3..4719a6a07 100644
--- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
@@ -50,23 +50,7 @@ Deprecated properties for iomux controller:
Use rockchip,grf and rockchip,pmu described above instead.
Required properties for gpio sub nodes:
- - compatible: "rockchip,gpio-bank"
- - reg: register of the gpio bank (different than the iomux registerset)
- - interrupts: base interrupt of the gpio bank in the interrupt controller
- - clocks: clock that drives this bank
- - gpio-controller: identifies the node as a gpio controller and pin bank.
- - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
-binding is used, the amount of cells must be specified as 2. See generic
-GPIO binding documentation for description of particular cells.
- - interrupt-controller: identifies the controller node as interrupt-parent.
- - #interrupt-cells: the value of this property should be 2 and the interrupt
-cells should use the standard two-cell scheme described in
-bindings/interrupt-controller/interrupts.txt
-
-Deprecated properties for gpio sub nodes:
- - compatible: "rockchip,rk3188-gpio-bank0"
- - reg: second element: separate pull register for rk3188 bank0, use
-rockchip,pmu described above instead
+See rockchip,gpio-bank.yaml
Required properties for pin configuration node:
- rockchip,pins: 3 integers array, represents a group of pins mux and config
@@ -127,43 +111,3 @@ uart2: serial@20064000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_xfer>;
};
-
-Example for rk3188:
-
- pinctrl@20008000 {
- compatible = "rockchip,rk3188-pinctrl";
- rockchip,grf = <&grf>;
- rockchip,pmu = <&pmu>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- gpio0: gpio0@2000a000 {
- compatible = "rockchip,rk3188-gpio-bank0";
- reg = <0x2000a000 0x100>;
- interrupts = ;
- clocks = <&clk_gates8 9>;
-
- gpio-controller;
- #gpio-cells = &l
Re: [PATCH v2 3/7] gpio: separate gpio driver from pinctrl-rockchip driver
Hi, When I check "rockchip,gpio-bank" with YAML it turns out that rk3288-veyron-XXX has 'gpio-line-names' as 'extra' property. It is not defined in the "rockchip,pinctrl.txt" document, but in ~/.local/lib/python3.5/site-packages/dtschema/schemas/gpio/gpio.yaml Where is that in use? In this driver or external? Can it be removed from mainline dts? Johan /arch/arm/boot/dts/rk3288-veyron-fievel.dt.yaml: gpio7@ff7e: 'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: /Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml On 4/11/21 3:30 PM, Peter Geis wrote: > From: Jianqun Xu > > Separate the gpio driver from the pinctrl driver. > > Signed-off-by: Jianqun Xu > ---
[PATCH v2 6/6] arm64: dts: rockchip: remove clock-names from pwm nodes
A test with the command below gives this error: /arch/arm64/boot/dts/rockchip/rk3368-evb-act8846.dt.yaml: pwm@ff680030: clock-names: ['pwm'] is too short Devices with only one pwm clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 2 files changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 61b0a2a90..7832e26a3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -561,7 +561,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -572,7 +571,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -581,7 +579,6 @@ reg = <0x0 0xff680020 0x0 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; @@ -592,7 +589,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM1>; - clock-names = "pwm"; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index e93a5f320..6221b027e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1185,7 +1185,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1196,7 +1195,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1207,7 +1205,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; @@ -1218,7 +1215,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3a_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; - clock-names = "pwm"; status = "disabled"; }; -- 2.11.0
[PATCH v2 5/6] arm64: dts: rockchip: remove interrupts properties from pwm nodes rk3328.dtsi
A test with the command below gives this error:
/arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: pwm@ff1b0030:
'interrupts' does not match any of the regexes: 'pinctrl-[0-9]+'
"interrupts" is an undocumented property, so remove them
from pwm nodes in rk3328.dtsi.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index c2ca358c7..5c968b3cd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -480,7 +480,6 @@
pwm3: pwm@ff1b0030 {
compatible = "rockchip,rk3328-pwm";
reg = <0x0 0xff1b0030 0x0 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
--
2.11.0
[PATCH v2 3/6] ARM: dts: rockchip: remove interrupts properties from pwm nodes rv1108.dtsi
A test with the command below gives this error:
/arch/arm/boot/dts/rv1108-evb.dt.yaml:
pwm@1028: 'interrupts' does not match any of the regexes:
'pinctrl-[0-9]+'
"interrupts" is an undocumented property, so remove them
from pwm nodes in rv1108.dtsi.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rv1108.dtsi | 8
1 file changed, 8 deletions(-)
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 68e2282f7..af033d4c9 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -217,7 +217,6 @@
pwm4: pwm@1028 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x1028 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -229,7 +228,6 @@
pwm5: pwm@10280010 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x10280010 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -241,7 +239,6 @@
pwm6: pwm@10280020 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x10280020 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -253,7 +250,6 @@
pwm7: pwm@10280030 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x10280030 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -391,7 +387,6 @@
pwm0: pwm@2004 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x2004 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -403,7 +398,6 @@
pwm1: pwm@20040010 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x20040010 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -415,7 +409,6 @@
pwm2: pwm@20040020 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x20040020 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
@@ -427,7 +420,6 @@
pwm3: pwm@20040030 {
compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
reg = <0x20040030 0x10>;
- interrupts = ;
clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
clock-names = "pwm", "pclk";
pinctrl-names = "default";
--
2.11.0
[PATCH v2 4/6] ARM: dts: rockchip: remove clock-names from pwm nodes
A test with the command below gives this error: /arch/arm/boot/dts/rk3036-evb.dt.yaml: pwm@20050030: clock-names: ['pwm'] is too short Devices with only one pwm clock use it to both to derive the functional clock for the device and as the bus clock. The driver does not need "clock-names" to get a handle, so remove them all. make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml Signed-off-by: Johan Jonker --- arch/arm/boot/dts/rk3036.dtsi | 4 arch/arm/boot/dts/rk3288.dtsi | 4 2 files changed, 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 47a787a12..e24230d50 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -355,7 +355,6 @@ reg = <0x2005 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; @@ -366,7 +365,6 @@ reg = <0x20050010 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; @@ -377,7 +375,6 @@ reg = <0x20050020 0x10>; #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; @@ -388,7 +385,6 @@ reg = <0x20050030 0x10>; #pwm-cells = <2>; clocks = <&cru PCLK_PWM>; - clock-names = "pwm"; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index ea7416c31..05557ad02 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -679,7 +679,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -690,7 +689,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -701,7 +699,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; @@ -712,7 +709,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_RKPWM>; - clock-names = "pwm"; status = "disabled"; }; -- 2.11.0
[PATCH v2 1/6] dt-bindings: pwm: convert pwm-rockchip.txt to YAML
Current dts files with 'pwm' nodes are manually verified.
In order to automate this process pwm-rockchip.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
---
Changed V2:
changed schema for clocks and clock-names
---
.../devicetree/bindings/pwm/pwm-rockchip.txt | 27 ---
.../devicetree/bindings/pwm/pwm-rockchip.yaml | 91 ++
2 files changed, 91 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
deleted file mode 100644
index f70956dea..0
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Rockchip PWM controller
-
-Required properties:
- - compatible: should be "rockchip,-pwm"
- "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
- "rockchip,rk3288-pwm": found on RK3288 SOC
- "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
- "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- - reg: physical base address and length of the controller's registers
- - clocks: See ../clock/clock-bindings.txt
- - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
- - There is one clock that's used both to derive the functional clock
- for the device and as the bus clock.
- - For newer hardware (rk3328 and future socs): specified by name
- - "pwm": This is used to derive the functional clock.
- - "pclk": This is the APB bus clock.
- - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
- for a description of the cell format.
-
-Example:
-
- pwm0: pwm@2003 {
- compatible = "rockchip,rk2928-pwm";
- reg = <0x2003 0x10>;
- clocks = <&cru PCLK_PWM01>;
- #pwm-cells = <2>;
- };
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
new file mode 100644
index 0..142ce85ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip PWM controller
+
+maintainers:
+ - Heiko Stuebner
+
+properties:
+ compatible:
+oneOf:
+ - const: rockchip,rk2928-pwm
+ - const: rockchip,rk3288-pwm
+ - const: rockchip,vop-pwm
+ - items:
+ - const: rockchip,rk3036-pwm
+ - const: rockchip,rk2928-pwm
+ - items:
+ - enum:
+ - rockchip,rv1108-pwm
+ - const: rockchip,rk3288-pwm
+
+ reg:
+maxItems: 1
+
+ clocks:
+minItems: 1
+maxItems: 2
+
+ clock-names:
+maxItems: 2
+
+ "#pwm-cells":
+enum: [2, 3]
+description:
+ Must be 2 (rk2928) or 3 (rk3288 and later).
+ See pwm.yaml for a description of the cell format.
+
+required:
+ - compatible
+ - reg
+ - "#pwm-cells"
+
+if:
+ properties:
+compatible:
+ contains:
+enum:
+ - rockchip,rv1108-pwm
+
+then:
+ properties:
+clocks:
+ items:
+- description: Used to derive the functional clock for the device.
+- description: Used as the APB bus clock.
+
+clock-names:
+ items:
+- const: pwm
+- const: pclk
+
+ required:
+- clocks
+- clock-names
+
+else:
+ properties:
+clocks:
+ maxItems: 1
+ description:
+Used both to derive the functional clock
+for the device and as the bus clock.
+
+ required:
+- clocks
+
+additionalProperties: false
+
+examples:
+ - |
+#include
+pwm0: pwm@2003 {
+ compatible = "rockchip,rk2928-pwm";
+ reg = <0x2003 0x10>;
+ clocks = <&cru PCLK_PWM01>;
+ #pwm-cells = <2>;
+};
--
2.11.0
[PATCH v2 2/6] dt-bindings: pwm: add more compatible strings to pwm-rockchip.yaml
The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,rk3328-pwm" "rockchip,rk3036-pwm", "rockchip,rk2928-pwm" "rockchip,rk3368-pwm", "rockchip,rk3288-pwm" "rockchip,rk3399-pwm", "rockchip,rk3288-pwm" "rockchip,px30-pwm", "rockchip,rk3328-pwm" "rockchip,rk3308-pwm", "rockchip,rk3328-pwm" for pwm nodes to pwm-rockchip.yaml. Signed-off-by: Johan Jonker --- Changed V2: changed schema for clocks and clock-names --- Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 9 + 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml index 142ce85ce..5596bee70 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -14,14 +14,22 @@ properties: oneOf: - const: rockchip,rk2928-pwm - const: rockchip,rk3288-pwm + - const: rockchip,rk3328-pwm - const: rockchip,vop-pwm - items: - const: rockchip,rk3036-pwm - const: rockchip,rk2928-pwm - items: - enum: + - rockchip,rk3368-pwm + - rockchip,rk3399-pwm - rockchip,rv1108-pwm - const: rockchip,rk3288-pwm + - items: + - enum: + - rockchip,px30-pwm + - rockchip,rk3308-pwm + - const: rockchip,rk3328-pwm reg: maxItems: 1 @@ -49,6 +57,7 @@ if: compatible: contains: enum: + - rockchip,rk3328-pwm - rockchip,rv1108-pwm then: -- 2.11.0
Re: [PATCH v1 1/2] dt-bindings: pwm: convert pwm-rockchip.txt to YAML
Hi,
Question for Heiko:
rv1108.dtsi and rk3328.dtsi have a undocumented "interrupts" property
AFAICT without driver support.
Please advise what to do with it.
See build log:
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210406155053.29101-1-jbx6...@gmail.com/
Question for Rob:
It looks like that recent "improvements" with regard to checking for
undocumented compatible strings make it almost impossible to do any
useful dt_checking, let alone for the average user. Maybe reduce the
notification blurb output a bit for things that have nothing to do with
this document. Unable to fall back to previous versions for older kernels.
pip3 install git+https://github.com/devicetree-org/dt-schema.git@master
--upgrade
make ARCH=arm dtbs_check
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
make ARCH=arm64 dtbs_check
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
On 4/6/21 5:50 PM, Johan Jonker wrote:
> Current dts files with 'pwm' nodes are manually verified.
> In order to automate this process pwm-rockchip.txt
> has to be converted to yaml.
>
> Signed-off-by: Johan Jonker
> ---
> .../devicetree/bindings/pwm/pwm-rockchip.txt | 27 -
> .../devicetree/bindings/pwm/pwm-rockchip.yaml | 66
> ++
> 2 files changed, 66 insertions(+), 27 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> deleted file mode 100644
> index f70956dea..0
> --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -Rockchip PWM controller
> -
> -Required properties:
> - - compatible: should be "rockchip,-pwm"
> - "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
> - "rockchip,rk3288-pwm": found on RK3288 SOC
> - "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
> - "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
> - - reg: physical base address and length of the controller's registers
> - - clocks: See ../clock/clock-bindings.txt
> - - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
> - - There is one clock that's used both to derive the functional clock
> - for the device and as the bus clock.
> - - For newer hardware (rk3328 and future socs): specified by name
> - - "pwm": This is used to derive the functional clock.
> - - "pclk": This is the APB bus clock.
> - - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this
> directory
> - for a description of the cell format.
> -
> -Example:
> -
> - pwm0: pwm@2003 {
> - compatible = "rockchip,rk2928-pwm";
> - reg = <0x2003 0x10>;
> - clocks = <&cru PCLK_PWM01>;
> - #pwm-cells = <2>;
> - };
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
> b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
> new file mode 100644
> index 0..cfd637d3e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip PWM controller
> +
> +maintainers:
> + - Heiko Stuebner
> +
> +properties:
> + compatible:
> +oneOf:
> + - const: rockchip,rk2928-pwm
> + - const: rockchip,rk3288-pwm
> + - const: rockchip,vop-pwm
> + - items:
> + - enum:
> + - rockchip,rv1108-pwm
> + - const: rockchip,rk3288-pwm
> +
> + reg:
> +maxItems: 1
> +
> + clocks:
> +minItems: 1
> +maxItems: 2
> +description:
> + For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399)
> +There is one clock that is used both to derive the functional clock
> +for the device and as the bus clock.
> + For newer hardware (rk3328 and future SoCs) that is also specified
> + with clock names.
> +"pwm" is used to derive the functional clock for the device.
> +"pclk" is used as the APB bus clock.
> +
> + clock-names:
> +minItems: 1
> +items:
> + - const: pwm
> + - con
[PATCH v1 1/2] dt-bindings: pwm: convert pwm-rockchip.txt to YAML
Current dts files with 'pwm' nodes are manually verified.
In order to automate this process pwm-rockchip.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
---
.../devicetree/bindings/pwm/pwm-rockchip.txt | 27 -
.../devicetree/bindings/pwm/pwm-rockchip.yaml | 66 ++
2 files changed, 66 insertions(+), 27 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
deleted file mode 100644
index f70956dea..0
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-Rockchip PWM controller
-
-Required properties:
- - compatible: should be "rockchip,-pwm"
- "rockchip,rk2928-pwm": found on RK29XX,RK3066 and RK3188 SoCs
- "rockchip,rk3288-pwm": found on RK3288 SOC
- "rockchip,rv1108-pwm", "rockchip,rk3288-pwm": found on RV1108 SoC
- "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- - reg: physical base address and length of the controller's registers
- - clocks: See ../clock/clock-bindings.txt
- - For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399):
- - There is one clock that's used both to derive the functional clock
- for the device and as the bus clock.
- - For newer hardware (rk3328 and future socs): specified by name
- - "pwm": This is used to derive the functional clock.
- - "pclk": This is the APB bus clock.
- - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
- for a description of the cell format.
-
-Example:
-
- pwm0: pwm@2003 {
- compatible = "rockchip,rk2928-pwm";
- reg = <0x2003 0x10>;
- clocks = <&cru PCLK_PWM01>;
- #pwm-cells = <2>;
- };
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
new file mode 100644
index 0..cfd637d3e
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-rockchip.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip PWM controller
+
+maintainers:
+ - Heiko Stuebner
+
+properties:
+ compatible:
+oneOf:
+ - const: rockchip,rk2928-pwm
+ - const: rockchip,rk3288-pwm
+ - const: rockchip,vop-pwm
+ - items:
+ - enum:
+ - rockchip,rv1108-pwm
+ - const: rockchip,rk3288-pwm
+
+ reg:
+maxItems: 1
+
+ clocks:
+minItems: 1
+maxItems: 2
+description:
+ For older hardware (rk2928, rk3066, rk3188, rk3228, rk3288, rk3399)
+There is one clock that is used both to derive the functional clock
+for the device and as the bus clock.
+ For newer hardware (rk3328 and future SoCs) that is also specified
+ with clock names.
+"pwm" is used to derive the functional clock for the device.
+"pclk" is used as the APB bus clock.
+
+ clock-names:
+minItems: 1
+items:
+ - const: pwm
+ - const: pclk
+
+ "#pwm-cells":
+enum: [2, 3]
+description:
+ Must be 2 (rk2928) or 3 (rk3288).
+ See pwm.yaml for a description of the cell format.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - "#pwm-cells"
+
+examples:
+ - |
+#include
+pwm0: pwm@2003 {
+ compatible = "rockchip,rk2928-pwm";
+ reg = <0x2003 0x10>;
+ clocks = <&cru PCLK_PWM01>;
+ #pwm-cells = <2>;
+};
--
2.11.0
[PATCH v1 2/2] dt-bindings: pwm: add more compatible strings to pwm-rockchip.yaml
The compatible strings below are already in use in the Rockchip dtsi files, but were somehow never added to a document, so add "rockchip,rk3328-pwm" "rockchip,rk3036-pwm", "rockchip,rk2928-pwm" "rockchip,rk3368-pwm", "rockchip,rk3288-pwm" "rockchip,rk3399-pwm", "rockchip,rk3288-pwm" "rockchip,px30-pwm", "rockchip,rk3328-pwm" "rockchip,rk3308-pwm", "rockchip,rk3328-pwm" for pwm nodes to pwm-rockchip.yaml. Signed-off-by: Johan Jonker --- Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 11 +++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml index cfd637d3e..3945d586c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -14,11 +14,22 @@ properties: oneOf: - const: rockchip,rk2928-pwm - const: rockchip,rk3288-pwm + - const: rockchip,rk3328-pwm - const: rockchip,vop-pwm - items: + - const: rockchip,rk3036-pwm + - const: rockchip,rk2928-pwm + - items: - enum: + - rockchip,rk3368-pwm + - rockchip,rk3399-pwm - rockchip,rv1108-pwm - const: rockchip,rk3288-pwm + - items: + - enum: + - rockchip,px30-pwm + - rockchip,rk3308-pwm + - const: rockchip,rk3328-pwm reg: maxItems: 1 -- 2.11.0
Re: [PATCH v6 1/4] usb: dwc3: of-simple: bail probe if no dwc3 child node
On 4/5/21 9:02 AM, Greg KH wrote: > On Thu, Apr 01, 2021 at 11:36:49PM +0200, Johan Jonker wrote: >> For some of the dwc3-of-simple compatible SoCs we >> don't want to bind this driver to a dwc3 node, >> but bind that node to the 'snps,dwc3' driver instead. >> The kernel has no logic to decide which driver to bind >> to if there are 2 matching drivers, so bail probe if no >> dwc3 child node. >> >> Signed-off-by: Johan Jonker >> --- >> drivers/usb/dwc3/dwc3-of-simple.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/usb/dwc3/dwc3-of-simple.c >> b/drivers/usb/dwc3/dwc3-of-simple.c >> index 71fd620c5..8d3baa5df 100644 >> --- a/drivers/usb/dwc3/dwc3-of-simple.c >> +++ b/drivers/usb/dwc3/dwc3-of-simple.c >> @@ -38,6 +38,10 @@ static int dwc3_of_simple_probe(struct platform_device >> *pdev) >> >> int ret; >> >> +/* Bail probe if no dwc3 child node. */ >> +if (!of_get_compatible_child(dev->of_node, "snps,dwc3")) >> +return -ENODEV; > > Why is this part of the "convert to yaml" patch series? Shouldn't this > be a separate, independant patch? independent Hi Greg, As pointed out by Rob in the v3 review process the YAML conversion has some side effects for new dt files. A good habit is to fix things before they become in effect. That's why this patch is placed before the dtsi changes and why Heiko asked to have a look at it. For the sake of completeness there are other less optimal options: - remove rk3399 support from dwc3-of-simple.c - unselect CONFIG_USB_DWC3_OF_SIMPLE for new rk3399 device trees In that case at least have it on record why USB maintainers didn't apply it in case someone else start to complain about it later when Heiko goes ahead with it. Johan Jonker > > thanks, > > greg k-h >
Re: [PATCH v2] rockchip: enabled LAN port on NanoPi R2S
Hi Tianling,
On 4/5/21 11:34 AM, Tianling Shen wrote:
> From: David Bauer
>
> Enable the USB3 port on the FriendlyARM NanoPi R2S.
> This is required for the USB3 attached LAN port to work.
>
> Signed-off-by: David Bauer
> [added device node for USB Ethernet controller]
> Signed-off-by: Tianling Shen
> ---
> .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 32 +++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> index faf496d789cf..18936b393d9d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
> @@ -13,6 +13,10 @@
> model = "FriendlyElec NanoPi R2S";
> compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
>
> + aliases {
> + ethernet1 = &r8153;
> + };
> +
> chosen {
> stdout-path = "serial2:150n8";
> };
> @@ -37,6 +41,16 @@
> };
> };
>
> + vcc_rtl8153: vcc-rtl8153-regulator {
sort nodename
> + compatible = "regulator-fixed";
> + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&rtl8153_en_drv>;
> + regulator-always-on;
> + regulator-name = "vcc_rtl8153";
exception to the sort rule
sort regulator-name above all other regulator properties
> + enable-active-high;
sort
Heiko's sort rules:
compatible
reg
interrupts
[alphabetical]
status [if needed]
> + };
> +
> leds {
> compatible = "gpio-leds";
> pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
> @@ -265,6 +279,12 @@
> };
> };
> };
> +
> + usb {
> + rtl8153_en_drv: rtl8153-en-drv {
> + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> };
>
> &io_domains {
> @@ -364,6 +384,18 @@
> dr_mode = "host";
> };
>
> +&usbdrd3 {
> + dr_mode = "host";
> + status = "okay";
> +
> + r8153: usb-eth@2 {
With YAML undocumented additional properties and nodes generate
notifications.
We need a change in the documents below for that.
rockchip,dwc3.yaml > usb-drd.yaml > usb.yaml
Is there a standard for the usb-eth nodename?
> + compatible = "realtek,rtl8153";
Since a while Rob has improved has scripts.
There's no escape anymore.
Add a YAML document to this serie for "realtek,rtl8153".
Improve checking for undocumented compatible strings
https://github.com/devicetree-org/dt-schema/commit/93e7ada8d53af099074cb5d53f7caa12835784e0
> + reg = <2>;
Why 2 ?
> +
> + local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by
> U-Boot */
This is a private property.
In a generic dts that's up to the user.
> + };
> +};
> +
> &usb_host0_ehci {
> status = "okay";
> };
>
[PATCH v6 3/4] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_0 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V6:
rebase
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
.../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
.../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 ---
19 files changed, 25 insertions(+), 96 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 1ce85a581..95110d065 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -153,7 +153,7 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 6db18808b..4017b0e8c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -773,12 +773,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 32dcaf210..e42783cb7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -618,13 +618,9 @@ ap_i2c_audio: &i2c8 {
};
&usbdrd3_0 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon0>;
-};
-
-&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "host";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index 341d074ed..daf14f732 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -731,12 +731,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index 635afdd99..d028285fb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -797,12 +797,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1fa80ac15..1c0b48a71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -611,12 +611,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
index fa5809887..33730b3c5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -124,7 +124,7 @@
status = "disabled";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 4
[PATCH v6 4/4] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_1 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
.../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
17 files changed, 26 insertions(+), 93 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 95110d065..4392780db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -157,7 +157,7 @@
dr_mode = "host";
};
-&usbdrd_dwc3_1 {
+&usbdrd3_1 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 4017b0e8c..28e5895de 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -778,12 +778,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index 1384dabbd..c996c688d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -351,13 +351,9 @@ ap_i2c_tp: &i2c5 {
};
&usbdrd3_1 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon1>;
-};
-
-&usbdrd_dwc3_1 {
status = "okay";
- dr_mode = "host";
};
&pinctrl {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index daf14f732..397050703 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -736,12 +736,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index d028285fb..30e6e3e41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -802,12 +802,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1c0b48a71..a7092fda3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -616,12 +616,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 01c15c833..6605d0bcb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -711,10 +711,6 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index 7b633622c..fdc027ff3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
[PATCH v6 1/4] usb: dwc3: of-simple: bail probe if no dwc3 child node
For some of the dwc3-of-simple compatible SoCs we don't want to bind this driver to a dwc3 node, but bind that node to the 'snps,dwc3' driver instead. The kernel has no logic to decide which driver to bind to if there are 2 matching drivers, so bail probe if no dwc3 child node. Signed-off-by: Johan Jonker --- drivers/usb/dwc3/dwc3-of-simple.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c index 71fd620c5..8d3baa5df 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -38,6 +38,10 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) int ret; + /* Bail probe if no dwc3 child node. */ + if (!of_get_compatible_child(dev->of_node, "snps,dwc3")) + return -ENODEV; + simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL); if (!simple) return -ENOMEM; -- 2.11.0
[PATCH v6 2/4] arm64: dts: rockchip: optimize clks for rk3399 dwc3
From: Wu Liang feng Remove unnecessary clocks, refer to rk3399 TRM, aclk_usb3 is the parent of aclk_usb3otg0/1 and aclk_usb3_grf, and we will enable aclk_usb3otg0/1 and aclk_usb3_grf, so don't need to enable aclk_usb3 again. In addition, the aclk_usb3_rksoc_axi_perf clk is used for usb3 performance monitor module which we don't use now, so don't need to enable it. Signed-off-by: Wu Liang feng Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index e93a5f320..186a7c483 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -370,11 +370,9 @@ #size-cells = <2>; ranges; clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, -<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, -<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; +<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; + "bus_clk", "grf_clk"; resets = <&cru SRST_A_USB3_OTG0>; reset-names = "usb3-otg"; status = "disabled"; @@ -406,11 +404,9 @@ #size-cells = <2>; ranges; clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, -<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, -<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; +<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; + "bus_clk", "grf_clk"; resets = <&cru SRST_A_USB3_OTG1>; reset-names = "usb3-otg"; status = "disabled"; -- 2.11.0
[PATCH v6 0/4] convert rockchip,dwc3.txt to yaml
The conversion of rockchip,dwc3.txt to yaml was added to linux-next, but the necessary changes for rk3399 are still pending. For rk3399 dwc3 usb the wrapper node for only clocks makes no sense, so that was removed in the YAML example. Now dtbs_check still generates notifications for the compatibility string in the dts files that doesn't match, because it changed from "rockchip,rk3399-dwc3" to "rockchip,rk3399-dwc3", "snps,dwc3". The problem is to keep compatible with old device trees. I.e. a device running an older device tree should still work with newer kernels. Comment by Rob in version 3: Presumably you are getting lucky here (with link order). The kernel has no logic to decide which driver to bind to if there are 2 matching drivers. If we did, it would probably be the opposite of what you want here as we'd pick the most specific match. This driver should probably bail probe if no dwc3 child node. Please advise how to move forward with this serie. Changed V6: rebase remove accepted patches from serie Changed V5: add select Changed V4: removed patch "of-simple: add compatible for rk3328" add patch "of-simple: bail probe if no dwc3 child node" Changed V3: remove aclk_usb3_rksoc_axi_perf remove aclk_usb3 Changed V2: remove node wrapper Johan Jonker (3): usb: dwc3: of-simple: bail probe if no dwc3 child node arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node Wu Liang feng (1): arm64: dts: rockchip: optimize clks for rk3399 dwc3 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 4 +- arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 12 +-- .../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 6 +- arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 6 +- arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 12 +-- .../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 12 +-- arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 12 +-- arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts | 2 +- arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 8 -- arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 12 +-- .../boot/dts/rockchip/rk3399-pinebook-pro.dts | 8 -- .../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 - arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +- arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 10 +-- arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 12 +-- arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 4 +- arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 8 -- arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 12 +-- arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 12 +-- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 86 -- .../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 - drivers/usb/dwc3/dwc3-of-simple.c | 4 + 22 files changed, 59 insertions(+), 197 deletions(-) -- 2.11.0
Re: [PATCH v6 09/11] dt-bindings: power: rockchip: Convert to json-schema
On 3/26/21 11:30 AM, Elaine Zhang wrote: > Convert the soc/rockchip/power_domain.txt binding document to > json-schema and move to the power bindings directory. > > Signed-off-by: Elaine Zhang > From: Enric Balletbo i Serra Not sure if 'From:' is save to use here at this position for news readers ?? > Link:https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/ > --- > .../power/rockchip,power-controller.yaml | 291 ++ > .../bindings/soc/rockchip/power_domain.txt| 136 > 2 files changed, 291 insertions(+), 136 deletions(-) > create mode 100644 > Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > delete mode 100644 > Documentation/devicetree/bindings/soc/rockchip/power_domain.txt > > diff --git > a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > new file mode 100644 > index ..9fec9e227432 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > @@ -0,0 +1,291 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip Power Domains > + > +maintainers: > + - Elaine Zhang > + - Heiko Stuebner > + > +description: | > + Rockchip processors include support for multiple power domains which can be > + powered up/down by software based on different application scenarios to > save power. > + > + Power domains contained within power-controller node are generic power > domain > + providers documented in > Documentation/devicetree/bindings/power/power-domain.yaml. > + > + IP cores belonging to a power domain should contain a "power-domains" > + property that is a phandle for the power domain node representing the > domain. > + > +properties: > + $nodename: > +const: power-controller > + > + compatible: > +enum: > + - rockchip,px30-power-controller > + - rockchip,rk3036-power-controller > + - rockchip,rk3066-power-controller > + - rockchip,rk3128-power-controller > + - rockchip,rk3188-power-controller > + - rockchip,rk3228-power-controller > + - rockchip,rk3288-power-controller > + - rockchip,rk3328-power-controller > + - rockchip,rk3366-power-controller > + - rockchip,rk3368-power-controller > + - rockchip,rk3399-power-controller > + > + "#power-domain-cells": > +const: 1 > + > + "#address-cells": > +const: 1 > + > + "#size-cells": > +const: 0 > + > + clocks: true > + > + assigned-clocks: > +minItems: 1 Currently rk3288.dtsi has some 'extra' properties. One of the purposes of this document is to filter bogus properties in dt files. With "minItems: 1" you have 1 to 'endless' options. Better restrict with: maxItems: 1 Given this from rk3288.dtsi: assigned-clocks = <&cru SCLK_EDP_24M>; assigned-clock-parents = <&xin24m>; Introduced with patch: ARM: dts: rockchip: Assign RK3288 EDP_24M input centrally Moved from rk3288-veyron.dtsi Please advise if they still are needed or not. Adding new minor properties should be added as note in the commit message for review by Rob, because it isn't an exact conversion of the original. > + > + assigned-clock-parents: > +minItems: 1 dito > + > +patternProperties: > + "^power-domain@[0-9a-f]+$": > +type: object > +description: | > + Represents the power domains within the power controller node as > documented > + in Documentation/devicetree/bindings/power/power-domain.yaml. > + > +properties: > + > + "#power-domain-cells": > +description: > + Must be 0 for nodes representing a single PM domain and 1 for nodes > + providing multiple PM domains. > + > + "#address-cells": > +const: 1 > + > + "#size-cells": > +const: 0 > + > + reg: > +maxItems: 1 > +description: | > + Power domain index. Valid values are defined in > + "include/dt-bindings/power/px30-power.h" > + "include/dt-bindings/power/rk3036-power.h" > + "include/dt-bindings/power/rk3066-power.h" > + "include/dt-bindings/power/rk3128-power.h" > + "include/dt-bindings/power/rk3188-power.h" > + "include/dt-bindings/power/rk3228-power.h" > + "include/dt-bindings/power/rk3288-power.h" > + "include/dt-bindings/power/rk3328-power.h" > + "include/dt-bindings/power/rk3366-power.h" > + "include/dt-bindings/power/rk3368-power.h" > + "include/dt-bindings/power/rk3399-power.h" > + > + clocks: > +description: | > + A number of phandles to clocks that need to be enabled while power > domain > + switc
Re: [PATCH v6 09/11] dt-bindings: power: rockchip: Convert to json-schema
Hi Elaine, You've changed the license ones again. Could someone advise about GPL2.0 and legal stuff here? On 3/26/21 11:30 AM, Elaine Zhang wrote: > Convert the soc/rockchip/power_domain.txt binding document to > json-schema and move to the power bindings directory. > > Signed-off-by: Elaine Zhang > From: Enric Balletbo i Serra Is this the correct position for that? > Link:https://patchwork.kernel.org/project/linux-rockchip/patch/20210225102643.653095-1-enric.balle...@collabora.com/ Normally the original author of a patch should be honored with help of this command below: git commit --amend --author="Enric Balletbo i Serra " This places a "From: " on top of the commit message. But this is still a conversion/restyle to YAML. Meanwhile various other authors in the past have made contributions/comments to this document as well that was GPL2.0 only at the time. (I'm just saying: Claiming to be the only author sounds a bit strange here) Johan > --- > .../power/rockchip,power-controller.yaml | 291 ++ > .../bindings/soc/rockchip/power_domain.txt| 136 > 2 files changed, 291 insertions(+), 136 deletions(-) > create mode 100644 > Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > delete mode 100644 > Documentation/devicetree/bindings/soc/rockchip/power_domain.txt > > diff --git > a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > new file mode 100644 > index ..9fec9e227432 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml > @@ -0,0 +1,291 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause This is a conversion of an excising document. When distributing derived works, the source code of the work must be made available under the same license. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip Power Domains > + > +maintainers: > + - Elaine Zhang > + - Heiko Stuebner > + > +description: | > + Rockchip processors include support for multiple power domains which can be > + powered up/down by software based on different application scenarios to > save power. > + > + Power domains contained within power-controller node are generic power > domain > + providers documented in > Documentation/devicetree/bindings/power/power-domain.yaml. > + > + IP cores belonging to a power domain should contain a "power-domains" > + property that is a phandle for the power domain node representing the > domain. > + > +properties: > + $nodename: > +const: power-controller > + > + compatible: > +enum: > + - rockchip,px30-power-controller > + - rockchip,rk3036-power-controller > + - rockchip,rk3066-power-controller > + - rockchip,rk3128-power-controller > + - rockchip,rk3188-power-controller > + - rockchip,rk3228-power-controller > + - rockchip,rk3288-power-controller > + - rockchip,rk3328-power-controller > + - rockchip,rk3366-power-controller > + - rockchip,rk3368-power-controller > + - rockchip,rk3399-power-controller > + > + "#power-domain-cells": > +const: 1 > + > + "#address-cells": > +const: 1 > + > + "#size-cells": > +const: 0 > + > + clocks: true > + > + assigned-clocks: > +minItems: 1 > + > + assigned-clock-parents: > +minItems: 1 > + > +patternProperties: > + "^power-domain@[0-9a-f]+$": > +type: object > +description: | > + Represents the power domains within the power controller node as > documented > + in Documentation/devicetree/bindings/power/power-domain.yaml. > + > +properties: > + > + "#power-domain-cells": > +description: > + Must be 0 for nodes representing a single PM domain and 1 for nodes > + providing multiple PM domains. > + > + "#address-cells": > +const: 1 > + > + "#size-cells": > +const: 0 > + > + reg: > +maxItems: 1 > +description: | > + Power domain index. Valid values are defined in > + "include/dt-bindings/power/px30-power.h" > + "include/dt-bindings/power/rk3036-power.h" > + "include/dt-bindings/power/rk3066-power.h" > + "include/dt-bindings/power/rk3128-power.h" > + "include/dt-bindings/power/rk3188-power.h" > + "include/dt-bindings/power/rk3228-power.h" > + "include/dt-bindings/power/rk3288-power.h" > + "include/dt-bindings/power/rk3328-power.h" > + "include/dt-bindings/power/rk3366-power.h" > + "include/dt-bindings/power/rk3368-power.h" > + "include/dt-bindings/power/rk3399-power.h" > + > + clocks: > +description: | > + A number of phandles to clocks that need to be enabled while power > domain > +
Re: [PATCH v5 2/8] usb: dwc3: of-simple: bail probe if no dwc3 child node
On 3/24/21 5:41 PM, Heiko StĆ¼bner wrote: > Hi Greg, Felipe, > > Am Dienstag, 9. Februar 2021, 20:23:44 CET schrieb Johan Jonker: >> For some of the dwc3-of-simple compatible SoCs we >> don't want to bind this driver to a dwc3 node, >> but bind that node to the 'snps,dwc3' driver instead. >> The kernel has no logic to decide which driver to bind >> to if there are 2 matching drivers, so bail probe if no >> dwc3 child node. >> >> Signed-off-by: Johan Jonker > > It looks like this patch fell through the cracks? > > I.e. I can see patches 1+6 adding the devicetree bindings > in 5.12-rc but haven't found this patch there. > > And looking at > https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git/log/drivers/usb/dwc3/dwc3-of-simple.c?h=usb-next > I also didn't find it. > > From what I gathered that was somehow mandated from the Devicetree side > as the dwc3-subnode system merely is some Linux-specific thingy > and should not be enforced if not explicitly needed. > > I guess Johan can provide pointers to the previous discussion. Comment by Rob in version 3: Presumably you are getting lucky here (with link order). The kernel has no logic to decide which driver to bind to if there are 2 matching drivers. If we did, it would probably be the opposite of what you want here as we'd pick the most specific match. This driver should probably bail probe if no dwc3 child node. https://lore.kernel.org/linux-rockchip/20210205114011.10381-6-jbx6...@gmail.com/ https://lore.kernel.org/linux-rockchip/cal_jsqjwndufoym8szmogmg9iayzkj4-kzjjiddm_mdmght...@mail.gmail.com/ > > So could you look at applying this patch to some usb-tree? > > > Thanks > Heiko > > >> --- >> drivers/usb/dwc3/dwc3-of-simple.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/usb/dwc3/dwc3-of-simple.c >> b/drivers/usb/dwc3/dwc3-of-simple.c >> index e62ecd22b..347b4d384 100644 >> --- a/drivers/usb/dwc3/dwc3-of-simple.c >> +++ b/drivers/usb/dwc3/dwc3-of-simple.c >> @@ -38,6 +38,10 @@ static int dwc3_of_simple_probe(struct platform_device >> *pdev) >> >> int ret; >> >> +/* Bail probe if no dwc3 child node. */ >> +if (!of_get_compatible_child(dev->of_node, "snps,dwc3")) >> +return -ENODEV; >> + >> simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL); >> if (!simple) >> return -ENOMEM; >> > > > >
Re: [PATCH v4 2/4] dt-bindings: power: rockchip: Convert to json-schema
Hi all, Could Heiko and Rob advise if all these power-controller dtsi subnode names should be changed? Thanks! On 3/24/21 11:14 AM, elaine.zhang wrote: > Hi, Johan: > > åØ 2021/3/24 äøå5:17, Johan Jonker åé: >> Hi Elaine, >> >> >From Rob's build log it turns out that 2 more properties must be added. >> Add these new properties in separate patch. >> Retest with commands below. >> >> See rk3288.dtsi >> >> Ā Ā Ā assigned-clocks = <&cru SCLK_EDP_24M>; >> Ā Ā Ā assigned-clock-parents = <&xin24m>; > This should not be in the power node. > It should be on the CRU node, or on the EDP's own node. > I could have added it just to solve dtbs_check . If this should not be in the power node then could you add a patch before the YAML conversion? example: - ARM: dts: Move assigned-clocks in rk3288.dtsi - dt-bindings: power: rockchip: Convert to json-schema - dt-bindings: power: rockchip: Add bindings for RK3568 Soc - soc: rockchip: power-domain: add rk3568 powerdomains When that regex must be changed then also change all dtsi files ;) - ARM: dts: rk3288: change power-controller sub nodenames. - etc... >> >> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210324071609.7531-3-zhangq...@rock-chips.com/ >> >> >> make ARCH=arm dtbs_check >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >> >> >> make ARCH=arm64 dtbs_check >> DT_SCHEMA_FILES=Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >> >> >> On 3/24/21 8:16 AM, Elaine Zhang wrote: >>> Convert the soc/rockchip/power_domain.txt binding document to >>> json-schema and move to the power bindings directory. >>> >>> Signed-off-by: Enric Balletbo i Serra >>> Signed-off-by: Elaine Zhang >>> --- >>> Ā .../power/rockchip,power-controller.yamlĀ | 284 ++ >>> Ā .../bindings/soc/rockchip/power_domain.txtĀ Ā Ā | 136 - >>> Ā 2 files changed, 284 insertions(+), 136 deletions(-) >>> Ā create mode 100644 >>> Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >>> Ā delete mode 100644 >>> Documentation/devicetree/bindings/soc/rockchip/power_domain.txt >>> >>> diff --git >>> a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >>> b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >>> new file mode 100644 >>> index ..a220322c5139 >>> --- /dev/null >>> +++ >>> b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml >>> @@ -0,0 +1,284 @@ >>> +# SPDX-License-Identifier: GPL-2.0-only >>> +%YAML 1.2 >>> +--- >>> +$id: >>> http://devicetree.org/schemas/power/rockchip,power-controller.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Rockchip Power Domains >>> + >>> +maintainers: >>> +Ā - Elaine Zhang >>> +Ā - Rob Herring >>> +Ā - Heiko Stuebner >>> + >>> +description: | >>> +Ā Rockchip processors include support for multiple power domains >>> which can be >>> +Ā powered up/down by software based on different application >>> scenarios to save power. >>> + >>> +Ā Power domains contained within power-controller node are generic >>> power domain >>> +Ā providers documented in >>> Documentation/devicetree/bindings/power/power-domain.yaml. >>> + >>> +Ā IP cores belonging to a power domain should contain a "power-domains" >>> +Ā property that is a phandle for the power domain node representing >>> the domain. >>> + >>> +properties: >>> +Ā $nodename: >>> +Ā Ā Ā const: power-controller >>> + >>> +Ā compatible: >>> +Ā Ā Ā enum: >>> +Ā - rockchip,px30-power-controller >>> +Ā - rockchip,rk3036-power-controller >>> +Ā - rockchip,rk3066-power-controller >>> +Ā - rockchip,rk3128-power-controller >>> +Ā - rockchip,rk3188-power-controller >>> +Ā - rockchip,rk3228-power-controller >>> +Ā - rockchip,rk3288-power-controller >>> +Ā - rockchip,rk3328-power-controller >>> +Ā - rockchip,rk3366-power-controller >>> +Ā - rockchip,rk3368-power-controller >>> +Ā - rockchip,rk3399-power-controller >>> + >>> +Ā "#power-domain-cells": >>> +Ā Ā Ā const: 1 >>> + >
Re: [PATCH v4 2/4] dt-bindings: power: rockchip: Convert to json-schema
Hi Elaine,
>From Rob's build log it turns out that 2 more properties must be added.
Add these new properties in separate patch.
Retest with commands below.
See rk3288.dtsi
assigned-clocks = <&cru SCLK_EDP_24M>;
assigned-clock-parents = <&xin24m>;
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20210324071609.7531-3-zhangq...@rock-chips.com/
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
On 3/24/21 8:16 AM, Elaine Zhang wrote:
> Convert the soc/rockchip/power_domain.txt binding document to
> json-schema and move to the power bindings directory.
>
> Signed-off-by: Enric Balletbo i Serra
> Signed-off-by: Elaine Zhang
> ---
> .../power/rockchip,power-controller.yaml | 284 ++
> .../bindings/soc/rockchip/power_domain.txt| 136 -
> 2 files changed, 284 insertions(+), 136 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> delete mode 100644
> Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>
> diff --git
> a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> new file mode 100644
> index ..a220322c5139
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> @@ -0,0 +1,284 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip Power Domains
> +
> +maintainers:
> + - Elaine Zhang
> + - Rob Herring
> + - Heiko Stuebner
> +
> +description: |
> + Rockchip processors include support for multiple power domains which can be
> + powered up/down by software based on different application scenarios to
> save power.
> +
> + Power domains contained within power-controller node are generic power
> domain
> + providers documented in
> Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> + IP cores belonging to a power domain should contain a "power-domains"
> + property that is a phandle for the power domain node representing the
> domain.
> +
> +properties:
> + $nodename:
> +const: power-controller
> +
> + compatible:
> +enum:
> + - rockchip,px30-power-controller
> + - rockchip,rk3036-power-controller
> + - rockchip,rk3066-power-controller
> + - rockchip,rk3128-power-controller
> + - rockchip,rk3188-power-controller
> + - rockchip,rk3228-power-controller
> + - rockchip,rk3288-power-controller
> + - rockchip,rk3328-power-controller
> + - rockchip,rk3366-power-controller
> + - rockchip,rk3368-power-controller
> + - rockchip,rk3399-power-controller
> +
> + "#power-domain-cells":
> +const: 1
> +
> + "#address-cells":
> +const: 1
> +
> + "#size-cells":
> +const: 0
assigned-clocks:
maxItems: 1
assigned-clock-parents:
maxItems: 1
> +
> +patternProperties:
> + "^pd_[0-9a-z_]{2,10}@[0-9a-f]+$":
> +type: object
> +description: |
> + Represents the power domains within the power controller node as
> documented
> + in Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> +properties:
> +
> + "#power-domain-cells":
> +description:
> + Must be 0 for nodes representing a single PM domain and 1 for nodes
> + providing multiple PM domains.
> +
> + "#address-cells":
> +const: 1
> +
> + "#size-cells":
> +const: 0
> +
> + reg:
> +maxItems: 1
> +description: |
> + Power domain index. Valid values are defined in
> + "include/dt-bindings/power/px30-power.h"
> + "include/dt-bindings/power/rk3036-power.h"
> + "include/dt-bindings/power/rk3066-power.h"
> + "include/dt-bindings/power/rk3128-power.h"
> + "include/dt-bindings/power/rk3188-power.h"
> + "include/dt-bindings/power/rk3228-power.h"
> + "include/dt-bindings/power/rk3288-power.h"
> + "include/dt-bindings/power/rk3328-power.h"
> + "include/dt-bindings/power/rk3366-power.h"
> + "include/dt-bindings/power/rk3368-power.h"
> + "include/dt-bindings/power/rk3399-power.h"
> +
> + clocks:
> +description: |
> + A number of phandles to clocks that need to be enabled while power
> domain
> + switches state.
> +
> + pm_qos:
> +description: |
> + A number of phandles to qos blocks which need to be saved and
> restored
> + while power domain switches state.
> +
> +patternProperties:
> + "^pd_[0-9a-z_]{2,10}@[0-9a-f]+$":
> +
Re: [PATCH v3 2/3] dt-bindings: power: rockchip: Convert to json-schema and extend
On 3/24/21 4:23 AM, Elaine Zhang wrote:
> Convert the soc/rockchip/power_domain.txt binding document to
> json-schema and move to the power bindings directory.
> Add RK3568 SoCs for rockchip power binding document.
>
> Signed-off-by: Enric Balletbo i Serra
> Signed-off-by: Elaine Zhang
> ---
> .../power/rockchip,power-controller.yaml | 286 ++
> .../bindings/soc/rockchip/power_domain.txt| 136 -
> 2 files changed, 286 insertions(+), 136 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> delete mode 100644
> Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
>
> diff --git
> a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> new file mode 100644
> index ..0d6b8962d098
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml
> @@ -0,0 +1,286 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip Power Domains
> +
> +maintainers:
> + - Elaine Zhang
> + - Rob Herring
> + - Heiko Stuebner
> +
> +description: |
> + Rockchip processors include support for multiple power domains which can be
> + powered up/down by software based on different application scenes to save
> power.
scenes > scenarios ??
This is not a theater.
=
Scenes:
1. Something seen by a viewer; a view or prospect.
2. The place where an action or event occurs: the scene of the crime.
=
Scenarios:
1. An expected or supposed situation or sequence of events
> +
> + Power domains contained within power-controller node are generic power
> domain
> + providers documented in
> Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> + IP cores belonging to a power domain should contain a 'power-domains'
> + property that is a phandle for the power domain node representing the
> domain.
> +
> +properties:
> + $nodename:
> +const: power-controller
> +
> + compatible:
> +enum:
> + - rockchip,px30-power-controller
> + - rockchip,rk3036-power-controller
> + - rockchip,rk3066-power-controller
> + - rockchip,rk3128-power-controller
> + - rockchip,rk3188-power-controller
> + - rockchip,rk3228-power-controller
> + - rockchip,rk3288-power-controller
> + - rockchip,rk3328-power-controller
> + - rockchip,rk3366-power-controller
> + - rockchip,rk3368-power-controller
> + - rockchip,rk3399-power-controller
> + - rockchip,rk3568-power-controller
Use separate patches for a YAML conversion and adding new compatibility
strings. One action per patch.
> +
> + '#power-domain-cells':
> +const: 1
> +
> + '#address-cells':
> +const: 1
> +
> + '#size-cells':
> +const: 0
> +
> +patternProperties:
> + "^pd_[0-9a-z_]{2,10}@[0-9a-f]+$":
Here you are using "", but elsewhere in this document '' is used.
Change all to "".
> +type: object
> +description: |
> + Represents the power domains within the power controller node as
> documented
> + in Documentation/devicetree/bindings/power/power-domain.yaml.
> +
> +properties:
> +
> + '#power-domain-cells':
> +description:
> + Must be 0 for nodes representing a single PM domain and 1 for nodes
> + providing multiple PM domains.
> +
> + '#address-cells':
> +const: 1
> +
> + '#size-cells':
> +const: 0
> +
> + reg:
> +maxItems: 1
> +description: |
> + Power domain index. Valid values are defined in:
remove ":"
> + "include/dt-bindings/power/px30-power.h"
> + "include/dt-bindings/power/rk3036-power.h"
> + "include/dt-bindings/power/rk3066-power.h"
> + "include/dt-bindings/power/rk3128-power.h"
> + "include/dt-bindings/power/rk3188-power.h"
> + "include/dt-bindings/power/rk3228-power.h"
> + "include/dt-bindings/power/rk3288-power.h"
> + "include/dt-bindings/power/rk3328-power.h"
> + "include/dt-bindings/power/rk3366-power.h"
> + "include/dt-bindings/power/rk3368-power.h"
> + "include/dt-bindings/power/rk3399-power.h"
> + "include/dt-bindings/power/rk3399-power.h"
rk3399 > rk3568
"include/dt-bindings/power/rk3568-power.h"
Use separate patches for a YAML conversion and adding new compatibility
strings. One action per patch.
> +
> + clocks:
> +description: |
> + A number of phandles to clocks that need to be enabled while power
> domain
> + switches state.
> +
> + pm_qos:
> +description: |
> + A number of phandles to qos blocks which need to be saved and
> restored
> + while power domain switches state.
> +
>
Re: [PATCH v2 2/3] dt-bindings: Convert the rockchip power_domain to YAML and extend
Hi Elaine,
Some comments. Have a look if it's useful or that you disagree
with...(part 1)
==
There is currently already a patch proposal that does the same.
Could you read that review history and port the good things to your own
patch serie?
Re: [PATCH] dt-bindings: power: rockchip: Convert to json-schema
https://lore.kernel.org/linux-rockchip/20201007151159.GA221754@bogus/
Re: [PATCH v3] dt-bindings: power: rockchip: Convert to json-schema
https://lore.kernel.org/linux-rockchip/20201007151159.GA221754@bogus/
==
The kernel scripts checks expects that patches still have approx. 79-80
characters per line. Please keep the YAML descriptions max length < 80
and restyle.
On 3/23/21 9:24 AM, Elaine Zhang wrote:
> This converts the rockchip power domain family bindings to YAML schema,
> and add binding documentation for the power domains found on Rockchip
> RK3568 SoCs.
>
> Signed-off-by: Elaine Zhang
> ---
> .../bindings/soc/rockchip/power_domain.txt| 136 -
> .../rockchip/rockchip,power-controller.yaml | 259 ++
> 2 files changed, 259 insertions(+), 136 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> create mode 100644
> Documentation/devicetree/bindings/soc/rockchip/rockchip,power-controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> deleted file mode 100644
> index 8304eceb62e4..
> --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> +++ /dev/null
> @@ -1,136 +0,0 @@
> -* Rockchip Power Domains
> -
> -Rockchip processors include support for multiple power domains which can be
> -powered up/down by software based on different application scenes to save
> power.
> -
> -Required properties for power domain controller:
> -- compatible: Should be one of the following.
> - "rockchip,px30-power-controller" - for PX30 SoCs.
> - "rockchip,rk3036-power-controller" - for RK3036 SoCs.
> - "rockchip,rk3066-power-controller" - for RK3066 SoCs.
> - "rockchip,rk3128-power-controller" - for RK3128 SoCs.
> - "rockchip,rk3188-power-controller" - for RK3188 SoCs.
> - "rockchip,rk3228-power-controller" - for RK3228 SoCs.
> - "rockchip,rk3288-power-controller" - for RK3288 SoCs.
> - "rockchip,rk3328-power-controller" - for RK3328 SoCs.
> - "rockchip,rk3366-power-controller" - for RK3366 SoCs.
> - "rockchip,rk3368-power-controller" - for RK3368 SoCs.
> - "rockchip,rk3399-power-controller" - for RK3399 SoCs.
> -- #power-domain-cells: Number of cells in a power-domain specifier.
> - Should be 1 for multiple PM domains.
> -- #address-cells: Should be 1.
> -- #size-cells: Should be 0.
> -
> -Required properties for power domain sub nodes:
> -- reg: index of the power domain, should use macros in:
> - "include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
> - "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power
> domain.
> - "include/dt-bindings/power/rk3066-power.h" - for RK3066 type power
> domain.
> - "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power
> domain.
> - "include/dt-bindings/power/rk3188-power.h" - for RK3188 type power
> domain.
> - "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power
> domain.
> - "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power
> domain.
> - "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power
> domain.
> - "include/dt-bindings/power/rk3366-power.h" - for RK3366 type power
> domain.
> - "include/dt-bindings/power/rk3368-power.h" - for RK3368 type power
> domain.
> - "include/dt-bindings/power/rk3399-power.h" - for RK3399 type power
> domain.
> -- clocks (optional): phandles to clocks which need to be enabled while power
> domain
> - switches state.
> -- pm_qos (optional): phandles to qos blocks which need to be saved and
> restored
> - while power domain switches state.
> -
> -Qos Example:
> -
> - qos_gpu: qos_gpu@ffaf {
> - compatible ="syscon";
> - reg = <0x0 0xffaf 0x0 0x20>;
> - };
> -
> -Example:
> -
> - power: power-controller {
> - compatible = "rockchip,rk3288-power-controller";
> - #power-domain-cells = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pd_gpu {
> - reg = ;
> - clocks = <&cru ACLK_GPU>;
> - pm_qos = <&qos_gpu>;
> - };
> - };
> -
> - power: power-controller {
> -compatible = "rockchip,rk3368-power-controller";
> -#power-domain-cells = <1>;
> -#address-cells = <1>;
> -#size-cells = <0>;
> -
> -pd_gpu_1 {
> -reg = ;
> -
Re: [PATCH v1 2/3] dt-bindings: Convert the rockchip power_domain to YAML and extend
Hi Elaine,
Some comments. Have a look if it's useful or that you disagree with...
On 3/17/21 3:51 AM, Elaine Zhang wrote:
> This converts the rockchip power domain family bindings to YAML schema,
> and add binding documentation for the power domains found on Rockchip
> RK3568 SoCs.
>
> Signed-off-by: Elaine Zhang
> ---
> .../bindings/soc/rockchip/power_domain.txt| 136
> .../rockchip/rockchip,power-controller.yaml | 196 ++
> 2 files changed, 196 insertions(+), 136 deletions(-)
> delete mode 100644
Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> create mode 100644
Documentation/devicetree/bindings/soc/rockchip/rockchip,power-controller.yaml
>
> diff --git
a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> deleted file mode 100644
> index 8304eceb62e4..
> --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt
> +++ /dev/null
> @@ -1,136 +0,0 @@
> -* Rockchip Power Domains
> -
> -Rockchip processors include support for multiple power domains which
can be
> -powered up/down by software based on different application scenes to
save power.
> -
> -Required properties for power domain controller:
> -- compatible: Should be one of the following.
> - "rockchip,px30-power-controller" - for PX30 SoCs.
> - "rockchip,rk3036-power-controller" - for RK3036 SoCs.
> - "rockchip,rk3066-power-controller" - for RK3066 SoCs.
> - "rockchip,rk3128-power-controller" - for RK3128 SoCs.
> - "rockchip,rk3188-power-controller" - for RK3188 SoCs.
> - "rockchip,rk3228-power-controller" - for RK3228 SoCs.
> - "rockchip,rk3288-power-controller" - for RK3288 SoCs.
> - "rockchip,rk3328-power-controller" - for RK3328 SoCs.
> - "rockchip,rk3366-power-controller" - for RK3366 SoCs.
> - "rockchip,rk3368-power-controller" - for RK3368 SoCs.
> - "rockchip,rk3399-power-controller" - for RK3399 SoCs.
> -- #power-domain-cells: Number of cells in a power-domain specifier.
> - Should be 1 for multiple PM domains.
> -- #address-cells: Should be 1.
> -- #size-cells: Should be 0.
> -
> -Required properties for power domain sub nodes:
> -- reg: index of the power domain, should use macros in:
> - "include/dt-bindings/power/px30-power.h" - for PX30 type power domain.
> - "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power
domain.
> - "include/dt-bindings/power/rk3066-power.h" - for RK3066 type power
domain.
> - "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power
domain.
> - "include/dt-bindings/power/rk3188-power.h" - for RK3188 type power
domain.
> - "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power
domain.
> - "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power
domain.
> - "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power
domain.
> - "include/dt-bindings/power/rk3366-power.h" - for RK3366 type power
domain.
> - "include/dt-bindings/power/rk3368-power.h" - for RK3368 type power
domain.
> - "include/dt-bindings/power/rk3399-power.h" - for RK3399 type power
domain.
> -- clocks (optional): phandles to clocks which need to be enabled
while power domain
> - switches state.
> -- pm_qos (optional): phandles to qos blocks which need to be saved
and restored
> - while power domain switches state.
> -
> -Qos Example:
> -
> - qos_gpu: qos_gpu@ffaf {
> - compatible ="syscon";
> - reg = <0x0 0xffaf 0x0 0x20>;
> - };
> -
> -Example:
> -
> - power: power-controller {
> - compatible = "rockchip,rk3288-power-controller";
> - #power-domain-cells = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pd_gpu {
> - reg = ;
> - clocks = <&cru ACLK_GPU>;
> - pm_qos = <&qos_gpu>;
> - };
> - };
> -
> - power: power-controller {
> -compatible = "rockchip,rk3368-power-controller";
> -#power-domain-cells = <1>;
> -#address-cells = <1>;
> -#size-cells = <0>;
> -
> -pd_gpu_1 {
> -reg = ;
> -clocks = <&cru ACLK_GPU_CFG>;
> -};
> -};
> -
> -Example 2:
> - power: power-controller {
> - compatible = "rockchip,rk3399-power-controller";
> - #power-domain-cells = <1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - pd_vio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - reg = ;
> -
> - pd_vo {
> - #address-cells = <1>;
> -
Re: [PATCH v6 2/5] drm: rockchip: add sound support to rk3066 hdmi driver
ping
On 12/6/20 2:33 PM, Johan Jonker wrote:
> From: Zheng Yang
>
> Add sound support to the rk3066 HDMI driver.
>
> The I2S input of the HDMI TX allows transmission of
> DVD-Audio and decoded Dolby Digital
> to A/V Receivers and high-end displays.
> The interface supports 2 to 8 channels audio up to 192 kHz.
> The HDMI TX supports variable word length of
> 16bits to 32bits for I2S audio inputs.(This driver 24bit max)
> There are three I2S input modes supported.(This driver HDMI_I2S only)
> On RK3066/PX2 the HDMI TX audio source is connected to I2S_8CH.
>
> Signed-off-by: Zheng Yang
> Signed-off-by: Johan Jonker
> ---
> drivers/gpu/drm/rockchip/Kconfig | 2 +
> drivers/gpu/drm/rockchip/rk3066_hdmi.c | 277
> -
> 2 files changed, 278 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/Kconfig
> b/drivers/gpu/drm/rockchip/Kconfig
> index 310aa1546..4c20445dc 100644
> --- a/drivers/gpu/drm/rockchip/Kconfig
> +++ b/drivers/gpu/drm/rockchip/Kconfig
> @@ -11,6 +11,8 @@ config DRM_ROCKCHIP
> select DRM_DW_MIPI_DSI if ROCKCHIP_DW_MIPI_DSI
> select DRM_RGB if ROCKCHIP_RGB
> select SND_SOC_HDMI_CODEC if ROCKCHIP_CDN_DP && SND_SOC
> + select SND_SOC_HDMI_CODEC if ROCKCHIP_RK3066_HDMI && SND_SOC
> + select SND_SOC_ROCKCHIP_I2S if ROCKCHIP_RK3066_HDMI && SND_SOC
> help
> Choose this option if you have a Rockchip soc chipset.
> This driver provides kernel mode setting and buffer
> diff --git a/drivers/gpu/drm/rockchip/rk3066_hdmi.c
> b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
> index 1c546c3a8..2f8654023 100644
> --- a/drivers/gpu/drm/rockchip/rk3066_hdmi.c
> +++ b/drivers/gpu/drm/rockchip/rk3066_hdmi.c
> @@ -13,6 +13,8 @@
> #include
> #include
>
> +#include
> +
> #include "rk3066_hdmi.h"
>
> #include "rockchip_drm_drv.h"
> @@ -20,9 +22,16 @@
>
> #define DEFAULT_PLLA_RATE 3000
>
> +struct audio_info {
> + int channels;
> + int sample_rate;
> + int sample_width;
> +};
> +
> struct hdmi_data_info {
> int vic; /* The CEA Video ID (VIC) of the current drm display mode. */
> bool sink_is_hdmi;
> + bool sink_has_audio;
> unsigned int enc_out_format;
> unsigned int colorimetry;
> };
> @@ -54,12 +63,19 @@ struct rk3066_hdmi {
>
> unsigned int tmdsclk;
>
> + struct platform_device *audio_pdev;
> + struct audio_info audio;
> + bool audio_enable;
> +
> struct hdmi_data_info hdmi_data;
> struct drm_display_mode previous_mode;
> };
>
> #define to_rk3066_hdmi(x) container_of(x, struct rk3066_hdmi, x)
>
> +static int
> +rk3066_hdmi_config_audio(struct rk3066_hdmi *hdmi, struct audio_info *audio);
> +
> static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
> {
> return readl_relaxed(hdmi->regs + offset);
> @@ -205,6 +221,23 @@ static int rk3066_hdmi_config_avi(struct rk3066_hdmi
> *hdmi,
> HDMI_INFOFRAME_AVI, 0, 0, 0);
> }
>
> +static int rk3066_hdmi_config_aai(struct rk3066_hdmi *hdmi,
> + struct audio_info *audio)
> +{
> + union hdmi_infoframe frame;
> + int rc;
> +
> + rc = hdmi_audio_infoframe_init(&frame.audio);
> +
> + frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
> + frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
> + frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
> + frame.audio.channels = hdmi->audio.channels;
> +
> + return rk3066_hdmi_upload_frame(hdmi, rc, &frame,
> + HDMI_INFOFRAME_AAI, 0, 0, 0);
> +}
> +
> static int rk3066_hdmi_config_video_timing(struct rk3066_hdmi *hdmi,
> struct drm_display_mode *mode)
> {
> @@ -353,6 +386,7 @@ static int rk3066_hdmi_setup(struct rk3066_hdmi *hdmi,
> hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK,
> HDMI_VIDEO_MODE_HDMI);
> rk3066_hdmi_config_avi(hdmi, mode);
> + rk3066_hdmi_config_audio(hdmi, &hdmi->audio);
> } else {
> hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK, 0);
> }
> @@ -369,9 +403,20 @@ static int rk3066_hdmi_setup(struct rk3066_hdmi *hdmi,
>*/
> rk3066_hdmi_i2c_init(hdmi);
>
> - /* Unmute video output. */
> + /* Unmute video and audio output. */
> hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
> HDMI_VIDEO_AUD
Re: [RESEND PATCH v5 2/4] arm64: dts: rk3399: Add dfi and dmc nodes.
Hi Daniel,
Some comments. Have a look if it's useful or that you disagree with.
New nodes should be verifiable if possible.
Especially with so many properties.
Could you convert rockchip-dfi.txt and rk3399_dmc.txt to yaml instead of
changing old txt documents?
Add rockchip-dfi.yaml and rk3399_dmc.yaml before this patch in version 6.
Nodes and properties have a sort order. Please fix.
Some goes for [RESEND PATCH v5 3/4].
(This is a generic dtsi. How about cooling and dmc ??)
Heiko rules:
compatible
reg
interrupts
[alphabetical]
status [if needed]
My incomplete list:
For nodes:
If exists on top: model, compatible and chosen.
Sort things without reg alphabetical first,
then sort the rest by reg address.
Inside nodes:
If exists on top: compatible, reg and interrupts.
In alphabetical order the required properties.
Then in alphabetical order the other properties.
And as last things that start with '#' in alphabetical order.
Add status below all other properties for soc internal components with
any board-specifics.
Keep an empty line between properties and nodes.
Exceptions:
Sort pinctrl-0 above pinctrl-names, so it stays in line with clock-names
and dma-names.
Sort simple-audio-card,name above other simple-audio-card properties.
Sort regulator-name above other regulator properties.
Sort regulator-min-microvolt above regulator-max-microvolt.
On 3/9/21 12:38 AM, Daniel Lezcano wrote:
> From: Lin Huang
>
> These are required to support DDR DVFS on rk3399 platform.
>
> Signed-off-by: Lin Huang
> Signed-off-by: Enric Balletbo i Serra
> Signed-off-by: Gaƫl PORTAY
> Signed-off-by: Daniel Lezcano
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 19 +++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index edbbf35fe19e..6f23d99236fe 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1937,6 +1937,25 @@
> status = "disabled";
> };
>
> + dfi: dfi@ff63 {
> + reg = <0x00 0xff63 0x00 0x4000>;
> + compatible = "rockchip,rk3399-dfi";
> + rockchip,pmu = <&pmugrf>;
> + interrupts = ;
> + clocks = <&cru PCLK_DDR_MON>;
> + clock-names = "pclk_ddr_mon";
> + status = "disabled";
> + };
> +
> + dmc: dmc {
> + compatible = "rockchip,rk3399-dmc";
> + rockchip,pmu = <&pmugrf>;
> + devfreq-events = <&dfi>;
> + clocks = <&cru SCLK_DDRC>;
> + clock-names = "dmc_clk";
> + status = "disabled";
> + };
> +
> pinctrl: pinctrl {
> compatible = "rockchip,rk3399-pinctrl";
> rockchip,grf = <&grf>;
>
Re: [PATCH v2 1/4] dt-binding: clock: Document rockchip, rk3568-cru bindings
Hi Elaine,
On 2/26/21 9:22 AM, Elaine Zhang wrote:
> Document the device tree bindings of the rockchip Rk3568 SoC
> clock driver in
> Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml.
>
> Signed-off-by: Elaine Zhang
> ---
> .../bindings/clock/rockchip,rk3568-cru.yaml | 55 +++
> 1 file changed, 55 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
> b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
> new file mode 100644
> index ..612da341ea67
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: GPL-2.0
This is a new document.
Use GPL-2.0 only for a conversion of an existing document in the main
kernel.
./scripts/checkpatch.pl --strict
0001-dt-binding-clock-Document-rockchip-rk3568-cru-bindin.patch
WARNING: DT binding documents should be licensed (GPL-2.0-only OR
BSD-2-Clause)
#21: FILE:
Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml:1:
+# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ROCKCHIP rk3568 Family Clock Control Module Binding
> +
> +maintainers:
> + - Elaine Zhang
- Heiko Stuebner
Add the maintainer of the clock drivers as well.
> +
> +description: |
> + The RK3568 clock controller generates and supplies clock to various
supplies clock
This phrase could be improved a bit.
(?? generates the clocks signals for ??)
> + controllers within the SoC and also implements a reset controller for SoC
> + peripherals.
> +
> +properties:
> + compatible:
> +enum:
> + - rockchip,rk3568-cru
> + - rockchip,rk3568-pmucru
> +
> + reg:
> +maxItems: 1
> +
> + '#clock-cells':
> +const: 1
> +
> + '#reset-cells':
> +const: 1
> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> + - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + # Clock Control Module node:
> + - |
> +pmucru: clock-controller@fdd0 {
> + compatible = "rockchip,rk3568-pmucru";
> + reg = <0x0 0xfdd0 0x0 0x1000>;
Method 1 (easier):
reg = <0xfdd0 0x1000>;
This example is 64 bit.
The dt_binding_check uses standard 32 bit.
Method 2:
Add both examples in a subnode.
example {
#address-cells = <2>;
#size-cells = <2>;
pmucru {}
cru {}
}
make ARCH=arm64 dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml
/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.example.dt.yaml:
example-1: clock-controller@fdd2:reg:0: [0, 4258398208, 0, 4096] is
too long
From schema:
~/.local/lib/python3.5/site-packages/dtschema/schemas/reg.yaml
/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.example.dt.yaml:
example-0: clock-controller@fdd0:reg:0: [0, 4258267136, 0, 4096] is
too long
From schema:
~/.local/lib/python3.5/site-packages/dtschema/schemas/reg.yaml
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> +};
> + - |
> +cru: clock-controller@fdd2 {
> + compatible = "rockchip,rk3568-cru";
> + reg = <0x0 0xfdd2 0x0 0x1000>;
dito
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> +};
>
Re: [PATCH v1 1/4] dt-bindings: add bindings for rk3568 clock controller
Hi Elaine,
This is a new document.
Could you convert rockchip,rk3568-cru.txt to yaml?
To get an acked-by you must include:
robh...@kernel.org
devicet...@vger.kernel.org
./scripts/get_maintainer.pl --noroles --norolestats --nogit-fallback
--nogit
Your patch should show up here after filtering:
https://patchwork.ozlabs.org/project/devicetree-bindings/list/
Check with:
make ARCH=arm64 dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pinctrl/rockchip,rk3568-cru.yaml
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pinctrl/rockchip,rk3568-cru.yaml
./scripts/checkpatch.pl --strict
On 2/23/21 10:53 AM, Elaine Zhang wrote:
> Add devicetree bindings for Rockchip cru which found on
> Rockchip SoCs.
>
> Signed-off-by: Elaine Zhang
> ---
> .../bindings/clock/rockchip,rk3568-cru.txt| 66 +++
> 1 file changed, 66 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.txt
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.txt
> b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.txt
> new file mode 100644
> index ..b1119aecb7c7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.txt
> @@ -0,0 +1,66 @@
> +* Rockchip RK3568 Clock and Reset Unit
> +
> +The RK3568 clock controller generates and supplies clock to various
> +controllers within the SoC and also implements a reset controller for SoC
> +peripherals.
> +
> +Required Properties:
> +
> +- compatible: PMU for CRU should be "rockchip,rk3568-pmucru"
> +- compatible: CRU should be "rockchip,rk3568-cru"
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +- #clock-cells: should be 1.
> +- #reset-cells: should be 1.
> +
> +Optional Properties:
> +
> +- rockchip,grf: phandle to the syscon managing the "general register files"
> + If missing, pll rates are not changeable, due to the missing pll lock
> status.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. All available clocks are defined as
> +preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be
> +used in device tree sources. Similar macros exist for the reset sources in
> +these files.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:
> + - "xin24m" - crystal input - required,
> + - "xin32k" - rtc clock - optional,
> + - "i2sx_mclkin" - external I2S clock - optional,
> + - "xin_osc0_usbphyx_g" - external USBPHY clock - optional,
> + - "xin_osc0_mipidsiphyx_g" - external MIPIDSIPHY clock - optional,
> +
> +Example: Clock controller node:
> +
> + pmucru: clock-controller@fdd0 {
> + compatible = "rockchip,rK3568-pmucru";
> + reg = <0x0 0xfdd0 0x0 0x1000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> + cru: clock-controller@fdd2 {
> + compatible = "rockchip,rK3568-cru";
> + reg = <0x0 0xfdd2 0x0 0x1000>;
> + rockchip,grf = <&grf>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the clock
> + controller:
> +
> + uart1: serial@fe65 {
> + compatible = "rockchip,rK3568-uart", "snps,dw-apb-uart";
> + reg = <0x0 0xfe65 0x0 0x100>;
> + interrupts = ;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
> + clock-names = "baudclk", "apb_pclk";
> + };
>
[PATCH v5 1/8] dt-bindings: usb: convert rockchip,dwc3.txt to yaml
In the past Rockchip dwc3 usb nodes were manually checked.
With the conversion of snps,dwc3.yaml as common document
we now can convert rockchip,dwc3.txt to yaml as well.
Remove node wrapper.
Added properties for rk3399 are:
power-domains
resets
reset-names
Signed-off-by: Johan Jonker
---
Changed V5:
add select
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
Changed V2:
remove node wrapper
---
.../devicetree/bindings/usb/rockchip,dwc3.txt | 56 ---
.../devicetree/bindings/usb/rockchip,dwc3.yaml | 104 +
2 files changed, 104 insertions(+), 56 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
b/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
deleted file mode 100644
index 945204932..0
--- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.txt
+++ /dev/null
@@ -1,56 +0,0 @@
-Rockchip SuperSpeed DWC3 USB SoC controller
-
-Required properties:
-- compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC
-- clocks: A list of phandle + clock-specifier pairs for the
- clocks listed in clock-names
-- clock-names: Should contain the following:
- "ref_clk"Controller reference clk, have to be 24 MHz
- "suspend_clk"Controller suspend clk, have to be 24 MHz or 32 KHz
- "bus_clk"Master/Core clock, have to be >= 62.5 MHz for SS
- operation and >= 30MHz for HS operation
- "grf_clk"Controller grf clk
-
-Required child node:
-A child node must exist to represent the core DWC3 IP block. The name of
-the node is not important. The content of the node is defined in dwc3.txt.
-
-Phy documentation is provided in the following places:
-Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY
-Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY
-
-Example device nodes:
-
- usbdrd3_0: usb@fe80 {
- compatible = "rockchip,rk3399-dwc3";
- clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>,
-<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "grf_clk";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- usbdrd_dwc3_0: dwc3@fe80 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe80 0x0 0x10>;
- interrupts = ;
- dr_mode = "otg";
- };
- };
-
- usbdrd3_1: usb@fe90 {
- compatible = "rockchip,rk3399-dwc3";
- clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>,
-<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>;
- clock-names = "ref_clk", "suspend_clk",
- "bus_clk", "grf_clk";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- usbdrd_dwc3_1: dwc3@fe90 {
- compatible = "snps,dwc3";
- reg = <0x0 0xfe90 0x0 0x10>;
- interrupts = ;
- dr_mode = "otg";
- };
- };
diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
new file mode 100644
index 0..9908270a9
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip SuperSpeed DWC3 USB SoC controller
+
+maintainers:
+ - Heiko Stuebner
+
+description:
+ The common content of the node is defined in snps,dwc3.yaml.
+
+ Phy documentation is provided in the following places.
+
+ USB2.0 PHY
+ Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+
+ Type-C PHY
+ Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
+
+allOf:
+ - $ref: snps,dwc3.yaml#
+
+select:
+ properties:
+compatible:
+ contains:
+enum:
+ - rockchip,rk3399-dwc3
+ required:
+- compatible
+
+properties:
+ compatible:
+items:
+ - enum:
+ - rockchip,rk3399-dwc3
+ - const: snps,dwc3
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
[PATCH v5 3/8] arm64: dts: rockchip: optimize clks for rk3399 dwc3
From: Wu Liang feng Remove unnecessary clocks, refer to rk3399 TRM, aclk_usb3 is the parent of aclk_usb3otg0/1 and aclk_usb3_grf, and we will enable aclk_usb3otg0/1 and aclk_usb3_grf, so don't need to enable aclk_usb3 again. In addition, the aclk_usb3_rksoc_axi_perf clk is used for usb3 performance monitor module which we don't use now, so don't need to enable it. Signed-off-by: Wu Liang feng Signed-off-by: Johan Jonker --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 04f7cc5c3..b125cac89 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -399,11 +399,9 @@ #size-cells = <2>; ranges; clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, -<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, -<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; +<&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; + "bus_clk", "grf_clk"; resets = <&cru SRST_A_USB3_OTG0>; reset-names = "usb3-otg"; status = "disabled"; @@ -435,11 +433,9 @@ #size-cells = <2>; ranges; clocks = <&cru SCLK_USB3OTG1_REF>, <&cru SCLK_USB3OTG1_SUSPEND>, -<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, -<&cru ACLK_USB3>, <&cru ACLK_USB3_GRF>; +<&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", - "bus_clk", "aclk_usb3_rksoc_axi_perf", - "aclk_usb3", "grf_clk"; + "bus_clk", "grf_clk"; resets = <&cru SRST_A_USB3_OTG1>; reset-names = "usb3-otg"; status = "disabled"; -- 2.11.0
[PATCH v5 2/8] usb: dwc3: of-simple: bail probe if no dwc3 child node
For some of the dwc3-of-simple compatible SoCs we don't want to bind this driver to a dwc3 node, but bind that node to the 'snps,dwc3' driver instead. The kernel has no logic to decide which driver to bind to if there are 2 matching drivers, so bail probe if no dwc3 child node. Signed-off-by: Johan Jonker --- drivers/usb/dwc3/dwc3-of-simple.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c index e62ecd22b..347b4d384 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -38,6 +38,10 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) int ret; + /* Bail probe if no dwc3 child node. */ + if (!of_get_compatible_child(dev->of_node, "snps,dwc3")) + return -ENODEV; + simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL); if (!simple) return -ENOMEM; -- 2.11.0
[PATCH v5 8/8] dts64: rockchip: enable dwc3 usb for A95X Z2
Enable dwc3 usb for A95X Z2.
Signed-off-by: Johan Jonker
---
Changed V2:
remove node wrapper
---
arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
index 30c73ef25..e71870768 100644
--- a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
@@ -357,6 +357,11 @@
status = "okay";
};
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host0_ehci {
status = "okay";
};
--
2.11.0
[PATCH v5 5/8] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_1 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
.../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
17 files changed, 26 insertions(+), 93 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 95110d065..4392780db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -157,7 +157,7 @@
dr_mode = "host";
};
-&usbdrd_dwc3_1 {
+&usbdrd3_1 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 4017b0e8c..28e5895de 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -778,12 +778,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index 1384dabbd..c996c688d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -351,13 +351,9 @@ ap_i2c_tp: &i2c5 {
};
&usbdrd3_1 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon1>;
-};
-
-&usbdrd_dwc3_1 {
status = "okay";
- dr_mode = "host";
};
&pinctrl {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index daf14f732..397050703 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -736,12 +736,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index d028285fb..30e6e3e41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -802,12 +802,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1c0b48a71..a7092fda3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -616,12 +616,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 90a6ea1d7..1e835a682 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -712,10 +712,6 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index 7b633622c..fdc027ff3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
[PATCH v5 6/8] dt-bindings: usb: dwc3: add description for rk3328
Add description for "rockchip,rk3328-dwc3". Signed-off-by: Johan Jonker --- Changed V5: add select --- Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index 9908270a9..04077f2d7 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -28,6 +28,7 @@ select: compatible: contains: enum: + - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 required: - compatible @@ -36,6 +37,7 @@ properties: compatible: items: - enum: + - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 - const: snps,dwc3 @@ -46,6 +48,7 @@ properties: maxItems: 1 clocks: +minItems: 3 items: - description: Controller reference clock, must to be 24 MHz @@ -58,6 +61,7 @@ properties: Controller grf clock clock-names: +minItems: 3 items: - const: ref_clk - const: suspend_clk -- 2.11.0
[PATCH v5 7/8] arm64: dts: rockchip: add rk3328 dwc3 usb controller node
From: Cameron Nemo
RK3328 SoCs have one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu
Signed-off-by: Heiko Stuebner
Signed-off-by: Cameron Nemo
Signed-off-by: Johan Jonker
---
Changed V2:
remove node wrapper
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 4d4cd1830..a3b069a10 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -988,6 +988,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff60 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff60 0x0 0x10>;
+ interrupts = ;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+<&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
[PATCH v5 4/8] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_0 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
.../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
.../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 ---
18 files changed, 24 insertions(+), 95 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 1ce85a581..95110d065 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -153,7 +153,7 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 6db18808b..4017b0e8c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -773,12 +773,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 32dcaf210..e42783cb7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -618,13 +618,9 @@ ap_i2c_audio: &i2c8 {
};
&usbdrd3_0 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon0>;
-};
-
-&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "host";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index 341d074ed..daf14f732 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -731,12 +731,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index 635afdd99..d028285fb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -797,12 +797,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1fa80ac15..1c0b48a71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -611,12 +611,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 76a8b40a9..90a6ea1d7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -715,10 +715,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index ad7c4d008..7b63
[PATCH v4 8/8] dts64: rockchip: enable dwc3 usb for A95X Z2
Enable dwc3 usb for A95X Z2.
Signed-off-by: Johan Jonker
---
Changed V2:
remove node wrapper
---
arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
index 30c73ef25..e71870768 100644
--- a/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3318-a95x-z2.dts
@@ -357,6 +357,11 @@
status = "okay";
};
+&usbdrd3 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb_host0_ehci {
status = "okay";
};
--
2.11.0
[PATCH v4 7/8] arm64: dts: rockchip: add rk3328 dwc3 usb controller node
From: Cameron Nemo
RK3328 SoCs have one USB 3.0 OTG controller which uses DWC_USB3
core's general architecture. It can act as static xHCI host
controller, static device controller, USB 3.0/2.0 OTG basing
on ID of USB3.0 PHY.
Signed-off-by: William Wu
Signed-off-by: Heiko Stuebner
Signed-off-by: Cameron Nemo
Signed-off-by: Johan Jonker
---
Changed V2:
remove node wrapper
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 4d4cd1830..a3b069a10 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -988,6 +988,25 @@
status = "disabled";
};
+ usbdrd3: usb@ff60 {
+ compatible = "rockchip,rk3328-dwc3", "snps,dwc3";
+ reg = <0x0 0xff60 0x0 0x10>;
+ interrupts = ;
+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>,
+<&cru ACLK_USB3OTG>;
+ clock-names = "ref_clk", "suspend_clk",
+ "bus_clk";
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis_enblslpm_quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis_u2_susphy_quirk;
+ snps,dis_u3_susphy_quirk;
+ status = "disabled";
+ };
+
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
[PATCH v4 6/8] dt-bindings: usb: dwc3: add description for rk3328
Add description for "rockchip,rk3328-dwc3". Signed-off-by: Johan Jonker --- Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml index d815aacfc..08a08ffce 100644 --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml @@ -27,6 +27,7 @@ properties: compatible: items: - enum: + - rockchip,rk3328-dwc3 - rockchip,rk3399-dwc3 - const: snps,dwc3 @@ -37,6 +38,7 @@ properties: maxItems: 1 clocks: +minItems: 3 items: - description: Controller reference clock, must to be 24 MHz @@ -49,6 +51,7 @@ properties: Controller grf clock clock-names: +minItems: 3 items: - const: ref_clk - const: suspend_clk -- 2.11.0
[PATCH v4 4/8] arm64: dts: rockchip: restyle rk3399 usbdrd3_0 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_0 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
.../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
.../boot/dts/rockchip/rk3399pro-vmarc-som.dtsi | 4 ---
18 files changed, 24 insertions(+), 95 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 1ce85a581..95110d065 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -153,7 +153,7 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
+&usbdrd3_0 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 6db18808b..4017b0e8c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -773,12 +773,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 32dcaf210..e42783cb7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -618,13 +618,9 @@ ap_i2c_audio: &i2c8 {
};
&usbdrd3_0 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon0>;
-};
-
-&usbdrd_dwc3_0 {
status = "okay";
- dr_mode = "host";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index 341d074ed..daf14f732 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -731,12 +731,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index 635afdd99..d028285fb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -797,12 +797,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1fa80ac15..1c0b48a71 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -611,12 +611,8 @@
};
&usbdrd3_0 {
- status = "okay";
-};
-
-&usbdrd_dwc3_0 {
- status = "okay";
dr_mode = "otg";
+ status = "okay";
};
&usbdrd3_1 {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 76a8b40a9..90a6ea1d7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -715,10 +715,6 @@
status = "okay";
};
-&usbdrd_dwc3_0 {
- status = "okay";
-};
-
&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index ad7c4d008..7b63
[PATCH v4 5/8] arm64: dts: rockchip: restyle rk3399 usbdrd3_1 node
For rk3399 dwc3 usb the wrapper node for only clocks makes no sense,
so restyle the rk3399 usbdrd3_1 node before more new SoC types are
added with the same IP.
Signed-off-by: Johan Jonker
---
Changed V3:
remove aclk_usb3_rksoc_axi_perf
remove aclk_usb3
---
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 2 +-
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts| 6 +---
.../boot/dts/rockchip/rk3399-gru-chromebook.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts | 6 +---
.../boot/dts/rockchip/rk3399-khadas-edge.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts | 6 +---
.../boot/dts/rockchip/rk3399-pinebook-pro.dts | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi| 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts| 2 +-
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 4 ---
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 6 +---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 37 --
17 files changed, 26 insertions(+), 93 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 95110d065..4392780db 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -157,7 +157,7 @@
dr_mode = "host";
};
-&usbdrd_dwc3_1 {
+&usbdrd3_1 {
dr_mode = "host";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
index 4017b0e8c..28e5895de 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
@@ -778,12 +778,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
index 1384dabbd..c996c688d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
@@ -351,13 +351,9 @@ ap_i2c_tp: &i2c5 {
};
&usbdrd3_1 {
- status = "okay";
+ dr_mode = "host";
extcon = <&usbc_extcon1>;
-};
-
-&usbdrd_dwc3_1 {
status = "okay";
- dr_mode = "host";
};
&pinctrl {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
index daf14f732..397050703 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
@@ -736,12 +736,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
index d028285fb..30e6e3e41 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi
@@ -802,12 +802,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
index 1c0b48a71..a7092fda3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-leez-p710.dts
@@ -616,12 +616,8 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
- status = "okay";
dr_mode = "host";
+ status = "okay";
};
&vopb {
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
index 90a6ea1d7..1e835a682 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
@@ -712,10 +712,6 @@
};
&usbdrd3_1 {
- status = "okay";
-};
-
-&usbdrd_dwc3_1 {
dr_mode = "host";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
index 7b633622c..fdc027ff3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
