[RFC PATCH 04/17] hwrng: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/char/hw_random/amd-rng.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c
index 9959c762da2f..e7bf17eedaa0 100644
--- a/drivers/char/hw_random/amd-rng.c
+++ b/drivers/char/hw_random/amd-rng.c
@@ -141,9 +141,9 @@ static int __init mod_init(void)
return -ENODEV;
 
 found:
-   err = pci_read_config_dword(pdev, 0x58, &pmbase);
-   if (err)
-   return err;
+   pci_read_config_dword(pdev, 0x58, &pmbase);
+   if (pmbase == (u32)~0)
+   return -ENODEV;
 
pmbase &= 0xFF00;
if (pmbase == 0)
-- 
2.18.4



[RFC PATCH 09/17] drm/i915/vga: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/gpu/drm/i915/display/intel_vga.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vga.c 
b/drivers/gpu/drm/i915/display/intel_vga.c
index be333699c515..6f9406699c9d 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -99,7 +99,8 @@ intel_vga_set_state(struct drm_i915_private *i915, bool 
enable_decode)
unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : 
INTEL_GMCH_CTRL;
u16 gmch_ctrl;
 
-   if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
+   pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl);
+   if (gmch_ctrl == (u16)~0) {
drm_err(&i915->drm, "failed to read control word\n");
return -EIO;
}
-- 
2.18.4



[RFC PATCH 10/17] hwmon: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/hwmon/i5k_amb.c | 12 
 drivers/hwmon/vt8231.c  |  8 
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/hwmon/i5k_amb.c b/drivers/hwmon/i5k_amb.c
index eeac4b04df27..b7497510323c 100644
--- a/drivers/hwmon/i5k_amb.c
+++ b/drivers/hwmon/i5k_amb.c
@@ -427,11 +427,13 @@ static int i5k_find_amb_registers(struct i5k_amb_data 
*data,
if (!pcidev)
return -ENODEV;
 
-   if (pci_read_config_dword(pcidev, I5K_REG_AMB_BASE_ADDR, &val32))
+   pci_read_config_dword(pcidev, I5K_REG_AMB_BASE_ADDR, &val32);
+   if (val32 == (u32)~0)
goto out;
data->amb_base = val32;
 
-   if (pci_read_config_dword(pcidev, I5K_REG_AMB_LEN_ADDR, &val32))
+   pci_read_config_dword(pcidev, I5K_REG_AMB_LEN_ADDR, &val32);
+   if (val32 == (u32)~0)
goto out;
data->amb_len = val32;
 
@@ -458,11 +460,13 @@ static int i5k_channel_probe(u16 *amb_present, unsigned 
long dev_id)
if (!pcidev)
return -ENODEV;
 
-   if (pci_read_config_word(pcidev, I5K_REG_CHAN0_PRESENCE_ADDR, &val16))
+   pci_read_config_word(pcidev, I5K_REG_CHAN0_PRESENCE_ADDR, &val16);
+   if (val16 == (u16)~0)
goto out;
amb_present[0] = val16;
 
-   if (pci_read_config_word(pcidev, I5K_REG_CHAN1_PRESENCE_ADDR, &val16))
+   pci_read_config_word(pcidev, I5K_REG_CHAN1_PRESENCE_ADDR, &val16);
+   if (val16 == (u16)~0)
goto out;
amb_present[1] = val16;
 
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 2335d440f72d..6603727e15a0 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -992,8 +992,8 @@ static int vt8231_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_BASE_REG,
-   &val))
+   pci_read_config_word(dev, VT8231_BASE_REG, &val);
+   if (val == (u16)~0)
return -ENODEV;
 
address = val & ~(VT8231_EXTENT - 1);
@@ -1002,8 +1002,8 @@ static int vt8231_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_ENABLE_REG,
-   &val))
+   pci_read_config_word(dev, VT8231_ENABLE_REG, &val);
+   if (val == (u16)~0)
return -ENODEV;
 
if (!(val & 0x0001)) {
-- 
2.18.4



[RFC PATCH 01/17] ata: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid value
thus it indicates some kind of error.

drivers/ata/pata_cs5536.c cs5536_read() :
None of the callers of cs5536_read() uses the return value. The obtained
value can be checked for validity to confirm success.

Change the return type of cs5536_read() to void.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/ata/pata_cs5536.c | 6 +++---
 drivers/ata/pata_rz1000.c | 3 ++-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index 760ac6e65216..c204215e239f 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -83,16 +83,16 @@ static const struct dmi_system_id udma_quirk_dmi_table[] = {
{ }
 };
 
-static int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
+static void cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
 {
if (unlikely(use_msr)) {
u32 dummy __maybe_unused;
 
rdmsr(MSR_IDE_CFG + reg, *val, dummy);
-   return 0;
+   return;
}
 
-   return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
+   pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
 }
 
 static int cs5536_write(struct pci_dev *pdev, int reg, int val)
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index 3722a67083fd..e0b3de376357 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -64,7 +64,8 @@ static int rz1000_fifo_disable(struct pci_dev *pdev)
 {
u16 reg;
/* Be exceptionally paranoid as we must be sure to apply the fix */
-   if (pci_read_config_word(pdev, 0x40, ®) != 0)
+   pci_read_config_word(pdev, 0x40, ®);
+   if (reg == (u16)~0)
return -1;
reg &= 0xDFFF;
if (pci_write_config_word(pdev, 0x40, reg) != 0)
-- 
2.18.4



[RFC PATCH 14/17] IB: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/infiniband/hw/hfi1/pcie.c | 38 +++
 drivers/infiniband/hw/mthca/mthca_reset.c | 19 ++--
 2 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/pcie.c 
b/drivers/infiniband/hw/hfi1/pcie.c
index 1a6268d61977..11cf7dde873d 100644
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -392,24 +392,24 @@ int restore_pci_variables(struct hfi1_devdata *dd)
 /* Save BARs and command to rewrite after device reset */
 int save_pci_variables(struct hfi1_devdata *dd)
 {
-   int ret = 0;
+   int ret = -ENODEV;
 
-   ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,
+   pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,
&dd->pcibar0);
-   if (ret)
+   if (dd->pcibar0 == (u32)~0)
goto error;
 
-   ret = pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,
+   pci_read_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,
&dd->pcibar1);
-   if (ret)
+   if (dd->pcibar1 == (u32)~0)
goto error;
 
-   ret = pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom);
-   if (ret)
+   pci_read_config_dword(dd->pcidev, PCI_ROM_ADDRESS, &dd->pci_rom);
+   if (dd->pci_rom == (u32)~0)
goto error;
 
-   ret = pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command);
-   if (ret)
+   pci_read_config_word(dd->pcidev, PCI_COMMAND, &dd->pci_command);
+   if (dd->pci_command == (u16)~0)
goto error;
 
ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVCTL,
@@ -427,14 +427,14 @@ int save_pci_variables(struct hfi1_devdata *dd)
if (ret)
goto error;
 
-   ret = pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);
-   if (ret)
+   pci_read_config_dword(dd->pcidev, PCI_CFG_MSIX0, &dd->pci_msix0);
+   if (dd->pci_command == (u32)~0)
goto error;
 
if (pci_find_ext_capability(dd->pcidev, PCI_EXT_CAP_ID_TPH)) {
-   ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2,
+   pci_read_config_dword(dd->pcidev, PCIE_CFG_TPH2,
&dd->pci_tph2);
-   if (ret)
+   if (dd->pci_tph2 == (u32)~0)
goto error;
}
return 0;
@@ -783,9 +783,9 @@ static int load_eq_table(struct hfi1_devdata *dd, const u8 
eq[11][3], u8 fs,
pci_write_config_dword(pdev, PCIE_CFG_REG_PL102,
   eq_value(c_minus1, c0, c_plus1));
/* check if these coefficients violate EQ rules */
-   ret = pci_read_config_dword(dd->pcidev,
+   pci_read_config_dword(dd->pcidev,
PCIE_CFG_REG_PL105, &violation);
-   if (ret) {
+   if (violation == (32)~0) {
dd_dev_err(dd, "Unable to read from PCI config\n");
hit_error = 1;
break;
@@ -1322,8 +1322,8 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
/* step 10: decide what to do next */
 
/* check if we can read PCI space */
-   ret = pci_read_config_word(dd->pcidev, PCI_VENDOR_ID, &vendor);
-   if (ret) {
+   pci_read_config_word(dd->pcidev, PCI_VENDOR_ID, &vendor);
+   if (vendor == (u16)~0) {
dd_dev_info(dd,
"%s: read of VendorID failed after SBR, err %d\n",
__func__, ret);
@@ -1376,8 +1376,8 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
setextled(dd, 0);
 
/* check for any per-lane errors */
-   ret = pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, ®32);
-   if (ret) {
+   pci_read_config_dword(dd->pcidev, PCIE_CFG_SPCIE2, ®32);
+   if (reg32 == (u32)~0) {
dd_dev_err(dd, "Unable to read from PCI config\n");
return_error = 1;
goto done;
diff --git

[RFC PATCH 08/17] gpio: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/gpio/gpio-amd8111.c |  7 +--
 drivers/gpio/gpio-rdc321x.c | 21 -
 2 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/drivers/gpio/gpio-amd8111.c b/drivers/gpio/gpio-amd8111.c
index fdcebe59510d..7b9882380cbc 100644
--- a/drivers/gpio/gpio-amd8111.c
+++ b/drivers/gpio/gpio-amd8111.c
@@ -198,9 +198,12 @@ static int __init amd_gpio_init(void)
goto out;
 
 found:
-   err = pci_read_config_dword(pdev, 0x58, &gp.pmbase);
-   if (err)
+   pci_read_config_dword(pdev, 0x58, &gp.pmbase);
+   if (gp.pmbase == (u32)~0) {
+   err = -ENODEV;
goto out;
+   }
+
err = -EIO;
gp.pmbase &= 0xFF00;
if (gp.pmbase == 0)
diff --git a/drivers/gpio/gpio-rdc321x.c b/drivers/gpio/gpio-rdc321x.c
index 01ed2517e9fd..03f1ff07b844 100644
--- a/drivers/gpio/gpio-rdc321x.c
+++ b/drivers/gpio/gpio-rdc321x.c
@@ -85,10 +85,13 @@ static int rdc_gpio_config(struct gpio_chip *chip,
gpch = gpiochip_get_data(chip);
 
spin_lock(&gpch->lock);
-   err = pci_read_config_dword(gpch->sb_pdev, gpio < 32 ?
-   gpch->reg1_ctrl_base : gpch->reg2_ctrl_base, ®);
-   if (err)
+   pci_read_config_dword(gpch->sb_pdev,
+   (gpio < 32) ? gpch->reg1_ctrl_base
+   : gpch->reg2_ctrl_base, ®);
+   if (reg == (u32)~0) {
+   err = -ENODEV;
goto unlock;
+   }
 
reg |= 1 << (gpio & 0x1f);
 
@@ -166,17 +169,17 @@ static int rdc321x_gpio_probe(struct platform_device 
*pdev)
/* This might not be, what others (BIOS, bootloader, etc.)
   wrote to these registers before, but it's a good guess. Still
   better than just using 0x. */
-   err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
+   pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
rdc321x_gpio_dev->reg1_data_base,
&rdc321x_gpio_dev->data_reg[0]);
-   if (err)
-   return err;
+   if (rdc321x_gpio_dev->data_reg[0] == (u32)~0)
+   return -ENODEV;
 
-   err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
+   pci_read_config_dword(rdc321x_gpio_dev->sb_pdev,
rdc321x_gpio_dev->reg2_data_base,
&rdc321x_gpio_dev->data_reg[1]);
-   if (err)
-   return err;
+   if (rdc321x_gpio_dev->data_reg[1] == (u32)~0)
+   return -ENODEV;
 
dev_info(&pdev->dev, "registering %d GPIOs\n",
rdc321x_gpio_dev->chip.ngpio);
-- 
2.18.4



[RFC PATCH 07/17] fpga: altera-cvp: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/fpga/altera-cvp.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera-cvp.c
index 4e0edb60bfba..99c6e0754f8b 100644
--- a/drivers/fpga/altera-cvp.c
+++ b/drivers/fpga/altera-cvp.c
@@ -96,15 +96,15 @@ struct cvp_priv {
 static int altera_read_config_byte(struct altera_cvp_conf *conf,
   int where, u8 *val)
 {
-   return pci_read_config_byte(conf->pci_dev, conf->vsec_offset + where,
-   val);
+   pci_read_config_byte(conf->pci_dev, conf->vsec_offset + where, val);
+   return (val == (u8)~0) ? -ENODEV : 0;
 }
 
 static int altera_read_config_dword(struct altera_cvp_conf *conf,
int where, u32 *val)
 {
-   return pci_read_config_dword(conf->pci_dev, conf->vsec_offset + where,
-val);
+   pci_read_config_dword(conf->pci_dev, conf->vsec_offset + where, val);
+   return (val == (u32)~0) ? -ENODEV : 0;
 }
 
 static int altera_write_config_dword(struct altera_cvp_conf *conf,
-- 
2.18.4



[RFC PATCH 03/17] bcma: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/bcma/host_pci.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/bcma/host_pci.c b/drivers/bcma/host_pci.c
index 69c10a7b7c61..912d5311a444 100644
--- a/drivers/bcma/host_pci.c
+++ b/drivers/bcma/host_pci.c
@@ -372,9 +372,11 @@ int bcma_host_pci_irq_ctl(struct bcma_bus *bus, struct 
bcma_device *core,
 
pdev = bus->host_pci;
 
-   err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
-   if (err)
+   pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
+   if (tmp == (u32)~0) {
+   err = -ENODEV;
goto out;
+   }
 
coremask = BIT(core->core_index) << 8;
if (enable)
-- 
2.18.4



[RFC PATCH 06/17] edac: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid value
thus it indicates some kind of error.

drivers/edac/amd8111_edac.c edac_pci_read_dword() :
None of the callers of edac_pci_read_dword() uses the return value. The
obtained value can be checked for validity to confirm success.

Change the return type of edac_pci_read_dword() to void.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/edac/amd64_edac.c  |  8 +++-
 drivers/edac/amd8111_edac.c| 16 +---
 drivers/edac/amd8131_edac.c|  6 ++
 drivers/edac/i82443bxgx_edac.c |  3 ++-
 drivers/edac/sb_edac.c | 12 
 drivers/edac/skx_common.c  | 18 --
 6 files changed, 32 insertions(+), 31 deletions(-)

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 6262f6370c5d..f798eb17cb23 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -57,14 +57,12 @@ static const struct scrubrate {
 int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,
   u32 *val, const char *func)
 {
-   int err = 0;
-
-   err = pci_read_config_dword(pdev, offset, val);
-   if (err)
+   pci_read_config_dword(pdev, offset, val);
+   if (*val == (u32)~0)
amd64_warn("%s: error reading F%dx%03x.\n",
   func, PCI_FUNC(pdev->devfn), offset);
 
-   return err;
+   return -ENODEV;
 }
 
 int __amd64_write_pci_cfg_dword(struct pci_dev *pdev, int offset,
diff --git a/drivers/edac/amd8111_edac.c b/drivers/edac/amd8111_edac.c
index 7508aa416ddb..ebf6deaf1d3d 100644
--- a/drivers/edac/amd8111_edac.c
+++ b/drivers/edac/amd8111_edac.c
@@ -34,24 +34,18 @@ enum amd8111_edac_pcis {
 };
 
 /* Wrapper functions for accessing PCI configuration space */
-static int edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)
+static void edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)
 {
-   int ret;
-
-   ret = pci_read_config_dword(dev, reg, val32);
-   if (ret != 0)
+   pci_read_config_dword(dev, reg, val32);
+   if (val32 == (u32)~0)
printk(KERN_ERR AMD8111_EDAC_MOD_STR
" PCI Access Read Error at 0x%x\n", reg);
-
-   return ret;
 }
 
 static void edac_pci_read_byte(struct pci_dev *dev, int reg, u8 *val8)
 {
-   int ret;
-
-   ret = pci_read_config_byte(dev, reg, val8);
-   if (ret != 0)
+   pci_read_config_byte(dev, reg, val8);
+   if (val8 == (u8)~0)
printk(KERN_ERR AMD8111_EDAC_MOD_STR
" PCI Access Read Error at 0x%x\n", reg);
 }
diff --git a/drivers/edac/amd8131_edac.c b/drivers/edac/amd8131_edac.c
index 169353710982..6df98c05391d 100644
--- a/drivers/edac/amd8131_edac.c
+++ b/drivers/edac/amd8131_edac.c
@@ -26,10 +26,8 @@
 /* Wrapper functions for accessing PCI configuration space */
 static void edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32)
 {
-   int ret;
-
-   ret = pci_read_config_dword(dev, reg, val32);
-   if (ret != 0)
+   pci_read_config_dword(dev, reg, val32);
+   if (val32 == (u32)~0)
printk(KERN_ERR AMD8131_EDAC_MOD_STR
" PCI Access Read Error at 0x%x\n", reg);
 }
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
index a2ca929e2168..d6797ed7ac65 100644
--- a/drivers/edac/i82443bxgx_edac.c
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -243,7 +243,8 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, 
int dev_idx)
/* Something is really hosed if PCI config space reads from
 * the MC aren't working.
 */
-   if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg))
+   pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg);
+   if (nbxcfg == (u32)~0)
return -EIO;
 
layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index d414698ca324..e56a06d68a4e 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -1697,13 +1697,15 @@ static int get_dimm_config(struct mem_ctl_info *mci)
 
if (knl_get_dimm_capacity(pvt, knl_mc_sizes) != 0)
return -1;
-   if (pci_read_config_dword(pvt->pci_ta, KNL_MCMTR, 
&pvt->info.mcmtr)) {
+   pci_read_config_dword(pvt->pci_ta, KNL_MCM

[RFC PATCH 05/17] dmaengine: ioat: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/dma/ioat/dma.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index fd782aee02d9..e51418cf93b6 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -1016,12 +1016,12 @@ int ioat_reset_hw(struct ioatdma_chan *ioat_chan)
 
if (ioat_dma->version < IOAT_VER_3_3) {
/* clear any pending errors */
-   err = pci_read_config_dword(pdev,
+   pci_read_config_dword(pdev,
IOAT_PCI_CHANERR_INT_OFFSET, &chanerr);
-   if (err) {
+   if (chanerr == (u32)~0) {
dev_err(&pdev->dev,
"channel error register unreachable\n");
-   return err;
+   return -ENODEV;
}
pci_write_config_dword(pdev,
IOAT_PCI_CHANERR_INT_OFFSET, chanerr);
-- 
2.18.4



[RFC PATCH 12/17] i2c: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/i2c/busses/i2c-ali15x3.c |  6 --
 drivers/i2c/busses/i2c-elektor.c |  3 ++-
 drivers/i2c/busses/i2c-nforce2.c |  4 ++--
 drivers/i2c/busses/i2c-sis5595.c | 17 +++--
 drivers/i2c/busses/i2c-sis630.c  |  7 ---
 drivers/i2c/busses/i2c-viapro.c  | 11 ++-
 6 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 02185a1cfa77..fa103131746d 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -171,9 +171,11 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
SMBBA,
ali15x3_smba))
goto error;
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
-   SMBBA, &a))
+
+   pci_read_config_word(ALI15X3_dev, SMBBA, &a);
+   if (a == (u16)~0)
goto error;
+
if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
/* make sure it works */
dev_err(&ALI15X3_dev->dev,
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index 140426db28df..82c8d6d55561 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -207,7 +207,8 @@ static int elektor_match(struct device *dev, unsigned int 
id)
if (cy693_dev) {
unsigned char config;
/* yeap, we've found cypress, let's check config */
-   if (!pci_read_config_byte(cy693_dev, 0x47, &config)) {
+   pci_read_config_byte(cy693_dev, 0x47, &config);
+   if (config != (u8)~0) {
 
dev_dbg(dev, "found cy82c693, config "
"register 0x47 = 0x%02x\n", config);
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 777278386f58..dc5d032c5a1d 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -327,8 +327,8 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, 
int alt_reg,
/* Older incarnations of the device used non-standard BARs */
u16 iobase;
 
-   if (pci_read_config_word(dev, alt_reg, &iobase)
-   != PCIBIOS_SUCCESSFUL) {
+   pci_read_config_word(dev, alt_reg, &iobase);
+   if (iobase == (u16)~0) {
dev_err(&dev->dev, "Error reading PCI config for %s\n",
name);
return -EIO;
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index c793a5c14cda..9b3fbde9cd9c 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -178,9 +178,11 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
!= PCIBIOS_SUCCESSFUL)
goto error;
-   if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
-   != PCIBIOS_SUCCESSFUL)
+
+   pci_read_config_word(SIS5595_dev, ACPI_BASE, &a);
+   if (a == (u16)~0)
goto error;
+
if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
/* doesn't work for some chips! */
dev_err(&SIS5595_dev->dev, "force address failed - not 
supported?\n");
@@ -188,17 +190,20 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
}
}
 
-   if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-   != PCIBIOS_SUCCESSFUL)
+   pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val);
+   if (val == (u8)~0)
goto error;
+
if ((val & 0x80) == 0) {
dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
if (

[RFC PATCH 15/17] iommu/vt-d: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/iommu/intel/iommu.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index d759e7234e98..aad3c065e4a0 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -6165,7 +6165,8 @@ static void quirk_calpella_no_shadow_gtt(struct pci_dev 
*dev)
if (risky_device(dev))
return;
 
-   if (pci_read_config_word(dev, GGC, &ggc))
+   pci_read_config_word(dev, GGC, &ggc);
+   if (ggc == (u16)~0)
return;
 
if (!(ggc & GGC_MEMORY_VT_ENABLED)) {
@@ -6218,7 +6219,8 @@ static void __init check_tylersburg_isoch(void)
return;
}
 
-   if (pci_read_config_dword(pdev, 0x188, &vtisochctrl)) {
+   pci_read_config_dword(pdev, 0x188, &vtisochctrl);
+   if (vtisochctrl == (uint32_t)~0) {
pci_dev_put(pdev);
return;
}
-- 
2.18.4



[RFC PATCH 16/17] mtd: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/mtd/maps/ichxrom.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/maps/ichxrom.c b/drivers/mtd/maps/ichxrom.c
index fda72c5fd8f9..04728d902e49 100644
--- a/drivers/mtd/maps/ichxrom.c
+++ b/drivers/mtd/maps/ichxrom.c
@@ -61,8 +61,8 @@ static void ichxrom_cleanup(struct ichxrom_window *window)
int ret;
 
/* Disable writes through the rom window */
-   ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word);
-   if (!ret)
+   pci_read_config_word(window->pdev, BIOS_CNTL, &word);
+   if (word != (u16)~0)
pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1);
pci_dev_put(window->pdev);
 
-- 
2.18.4



[RFC PATCH 17/17] net: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/net/can/peak_canfd/peak_pciefd_main.c |  6 --
 drivers/net/can/sja1000/peak_pci.c|  6 --
 drivers/net/ethernet/agere/et131x.c   | 11 +++
 .../net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c   |  5 +++--
 .../ethernet/cavium/liquidio/cn23xx_pf_device.c   |  4 ++--
 drivers/net/ethernet/marvell/sky2.c   |  5 +++--
 drivers/net/ethernet/mellanox/mlx4/catas.c|  7 +--
 drivers/net/ethernet/mellanox/mlx4/reset.c| 10 ++
 drivers/net/ethernet/myricom/myri10ge/myri10ge.c  |  4 ++--
 drivers/net/wan/farsync.c |  5 +++--
 .../wireless/broadcom/brcm80211/brcmfmac/pcie.c   |  4 ++--
 drivers/net/wireless/intel/iwlwifi/pcie/trans.c   | 15 ++-
 12 files changed, 47 insertions(+), 35 deletions(-)

diff --git a/drivers/net/can/peak_canfd/peak_pciefd_main.c 
b/drivers/net/can/peak_canfd/peak_pciefd_main.c
index 6ad83a881039..484a214fc1f1 100644
--- a/drivers/net/can/peak_canfd/peak_pciefd_main.c
+++ b/drivers/net/can/peak_canfd/peak_pciefd_main.c
@@ -730,9 +730,11 @@ static int peak_pciefd_probe(struct pci_dev *pdev,
goto err_disable_pci;
 
/* the number of channels depends on sub-system id */
-   err = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sub_sys_id);
-   if (err)
+   pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &sub_sys_id);
+   if (sub_sys_id == (u16)~0) {
+   err = -ENODEV;
goto err_release_regions;
+   }
 
dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
pdev->vendor, pdev->device, sub_sys_id);
diff --git a/drivers/net/can/sja1000/peak_pci.c 
b/drivers/net/can/sja1000/peak_pci.c
index 8c0244f51059..d25a99ad08da 100644
--- a/drivers/net/can/sja1000/peak_pci.c
+++ b/drivers/net/can/sja1000/peak_pci.c
@@ -560,9 +560,11 @@ static int peak_pci_probe(struct pci_dev *pdev, const 
struct pci_device_id *ent)
if (err)
goto failure_disable_pci;
 
-   err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
-   if (err)
+   pci_read_config_word(pdev, 0x2e, &sub_sys_id);
+   if (sub_sys_id == (u16)~0) {
+   err = -ENODEV;
goto failure_release_regions;
+   }
 
dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
pdev->vendor, pdev->device, sub_sys_id);
diff --git a/drivers/net/ethernet/agere/et131x.c 
b/drivers/net/ethernet/agere/et131x.c
index 865892c1f23f..6b0e5f193e73 100644
--- a/drivers/net/ethernet/agere/et131x.c
+++ b/drivers/net/ethernet/agere/et131x.c
@@ -505,7 +505,8 @@ static int eeprom_wait_ready(struct pci_dev *pdev, u32 
*status)
 *to 1 prior to starting a single byte read/write
 */
for (i = 0; i < MAX_NUM_REGISTER_POLLS; i++) {
-   if (pci_read_config_dword(pdev, LBCIF_DWORD1_GROUP, ®))
+   pci_read_config_dword(pdev, LBCIF_DWORD1_GROUP, ®);
+   if (reg == (u32)~0)
return -EIO;
 
/* I2C idle and Phy Queue Avail both true */
@@ -679,7 +680,8 @@ static int et131x_init_eeprom(struct et131x_adapter 
*adapter)
 * function, because I thought there could be some time conditions
 * but it didn't work. Call the whole function twice also work.
 */
-   if (pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus)) {
+   pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus);
+   if (eestatus == (u8)~0) {
dev_err(&pdev->dev,
"Could not read PCI config space for EEPROM Status\n");
return -EIO;
@@ -3059,8 +3061,9 @@ static int et131x_pci_init(struct et131x_adapter *adapter,
}
 
for (i = 0; i < ETH_ALEN; i++) {
-   if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
-adapter->rom_addr + i)) {
+   pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
+adapter->rom_addr + i);
+   if (*(adapter->rom_addr + i) == (u8)~0) {
dev_err(&pdev->dev, "Could not read PCI confi

[RFC PATCH 00/17] Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the 
dependencies on the return value of these functions are removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid value
thus it indicates some kind of error.

In some cases it madkes sence to make the calling function return void
without causing any bug. Future callers can use the value obtained from
these functions for validation. This case pertain to cs5536_read() and 
edac_pci_read_dword()

MERGE:
There is no dependency.
Merge individually

Saheed O. Bolarinwa (17):
  ata: Drop uses of pci_read_config_*() return value
  atm: Drop uses of pci_read_config_*() return value
  bcma: Drop uses of pci_read_config_*() return value
  hwrng: Drop uses of pci_read_config_*() return value
  dmaengine: ioat: Drop uses of pci_read_config_*() return value
  edac: Drop uses of pci_read_config_*() return value
  fpga: altera-cvp: Drop uses of pci_read_config_*() return value
  gpio: Drop uses of pci_read_config_*() return value
  drm/i915/vga: Drop uses of pci_read_config_*() return value
  hwmon: Drop uses of pci_read_config_*() return value
  intel_th: pci: Drop uses of pci_read_config_*() return value
  i2c: Drop uses of pci_read_config_*() return value
  ide: Drop uses of pci_read_config_*() return value
  IB: Drop uses of pci_read_config_*() return value
  iommu/vt-d: Drop uses of pci_read_config_*() return value
  mtd: Drop uses of pci_read_config_*() return value
  net: Drop uses of pci_read_config_*() return value

 drivers/ata/pata_cs5536.c |  6 +--
 drivers/ata/pata_rz1000.c |  3 +-
 drivers/atm/eni.c |  3 +-
 drivers/atm/he.c  | 12 +++--
 drivers/atm/idt77252.c|  9 ++--
 drivers/atm/iphase.c  | 46 ++-
 drivers/atm/lanai.c   |  4 +-
 drivers/atm/nicstar.c |  3 +-
 drivers/atm/zatm.c|  9 ++--
 drivers/bcma/host_pci.c   |  6 ++-
 drivers/char/hw_random/amd-rng.c  |  6 +--
 drivers/dma/ioat/dma.c|  6 +--
 drivers/edac/amd64_edac.c |  8 ++--
 drivers/edac/amd8111_edac.c   | 16 ++-
 drivers/edac/amd8131_edac.c   |  6 +--
 drivers/edac/i82443bxgx_edac.c|  3 +-
 drivers/edac/sb_edac.c| 12 +++--
 drivers/edac/skx_common.c | 18 +---
 drivers/fpga/altera-cvp.c |  8 ++--
 drivers/gpio/gpio-amd8111.c   |  7 ++-
 drivers/gpio/gpio-rdc321x.c   | 21 +
 drivers/gpu/drm/i915/display/intel_vga.c  |  3 +-
 drivers/hwmon/i5k_amb.c   | 12 +++--
 drivers/hwmon/vt8231.c|  8 ++--
 drivers/hwtracing/intel_th/pci.c  | 12 ++---
 drivers/i2c/busses/i2c-ali15x3.c  |  6 ++-
 drivers/i2c/busses/i2c-elektor.c  |  3 +-
 drivers/i2c/busses/i2c-nforce2.c  |  4 +-
 drivers/i2c/busses/i2c-sis5595.c  | 17 ---
 drivers/i2c/busses/i2c-sis630.c   |  7 +--
 drivers/i2c/busses/i2c-viapro.c   | 11 +++--
 drivers/ide/cs5536.c  |  6 +--
 drivers/ide/rz1000.c  |  3 +-
 drivers/ide/setup-pci.c   | 26 +++
 drivers/infiniband/hw/hfi1/pcie.c | 38 +++
 drivers/infiniband/hw/mthca/mthca_reset.c | 19 
 drivers/iommu/intel/iommu.c   |  6 ++-
 drivers/mtd/maps/ichxrom.c|  4 +-
 drivers/net/can/peak_canfd/peak_pciefd_main.c |  6 ++-
 drivers/net/can/sja1000/peak_pci.c|  6 ++-
 drivers/net/ethernet/agere/et131x.c   | 11 +++--
 .../ethernet/broadcom/bnx2x/bnx2x_ethtool.c   |  5 +-
 .../cavium/liquidio/cn23xx_pf_device.c|  4 +-
 drivers/net/ethernet/marvell/sky2.c   |  5 +-
 drivers/net/ethernet/mellanox/mlx4/catas.c|  7 +--
 drivers/net/ethernet/mellanox/mlx4/reset.c| 10 ++--
 .../net/ethernet/myricom/myri10ge/myri10ge.c  |  4 +-
 drivers/net/wan/farsync.c |  5 +-
 .../broadcom/brcm80211/brcmfmac/pcie.c|  4 +-
 .../net/wireless/intel/iwlwifi/pcie/trans.c   | 15 --
 50 files changed, 270 insertions(+), 209 deletions(-)

-- 
2.18.4



[RFC PATCH 02/17] atm: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/atm/eni.c  |  3 ++-
 drivers/atm/he.c   | 12 +++
 drivers/atm/idt77252.c |  9 ++---
 drivers/atm/iphase.c   | 46 +++---
 drivers/atm/lanai.c|  4 ++--
 drivers/atm/nicstar.c  |  3 ++-
 drivers/atm/zatm.c |  9 +
 7 files changed, 50 insertions(+), 36 deletions(-)

diff --git a/drivers/atm/eni.c b/drivers/atm/eni.c
index 17d47ad03ab7..5beed8a25fa2 100644
--- a/drivers/atm/eni.c
+++ b/drivers/atm/eni.c
@@ -1585,7 +1585,8 @@ static char * const media_name[] = {
   } })
 #define GET_SEPROM \
   ({ if (!error && !pci_error) { \
-pci_error = pci_read_config_byte(eni_dev->pci_dev,PCI_TONGA_CTRL,&tonga); \
+   pci_read_config_byte(eni_dev->pci_dev, PCI_TONGA_CTRL, &tonga); \
+   pci_error = (tonga == (u8)~0) ? -1 : 0; \
 udelay(10); /* 10 usecs */ \
   } })
 
diff --git a/drivers/atm/he.c b/drivers/atm/he.c
index 8af793f5e811..8727ae7746fb 100644
--- a/drivers/atm/he.c
+++ b/drivers/atm/he.c
@@ -995,7 +995,8 @@ static int he_start(struct atm_dev *dev)
 */
 
/* 4.3 pci bus controller-specific initialization */
-   if (pci_read_config_dword(pci_dev, GEN_CNTL_0, &gen_cntl_0) != 0) {
+   pci_read_config_dword(pci_dev, GEN_CNTL_0, &gen_cntl_0);
+   if (gen_cntl_0 == (u32)~0) {
hprintk("can't read GEN_CNTL_0\n");
return -EINVAL;
}
@@ -1005,7 +1006,8 @@ static int he_start(struct atm_dev *dev)
return -EINVAL;
}
 
-   if (pci_read_config_word(pci_dev, PCI_COMMAND, &command) != 0) {
+   pci_read_config_word(pci_dev, PCI_COMMAND, &command);
+   if (command == (u16)~0) {
hprintk("can't read PCI_COMMAND.\n");
return -EINVAL;
}
@@ -1016,7 +1018,8 @@ static int he_start(struct atm_dev *dev)
return -EINVAL;
}
 
-   if (pci_read_config_byte(pci_dev, PCI_CACHE_LINE_SIZE, &cache_size)) {
+   pci_read_config_byte(pci_dev, PCI_CACHE_LINE_SIZE, &cache_size);
+   if (cache_size == (u8)~0) {
hprintk("can't read cache line size?\n");
return -EINVAL;
}
@@ -1027,7 +1030,8 @@ static int he_start(struct atm_dev *dev)
hprintk("can't set cache line size to %d\n", 
cache_size);
}
 
-   if (pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &timer)) {
+   pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &timer);
+   if (timer == (u8)~0) {
hprintk("can't read latency timer?\n");
return -EINVAL;
}
diff --git a/drivers/atm/idt77252.c b/drivers/atm/idt77252.c
index df51680e8931..f4b0c2ecae62 100644
--- a/drivers/atm/idt77252.c
+++ b/drivers/atm/idt77252.c
@@ -3271,7 +3271,8 @@ static int init_card(struct atm_dev *dev)
 
/* Set PCI Retry-Timeout and TRDY timeout */
IPRINTK("%s: Checking PCI retries.\n", card->name);
-   if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
+   pci_read_config_byte(pcidev, 0x40, &pci_byte);
+   if (pci_byte == (u_char)~0) {
printk("%s: can't read PCI retry timeout.\n", card->name);
deinit_card(card);
return -1;
@@ -3287,7 +3288,8 @@ static int init_card(struct atm_dev *dev)
}
}
IPRINTK("%s: Checking PCI TRDY.\n", card->name);
-   if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
+   pci_read_config_byte(pcidev, 0x41, &pci_byte);
+   if (pci_byte == (u_char)~0) {
printk("%s: can't read PCI TRDY timeout.\n", card->name);
deinit_card(card);
return -1;
@@ -3535,7 +3537,8 @@ static int idt77252_preset(struct idt77252_dev *card)
 
XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
card->name);
-   if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
+   pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command);
+   if (pci_command == (u16)~0) {
printk("%s: can't read PCI_COMMAN

[RFC PATCH 13/17] ide: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid value
thus it indicates some kind of error.

drivers/ide/cs5536.c cs5536_read() :
None of the callers of cs5536_read() uses the return value. The obtained
value can be checked for validity to confirm success.

Change the return type of cs5536_read() to void.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/ide/cs5536.c|  6 +++---
 drivers/ide/rz1000.c|  3 ++-
 drivers/ide/setup-pci.c | 26 --
 3 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/drivers/ide/cs5536.c b/drivers/ide/cs5536.c
index 8b5ca145191b..58d1cf37c013 100644
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -55,16 +55,16 @@ enum {
 
 static int use_msr;
 
-static int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
+static void cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
 {
if (unlikely(use_msr)) {
u32 dummy;
 
rdmsr(MSR_IDE_CFG + reg, *val, dummy);
-   return 0;
+   return;
}
 
-   return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
+   pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
 }
 
 static int cs5536_write(struct pci_dev *pdev, int reg, int val)
diff --git a/drivers/ide/rz1000.c b/drivers/ide/rz1000.c
index fce2b7de5a19..19ac4328e707 100644
--- a/drivers/ide/rz1000.c
+++ b/drivers/ide/rz1000.c
@@ -27,7 +27,8 @@ static int rz1000_disable_readahead(struct pci_dev *dev)
 {
u16 reg;
 
-   if (!pci_read_config_word (dev, 0x40, ®) &&
+   pci_read_config_word(dev, 0x40, ®);
+   if ((reg != (u16)~0) &&
!pci_write_config_word(dev, 0x40, reg & 0xdfff)) {
printk(KERN_INFO "%s: disabled chipset read-ahead "
"(buggy RZ1000/RZ1001)\n", pci_name(dev));
diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c
index fdc8e813170c..a7b93ccd55d1 100644
--- a/drivers/ide/setup-pci.c
+++ b/drivers/ide/setup-pci.c
@@ -37,7 +37,8 @@ static int ide_setup_pci_baseregs(struct pci_dev *dev, const 
char *name)
/*
 * Place both IDE interfaces into PCI "native" mode:
 */
-   if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
+   pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
+   if ((progif == (u8)~0) ||
 (progif & 5) != 5) {
if ((progif & 0xa) != 0xa) {
printk(KERN_INFO "%s %s: device not capable of full "
@@ -47,7 +48,8 @@ static int ide_setup_pci_baseregs(struct pci_dev *dev, const 
char *name)
printk(KERN_INFO "%s %s: placing both ports into native PCI "
"mode\n", name, pci_name(dev));
(void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
-   if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
+   pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
+   if ((progif == (u8)~0) ||
(progif & 5) != 5) {
printk(KERN_ERR "%s %s: rewrite of PROGIF failed, "
"wanted 0x%04x, got 0x%04x\n",
@@ -251,7 +253,8 @@ static int ide_pci_configure(struct pci_dev *dev, const 
struct ide_port_info *d)
d->name, pci_name(dev));
return -ENODEV;
}
-   if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
+   pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
+   if (pcicmd == (u16)~0) {
printk(KERN_ERR "%s %s: error accessing PCI regs\n",
d->name, pci_name(dev));
return -EIO;
@@ -415,8 +418,8 @@ static int ide_setup_pci_controller(struct pci_dev *dev, 
int bars,
if (ret < 0)
goto out;
 
-   ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
-   if (ret < 0) {
+   pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
+   if (pcicmd == (u16)~0) {
printk(KERN_ERR "%s %s: error accessing PCI regs\n",
d->name, pci_name(dev));
goto out_free_bars;
@@ -466,11 +469,14 @@ void ide_pci_setup_ports(struct pci_dev *dev, const 
struct ide_port_info *d,
for (port = 0; port < channels; ++port) {

[RFC PATCH 11/17] intel_th: pci: Drop uses of pci_read_config_*() return value

2020-08-01 Thread Saheed O. Bolarinwa
The return value of pci_read_config_*() may not indicate a device error.
However, the value read by these functions is more likely to indicate
this kind of error. This presents two overlapping ways of reporting
errors and complicates error checking.

It is possible to move to one single way of checking for error if the
dependency on the return value of these functions is removed, then it
can later be made to return void.

Remove all uses of the return value of pci_read_config_*().
Check the actual value read for ~0. In this case, ~0 is an invalid
value thus it indicates some kind of error.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/hwtracing/intel_th/pci.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/hwtracing/intel_th/pci.c b/drivers/hwtracing/intel_th/pci.c
index 21fdf0b93516..176c9088038e 100644
--- a/drivers/hwtracing/intel_th/pci.c
+++ b/drivers/hwtracing/intel_th/pci.c
@@ -32,13 +32,13 @@ static int intel_th_pci_activate(struct intel_th *th)
 {
struct pci_dev *pdev = to_pci_dev(th->dev);
u32 npkdsc;
-   int err;
+   int err = -ENODEV;
 
if (!INTEL_TH_CAP(th, tscu_enable))
return 0;
 
-   err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
-   if (!err) {
+   pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
+   if (npkdsc != (u32)~0) {
npkdsc |= NPKDSC_TSACT;
err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc);
}
@@ -53,13 +53,13 @@ static void intel_th_pci_deactivate(struct intel_th *th)
 {
struct pci_dev *pdev = to_pci_dev(th->dev);
u32 npkdsc;
-   int err;
+   int err = -ENODEV;
 
if (!INTEL_TH_CAP(th, tscu_enable))
return;
 
-   err = pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
-   if (!err) {
+   pci_read_config_dword(pdev, PCI_REG_NPKDSC, &npkdsc);
+   if (npkdsc != (u32)~0) {
npkdsc |= NPKDSC_TSACT;
err = pci_write_config_dword(pdev, PCI_REG_NPKDSC, npkdsc);
}
-- 
2.18.4



[PATCH v4 11/12] PCI/ASPM: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduce a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 to the if condition to confirm failure.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/pcie/aspm.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b17e5ffd31b1..5e84a5ee94b0 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -223,7 +223,7 @@ static bool pcie_retrain_link(struct pcie_link_state *link)
end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT;
do {
pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16);
-   if (!(reg16 & PCI_EXP_LNKSTA_LT))
+   if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_LT))
break;
msleep(1);
} while (time_before(jiffies, end_jiffies));
@@ -250,23 +250,23 @@ static void pcie_aspm_configure_common_clock(struct 
pcie_link_state *link)
 
/* Check downstream component if bit Slot Clock Configuration is 1 */
pcie_capability_read_word(child, PCI_EXP_LNKSTA, ®16);
-   if (!(reg16 & PCI_EXP_LNKSTA_SLC))
+   if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_SLC))
same_clock = 0;
 
/* Check upstream component if bit Slot Clock Configuration is 1 */
pcie_capability_read_word(parent, PCI_EXP_LNKSTA, ®16);
-   if (!(reg16 & PCI_EXP_LNKSTA_SLC))
+   if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_LNKSTA_SLC))
same_clock = 0;
 
/* Port might be already in common clock mode */
pcie_capability_read_word(parent, PCI_EXP_LNKCTL, ®16);
-   if (same_clock && (reg16 & PCI_EXP_LNKCTL_CCC)) {
+   if ((reg16 != (u16)~0) && same_clock && (reg16 & PCI_EXP_LNKCTL_CCC)) {
bool consistent = true;
 
list_for_each_entry(child, &linkbus->devices, bus_list) {
pcie_capability_read_word(child, PCI_EXP_LNKCTL,
  ®16);
-   if (!(reg16 & PCI_EXP_LNKCTL_CCC)) {
+   if ((reg16 == (u16)~0) || !(reg16 & 
PCI_EXP_LNKCTL_CCC)) {
consistent = false;
break;
}
-- 
2.18.4



[PATCH v4 10/12] PCI/AER: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduce a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 to the if condition to confirm failure.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/pcie/aer.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 3acf56683915..dbeabc370efc 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -829,7 +829,7 @@ static bool is_error_source(struct pci_dev *dev, struct 
aer_err_info *e_info)
 
/* Check if AER is enabled */
pcie_capability_read_word(dev, PCI_EXP_DEVCTL, ®16);
-   if (!(reg16 & PCI_EXP_AER_FLAGS))
+   if ((reg16 == (u16)~0) || !(reg16 & PCI_EXP_AER_FLAGS))
return false;
 
if (!aer)
-- 
2.18.4



[PATCH v4 12/12] PCI: Remove '*val = 0' from pcie_capability_read_*()

2020-07-31 Thread Saheed O. Bolarinwa
There are several reasons why a PCI capability read may fail whether the
device is present or not. If this happens, pcie_capability_read_*() will
return -EINVAL/PCIBIOS_BAD_REGISTER_NUMBER or PCIBIOS_DEVICE_NOT_FOUND
and *val is set to 0.

This behaviour if further ensured by this code inside
pcie_capability_read_*()

 ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
 /*
  * Reset *val to 0 if pci_read_config_dword() fails, it may
  * have been written as 0x if hardware error happens
  * during pci_read_config_dword().
  */
 if (ret)
 *val = 0;
 return ret;

a) Since all pci_generic_config_read() does is read a register value,
it may return success after reading a ~0 which *may* have been fabricated
by the PCI host bridge due to a read timeout. Hence pci_read_config_*()
will return success with a fabricated ~0 in *val, indicating a problem.
In this case, the assumed behaviour of  pcie_capability_read_*() will be
wrong. To avoid error slipping through, more checks are necessary.

b) pci_read_config_*() will return PCIBIOS_DEVICE_NOT_FOUND only if
dev->error_state = pci_channel_io_perm_failure (i.e.
pci_dev_is_disconnected()) or if pci_generic_config_read() can't find the
device. In both cases *val is initially set to ~0 but as shown in the code
above pcie_capability_read_*() resets it back to 0. Even with this effort,
drivers still have to perform validation checks more so if 0 is a valid
value.

Most drivers only consider the case (b) and in some cases, there is the
expectation that on timeout *val has a fabricated value of ~0, which *may*
not always be true as explained in (a).

In any case, checks need to be done to validate the value read and maybe
confirm which error has occurred. It is better left to the drivers to do.

Remove the reset of *val to 0 when pci_read_config_*() fails.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/access.c | 14 --
 1 file changed, 14 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 79c4a2ef269a..ec95edbb1ac8 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -413,13 +413,6 @@ int pcie_capability_read_word(struct pci_dev *dev, int 
pos, u16 *val)
 
if (pcie_capability_reg_implemented(dev, pos)) {
ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
-   /*
-* Reset *val to 0 if pci_read_config_word() fails, it may
-* have been written as 0x if hardware error happens
-* during pci_read_config_word().
-*/
-   if (ret)
-   *val = 0;
return ret;
}
 
@@ -448,13 +441,6 @@ int pcie_capability_read_dword(struct pci_dev *dev, int 
pos, u32 *val)
 
if (pcie_capability_reg_implemented(dev, pos)) {
ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
-   /*
-* Reset *val to 0 if pci_read_config_dword() fails, it may
-* have been written as 0x if hardware error happens
-* during pci_read_config_dword().
-*/
-   if (ret)
-   *val = 0;
return ret;
}
 
-- 
2.18.4



[PATCH v4 08/12] PCI: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduce a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 in the if condition to ensure success or
failure.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/probe.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 2f66988cea25..af95f67c19a7 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1124,7 +1124,7 @@ static void pci_enable_crs(struct pci_dev *pdev)
 
/* Enable CRS Software Visibility if supported */
pcie_capability_read_word(pdev, PCI_EXP_RTCAP, &root_cap);
-   if (root_cap & PCI_EXP_RTCAP_CRSVIS)
+   if ((root_cap != (u16)~0) && (root_cap & PCI_EXP_RTCAP_CRSVIS))
pcie_capability_set_word(pdev, PCI_EXP_RTCTL,
 PCI_EXP_RTCTL_CRSSVE);
 }
@@ -1521,7 +1521,7 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
u32 reg32;
 
pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, ®32);
-   if (reg32 & PCI_EXP_SLTCAP_HPC)
+   if ((reg32 != (u32)~0) && (reg32 & PCI_EXP_SLTCAP_HPC))
pdev->is_hotplug_bridge = 1;
 }
 
@@ -2060,7 +2060,7 @@ bool pcie_relaxed_ordering_enabled(struct pci_dev *dev)
 
pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &v);
 
-   return !!(v & PCI_EXP_DEVCTL_RELAX_EN);
+   return ((v != (u16)~0) && (v & PCI_EXP_DEVCTL_RELAX_EN));
 }
 EXPORT_SYMBOL(pcie_relaxed_ordering_enabled);
 
@@ -2101,11 +2101,11 @@ static void pci_configure_ltr(struct pci_dev *dev)
return;
 
pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
-   if (!(cap & PCI_EXP_DEVCAP2_LTR))
+   if ((cap == (u32)~0) || !(cap & PCI_EXP_DEVCAP2_LTR))
return;
 
pcie_capability_read_dword(dev, PCI_EXP_DEVCTL2, &ctl);
-   if (ctl & PCI_EXP_DEVCTL2_LTR_EN) {
+   if ((ctl != (u32)~0) && (ctl & PCI_EXP_DEVCTL2_LTR_EN)) {
if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
dev->ltr_path = 1;
return;
@@ -2147,7 +2147,7 @@ static void pci_configure_eetlp_prefix(struct pci_dev 
*dev)
return;
 
pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
-   if (!(cap & PCI_EXP_DEVCAP2_EE_PREFIX))
+   if ((cap == (u32)~0) || !(cap & PCI_EXP_DEVCAP2_EE_PREFIX))
return;
 
pcie_type = pci_pcie_type(dev);
-- 
2.18.4



[PATCH v4 09/12] PCI/PM: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduce a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 to ensure success or failure.

pci_enable_atomic_ops_to_root():
Continue looping through the device heirarchy on failure.

pcie_wait_for_link_delay():
Add extra check for ~0 to the condition for breaking out of the
loop. Delay only on success otherwise report error and return
false.

pcie_bandwidth_available():
On read failure move up the device heirarchy and continue.

pcie_get_speed_cap():
On read failure, report error and return PCI_SPEED_UNKNOWN

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/pci.c | 34 --
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index c9338f914a0e..1dd3659f1388 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3216,7 +3216,7 @@ void pci_configure_ari(struct pci_dev *dev)
return;
 
pcie_capability_read_dword(bridge, PCI_EXP_DEVCAP2, &cap);
-   if (!(cap & PCI_EXP_DEVCAP2_ARI))
+   if ((cap == (u32)~0) || !(cap & PCI_EXP_DEVCAP2_ARI))
return;
 
if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI)) {
@@ -3635,13 +3635,13 @@ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, 
u32 cap_mask)
/* Ensure switch ports support AtomicOp routing */
case PCI_EXP_TYPE_UPSTREAM:
case PCI_EXP_TYPE_DOWNSTREAM:
-   if (!(cap & PCI_EXP_DEVCAP2_ATOMIC_ROUTE))
+   if ((cap == (u32)~0) || !(cap & 
PCI_EXP_DEVCAP2_ATOMIC_ROUTE))
return -EINVAL;
break;
 
/* Ensure root port supports all the sizes we care about */
case PCI_EXP_TYPE_ROOT_PORT:
-   if ((cap & cap_mask) != cap_mask)
+   if ((cap == (u32)~0) || ((cap & cap_mask) != cap_mask)
return -EINVAL;
break;
}
@@ -3650,7 +3650,7 @@ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, 
u32 cap_mask)
if (pci_pcie_type(bridge) == PCI_EXP_TYPE_UPSTREAM) {
pcie_capability_read_dword(bridge, PCI_EXP_DEVCTL2,
   &ctl2);
-   if (ctl2 & PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK)
+   if ((ctl2 != (u32)~0) && (ctl2 & 
PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK))
return -EINVAL;
}
 
@@ -4512,7 +4512,7 @@ bool pcie_has_flr(struct pci_dev *dev)
return false;
 
pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap);
-   return cap & PCI_EXP_DEVCAP_FLR;
+   return ((cap != (u32)~0) && (cap & PCI_EXP_DEVCAP_FLR));
 }
 EXPORT_SYMBOL_GPL(pcie_has_flr);
 
@@ -4672,19 +4672,19 @@ static bool pcie_wait_for_link_delay(struct pci_dev 
*pdev, bool active,
for (;;) {
pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA);
-   if (ret == active)
+   if ((lnk_status != (u16)~0) && (ret == active))
break;
if (timeout <= 0)
break;
msleep(10);
timeout -= 10;
}
-   if (active && ret)
+   if ((lnk_status != (u16)~0) && active && ret)
msleep(delay);
-   else if (ret != active)
+   else if ((lnk_status == (u16)~0) || (ret != active))
pci_info(pdev, "Data Link Layer Link Active not %s in 1000 
msec\n",
active ? "set" : "cleared");
-   return ret == active;
+   return ((lnk_status != (u16)~0) && (ret == active));
 }
 
 /**
@@ -5773,6 +5773,11 @@ u32 pcie_bandwidth_available(struct pci_dev *dev, struct 
pci_dev **limiting_dev,
while (dev) {
pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
 
+   if (lnksta == (u16)~0) {
+   dev = pci_upstream_bridge(dev);
+   continue;
+   }
+
next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS];
next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >>
PCI_EXP_LNKSTA_NLW_SHIFT;
@@ -5819,12 +5824,21 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev 
*dev)
 * where only 2.5 GT/s and 5.0 GT/s speeds were defined.
 */
pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2);
+   

[PATCH v4 02/12] misc: rtsx: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_word() sets it's last parameter, val
to 0. In which case (val & PCI_EXP_DEVCTL2_LTR_EN) evaluates to 0.
However, with Patch 12/12, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

Since ~0 is an invalid value here,

Add an extra check for ~0 to the if condition to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/misc/cardreader/rts5227.c | 2 +-
 drivers/misc/cardreader/rts5249.c | 2 +-
 drivers/misc/cardreader/rts5260.c | 2 +-
 drivers/misc/cardreader/rts5261.c | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/cardreader/rts5227.c 
b/drivers/misc/cardreader/rts5227.c
index 3a9467aaa435..cab816639df1 100644
--- a/drivers/misc/cardreader/rts5227.c
+++ b/drivers/misc/cardreader/rts5227.c
@@ -106,7 +106,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
/* Configure LTR */
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cap);
-   if (cap & PCI_EXP_DEVCTL2_LTR_EN)
+   if ((cap != (u16)~0) && (cap & PCI_EXP_DEVCTL2_LTR_EN))
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3);
/* Configure OBFF */
rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03);
diff --git a/drivers/misc/cardreader/rts5249.c 
b/drivers/misc/cardreader/rts5249.c
index 6c6c9e95a29f..4382ac753fda 100644
--- a/drivers/misc/cardreader/rts5249.c
+++ b/drivers/misc/cardreader/rts5249.c
@@ -119,7 +119,7 @@ static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
u16 val;
 
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
-   if (val & PCI_EXP_DEVCTL2_LTR_EN) {
+   if ((val != (u16)~0) && (val & PCI_EXP_DEVCTL2_LTR_EN)) {
option->ltr_enabled = true;
option->ltr_active = true;
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
diff --git a/drivers/misc/cardreader/rts5260.c 
b/drivers/misc/cardreader/rts5260.c
index 7a9dbb778e84..3d52c863 100644
--- a/drivers/misc/cardreader/rts5260.c
+++ b/drivers/misc/cardreader/rts5260.c
@@ -519,7 +519,7 @@ static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
u16 val;
 
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
-   if (val & PCI_EXP_DEVCTL2_LTR_EN) {
+   if ((val != (u16)~0) && (val & PCI_EXP_DEVCTL2_LTR_EN)) {
option->ltr_enabled = true;
option->ltr_active = true;
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
diff --git a/drivers/misc/cardreader/rts5261.c 
b/drivers/misc/cardreader/rts5261.c
index 195822ec858e..7e1188740194 100644
--- a/drivers/misc/cardreader/rts5261.c
+++ b/drivers/misc/cardreader/rts5261.c
@@ -440,7 +440,7 @@ static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
u16 val;
 
pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
-   if (val & PCI_EXP_DEVCTL2_LTR_EN) {
+   if ((val != (u16)~0) && (val & PCI_EXP_DEVCTL2_LTR_EN)) {
option->ltr_enabled = true;
option->ltr_active = true;
rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
-- 
2.18.4



[PATCH v4 06/12] PCI: pciehp: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_word() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set to
~0 on failure. This introduces a bug because (x & x) == (~0 & x).

Since ~0 is an invalid value here,

pciehp_get_power_status():
Add an extra check for ~0 on the value read. If found, set status
to 'Power On' and return.

pcie_wait_for_presence():
Add an extra check for no ~0 to the exit condition of the loop

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/hotplug/pciehp_hpc.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index b89c9ee4a3b5..39305aabc3a2 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -278,7 +278,7 @@ static void pcie_wait_for_presence(struct pci_dev *pdev)
 
do {
pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
-   if (slot_status & PCI_EXP_SLTSTA_PDS)
+   if ((slot_status != (u16)~0) && (slot_status & 
PCI_EXP_SLTSTA_PDS))
return;
msleep(10);
timeout -= 10;
@@ -399,6 +399,11 @@ void pciehp_get_power_status(struct controller *ctrl, u8 
*status)
ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
 
+   if (slot_ctrl == (u16)~0) {
+   *status = 1;/* On */
+   return;
+   }
+
switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) {
case PCI_EXP_SLTCTL_PWR_OFF:
*status = 0;/* Off */
-- 
2.18.4



[PATCH v4 01/12] IB/hfi1: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_dword() sets it's last parameter,
val to 0. In this case dn and up will be 0, so aspm_hw_l1_supported()
will return false.
However, with Patch 12/12, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x). So
with dn and up being 0x02, a true value is return when the read has
actually failed.

Since, the value ~0 is invalid here,

Reset dn and up to 0 when a value of ~0 is read into them, this
ensures false is returned on failure in this case.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---

 drivers/infiniband/hw/hfi1/aspm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/aspm.c 
b/drivers/infiniband/hw/hfi1/aspm.c
index a3c53be4072c..9605b2145d19 100644
--- a/drivers/infiniband/hw/hfi1/aspm.c
+++ b/drivers/infiniband/hw/hfi1/aspm.c
@@ -33,13 +33,13 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
return false;
 
pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
-   dn = ASPM_L1_SUPPORTED(dn);
+   dn = (dn == (u32)~0) ? 0 : ASPM_L1_SUPPORTED(dn);
 
pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
-   up = ASPM_L1_SUPPORTED(up);
+   up = (up == (u32)~0) ? 0 : ASPM_L1_SUPPORTED(up);
 
/* ASPM works on A-step but is reported as not supported */
-   return (!!dn || is_ax(dd)) && !!up;
+   return (dn || is_ax(dd)) && up;
 }
 
 /* Set L1 entrance latency for slower entry to L1 */
-- 
2.18.4



[PATCH v4 05/12] PCI: pciehp: Set "Power On" as the default get_power_status

2020-07-31 Thread Saheed O. Bolarinwa
The default case of the switch statement is redundant since
PCI_EXP_SLTCTL_PCC is only a single bit.

Set the default case in the switch-statement to set status
to "Power On"

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/hotplug/pciehp_hpc.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 53433b37e181..b89c9ee4a3b5 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -400,14 +400,12 @@ void pciehp_get_power_status(struct controller *ctrl, u8 
*status)
 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
 
switch (slot_ctrl & PCI_EXP_SLTCTL_PCC) {
-   case PCI_EXP_SLTCTL_PWR_ON:
-   *status = 1;/* On */
-   break;
case PCI_EXP_SLTCTL_PWR_OFF:
*status = 0;/* Off */
break;
+   case PCI_EXP_SLTCTL_PWR_ON:
default:
-   *status = 0xFF;
+   *status = 1;/* On */
break;
}
 }
-- 
2.18.4



[PATCH v4 03/12] ath9k: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set to ~0
on failure. This would introduce a bug because (x & x) == (~0 & x).

Since ~0 is an invalid value here,

Add an extra check for ~0 to the if condition to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/net/wireless/ath/ath9k/pci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/ath/ath9k/pci.c 
b/drivers/net/wireless/ath/ath9k/pci.c
index f3461b193c7a..f02b243befef 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -867,7 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common)
pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
 
pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
-   if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
+   if ((aspm != (u16)~0) &&
+   (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1))) {
ah->aspm_enabled = true;
/* Initialize PCIe PM and SERDES registers. */
ath9k_hw_configpcipowersave(ah, false);
-- 
2.18.4



[PATCH v4 07/12] PCI/ACPI: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_*() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set
to ~0 on failure. This would introduces a bug because
(x & x) == (~0 & x).

Since ~0 is an invalid value in here,

Add extra check for ~0 in the if condition to ensure success or
failure.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/pci/pci-acpi.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 7224b1e5f2a8..873b005947e4 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -253,7 +253,7 @@ static bool pcie_root_rcb_set(struct pci_dev *dev)
return false;
 
pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
-   if (lnkctl & PCI_EXP_LNKCTL_RCB)
+   if ((lnkctl != (u16)~0) && (lnkctl & PCI_EXP_LNKCTL_RCB))
return true;
 
return false;
@@ -797,7 +797,7 @@ bool pciehp_is_native(struct pci_dev *bridge)
return false;
 
pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap);
-   if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
+   if ((slot_cap == (u32)~0) || !(slot_cap & PCI_EXP_SLTCAP_HPC))
return false;
 
if (pcie_ports_native)
-- 
2.18.4



[PATCH v4 04/12] iwlegacy: Check if pcie_capability_read_*() reads ~0

2020-07-31 Thread Saheed O. Bolarinwa
On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 12/12, it is possible that val is set to ~0
on failure. This would introduce a bug because (x & x) == (~0 & x).

Since ~0 is an invalid value here,

Add an extra check for ~0 to the if condition to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Saheed O. Bolarinwa 
---
 drivers/net/wireless/intel/iwlegacy/common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/intel/iwlegacy/common.c 
b/drivers/net/wireless/intel/iwlegacy/common.c
index 348c17ce72f5..659027563260 100644
--- a/drivers/net/wireless/intel/iwlegacy/common.c
+++ b/drivers/net/wireless/intel/iwlegacy/common.c
@@ -4287,7 +4287,7 @@ il_apm_init(struct il_priv *il)
 */
if (il->cfg->set_l0s) {
pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
-   if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
+   if ((lctl != (u16)~0) && (lctl & PCI_EXP_LNKCTL_ASPM_L1)) {
/* L1-ASPM enabled; disable(!) L0S  */
il_set_bit(il, CSR_GIO_REG,
   CSR_GIO_REG_VAL_L0S_ENABLED);
-- 
2.18.4



[PATCH v4 00/12] PCI: Remove '*val = 0' from pcie_capability_read_*()

2020-07-31 Thread Saheed O. Bolarinwa
v4 CHANGES:
- Drop uses of pcie_capability_read_*() return value. This related to
  [1] which is pointing towards making the accessors return void.
- Remove patches found to be unnecessary
- Reword some commit messages

v3 CHANGES:
- Split previous PATCH 6/13 into two : PATCH 6/14 and PATCH 7/14
- Fix commit message of PATCH 5/14
- Update Patch numbering and Commit messages
- Add 'Acked by Greg KH' to PATCH 2/14
- Add PATCH version

v2 CHANGES:
- Fix missing comma, causing the email cc error
- Fix typos and numbering errors in commit messages
- Add commit message to 13/13
- Add two more patches: PATCH 3/13 and PATCH 4/13

MERGING:
- Patch 6/12 depends on Patch 5/12. However Patch 5/12 has no dependency.
  Please, merge PATCH 6/12 only after Patch 5/12.
- Patch 12/12 depends on all preceding patches. Please merge Patch 12/12
  only after other patches in this series have been merged.
- All other patches have no dependencies besides those mentioned above and
  can be merge individually.

PATCH 5/12:
Set the default case in the switch-statement to set status
to "Power On".

PATCH 1/12 to 11/12:
Use the value read by pcie_capability_read_*() to determine success or
failure. This is done by checking if it is ~0, while maintaining the
functions' behaviour. This ensures that the changes in PATCH 12/12 does
not introduce any bug.

PATCH 12/12:
There are several reasons why a PCI capability read may fail whether the
device is present or not. If this happens, pcie_capability_read_*() will
return -EINVAL/PCIBIOS_BAD_REGISTER_NUMBER or PCIBIOS_DEVICE_NOT_FOUND
and *val is set to 0.

This behaviour if further ensured by this code inside
pcie_capability_read_*()

 ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
 /*
  * Reset *val to 0 if pci_read_config_dword() fails, it may
  * have been written as 0x if hardware error happens
  * during pci_read_config_dword().
  */
 if (ret)
 *val = 0;
 return ret;

a) Since all pci_generic_config_read() does is read a register value,
it may return success after reading a ~0 which *may* have been fabricated
by the PCI host bridge due to a read timeout. Hence pci_read_config_*() 
will return success with a fabricated ~0 in *val, indicating a problem.
In this case, the assumed behaviour of  pcie_capability_read_*() will be
wrong. To avoid error slipping through, more checks are necessary.

b) pci_read_config_*() will return PCIBIOS_DEVICE_NOT_FOUND only if 
dev->error_state = pci_channel_io_perm_failure (i.e. 
pci_dev_is_disconnected()) or if pci_generic_config_read() can't find the
device. In both cases *val is initially set to ~0 but as shown in the code
above pcie_capability_read_*() resets it back to 0. Even with this effort,
drivers still have to perform validation checks more so if 0 is a valid
value.

Most drivers only consider the case (b) and in some cases, there is the 
expectation that on timeout *val has a fabricated value of ~0, which *may*
not always be true as explained in (a).

In any case, checks need to be done to validate the value read and maybe
confirm which error has occurred. It is better left to the drivers to do.

Check the return value of pcie_capability_read_dword() to ensure success
and avoid bug as a result of Patch 14/14.
Remove the reset of *val to 0 when pci_read_config_*() fails.

[1] 
https://lore.kernel.org/linux-pci/20200714234625.GA428442@bjorn-Precision-5520/


Saheed O. Bolarinwa (12):
  IB/hfi1: Check if pcie_capability_read_*() reads ~0
  misc: rtsx: Check if pcie_capability_read_*() reads ~0
  ath9k: Check if pcie_capability_read_*() reads ~0
  iwlegacy: Check if pcie_capability_read_*() reads ~0
  PCI: pciehp: Set "Power On" as the default get_power_status
  PCI: pciehp: Check if pcie_capability_read_*() reads ~0
  PCI/ACPI: Check if pcie_capability_read_*() reads ~0
  PCI: Check if pcie_capability_read_*() reads ~0
  PCI/PM: Check if pcie_capability_read_*() reads ~0
  PCI/AER: Check if pcie_capability_read_*() reads ~0
  PCI/ASPM: Check if pcie_capability_read_*() reads ~0
  PCI: Remove '*val = 0' from pcie_capability_read_*()

 drivers/infiniband/hw/hfi1/aspm.c|  6 ++--
 drivers/misc/cardreader/rts5227.c|  2 +-
 drivers/misc/cardreader/rts5249.c|  2 +-
 drivers/misc/cardreader/rts5260.c|  2 +-
 drivers/misc/cardreader/rts5261.c|  2 +-
 drivers/net/wireless/ath/ath9k/pci.c |  3 +-
 drivers/net/wireless/intel/iwlegacy/common.c |  2 +-
 drivers/pci/access.c | 14 
 drivers/pci/hotplug/pciehp_hpc.c | 13 +---
 drivers/pci/pci-acpi.c   |  4 +--
 drivers/pci/pci.c| 34 ++--
 drivers/pci/pcie/aer.c   |  2 +-
 drivers/pci/pcie/aspm.c  | 10 +++---
 drivers/pci/probe.c  | 12 +++
 14 files changed, 56 insertions(+), 52 deletions(-)

-- 
2.18.4



[PATCH 4/14 v3] iwlegacy: Check the return value of pcie_capability_read_*()

2020-07-13 Thread Saheed O. Bolarinwa
From: Bolarinwa Olayemi Saheed 

On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

This bug can be avoided without changing the function's behaviour if the
return value of pcie_capability_read_dword is checked to confirm success.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Bolarinwa Olayemi Saheed 

---
 drivers/net/wireless/intel/iwlegacy/common.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/intel/iwlegacy/common.c 
b/drivers/net/wireless/intel/iwlegacy/common.c
index 348c17ce72f5..f78e062df572 100644
--- a/drivers/net/wireless/intel/iwlegacy/common.c
+++ b/drivers/net/wireless/intel/iwlegacy/common.c
@@ -4286,8 +4286,8 @@ il_apm_init(struct il_priv *il)
 *power savings, even without L1.
 */
if (il->cfg->set_l0s) {
-   pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
-   if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
+   ret = pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, 
&lctl);
+   if (!ret && (lctl & PCI_EXP_LNKCTL_ASPM_L1)) {
/* L1-ASPM enabled; disable(!) L0S  */
il_set_bit(il, CSR_GIO_REG,
   CSR_GIO_REG_VAL_L0S_ENABLED);
-- 
2.18.2



[PATCH 12/14 v3] PCI/AER: Check the return value of pcie_capability_read_*()

2020-07-13 Thread Saheed O. Bolarinwa
From: Bolarinwa Olayemi Saheed 

On failure pcie_capability_read_dword() sets it's last parameter,
val to 0.
However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

This bug can be avoided if the return value of pcie_capability_read_word
is checked to confirm success.

Check the return value of pcie_capability_read_word() to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Bolarinwa Olayemi Saheed 
---
 drivers/pci/pcie/aer.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index 3acf56683915..f4beb47c622c 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -800,6 +800,7 @@ static bool is_error_source(struct pci_dev *dev, struct 
aer_err_info *e_info)
int aer = dev->aer_cap;
u32 status, mask;
u16 reg16;
+   int ret;
 
/*
 * When bus id is equal to 0, it might be a bad id
@@ -828,8 +829,8 @@ static bool is_error_source(struct pci_dev *dev, struct 
aer_err_info *e_info)
return false;
 
/* Check if AER is enabled */
-   pcie_capability_read_word(dev, PCI_EXP_DEVCTL, ®16);
-   if (!(reg16 & PCI_EXP_AER_FLAGS))
+   ret = pcie_capability_read_word(dev, PCI_EXP_DEVCTL, ®16);
+   if (ret || !(reg16 & PCI_EXP_AER_FLAGS))
return false;
 
if (!aer)
-- 
2.18.2



[PATCH 8/14 v3] PCI/ACPI: Check the return value of pcie_capability_read_*()

2020-07-13 Thread Saheed O. Bolarinwa
From: Bolarinwa Olayemi Saheed 

On failure pcie_capability_read_dword() sets it's last parameter,
val to 0.
However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x). 

This bug can be avoided if the return value of pcie_capability_read_word
is checked to confirm success.

Check the return value of pcie_capability_read_word() to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Bolarinwa Olayemi Saheed 
---
 drivers/pci/pci-acpi.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index 7224b1e5f2a8..39eb816bc3b8 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -248,12 +248,13 @@ static bool pcie_root_rcb_set(struct pci_dev *dev)
 {
struct pci_dev *rp = pcie_find_root_port(dev);
u16 lnkctl;
+   int ret;
 
if (!rp)
return false;
 
-   pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
-   if (lnkctl & PCI_EXP_LNKCTL_RCB)
+   ret = pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
+   if (!ret && (lnkctl & PCI_EXP_LNKCTL_RCB))
return true;
 
return false;
@@ -792,12 +793,13 @@ bool pciehp_is_native(struct pci_dev *bridge)
 {
const struct pci_host_bridge *host;
u32 slot_cap;
+   int ret;
 
if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
return false;
 
-   pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap);
-   if (!(slot_cap & PCI_EXP_SLTCAP_HPC))
+   ret = pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap);
+   if (ret || !(slot_cap & PCI_EXP_SLTCAP_HPC))
return false;
 
if (pcie_ports_native)
-- 
2.18.2



[PATCH 3/14 v3] ath9k: Check the return value of pcie_capability_read_*()

2020-07-13 Thread Saheed O. Bolarinwa
From: Bolarinwa Olayemi Saheed 

On failure pcie_capability_read_dword() sets it's last parameter, val
to 0. However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x).

This bug can be avoided without changing the function's behaviour if the
return value of pcie_capability_read_dword is checked to confirm success.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Bolarinwa Olayemi Saheed 

---
 drivers/net/wireless/ath/ath9k/pci.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/pci.c 
b/drivers/net/wireless/ath/ath9k/pci.c
index f3461b193c7a..cff9af3af38d 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -825,6 +825,7 @@ static void ath_pci_aspm_init(struct ath_common *common)
struct pci_dev *pdev = to_pci_dev(sc->dev);
struct pci_dev *parent;
u16 aspm;
+   int ret;
 
if (!ah->is_pciexpress)
return;
@@ -866,8 +867,8 @@ static void ath_pci_aspm_init(struct ath_common *common)
if (AR_SREV_9462(ah))
pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);
 
-   pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
-   if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
+   ret = pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
+   if (!ret && (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | 
PCI_EXP_LNKCTL_ASPM_L1))) {
ah->aspm_enabled = true;
/* Initialize PCIe PM and SERDES registers. */
ath9k_hw_configpcipowersave(ah, false);
-- 
2.18.2



[PATCH 1/14 v3] IB/hfi1: Check the return value of pcie_capability_read_*()

2020-07-13 Thread Saheed O. Bolarinwa
From: Bolarinwa Olayemi Saheed 

On failure pcie_capability_read_dword() sets it's last parameter,
val to 0. In this case dn and up will be 0, so aspm_hw_l1_supported()
will return false.
However, with Patch 14/14, it is possible that val is set to ~0 on
failure. This would introduce a bug because (x & x) == (~0 & x). So with
dn and up being 0x02, a true value is return when the read has actually
failed.

This bug can be avoided if the return value of pcie_capability_read_dword
is checked to confirm success. The behaviour of the function remains
intact.

Check the return value of pcie_capability_read_dword() to ensure success.

Suggested-by: Bjorn Helgaas 
Signed-off-by: Bolarinwa Olayemi Saheed 
---
 drivers/infiniband/hw/hfi1/aspm.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/aspm.c 
b/drivers/infiniband/hw/hfi1/aspm.c
index a3c53be4072c..80d0b3edd983 100644
--- a/drivers/infiniband/hw/hfi1/aspm.c
+++ b/drivers/infiniband/hw/hfi1/aspm.c
@@ -24,6 +24,7 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
 {
struct pci_dev *parent = dd->pcidev->bus->self;
u32 up, dn;
+   int ret_up, ret_dn;
 
/*
 * If the driver does not have access to the upstream component,
@@ -32,14 +33,14 @@ static bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
if (!parent)
return false;
 
-   pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
+   ret_dn = pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
dn = ASPM_L1_SUPPORTED(dn);
 
-   pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
+   ret_up = pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
up = ASPM_L1_SUPPORTED(up);
 
/* ASPM works on A-step but is reported as not supported */
-   return (!!dn || is_ax(dd)) && !!up;
+   return !!ret_dn && !!ret_up && (!!dn || is_ax(dd)) && !!up;
 }
 
 /* Set L1 entrance latency for slower entry to L1 */
-- 
2.18.2



[RFC PATCH 08/35] PCI: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 07/35

 drivers/pci/pci-bridge-emul.c  | 2 +-
 drivers/pci/pci.c  | 8 
 drivers/pci/pcie/bw_notification.c | 4 ++--
 drivers/pci/probe.c| 4 ++--
 drivers/pci/quirks.c   | 4 ++--
 drivers/pci/syscall.c  | 8 
 6 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index 9695c453e197..c270c18d5cf5 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -400,7 +400,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul 
*bridge, int where,
return PCIBIOS_BAD_REGISTER_NUMBER;
 
ret = pci_bridge_emul_conf_read(bridge, reg, 4, &old);
-   if (ret != 0)
+   if (ret)
return ret;
 
if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a74547861d5e..4b2a348576cb 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -185,7 +185,7 @@ int pci_status_get_and_clear_errors(struct pci_dev *pdev)
int ret;
 
ret = pci_read_config_word(pdev, PCI_STATUS, &status);
-   if (ret != 0)
+   if (ret)
return -EIO;
 
status &= PCI_STATUS_ERROR_BITS;
@@ -534,7 +534,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int 
start, int cap)
if (start)
pos = start;
 
-   if (pci_read_config_dword(dev, pos, &header) != 0)
+   if (pci_read_config_dword(dev, pos, &header))
return 0;
 
/*
@@ -552,7 +552,7 @@ int pci_find_next_ext_capability(struct pci_dev *dev, int 
start, int cap)
if (pos < PCI_CFG_SPACE_SIZE)
break;
 
-   if (pci_read_config_dword(dev, pos, &header) != 0)
+   if (pci_read_config_dword(dev, pos, &header))
break;
}
 
@@ -628,7 +628,7 @@ static int __pci_find_next_ht_cap(struct pci_dev *dev, int 
pos, int ht_cap)
  PCI_CAP_ID_HT, &ttl);
while (pos) {
rc = pci_read_config_byte(dev, pos + 3, &cap);
-   if (rc != 0)
+   if (rc)
return 0;
 
if ((cap & mask) == ht_cap)
diff --git a/drivers/pci/pcie/bw_notification.c 
b/drivers/pci/pcie/bw_notification.c
index c7201d886026..f62c19ffedfc 100644
--- a/drivers/pci/pcie/bw_notification.c
+++ b/drivers/pci/pcie/bw_notification.c
@@ -23,7 +23,7 @@ static bool pcie_link_bandwidth_notification_supported(struct 
pci_dev *dev)
u32 lnk_cap;
 
ret = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnk_cap);
-   return (ret == 0) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
+   return (!ret) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
 }
 
 static void pcie_enable_link_bandwidth_notification(struct pci_dev *dev)
@@ -56,7 +56,7 @@ static irqreturn_t pcie_bw_notification_irq(int irq, void 
*context)
ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status);
events = link_status & PCI_EXP_LNKSTA_LBMS;
 
-   if (ret != 0 || !events)
+   if (ret || !events)
return IRQ_NONE;
 
pcie_capability_write_word(port, PCI_EXP_LNKSTA, events);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index ab7e19882b30..60ecebbc7dcf 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1582,7 +1582,7 @@ static bool pci_ext_cfg_is_aliased(struct pci_dev *dev)
 
for (pos = PCI_CFG_SPACE_SIZE;
 pos < PCI_CFG_SPACE_EXP_SIZE; pos += PCI_CFG_SPACE_SIZE) {
-   if (pci_read_config_dword(dev, pos, &tmp) != 0
+   if (pci_read_config_dword(dev, pos, &tmp)
|| header != tmp)
return false;
}
@@ -1609,7 +1609,7 @@ static int pci_cfg_space_size_ext(struct pci_dev *dev)
u32 status;
int pos = PCI_CFG_SPACE_SIZE;
 
-   if (pci_read_config_dword(dev, pos, &status) != 0)
+   if (pci_read_config_dword(dev, pos, &status))
return PCI_CFG_SPACE_SIZE;
if (status == 0x || pci_ext_cfg_is_aliased(dev))
return PCI_CFG_SPACE_SIZE;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index e60ef8abd698..8b69d6ebb619 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -5116,8 +5116,8 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 
pdev->cfg_size = PCI_CFG_SPACE_EXP_SIZE;
-   if (pci_read_config_dword(pdev, PCI_CFG_SPACE_SIZE, &status) !=
-   0 || (status == 0x))
+   if (pci_read_config_dword(pdev, 

[RFC PATCH 09/35] nvme-pci: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/nvme/host/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index b1d18f0633c7..d426efb53f44 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 
csts)
 
result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
  &pci_status);
-   if (result == PCIBIOS_SUCCESSFUL)
+   if (result == 0)
dev_warn(dev->ctrl.device,
 "controller is down; will reset: CSTS=0x%x, 
PCI_STATUS=0x%hx\n",
 csts, pci_status);
-- 
2.18.2



[RFC PATCH 06/35] PCI: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 05/35

 drivers/pci/controller/dwc/pci-meson.c| 2 +-
 drivers/pci/controller/dwc/pcie-designware-host.c | 2 +-
 drivers/pci/controller/pci-xgene.c| 3 +--
 drivers/pci/controller/pcie-altera.c  | 4 ++--
 drivers/pci/controller/pcie-iproc.c   | 2 +-
 drivers/pci/controller/pcie-rcar-host.c   | 4 ++--
 6 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-meson.c 
b/drivers/pci/controller/dwc/pci-meson.c
index 58142f03d300..8203d5f95d28 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -390,7 +390,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int 
where, int size,
int ret;
 
ret = dw_pcie_read(pci->dbi_base + where, size, val);
-   if (ret != 0)
+   if (ret)
return ret;
 
/*
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c 
b/drivers/pci/controller/dwc/pcie-designware-host.c
index 7c97c54f787c..2dd3965365f6 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -459,7 +459,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
}
 
ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
-   if (ret != 0) {
+   if (ret) {
dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg 
(ret: 0x%x)\n",
ret);
ret = pcibios_err_to_errno(ret);
diff --git a/drivers/pci/controller/pci-xgene.c 
b/drivers/pci/controller/pci-xgene.c
index bf74f0a8b451..8d55cfc4ff8a 100644
--- a/drivers/pci/controller/pci-xgene.c
+++ b/drivers/pci/controller/pci-xgene.c
@@ -167,8 +167,7 @@ static int xgene_pcie_config_read32(struct pci_bus *bus, 
unsigned int devfn,
 {
struct xgene_pcie_port *port = pcie_bus_to_port(bus);
 
-   if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val) !=
-   0)
+   if (pci_generic_config_read32(bus, devfn, where & ~0x3, 4, val))
return PCIBIOS_DEVICE_NOT_FOUND;
 
/*
diff --git a/drivers/pci/controller/pcie-altera.c 
b/drivers/pci/controller/pcie-altera.c
index 96f5bda32b58..9f7b12ad0c04 100644
--- a/drivers/pci/controller/pcie-altera.c
+++ b/drivers/pci/controller/pcie-altera.c
@@ -367,7 +367,7 @@ static int tlp_cfg_dword_write(struct altera_pcie *pcie, u8 
bus, u32 devfn,
value, false);
 
ret = pcie->pcie_data->ops->tlp_read_pkt(pcie, NULL);
-   if (ret != 0)
+   if (ret)
return ret;
 
/*
@@ -453,7 +453,7 @@ static int _altera_pcie_cfg_read(struct altera_pcie *pcie, 
u8 busno,
 
ret = tlp_cfg_dword_read(pcie, busno, devfn,
 (where & ~DWORD_MASK), byte_en, &data);
-   if (ret != 0)
+   if (ret)
return ret;
 
switch (size) {
diff --git a/drivers/pci/controller/pcie-iproc.c 
b/drivers/pci/controller/pcie-iproc.c
index dac9352c0cb2..d34c9457fbe4 100644
--- a/drivers/pci/controller/pcie-iproc.c
+++ b/drivers/pci/controller/pcie-iproc.c
@@ -584,7 +584,7 @@ static int iproc_pcie_config_read(struct pci_bus *bus, 
unsigned int devfn,
/* root complex access */
if (busno == 0) {
ret = pci_generic_config_read32(bus, devfn, where, size, val);
-   if (ret == 0)
+   if (!ret)
iproc_pcie_fix_cap(pcie, where, val);
 
return ret;
diff --git a/drivers/pci/controller/pcie-rcar-host.c 
b/drivers/pci/controller/pcie-rcar-host.c
index 363a8630de28..2bb250c6f767 100644
--- a/drivers/pci/controller/pcie-rcar-host.c
+++ b/drivers/pci/controller/pcie-rcar-host.c
@@ -157,7 +157,7 @@ static int rcar_pcie_read_conf(struct pci_bus *bus, 
unsigned int devfn,
 
ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
  bus, devfn, where, val);
-   if (ret != 0) {
+   if (ret) {
*val = 0x;
return ret;
}
@@ -184,7 +184,7 @@ static int rcar_pcie_write_conf(struct pci_bus *bus, 
unsigned int devfn,
 
ret = rcar_pcie_config_access(host, RCAR_PCI_ACCESS_READ,
  bus, devfn, where, &data);
-   if (ret != 0)
+   if (ret)
return ret;
 
dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x 
where=0x%04x size=%d val=0x%08x\n",
-- 
2.18.2



[RFC PATCH 03/35] scsi: ipr: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/scsi/ipr.c | 16 
 drivers/scsi/pmcraid.c |  6 +++---
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 7d86f4ca266c..b6c52a04cf52 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -775,7 +775,7 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg 
*ioa_cfg)
return 0;
 
if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-&ioa_cfg->saved_pcix_cmd_reg) != 
PCIBIOS_SUCCESSFUL) {
+&ioa_cfg->saved_pcix_cmd_reg) != 0) {
dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command 
register\n");
return -EIO;
}
@@ -797,7 +797,7 @@ static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 
if (pcix_cmd_reg) {
if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + 
PCI_X_CMD,
- ioa_cfg->saved_pcix_cmd_reg) != 
PCIBIOS_SUCCESSFUL) {
+ ioa_cfg->saved_pcix_cmd_reg) != 0) {
dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X 
command register\n");
return -EIO;
}
@@ -8739,7 +8739,7 @@ static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
 static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
 {
struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
-   int rc = PCIBIOS_SUCCESSFUL;
+   int rc = 0;
 
ENTER;
if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
@@ -8748,7 +8748,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
else
rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, 
PCI_BIST_START);
 
-   if (rc == PCIBIOS_SUCCESSFUL) {
+   if (rc == 0) {
ipr_cmd->job_step = ipr_reset_bist_done;
ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
rc = IPR_RC_JOB_RETURN;
@@ -8946,7 +8946,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
ENTER;
rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
 
-   if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
+   if ((rc == 0) && (cmd_reg & PCI_COMMAND_MEMORY)) {
ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
writel(IPR_UPROCI_RESET_ALERT, 
ioa_cfg->regs.set_uproc_interrupt_reg32);
ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
@@ -10154,7 +10154,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
struct Scsi_Host *host;
unsigned long ipr_regs_pci;
void __iomem *ipr_regs;
-   int rc = PCIBIOS_SUCCESSFUL;
+   int rc = 0;
volatile u32 mask, uproc, interrupts;
unsigned long lock_flags, driver_lock_flags;
unsigned int irq_flag;
@@ -10256,7 +10256,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
   ioa_cfg->chip_cfg->cache_line_size);
 
-   if (rc != PCIBIOS_SUCCESSFUL) {
+   if (rc != 0) {
dev_err(&pdev->dev, "Write of cache line size failed\n");
ipr_wait_for_pci_err_recovery(ioa_cfg);
rc = -EIO;
@@ -10337,7 +10337,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
/* Save away PCI config space for use following IOA reset */
rc = pci_save_state(pdev);
 
-   if (rc != PCIBIOS_SUCCESSFUL) {
+   if (rc != 0) {
dev_err(&pdev->dev, "Failed to save PCI config space\n");
rc = -EIO;
goto cleanup_nolog;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index aa9ae2ae8579..5f6e440f0dcd 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -553,7 +553,7 @@ static void pmcraid_bist_done(struct timer_list *t)
rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
 
/* If PCI config space can't be accessed wait for another two secs */
-   if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
+   if ((rc != 0 || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
cmd->time_left > 0) {
pmcraid_info("BIST not complete, waiting another 2 secs\n");
cmd->timer.expires = jiffies + cmd->time_left;
@@ -649,7 +649,7 @@ static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
 * BIST or slot_reset
 */
rc = pci_read_config_word(pinstance->pdev, PCI

[RFC PATCH 14/35] i2c/busses: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/i2c/busses/i2c-ali15x3.c |  4 ++--
 drivers/i2c/busses/i2c-nforce2.c |  2 +-
 drivers/i2c/busses/i2c-sis5595.c | 10 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 02185a1cfa77..359ee3e0864a 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -167,11 +167,11 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
if(force_addr) {
dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
ali15x3_smba);
-   if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
+   if (0 != pci_write_config_word(ALI15X3_dev,
SMBBA,
ali15x3_smba))
goto error;
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
+   if (0 != pci_read_config_word(ALI15X3_dev,
SMBBA, &a))
goto error;
if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 777278386f58..385f4f446f36 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -328,7 +328,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, 
int alt_reg,
u16 iobase;
 
if (pci_read_config_word(dev, alt_reg, &iobase)
-   != PCIBIOS_SUCCESSFUL) {
+   != 0) {
dev_err(&dev->dev, "Error reading PCI config for %s\n",
name);
return -EIO;
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index c793a5c14cda..fbe3ee31eae3 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -176,10 +176,10 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
if (force_addr) {
dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", 
sis5595_base);
if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
-   != PCIBIOS_SUCCESSFUL)
+   != 0)
goto error;
if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
-   != PCIBIOS_SUCCESSFUL)
+   != 0)
goto error;
if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
/* doesn't work for some chips! */
@@ -189,15 +189,15 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
}
 
if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-   != PCIBIOS_SUCCESSFUL)
+   != 0)
goto error;
if ((val & 0x80) == 0) {
dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val 
| 0x80)
-   != PCIBIOS_SUCCESSFUL)
+   != 0)
goto error;
if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-   != PCIBIOS_SUCCESSFUL)
+   != 0)
goto error;
if ((val & 0x80) == 0) {
/* doesn't work for some chips? */
-- 
2.18.2



[RFC PATCH 16/35] hwmon: (sis5595) Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/hwmon/sis5595.c | 8 
 drivers/hwmon/via686a.c | 8 
 drivers/hwmon/vt8231.c  | 8 
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 0c6741f949f5..0ea174fb3048 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -825,7 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
}
 
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
dev_err(&dev->dev, "Failed to read ISA address\n");
return -ENODEV;
@@ -843,16 +843,16 @@ static int sis5595_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
dev_err(&dev->dev, "Failed to read enable register\n");
return -ENODEV;
}
if (!(enable & 0x80)) {
-   if ((PCIBIOS_SUCCESSFUL !=
+   if ((0 !=
 pci_write_config_byte(dev, SIS5595_ENABLE_REG,
   enable | 0x80))
-|| (PCIBIOS_SUCCESSFUL !=
+|| (0 !=
 pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
 || (!(enable & 0x80))) {
/* doesn't work for some chips! */
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index a2eddd2c2538..cffea688878f 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -863,11 +863,11 @@ static int via686a_pci_probe(struct pci_dev *dev,
if (force_addr) {
address = force_addr & ~(VIA686A_EXTENT - 1);
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
return -ENODEV;
}
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_read_config_word(dev, VIA686A_BASE_REG, &val))
return -ENODEV;
 
@@ -878,7 +878,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
return -ENODEV;
if (!(val & 0x0001)) {
@@ -890,7 +890,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
}
 
dev_warn(&dev->dev, "Enabling sensors\n");
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_write_config_word(dev, VIA686A_ENABLE_REG,
  val | 0x0001))
return -ENODEV;
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 2335d440f72d..cc1d24c2a2c8 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -987,12 +987,12 @@ static int vt8231_pci_probe(struct pci_dev *dev,
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n",
 address);
 
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_BASE_REG,
+   if (0 != pci_read_config_word(dev, VT8231_BASE_REG,
&val))
return -ENODEV;
 
@@ -1002,13 +1002,13 @@ static int vt8231_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_ENABLE_REG,
+   if (0 != pci_read_config_word(dev, VT8231_ENABLE_REG,
&val))
return -ENODEV;
 
if (!(val & 0x0001)) {
dev_warn(&dev->dev, "enabling sensors\n");
-   if (PCIBIOS_SUCCESSFUL !=
+   if (0 !=
pci_write_config_word(dev, VT8231_ENABLE_REG,
val | 0x0001))
return -ENODEV;
-- 
2.18.2



[RFC PATCH 26/35] powerpc: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/powerpc/kernel/rtas_pci.c |  4 ++--
 arch/powerpc/platforms/4xx/pci.c   |  4 ++--
 arch/powerpc/platforms/52xx/efika.c|  4 ++--
 arch/powerpc/platforms/52xx/mpc52xx_pci.c  |  4 ++--
 arch/powerpc/platforms/82xx/pq2.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_cds.c  |  2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c   |  2 +-
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |  2 +-
 arch/powerpc/platforms/chrp/pci.c  |  8 
 arch/powerpc/platforms/embedded6xx/holly.c |  2 +-
 .../platforms/embedded6xx/mpc7448_hpc2.c   |  2 +-
 arch/powerpc/platforms/fsl_uli1575.c   |  2 +-
 arch/powerpc/platforms/maple/pci.c | 18 +-
 arch/powerpc/platforms/pasemi/pci.c|  6 +++---
 arch/powerpc/platforms/powermac/pci.c  |  8 
 arch/powerpc/platforms/powernv/eeh-powernv.c   |  4 ++--
 arch/powerpc/platforms/powernv/pci.c   |  4 ++--
 arch/powerpc/platforms/pseries/eeh_pseries.c   |  4 ++--
 arch/powerpc/sysdev/fsl_pci.c  |  2 +-
 arch/powerpc/sysdev/indirect_pci.c |  4 ++--
 arch/powerpc/sysdev/tsi108_pci.c   |  4 ++--
 21 files changed, 46 insertions(+), 46 deletions(-)

diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 781c1869902e..18108ed9284c 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -71,7 +71,7 @@ int rtas_read_config(struct pci_dn *pdn, int where, int size, 
u32 *val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int rtas_pci_read_config(struct pci_bus *bus,
@@ -121,7 +121,7 @@ int rtas_write_config(struct pci_dn *pdn, int where, int 
size, u32 val)
if (ret)
return PCIBIOS_DEVICE_NOT_FOUND;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int rtas_pci_write_config(struct pci_bus *bus,
diff --git a/arch/powerpc/platforms/4xx/pci.c b/arch/powerpc/platforms/4xx/pci.c
index c13d64c3b019..3e6799d987d2 100644
--- a/arch/powerpc/platforms/4xx/pci.c
+++ b/arch/powerpc/platforms/4xx/pci.c
@@ -1652,7 +1652,7 @@ static int ppc4xx_pciex_read_config(struct pci_bus *bus, 
unsigned int devfn,
 
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int ppc4xx_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -1696,7 +1696,7 @@ static int ppc4xx_pciex_write_config(struct pci_bus *bus, 
unsigned int devfn,
 
dcr_write(port->dcrs, DCRO_PEGPL_CFG, gpl_cfg);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static struct pci_ops ppc4xx_pciex_pci_ops =
diff --git a/arch/powerpc/platforms/52xx/efika.c 
b/arch/powerpc/platforms/52xx/efika.c
index 4514a6f7458a..ef2584eb2dad 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -44,7 +44,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int 
devfn, int offset,
 
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
*val = ret;
-   return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -58,7 +58,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned 
int devfn,
 
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
 addr, len, val);
-   return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return rval ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static struct pci_ops rtas_pci_ops = {
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c 
b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index af0f79995214..b9c2d0a7077e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -157,7 +157,7 @@ mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int 
devfn,
out_be32(hose->cfg_addr, 0);
mb();
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -221,7 +221,7 @@ mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int 
devfn,
out_be32(hose->cfg_addr, 0);
mb();
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static struct pci_ops mpc52xx_pci_ops = {
diff --git a/arch/powerpc/platforms/82xx/pq2.c 
b/arch/powerpc/platforms/82xx/pq2.c
index 3b5cb39a564c..c15b3b0ed118 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -40,7 +40,7 @@ static int pq2_pci_exclude_device(struct pci_controller *hose,
if (bus == 0 &

[RFC PATCH 27/35] powerpc: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 26/35

 arch/powerpc/platforms/powernv/eeh-powernv.c | 4 ++--
 arch/powerpc/platforms/pseries/eeh_pseries.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c 
b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 92f145dc9c1d..834cb6175cc4 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -318,7 +318,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
 
if (!edev || !edev->pcie_cap)
return 0;
-   if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+   if (pnv_pci_cfg_read(pdn, pos, 4, &header))
return 0;
else if (!header)
return 0;
@@ -331,7 +331,7 @@ static int pnv_eeh_find_ecap(struct pci_dn *pdn, int cap)
if (pos < 256)
break;
 
-   if (pnv_pci_cfg_read(pdn, pos, 4, &header) != 0)
+   if (pnv_pci_cfg_read(pdn, pos, 4, &header))
break;
}
 
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c 
b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 9c023b928f2c..aec6f76879a9 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -200,7 +200,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int 
cap)
 
if (!edev || !edev->pcie_cap)
return 0;
-   if (rtas_read_config(pdn, pos, 4, &header) != 0)
+   if (rtas_read_config(pdn, pos, 4, &header))
return 0;
else if (!header)
return 0;
@@ -213,7 +213,7 @@ static int pseries_eeh_find_ecap(struct pci_dn *pdn, int 
cap)
if (pos < 256)
break;
 
-   if (rtas_read_config(pdn, pos, 4, &header) != 0)
+   if (rtas_read_config(pdn, pos, 4, &header))
break;
}
 
-- 
2.18.2



[RFC PATCH 11/35] r8169: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/net/ethernet/realtek/r8169_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/realtek/r8169_main.c 
b/drivers/net/ethernet/realtek/r8169_main.c
index b660ddbe4025..206dac958cb2 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2656,7 +2656,7 @@ static void rtl_csi_access_enable(struct rtl8169_private 
*tp, u8 val)
 * first and if it fails fall back to CSI.
 */
if (pdev->cfg_size > 0x070f &&
-   pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL)
+   pci_write_config_byte(pdev, 0x070f, val) == 0)
return;
 
netdev_notice_once(tp->dev,
-- 
2.18.2



[RFC PATCH 12/35] r8169: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 11/35

 drivers/net/ethernet/realtek/r8169_main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/realtek/r8169_main.c 
b/drivers/net/ethernet/realtek/r8169_main.c
index 206dac958cb2..79edbc0c4476 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2656,7 +2656,7 @@ static void rtl_csi_access_enable(struct rtl8169_private 
*tp, u8 val)
 * first and if it fails fall back to CSI.
 */
if (pdev->cfg_size > 0x070f &&
-   pci_write_config_byte(pdev, 0x070f, val) == 0)
+   !pci_write_config_byte(pdev, 0x070f, val))
return;
 
netdev_notice_once(tp->dev,
-- 
2.18.2



[RFC PATCH 19/35] atm: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/atm/iphase.c | 4 ++--
 drivers/atm/lanai.c  | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 8c7a996d1f16..b01cc491540d 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2296,12 +2296,12 @@ static int reset_sar(struct atm_dev *dev)
iadev = INPH_IA_DEV(dev);  
for(i=0; i<64; i++)  
  if ((error = pci_read_config_dword(iadev->pci,  
-   i*4, &pci[i])) != PCIBIOS_SUCCESSFUL)  
+   i*4, &pci[i])) != 0)
  return error;  
writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
for(i=0; i<64; i++)  
  if ((error = pci_write_config_dword(iadev->pci,  
-   i*4, pci[i])) != PCIBIOS_SUCCESSFUL)  
+   i*4, pci[i])) != 0)
return error;  
udelay(5);  
return 0;  
diff --git a/drivers/atm/lanai.c b/drivers/atm/lanai.c
index 645a6bc1df88..2b82ae30dd74 100644
--- a/drivers/atm/lanai.c
+++ b/drivers/atm/lanai.c
@@ -1098,7 +1098,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int 
clearonly)
u16 s;
int result;
result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
-   if (result != PCIBIOS_SUCCESSFUL) {
+   if (result != 0) {
printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
"%d\n", lanai->number, result);
return;
@@ -1109,7 +1109,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int 
clearonly)
if (s == 0)
return;
result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
-   if (result != PCIBIOS_SUCCESSFUL)
+   if (result != 0)
printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
"%d\n", lanai->number, result);
if (clearonly)
@@ -1949,7 +1949,7 @@ static int lanai_pci_start(struct lanai_dev *lanai)
return result;
/* Set latency timer to zero as per lanai docs */
result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
-   if (result != PCIBIOS_SUCCESSFUL) {
+   if (result != 0) {
printk(KERN_ERR DEV_LABEL "(itf %d): can't write "
"PCI_LATENCY_TIMER: %d\n", lanai->number, result);
return -EINVAL;
-- 
2.18.2



[RFC PATCH 22/35] unicore32: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/unicore32/kernel/pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 0d098aa05b47..401ab356c814 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -37,7 +37,7 @@ puv3_read_config(struct pci_bus *bus, unsigned int devfn, int 
where,
*value = readl(PCICFG_DATA);
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -58,7 +58,7 @@ puv3_write_config(struct pci_bus *bus, unsigned int devfn, 
int where,
writel(value, PCICFG_DATA);
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops pci_puv3_ops = {
-- 
2.18.2



[RFC PATCH 20/35] atm: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 19/35

 drivers/atm/iphase.c | 10 --
 drivers/atm/lanai.c  |  6 +++---
 2 files changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index b01cc491540d..2c75b82b4e7f 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2295,14 +2295,12 @@ static int reset_sar(struct atm_dev *dev)
  
iadev = INPH_IA_DEV(dev);  
for(i=0; i<64; i++)  
- if ((error = pci_read_config_dword(iadev->pci,  
-   i*4, &pci[i])) != 0)
- return error;  
+   if ((error = pci_read_config_dword(iadev->pci, i*4, &pci[i])))
+   return error;
writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
for(i=0; i<64; i++)  
- if ((error = pci_write_config_dword(iadev->pci,  
-   i*4, pci[i])) != 0)
-   return error;  
+   if ((error = pci_write_config_dword(iadev->pci, i*4, pci[i])))
+   return error;
udelay(5);  
return 0;  
 }  
diff --git a/drivers/atm/lanai.c b/drivers/atm/lanai.c
index 2b82ae30dd74..5852b8cc0cc4 100644
--- a/drivers/atm/lanai.c
+++ b/drivers/atm/lanai.c
@@ -1098,7 +1098,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int 
clearonly)
u16 s;
int result;
result = pci_read_config_word(lanai->pci, PCI_STATUS, &s);
-   if (result != 0) {
+   if (result) {
printk(KERN_ERR DEV_LABEL "(itf %d): can't read PCI_STATUS: "
"%d\n", lanai->number, result);
return;
@@ -1109,7 +1109,7 @@ static void pcistatus_check(struct lanai_dev *lanai, int 
clearonly)
if (s == 0)
return;
result = pci_write_config_word(lanai->pci, PCI_STATUS, s);
-   if (result != 0)
+   if (result)
printk(KERN_ERR DEV_LABEL "(itf %d): can't write PCI_STATUS: "
"%d\n", lanai->number, result);
if (clearonly)
@@ -1945,7 +1945,7 @@ static int lanai_pci_start(struct lanai_dev *lanai)
return -EBUSY;
}
result = check_board_id_and_rev("PCI", pci->subsystem_device, NULL);
-   if (result != 0)
+   if (result)
return result;
/* Set latency timer to zero as per lanai docs */
result = pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0);
-- 
2.18.2



[RFC PATCH 18/35] bcma: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/bcma/driver_pci_host.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c
index 88a93c266c19..b64ba68bdc8a 100644
--- a/drivers/bcma/driver_pci_host.c
+++ b/drivers/bcma/driver_pci_host.c
@@ -244,7 +244,7 @@ static int bcma_core_pci_hostmode_read_config(struct 
pci_bus *bus,
 PCI_FUNC(devfn), reg, val, size);
spin_unlock_irqrestore(&pc_host->cfgspace_lock, flags);
 
-   return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int bcma_core_pci_hostmode_write_config(struct pci_bus *bus,
@@ -264,7 +264,7 @@ static int bcma_core_pci_hostmode_write_config(struct 
pci_bus *bus,
  PCI_FUNC(devfn), reg, &val, size);
spin_unlock_irqrestore(&pc_host->cfgspace_lock, flags);
 
-   return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 /* return cap_offset if requested capability exists in the PCI config space */
-- 
2.18.2



[RFC PATCH 21/35] atm: Fix Style ERROR- assignment in if condition

2020-07-13 Thread Saheed O. Bolarinwa
Move assignment out of the if condition
Fix style issues in the for-loop

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 20/35

 drivers/atm/iphase.c | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 2c75b82b4e7f..584d9be5fa73 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2294,13 +2294,19 @@ static int reset_sar(struct atm_dev *dev)
unsigned int pci[64];  
  
iadev = INPH_IA_DEV(dev);  
-   for(i=0; i<64; i++)  
-   if ((error = pci_read_config_dword(iadev->pci, i*4, &pci[i])))
+   for (i = 0; i < 64; i++) {
+   error = pci_read_config_dword(iadev->pci, i*4, &pci[i]);
+   if (error)
return error;
+   }
+
writel(0, iadev->reg+IPHASE5575_EXT_RESET);  
-   for(i=0; i<64; i++)  
-   if ((error = pci_write_config_dword(iadev->pci, i*4, pci[i])))
+   for (i = 0; i < 64; i++) {
+   error = pci_write_config_dword(iadev->pci, i*4, pci[i]);
+   if (error)
return error;
+   }
+
udelay(5);  
return 0;  
 }  
-- 
2.18.2



[RFC PATCH 30/35] microblaze: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/microblaze/pci/indirect_pci.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/microblaze/pci/indirect_pci.c 
b/arch/microblaze/pci/indirect_pci.c
index 1caf7d3e0eef..1f04a1f2c30b 100644
--- a/arch/microblaze/pci/indirect_pci.c
+++ b/arch/microblaze/pci/indirect_pci.c
@@ -65,7 +65,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, 
int offset,
*val = in_le32(cfg_data);
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -132,7 +132,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int 
devfn, int offset,
break;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static struct pci_ops indirect_pci_ops = {
-- 
2.18.2



[RFC PATCH 23/35] sparc/PCI: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/sparc/kernel/pci_common.c | 28 ++--
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/sparc/kernel/pci_common.c b/arch/sparc/kernel/pci_common.c
index 4759ccd542fe..39175f26f401 100644
--- a/arch/sparc/kernel/pci_common.c
+++ b/arch/sparc/kernel/pci_common.c
@@ -59,7 +59,7 @@ static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm,
 
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
if (!addr)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
switch (size) {
case 1:
@@ -102,7 +102,7 @@ static int sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm,
*value |= tmp32 << 16;
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -132,7 +132,7 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
 
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
if (!addr)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
switch (size) {
case 1:
@@ -144,7 +144,7 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
if (where & 0x01) {
printk("pci_read_config_word: misaligned reg [%x]\n",
   where);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
pci_config_read16((u16 *)addr, &tmp16);
*value = (u32) tmp16;
@@ -154,12 +154,12 @@ static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
if (where & 0x03) {
printk("pci_read_config_dword: misaligned reg [%x]\n",
   where);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
pci_config_read32(addr, value);
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm,
@@ -170,7 +170,7 @@ static int sun4u_write_pci_cfg_host(struct pci_pbm_info 
*pbm,
 
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
if (!addr)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
switch (size) {
case 1:
@@ -206,7 +206,7 @@ static int sun4u_write_pci_cfg_host(struct pci_pbm_info 
*pbm,
 where + 2, 2, value >> 16);
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -222,7 +222,7 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
 
addr = sun4u_config_mkaddr(pbm, bus, devfn, where);
if (!addr)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
switch (size) {
case 1:
@@ -233,7 +233,7 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
if (where & 0x01) {
printk("pci_write_config_word: misaligned reg [%x]\n",
   where);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
pci_config_write16((u16 *)addr, value);
break;
@@ -242,11 +242,11 @@ static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
if (where & 0x03) {
printk("pci_write_config_dword: misaligned reg [%x]\n",
   where);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
pci_config_write32(addr, value);
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops sun4u_pci_ops = {
@@ -284,7 +284,7 @@ static int sun4v_read_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
}
 
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn,
@@ -307,7 +307,7 @@ static int sun4v_write_pci_cfg(struct pci_bus *bus_dev, 
unsigned int devfn,
 HV_PCI_DEVICE_BUILD(bus, device, func),
 where, size, value);
}
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops sun4v_pci_ops = {
-- 
2.18.2



[RFC PATCH 31/35] m68k: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/m68k/coldfire/pci.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/m68k/coldfire/pci.c b/arch/m68k/coldfire/pci.c
index 84eab0f5e00a..ecd11a19487a 100644
--- a/arch/m68k/coldfire/pci.c
+++ b/arch/m68k/coldfire/pci.c
@@ -64,7 +64,7 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned 
int devfn,
 
if (bus->number == 0) {
if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
addr = mcf_mk_pcicar(bus->number, devfn, where);
@@ -86,7 +86,7 @@ static int mcf_pci_readconfig(struct pci_bus *bus, unsigned 
int devfn,
 
__raw_writel(0, PCICAR);
__raw_readl(PCICAR);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn,
@@ -96,7 +96,7 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned 
int devfn,
 
if (bus->number == 0) {
if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
addr = mcf_mk_pcicar(bus->number, devfn, where);
@@ -118,7 +118,7 @@ static int mcf_pci_writeconfig(struct pci_bus *bus, 
unsigned int devfn,
 
__raw_writel(0, PCICAR);
__raw_readl(PCICAR);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static struct pci_ops mcf_pci_ops = {
-- 
2.18.2



[RFC PATCH 28/35] mips: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/mips/pci/fixup-ath79.c  |  2 +-
 arch/mips/pci/ops-bcm63xx.c  | 14 +++---
 arch/mips/pci/ops-bonito64.c |  4 ++--
 arch/mips/pci/ops-gt64xxx_pci0.c |  4 ++--
 arch/mips/pci/ops-lantiq.c   |  4 ++--
 arch/mips/pci/ops-loongson2.c|  4 ++--
 arch/mips/pci/ops-mace.c |  4 ++--
 arch/mips/pci/ops-msc.c  |  4 ++--
 arch/mips/pci/ops-rc32434.c  |  6 +++---
 arch/mips/pci/ops-sni.c  |  4 ++--
 arch/mips/pci/ops-tx3927.c   |  2 +-
 arch/mips/pci/ops-tx4927.c   |  2 +-
 arch/mips/pci/ops-vr41xx.c   |  4 ++--
 arch/mips/pci/pci-alchemy.c  |  6 +++---
 arch/mips/pci/pci-ar2315.c   |  4 ++--
 arch/mips/pci/pci-ar71xx.c   |  4 ++--
 arch/mips/pci/pci-ar724x.c   |  6 +++---
 arch/mips/pci/pci-bcm1480.c  |  4 ++--
 arch/mips/pci/pci-bcm1480ht.c|  4 ++--
 arch/mips/pci/pci-mt7620.c   |  4 ++--
 arch/mips/pci/pci-octeon.c   | 12 ++--
 arch/mips/pci/pci-rt2880.c   |  4 ++--
 arch/mips/pci/pci-rt3883.c   |  4 ++--
 arch/mips/pci/pci-sb1250.c   |  4 ++--
 arch/mips/pci/pci-virtio-guest.c |  4 ++--
 arch/mips/pci/pci-xlp.c  |  4 ++--
 arch/mips/pci/pci-xlr.c  |  4 ++--
 arch/mips/pci/pci-xtalk-bridge.c | 14 +++---
 arch/mips/pci/pcie-octeon.c  |  4 ++--
 arch/mips/txx9/generic/pci.c |  4 ++--
 30 files changed, 74 insertions(+), 74 deletions(-)

diff --git a/arch/mips/pci/fixup-ath79.c b/arch/mips/pci/fixup-ath79.c
index 09a4ce53424f..6a6c4f58f7f4 100644
--- a/arch/mips/pci/fixup-ath79.c
+++ b/arch/mips/pci/fixup-ath79.c
@@ -9,7 +9,7 @@
 
 int pcibios_plat_dev_init(struct pci_dev *dev)
 {
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index dc6dc2741272..3e88e4869f37 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -115,7 +115,7 @@ static int bcm63xx_do_cfg_read(int type, unsigned int busn,
 
*val = postprocess_read(data, where, size);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int bcm63xx_do_cfg_write(int type, unsigned int busn,
@@ -141,7 +141,7 @@ static int bcm63xx_do_cfg_write(int type, unsigned int busn,
/* restore IO space normal behaviour */
bcm_mpi_writel(0, MPI_L2PCFG_REG);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
@@ -282,7 +282,7 @@ static int fake_cb_bridge_read(int where, int size, u32 
*val)
}
 
*val = postprocess_read(data, where, size);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 /*
@@ -295,7 +295,7 @@ static int fake_cb_bridge_write(int where, int size, u32 
val)
int ret;
 
ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
-   if (ret != PCIBIOS_SUCCESSFUL)
+   if (ret != 0)
return ret;
 
data = preprocess_write(data, val, where, size);
@@ -356,7 +356,7 @@ static int fake_cb_bridge_write(int where, int size, u32 
val)
break;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn,
@@ -496,7 +496,7 @@ static int bcm63xx_pcie_read(struct pci_bus *bus, unsigned 
int devfn,
 
*val = postprocess_read(data, where, size);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
 }
 
@@ -518,7 +518,7 @@ static int bcm63xx_pcie_write(struct pci_bus *bus, unsigned 
int devfn,
data = preprocess_write(data, val, where, size);
bcm_pcie_writel(data, reg);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 
diff --git a/arch/mips/pci/ops-bonito64.c b/arch/mips/pci/ops-bonito64.c
index 4d5fe614f55e..0d0a5d52dee6 100644
--- a/arch/mips/pci/ops-bonito64.c
+++ b/arch/mips/pci/ops-bonito64.c
@@ -107,7 +107,7 @@ static int bonito64_pcibios_read(struct pci_bus *bus, 
unsigned int devfn,
else
*val = data;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn,
@@ -139,7 +139,7 @@ static int bonito64_pcibios_write(struct pci_bus *bus, 
unsigned int devfn,
   &data))
return -1;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops bonito64_pci_ops = {
diff --git a/arch/mips/pci/ops-gt64xxx_pci0.c b/arch/mips/pci/ops-gt64xxx_pci0.c
index 501dcdf5a18c..d50a0ac0848d 100644
--- a/arch/mips/pci/ops-gt64xxx_pci0.c
+++ b/arch/mips/pci/ops-gt64xxx_pci0.c
@@ -104,7 +104,7 @@ static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, 
unsigned int devfn,
else
 

[RFC PATCH 29/35] mips: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 28/35

 arch/mips/pci/ops-bcm63xx.c  | 2 +-
 arch/mips/pci/pci-ar2315.c   | 5 ++---
 arch/mips/txx9/generic/pci.c | 3 +--
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/mips/pci/ops-bcm63xx.c b/arch/mips/pci/ops-bcm63xx.c
index 3e88e4869f37..f2810af4fa24 100644
--- a/arch/mips/pci/ops-bcm63xx.c
+++ b/arch/mips/pci/ops-bcm63xx.c
@@ -295,7 +295,7 @@ static int fake_cb_bridge_write(int where, int size, u32 
val)
int ret;
 
ret = fake_cb_bridge_read((where & ~0x3), 4, &data);
-   if (ret != 0)
+   if (ret)
return ret;
 
data = preprocess_write(data, val, where, size);
diff --git a/arch/mips/pci/pci-ar2315.c b/arch/mips/pci/pci-ar2315.c
index 2268b63d20e8..c2b9e62fbc18 100644
--- a/arch/mips/pci/pci-ar2315.c
+++ b/arch/mips/pci/pci-ar2315.c
@@ -259,8 +259,7 @@ static int ar2315_pci_cfg_access(struct ar2315_pci_ctrl 
*apc, unsigned devfn,
ar2315_pci_reg_mask(apc, AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL,
0);
 
-   return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND :
-   0;
+   return isr & AR2315_PCI_INT_ABORT ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static inline int ar2315_pci_local_cfg_rd(struct ar2315_pci_ctrl *apc,
@@ -311,7 +310,7 @@ static int ar2315_pci_host_setup(struct ar2315_pci_ctrl 
*apc)
u32 id;
 
res = ar2315_pci_local_cfg_rd(apc, devfn, PCI_VENDOR_ID, &id);
-   if (res != 0 || id != AR2315_PCI_HOST_DEVID)
+   if (res || id != AR2315_PCI_HOST_DEVID)
return -ENODEV;
 
/* Program MBARs */
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index bdff45b6b57d..9da38f8fa036 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -61,8 +61,7 @@ int __init txx9_pci66_check(struct pci_controller *hose, int 
top_bus,
if (PCI_FUNC(pci_devfn))
continue;
if (early_read_config_word(hose, top_bus, current_bus,
-  pci_devfn, PCI_VENDOR_ID, &vid) !=
-   0)
+  pci_devfn, PCI_VENDOR_ID, &vid))
continue;
if (vid == 0x)
continue;
-- 
2.18.2



[RFC PATCH 34/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/alpha/kernel/core_apecs.c| 4 ++--
 arch/alpha/kernel/core_cia.c  | 4 ++--
 arch/alpha/kernel/core_irongate.c | 4 ++--
 arch/alpha/kernel/core_lca.c  | 4 ++--
 arch/alpha/kernel/core_marvel.c   | 4 ++--
 arch/alpha/kernel/core_mcpcia.c   | 4 ++--
 arch/alpha/kernel/core_polaris.c  | 4 ++--
 arch/alpha/kernel/core_t2.c   | 4 ++--
 arch/alpha/kernel/core_titan.c| 4 ++--
 arch/alpha/kernel/core_tsunami.c  | 4 ++--
 arch/alpha/kernel/core_wildfire.c | 4 ++--
 arch/alpha/kernel/sys_miata.c | 2 +-
 12 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/arch/alpha/kernel/core_apecs.c b/arch/alpha/kernel/core_apecs.c
index 6df765ff2b10..d74d78d92434 100644
--- a/arch/alpha/kernel/core_apecs.c
+++ b/arch/alpha/kernel/core_apecs.c
@@ -287,7 +287,7 @@ apecs_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
shift = (where & 3) * 8;
addr = (pci_addr << 5) + mask + APECS_CONF;
*value = conf_read(addr, type1) >> (shift);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -304,7 +304,7 @@ apecs_write_config(struct pci_bus *bus, unsigned int devfn, 
int where,
mask = (size - 1) * 8;
addr = (pci_addr << 5) + mask + APECS_CONF;
conf_write(addr, value << ((where & 3) * 8), type1);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops apecs_pci_ops = 
diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c
index f489170201c3..25300bc19c48 100644
--- a/arch/alpha/kernel/core_cia.c
+++ b/arch/alpha/kernel/core_cia.c
@@ -221,7 +221,7 @@ cia_read_config(struct pci_bus *bus, unsigned int devfn, 
int where, int size,
shift = (where & 3) * 8;
addr = (pci_addr << 5) + mask + CIA_CONF;
*value = conf_read(addr, type1) >> (shift);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int 
@@ -238,7 +238,7 @@ cia_write_config(struct pci_bus *bus, unsigned int devfn, 
int where, int size,
mask = (size - 1) * 8;
addr = (pci_addr << 5) + mask + CIA_CONF;
conf_write(addr, value << ((where & 3) * 8), type1);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops cia_pci_ops = 
diff --git a/arch/alpha/kernel/core_irongate.c 
b/arch/alpha/kernel/core_irongate.c
index a9fd133a7fb2..858a2293c786 100644
--- a/arch/alpha/kernel/core_irongate.c
+++ b/arch/alpha/kernel/core_irongate.c
@@ -121,7 +121,7 @@ irongate_read_config(struct pci_bus *bus, unsigned int 
devfn, int where,
break;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -152,7 +152,7 @@ irongate_write_config(struct pci_bus *bus, unsigned int 
devfn, int where,
break;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops irongate_pci_ops =
diff --git a/arch/alpha/kernel/core_lca.c b/arch/alpha/kernel/core_lca.c
index 57e0750419f2..a7a00d73e2c5 100644
--- a/arch/alpha/kernel/core_lca.c
+++ b/arch/alpha/kernel/core_lca.c
@@ -213,7 +213,7 @@ lca_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
mask = (size - 1) * 8;
addr = (pci_addr << 5) + mask + LCA_CONF;
*value = conf_read(addr) >> (shift);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int 
@@ -229,7 +229,7 @@ lca_write_config(struct pci_bus *bus, unsigned int devfn, 
int where, int size,
mask = (size - 1) * 8;
addr = (pci_addr << 5) + mask + LCA_CONF;
conf_write(addr, value << ((where & 3) * 8));
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops lca_pci_ops = 
diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c
index 1db9d0eb2922..c076b97a9961 100644
--- a/arch/alpha/kernel/core_marvel.c
+++ b/arch/alpha/kernel/core_marvel.c
@@ -561,7 +561,7 @@ marvel_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -593,7 +593,7 @@ marvel_write_config(struct pci_bus *bus, unsigned int 
devfn, int where,
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops marvel_pci_ops =
diff --git a/arch/alpha/kernel/core_mcpcia.c b/arch/alpha/kernel/core_mcpcia.c
index 74b1d018124c..fdb6d055bcc0 100644
--- a/arch/alpha/kernel/core_mcpcia.c
+++ b/arch/alpha/kernel/core_mcpcia.c
@@ -216,7 +216,7 @@ mcpcia_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
*value = w;
break;
}
-   return PCIBIOS_SUCCESSFUL;
+   retur

[RFC PATCH 25/35] sh: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 24/35

 arch/sh/drivers/pci/common.c | 3 +--
 arch/sh/drivers/pci/ops-sh7786.c | 4 ++--
 arch/sh/drivers/pci/pci.c| 2 +-
 3 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
index ee27cdfd3e68..676907e6a514 100644
--- a/arch/sh/drivers/pci/common.c
+++ b/arch/sh/drivers/pci/common.c
@@ -60,8 +60,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
if (PCI_FUNC(pci_devfn))
continue;
if (early_read_config_word(hose, top_bus, current_bus,
-  pci_devfn, PCI_VENDOR_ID, &vid) !=
-   0)
+  pci_devfn, PCI_VENDOR_ID, &vid))
continue;
if (vid == 0x)
continue;
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
index 7c329e467360..c1be0ac2508a 100644
--- a/arch/sh/drivers/pci/ops-sh7786.c
+++ b/arch/sh/drivers/pci/ops-sh7786.c
@@ -101,7 +101,7 @@ static int sh7786_pcie_read(struct pci_bus *bus, unsigned 
int devfn,
raw_spin_lock_irqsave(&pci_config_lock, flags);
ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
devfn, where, &data);
-   if (ret != 0) {
+   if (ret) {
*val = 0x;
goto out;
}
@@ -137,7 +137,7 @@ static int sh7786_pcie_write(struct pci_bus *bus, unsigned 
int devfn,
raw_spin_lock_irqsave(&pci_config_lock, flags);
ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
devfn, where, &data);
-   if (ret != 0)
+   if (ret)
goto out;
 
dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 77130f035fdd..19e9a211c23e 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -204,7 +204,7 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
continue;
ret = early_read_config_word(hose, top_bus, current_bus,
 pci_devfn, PCI_STATUS, &status);
-   if (ret != 0)
+   if (ret)
continue;
if (status == 0x)
continue;
-- 
2.18.2



[RFC PATCH 32/35] arm/PCI: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/arm/common/it8152.c   | 4 ++--
 arch/arm/mach-cns3xxx/pcie.c   | 2 +-
 arch/arm/mach-footbridge/dc21285.c | 4 ++--
 arch/arm/mach-iop32x/pci.c | 6 +++---
 arch/arm/mach-ixp4xx/common-pci.c  | 8 
 arch/arm/mach-orion5x/pci.c| 4 ++--
 arch/arm/plat-orion/pcie.c | 8 
 7 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 9ec740cac469..331911b627c4 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -186,7 +186,7 @@ static int it8152_pci_read_config(struct pci_bus *bus,
 
*value = v;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int it8152_pci_write_config(struct pci_bus *bus,
@@ -216,7 +216,7 @@ static int it8152_pci_write_config(struct pci_bus *bus,
__raw_writel((addr + where), IT8152_PCI_CFG_ADDR);
__raw_writel((v | vtemp), IT8152_PCI_CFG_DATA);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops it8152_ops = {
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index e92fbd679dfb..7020071a2dc5 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -92,7 +92,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, 
unsigned int devfn,
 
ret = pci_generic_config_read(bus, devfn, where, size, val);
 
-   if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn &&
+   if (ret == 0 && !bus->number && !devfn &&
(where & 0xffc) == PCI_CLASS_REVISION)
/*
 * RC's class is 0xb, but Linux PCI driver needs 0x604
diff --git a/arch/arm/mach-footbridge/dc21285.c 
b/arch/arm/mach-footbridge/dc21285.c
index 416462e3f5d6..5ad78b38c659 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -86,7 +86,7 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
return -1;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -121,7 +121,7 @@ dc21285_write_config(struct pci_bus *bus, unsigned int 
devfn, int where,
return -1;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops dc21285_ops = {
diff --git a/arch/arm/mach-iop32x/pci.c b/arch/arm/mach-iop32x/pci.c
index ab0010dc3145..a29d33ce20c8 100644
--- a/arch/arm/mach-iop32x/pci.c
+++ b/arch/arm/mach-iop32x/pci.c
@@ -118,7 +118,7 @@ iop3xx_read_config(struct pci_bus *bus, unsigned int devfn, 
int where,
 
*value = val;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int
@@ -131,7 +131,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int 
devfn, int where,
if (size != 4) {
val = iop3xx_read(addr);
if (iop3xx_pci_status())
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
where = (where & 3) * 8;
 
@@ -154,7 +154,7 @@ iop3xx_write_config(struct pci_bus *bus, unsigned int 
devfn, int where,
  "r" (IOP3XX_OCCAR), "r" (IOP3XX_OCCDR));
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops iop3xx_ops = {
diff --git a/arch/arm/mach-ixp4xx/common-pci.c 
b/arch/arm/mach-ixp4xx/common-pci.c
index 893c19c254e3..f7cd535d4971 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -208,7 +208,7 @@ static int local_read_config(int where, int size, u32 
*value)
crp_read(where & ~3, &data);
*value = (data >> (8*n)) & bytemask[size];
pr_debug("local_read_config read %#x\n", *value);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int local_write_config(int where, int size, u32 value)
@@ -221,7 +221,7 @@ static int local_write_config(int where, int size, u32 
value)
return PCIBIOS_BAD_REGISTER_NUMBER;
data = value << (8*n);
crp_write((where & ~3) | byte_enables, data);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static u32 byte_lane_enable_bits(u32 n, int size)
@@ -255,7 +255,7 @@ static int ixp4xx_pci_read_config(struct pci_bus *bus, 
unsigned int devfn, int w
 
*value = (data >> (8*n)) & bytemask[size];
pr_debug("read_config_byte read %#x\n", *value);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int ixp4xx_pci_write_config(struct pci_bus *bus,  unsigned int devfn, 
int where, int size, u32 value)
@@ -276,7 +276,7 @@ static int ixp4xx_pci_write_config(struct pci_bus *bus,  
unsigned int devfn, int
if (ixp4xx_pci_write(addr, byte_enable

[RFC PATCH 35/35] alpha: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on 34/35

 arch/alpha/kernel/sys_miata.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/alpha/kernel/sys_miata.c b/arch/alpha/kernel/sys_miata.c
index 1b4c03ac34d8..539f803c1614 100644
--- a/arch/alpha/kernel/sys_miata.c
+++ b/arch/alpha/kernel/sys_miata.c
@@ -185,7 +185,7 @@ miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
u8 irq=0;
struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
-   if (pdev == NULL || pci_read_config_byte(pdev, 0x40, &irq) != 
0) {
+   if (pdev == NULL || pci_read_config_byte(pdev, 0x40, &irq)) {
pci_dev_put(pdev);
return -1;
}
-- 
2.18.2



[RFC PATCH 24/35] sh: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 arch/sh/drivers/pci/common.c| 2 +-
 arch/sh/drivers/pci/ops-dreamcast.c | 4 ++--
 arch/sh/drivers/pci/ops-sh4.c   | 4 ++--
 arch/sh/drivers/pci/ops-sh7786.c| 8 
 arch/sh/drivers/pci/pci.c   | 2 +-
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
index fe163ecd0719..ee27cdfd3e68 100644
--- a/arch/sh/drivers/pci/common.c
+++ b/arch/sh/drivers/pci/common.c
@@ -61,7 +61,7 @@ int __init pci_is_66mhz_capable(struct pci_channel *hose,
continue;
if (early_read_config_word(hose, top_bus, current_bus,
   pci_devfn, PCI_VENDOR_ID, &vid) !=
-   PCIBIOS_SUCCESSFUL)
+   0)
continue;
if (vid == 0x)
continue;
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c 
b/arch/sh/drivers/pci/ops-dreamcast.c
index 517a8a9702f6..431cd006951f 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -56,7 +56,7 @@ static int gapspci_read(struct pci_bus *bus, unsigned int 
devfn, int where, int
case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
}
 
-return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, 
int size, u32 val)
@@ -70,7 +70,7 @@ static int gapspci_write(struct pci_bus *bus, unsigned int 
devfn, int where, int
case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
}
 
-return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops gapspci_pci_ops = {
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index a205be3bfc4a..4d757e5f38c6 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -49,7 +49,7 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int 
devfn,
return PCIBIOS_FUNC_NOT_SUPPORTED;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 /*
@@ -90,7 +90,7 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int 
devfn,
 
pci_write_reg(chan, data, SH4_PCIPDR);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 struct pci_ops sh4_pci_ops = {
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c
index a10f9f4ebd7f..7c329e467360 100644
--- a/arch/sh/drivers/pci/ops-sh7786.c
+++ b/arch/sh/drivers/pci/ops-sh7786.c
@@ -52,7 +52,7 @@ static int sh7786_pcie_config_access(unsigned char 
access_type,
else
pci_write_reg(chan, *data, PCI_REG(reg));
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
} else if (dev > 1)
return PCIBIOS_DEVICE_NOT_FOUND;
}
@@ -83,7 +83,7 @@ static int sh7786_pcie_config_access(unsigned char 
access_type,
/* Disable the configuration access */
pci_write_reg(chan, 0, SH4A_PCIEPCTLR);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
@@ -101,7 +101,7 @@ static int sh7786_pcie_read(struct pci_bus *bus, unsigned 
int devfn,
raw_spin_lock_irqsave(&pci_config_lock, flags);
ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
devfn, where, &data);
-   if (ret != PCIBIOS_SUCCESSFUL) {
+   if (ret != 0) {
*val = 0x;
goto out;
}
@@ -137,7 +137,7 @@ static int sh7786_pcie_write(struct pci_bus *bus, unsigned 
int devfn,
raw_spin_lock_irqsave(&pci_config_lock, flags);
ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
devfn, where, &data);
-   if (ret != PCIBIOS_SUCCESSFUL)
+   if (ret != 0)
goto out;
 
dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index c7784e156964..77130f035fdd 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -204,7 +204,7 @@ pcibios_bus_report_status_early(struct pci_channel *hose,
continue;
ret = early_read_config_word(hose, top_bus, current_bus,
 pci_devfn, PCI_STATUS, &status);
-   if (ret != PCIBIOS_SUCCESSFUL)
+   if (ret != 0)
continue;
if (status == 0x)
continue;
-- 
2.18.2



[RFC PATCH 33/35] arm/PCI: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 32/35

 arch/arm/mach-cns3xxx/pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 7020071a2dc5..c249d4cbf4f0 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -92,7 +92,7 @@ static int cns3xxx_pci_read_config(struct pci_bus *bus, 
unsigned int devfn,
 
ret = pci_generic_config_read(bus, devfn, where, size, val);
 
-   if (ret == 0 && !bus->number && !devfn &&
+   if (!ret && !bus->number && !devfn &&
(where & 0xffc) == PCI_CLASS_REVISION)
/*
 * RC's class is 0xb, but Linux PCI driver needs 0x604
-- 
2.18.2



[RFC PATCH 17/35] hwmon: (sis5595) Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 16/35

 drivers/hwmon/sis5595.c | 13 -
 drivers/hwmon/via686a.c | 13 -
 drivers/hwmon/vt8231.c  | 13 -
 3 files changed, 12 insertions(+), 27 deletions(-)

diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 0ea174fb3048..91fdddaa4136 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -825,8 +825,7 @@ static int sis5595_pci_probe(struct pci_dev *dev,
pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
}
 
-   if (0 !=
-   pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
+   if (pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
dev_err(&dev->dev, "Failed to read ISA address\n");
return -ENODEV;
}
@@ -843,17 +842,13 @@ static int sis5595_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (0 !=
-   pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
+   if (pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
dev_err(&dev->dev, "Failed to read enable register\n");
return -ENODEV;
}
if (!(enable & 0x80)) {
-   if ((0 !=
-pci_write_config_byte(dev, SIS5595_ENABLE_REG,
-  enable | 0x80))
-|| (0 !=
-pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
+   if ((pci_write_config_byte(dev, SIS5595_ENABLE_REG, enable | 
0x80))
+|| (pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
 || (!(enable & 0x80))) {
/* doesn't work for some chips! */
dev_err(&dev->dev, "Failed to enable HWM device\n");
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index cffea688878f..b8466e2e1435 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -863,12 +863,10 @@ static int via686a_pci_probe(struct pci_dev *dev,
if (force_addr) {
address = force_addr & ~(VIA686A_EXTENT - 1);
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
-   if (0 !=
-   pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
+   if (pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
return -ENODEV;
}
-   if (0 !=
-   pci_read_config_word(dev, VIA686A_BASE_REG, &val))
+   if (pci_read_config_word(dev, VIA686A_BASE_REG, &val))
return -ENODEV;
 
address = val & ~(VIA686A_EXTENT - 1);
@@ -878,8 +876,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (0 !=
-   pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
+   if (pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
return -ENODEV;
if (!(val & 0x0001)) {
if (!force_addr) {
@@ -890,9 +887,7 @@ static int via686a_pci_probe(struct pci_dev *dev,
}
 
dev_warn(&dev->dev, "Enabling sensors\n");
-   if (0 !=
-   pci_write_config_word(dev, VIA686A_ENABLE_REG,
- val | 0x0001))
+   if (pci_write_config_word(dev, VIA686A_ENABLE_REG, val | 
0x0001))
return -ENODEV;
}
 
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index cc1d24c2a2c8..ee6cd6b85f91 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -987,13 +987,11 @@ static int vt8231_pci_probe(struct pci_dev *dev,
dev_warn(&dev->dev, "Forcing ISA address 0x%x\n",
 address);
 
-   if (0 !=
-   pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
+   if (pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
return -ENODEV;
}
 
-   if (0 != pci_read_config_word(dev, VT8231_BASE_REG,
-   &val))
+   if (pci_read_config_word(dev, VT8231_BASE_REG, &val))
return -ENODEV;
 
address = val & ~(VT8231_EXTENT - 1);
@@ -1002,15 +1000,12 @@ static int vt8231_pci_probe(struct pci_dev *dev,
return -ENODEV;
}
 
-   if (0 != pci_read_config_word(dev, VT8231_ENABLE_REG,
-   &val))
+   if (pci_read_config_word(dev, VT8231_ENABLE_REG, &val))
return -ENODEV;
 
if (!(val & 0x0001)) {
dev_warn(&dev->dev,

[RFC PATCH 02/35] ssb: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/ssb/driver_gige.c| 4 ++--
 drivers/ssb/driver_pcicore.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/ssb/driver_gige.c b/drivers/ssb/driver_gige.c
index ebee6b0e3c34..ccb4a35715bf 100644
--- a/drivers/ssb/driver_gige.c
+++ b/drivers/ssb/driver_gige.c
@@ -134,7 +134,7 @@ static int ssb_gige_pci_read_config(struct pci_bus *bus, 
unsigned int devfn,
}
spin_unlock_irqrestore(&dev->lock, flags);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -164,7 +164,7 @@ static int ssb_gige_pci_write_config(struct pci_bus *bus, 
unsigned int devfn,
}
spin_unlock_irqrestore(&dev->lock, flags);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int ssb_gige_probe(struct ssb_device *sdev,
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index c1186415896b..1b67af1097c8 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -212,7 +212,7 @@ static int ssb_pcicore_read_config(struct pci_bus *bus, 
unsigned int devfn,
 PCI_FUNC(devfn), reg, val, size);
spin_unlock_irqrestore(&cfgspace_lock, flags);
 
-   return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int ssb_pcicore_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -226,7 +226,7 @@ static int ssb_pcicore_write_config(struct pci_bus *bus, 
unsigned int devfn,
  PCI_FUNC(devfn), reg, &val, size);
spin_unlock_irqrestore(&cfgspace_lock, flags);
 
-   return err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return err ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static struct pci_ops ssb_pcicore_pciops = {
-- 
2.18.2



[RFC PATCH 10/35] nvme-pci: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 09/35

 drivers/nvme/host/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index d426efb53f44..a04f2d0375de 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -1185,7 +1185,7 @@ static void nvme_warn_reset(struct nvme_dev *dev, u32 
csts)
 
result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS,
  &pci_status);
-   if (result == 0)
+   if (!result)
dev_warn(dev->ctrl.device,
 "controller is down; will reset: CSTS=0x%x, 
PCI_STATUS=0x%hx\n",
 csts, pci_status);
-- 
2.18.2



[RFC PATCH 07/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/pci/access.c   | 14 +++---
 drivers/pci/pci-bridge-emul.c  | 14 +++---
 drivers/pci/pci.c  |  8 
 drivers/pci/pcie/bw_notification.c |  4 ++--
 drivers/pci/probe.c|  4 ++--
 drivers/pci/quirks.c   |  2 +-
 drivers/pci/syscall.c  |  8 
 drivers/pci/xen-pcifront.c |  2 +-
 8 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index 79c4a2ef269a..b907abe38679 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -92,7 +92,7 @@ int pci_generic_config_read(struct pci_bus *bus, unsigned int 
devfn,
else
*val = readl(addr);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_read);
 
@@ -112,7 +112,7 @@ int pci_generic_config_write(struct pci_bus *bus, unsigned 
int devfn,
else
writel(val, addr);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_write);
 
@@ -132,7 +132,7 @@ int pci_generic_config_read32(struct pci_bus *bus, unsigned 
int devfn,
if (size <= 2)
*val = (*val >> (8 * (where & 3))) & ((1 << (size * 8)) - 1);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_read32);
 
@@ -148,7 +148,7 @@ int pci_generic_config_write32(struct pci_bus *bus, 
unsigned int devfn,
 
if (size == 4) {
writel(val, addr);
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
/*
@@ -169,7 +169,7 @@ int pci_generic_config_write32(struct pci_bus *bus, 
unsigned int devfn,
tmp |= val << ((where & 0x3) * 8);
writel(tmp, addr);
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(pci_generic_config_write32);
 
@@ -222,7 +222,7 @@ static noinline void pci_wait_cfg(struct pci_dev *dev)
 int pci_user_read_config_##size
\
(struct pci_dev *dev, int pos, type *val)   \
 {  \
-   int ret = PCIBIOS_SUCCESSFUL;   \
+   int ret = 0;\
u32 data = -1;  \
if (PCI_##size##_BAD)   \
return -EINVAL; \
@@ -242,7 +242,7 @@ EXPORT_SYMBOL_GPL(pci_user_read_config_##size);
 int pci_user_write_config_##size   \
(struct pci_dev *dev, int pos, type val)\
 {  \
-   int ret = PCIBIOS_SUCCESSFUL;   \
+   int ret = 0;\
if (PCI_##size##_BAD)   \
return -EINVAL; \
raw_spin_lock_irq(&pci_lock);   \
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index ccf26d12ec61..9695c453e197 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -323,12 +323,12 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul 
*bridge, int where,
 
if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) {
*value = 0;
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END) {
*value = 0;
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
@@ -364,7 +364,7 @@ int pci_bridge_emul_conf_read(struct pci_bridge_emul 
*bridge, int where,
else if (size != 4)
return PCIBIOS_BAD_REGISTER_NUMBER;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 /*
@@ -383,10 +383,10 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul 
*bridge, int where,
const struct pci_bridge_reg_behavior *behavior;
 
if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END)
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 
shift = (where & 0x3) * 8;
 
@@ -400,7 +400,7 @@ int pci_bridge_emul_conf_write(struct pci_bridge_emul 
*bridge, int where,
   

[RFC PATCH 01/35] xen-pciback: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/xen/xen-pciback/conf_space.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/xen-pciback/conf_space.c 
b/drivers/xen/xen-pciback/conf_space.c
index 059de92aea7d..0e7577f16f78 100644
--- a/drivers/xen/xen-pciback/conf_space.c
+++ b/drivers/xen/xen-pciback/conf_space.c
@@ -130,7 +130,7 @@ static inline u32 merge_value(u32 val, u32 new_val, u32 
new_val_mask,
 static int xen_pcibios_err_to_errno(int err)
 {
switch (err) {
-   case PCIBIOS_SUCCESSFUL:
+   case 0:
return XEN_PCI_ERR_success;
case PCIBIOS_DEVICE_NOT_FOUND:
return XEN_PCI_ERR_dev_not_found;
-- 
2.18.2



[RFC PATCH 05/35] PCI: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
Their scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/pci/controller/dwc/pci-meson.c|  4 +--
 .../pci/controller/dwc/pcie-designware-host.c |  2 +-
 drivers/pci/controller/dwc/pcie-designware.c  |  4 +--
 drivers/pci/controller/dwc/pcie-hisi.c|  4 +--
 drivers/pci/controller/dwc/pcie-tegra194.c|  4 +--
 .../pci/controller/mobiveil/pcie-mobiveil.c   |  4 +--
 drivers/pci/controller/pci-aardvark.c |  4 +--
 drivers/pci/controller/pci-ftpci100.c |  4 +--
 drivers/pci/controller/pci-hyperv.c   |  8 ++---
 drivers/pci/controller/pci-mvebu.c|  4 +--
 drivers/pci/controller/pci-thunder-ecam.c | 36 +--
 drivers/pci/controller/pci-thunder-pem.c  |  4 +--
 drivers/pci/controller/pci-xgene.c|  4 +--
 drivers/pci/controller/pcie-altera.c  | 16 -
 drivers/pci/controller/pcie-iproc.c   | 10 +++---
 drivers/pci/controller/pcie-mediatek.c|  4 +--
 drivers/pci/controller/pcie-rcar-host.c   |  8 ++---
 drivers/pci/controller/pcie-rockchip-host.c   | 10 +++---
 18 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-meson.c 
b/drivers/pci/controller/dwc/pci-meson.c
index ca59ba9e0ecd..58142f03d300 100644
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -390,7 +390,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int 
where, int size,
int ret;
 
ret = dw_pcie_read(pci->dbi_base + where, size, val);
-   if (ret != PCIBIOS_SUCCESSFUL)
+   if (ret != 0)
return ret;
 
/*
@@ -407,7 +407,7 @@ static int meson_pcie_rd_own_conf(struct pcie_port *pp, int 
where, int size,
else if (where == PCI_CLASS_DEVICE + 1 && size == 1)
*val = (PCI_CLASS_BRIDGE_PCI >> 8) & 0xff;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int meson_pcie_wr_own_conf(struct pcie_port *pp, int where,
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c 
b/drivers/pci/controller/dwc/pcie-designware-host.c
index 0a4a5aa6fe46..7c97c54f787c 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -459,7 +459,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
}
 
ret = dw_pcie_rd_own_conf(pp, PCI_HEADER_TYPE, 1, &hdr_type);
-   if (ret != PCIBIOS_SUCCESSFUL) {
+   if (ret != 0) {
dev_err(pci->dev, "Failed reading PCI_HEADER_TYPE cfg space reg 
(ret: 0x%x)\n",
ret);
ret = pcibios_err_to_errno(ret);
diff --git a/drivers/pci/controller/dwc/pcie-designware.c 
b/drivers/pci/controller/dwc/pcie-designware.c
index c92496e36fd5..2494e1be1f96 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -113,7 +113,7 @@ int dw_pcie_read(void __iomem *addr, int size, u32 *val)
return PCIBIOS_BAD_REGISTER_NUMBER;
}
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(dw_pcie_read);
 
@@ -131,7 +131,7 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val)
else
return PCIBIOS_BAD_REGISTER_NUMBER;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 EXPORT_SYMBOL_GPL(dw_pcie_write);
 
diff --git a/drivers/pci/controller/dwc/pcie-hisi.c 
b/drivers/pci/controller/dwc/pcie-hisi.c
index 0ad4e07dd4c2..10a46aded227 100644
--- a/drivers/pci/controller/dwc/pcie-hisi.c
+++ b/drivers/pci/controller/dwc/pcie-hisi.c
@@ -163,7 +163,7 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int 
where, int size,
else
return PCIBIOS_BAD_REGISTER_NUMBER;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 /* HipXX PCIe host only supports 32-bit config access */
@@ -190,7 +190,7 @@ static int hisi_pcie_cfg_write(struct pcie_port *pp, int 
where, int  size,
} else
return PCIBIOS_BAD_REGISTER_NUMBER;
 
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
 }
 
 static int hisi_pcie_link_up_hip05(struct hisi_pcie *hisi_pcie)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c 
b/drivers/pci/controller/dwc/pcie-tegra194.c
index 92b77f7d8354..34fe0084a4d1 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -581,7 +581,7 @@ static int tegra_pcie_dw_rd_own_conf(struct pcie_port *pp, 
int where, int size,
 */
if (where == PORT_LOGIC_MSIX_DOORBELL) {
*val = 0x;
-   return PCIBIOS_SUCCESSFUL;
+   return 0;
}
 
return dw_pcie_read(pci->dbi_base + where, size, val);
@@ -599,7 +599,7 @@ static int tegra_pcie_dw_wr_own_conf(struct

[RFC PATCH 15/35] i2c/busses: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 15/35

 drivers/i2c/busses/i2c-ali15x3.c |  5 ++---
 drivers/i2c/busses/i2c-nforce2.c |  3 +--
 drivers/i2c/busses/i2c-sis5595.c | 15 +--
 3 files changed, 8 insertions(+), 15 deletions(-)

diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index 359ee3e0864a..c9e779cc184e 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -167,11 +167,10 @@ static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
if(force_addr) {
dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
ali15x3_smba);
-   if (0 != pci_write_config_word(ALI15X3_dev,
-   SMBBA,
+   if (pci_write_config_word(ALI15X3_dev, SMBBA,
ali15x3_smba))
goto error;
-   if (0 != pci_read_config_word(ALI15X3_dev,
+   if (pci_read_config_word(ALI15X3_dev,
SMBBA, &a))
goto error;
if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 385f4f446f36..54d2985b7aaf 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -327,8 +327,7 @@ static int nforce2_probe_smb(struct pci_dev *dev, int bar, 
int alt_reg,
/* Older incarnations of the device used non-standard BARs */
u16 iobase;
 
-   if (pci_read_config_word(dev, alt_reg, &iobase)
-   != 0) {
+   if (pci_read_config_word(dev, alt_reg, &iobase)) {
dev_err(&dev->dev, "Error reading PCI config for %s\n",
name);
return -EIO;
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index fbe3ee31eae3..b016f48519d3 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -175,11 +175,9 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
 
if (force_addr) {
dev_info(&SIS5595_dev->dev, "forcing ISA address 0x%04X\n", 
sis5595_base);
-   if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base)
-   != 0)
+   if (pci_write_config_word(SIS5595_dev, ACPI_BASE, sis5595_base))
goto error;
-   if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a)
-   != 0)
+   if (pci_read_config_word(SIS5595_dev, ACPI_BASE, &a))
goto error;
if ((a & ~(SIS5595_EXTENT - 1)) != sis5595_base) {
/* doesn't work for some chips! */
@@ -188,16 +186,13 @@ static int sis5595_setup(struct pci_dev *SIS5595_dev)
}
}
 
-   if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-   != 0)
+   if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
goto error;
if ((val & 0x80) == 0) {
dev_info(&SIS5595_dev->dev, "enabling ACPI\n");
-   if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val 
| 0x80)
-   != 0)
+   if (pci_write_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, val 
| 0x80))
goto error;
-   if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val)
-   != 0)
+   if (pci_read_config_byte(SIS5595_dev, SIS5595_ENABLE_REG, &val))
goto error;
if ((val & 0x80) == 0) {
/* doesn't work for some chips? */
-- 
2.18.2



[RFC PATCH 13/35] cxl: Change PCIBIOS_SUCCESSFUL to 0

2020-07-13 Thread Saheed O. Bolarinwa
In reference to the PCI spec (Chapter 2), PCIBIOS* is an x86 concept.
There scope should be limited within arch/x86.

Change all PCIBIOS_SUCCESSFUL to 0

Signed-off-by: "Saheed O. Bolarinwa" 
---
 drivers/misc/cxl/vphb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
index 1cf320e2a415..1264253cc07b 100644
--- a/drivers/misc/cxl/vphb.c
+++ b/drivers/misc/cxl/vphb.c
@@ -150,7 +150,7 @@ static int cxl_pcie_read_config(struct pci_bus *bus, 
unsigned int devfn,
 
 out:
cxl_afu_configured_put(afu);
-   return rc ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+   return rc ? PCIBIOS_DEVICE_NOT_FOUND : 0;
 }
 
 static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
@@ -184,7 +184,7 @@ static int cxl_pcie_write_config(struct pci_bus *bus, 
unsigned int devfn,
 
 out:
cxl_afu_configured_put(afu);
-   return rc ? PCIBIOS_SET_FAILED : PCIBIOS_SUCCESSFUL;
+   return rc ? PCIBIOS_SET_FAILED : 0;
 }
 
 static struct pci_ops cxl_pcie_pci_ops =
-- 
2.18.2



[RFC PATCH 04/35] scsi: ipr: Tidy Success/Failure checks

2020-07-13 Thread Saheed O. Bolarinwa
Remove unnecessary check for 0.

Signed-off-by: "Saheed O. Bolarinwa" 
---
This patch depends on PATCH 03/35

 drivers/scsi/ipr.c | 12 ++--
 drivers/scsi/pmcraid.c |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index b6c52a04cf52..e714f82769bc 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -775,7 +775,7 @@ static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg 
*ioa_cfg)
return 0;
 
if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
-&ioa_cfg->saved_pcix_cmd_reg) != 0) {
+&ioa_cfg->saved_pcix_cmd_reg)) {
dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command 
register\n");
return -EIO;
}
@@ -797,7 +797,7 @@ static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
 
if (pcix_cmd_reg) {
if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + 
PCI_X_CMD,
- ioa_cfg->saved_pcix_cmd_reg) != 0) {
+ ioa_cfg->saved_pcix_cmd_reg)) {
dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X 
command register\n");
return -EIO;
}
@@ -8748,7 +8748,7 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
else
rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, 
PCI_BIST_START);
 
-   if (rc == 0) {
+   if (!rc) {
ipr_cmd->job_step = ipr_reset_bist_done;
ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
rc = IPR_RC_JOB_RETURN;
@@ -8946,7 +8946,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
ENTER;
rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
 
-   if ((rc == 0) && (cmd_reg & PCI_COMMAND_MEMORY)) {
+   if ((!rc) && (cmd_reg & PCI_COMMAND_MEMORY)) {
ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
writel(IPR_UPROCI_RESET_ALERT, 
ioa_cfg->regs.set_uproc_interrupt_reg32);
ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
@@ -10256,7 +10256,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
   ioa_cfg->chip_cfg->cache_line_size);
 
-   if (rc != 0) {
+   if (rc) {
dev_err(&pdev->dev, "Write of cache line size failed\n");
ipr_wait_for_pci_err_recovery(ioa_cfg);
rc = -EIO;
@@ -10337,7 +10337,7 @@ static int ipr_probe_ioa(struct pci_dev *pdev,
/* Save away PCI config space for use following IOA reset */
rc = pci_save_state(pdev);
 
-   if (rc != 0) {
+   if (rc) {
dev_err(&pdev->dev, "Failed to save PCI config space\n");
rc = -EIO;
goto cleanup_nolog;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 5f6e440f0dcd..151aa61b674b 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -553,7 +553,7 @@ static void pmcraid_bist_done(struct timer_list *t)
rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
 
/* If PCI config space can't be accessed wait for another two secs */
-   if ((rc != 0 || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
+   if ((rc || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
cmd->time_left > 0) {
pmcraid_info("BIST not complete, waiting another 2 secs\n");
cmd->timer.expires = jiffies + cmd->time_left;
@@ -649,7 +649,7 @@ static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
 * BIST or slot_reset
 */
rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
-   if ((rc == 0) && (pci_reg & PCI_COMMAND_MEMORY)) {
+   if ((!rc) && (pci_reg & PCI_COMMAND_MEMORY)) {
 
/* wait for IOA permission i.e until CRITICAL_OPERATION bit is
 * reset IOA doesn't generate any interrupts when CRITICAL
-- 
2.18.2