[PATCH 12/13] powerpc/fsl_rio: apply changes for RIO spec rev 3
- Remove check for parallel PHY - Set LP-Serial Register Map type Signed-off-by: Alexandre BounineCc: Matt Porter Cc: Benjamin Herrenschmidt Cc: Michael Ellerman Cc: Andre van Herk Cc: Barry Wood Cc: linux-kernel@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org --- arch/powerpc/sysdev/fsl_rio.c | 12 ++-- 1 files changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 1958838..ee5b9f1 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -643,19 +643,11 @@ int fsl_rio_setup(struct platform_device *dev) port->ops = ops; port->priv = priv; port->phys_efptr = 0x100; + port->phys_rmap = 1; priv->regs_win = rio_regs_win; - /* Probe the master port phy type */ ccsr = in_be32(priv->regs_win + RIO_CCSR + i*0x20); - port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL; - if (port->phy_type == RIO_PHY_PARALLEL) { - dev_err(>dev, "RIO: Parallel PHY type, unsupported port type!\n"); - release_resource(>iores); - kfree(priv); - kfree(port); - continue; - } - dev_info(>dev, "RapidIO PHY type: Serial\n"); + /* Checking the port training status */ if (in_be32((priv->regs_win + RIO_ESCSR + i*0x20)) & 1) { dev_err(>dev, "Port %d is not ready. " -- 1.7.8.4
[PATCH 12/13] powerpc/fsl_rio: apply changes for RIO spec rev 3
- Remove check for parallel PHY - Set LP-Serial Register Map type Signed-off-by: Alexandre Bounine Cc: Matt Porter Cc: Benjamin Herrenschmidt Cc: Michael Ellerman Cc: Andre van Herk Cc: Barry Wood Cc: linux-kernel@vger.kernel.org Cc: linuxppc-...@lists.ozlabs.org --- arch/powerpc/sysdev/fsl_rio.c | 12 ++-- 1 files changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 1958838..ee5b9f1 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -643,19 +643,11 @@ int fsl_rio_setup(struct platform_device *dev) port->ops = ops; port->priv = priv; port->phys_efptr = 0x100; + port->phys_rmap = 1; priv->regs_win = rio_regs_win; - /* Probe the master port phy type */ ccsr = in_be32(priv->regs_win + RIO_CCSR + i*0x20); - port->phy_type = (ccsr & 1) ? RIO_PHY_SERIAL : RIO_PHY_PARALLEL; - if (port->phy_type == RIO_PHY_PARALLEL) { - dev_err(>dev, "RIO: Parallel PHY type, unsupported port type!\n"); - release_resource(>iores); - kfree(priv); - kfree(port); - continue; - } - dev_info(>dev, "RapidIO PHY type: Serial\n"); + /* Checking the port training status */ if (in_be32((priv->regs_win + RIO_ESCSR + i*0x20)) & 1) { dev_err(>dev, "Port %d is not ready. " -- 1.7.8.4