Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On 06.06.2018 13:45, Thierry Reding wrote: > On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: >> Hello, >> >> Couple years ago the Tegra20 EMC driver was removed from the kernel >> due to incompatible changes in the Tegra's clock driver. This patchset >> introduces a modernized EMC driver. Currently the sole purpose of the >> driver is to initialize DRAM frequency to maximum rate during of the >> kernels boot-up. Later we may consider implementing dynamic memory >> frequency scaling, utilizing functionality provided by this driver. >> >> Changelog: >> >> v2: >> - Minor code cleanups like consistent use of writel_relaxed instead >>of non-relaxed version, reworded error messages, etc. >> >> - Factored out use_pllm_ud bit checking into a standalone patch for >>consistency. >> >> Dmitry Osipenko (5): >> dt: bindings: tegra20-emc: Document interrupt property >> ARM: dts: tegra20: Add interrupt to External Memory Controller >> clk: tegra20: Turn EMC clock gate into divider >> clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC >> memory: tegra: Introduce Tegra20 EMC driver > > I took a brief look and didn't spot any dependencies between the clk and > memory patches. Is it correct that these can be applied separately? Yes, it is correct.
Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On 06.06.2018 13:45, Thierry Reding wrote: > On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: >> Hello, >> >> Couple years ago the Tegra20 EMC driver was removed from the kernel >> due to incompatible changes in the Tegra's clock driver. This patchset >> introduces a modernized EMC driver. Currently the sole purpose of the >> driver is to initialize DRAM frequency to maximum rate during of the >> kernels boot-up. Later we may consider implementing dynamic memory >> frequency scaling, utilizing functionality provided by this driver. >> >> Changelog: >> >> v2: >> - Minor code cleanups like consistent use of writel_relaxed instead >>of non-relaxed version, reworded error messages, etc. >> >> - Factored out use_pllm_ud bit checking into a standalone patch for >>consistency. >> >> Dmitry Osipenko (5): >> dt: bindings: tegra20-emc: Document interrupt property >> ARM: dts: tegra20: Add interrupt to External Memory Controller >> clk: tegra20: Turn EMC clock gate into divider >> clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC >> memory: tegra: Introduce Tegra20 EMC driver > > I took a brief look and didn't spot any dependencies between the clk and > memory patches. Is it correct that these can be applied separately? Yes, it is correct.
Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: > Hello, > > Couple years ago the Tegra20 EMC driver was removed from the kernel > due to incompatible changes in the Tegra's clock driver. This patchset > introduces a modernized EMC driver. Currently the sole purpose of the > driver is to initialize DRAM frequency to maximum rate during of the > kernels boot-up. Later we may consider implementing dynamic memory > frequency scaling, utilizing functionality provided by this driver. > > Changelog: > > v2: > - Minor code cleanups like consistent use of writel_relaxed instead > of non-relaxed version, reworded error messages, etc. > > - Factored out use_pllm_ud bit checking into a standalone patch for > consistency. > > Dmitry Osipenko (5): > dt: bindings: tegra20-emc: Document interrupt property > ARM: dts: tegra20: Add interrupt to External Memory Controller > clk: tegra20: Turn EMC clock gate into divider > clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC > memory: tegra: Introduce Tegra20 EMC driver I took a brief look and didn't spot any dependencies between the clk and memory patches. Is it correct that these can be applied separately? Thierry signature.asc Description: PGP signature
Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: > Hello, > > Couple years ago the Tegra20 EMC driver was removed from the kernel > due to incompatible changes in the Tegra's clock driver. This patchset > introduces a modernized EMC driver. Currently the sole purpose of the > driver is to initialize DRAM frequency to maximum rate during of the > kernels boot-up. Later we may consider implementing dynamic memory > frequency scaling, utilizing functionality provided by this driver. > > Changelog: > > v2: > - Minor code cleanups like consistent use of writel_relaxed instead > of non-relaxed version, reworded error messages, etc. > > - Factored out use_pllm_ud bit checking into a standalone patch for > consistency. > > Dmitry Osipenko (5): > dt: bindings: tegra20-emc: Document interrupt property > ARM: dts: tegra20: Add interrupt to External Memory Controller > clk: tegra20: Turn EMC clock gate into divider > clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC > memory: tegra: Introduce Tegra20 EMC driver I took a brief look and didn't spot any dependencies between the clk and memory patches. Is it correct that these can be applied separately? Thierry signature.asc Description: PGP signature
Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: > Hello, > > Couple years ago the Tegra20 EMC driver was removed from the kernel > due to incompatible changes in the Tegra's clock driver. This patchset > introduces a modernized EMC driver. Currently the sole purpose of the > driver is to initialize DRAM frequency to maximum rate during of the > kernels boot-up. Later we may consider implementing dynamic memory > frequency scaling, utilizing functionality provided by this driver. > > Changelog: > > v2: > - Minor code cleanups like consistent use of writel_relaxed instead > of non-relaxed version, reworded error messages, etc. > > - Factored out use_pllm_ud bit checking into a standalone patch for > consistency. > > Dmitry Osipenko (5): > dt: bindings: tegra20-emc: Document interrupt property > ARM: dts: tegra20: Add interrupt to External Memory Controller > clk: tegra20: Turn EMC clock gate into divider > clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC > memory: tegra: Introduce Tegra20 EMC driver > Series Acked-By: Peter De Schrijver
Re: [PATCH v2 0/5] Tegra20 External Memory Controller driver
On Mon, Jun 04, 2018 at 01:36:49AM +0300, Dmitry Osipenko wrote: > Hello, > > Couple years ago the Tegra20 EMC driver was removed from the kernel > due to incompatible changes in the Tegra's clock driver. This patchset > introduces a modernized EMC driver. Currently the sole purpose of the > driver is to initialize DRAM frequency to maximum rate during of the > kernels boot-up. Later we may consider implementing dynamic memory > frequency scaling, utilizing functionality provided by this driver. > > Changelog: > > v2: > - Minor code cleanups like consistent use of writel_relaxed instead > of non-relaxed version, reworded error messages, etc. > > - Factored out use_pllm_ud bit checking into a standalone patch for > consistency. > > Dmitry Osipenko (5): > dt: bindings: tegra20-emc: Document interrupt property > ARM: dts: tegra20: Add interrupt to External Memory Controller > clk: tegra20: Turn EMC clock gate into divider > clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC > memory: tegra: Introduce Tegra20 EMC driver > Series Acked-By: Peter De Schrijver
[PATCH v2 0/5] Tegra20 External Memory Controller driver
Hello, Couple years ago the Tegra20 EMC driver was removed from the kernel due to incompatible changes in the Tegra's clock driver. This patchset introduces a modernized EMC driver. Currently the sole purpose of the driver is to initialize DRAM frequency to maximum rate during of the kernels boot-up. Later we may consider implementing dynamic memory frequency scaling, utilizing functionality provided by this driver. Changelog: v2: - Minor code cleanups like consistent use of writel_relaxed instead of non-relaxed version, reworded error messages, etc. - Factored out use_pllm_ud bit checking into a standalone patch for consistency. Dmitry Osipenko (5): dt: bindings: tegra20-emc: Document interrupt property ARM: dts: tegra20: Add interrupt to External Memory Controller clk: tegra20: Turn EMC clock gate into divider clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC memory: tegra: Introduce Tegra20 EMC driver .../bindings/arm/tegra/nvidia,tegra20-emc.txt | 2 + arch/arm/boot/dts/tegra20.dtsi| 1 + drivers/clk/tegra/clk-tegra20.c | 46 +- drivers/memory/tegra/Kconfig | 10 + drivers/memory/tegra/Makefile | 1 + drivers/memory/tegra/tegra20-emc.c| 586 ++ 6 files changed, 636 insertions(+), 10 deletions(-) create mode 100644 drivers/memory/tegra/tegra20-emc.c -- 2.17.0
[PATCH v2 0/5] Tegra20 External Memory Controller driver
Hello, Couple years ago the Tegra20 EMC driver was removed from the kernel due to incompatible changes in the Tegra's clock driver. This patchset introduces a modernized EMC driver. Currently the sole purpose of the driver is to initialize DRAM frequency to maximum rate during of the kernels boot-up. Later we may consider implementing dynamic memory frequency scaling, utilizing functionality provided by this driver. Changelog: v2: - Minor code cleanups like consistent use of writel_relaxed instead of non-relaxed version, reworded error messages, etc. - Factored out use_pllm_ud bit checking into a standalone patch for consistency. Dmitry Osipenko (5): dt: bindings: tegra20-emc: Document interrupt property ARM: dts: tegra20: Add interrupt to External Memory Controller clk: tegra20: Turn EMC clock gate into divider clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC memory: tegra: Introduce Tegra20 EMC driver .../bindings/arm/tegra/nvidia,tegra20-emc.txt | 2 + arch/arm/boot/dts/tegra20.dtsi| 1 + drivers/clk/tegra/clk-tegra20.c | 46 +- drivers/memory/tegra/Kconfig | 10 + drivers/memory/tegra/Makefile | 1 + drivers/memory/tegra/tegra20-emc.c| 586 ++ 6 files changed, 636 insertions(+), 10 deletions(-) create mode 100644 drivers/memory/tegra/tegra20-emc.c -- 2.17.0
