[tip:irq/core] irqchip/mips-gic: Report that effective affinity is a single target

[tip-bot for Marc Zyngier]

Commit-ID:  18416e45b76189daf37ba53b2bd0b9ac3749e92e
Gitweb: http://git.kernel.org/tip/18416e45b76189daf37ba53b2bd0b9ac3749e92e
Author: Marc Zyngier 
AuthorDate: Fri, 18 Aug 2017 09:39:24 +0100
Committer:  Thomas Gleixner 
CommitDate: Fri, 18 Aug 2017 10:54:43 +0200

irqchip/mips-gic: Report that effective affinity is a single target

The MIPS GIC driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: Marc Zyngier 
Signed-off-by: Thomas Gleixner 
Cc: Andrew Lunn 
Cc: James Hogan 
Cc: Jason Cooper 
Cc: Paul Burton 
Cc: Chris Zankel 
Cc: Kevin Cernekee 
Cc: Wei Xu 
Cc: Max Filippov 
Cc: Florian Fainelli 
Cc: Gregory Clement 
Cc: Matt Redfearn 
Cc: Sebastian Hesselbarth 
Link: http://lkml.kernel.org/r/20170818083925.10108-12-marc.zyng...@arm.com

---
 drivers/irqchip/Kconfig|  1 +
 drivers/irqchip/irq-mips-gic.c | 10 +++---
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 39bfa5b..bca9a88 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -141,6 +141,7 @@ config IRQ_MIPS_CPU
select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
select IRQ_DOMAIN
select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
+   select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config CLPS711X_IRQCHIP
bool
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 6ab1d3a..6461380 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -445,24 +445,27 @@ static int gic_set_affinity(struct irq_data *d, const 
struct cpumask *cpumask,
unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
cpumask_t   tmp = CPU_MASK_NONE;
unsigned long   flags;
-   int i;
+   int i, cpu;
 
cpumask_and(, cpumask, cpu_online_mask);
if (cpumask_empty())
return -EINVAL;
 
+   cpu = cpumask_first();
+
/* Assumption : cpumask refers to a single CPU */
spin_lock_irqsave(_lock, flags);
 
/* Re-route this IRQ */
-   gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first()));
+   gic_map_to_vpe(irq, mips_cm_vp_id(cpu));
 
/* Update the pcpu_masks */
for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
clear_bit(irq, pcpu_masks[i].pcpu_mask);
-   set_bit(irq, pcpu_masks[cpumask_first()].pcpu_mask);
+   set_bit(irq, pcpu_masks[cpu].pcpu_mask);
 
cpumask_copy(irq_data_get_affinity_mask(d), cpumask);
+   irq_data_update_effective_affinity(d, cpumask_of(cpu));
spin_unlock_irqrestore(_lock, flags);
 
return IRQ_SET_MASK_OK_NOCOPY;
@@ -716,6 +719,7 @@ static int gic_irq_domain_map(struct irq_domain *d, 
unsigned int virq,
if (err)
return err;
 
+   
irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq)));
return gic_shared_irq_domain_map(d, virq, hwirq, 0);
}
 

[tip:irq/core] irqchip/mips-gic: Report that effective affinity is a single target

[tip-bot for Marc Zyngier]

Commit-ID:  18416e45b76189daf37ba53b2bd0b9ac3749e92e
Gitweb: http://git.kernel.org/tip/18416e45b76189daf37ba53b2bd0b9ac3749e92e
Author: Marc Zyngier 
AuthorDate: Fri, 18 Aug 2017 09:39:24 +0100
Committer:  Thomas Gleixner 
CommitDate: Fri, 18 Aug 2017 10:54:43 +0200

irqchip/mips-gic: Report that effective affinity is a single target

The MIPS GIC driver only targets a single CPU at a time, even if
the notional affinity is wider. Let's inform the core code
about this.

Signed-off-by: Marc Zyngier 
Signed-off-by: Thomas Gleixner 
Cc: Andrew Lunn 
Cc: James Hogan 
Cc: Jason Cooper 
Cc: Paul Burton 
Cc: Chris Zankel 
Cc: Kevin Cernekee 
Cc: Wei Xu 
Cc: Max Filippov 
Cc: Florian Fainelli 
Cc: Gregory Clement 
Cc: Matt Redfearn 
Cc: Sebastian Hesselbarth 
Link: http://lkml.kernel.org/r/20170818083925.10108-12-marc.zyng...@arm.com

---
 drivers/irqchip/Kconfig|  1 +
 drivers/irqchip/irq-mips-gic.c | 10 +++---
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 39bfa5b..bca9a88 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -141,6 +141,7 @@ config IRQ_MIPS_CPU
select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
select IRQ_DOMAIN
select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
+   select GENERIC_IRQ_EFFECTIVE_AFF_MASK
 
 config CLPS711X_IRQCHIP
bool
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 6ab1d3a..6461380 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -445,24 +445,27 @@ static int gic_set_affinity(struct irq_data *d, const 
struct cpumask *cpumask,
unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
cpumask_t   tmp = CPU_MASK_NONE;
unsigned long   flags;
-   int i;
+   int i, cpu;
 
cpumask_and(, cpumask, cpu_online_mask);
if (cpumask_empty())
return -EINVAL;
 
+   cpu = cpumask_first();
+
/* Assumption : cpumask refers to a single CPU */
spin_lock_irqsave(_lock, flags);
 
/* Re-route this IRQ */
-   gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first()));
+   gic_map_to_vpe(irq, mips_cm_vp_id(cpu));
 
/* Update the pcpu_masks */
for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
clear_bit(irq, pcpu_masks[i].pcpu_mask);
-   set_bit(irq, pcpu_masks[cpumask_first()].pcpu_mask);
+   set_bit(irq, pcpu_masks[cpu].pcpu_mask);
 
cpumask_copy(irq_data_get_affinity_mask(d), cpumask);
+   irq_data_update_effective_affinity(d, cpumask_of(cpu));
spin_unlock_irqrestore(_lock, flags);
 
return IRQ_SET_MASK_OK_NOCOPY;
@@ -716,6 +719,7 @@ static int gic_irq_domain_map(struct irq_domain *d, 
unsigned int virq,
if (err)
return err;
 
+   
irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq)));
return gic_shared_irq_domain_map(d, virq, hwirq, 0);
}