Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Otavio Salvador]

On Tue, Oct 11, 2016 at 3:00 PM, Fabio Estevam  wrote:
> Hi Ken,
>
> On Tue, Oct 11, 2016 at 2:49 PM, Ken.Lin  wrote:
>
>> With the patches applied, the pixel clock (14850 required for 
>> 1920x1080@60) is correct as we checked in kernel 4.7 and the actual 
>> measurement result looked good as we expected.
>> I think the patches should fix the issue.
>
> That's good news. Thanks for testing.
>
> Emil is working on a v3 version of the patch series.
>
> Emil,
>
> Please add Ken Lin on Cc when you submit v3.

And what will be done regarding 4.8? Is the faulty change to be
reverted or this patches will be backported?

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750

Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Otavio Salvador]

On Tue, Oct 11, 2016 at 3:00 PM, Fabio Estevam  wrote:
> Hi Ken,
>
> On Tue, Oct 11, 2016 at 2:49 PM, Ken.Lin  wrote:
>
>> With the patches applied, the pixel clock (14850 required for 
>> 1920x1080@60) is correct as we checked in kernel 4.7 and the actual 
>> measurement result looked good as we expected.
>> I think the patches should fix the issue.
>
> That's good news. Thanks for testing.
>
> Emil is working on a v3 version of the patch series.
>
> Emil,
>
> Please add Ken Lin on Cc when you submit v3.

And what will be done regarding 4.8? Is the faulty change to be
reverted or this patches will be backported?

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750

Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Fabio Estevam]

Hi Ken,

On Tue, Oct 11, 2016 at 2:49 PM, Ken.Lin  wrote:

> With the patches applied, the pixel clock (14850 required for 
> 1920x1080@60) is correct as we checked in kernel 4.7 and the actual 
> measurement result looked good as we expected.
> I think the patches should fix the issue.

That's good news. Thanks for testing.

Emil is working on a v3 version of the patch series.

Emil,

Please add Ken Lin on Cc when you submit v3.

Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Fabio Estevam]

Hi Ken,

On Tue, Oct 11, 2016 at 2:49 PM, Ken.Lin  wrote:

> With the patches applied, the pixel clock (14850 required for 
> 1920x1080@60) is correct as we checked in kernel 4.7 and the actual 
> measurement result looked good as we expected.
> I think the patches should fix the issue.

That's good news. Thanks for testing.

Emil is working on a v3 version of the patch series.

Emil,

Please add Ken Lin on Cc when you submit v3.

RE: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Ken.Lin]

Hi Fabio,


> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Thursday, October 6, 2016 4:38 PM
> To: Ken.Lin
> Cc: shawn...@kernel.org; ker...@pengutronix.de; sb...@codeaurora.org;
> mturque...@baylibre.com; linux-arm-ker...@lists.infradead.org; linux-
> c...@vger.kernel.org; linux-kernel@vger.kernel.org; Peter.Stretz; 
> Peter.Chiang;
> Akshay Bhat; Jason Moss; e...@limesaudio.com
> Subject: Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL 
> rate
> formula
> 
> Hi Ken,
> 
> On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin <ken@advantech.com> wrote:
> > Hi,
> >
> > We found a possible regression issue (not seen in kernel 4.7-stable), which 
> > has
> to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c
> when we did a DP test (1920x1080@60) with clock source PLL5.
> > The DP desired pixel clock (148.5MHz that is calculated from the input of 
> > PLL
> output frequency) would be correct again when we reverted this commit.
> > Could you please help check if the commit has the side effect since it would
> have impacts on our on-going project when it requires moving from kernel 4.7
> to kernel 4.8 or newer version?
> >
> > Please check the following URL for the details
> > https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_
> > imx_correct_VL_PLL_rate_formula.pdf?dl=0
> 
> Do these patches from Emil fix the issue?
> 
> http://www.spinics.net/lists/arm-kernel/msg535204.html
> 
> and
> 
> http://www.spinics.net/lists/arm-kernel/msg535203.html
> 
> Thanks


With the patches applied, the pixel clock (14850 required for 1920x1080@60) 
is correct as we checked in kernel 4.7 and the actual measurement result looked 
good as we expected.
I think the patches should fix the issue.

Ref: /sys/kernel/debug/clk/clk_summary 

pll5  11  103950  0 0
   pll5_bypass11  103950  0 0
  pll5_video  11  103950  0 0
 pll5_post_div11   51975  0 0
pll5_video_div22   51975  0 0
   ipu2_di1_pre_sel   00   51975
  0 0
  ipu2_di1_pre   00   17325 
 0 0
 ipu2_di1_sel   00   17325  
0 0
ipu2_di1   00   17325   
   0 0
   ipu2_di0_pre_sel   00   51975
  0 0
  ipu2_di0_pre   00   17325 
 0 0
   ldb_di1_sel11   51975  0 0
  ldb_di1_div_3_5   11   14850  
0 0
 ldb_di1_podf   11   14850  
0 0
ldb_di1   22   14850
  0 0
   ipu2_di0_sel   11   
14850  0 0
  ipu2_di0   11   14850 
 0 0
   ldb_di0_sel11   51975  0 0
  ldb_di0_div_3_5   11   14850  
0 0
 ldb_di0_podf   11   14850  
0 0
ldb_di0   11   14850
  0 0


Ref: kernel debug messages

[  113.848959] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
mode->hdisplay: 1920
[  113.857201] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
mode->vdisplay: 1080
[  113.865421] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
attached to encoder types 0x8
[  113.874483] imx-ipuv3 280.ipu: disp 0: panel size = 1920 x 1080
[  113.880803] imx-ipuv3 280.ipu: Clocks: IPU 26400Hz DI 7584Hz 
Needed 14850Hz
[  113.889252] imx-ipuv3 280.ipu: Want 14850Hz IPU 26400Hz DI 
7584Hz using DI, 7584Hz
[  113.898768] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
22750 want: 51975
[  113.908018] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock after: 
51975
[  113.915886] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
14850 want: 14850
[  113.925050] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock after: 
14850
[  113.932928] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
51975 want: 51975
[  113.942096] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock afte

RE: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Ken.Lin]

Hi Fabio,


> -Original Message-
> From: Fabio Estevam [mailto:feste...@gmail.com]
> Sent: Thursday, October 6, 2016 4:38 PM
> To: Ken.Lin
> Cc: shawn...@kernel.org; ker...@pengutronix.de; sb...@codeaurora.org;
> mturque...@baylibre.com; linux-arm-ker...@lists.infradead.org; linux-
> c...@vger.kernel.org; linux-kernel@vger.kernel.org; Peter.Stretz; 
> Peter.Chiang;
> Akshay Bhat; Jason Moss; e...@limesaudio.com
> Subject: Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL 
> rate
> formula
> 
> Hi Ken,
> 
> On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin  wrote:
> > Hi,
> >
> > We found a possible regression issue (not seen in kernel 4.7-stable), which 
> > has
> to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c
> when we did a DP test (1920x1080@60) with clock source PLL5.
> > The DP desired pixel clock (148.5MHz that is calculated from the input of 
> > PLL
> output frequency) would be correct again when we reverted this commit.
> > Could you please help check if the commit has the side effect since it would
> have impacts on our on-going project when it requires moving from kernel 4.7
> to kernel 4.8 or newer version?
> >
> > Please check the following URL for the details
> > https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_
> > imx_correct_VL_PLL_rate_formula.pdf?dl=0
> 
> Do these patches from Emil fix the issue?
> 
> http://www.spinics.net/lists/arm-kernel/msg535204.html
> 
> and
> 
> http://www.spinics.net/lists/arm-kernel/msg535203.html
> 
> Thanks


With the patches applied, the pixel clock (14850 required for 1920x1080@60) 
is correct as we checked in kernel 4.7 and the actual measurement result looked 
good as we expected.
I think the patches should fix the issue.

Ref: /sys/kernel/debug/clk/clk_summary 

pll5  11  103950  0 0
   pll5_bypass11  103950  0 0
  pll5_video  11  103950  0 0
 pll5_post_div11   51975  0 0
pll5_video_div22   51975  0 0
   ipu2_di1_pre_sel   00   51975
  0 0
  ipu2_di1_pre   00   17325 
 0 0
 ipu2_di1_sel   00   17325  
0 0
ipu2_di1   00   17325   
   0 0
   ipu2_di0_pre_sel   00   51975
  0 0
  ipu2_di0_pre   00   17325 
 0 0
   ldb_di1_sel11   51975  0 0
  ldb_di1_div_3_5   11   14850  
0 0
 ldb_di1_podf   11   14850  
0 0
ldb_di1   22   14850
  0 0
   ipu2_di0_sel   11   
14850  0 0
  ipu2_di0   11   14850 
 0 0
   ldb_di0_sel11   51975  0 0
  ldb_di0_div_3_5   11   14850  
0 0
 ldb_di0_podf   11   14850  
0 0
ldb_di0   11   14850
  0 0


Ref: kernel debug messages

[  113.848959] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
mode->hdisplay: 1920
[  113.857201] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
mode->vdisplay: 1080
[  113.865421] imx-ipuv3-crtc imx-ipuv3-crtc.6: ipu_crtc_mode_set_nofb: 
attached to encoder types 0x8
[  113.874483] imx-ipuv3 280.ipu: disp 0: panel size = 1920 x 1080
[  113.880803] imx-ipuv3 280.ipu: Clocks: IPU 26400Hz DI 7584Hz 
Needed 14850Hz
[  113.889252] imx-ipuv3 280.ipu: Want 14850Hz IPU 26400Hz DI 
7584Hz using DI, 7584Hz
[  113.898768] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
22750 want: 51975
[  113.908018] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock after: 
51975
[  113.915886] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
14850 want: 14850
[  113.925050] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock after: 
14850
[  113.932928] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock: now: 
51975 want: 51975
[  113.942096] imx-ldb 200.aips-bus:ldb@020e0008: imx_ldb_set_clock after: 
51975
[  113.949938] im

Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Fabio Estevam]

Hi Ken,

On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin  wrote:
> Hi,
>
> We found a possible regression issue (not seen in kernel 4.7-stable), which 
> has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c 
> when we did a DP test (1920x1080@60) with clock source PLL5.
> The DP desired pixel clock (148.5MHz that is calculated from the input of PLL 
> output frequency) would be correct again when we reverted this commit.
> Could you please help check if the commit has the side effect since it would 
> have impacts on our on-going project when it requires moving from kernel 4.7 
> to kernel 4.8 or newer version?
>
> Please check the following URL for the details
> https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0

Do these patches from Emil fix the issue?

http://www.spinics.net/lists/arm-kernel/msg535204.html

and

http://www.spinics.net/lists/arm-kernel/msg535203.html

Thanks

Re: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Fabio Estevam]

Hi Ken,

On Thu, Oct 6, 2016 at 8:26 PM, Ken.Lin  wrote:
> Hi,
>
> We found a possible regression issue (not seen in kernel 4.7-stable), which 
> has to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c 
> when we did a DP test (1920x1080@60) with clock source PLL5.
> The DP desired pixel clock (148.5MHz that is calculated from the input of PLL 
> output frequency) would be correct again when we reverted this commit.
> Could you please help check if the commit has the side effect since it would 
> have impacts on our on-going project when it requires moving from kernel 4.7 
> to kernel 4.8 or newer version?
>
> Please check the following URL for the details
> https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0

Do these patches from Emil fix the issue?

http://www.spinics.net/lists/arm-kernel/msg535204.html

and

http://www.spinics.net/lists/arm-kernel/msg535203.html

Thanks

RE: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Ken.Lin]

-Original Message-
From: Ken.Lin 
Sent: Thursday, October 6, 2016 4:21 PM
To: 'shawn...@kernel.org'; 'ker...@pengutronix.de'; 'sb...@codeaurora.org'; 
'mturque...@baylibre.com'
Cc: 'linux-arm-ker...@lists.infradead.org'; 'linux-...@vger.kernel.org'; 
'linux-kernel@vger.kernel.org'; Peter.Stretz; Peter.Chiang; Akshay Bhat
Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate 
formula

Hi,

We found a possible regression issue (not seen in kernel 4.7-stable), which has 
to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c when we 
did a DP test (1920x1080@60) with clock source PLL5.
The DP desired pixel clock (148.5MHz that is calculated from the input of PLL 
output frequency) would be correct again when we reverted this commit.
Could you please help check if the commit has the side effect since it would 
have impacts on our on-going project when it requires moving from kernel 4.7 to 
kernel 4.8 or newer version?

Please check the following URL for the details
https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0


Thank you

Cheers,
Ken Lin

-- 
This message has been scanned for viruses and
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RE: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate formula

[Ken.Lin]

-Original Message-
From: Ken.Lin 
Sent: Thursday, October 6, 2016 4:21 PM
To: 'shawn...@kernel.org'; 'ker...@pengutronix.de'; 'sb...@codeaurora.org'; 
'mturque...@baylibre.com'
Cc: 'linux-arm-ker...@lists.infradead.org'; 'linux-...@vger.kernel.org'; 
'linux-kernel@vger.kernel.org'; Peter.Stretz; Peter.Chiang; Akshay Bhat
Subject: The possible regression in kernel 4.8 - clk: imx: correct AV PLL rate 
formula

Hi,

We found a possible regression issue (not seen in kernel 4.7-stable), which has 
to do with the new NXP commit ba7f4f557eb67ee21c979c8539dc1886f5d5341c when we 
did a DP test (1920x1080@60) with clock source PLL5.
The DP desired pixel clock (148.5MHz that is calculated from the input of PLL 
output frequency) would be correct again when we reverted this commit.
Could you please help check if the commit has the side effect since it would 
have impacts on our on-going project when it requires moving from kernel 4.7 to 
kernel 4.8 or newer version?

Please check the following URL for the details
https://www.dropbox.com/s/7wc5jdp8unlsiob/possible_regression_for_clk_imx_correct_VL_PLL_rate_formula.pdf?dl=0


Thank you

Cheers,
Ken Lin

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.