[PATCH 04/29] arm: dts: exynos: Correct DWC USB3 compatible string

[Serge Semin]

Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix.
Use it instead of the deprecated "synopsys" one.

Signed-off-by: Serge Semin 
---
 arch/arm/boot/dts/exynos5250.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250.dtsi 
b/arch/arm/boot/dts/exynos5250.dtsi
index e3dbe4166836..6daeba7d6b49 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -630,7 +630,7 @@ usb_dwc3 {
ranges;
 
usbdrd_dwc3: dwc3@1200 {
-   compatible = "synopsys,dwc3";
+   compatible = "snps,dwc3";
reg = <0x1200 0x1>;
interrupts = ;
phys = <_phy 0>, <_phy 1>;
-- 
2.27.0

Re: [PATCH 01/29] usb: dwc3: Discard synopsys,dwc3 compatibility string

[Serge Semin]

On Tue, Oct 20, 2020 at 02:28:01PM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 20, 2020 at 03:15:06PM +0300, Andy Shevchenko wrote:
> > On Tue, Oct 20, 2020 at 3:02 PM Serge Semin
> >  wrote:
> > >
> > > Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix.
> > > Discard a DW USB3 compatible string with the deprecated prefix seeing
> > > one isn't used by any dts file anymore.
> > 

> > I'm afraid it's no go.
> > It's an ABI from the moment when the driver started supporting this
> > compatible string.
> 
> Exactly.
> 
> Please mark the compatible as deprecated in bindings, correct the DTSes
> and optionally after one or two years (or any time later) remove the
> support for deprecated bindings.

Ok. I'll just get the original patch back then:
https://lore.kernel.org/linux-usb/20201014101402.18271-1-sergey.se...@baikalelectronics.ru/T/#m0f92acafbd740e63b7156efac58850e0757d2110
and resend the series later after the rest of the patchset have been cooked
a bit.

-Sergey

> 
> Best regards,
> Krzysztof
> 

Re: [PATCH 05/29] arm64: dts: amlogic: meson-g12: Set FL-adj property value

[Serge Semin]

On Tue, Oct 20, 2020 at 02:34:04PM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 20, 2020 at 02:59:35PM +0300, Serge Semin wrote:
> > In accordance with the DWC USB3 bindings the property is supposed to have
> > uint32 type. It's erroneous from the DT schema and driver points of view
> > to declare it as boolean.
> 

> I think the driver uses it as u32, so what do you mean by "declare" in
> context of a driver?

I meant that both the driver and DT schema expects it to be uint32, while the
dts has got the property as boolean, which is wrong. The same problem has
been fixed in the Amlogic Meson-g12 DT schema example:
https://lore.kernel.org/linux-usb/20201014101402.18271-1-sergey.se...@baikalelectronics.ru/T/#m225585212162b9f5cccb1a7088850fab8792b7b3

-Sergey

> 
> Best regards,
> Krzysztof

Re: [PATCH v3 01/16] dt-bindings: usb: usb-hcd: Convert generic USB properties to DT schema

[Serge Semin]

On Wed, Oct 21, 2020 at 11:00:36AM +0800, Chunfeng Yun wrote:
> On Tue, 2020-10-20 at 14:20 +0300, Serge Semin wrote:
> > The generic USB HCD properties have been described in the legacy bindings
> > text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
> > convert it' content into the USB HCD DT schema properties so all USB DT
>   ^ its?
> > nodes would be validated to have them properly utilized.
> > 
> > Signed-off-by: Serge Semin 
> > Reviewed-by: Rob Herring 
> > 
> > ---
> > 
> > Changelog v2:
> > - Discard '|' in all the new properties, since we don't need to preserve
> >   the text formatting.
> > - Convert abbreviated form of the "maximum-speed" enum restriction into
> >   the multi-lined version of the list.
> > - Drop quotes from around the string constants.
> > ---
> >  .../devicetree/bindings/usb/generic.txt   | 57 
> >  .../devicetree/bindings/usb/usb-hcd.yaml  | 88 +++

> Do we need change the file name or modify it's title?
> the title is "Generic USB Host Controller Device Tree Bindings", but
> some generic properties, such as, dr_mode, usb-role-switch, otg related
> ones, are usually used by DRD controller, this may cause some confusion.

Hm, good question. A problem of the naming and the properties inclusion do
exist here. I haven't thought that through when moved all the generic
properties into the usb-hcd.yaml bindings file. But I don't think it's a good
idea to rename the file. Most likely the best solution would be to split the
functionality up as follows:

1) usb.yaml - common USB controller with generic properties for all USB modes 
(host, peripheral, otg):
   + $nodename
   + phys
   + phy-names
   + usb-phy
   + maximum-speed
   + phy_type
2) usb-hcd.yaml - DT schema for USB host controllers (EHCI/OHCI/UHCI):
   + allOf: [usb.yaml#]
   + companion
3) usb-xhci.yaml - DT schema for USB host controllers (xHCI):
   + allOf: [usb-hcd.yaml#]
   + usb2-lpm-disable
   + usb3-lpm-capable
   + quirk-broken-port-ped
   + imod-interval-ns
4) usb-drd.yaml - DT schema for USB OTG controllers:
   + otg-rev
   + hnp-disable
   + srp-disable
   + adp-disable
   + usb-role-switch
   + role-switch-default-mode
   + tpl-support
   + dr_mode: [host, peripheral, otg]

So in case if an USB controller is DRD with EHCI host, then it will need
to pass evaluation of allOf: [usb-hcd.yaml#, usb-drd.yaml#]. If an USB
controller is DRD with xHCI host, then the next schema can be applied:
[usb-xhci.yaml#, usb-drd.yaml#]. A conditional schema is also applicable
here, like this:
allOf:
  - $ref: usb-drd.yaml#
  - if:
  properties:
dr_mode:
  const: host
then:
  $ref: usb-hcd.yaml# (or usb-xhci.yaml#)
else:
  #ref: usb.yaml#

What do you think? @Rob, @Greg, we need your opinion here.

-Sergey

> 
> >  2 files changed, 88 insertions(+), 57 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/generic.txt 
> > b/Documentation/devicetree/bindings/usb/generic.txt
> > deleted file mode 100644
> > index ba472e7aefc9..
> > --- a/Documentation/devicetree/bindings/usb/generic.txt
> > +++ /dev/null
> > @@ -1,57 +0,0 @@
> > -Generic USB Properties
> > -
> > -Optional properties:
> > - - maximum-speed: tells USB controllers we want to work up to a certain
> > -   speed. Valid arguments are "super-speed-plus",
> > -   "super-speed", "high-speed", "full-speed" and
> > -   "low-speed". In case this isn't passed via DT, USB
> > -   controllers should default to their maximum HW
> > -   capability.
> > - - dr_mode: tells Dual-Role USB controllers that we want to work on a
> > -   particular mode. Valid arguments are "host",
> > -   "peripheral" and "otg". In case this attribute isn't
> > -   passed via DT, USB DRD controllers should default to
> > -   OTG.
> > - - phy_type: tells USB controllers that we want to configure the core to 
> > support
> > -   a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
> > -   selected. Valid arguments are "utmi" and "utmi_wide".
> > -   In case this isn't passed via DT, USB controllers should
> > -   default to HW capability.
> > - - otg-rev: tells usb driver the release number of the OTG and EH 
> > supplement
> > -   wi

Re: [PATCH 26/29] arm64: dts: exynos: Harmonize DWC USB3 DT nodes name

[Serge Semin]

On Tue, Oct 20, 2020 at 02:43:28PM +0200, Krzysztof Kozlowski wrote:
> On Tue, Oct 20, 2020 at 02:59:56PM +0300, Serge Semin wrote:
> > In accordance with the DWC USB3 bindings the corresponding node
> > name is suppose to comply with the Generic USB HCD DT schema, which
> > requires the USB nodes to have the name acceptable by the regexp:
> > "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
> > named.
> > 
> > Signed-off-by: Serge Semin 
> > ---
> >  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++--
> >  arch/arm64/boot/dts/exynos/exynos7.dtsi| 2 +-
> >  2 files changed, 3 insertions(+), 3 deletions(-)
> 

> Thanks for the changes to DTSes. I'll take Exynos bits after the mege
> window.

Ok. Thanks.

-Sergey

> 
> Best regards,
> Krzysztof
> 

[PATCH RESEND v2 0/3] usb: dwc3: ulpi: Fix UPLI registers read/write ops

[Serge Semin]

Our Baikal-T1 SoC is equipped with DWC USB3 IP core as a USB2.0 bus
controller. In general the DWC USB3 driver is working well for it except
the ULPI-bus part. We've found out that the DWC USB3 ULPI-bus driver detected
PHY with VID:PID tuple as 0x:0x, which of course wasn't true since
it was supposed to be 0x0424:0x0006. After a short digging inside the
ulpi.c code and studying the DWC USB3 documentation, it has been
discovered that the ULPI bus IO ops didn't work quite correct. The
busy-loop had stopped waiting before the actual operation was finished. We
found out that the problem was caused by several bugs hidden in the DWC
USB3 ULPI-bus IO implementation.

First of all in accordance with the DWC USB3 databook [1] the ULPI IO
busy-loop is supposed to use the GUSB2PHYACCn.VStsDone flag as an
indication of the PHY vendor control access completion. Instead it polled
the GUSB2PHYACCn.VStsBsy flag, which as we discovered can be cleared a
bit before the VStsDone flag.

Secondly having the simple counter-based loop in the modern kernel is
really a weak design of the busy-looping pattern especially seeing the
ULPI operations delay can be easily estimated [2], since the bus clock is
fixed to 60MHz.

Finally the root cause of the denoted in the prologue problem was due to
the Suspend PHY DWC USB3 feature perception. The commit e0082698b689
("usb: dwc3: ulpi: conditionally resume ULPI PHY") introduced the Suspend
USB2.0 HS/FS/LS PHY regression as the Low-power consumption mode would be
disable after a first attempt to read/write from the ULPI PHY control
registers, and still didn't fix the problem it was originally intended for
since the very first attempt of the ULPI PHY control registers IO would
need much more time than the busy-loop provided. So instead of disabling
the Suspend USB2.0 HS/FS/LS PHY feature we suggest to just extend the
busy-loop delay in case if the GUSB2PHYCFGn.SusPHY flag set to 1. By doing
so we'll eliminate the regression and fix the false busy-loop timeout
problem.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

[2] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Link: 
https://lore.kernel.org/linux-usb/20201010222351.7323-1-sergey.se...@baikalelectronics.ru
Changelog v2:
- Add Heikki'es acked-byt tag.
- Resend the series so it wouldn't be lost but merged in the kernel 5.10.

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
Cc: Alexey Malahov 
Cc: Pavel Parkhomenko 
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (3):
  usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion
  usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one
  usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

 drivers/usb/dwc3/core.h |  1 +
 drivers/usb/dwc3/ulpi.c | 38 +-
 2 files changed, 22 insertions(+), 17 deletions(-)

-- 
2.28.0

[PATCH v2 2/3] usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one

[Serge Semin]

Originally the procedure of the ULPI transaction finish detection has been
developed as a simple busy-loop with just decrementing counter and no
delays. It's wrong since on different systems the loop will take a
different time to complete. So if the system bus and CPU are fast enough
to overtake the ULPI bus and the companion PHY reaction, then we'll get to
take a false timeout error. Fix this by converting the busy-loop procedure
to take the standard bus speed, address value and the registers access
mode into account for the busy-loop delay calculation.

Here is the way the fix works. It's known that the ULPI bus is clocked
with 60MHz signal. In accordance with [1] the ULPI bus protocol is created
so to spend 5 and 6 clock periods for immediate register write and read
operations respectively, and 6 and 7 clock periods - for the extended
register writes and reads. Based on that we can easily pre-calculate the
time which will be needed for the controller to perform a requested IO
operation. Note we'll still preserve the attempts counter in case if the
DWC USB3 controller has got some internals delays.

[1] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 20f5d9aba317..0dbc826355a5 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -7,6 +7,8 @@
  * Author: Heikki Krogerus 
  */
 
+#include 
+#include 
 #include 
 
 #include "core.h"
@@ -17,12 +19,22 @@
DWC3_GUSB2PHYACC_ADDR(ULPI_ACCESS_EXTENDED) | \
DWC3_GUSB2PHYACC_EXTEND_ADDR(a) : DWC3_GUSB2PHYACC_ADDR(a))
 
-static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
+#define DWC3_ULPI_BASE_DELAY   DIV_ROUND_UP(NSEC_PER_SEC, 6000L)
+
+static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
+   unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
unsigned count = 1000;
u32 reg;
 
+   if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
+   ns += DWC3_ULPI_BASE_DELAY;
+
+   if (read)
+   ns += DWC3_ULPI_BASE_DELAY;
+
while (count--) {
+   ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
@@ -47,7 +59,7 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   ret = dwc3_ulpi_busyloop(dwc);
+   ret = dwc3_ulpi_busyloop(dwc, addr, true);
if (ret)
return ret;
 
@@ -71,7 +83,7 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   return dwc3_ulpi_busyloop(dwc);
+   return dwc3_ulpi_busyloop(dwc, addr, false);
 }
 
 static const struct ulpi_ops dwc3_ulpi_ops = {
-- 
2.28.0

[PATCH v2 3/3] usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

[Serge Semin]

First of all the commit e0082698b689 ("usb: dwc3: ulpi: conditionally
resume ULPI PHY") introduced the Suspend USB2.0 HS/FS/LS PHY regression,
as by design of the fix any attempt to read/write from/to the PHY control
registers will completely disable the PHY suspension, which consequently
will increase the USB bus power consumption. Secondly the fix won't work
well for the very first attempt of the ULPI PHY control registers IO,
because after disabling the USB2.0 PHY suspension functionality it will
still take some time for the bus to resume from the sleep state if one has
been reached before it. So the very first PHY register read/write
operation will take more time than the busy-loop provides and the IO
timeout error might be returned anyway.

Here we suggest to fix the denoted problems in the following way. First of
all let's not disable the Suspend USB2.0 HS/FS/LS PHY functionality so to
make the controller and the USB2.0 bus more power efficient. Secondly
instead of that we'll extend the PHY IO op wait procedure with 1 - 1.2 ms
sleep if the PHY suspension is enabled (1ms should be enough as by LPM
specification it is at most how long it takes for the USB2.0 bus to resume
from L1 (Sleep) state). Finally in case if the USB2.0 PHY suspension
functionality has been disabled on the DWC USB3 controller setup procedure
we'll compensate the USB bus resume process latency by extending the
busy-loop attempts counter.

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 0dbc826355a5..f23f4c9a557e 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@
 static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
-   unsigned count = 1000;
+   unsigned int count = 1;
u32 reg;
 
if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
@@ -33,6 +33,10 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, 
bool read)
if (read)
ns += DWC3_ULPI_BASE_DELAY;
 
+   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+   if (reg & DWC3_GUSB2PHYCFG_SUSPHY)
+   usleep_range(1000, 1200);
+
while (count--) {
ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
@@ -50,12 +54,6 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
u32 reg;
int ret;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
@@ -73,12 +71,6 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
struct dwc3 *dwc = dev_get_drvdata(dev);
u32 reg;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
-- 
2.28.0

[PATCH v2 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

[Serge Semin]

In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone
bit when the PHY vendor control access is done and clears it when the
application initiates a new transaction. The doc doesn't say anything
about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover
we've discovered that the VStsBsy flag can be cleared before the VStsDone
bit. So using the former as a signal of the PHY control registers
completion might be dangerous. Let's have the VStsDone flag utilized
instead then.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/core.h | 1 +
 drivers/usb/dwc3/ulpi.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 2f04b3e42bf1..8d5e5bba1bc2 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -284,6 +284,7 @@
 
 /* Global USB2 PHY Vendor Control Register */
 #define DWC3_GUSB2PHYACC_NEWREGREQ BIT(25)
+#define DWC3_GUSB2PHYACC_DONE  BIT(24)
 #define DWC3_GUSB2PHYACC_BUSY  BIT(23)
 #define DWC3_GUSB2PHYACC_WRITE BIT(22)
 #define DWC3_GUSB2PHYACC_ADDR(n)   (n << 16)
diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index e6e6176386a4..20f5d9aba317 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
 
while (count--) {
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
-   if (!(reg & DWC3_GUSB2PHYACC_BUSY))
+   if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
cpu_relax();
}
-- 
2.28.0

Re: [PATCH v3 01/16] dt-bindings: usb: usb-hcd: Convert generic USB properties to DT schema

[Serge Semin]

Folks, any comment on my previous message below?

On Wed, Oct 21, 2020 at 06:46:21PM +0300, Serge Semin wrote:
> On Wed, Oct 21, 2020 at 11:00:36AM +0800, Chunfeng Yun wrote:
> > On Tue, 2020-10-20 at 14:20 +0300, Serge Semin wrote:
> > > The generic USB HCD properties have been described in the legacy bindings
> > > text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
> > > convert it' content into the USB HCD DT schema properties so all USB DT
> >   ^ its?
> > > nodes would be validated to have them properly utilized.
> > > 
> > > Signed-off-by: Serge Semin 
> > > Reviewed-by: Rob Herring 
> > > 
> > > ---
> > > 
> > > Changelog v2:
> > > - Discard '|' in all the new properties, since we don't need to preserve
> > >   the text formatting.
> > > - Convert abbreviated form of the "maximum-speed" enum restriction into
> > >   the multi-lined version of the list.
> > > - Drop quotes from around the string constants.
> > > ---
> > >  .../devicetree/bindings/usb/generic.txt   | 57 
> > >  .../devicetree/bindings/usb/usb-hcd.yaml  | 88 +++
> 
> > Do we need change the file name or modify it's title?
> > the title is "Generic USB Host Controller Device Tree Bindings", but
> > some generic properties, such as, dr_mode, usb-role-switch, otg related
> > ones, are usually used by DRD controller, this may cause some confusion.
> 
> Hm, good question. A problem of the naming and the properties inclusion do
> exist here. I haven't thought that through when moved all the generic
> properties into the usb-hcd.yaml bindings file. But I don't think it's a good
> idea to rename the file. Most likely the best solution would be to split the
> functionality up as follows:
> 
> 1) usb.yaml - common USB controller with generic properties for all USB modes 
> (host, peripheral, otg):
>+ $nodename
>+ phys
>+ phy-names
>+ usb-phy
>+ maximum-speed
>+ phy_type
> 2) usb-hcd.yaml - DT schema for USB host controllers (EHCI/OHCI/UHCI):
>+ allOf: [usb.yaml#]
>+ companion
> 3) usb-xhci.yaml - DT schema for USB host controllers (xHCI):
>+ allOf: [usb-hcd.yaml#]
>+ usb2-lpm-disable
>+ usb3-lpm-capable
>+ quirk-broken-port-ped
>+ imod-interval-ns
> 4) usb-drd.yaml - DT schema for USB OTG controllers:
>+ otg-rev
>+ hnp-disable
>+ srp-disable
>+ adp-disable
>+ usb-role-switch
>+ role-switch-default-mode
>+ tpl-support
>+ dr_mode: [host, peripheral, otg]
> 
> So in case if an USB controller is DRD with EHCI host, then it will need
> to pass evaluation of allOf: [usb-hcd.yaml#, usb-drd.yaml#]. If an USB
> controller is DRD with xHCI host, then the next schema can be applied:
> [usb-xhci.yaml#, usb-drd.yaml#]. A conditional schema is also applicable
> here, like this:
> allOf:
>   - $ref: usb-drd.yaml#
>   - if:
>   properties:
> dr_mode:
>   const: host
> then:
>   $ref: usb-hcd.yaml# (or usb-xhci.yaml#)
> else:
>   #ref: usb.yaml#
> 
> What do you think? @Rob, @Greg, we need your opinion here.
> 
> -Sergey
> 
> > 
> > >  2 files changed, 88 insertions(+), 57 deletions(-)
> > >  delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
> > > 
> > > diff --git a/Documentation/devicetree/bindings/usb/generic.txt 
> > > b/Documentation/devicetree/bindings/usb/generic.txt
> > > deleted file mode 100644
> > > index ba472e7aefc9..
> > > --- a/Documentation/devicetree/bindings/usb/generic.txt
> > > +++ /dev/null
> > > @@ -1,57 +0,0 @@
> > > -Generic USB Properties
> > > -
> > > -Optional properties:
> > > - - maximum-speed: tells USB controllers we want to work up to a certain
> > > - speed. Valid arguments are "super-speed-plus",
> > > - "super-speed", "high-speed", "full-speed" and
> > > - "low-speed". In case this isn't passed via DT, USB
> > > - controllers should default to their maximum HW
> > > - capability.
> > > - - dr_mode: tells Dual-Role USB controllers that we want to work on a
> > > - particular mode. Valid arguments are "host",
> > > - "peripheral" and "otg". In case this attribute isn't
> > > - passed via DT, 

Re: linux-next: build warning after merge of the nand tree

[Serge Semin]

Hello Miquel, Boris

On Fri, Nov 20, 2020 at 01:01:23PM +0100, Boris Brezillon wrote:
> On Fri, 20 Nov 2020 12:23:59 +0100
> Miquel Raynal  wrote:
> 
> > Hi Serge,
> > 
> > Stephen Rothwell  wrote on Fri, 20 Nov 2020
> > 11:39:29 +1100:
> > 
> > > Hi all,
> > > 
> > > After merging the nand tree, today's linux-next build (x86_64
> > > allmodconfig) produced this warning:
> > > 
> > > drivers/mtd/maps/physmap-bt1-rom.c: In function 'bt1_rom_map_read':
> > > drivers/mtd/maps/physmap-bt1-rom.c:39:10: warning: cast from pointer to 
> > > integer of different size [-Wpointer-to-int-cast]
> > >39 |  shift = (unsigned int)src & 0x3;
> > >   |  ^
> > > drivers/mtd/maps/physmap-bt1-rom.c: In function 'bt1_rom_map_copy_from':
> > > drivers/mtd/maps/physmap-bt1-rom.c:78:10: warning: cast from pointer to 
> > > integer of different size [-Wpointer-to-int-cast]
> > >78 |  shift = (unsigned int)src & 0x3;
> > >   |  ^
> > > 
> > > Introduced by commit
> > > 
> > >   69a75a1a47d8 ("mtd: physmap: physmap-bt1-rom: Fix __iomem addrspace 
> > > removal warning")
> > >   
> > 

> > Too bad :/ I'll drop this patch for now, let's look for another
> > solution...

that'd be great. I've forgotten that my arch is 32-bit and the
compiler just did print a warning for it.(

> 
> uintptr_t cast?

Yep, most likely that will be the best option in this case to make
sparse happy and not to cause the warning above.

I'll send v2 patch shortly.

-Sergey

Re: linux-next: build warning after merge of the nand tree

[Serge Semin]

On Fri, Nov 20, 2020 at 01:01:23PM +0100, Boris Brezillon wrote:
> On Fri, 20 Nov 2020 12:23:59 +0100
> Miquel Raynal  wrote:
> 
> > Hi Serge,
> > 
> > Stephen Rothwell  wrote on Fri, 20 Nov 2020
> > 11:39:29 +1100:
> > 
> > > Hi all,
> > > 
> > > After merging the nand tree, today's linux-next build (x86_64
> > > allmodconfig) produced this warning:
> > > 
> > > drivers/mtd/maps/physmap-bt1-rom.c: In function 'bt1_rom_map_read':
> > > drivers/mtd/maps/physmap-bt1-rom.c:39:10: warning: cast from pointer to 
> > > integer of different size [-Wpointer-to-int-cast]
> > >39 |  shift = (unsigned int)src & 0x3;
> > >   |  ^
> > > drivers/mtd/maps/physmap-bt1-rom.c: In function 'bt1_rom_map_copy_from':
> > > drivers/mtd/maps/physmap-bt1-rom.c:78:10: warning: cast from pointer to 
> > > integer of different size [-Wpointer-to-int-cast]
> > >78 |  shift = (unsigned int)src & 0x3;
> > >   |  ^
> > > 
> > > Introduced by commit
> > > 
> > >   69a75a1a47d8 ("mtd: physmap: physmap-bt1-rom: Fix __iomem addrspace 
> > > removal warning")
> > >   
> > 
> > Too bad :/ I'll drop this patch for now, let's look for another
> > solution...
> 
> uintptr_t cast?

unsigned long shall also work here...

-Sergey

Re: [PATCH] mips: cdmm: fix use-after-free in mips_cdmm_bus_discover

[Serge Semin]

Hello Qinglang

Thanks for the patch. Good catch. Please see a tiny nitpick below.

On Fri, Nov 20, 2020 at 03:48:47PM +0800, Qinglang Miao wrote:
> kfree(dev) has been called inside put_device so anther
> kfree would cause a use-after-free bug/
> 
> Fixes: 8286ae03308c ("MIPS: Add CDMM bus support")
> Reported-by: Hulk Robot 
> Signed-off-by: Qinglang Miao 
> ---
>  drivers/bus/mips_cdmm.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/bus/mips_cdmm.c b/drivers/bus/mips_cdmm.c
> index 9f7ed1fcd..e43786c67 100644
> --- a/drivers/bus/mips_cdmm.c
> +++ b/drivers/bus/mips_cdmm.c
> @@ -561,7 +561,6 @@ static void mips_cdmm_bus_discover(struct mips_cdmm_bus 
> *bus)
>   ret = device_register(>dev);

>   if (ret) {
>   put_device(>dev);
> - kfree(dev);
>   }

After removing kfree() from here the braces around the if clause
are no more needed in accordance with the kernel coding style.
Please remove them too. Then feel free to add the tag
Acked-by: Serge Semin 

-Sergey

>   }
>  }
> -- 
> 2.23.0
> 

Re: [RFC PATCH] spi: Take the SPI IO-mutex in the spi_setup() method

[Serge Semin]

On Fri, Nov 20, 2020 at 05:17:48PM +, Mark Brown wrote:
> On Tue, Nov 17, 2020 at 12:45:17PM +0300, Serge Semin wrote:
> 
> > Of course I could have provided a fix affecting the DW APB SSI driver
> > only, for instance, by creating a mutual exclusive access to the set_cs
> > callback and setting/clearing only the bit responsible for the
> > corresponding chip-select. But after a short research I've discovered that
> 

> I think the driver needs a fix anyway for the case where there's a mix
> of devices with standard and inverted chip selects, it assumes they all
> have the same polarity AFAICT.

No. The polarity inversion isn't supported by the DW APB SSI
controller. Native chip-select is always active-low, while a
corresponding peripheral is activated by setting a bit in the SER
register (Slave Enable Register). So as long as the dw_spi_set_cs()
callback isn't called while there is a SPI-message execution going on
it shall be save do preserve the current version of the method.

-Sergey

Re: [RFC PATCH] spi: Take the SPI IO-mutex in the spi_setup() method

[Serge Semin]

On Wed, Nov 18, 2020 at 01:16:04PM +, Mark Brown wrote:
> On Tue, Nov 17, 2020 at 12:45:17PM +0300, Serge Semin wrote:
> 
> > method being called at the same time. In particular in calling the
> > spi_set_cs(false) while there is an SPI-transfer being executed. In my
> > case due to the commit cited above all CSs get to be switched off by
> > calling the spi_setup() for /dev/spidev0.1 while there is an concurrent
> > SPI-transfer execution performed on /dev/spidev0.0. Of course a situation
> > of the spi_setup() being called while there is an SPI-transfer being
> > executed for two different SPI peripheral devices of the same controller
> > may happen not only for the spidev driver, but for instance for MMC SPI +
> > some another device, or spi_setup() being called from an SPI-peripheral
> > probe method while some other device has already been probed and is being
> > used by a corresponding driver...
> 
> It's documented that a driver's spi_setup() operation is supposed to
> support being able to be called concurrently with other transfers, see
> spi-summary.rst.
> 
> > Of course I could have provided a fix affecting the DW APB SSI driver
> > only, for instance, by creating a mutual exclusive access to the set_cs
> > callback and setting/clearing only the bit responsible for the
> > corresponding chip-select. But after a short research I've discovered that
> > the problem most likely affects a lot of the other drivers:
> 
> Yeah, problems with it are very common as the documentation has noted
> since forever.  IIRC there was some problem triggered by trying to force
> it to be serialised but I can't remember what it was.

Does it mean nack for this patch from you? So you suggest to fix the controller
driver instead, right? If so the best solution would be to just lock the
IO mutex in the set_cs callback of the DW APB SSI driver...

-Sergey

Re: drivers/mtd/maps/physmap-bt1-rom.c:78:18: sparse: sparse: cast removes address space '__iomem' of expression

[Serge Semin]

Hello Miquel,

A situation noted by the warning below won't cause any problem because
the casting is done to a non-dereferenced variable. It is utilized
as a pointer bias later in that function. Shall we just ignore the
warning or still fix it somehow?

-Sergey

On Mon, Nov 02, 2020 at 12:42:57PM +0800, kernel test robot wrote:
> tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 
> master
> head:   3cea11cd5e3b00d91caf0b4730194039b45c5891
> commit: b3e79e7682e075326df8041b826b03453acacd0a mtd: physmap: Add Baikal-T1 
> physically mapped ROM support
> date:   4 weeks ago
> config: sparc64-randconfig-s032-20201031 (attached as .config)
> compiler: sparc64-linux-gcc (GCC) 9.3.0
> reproduce:
> wget 
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
> ~/bin/make.cross
> chmod +x ~/bin/make.cross
> # apt-get install sparse
> # sparse version: v0.6.3-76-gf680124b-dirty
> # 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=b3e79e7682e075326df8041b826b03453acacd0a
> git remote add linus 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> git fetch --no-tags linus master
> git checkout b3e79e7682e075326df8041b826b03453acacd0a
> # save the attached .config to linux build tree
> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 
> CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=sparc64 
> 
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot 
> 
> 
> "sparse warnings: (new ones prefixed by >>)"
> >> drivers/mtd/maps/physmap-bt1-rom.c:78:18: sparse: sparse: cast removes 
> >> address space '__iomem' of expression
> 
> vim +/__iomem +78 drivers/mtd/maps/physmap-bt1-rom.c
> 
> 57
> 58static void __xipram bt1_rom_map_copy_from(struct map_info *map,
> 59   void *to, unsigned 
> long from,
> 60   ssize_t len)
> 61{
> 62void __iomem *src = map->virt + from;
> 63ssize_t shift, chunk;
> 64u32 data;
> 65
> 66if (len <= 0 || from >= map->size)
> 67return;
> 68
> 69/* Make sure we don't go over the map limit. */
> 70len = min_t(ssize_t, map->size - from, len);
> 71
> 72/*
> 73 * Since requested data size can be pretty big we have 
> to implement
> 74 * the copy procedure as optimal as possible. That's 
> why it's split
> 75 * up into the next three stages: unaligned head, 
> aligned body,
> 76 * unaligned tail.
> 77 */
>   > 78shift = (ssize_t)src & 0x3;
> 79if (shift) {
> 80chunk = min_t(ssize_t, 4 - shift, len);
> 81data = readl_relaxed(src - shift);
> 82memcpy(to,  + shift, chunk);
> 83src += chunk;
> 84to += chunk;
> 85len -= chunk;
> 86}
> 87
> 88while (len >= 4) {
> 89data = readl_relaxed(src);
> 90memcpy(to, , 4);
> 91src += 4;
> 92to += 4;
> 93len -= 4;
> 94}
> 95
> 96if (len) {
> 97data = readl_relaxed(src);
> 98memcpy(to, , len);
> 99}
>100}
>101
> 
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org

Re: [PATCH 29/29] arm64: dts: qcom: Harmonize DWC USB3 DT nodes name

[Serge Semin]

Hello Jun and Bjorn.

On Tue, Nov 03, 2020 at 05:23:47PM -0600, Bjorn Andersson wrote:
> On Mon 02 Nov 01:34 CST 2020, Jun Li wrote:
> 
> > Serge Semin  ???2020???10???20? 
> > ??8:04?
> > >
> > > In accordance with the DWC USB3 bindings the corresponding node
> > > name is suppose to comply with the Generic USB HCD DT schema, which
> > > requires the USB nodes to have the name acceptable by the regexp:
> > > "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
> > > named.
> > 

> > This need a counterpart driver change:
> > drivers/usb/dwc3/dwc3-qcom.c
> > dwc3_np = of_get_child_by_name(np, "dwc3");
> > 
> 
> Thanks for catching this Jun. The code certainly needs to be updated to
> look for the new child node, while falling back to the old name, before
> I can merge this change.

Thanks for looking into this. I'll add a patch, which fixes that into
the next series, but with no tested status guarantee, since I haven't
got a corresponding hardware.

-Sergey

> 
> Regards,
> Bjorn

Re: [PATCH v3 01/16] dt-bindings: usb: usb-hcd: Convert generic USB properties to DT schema

[Serge Semin]

It seems noone is going to get involved in the discussion. Therefore I'll
fix the patch in the way I suggested in my previous message. Alas I'll
have to remove the reviewed-by tags of Rob from some patches.

-Sergey

On Mon, Oct 26, 2020 at 07:46:49PM +0300, Serge Semin wrote:
> Folks, any comment on my previous message below?
> 
> On Wed, Oct 21, 2020 at 06:46:21PM +0300, Serge Semin wrote:
> > On Wed, Oct 21, 2020 at 11:00:36AM +0800, Chunfeng Yun wrote:
> > > On Tue, 2020-10-20 at 14:20 +0300, Serge Semin wrote:
> > > > The generic USB HCD properties have been described in the legacy 
> > > > bindings
> > > > text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
> > > > convert it' content into the USB HCD DT schema properties so all USB DT
> > >   ^ its?
> > > > nodes would be validated to have them properly utilized.
> > > > 
> > > > Signed-off-by: Serge Semin 
> > > > Reviewed-by: Rob Herring 
> > > > 
> > > > ---
> > > > 
> > > > Changelog v2:
> > > > - Discard '|' in all the new properties, since we don't need to preserve
> > > >   the text formatting.
> > > > - Convert abbreviated form of the "maximum-speed" enum restriction into
> > > >   the multi-lined version of the list.
> > > > - Drop quotes from around the string constants.
> > > > ---
> > > >  .../devicetree/bindings/usb/generic.txt   | 57 
> > > >  .../devicetree/bindings/usb/usb-hcd.yaml  | 88 +++
> > 
> > > Do we need change the file name or modify it's title?
> > > the title is "Generic USB Host Controller Device Tree Bindings", but
> > > some generic properties, such as, dr_mode, usb-role-switch, otg related
> > > ones, are usually used by DRD controller, this may cause some confusion.
> > 
> > Hm, good question. A problem of the naming and the properties inclusion do
> > exist here. I haven't thought that through when moved all the generic
> > properties into the usb-hcd.yaml bindings file. But I don't think it's a 
> > good
> > idea to rename the file. Most likely the best solution would be to split the
> > functionality up as follows:
> > 
> > 1) usb.yaml - common USB controller with generic properties for all USB 
> > modes (host, peripheral, otg):
> >+ $nodename
> >+ phys
> >+ phy-names
> >+ usb-phy
> >+ maximum-speed
> >+ phy_type
> > 2) usb-hcd.yaml - DT schema for USB host controllers (EHCI/OHCI/UHCI):
> >+ allOf: [usb.yaml#]
> >+ companion
> > 3) usb-xhci.yaml - DT schema for USB host controllers (xHCI):
> >+ allOf: [usb-hcd.yaml#]
> >+ usb2-lpm-disable
> >+ usb3-lpm-capable
> >+ quirk-broken-port-ped
> >+ imod-interval-ns
> > 4) usb-drd.yaml - DT schema for USB OTG controllers:
> >+ otg-rev
> >+ hnp-disable
> >+ srp-disable
> >+ adp-disable
> >+ usb-role-switch
> >+ role-switch-default-mode
> >+ tpl-support
> >+ dr_mode: [host, peripheral, otg]
> > 
> > So in case if an USB controller is DRD with EHCI host, then it will need
> > to pass evaluation of allOf: [usb-hcd.yaml#, usb-drd.yaml#]. If an USB
> > controller is DRD with xHCI host, then the next schema can be applied:
> > [usb-xhci.yaml#, usb-drd.yaml#]. A conditional schema is also applicable
> > here, like this:
> > allOf:
> >   - $ref: usb-drd.yaml#
> >   - if:
> >   properties:
> > dr_mode:
> >   const: host
> > then:
> >   $ref: usb-hcd.yaml# (or usb-xhci.yaml#)
> > else:
> >   #ref: usb.yaml#
> > 
> > What do you think? @Rob, @Greg, we need your opinion here.
> > 
> > -Sergey
> > 
> > > 
> > > >  2 files changed, 88 insertions(+), 57 deletions(-)
> > > >  delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/usb/generic.txt 
> > > > b/Documentation/devicetree/bindings/usb/generic.txt
> > > > deleted file mode 100644
> > > > index ba472e7aefc9..
> > > > --- a/Documentation/devicetree/bindings/usb/generic.txt
> > > > +++ /dev/null
> > > > @@ -1,57 +0,0 @@
> > > > -Generic USB Properties
> > > > -
> > > > -Optional properties:
> > > > - - maximum-speed: tells USB controllers

Re: [PATCH] ntb: idt: fix error check in ntb_hw_idt.c

[Serge Semin]

Hello Wang

On Fri, Nov 06, 2020 at 05:43:31PM +0800, Wang Qing wrote:
> idt_create_dev never return NULL and fix smatch warning.

Thanks for submitting this. For the both changes
Acked-by: Serge Semin 

They are mostly unrelated though. If they weren't trivial I'd have
suggested to split them up into the dedicated patches. Since they
aren't I suppose leaving the patch 'as is' is ok, unless the subsystem
maintainer thinks differently.

-Sergey

> 
> Signed-off-by: Wang Qing 
> ---
>  drivers/ntb/hw/idt/ntb_hw_idt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/ntb/hw/idt/ntb_hw_idt.c b/drivers/ntb/hw/idt/ntb_hw_idt.c
> index d54261f..e7a4c2a
> --- a/drivers/ntb/hw/idt/ntb_hw_idt.c
> +++ b/drivers/ntb/hw/idt/ntb_hw_idt.c
> @@ -2511,7 +2511,7 @@ static int idt_init_dbgfs(struct idt_ntb_dev *ndev)
>   /* If the top directory is not created then do nothing */
>   if (IS_ERR_OR_NULL(dbgfs_topdir)) {
>   dev_info(>ntb.pdev->dev, "Top DebugFS directory absent");
> - return PTR_ERR(dbgfs_topdir);
> + return PTR_ERR_OR_ZERO(dbgfs_topdir);
>   }
>  
>   /* Create the info file node */
> @@ -2756,7 +2756,7 @@ static int idt_pci_probe(struct pci_dev *pdev,
>  
>   /* Allocate the memory for IDT NTB device data */
>   ndev = idt_create_dev(pdev, id);
> - if (IS_ERR_OR_NULL(ndev))
> + if (IS_ERR(ndev))
>   return PTR_ERR(ndev);
>  
>   /* Initialize the basic PCI subsystem of the device */
> -- 
> 2.7.4
> 

[PATCH v3 2/3] usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one

[Serge Semin]

Originally the procedure of the ULPI transaction finish detection has been
developed as a simple busy-loop with just decrementing counter and no
delays. It's wrong since on different systems the loop will take a
different time to complete. So if the system bus and CPU are fast enough
to overtake the ULPI bus and the companion PHY reaction, then we'll get to
take a false timeout error. Fix this by converting the busy-loop procedure
to take the standard bus speed, address value and the registers access
mode into account for the busy-loop delay calculation.

Here is the way the fix works. It's known that the ULPI bus is clocked
with 60MHz signal. In accordance with [1] the ULPI bus protocol is created
so to spend 5 and 6 clock periods for immediate register write and read
operations respectively, and 6 and 7 clock periods - for the extended
register writes and reads. Based on that we can easily pre-calculate the
time which will be needed for the controller to perform a requested IO
operation. Note we'll still preserve the attempts counter in case if the
DWC USB3 controller has got some internals delays.

[1] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 20f5d9aba317..0dbc826355a5 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -7,6 +7,8 @@
  * Author: Heikki Krogerus 
  */
 
+#include 
+#include 
 #include 
 
 #include "core.h"
@@ -17,12 +19,22 @@
DWC3_GUSB2PHYACC_ADDR(ULPI_ACCESS_EXTENDED) | \
DWC3_GUSB2PHYACC_EXTEND_ADDR(a) : DWC3_GUSB2PHYACC_ADDR(a))
 
-static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
+#define DWC3_ULPI_BASE_DELAY   DIV_ROUND_UP(NSEC_PER_SEC, 6000L)
+
+static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
+   unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
unsigned count = 1000;
u32 reg;
 
+   if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
+   ns += DWC3_ULPI_BASE_DELAY;
+
+   if (read)
+   ns += DWC3_ULPI_BASE_DELAY;
+
while (count--) {
+   ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
@@ -47,7 +59,7 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   ret = dwc3_ulpi_busyloop(dwc);
+   ret = dwc3_ulpi_busyloop(dwc, addr, true);
if (ret)
return ret;
 
@@ -71,7 +83,7 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   return dwc3_ulpi_busyloop(dwc);
+   return dwc3_ulpi_busyloop(dwc, addr, false);
 }
 
 static const struct ulpi_ops dwc3_ulpi_ops = {
-- 
2.28.0

[PATCH v3 0/3] usb: dwc3: ulpi: Fix UPLI registers read/write ops

[Serge Semin]

Our Baikal-T1 SoC is equipped with DWC USB3 IP core as a USB2.0 bus
controller. In general the DWC USB3 driver is working well for it except
the ULPI-bus part. We've found out that the DWC USB3 ULPI-bus driver detected
PHY with VID:PID tuple as 0x:0x, which of course wasn't true since
it was supposed to be 0x0424:0x0006. After a short digging inside the
ulpi.c code and studying the DWC USB3 documentation, it has been
discovered that the ULPI bus IO ops didn't work quite correct. The
busy-loop had stopped waiting before the actual operation was finished. We
found out that the problem was caused by several bugs hidden in the DWC
USB3 ULPI-bus IO implementation.

First of all in accordance with the DWC USB3 databook [1] the ULPI IO
busy-loop is supposed to use the GUSB2PHYACCn.VStsDone flag as an
indication of the PHY vendor control access completion. Instead it polled
the GUSB2PHYACCn.VStsBsy flag, which as we discovered can be cleared a
bit before the VStsDone flag.

Secondly having the simple counter-based loop in the modern kernel is
really a weak design of the busy-looping pattern especially seeing the
ULPI operations delay can be easily estimated [2], since the bus clock is
fixed to 60MHz.

Finally the root cause of the denoted in the prologue problem was due to
the Suspend PHY DWC USB3 feature perception. The commit e0082698b689
("usb: dwc3: ulpi: conditionally resume ULPI PHY") introduced the Suspend
USB2.0 HS/FS/LS PHY regression as the Low-power consumption mode would be
disable after a first attempt to read/write from the ULPI PHY control
registers, and still didn't fix the problem it was originally intended for
since the very first attempt of the ULPI PHY control registers IO would
need much more time than the busy-loop provided. So instead of disabling
the Suspend USB2.0 HS/FS/LS PHY feature we suggest to just extend the
busy-loop delay in case if the GUSB2PHYCFGn.SusPHY flag set to 1. By doing
so we'll eliminate the regression and fix the false busy-loop timeout
problem.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

[2] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Link: 
https://lore.kernel.org/linux-usb/20201010222351.7323-1-sergey.se...@baikalelectronics.ru
Changelog v2:
- Add Heikki'es acked-byt tag.
- Resend the series so it wouldn't be lost but merged in the kernel 5.10.

Link: 
https://lore.kernel.org/linux-usb/20201026164050.30380-1-sergey.se...@baikalelectronics.ru
Changelog v3:
- Add Fixes tag to the commit log of the patch:
  [PATCH 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
Cc: Alexey Malahov 
Cc: Pavel Parkhomenko 
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (3):
  usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion
  usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one
  usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

 drivers/usb/dwc3/core.h |  1 +
 drivers/usb/dwc3/ulpi.c | 38 +-
 2 files changed, 22 insertions(+), 17 deletions(-)

-- 
2.28.0

[PATCH v3 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

[Serge Semin]

In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone
bit when the PHY vendor control access is done and clears it when the
application initiates a new transaction. The doc doesn't say anything
about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover
we've discovered that the VStsBsy flag can be cleared before the VStsDone
bit. So using the former as a signal of the PHY control registers
completion might be dangerous. Let's have the VStsDone flag utilized
instead then.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 

---

Changelog v3:
- Add Fixes tag to the commit log.
---
 drivers/usb/dwc3/core.h | 1 +
 drivers/usb/dwc3/ulpi.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 2f04b3e42bf1..8d5e5bba1bc2 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -284,6 +284,7 @@
 
 /* Global USB2 PHY Vendor Control Register */
 #define DWC3_GUSB2PHYACC_NEWREGREQ BIT(25)
+#define DWC3_GUSB2PHYACC_DONE  BIT(24)
 #define DWC3_GUSB2PHYACC_BUSY  BIT(23)
 #define DWC3_GUSB2PHYACC_WRITE BIT(22)
 #define DWC3_GUSB2PHYACC_ADDR(n)   (n << 16)
diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index e6e6176386a4..20f5d9aba317 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
 
while (count--) {
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
-   if (!(reg & DWC3_GUSB2PHYACC_BUSY))
+   if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
cpu_relax();
}
-- 
2.28.0

[PATCH v3 3/3] usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

[Serge Semin]

First of all the commit e0082698b689 ("usb: dwc3: ulpi: conditionally
resume ULPI PHY") introduced the Suspend USB2.0 HS/FS/LS PHY regression,
as by design of the fix any attempt to read/write from/to the PHY control
registers will completely disable the PHY suspension, which consequently
will increase the USB bus power consumption. Secondly the fix won't work
well for the very first attempt of the ULPI PHY control registers IO,
because after disabling the USB2.0 PHY suspension functionality it will
still take some time for the bus to resume from the sleep state if one has
been reached before it. So the very first PHY register read/write
operation will take more time than the busy-loop provides and the IO
timeout error might be returned anyway.

Here we suggest to fix the denoted problems in the following way. First of
all let's not disable the Suspend USB2.0 HS/FS/LS PHY functionality so to
make the controller and the USB2.0 bus more power efficient. Secondly
instead of that we'll extend the PHY IO op wait procedure with 1 - 1.2 ms
sleep if the PHY suspension is enabled (1ms should be enough as by LPM
specification it is at most how long it takes for the USB2.0 bus to resume
from L1 (Sleep) state). Finally in case if the USB2.0 PHY suspension
functionality has been disabled on the DWC USB3 controller setup procedure
we'll compensate the USB bus resume process latency by extending the
busy-loop attempts counter.

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 0dbc826355a5..f23f4c9a557e 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@
 static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
-   unsigned count = 1000;
+   unsigned int count = 1;
u32 reg;
 
if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
@@ -33,6 +33,10 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, 
bool read)
if (read)
ns += DWC3_ULPI_BASE_DELAY;
 
+   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+   if (reg & DWC3_GUSB2PHYCFG_SUSPHY)
+   usleep_range(1000, 1200);
+
while (count--) {
ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
@@ -50,12 +54,6 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
u32 reg;
int ret;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
@@ -73,12 +71,6 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
struct dwc3 *dwc = dev_get_drvdata(dev);
u32 reg;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
-- 
2.28.0

[PATCH v4 04/18] dt-bindings: usb: Add "ulpi/serial/hsic" PHY types

[Serge Semin]

Aside from the UTMI+ there are also ULPI, Serial and HSIC PHY types
that can be specified in the phy_type HCD property. Add them to the
enumeration of the acceptable values.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/PHY types can be/PHY types that can be"
- Drop quotes from around the string constants.

Changelog v4:
- Move the new PHY types definitions into the usb.yaml schema where the
  phy_type property is now defined.
---
 Documentation/devicetree/bindings/usb/usb.yaml | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/usb.yaml 
b/Documentation/devicetree/bindings/usb/usb.yaml
index 991c02725e2b..6dc4821e63c3 100644
--- a/Documentation/devicetree/bindings/usb/usb.yaml
+++ b/Documentation/devicetree/bindings/usb/usb.yaml
@@ -27,11 +27,13 @@ properties:
   phy_type:
 description:
   Tells USB controllers that we want to configure the core to support a
-  UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected. In case
-  this isn't passed via DT, USB controllers should default to HW
-  capability.
+  UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
+  pin interface if ULPI is specified, Serial core/PHY interconnect if
+  serial is specified and High-Speed Inter-Chip feature if HSIC is
+  selected. In case this isn't passed via DT, USB controllers should
+  default to HW capability.
 $ref: /schemas/types.yaml#/definitions/string
-enum: [utmi, utmi_wide]
+enum: [utmi, utmi_wide, ulpi, serial, hsic]
 
   maximum-speed:
description:
-- 
2.28.0

[PATCH v4 00/18] dt-bindings: usb: Add generic USB HCD, xHCI, DWC USB3 DT schema

[Serge Semin]

We've performed some work on the Generic USB HCD, xHCI and DWC USB3 DT
bindings in the framework of the Baikal-T1 SoC support integration into
the kernel. This patchset is a result of that work.

First of all we moved the generic USB properties from the legacy text
bindings to the USB DT schema. The properties have been distributed
between three DT schemas dedicated for particular types of USB
controllers: Generic USB controller properties (like node-naming, phys,
maximum-speed, etc), Generic USB Host Controller bindings (companion and
TPL support), Dual-Role USB Controller (OTG revision, DR mode,
HNP/SRP/ADP protocols, etc). So the USB controllers DT bindings from now
can validate the nodes against a generic USB-controller schema suitable
for the controller functionality.

Secondly we converted generic USB xHCI text bindings file into the DT
schema. It had to be split up into two bindings: DT schema with generic
xHCI properties and a generic xHCI device DT schema. The later will be
used to validate the pure xHCI-based nodes, while the former can be
utilized by some vendor-specific versions of xHCI.

Thirdly, what was primarily intended to be done for Baikal-T1 SoC USB we
converted the legacy text-based DWC USB3 bindings to DT schema and altered
the result a bit so it would be more coherent with what actually
controller and its driver support. Since we've now got the DWC USB3 DT
schema, we made it used to validate the sub-nodes of the Qualcom, TI and
Amlogic DWC3 DT nodes.

Link: 
https://lore.kernel.org/linux-usb/20201010224121.12672-1-sergey.se...@baikalelectronics.ru/
Changelog v2:
- Thanks to Sergei Shtylyov for suggesting the commit logs grammar fixes:
  [PATCH 04/18] dt-bindings: usb: usb-hcd: Add "ulpi/serial/hsic" PHY types
  [PATCH 05/18] dt-bindings: usb: usb-hcd: Add "tpl-support" property
  [PATCH 11/18] dt-bindings: usb: dwc3: Add interrupt-names property support
  [PATCH 13/18] dt-bindings: usb: dwc3: Add Tx De-emphasis restrictions
  [PATCH 17/18] dt-bindings: usb: keystone-dwc3: Validate DWC3 sub-node
- Set FL-adj of the amlogiv,meson-g12a-usb controller with value 0x20 instead
  of completely removing the property.
- Drop the patch:
  [PATCH 02/18] dt-bindings: usb: usb-hcd: Add "wireless" maximum-speed
property value
  since "wireless" speed type is depracated due to lack of the device
  supporting it.
- Drop quotes from around the compat string constant.
- Discard '|' from the property descriptions, since we don't need to preserve
  the text formatting.
- Convert abbreviated form of the "maximum-speed" enum constraint into
  the multi-lined version of the list.
- Fix the DW USB3 "clock-names" prop description to be refererring to the
  enumerated clock-names instead of the ones from the Databook.
- Add explicit "additionalProperties: true" to the usb-xhci.yaml schema,
  since additionalProperties/unevaluatedProperties are going to be mandary
  for each binding.
- Use "oneOf: [dwc2.yaml#, snps,dwc3.yaml#]" instead of the bulky "if:
  properties: compatibe: ..." statement.
- Discard the "^dwc3@[0-9a-f]+$" nodes from being acceptable as sub-nodes
  of the Qualcomm DWC3 DT nodes.
- Add new patches:
  [PATCH 18/20] arch: dts: Fix EHCI/OHCI DT nodes name
  [PATCH 19/20] arch: dts: Fix xHCI DT nodes name
  [PATCH 20/20] arch: dts: Fix DWC USB3 DT nodes name

Link: 
https://lore.kernel.org/linux-usb/20201014101402.18271-1-sergey.se...@baikalelectronics.ru
Changelog v3:
- Drop the patches:
  [PATCH 18/20] arch: dts: Fix EHCI/OHCI DT nodes name
  [PATCH 19/20] arch: dts: Fix xHCI DT nodes name
  [PATCH 20/20] arch: dts: Fix DWC USB3 DT nodes name
  as they are going to be submitted in the framework of a dedicated patchset.
- Drop the patch:
  [PATCH 11/20] dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string
  since it's going to be replaced with the driver/dts fixup and moved to a
  dedicated patchset.
- Apply usb-xhci.yaml# schema for the DWC USB3 node only if the controller is
  supposed to work as either host or otg.

Link: 
https://lore.kernel.org/linux-usb/20201020112101.19077-1-sergey.se...@baikalelectronics.ru
Changelog v4:
- Get the patch
  [PATCH 11/17] dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string
  back, since we can't discard the deprecated prefix from the driver.
- Discard the block scalar style modifier "|" from the interrupts property
  description.
- Split the generic USB controller properties into three schemas: Generic USB
  controllers, USB Host controllers and USB OTG controllers.

Signed-off-by: Serge Semin 
Cc: Alexey Malahov 
Cc: Pavel Parkhomenko 
Cc: Andy Gross 
Cc: Bjorn Andersson 
Cc: Manu Gautam 
Cc: Roger Quadros 
Cc: Lad Prabhakar 
Cc: Yoshihiro Shimoda 
Cc: Neil Armstrong 
Cc: Kevin Hilman 
Cc: Martin Blumenstingl 
Cc: Chunfeng Yun 
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-snps-...@lists.infradead.

[PATCH v4 01/18] dt-bindings: usb: usb-hcd: Detach generic USB controller properties

[Serge Semin]

There can be three distinctive types of the USB controllers: USB hosts,
USB peripherals/gadgets and USB OTG, which can switch from one role to
another. In order to have that hierarchy handled in the DT binding files,
we need to collect common properties in a common DT schema and specific
properties in dedicated schemas. Seeing the usb-hcd.yaml DT schema is
dedicated for the USB host controllers only, let's move some common
properties from there into the usb.yaml schema. So the later would be
available to evaluate all currently supported types of the USB
controllers.

While at it add an explicit "additionalProperties: true" into the
usb-hcd.yaml as setting the additionalProperties/unevaluateProperties
properties is going to be get mandatory soon.

Signed-off-by: Serge Semin 

---

Changelog v4:
- This is a new patch created as a result of the comment left
  by Chunfeng Yun in v3
---
 .../devicetree/bindings/usb/usb-hcd.yaml  | 14 ++---
 .../devicetree/bindings/usb/usb.yaml  | 29 +++
 2 files changed, 32 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/usb.yaml

diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml 
b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
index 7263b7f2b510..81f3ad1419d8 100644
--- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
@@ -9,18 +9,10 @@ title: Generic USB Host Controller Device Tree Bindings
 maintainers:
   - Greg Kroah-Hartman 
 
-properties:
-  $nodename:
-pattern: "^usb(@.*)?"
+allOf:
+  - $ref: usb.yaml#
 
-  phys:
-$ref: /schemas/types.yaml#/definitions/phandle-array
-description:
-  List of all the USB PHYs on this HCD
-
-  phy-names:
-description:
-  Name specifier for the USB PHY
+additionalProperties: true
 
 examples:
   - |
diff --git a/Documentation/devicetree/bindings/usb/usb.yaml 
b/Documentation/devicetree/bindings/usb/usb.yaml
new file mode 100644
index ..941ad59fbac5
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic USB Controller Device Tree Bindings
+
+maintainers:
+  - Greg Kroah-Hartman 
+
+select: false
+
+properties:
+  $nodename:
+pattern: "^usb(@.*)?"
+
+  phys:
+$ref: /schemas/types.yaml#/definitions/phandle-array
+description:
+  List of all the USB PHYs on this HCD
+
+  phy-names:
+description:
+  Name specifier for the USB PHY
+
+additionalProperties: true
+
+...
-- 
2.28.0

[PATCH v4 07/18] dt-bindings: usb: Convert xHCI bindings to DT schema

[Serge Semin]

Currently the DT bindings of Generic xHCI Controllers are described by
means of the legacy text file. Since such format is deprecated in favor of
the DT schema, let's convert the Generic xHCI Controllers bindings file to
the corresponding yaml files. There will be two of them: a DT schema for
the xHCI controllers on a generic platform and a DT schema validating a
generic xHCI controllers properties. The later will be used to validate
the xHCI controllers, which aside from some vendor-specific features
support the basic xHCI functionality.

An xHCI-compatible DT node shall support the standard USB HCD properties
and custom ones like: usb2-lpm-disable, usb3-lpm-capable,
quirk-broken-port-ped and imod-interval-ns. In addition if a generic xHCI
controller is being validated against the DT schema it is also supposed to
be equipped with mandatory compatible string, single registers range,
single interrupts source, and is supposed to optionally contain up to two
reference clocks for the controller core and CSRs.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Add explicit "additionalProperties: true" to the usb-xhci.yaml schema,
  since additionalProperties/unevaluatedProperties are going to be mandary
  for each binding.
---
 .../devicetree/bindings/usb/generic-xhci.yaml | 63 +++
 .../devicetree/bindings/usb/usb-xhci.txt  | 41 
 .../devicetree/bindings/usb/usb-xhci.yaml | 42 +
 3 files changed, 105 insertions(+), 41 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/generic-xhci.yaml
 delete mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.txt
 create mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.yaml

diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml 
b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
new file mode 100644
index ..1ea1d49a8175
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: USB xHCI Controller Device Tree Bindings
+
+maintainers:
+  - Mathias Nyman 
+
+allOf:
+  - $ref: "usb-xhci.yaml#"
+
+properties:
+  compatible:
+oneOf:
+  - description: Generic xHCI device
+const: generic-xhci
+  - description: Armada 37xx/375/38x/8k SoCs
+items:
+  - enum:
+  - marvell,armada3700-xhci
+  - marvell,armada-375-xhci
+  - marvell,armada-380-xhci
+  - marvell,armada-8k-xhci
+  - const: generic-xhci
+  - description: Broadcom STB SoCs with xHCI
+const: brcm,bcm7445-xhci
+  - description: Generic xHCI device
+const: xhci-platform
+deprecated: true
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+minItems: 1
+maxItems: 2
+
+  clock-names:
+minItems: 1
+items:
+  - const: core
+  - const: reg
+
+unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+examples:
+  - |
+usb@f0931000 {
+  compatible = "generic-xhci";
+  reg = <0xf0931000 0x8c8>;
+  interrupts = <0x0 0x4e 0x0>;
+};
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt 
b/Documentation/devicetree/bindings/usb/usb-xhci.txt
deleted file mode 100644
index 0c5cff84a969..
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ /dev/null
@@ -1,41 +0,0 @@
-USB xHCI controllers
-
-Required properties:
-  - compatible: should be one or more of
-
-- "generic-xhci" for generic XHCI device
-- "marvell,armada3700-xhci" for Armada 37xx SoCs
-- "marvell,armada-375-xhci" for Armada 375 SoCs
-- "marvell,armada-380-xhci" for Armada 38x SoCs
-- "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
-- "xhci-platform" (deprecated)
-
-When compatible with the generic version, nodes must list the
-SoC-specific version corresponding to the platform first
-followed by the generic version.
-
-  - reg: should contain address and length of the standard XHCI
-register set for the device.
-  - interrupts: one XHCI interrupt should be described here.
-
-Optional properties:
-  - clocks: reference to the clocks
-  - clock-names: mandatory if there is a second clock, in this case
-the name must be "core" for the first clock and "reg" for the
-second one
-  - usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
-  - usb3-lpm-capable: determines if platform is USB3 LPM capable
-  - quirk-broken-port-ped: set if the controller has broken port disable 
mechanism
-  - imod-interval-ns: default interrupt moderation interval is 5000ns
-  - phys : see usb-hcd.yaml in the current directory
-
-a

[PATCH v4 18/18] dt-bindings: usb: qcom,dwc3: Validate DWC3 sub-node

[Serge Semin]

Qualcomm msm8996/sc7180/sdm845 DWC3 compatible DT nodes are supposed to
have a DWC USB3 compatible sub-node to describe a fully functioning USB
interface. Let's use the available DWC USB3 DT schema to validate the
Qualcomm DWC3 sub-nodes.

Note since the generic DWC USB3 DT node is supposed to be named as generic
USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name
regexp and fix the DT node example.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Discard the "^dwc3@[0-9a-f]+$" nodes from being acceptable as sub-nodes.
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index dac10848dd7f..8f8d781e73a0 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -103,11 +103,8 @@ properties:
 # Required child node:
 
 patternProperties:
-  "^dwc3@[0-9a-f]+$":
-type: object
-description:
-  A child node must exist to represent the core DWC3 IP block
-  The content of the node is defined in dwc3.txt.
+  "^usb@[0-9a-f]+$":
+$ref: snps,dwc3.yaml#
 
 required:
   - compatible
@@ -160,7 +157,7 @@ examples:
 
 resets = < GCC_USB30_PRIM_BCR>;
 
-dwc3@a60 {
+usb@a60 {
 compatible = "snps,dwc3";
 reg = <0 0x0a60 0 0xcd00>;
 interrupts = ;
-- 
2.28.0

[PATCH v4 02/18] dt-bindings: usb: Convert generic USB properties to DT schemas

[Serge Semin]

The generic USB properties have been described in the legacy bindings
text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
convert its content into the generic USB, USB HCD and USB DRD DT
schemas. So the Generic USB schema will be applicable to all USB
controllers, USB HCD - for the generic USB Host controllers and the USB
DRD - for the USB Dual-role controllers.

Note the USB DRD schema is supposed to work in conjunction with
the USB peripheral/gadget and USB host controllers DT schemas.

Signed-off-by: Serge Semin 

---

Changelog v2:
- Discard '|' in all the new properties, since we don't need to preserve
  the text formatting.
- Convert abbreviated form of the "maximum-speed" enum restriction into
  the multi-lined version of the list.
- Drop quotes from around the string constants.

Changelog v4:
- Redistribute the properties between generic ones, USB HCD-specific and
  USB DRD-specific.
- Discard the Rob'es Reviewed-by tag. Please review the patch one more time.
---
 .../devicetree/bindings/usb/generic.txt   | 57 --
 .../devicetree/bindings/usb/usb-drd.yaml  | 77 +++
 .../devicetree/bindings/usb/usb-hcd.yaml  |  5 ++
 .../devicetree/bindings/usb/usb.yaml  | 22 ++
 4 files changed, 104 insertions(+), 57 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
 create mode 100644 Documentation/devicetree/bindings/usb/usb-drd.yaml

diff --git a/Documentation/devicetree/bindings/usb/generic.txt 
b/Documentation/devicetree/bindings/usb/generic.txt
deleted file mode 100644
index ba472e7aefc9..
--- a/Documentation/devicetree/bindings/usb/generic.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Generic USB Properties
-
-Optional properties:
- - maximum-speed: tells USB controllers we want to work up to a certain
-   speed. Valid arguments are "super-speed-plus",
-   "super-speed", "high-speed", "full-speed" and
-   "low-speed". In case this isn't passed via DT, USB
-   controllers should default to their maximum HW
-   capability.
- - dr_mode: tells Dual-Role USB controllers that we want to work on a
-   particular mode. Valid arguments are "host",
-   "peripheral" and "otg". In case this attribute isn't
-   passed via DT, USB DRD controllers should default to
-   OTG.
- - phy_type: tells USB controllers that we want to configure the core to 
support
-   a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
-   selected. Valid arguments are "utmi" and "utmi_wide".
-   In case this isn't passed via DT, USB controllers should
-   default to HW capability.
- - otg-rev: tells usb driver the release number of the OTG and EH supplement
-   with which the device and its descriptors are compliant,
-   in binary-coded decimal (i.e. 2.0 is 0200H). This
-   property is used if any real OTG features(HNP/SRP/ADP)
-   is enabled, if ADP is required, otg-rev should be
-   0x0200 or above.
- - companion: phandle of a companion
- - hnp-disable: tells OTG controllers we want to disable OTG HNP, normally HNP
-   is the basic function of real OTG except you want it
-   to be a srp-capable only B device.
- - srp-disable: tells OTG controllers we want to disable OTG SRP, SRP is
-   optional for OTG device.
- - adp-disable: tells OTG controllers we want to disable OTG ADP, ADP is
-   optional for OTG device.
- - usb-role-switch: boolean, indicates that the device is capable of assigning
-   the USB data role (USB host or USB device) for a given
-   USB connector, such as Type-C, Type-B(micro).
-   see connector/usb-connector.yaml.
- - role-switch-default-mode: indicating if usb-role-switch is enabled, the
-   device default operation mode of controller while usb
-   role is USB_ROLE_NONE. Valid arguments are "host" and
-   "peripheral". Defaults to "peripheral" if not
-   specified.
-
-
-This is an attribute to a USB controller such as:
-
-dwc3@4a03 {
-   compatible = "synopsys,dwc3";
-   reg = <0x4a03 0xcfff>;
-   interrupts = <0 92 4>
-   usb-phy = <_phy>, <,phy>;
-   maximum-speed = "super-speed";
-   dr_mode = "otg";
-   phy_type = "utmi_wide";
-   otg-rev = <0x0200>;
-   adp-disable;
-};
diff --git a/Documentat

[PATCH v4 06/18] dt-bindings: usb: Add generic "usb-phy" property

[Serge Semin]

Even though the Generic PHY framework is the more preferable way of
setting the USB PHY up, there are still many dts-files and DT bindings
which rely on having the legacy "usb-phy" specified to attach particular
USB PHYs to USB cores. Let's have the "usb-phy" property described in
the generic USB HCD binding file so it would be validated against the
nodes in which it's specified. Mark the property as deprecated to
discourage the developers from using it.

Signed-off-by: Serge Semin 
Acked-by: Martin Blumenstingl 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Discard '|' from the property description, since we don't need to
  preserve the text formatting.

Changelog v4:
- Move the "usb-phy" property definition into the usb.yaml schema where
  all generic USB properties are now defined.
---
 Documentation/devicetree/bindings/usb/usb.yaml | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/usb.yaml 
b/Documentation/devicetree/bindings/usb/usb.yaml
index 6dc4821e63c3..5400893d693e 100644
--- a/Documentation/devicetree/bindings/usb/usb.yaml
+++ b/Documentation/devicetree/bindings/usb/usb.yaml
@@ -24,6 +24,13 @@ properties:
 description:
   Name specifier for the USB PHY
 
+  usb-phy:
+$ref: /schemas/types.yaml#/definitions/phandle-array
+description:
+  List of all the USB PHYs on this HCD to be accepted by the legacy USB
+  Physical Layer subsystem.
+deprecated: true
+
   phy_type:
 description:
   Tells USB controllers that we want to configure the core to support a
-- 
2.28.0

[PATCH v4 10/18] dt-bindings: usb: Convert DWC USB3 bindings to DT schema

[Serge Semin]

DWC USB3 DT node is supposed to be compliant with the Generic xHCI
Controller schema, but with additional vendor-specific properties, the
controller-specific reference clocks and PHYs. So let's convert the
currently available legacy text-based DWC USB3 bindings to the DT schema
and make sure the DWC USB3 nodes are also validated against the
usb-xhci.yaml schema.

Note we have to discard the nodename restriction of being prefixed with
"dwc3@" string, since in accordance with the usb-hcd.yaml schema USB nodes
are supposed to be named as "^usb(@.*)".

Signed-off-by: Serge Semin 

---

Changelog v2:
- Discard '|' from the descriptions, since we don't need to preserve
  the text formatting in any of them.
- Drop quotes from around the string constants.
- Fix the "clock-names" prop description to be referring the enumerated
  clock-names instead of the ones from the Databook.

Changelog v3:
- Apply usb-xhci.yaml# schema only if the controller is supposed to work
  as either host or otg.

Changelog v4:
- Apply usb-drd.yaml schema first. If the controller is configured
  to work in a gadget mode only, then apply the usb.yaml schema too,
  otherwise apply the usb-xhci.yaml schema.
- Discard the Rob'es Reviewed-by tag. Please review the patch one more
  time.
---
 .../devicetree/bindings/usb/dwc3.txt  | 125 
 .../devicetree/bindings/usb/snps,dwc3.yaml| 303 ++
 2 files changed, 303 insertions(+), 125 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/dwc3.txt
 create mode 100644 Documentation/devicetree/bindings/usb/snps,dwc3.yaml

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
b/Documentation/devicetree/bindings/usb/dwc3.txt
deleted file mode 100644
index d03edf9d3935..
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ /dev/null
@@ -1,125 +0,0 @@
-synopsys DWC3 CORE
-
-DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
-  as described in 'usb/generic.txt'
-
-Required properties:
- - compatible: must be "snps,dwc3"
- - reg : Address and length of the register set for the device
- - interrupts: Interrupts used by the dwc3 controller.
- - clock-names: list of clock names. Ideally should be "ref",
-"bus_early", "suspend" but may be less or more.
- - clocks: list of phandle and clock specifier pairs corresponding to
-   entries in the clock-names property.
-
-Exception for clocks:
-  clocks are optional if the parent node (i.e. glue-layer) is compatible to
-  one of the following:
-"cavium,octeon-7130-usb-uctl"
-"qcom,dwc3"
-"samsung,exynos5250-dwusb3"
-"samsung,exynos5433-dwusb3"
-"samsung,exynos7-dwusb3"
-"sprd,sc9860-dwc3"
-"st,stih407-dwc3"
-"ti,am437x-dwc3"
-"ti,dwc3"
-"ti,keystone-dwc3"
-"rockchip,rk3399-dwc3"
-"xlnx,zynqmp-dwc3"
-
-Optional properties:
- - usb-phy : array of phandle for the PHY device.  The first element
-   in the array is expected to be a handle to the USB2/HS PHY and
-   the second element is expected to be a handle to the USB3/SS PHY
- - phys: from the *Generic PHY* bindings
- - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy"
-   or "usb3-phy".
- - resets: set of phandle and reset specifier pairs
- - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
- - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
- - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command
-   failure SW work-around for DWC_usb31 version 1.70a-ea06
-   and prior.
- - snps,disable_scramble_quirk: true when SW should disable data scrambling.
-   Only really useful for FPGA builds.
- - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
- - snps,lpm-nyet-threshold: LPM NYET threshold
- - snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
- - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
- - snps,req_p1p2p3_quirk: when set, the core will always request for
-   P1/P2/P3 transition sequence.
- - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
-   amount of 8B10B errors occur.
- - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
-   from P0 to P1/P2/P3.
- - snps,lfps_filter_quirk: when set core will filter LFPS reception.
- - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
-   Polling LFPS after RX.Detect.
- - snps,tx_de_emphasis_quirk: when set core will set Tx de-emphasis value.
- - snps,tx_de_emphasis: the value driven to the PHY is controlled by the
-   LTSSM during

[PATCH v4 08/18] dt-bindings: usb: xhci: Add Broadcom STB v2 compatible device

[Serge Semin]

For some reason the "brcm,xhci-brcm-v2" compatible string has been missing
in the original bindings file. Add it to the Generic xHCI Controllers DT
schema since the controller driver expects it to be supported.

Signed-off-by: Serge Semin 
Acked-by: Florian Fainelli 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/usb/generic-xhci.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml 
b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
index 1ea1d49a8175..23d73df96ea3 100644
--- a/Documentation/devicetree/bindings/usb/generic-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
@@ -26,7 +26,9 @@ properties:
   - marvell,armada-8k-xhci
   - const: generic-xhci
   - description: Broadcom STB SoCs with xHCI
-const: brcm,bcm7445-xhci
+enum:
+  - brcm,xhci-brcm-v2
+  - brcm,bcm7445-xhci
   - description: Generic xHCI device
 const: xhci-platform
 deprecated: true
-- 
2.28.0

[PATCH v4 11/18] dt-bindings: usb: dwc3: Add interrupt-names property support

[Serge Semin]

The controller driver supports two types of DWC USB3 devices: with a
common interrupt lane and with individual interrupts for each mode. Add
support for both these cases to the DWC USB3 DT schema.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/both of these cases support/support for both these cases"
- Drop quotes from around the string constants.

Changelog v4:
- Discard the block scalar style modifier "|" from the interrupts property
  description.
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 079617891da6..c205afd66b7c 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -31,8 +31,19 @@ properties:
   const: snps,dwc3
 
   interrupts:
+description:
+  It's either a single common DWC3 interrupt (dwc_usb3) or individual
+  interrupts for the host, gadget and DRD modes.
+minItems: 1
+maxItems: 3
+
+  interrupt-names:
 minItems: 1
 maxItems: 3
+oneOf:
+  - const: dwc_usb3
+  - items:
+  enum: [host, peripheral, otg]
 
   clocks:
 description:
-- 
2.28.0

[PATCH v4 09/18] dt-bindings: usb: renesas-xhci: Refer to the usb-xhci.yaml file

[Serge Semin]

With minor peculiarities (like uploading some vendor-specific firmware)
these are just Generic xHCI controllers fully compatible with its
properties. Make sure the Renesas USB xHCI DT nodes are also validated
against the Generic xHCI DT schema.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 
Reviewed-by: Yoshihiro Shimoda 
---
 Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml 
b/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml
index add9f7b66da0..4491567152a1 100644
--- a/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml
@@ -11,7 +11,7 @@ maintainers:
   - Yoshihiro Shimoda 
 
 allOf:
-  - $ref: "usb-hcd.yaml"
+  - $ref: "usb-xhci.yaml"
 
 properties:
   compatible:
@@ -68,7 +68,7 @@ required:
   - power-domains
   - resets
 
-additionalProperties: false
+unevaluatedProperties: false
 
 examples:
   - |
-- 
2.28.0

[PATCH v4 12/18] dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string

[Serge Semin]

The DWC USB3 driver and some DTS files like Exynos 5250, Keystone k2e, etc
expects the DWC USB3 DT node to have the compatible string with the
"synopsys" vendor prefix. Let's add the corresponding compatible string to
the controller DT schema, but mark it as deprecated seeing the Synopsys,
Inc. is presented with just "snps" vendor prefix.

Signed-off-by: Serge Semin 

---

Changelog v2:
- Drop quotes from around the compat string constant.

Changelog v4:
- Get the patch back, since we can't discard the deprecated prefix from the
  driver.
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index c205afd66b7c..4f68c5cd7a45 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -28,7 +28,10 @@ allOf:
 properties:
   compatible:
 contains:
-  const: snps,dwc3
+  oneOf:
+- const: snps,dwc3
+- const: synopsys,dwc3
+  deprecated: true
 
   interrupts:
 description:
-- 
2.28.0

[PATCH v4 15/18] dt-bindings: usb: meson-g12a-usb: Fix FL-adj property value

[Serge Semin]

An empty snps,quirk-frame-length-adjustment won't cause any change
performed by the driver. Moreover the DT schema validation will fail,
since it expects the property being assigned with some value. So set
fix the example by setting a valid FL-adj value in accordance with
Neil Armstrong comment.

Link: 
https://lore.kernel.org/linux-usb/20201010224121.12672-16-sergey.se...@baikalelectronics.ru/
Signed-off-by: Serge Semin 
Acked-by: Neil Armstrong 
Reviewed-by: Rob Herring 
Reviewed-by: Martin Blumenstingl 

---

Note the same problem is in the DT source file
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi .
---
 .../devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml 
b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index 5b04a7dfa018..a4b44a16aaef 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -209,6 +209,6 @@ examples:
   interrupts = <30>;
   dr_mode = "host";
   snps,dis_u2_susphy_quirk;
-  snps,quirk-frame-length-adjustment;
+  snps,quirk-frame-length-adjustment = <0x20>;
   };
 };
-- 
2.28.0

[PATCH v4 03/18] dt-bindings: usb: usb-drd: Add "otg-rev" property constraints

[Serge Semin]

There are only four OTG revisions are currently supported by the kernel:
0x0100, 0x0120, 0x0130, 0x0200. Any another value is considered as
invalid.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v4:
- Move the constraints to the usb-drd.yaml schema where the otg-rev
  property is now defined.
---
 Documentation/devicetree/bindings/usb/usb-drd.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/usb-drd.yaml 
b/Documentation/devicetree/bindings/usb/usb-drd.yaml
index f3a64c46dcd0..f229fc8068d9 100644
--- a/Documentation/devicetree/bindings/usb/usb-drd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-drd.yaml
@@ -18,6 +18,7 @@ properties:
   features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
   0x0200 or above.
 $ref: /schemas/types.yaml#/definitions/uint32
+enum: [0x0100, 0x0120, 0x0130, 0x0200]
 
   dr_mode:
 description:
-- 
2.28.0

[PATCH v4 14/18] dt-bindings: usb: dwc3: Add Frame Length Adj constraints

[Serge Semin]

In accordance with the IP core databook the
snps,quirk-frame-length-adjustment property can be set within [0, 0x3F].
Let's make sure the DT schema applies a correct constraints on the
property.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 64579aed404f..cd8527789d64 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -234,6 +234,8 @@ properties:
   length adjustment when the fladj_30mhz_sdbnd signal is invalid or
   incorrect.
 $ref: /schemas/types.yaml#/definitions/uint32
+minimum: 0
+maximum: 0x3f
 
   snps,rx-thr-num-pkt-prd:
 description:
-- 
2.28.0

[PATCH v4 17/18] dt-bindings: usb: keystone-dwc3: Validate DWC3 sub-node

[Serge Semin]

TI Keystone DWC3 compatible DT node is supposed to have a DWC USB3
compatible sub-node to describe a fully functioning USB interface.
Since DWC USB3 has now got a DT schema describing its DT node, let's make
sure the TI Keystone DWC3 sub-node passes validation against it.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/it'/its"
---
 Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml 
b/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
index c1b19fc5d0a2..ca7fbe3ed22e 100644
--- a/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
@@ -64,9 +64,7 @@ properties:
 
 patternProperties:
   "usb@[a-f0-9]+$":
-type: object
-description: This is the node representing the DWC3 controller instance
-  Documentation/devicetree/bindings/usb/dwc3.txt
+$ref: snps,dwc3.yaml#
 
 required:
   - compatible
-- 
2.28.0

[PATCH v4 05/18] dt-bindings: usb: usb-hcd: Add "tpl-support" property

[Serge Semin]

The host controller device might be designed to work for the particular
products or applications. In that case its DT node is supposed to be
equipped with the tpl-support property.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/it'/its"
- Discard '|' from the property description, since we don't need to preserve
  the text formatting.
---
 Documentation/devicetree/bindings/usb/usb-hcd.yaml | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml 
b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
index 52cc84c400c0..9881ac10380d 100644
--- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
@@ -17,6 +17,12 @@ properties:
 description: Phandle of a companion device
 $ref: /schemas/types.yaml#/definitions/phandle
 
+  tpl-support:
+description:
+  Indicates if the Targeted Peripheral List is supported for given
+  targeted hosts (non-PC hosts).
+type: boolean
+
 additionalProperties: true
 
 examples:
-- 
2.28.0

[PATCH v4 13/18] dt-bindings: usb: dwc3: Add Tx De-emphasis constraints

[Serge Semin]

In accordance with the driver comments the PIPE3 de-emphasis can be tuned
to be either -6dB, -2.5dB or disabled. Let's add the de-emphasis
property constraints so the DT schema would make sure the controller DT
node is equipped with correct value.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/tunned/tuned"
- Grammar fix: remove redundant "or" conjunction.
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 4f68c5cd7a45..64579aed404f 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -153,6 +153,10 @@ properties:
   The value driven to the PHY is controlled by the LTSSM during USB3
   Compliance mode.
 $ref: /schemas/types.yaml#/definitions/uint8
+enum:
+  - 0 # -6dB de-emphasis
+  - 1 # -3.5dB de-emphasis
+  - 2 # No de-emphasis
 
   snps,dis_u3_susphy_quirk:
 description: When set core will disable USB3 suspend phy
-- 
2.28.0

[PATCH v4 16/18] dt-bindings: usb: meson-g12a-usb: Validate DWC2/DWC3 sub-nodes

[Serge Semin]

Amlogic G12A USB DT sub-nodes are supposed to be compatible with the
generic DWC USB2 and USB3 devices. Since now we've got DT schemas for
both of the later IP cores let's make sure that the Amlogic G12A USB
DT nodes are fully evaluated including the DWC sub-nodes.

Signed-off-by: Serge Semin 
Reviewed-by: Neil Armstrong 
Reviewed-by: Rob Herring 
Reviewed-by: Martin Blumenstingl 

---

Changelog v2:
- Use "oneOf: [dwc2.yaml#, snps,dwc3.yaml#]" instead of the bulky "if:
  properties: compatibe: ..." statement.
---
 .../devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml  | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml 
b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index a4b44a16aaef..7b2dc905c8ce 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -78,7 +78,9 @@ properties:
 
 patternProperties:
   "^usb@[0-9a-f]+$":
-type: object
+oneOf:
+  - $ref: dwc2.yaml#
+  - $ref: snps,dwc3.yaml#
 
 additionalProperties: false
 
-- 
2.28.0

[PATCH v2 04/18] arm: dts: hisi-x5hd2: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi 
b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 3ee7967c202d..693b85b2cc7d 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -452,14 +452,14 @@ gmac1: ethernet@1841000 {
status = "disabled";
};
 
-   usb0: ehci@189 {
+   usb0: usb@189 {
compatible = "generic-ehci";
reg = <0x189 0x1000>;
interrupts = <0 66 4>;
clocks = < HIX5HD2_USB_CLK>;
};
 
-   usb1: ohci@188 {
+   usb1: usb@188 {
compatible = "generic-ohci";
reg = <0x188 0x1000>;
interrupts = <0 67 4>;
-- 
2.28.0

[PATCH v2 17/18] usb: dwc3: qcom: Detect DWC3 DT-nodes with "usb"-prefixed names

[Serge Semin]

In accordance with the USB HCD/DRD schema all the USB controllers are
supposed to have DT-nodes named with prefix "^usb(@.*)?".  Since the
existing DT-nodes will be renamed in a subsequent patch let's first make
sure the DWC3 Qualcomm driver supports them and second falls back to the
deprecated naming so not to fail on the legacy DTS-files passed to the
newer kernels.

Signed-off-by: Serge Semin 
---
 drivers/usb/dwc3/dwc3-qcom.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index e1e78e9824b1..661263e62f21 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -519,7 +519,8 @@ static int dwc3_qcom_of_register_core(struct 
platform_device *pdev)
struct device   *dev = >dev;
int ret;
 
-   dwc3_np = of_get_child_by_name(np, "dwc3");
+   dwc3_np = of_get_child_by_name(np, "usb") ?:
+ of_get_child_by_name(np, "dwc3");
if (!dwc3_np) {
dev_err(dev, "failed to find dwc3 core child\n");
return -ENODEV;
-- 
2.28.0

[PATCH v2 13/18] arm: dts: keystone: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/keystone-k2e.dtsi | 4 ++--
 arch/arm/boot/dts/keystone.dtsi | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi 
b/arch/arm/boot/dts/keystone-k2e.dtsi
index fa1b8499c5a7..b8f152e7af7f 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -52,7 +52,7 @@  {
 
usb: usb@268 {
interrupts = ;
-   dwc3@269 {
+   usb@269 {
interrupts = ;
};
};
@@ -78,7 +78,7 @@ keystone_usb1: usb@2500 {
dma-ranges;
status = "disabled";
 
-   usb1: dwc3@2501 {
+   usb1: usb@2501 {
compatible = "snps,dwc3";
reg = <0x2501 0x7>;
interrupts = ;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 8d046a1b690c..fc9fdc857ae8 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -217,7 +217,7 @@ keystone_usb0: usb@268 {
dma-ranges;
status = "disabled";
 
-   usb0: dwc3@269 {
+   usb0: usb@269 {
compatible = "snps,dwc3";
reg = <0x269 0x7>;
interrupts = ;
-- 
2.28.0

[PATCH v2 12/18] arm: dts: marvell: armada-375: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/armada-375.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/armada-375.dtsi 
b/arch/arm/boot/dts/armada-375.dtsi
index 9805e507c695..7f2f24a29e6c 100644
--- a/arch/arm/boot/dts/armada-375.dtsi
+++ b/arch/arm/boot/dts/armada-375.dtsi
@@ -426,7 +426,7 @@ usb1: usb@54000 {
status = "disabled";
};
 
-   usb2: usb3@58000 {
+   usb2: usb@58000 {
compatible = "marvell,armada-375-xhci";
reg = <0x58000 0x2>,<0x5b880 0x80>;
interrupts = ;
-- 
2.28.0

[PATCH v2 02/18] arm64: dts: amlogic: meson-g12: Set FL-adj property value

[Serge Semin]

In accordance with the DWC USB3 bindings the property is supposed to have
uint32 type. It's erroneous from the DT schema and driver points of view
to declare it as boolean. As Neil suggested set it to 0x20 so not break
the platform and to make the dtbs checker happy.

Link: 
https://lore.kernel.org/linux-usb/20201010224121.12672-16-sergey.se...@baikalelectronics.ru/
Signed-off-by: Serge Semin 
Reviewed-by: Martin Blumenstingl 
Reviewed-by: Neil Armstrong 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 1e83ec5b8c91..3033ab2be1ff 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -2380,7 +2380,7 @@ dwc3: usb@ff50 {
interrupts = ;
dr_mode = "host";
snps,dis_u2_susphy_quirk;
-   snps,quirk-frame-length-adjustment;
+   snps,quirk-frame-length-adjustment = <0x20>;
snps,parkmode-disable-ss-quirk;
};
};
-- 
2.28.0

[PATCH v2 14/18] arm: dts: stih407-family: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/stih407-family.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi 
b/arch/arm/boot/dts/stih407-family.dtsi
index 23a1746f3baa..2352f76b5a69 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -681,7 +681,7 @@ st_dwc3: dwc3@8f94000 {
 
status = "disabled";
 
-   dwc3: dwc3@990 {
+   dwc3: usb@990 {
compatible  = "snps,dwc3";
reg = <0x0990 0x10>;
interrupts  = ;
-- 
2.28.0

[PATCH v2 18/18] arm64: dts: qcom: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/ipq8074.dtsi| 4 ++--
 arch/arm64/boot/dts/qcom/msm8996.dtsi| 4 ++--
 arch/arm64/boot/dts/qcom/msm8998.dtsi| 2 +-
 arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
 9 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi 
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index defcbd15edf9..34e97da98270 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -1064,7 +1064,7 @@  {
status = "okay";
extcon = <_id>;
 
-   dwc3@760 {
+   usb@760 {
extcon = <_id>;
dr_mode = "otg";
maximum-speed = "high-speed";
@@ -1075,7 +1075,7 @@  {
status = "okay";
extcon = <_id>;
 
-   dwc3@6a0 {
+   usb@6a0 {
extcon = <_id>;
dr_mode = "otg";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 96a5ec89b5f0..1129062a4ca1 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -427,7 +427,7 @@ usb_0: usb@8af8800 {
resets = < GCC_USB0_BCR>;
status = "disabled";
 
-   dwc_0: dwc3@8a0 {
+   dwc_0: usb@8a0 {
compatible = "snps,dwc3";
reg = <0x8a0 0xcd00>;
interrupts = ;
@@ -468,7 +468,7 @@ usb_1: usb@8cf8800 {
resets = < GCC_USB1_BCR>;
status = "disabled";
 
-   dwc_1: dwc3@8c0 {
+   dwc_1: usb@8c0 {
compatible = "snps,dwc3";
reg = <0x8c0 0xcd00>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 9951286db775..66b6d2f0a093 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1767,7 +1767,7 @@ usb3: usb@6af8800 {
power-domains = < USB30_GDSC>;
status = "disabled";
 
-   dwc3@6a0 {
+   usb@6a0 {
compatible = "snps,dwc3";
reg = <0x06a0 0xcc00>;
interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
@@ -1978,7 +1978,7 @@ usb2: usb@76f8800 {
power-domains = < USB30_GDSC>;
status = "disabled";
 
-   dwc3@760 {
+   usb@760 {
compatible = "snps,dwc3";
reg = <0x0760 0xcc00>;
interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi 
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c45870600909..7cc7897e7b83 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1678,7 +1678,7 @@ usb3: usb@a8f8800 {
 
resets = < GCC_USB_30_BCR>;
 
-   usb3_dwc3: dwc3@a80 {
+   usb3_dwc3: usb@a80 {
compatible = "snps,dwc3";
reg = <0x0a80 0xcd00>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi 
b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index 6422cf9d5855..88d7b7a53743 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -337,7 +337,7 @@ _phy_sec {
  {
status = "okay";
 
-   dwc3@758 {
+   usb@758 {
dr_mode = "host";
};
 };
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi 
b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index b654b802e95c..f6ef17553064 100644
--- a

[PATCH v2 01/18] arm: dts: keystone: Correct DWC USB3 compatible string

[Serge Semin]

Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix.
Use it instead of the deprecated "synopsys" one.

Signed-off-by: Serge Semin 
Reviewed-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/keystone-k2e.dtsi | 2 +-
 arch/arm/boot/dts/keystone.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi 
b/arch/arm/boot/dts/keystone-k2e.dtsi
index 2d94faf31fab..fa1b8499c5a7 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -79,7 +79,7 @@ keystone_usb1: usb@2500 {
status = "disabled";
 
usb1: dwc3@2501 {
-   compatible = "synopsys,dwc3";
+   compatible = "snps,dwc3";
reg = <0x2501 0x7>;
interrupts = ;
usb-phy = <_phy>, <_phy>;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index c298675a29a5..8d046a1b690c 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -218,7 +218,7 @@ keystone_usb0: usb@268 {
status = "disabled";
 
usb0: dwc3@269 {
-   compatible = "synopsys,dwc3";
+   compatible = "snps,dwc3";
reg = <0x269 0x7>;
interrupts = ;
usb-phy = <_phy>, <_phy>;
-- 
2.28.0

[PATCH v2 11/18] arm64: dts: marvell: cp11x: Harmonize xHCI DT nodes name

[Serge Semin]

In accordance with the Generic xHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are
correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi 
b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16beabf5..1e37ae181acf 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -275,7 +275,7 @@ CP11X_LABEL(thermal): thermal-sensor@70 {
};
};
 
-   CP11X_LABEL(usb3_0): usb3@50 {
+   CP11X_LABEL(usb3_0): usb@50 {
compatible = "marvell,armada-8k-xhci",
"generic-xhci";
reg = <0x50 0x4000>;
@@ -287,7 +287,7 @@ CP11X_LABEL(usb3_0): usb3@50 {
status = "disabled";
};
 
-   CP11X_LABEL(usb3_1): usb3@51 {
+   CP11X_LABEL(usb3_1): usb@51 {
compatible = "marvell,armada-8k-xhci",
"generic-xhci";
reg = <0x51 0x4000>;
-- 
2.28.0

[PATCH v2 05/18] arm: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Vladimir Zapolskiy 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/lpc18xx.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 10b8249b8ab6..82ffd7b0ad8a 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -121,7 +121,7 @@ mmcsd: mmcsd@40004000 {
status = "disabled";
};
 
-   usb0: ehci@40006100 {
+   usb0: usb@40006100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40006100 0x100>;
interrupts = <8>;
@@ -133,7 +133,7 @@ usb0: ehci@40006100 {
status = "disabled";
};
 
-   usb1: ehci@40007100 {
+   usb1: usb@40007100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40007100 0x100>;
interrupts = <9>;
-- 
2.28.0

[PATCH v2 15/18] arm64: dts: apm: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named despite of the warning comment about possible backward
compatibility issues.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++--
 arch/arm64/boot/dts/apm/apm-storm.dtsi | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi 
b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
index 3feb1881bbc2..a0a194b8db7a 100644
--- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -597,8 +597,8 @@ serial0: serial@1060 {
interrupts = <0x0 0x4c 0x4>;
};
 
-   /* Do not change dwusb name, coded for backward compatibility */
-   usb0: dwusb@1900 {
+   /* Node-name might need to be coded as dwusb for backward 
compatibility */
+   usb0: usb@1900 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1900 0x0 0x10>;
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi 
b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index 8c802d87e751..f5083b3b9579 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -923,8 +923,8 @@ sata3: sata@1a80 {
phy-names = "sata-phy";
};
 
-   /* Do not change dwusb name, coded for backward compatibility */
-   usb0: dwusb@1900 {
+   /* Node-name might need to be coded as dwusb for backward 
compatibility */
+   usb0: usb@1900 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1900 0x0 0x10>;
@@ -933,7 +933,7 @@ usb0: dwusb@1900 {
dr_mode = "host";
};
 
-   usb1: dwusb@1980 {
+   usb1: usb@1980 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1980 0x0 0x10>;
-- 
2.28.0

[PATCH v2 00/18] dt-bindings: usb: Harmonize xHCI/EHCI/OHCI/DWC3 nodes name

[Serge Semin]

As the subject states this series is an attempt to harmonize the xHCI,
EHCI, OHCI and DWC USB3 DT nodes with the DT schema introduced in the
framework of the patchset [1].

Firstly as Krzysztof suggested we've deprecated a support of DWC USB3
controllers with "synopsys,"-vendor prefix compatible string in favor of
the ones with valid "snps,"-prefix. It's done in all the DTS files,
which have been unfortunate to define such nodes.

Secondly we suggest to fix the snps,quirk-frame-length-adjustment property
declaration in the Amlogic meson-g12-common.dtsi DTS file, since it has
been erroneously declared as boolean while having uint32 type. Neil said
it was ok to init that property with 0x20 value.

Thirdly the main part of the patchset concern fixing the xHCI, EHCI/OHCI
and DWC USB3 DT nodes name as in accordance with their DT schema the
corresponding node name is suppose to comply with the Generic USB HCD DT
schema, which requires the USB nodes to have the name acceptable by the
regexp: "^usb(@.*)?". Such requirement had been applicable even before we
introduced the new DT schema in [1], but as we can see it hasn't been
strictly implemented for a lot the DTS files. Since DT schema is now
available the automated DTS validation shall make sure that the rule isn't
violated.

Note most of these patches have been a part of the last three patches of
[1]. But since there is no way to have them merged in in a combined
manner, I had to move them to the dedicated series and split them up so to
be accepted by the corresponding subsystem maintainers one-by-one.

[1] Link: 
https://lore.kernel.org/linux-usb/20201014101402.18271-1-sergey.se...@baikalelectronics.ru/
Changelog v1:
- As Krzysztof suggested I've created a script which checked whether the
  node names had been also updated in all the depended dts files. As a
  result I found two more files which should have been also modified:
  arch/arc/boot/dts/{axc003.dtsi,axc003_idu.dtsi}
- Correct the USB DWC3 nodes name found in
  arch/arm64/boot/dts/apm/{apm-storm.dtsi,apm-shadowcat.dtsi} too.

Changelog v2:
- Drop the patch:
  [PATCH 01/29] usb: dwc3: Discard synopsys,dwc3 compatibility string
  and get back the one which marks the "synopsys,dwc3" compatible string
  as deprecated into the DT schema related series.
- Drop the patches:
  [PATCH 03/29] arm: dts: am437x: Correct DWC USB3 compatible string
  [PATCH 04/29] arm: dts: exynos: Correct DWC USB3 compatible string
  [PATCH 07/29] arm: dts: bcm53x: Harmonize EHCI/OHCI DT nodes name
  [PATCH 08/29] arm: dts: stm32: Harmonize EHCI/OHCI DT nodes name
  [PATCH 16/29] arm: dts: bcm5301x: Harmonize xHCI DT nodes name
  [PATCH 19/29] arm: dts: exynos: Harmonize DWC USB3 DT nodes name
  [PATCH 21/29] arm: dts: ls1021a: Harmonize DWC USB3 DT nodes name
  [PATCH 22/29] arm: dts: omap5: Harmonize DWC USB3 DT nodes name
  [PATCH 24/29] arm64: dts: allwinner: h6: Harmonize DWC USB3 DT nodes name
  [PATCH 26/29] arm64: dts: exynos: Harmonize DWC USB3 DT nodes name
  [PATCH 27/29] arm64: dts: layerscape: Harmonize DWC USB3 DT nodes name
  since they have been applied to the corresponding maintainers repos.
- Fix drivers/usb/dwc3/dwc3-qcom.c to be looking for the "usb@"-prefixed
  sub-node and falling back to the "dwc3@"-prefixed one on failure.

Cc: Vineet Gupta 
Cc: Rafal Milecki 
Cc: Wei Xu 
Cc: Thomas Bogendoerfer 
Cc: Michael Ellerman 
Cc: Jason Cooper 
Cc: Santosh Shilimkar 
Cc: Shawn Guo 
Cc: Benoit Cousson 
Cc: Patrice Chotard 
Cc: Maxime Ripard 
Cc: Khuong Dinh 
Cc: Andy Gross 
Cc: Alexey Brodkin 
Cc: Hauke Mehrtens 
Cc: Maxime Coquelin 
Cc: Alexandre Torgue 
Cc: Amelie Delaunay 
Cc: Vladimir Zapolskiy 
Cc: Paul Cercueil 
Cc: Matthias Brugger 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Andrew Lunn 
Cc: Gregory Clement 
Cc: Sebastian Hesselbarth 
Cc: Kukjin Kim 
Cc: Li Yang 
Cc: Tony Lindgren 
Cc: Chen-Yu Tsai 
Cc: Bjorn Andersson 
Cc: Jun Li 
Cc: linux-snps-...@lists.infradead.org
Cc: bcm-kernel-feedback-l...@broadcom.com
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-m...@vger.kernel.org
Cc: linux-media...@lists.infradead.org
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-samsung-...@vger.kernel.org
Cc: linux-o...@vger.kernel.org
Cc: linux-arm-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (18):
  arm: dts: keystone: Correct DWC USB3 compatible string
  arm64: dts: amlogic: meson-g12: Set FL-adj property value
  arc: dts: Harmonize EHCI/OHCI DT nodes name
  arm: dts: hisi-x5hd2: Harmonize EHCI/OHCI DT nodes name
  arm: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name
  arm64: dts: hisi: Harmonize EHCI/OHCI DT nodes name
  mips: dts: jz47x: Harmonize EHCI/OHCI DT nodes name
  mips: dts: sead3: Harmonize EHCI/OHCI DT nodes name
  mips: dts: ralink: mt7628a: Harmonize EHCI/OHCI DT nodes name
  powerpc: dts: akebono: Harmonize EHCI/OHCI DT nodes name
  arm64: 

[PATCH v2 06/18] arm64: dts: hisi: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++--
 arch/arm64/boot/dts/hisilicon/hip06.dtsi   | 4 ++--
 arch/arm64/boot/dts/hisilicon/hip07.dtsi   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index 12bc1d3ed424..a4acecb75c89 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -585,7 +585,7 @@ pcie: pcie@986 {
status = "disabled";
};
 
-   ohci: ohci@988 {
+   ohci: usb@988 {
compatible = "generic-ohci";
reg = <0x988 0x1>;
interrupts = ;
@@ -600,7 +600,7 @@ ohci: ohci@988 {
status = "disabled";
};
 
-   ehci: ehci@989 {
+   ehci: usb@989 {
compatible = "generic-ehci";
reg = <0x989 0x1>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 50ceaa959bdc..1226440d54ad 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -373,7 +373,7 @@ refclk: refclk {
#clock-cells = <0>;
};
 
-   usb_ohci: ohci@a703 {
+   usb_ohci: usb@a703 {
compatible = "generic-ohci";
reg = <0x0 0xa703 0x0 0x1>;
interrupt-parent = <_usb>;
@@ -382,7 +382,7 @@ usb_ohci: ohci@a703 {
status = "disabled";
};
 
-   usb_ehci: ehci@a702 {
+   usb_ehci: usb@a702 {
compatible = "generic-ehci";
reg = <0x0 0xa702 0x0 0x1>;
interrupt-parent = <_usb>;
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 4773a533fce5..93f99a5255ac 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1253,7 +1253,7 @@ uart0: uart@602b {
status = "disabled";
};
 
-   usb_ohci: ohci@a703 {
+   usb_ohci: usb@a703 {
compatible = "generic-ohci";
reg = <0x0 0xa703 0x0 0x1>;
interrupt-parent = <_usb>;
@@ -1262,7 +1262,7 @@ usb_ohci: ohci@a703 {
status = "disabled";
};
 
-   usb_ehci: ehci@a702 {
+   usb_ehci: usb@a702 {
compatible = "generic-ehci";
reg = <0x0 0xa702 0x0 0x1>;
interrupt-parent = <_usb>;
-- 
2.28.0

[PATCH v2 09/18] mips: dts: ralink: mt7628a: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/mips/boot/dts/ralink/mt7628a.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/ralink/mt7628a.dtsi 
b/arch/mips/boot/dts/ralink/mt7628a.dtsi
index 892e8ab863c5..45bf96a3d17a 100644
--- a/arch/mips/boot/dts/ralink/mt7628a.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7628a.dtsi
@@ -275,7 +275,7 @@ usb_phy: usb-phy@1012 {
reset-names = "host", "device";
};
 
-   ehci@101c {
+   usb@101c {
compatible = "generic-ehci";
reg = <0x101c 0x1000>;
 
-- 
2.28.0

[PATCH v2 10/18] powerpc: dts: akebono: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/powerpc/boot/dts/akebono.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/boot/dts/akebono.dts 
b/arch/powerpc/boot/dts/akebono.dts
index df18f8dc4642..343326c30380 100644
--- a/arch/powerpc/boot/dts/akebono.dts
+++ b/arch/powerpc/boot/dts/akebono.dts
@@ -126,7 +126,7 @@ SATA0: sata@301 {
interrupts = <93 2>;
};
 
-   EHCI0: ehci@3001000 {
+   EHCI0: usb@3001000 {
compatible = "ibm,476gtr-ehci", "generic-ehci";
reg = <0x300 0x1000 0x0 0x1>;
interrupt-parent = <>;
@@ -140,14 +140,14 @@ SD0: sd@300 {
interrupt-parent = <>;
};
 
-   OHCI0: ohci@3001001 {
+   OHCI0: usb@3001001 {
compatible = "ibm,476gtr-ohci", "generic-ohci";
reg = <0x300 0x1001 0x0 0x1>;
interrupt-parent = <>;
interrupts = <89 1>;
};
 
-   OHCI1: ohci@3001002 {
+   OHCI1: usb@3001002 {
compatible = "ibm,476gtr-ohci", "generic-ohci";
reg = <0x300 0x1002 0x0 0x1>;
interrupt-parent = <>;
-- 
2.28.0

[PATCH v2 16/18] arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi 
b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index d25aac5e0bf8..aea3800029b5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -1166,7 +1166,7 @@ usb_phy: usb-phy {
};
};
 
-   dwc3: dwc3@ff10 {
+   dwc3: usb@ff10 {
compatible = "snps,dwc3";
reg = <0x0 0xff10 0x0 0x10>;
 
-- 
2.28.0

[PATCH v2 07/18] mips: dts: jz47x: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Paul Cercueil 
Acked-by: Krzysztof Kozlowski 
---
 arch/mips/boot/dts/ingenic/jz4740.dtsi | 2 +-
 arch/mips/boot/dts/ingenic/jz4770.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi 
b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 1520585c235c..b989ff62ffbc 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -281,7 +281,7 @@ dmac: dma-controller@1302 {
clocks = < JZ4740_CLK_DMA>;
};
 
-   uhc: uhc@1303 {
+   uhc: usb@1303 {
compatible = "ingenic,jz4740-ohci", "generic-ohci";
reg = <0x1303 0x1000>;
 
diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi 
b/arch/mips/boot/dts/ingenic/jz4770.dtsi
index fa11ac950499..e45c03038826 100644
--- a/arch/mips/boot/dts/ingenic/jz4770.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
@@ -417,7 +417,7 @@ dmac1: dma-controller@13420100 {
interrupts = <23>;
};
 
-   uhc: uhc@1343 {
+   uhc: usb@1343 {
compatible = "generic-ohci";
reg = <0x1343 0x1000>;
 
-- 
2.28.0

[PATCH v2 08/18] mips: dts: sead3: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/mips/boot/dts/mti/sead3.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 192c26ff1d3d..1cf6728af8fe 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -56,7 +56,7 @@ gic: interrupt-controller@1b1c {
interrupt-parent = <_intc>;
};
 
-   ehci@1b20 {
+   usb@1b20 {
compatible = "generic-ehci";
reg = <0x1b20 0x1000>;
 
-- 
2.28.0

[PATCH v2 03/18] arc: dts: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Alexey Brodkin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arc/boot/dts/axc003.dtsi| 4 ++--
 arch/arc/boot/dts/axc003_idu.dtsi| 4 ++--
 arch/arc/boot/dts/axs10x_mb.dtsi | 4 ++--
 arch/arc/boot/dts/hsdk.dts   | 4 ++--
 arch/arc/boot/dts/vdk_axs10x_mb.dtsi | 2 +-
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index ac8e1b463a70..256ecffbc31e 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -103,11 +103,11 @@ ethernet@18000 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
dma-coherent;
};
 
-   ohci@6 {
+   usb@6 {
dma-coherent;
};
 
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi 
b/arch/arc/boot/dts/axc003_idu.dtsi
index 9da21e7fd246..6eda28cbd15e 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -110,11 +110,11 @@ ethernet@18000 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
dma-coherent;
};
 
-   ohci@6 {
+   usb@6 {
dma-coherent;
};
 
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 99d3e7175bf7..b64435385304 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -87,13 +87,13 @@ gmac: ethernet@18000 {
mac-address = [00 00 00 00 00 00]; /* Filled in by 
U-Boot */
};
 
-   ehci@4 {
+   usb@4 {
compatible = "generic-ehci";
reg = < 0x4 0x100 >;
interrupts = < 8 >;
};
 
-   ohci@6 {
+   usb@6 {
compatible = "generic-ohci";
reg = < 0x6 0x100 >;
interrupts = < 8 >;
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index dcaa44e408ac..fdd4f7f635d3 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -234,7 +234,7 @@ phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
};
};
 
-   ohci@6 {
+   usb@6 {
compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
reg = <0x6 0x100>;
interrupts = <15>;
@@ -242,7 +242,7 @@ ohci@6 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
reg = <0x4 0x100>;
interrupts = <15>;
diff --git a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi 
b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
index cbb179770293..90a412026e64 100644
--- a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
@@ -46,7 +46,7 @@ ethernet@18000 {
clock-names = "stmmaceth";
};
 
-   ehci@4 {
+   usb@4 {
compatible = "generic-ehci";
reg = < 0x4 0x100 >;
interrupts = < 8 >;
-- 
2.28.0

Re: [PATCH v4 10/18] dt-bindings: usb: Convert DWC USB3 bindings to DT schema

[Serge Semin]

On Wed, Nov 11, 2020 at 10:16:28AM +0100, Krzysztof Kozlowski wrote:
> On Wed, Nov 11, 2020 at 12:08:45PM +0300, Serge Semin wrote:
> > DWC USB3 DT node is supposed to be compliant with the Generic xHCI
> > Controller schema, but with additional vendor-specific properties, the
> > controller-specific reference clocks and PHYs. So let's convert the
> > currently available legacy text-based DWC USB3 bindings to the DT schema
> > and make sure the DWC USB3 nodes are also validated against the
> > usb-xhci.yaml schema.
> > 
> > Note we have to discard the nodename restriction of being prefixed with
> > "dwc3@" string, since in accordance with the usb-hcd.yaml schema USB nodes
> > are supposed to be named as "^usb(@.*)".
> > 
> > Signed-off-by: Serge Semin 
> > 
> > ---
> > 
> > Changelog v2:
> > - Discard '|' from the descriptions, since we don't need to preserve
> >   the text formatting in any of them.
> > - Drop quotes from around the string constants.
> > - Fix the "clock-names" prop description to be referring the enumerated
> >   clock-names instead of the ones from the Databook.
> > 
> > Changelog v3:
> > - Apply usb-xhci.yaml# schema only if the controller is supposed to work
> >   as either host or otg.
> > 
> > Changelog v4:
> > - Apply usb-drd.yaml schema first. If the controller is configured
> >   to work in a gadget mode only, then apply the usb.yaml schema too,
> >   otherwise apply the usb-xhci.yaml schema.
> > - Discard the Rob'es Reviewed-by tag. Please review the patch one more
> >   time.
> > ---
> >  .../devicetree/bindings/usb/dwc3.txt  | 125 
> >  .../devicetree/bindings/usb/snps,dwc3.yaml| 303 ++
> >  2 files changed, 303 insertions(+), 125 deletions(-)
> >  delete mode 100644 Documentation/devicetree/bindings/usb/dwc3.txt
> >  create mode 100644 Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
> > b/Documentation/devicetree/bindings/usb/dwc3.txt
> > deleted file mode 100644
> > index d03edf9d3935..
> > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > +++ /dev/null
> > @@ -1,125 +0,0 @@
> > -synopsys DWC3 CORE
> > -
> > -DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
> > -  as described in 'usb/generic.txt'
> > -
> > -Required properties:
> > - - compatible: must be "snps,dwc3"
> > - - reg : Address and length of the register set for the device
> > - - interrupts: Interrupts used by the dwc3 controller.

> > - - clock-names: list of clock names. Ideally should be "ref",
> > -"bus_early", "suspend" but may be less or more.
> > - - clocks: list of phandle and clock specifier pairs corresponding to
> > -   entries in the clock-names property.
> > -
> > -Exception for clocks:
> > -  clocks are optional if the parent node (i.e. glue-layer) is compatible to
> > -  one of the following:
> > -"cavium,octeon-7130-usb-uctl"
> > -"qcom,dwc3"
> > -"samsung,exynos5250-dwusb3"
> > -"samsung,exynos5433-dwusb3"
> > -"samsung,exynos7-dwusb3"
> > -"sprd,sc9860-dwc3"
> > -"st,stih407-dwc3"
> > -"ti,am437x-dwc3"
> > -"ti,dwc3"
> > -"ti,keystone-dwc3"
> > -"rockchip,rk3399-dwc3"
> > -"xlnx,zynqmp-dwc3"
> 
> What happened with this part of dtschema? It sees you removed it.

You meant "bindings", right?

I don't think it's a good idea to implement that weak binding in the
generic DWC USB3 DT schema. Of course I could have created it under
the allOf conditional schema and stuff. But in that case we would have
needed to support the clock-related vendor-specific peculiarities in
both the generic DWC USB3 DT schema and in the vendor-specific binding
files. That wouldn't be that maintainable. As I see it all the
vendor-specific clock requirements should be reflected in the
glue-node DT schema. The DWC USB3 node binding just declares the
clocks as optional. Moreover the DWC USB3 driver also considers them
as optional.

-Sergey

> 
> Best regards,
> Krzysztof

Re: [PATCH v4 10/18] dt-bindings: usb: Convert DWC USB3 bindings to DT schema

[Serge Semin]

On Wed, Nov 11, 2020 at 10:34:10AM +0100, Krzysztof Kozlowski wrote:
> On Wed, 11 Nov 2020 at 10:32, Serge Semin
>  wrote:
> >
> > On Wed, Nov 11, 2020 at 10:16:28AM +0100, Krzysztof Kozlowski wrote:
> > > On Wed, Nov 11, 2020 at 12:08:45PM +0300, Serge Semin wrote:
> > > > DWC USB3 DT node is supposed to be compliant with the Generic xHCI
> > > > Controller schema, but with additional vendor-specific properties, the
> > > > controller-specific reference clocks and PHYs. So let's convert the
> > > > currently available legacy text-based DWC USB3 bindings to the DT schema
> > > > and make sure the DWC USB3 nodes are also validated against the
> > > > usb-xhci.yaml schema.
> > > >
> > > > Note we have to discard the nodename restriction of being prefixed with
> > > > "dwc3@" string, since in accordance with the usb-hcd.yaml schema USB 
> > > > nodes
> > > > are supposed to be named as "^usb(@.*)".
> > > >
> > > > Signed-off-by: Serge Semin 
> > > >
> > > > ---
> > > >
> > > > Changelog v2:
> > > > - Discard '|' from the descriptions, since we don't need to preserve
> > > >   the text formatting in any of them.
> > > > - Drop quotes from around the string constants.
> > > > - Fix the "clock-names" prop description to be referring the enumerated
> > > >   clock-names instead of the ones from the Databook.
> > > >
> > > > Changelog v3:
> > > > - Apply usb-xhci.yaml# schema only if the controller is supposed to work
> > > >   as either host or otg.
> > > >
> > > > Changelog v4:
> > > > - Apply usb-drd.yaml schema first. If the controller is configured
> > > >   to work in a gadget mode only, then apply the usb.yaml schema too,
> > > >   otherwise apply the usb-xhci.yaml schema.
> > > > - Discard the Rob'es Reviewed-by tag. Please review the patch one more
> > > >   time.
> > > > ---
> > > >  .../devicetree/bindings/usb/dwc3.txt  | 125 
> > > >  .../devicetree/bindings/usb/snps,dwc3.yaml| 303 ++
> > > >  2 files changed, 303 insertions(+), 125 deletions(-)
> > > >  delete mode 100644 Documentation/devicetree/bindings/usb/dwc3.txt
> > > >  create mode 100644 Documentation/devicetree/bindings/usb/snps,dwc3.yaml
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
> > > > b/Documentation/devicetree/bindings/usb/dwc3.txt
> > > > deleted file mode 100644
> > > > index d03edf9d3935..
> > > > --- a/Documentation/devicetree/bindings/usb/dwc3.txt
> > > > +++ /dev/null
> > > > @@ -1,125 +0,0 @@
> > > > -synopsys DWC3 CORE
> > > > -
> > > > -DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
> > > > -  as described in 'usb/generic.txt'
> > > > -
> > > > -Required properties:
> > > > - - compatible: must be "snps,dwc3"
> > > > - - reg : Address and length of the register set for the device
> > > > - - interrupts: Interrupts used by the dwc3 controller.
> >
> > > > - - clock-names: list of clock names. Ideally should be "ref",
> > > > -"bus_early", "suspend" but may be less or more.
> > > > - - clocks: list of phandle and clock specifier pairs corresponding to
> > > > -   entries in the clock-names property.
> > > > -
> > > > -Exception for clocks:
> > > > -  clocks are optional if the parent node (i.e. glue-layer) is 
> > > > compatible to
> > > > -  one of the following:
> > > > -"cavium,octeon-7130-usb-uctl"
> > > > -"qcom,dwc3"
> > > > -"samsung,exynos5250-dwusb3"
> > > > -"samsung,exynos5433-dwusb3"
> > > > -"samsung,exynos7-dwusb3"
> > > > -"sprd,sc9860-dwc3"
> > > > -"st,stih407-dwc3"
> > > > -"ti,am437x-dwc3"
> > > > -"ti,dwc3"
> > > > -"ti,keystone-dwc3"
> > > > -"rockchip,rk3399-dwc3"
> > > > -"xlnx,zynqmp-dwc3"
> > >
> > > What happened with this part of dtschema? It sees you removed it.
> >
> > You meant "bindings", right?
> >
> > I don't think it's a good idea to implement that weak binding in the
> > generic DWC USB3 DT schema. Of course I could have created it under
> > the allOf conditional schema and stuff. But in that case we would have
> > needed to support the clock-related vendor-specific peculiarities in
> > both the generic DWC USB3 DT schema and in the vendor-specific binding
> > files. That wouldn't be that maintainable. As I see it all the
> > vendor-specific clock requirements should be reflected in the
> > glue-node DT schema. The DWC USB3 node binding just declares the
> > clocks as optional. Moreover the DWC USB3 driver also considers them
> > as optional.
> 

> Sure, rationale is good, but it needs to be explained in commit msg.
> Otherwise you state that you just "convert" but it's not a simple
> conversion. The meaning is changed.

Right. I should have explained it in the commit log. It has just
slipped out of my mind. If v3 is needed I'll add the proper text in the
commit message.

-Sergey

> 
> 
> Best regards,
> Krzysztof

Re: [PATCH] spi: dw: fix build error by selecting MULTIPLEXER

[Serge Semin]

Hello Randy

On Sun, Nov 15, 2020 at 08:07:21PM -0800, Randy Dunlap wrote:
> Fix build error for spi-dw-bt1.o by selecting MULTIPLEXER.
> 
> hppa-linux-ld: drivers/spi/spi-dw-bt1.o: in function `dw_spi_bt1_sys_init':
> (.text+0x1ac): undefined reference to `devm_mux_control_get'

Thank you very much.
Acked-by: Serge Semin 

-Sergey

> 
> Fixes: abf00907538e ("spi: dw: Add Baikal-T1 SPI Controller glue driver")
> Reported-by: kernel test robot 
> Signed-off-by: Randy Dunlap 
> Cc: Serge Semin 
> Cc: Ramil Zaripov 
> Cc: Mark Brown 
> Cc: linux-...@vger.kernel.org
> ---
>  drivers/spi/Kconfig |1 +
>  1 file changed, 1 insertion(+)
> 
> --- linux-next-20201113.orig/drivers/spi/Kconfig
> +++ linux-next-20201113/drivers/spi/Kconfig
> @@ -255,6 +255,7 @@ config SPI_DW_MMIO
>  config SPI_DW_BT1
>   tristate "Baikal-T1 SPI driver for DW SPI core"
>   depends on MIPS_BAIKAL_T1 || COMPILE_TEST
> + select MULTIPLEXER
>   help
> Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI
> controllers. Two of them are pretty much normal: with IRQ, DMA,

Re: [PATCH] MIPS: kernel: Fix for_each_memblock conversion

[Serge Semin]

On Mon, Nov 16, 2020 at 06:45:15PM +0100, Thomas Bogendoerfer wrote:
> The loop over all memblocks works with PFN numbers and not physical
> addresses, so we need for_each_mem_pfn_range().

Great catch! Don't know how that has been working so far. Anyway
Reviewed-by: Serge Semin 

-Sergey

> 
> Fixes: b10d6bca8720 ("arch, drivers: replace for_each_membock() with 
> for_each_mem_range()")
> Signed-off-by: Thomas Bogendoerfer 
> ---
>  arch/mips/kernel/setup.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
> index 0d4253208bde..ca579deef939 100644
> --- a/arch/mips/kernel/setup.c
> +++ b/arch/mips/kernel/setup.c
> @@ -262,8 +262,8 @@ static void __init bootmem_init(void)
>  static void __init bootmem_init(void)
>  {
>   phys_addr_t ramstart, ramend;
> - phys_addr_t start, end;
> - u64 i;
> + unsigned long start, end;
> + int i;
>  
>   ramstart = memblock_start_of_DRAM();
>   ramend = memblock_end_of_DRAM();
> @@ -300,7 +300,7 @@ static void __init bootmem_init(void)
>  
>   min_low_pfn = ARCH_PFN_OFFSET;
>   max_pfn = PFN_DOWN(ramend);
> - for_each_mem_range(i, , ) {
> + for_each_mem_pfn_range(i, MAX_NUMNODES, , , NULL) {
>   /*
>* Skip highmem here so we get an accurate max_low_pfn if low
>* memory stops short of high memory.
> -- 
> 2.16.4
> 

Re: [PATCH] MIPS: reserve the memblock right after the kernel

[Serge Semin]

On Fri, Nov 13, 2020 at 02:09:09PM +0100, Alexander Sverdlin wrote:
> Hello Serge, Thomas,
> 
> On 13/11/2020 10:17, Alexander Sverdlin wrote:
> >> So IMHO what could be the best conclusion in the framework of this patch:
> >> 1) As Thomas said any platform-specific reservation should be done in the
> >> platform-specific code. That means if octeon needs some memory behind
> >> the kernel being reserved, then it should be done for example in
> >> prom_init().
> >> 2) The check_kernel_sections_mem() method can be removed. But it
> >> should be done carefully. We at least need to try to find all the
> >> platforms, which rely on its functionality.
> > Thanks for looking into this! I agree with your analysis, I'll try to 
> > rework,
> > removing check_kernel_sections_mem().
> 

> but now, after grepping inside arch/mips, I found that only Octeon does 
> memblock_add()
> of the area between _text and _and explicitly.
> 
> Therefore, maybe many other platforms indeed rely on 
> check_kernel_sections_mem()?

Taking into account what Maciej said, now I am not sure it was a good
idea to discard the check_kernel_sections_mem() method. Indeed it is
useful for a custom memory layout passed via the kernel parameters.

> Maybe the proper way would be really to remote the PFN_UP()/PFN_DOWN() from
> check_kernel_sections_mem(), which is not necessary after commit b10d6bca8720
> ("arch, drivers: replace for_each_membock() with for_each_mem_range()")
> which fixed the resource_init()?
> 

If you think they are redundant, why not?

> As completely unrelated optimization I can remove the same memblock_add() of 
> the
> kernel sections from the Octeon platform code. 

Why not as long as it will work. AFAICS the octeon platform code does
some kernel start address adjustment while the generic MIPS code
doesn't. Are you sure using the generic version for octeon won't cause
any problem?

-Sergey

> 
> -- 
> Best regards,
> Alexander Sverdlin.

Re: [PATCH] MIPS: kernel: Fix for_each_memblock conversion

[Serge Semin]

On Tue, Nov 17, 2020 at 10:05:18AM +0200, Mike Rapoport wrote:
> On Mon, Nov 16, 2020 at 11:05:54PM +0300, Serge Semin wrote:
> > On Mon, Nov 16, 2020 at 06:45:15PM +0100, Thomas Bogendoerfer wrote:
> > > The loop over all memblocks works with PFN numbers and not physical
> > > addresses, so we need for_each_mem_pfn_range().
> > 
> > Great catch! Don't know how that has been working so far. Anyway
> 

> The loop is relevant only for systems with highmem, apparently there are
> not many highmem users out there.

That has been mostly a rhetorical question. The thing is that our
platform is 32bit and it is active user of highmem.) So I am very
puzzled how I haven't noticed a effect caused by that bug before.
Most likely that happened due to our platform having a first memory
chunk starting with physical address 0x0. That's why we always have a
low memory defined.

-Sergey

> 
> > Reviewed-by: Serge Semin 
> > 
> > -Sergey
> > 
> > > 
> > > Fixes: b10d6bca8720 ("arch, drivers: replace for_each_membock() with 
> > > for_each_mem_range()")
> > > Signed-off-by: Thomas Bogendoerfer 
> > > ---
> > >  arch/mips/kernel/setup.c | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > > 
> > > diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
> > > index 0d4253208bde..ca579deef939 100644
> > > --- a/arch/mips/kernel/setup.c
> > > +++ b/arch/mips/kernel/setup.c
> > > @@ -262,8 +262,8 @@ static void __init bootmem_init(void)
> > >  static void __init bootmem_init(void)
> > >  {
> > >   phys_addr_t ramstart, ramend;
> > > - phys_addr_t start, end;
> > > - u64 i;
> > > + unsigned long start, end;
> > > + int i;
> > >  
> > >   ramstart = memblock_start_of_DRAM();
> > >   ramend = memblock_end_of_DRAM();
> > > @@ -300,7 +300,7 @@ static void __init bootmem_init(void)
> > >  
> > >   min_low_pfn = ARCH_PFN_OFFSET;
> > >   max_pfn = PFN_DOWN(ramend);
> > > - for_each_mem_range(i, , ) {
> > > + for_each_mem_pfn_range(i, MAX_NUMNODES, , , NULL) {
> > >   /*
> > >* Skip highmem here so we get an accurate max_low_pfn if low
> > >* memory stops short of high memory.
> > > -- 
> > > 2.16.4
> > > 
> 
> -- 
> Sincerely yours,
> Mike.

[PATCH] spi: dw: Set transfer handler before unmasking the IRQs

[Serge Semin]

It turns out the IRQs most like can be unmasked before the controller is
enabled with no problematic consequences. The manual doesn't explicitly
state that, but the examples perform the controller initialization
procedure in that order. So the commit da8f58909e7e ("spi: dw: Unmask IRQs
after enabling the chip") hasn't been that required as I thought. But
anyway setting the IRQs up after the chip enabling still worth adding
since it has simplified the code a bit. The problem is that it has
introduced a potential bug. The transfer handler pointer is now
initialized after the IRQs are enabled. That may and eventually will cause
an invalid or uninitialized callback invocation. Fix that just by
performing the callback initialization before the IRQ unmask procedure.

Fixes: da8f58909e7e ("spi: dw: Unmask IRQs after enabling the chip")
Signed-off-by: Serge Semin 
---
 drivers/spi/spi-dw-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 2e50cc0a9291..0b2236ade412 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -357,11 +357,11 @@ static void dw_spi_irq_setup(struct dw_spi *dws)
dw_writel(dws, DW_SPI_TXFTLR, level);
dw_writel(dws, DW_SPI_RXFTLR, level - 1);
 
+   dws->transfer_handler = dw_spi_transfer_handler;
+
imask = SPI_INT_TXEI | SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI |
SPI_INT_RXFI;
spi_umask_intr(dws, imask);
-
-   dws->transfer_handler = dw_spi_transfer_handler;
 }
 
 /*
-- 
2.29.2

[RFC PATCH] spi: Take the SPI IO-mutex in the spi_setup() method

[Serge Semin]

I've discovered that due to the recent commit 49d7d695ca4b ("spi: dw:
Explicitly de-assert CS on SPI transfer completion") a concurrent usage of
the spidev devices with different chip-selects causes the "SPI transfer
timed out" error. The root cause of the problem has turned to be in a race
condition of the SPI-transfer execution procedure and the spi_setup()
method being called at the same time. In particular in calling the
spi_set_cs(false) while there is an SPI-transfer being executed. In my
case due to the commit cited above all CSs get to be switched off by
calling the spi_setup() for /dev/spidev0.1 while there is an concurrent
SPI-transfer execution performed on /dev/spidev0.0. Of course a situation
of the spi_setup() being called while there is an SPI-transfer being
executed for two different SPI peripheral devices of the same controller
may happen not only for the spidev driver, but for instance for MMC SPI +
some another device, or spi_setup() being called from an SPI-peripheral
probe method while some other device has already been probed and is being
used by a corresponding driver...

Of course I could have provided a fix affecting the DW APB SSI driver
only, for instance, by creating a mutual exclusive access to the set_cs
callback and setting/clearing only the bit responsible for the
corresponding chip-select. But after a short research I've discovered that
the problem most likely affects a lot of the other drivers:
- drivers/spi/spi-sun4i.c - RMW the chip-select register;
- drivers/spi/spi-rockchip.c - RMW the chip-select register;
- drivers/spi/spi-qup.c - RMW a generic force-CS flag in a CSR.
- drivers/spi/spi-sifive.c - set a generic CS-mode flag in a CSR.
- drivers/spi/spi-bcm63xx-hsspi.c - uses an internal mutex to serialize
  the bus config changes, but still isn't protected from the race
  condition described above;
- drivers/spi/spi-geni-qcom.c - RMW a chip-select internal flag and set the
  CS state in HW;
- drivers/spi/spi-orion.c - RMW a chip-select register;
- drivers/spi/spi-cadence.c - RMW a chip-select register;
- drivers/spi/spi-armada-3700.c - RMW a chip-select register;
- drivers/spi/spi-lantiq-ssc.c - overwrites the chip-select register;
- drivers/spi/spi-sun6i.c - RMW a chip-select register;
- drivers/spi/spi-synquacer.c - RMW a chip-select register;
- drivers/spi/spi-altera.c - directly sets the chip-select state;
- drivers/spi/spi-omap2-mcspi.c - RMW an internally cached CS state and
  writes it to HW;
- drivers/spi/spi-mt65xx.c - RMW some CSR;
- drivers/spi/spi-jcore.c - directly sets the chip-selects state;
- drivers/spi/spi-mt7621.c - RMW a chip-select register;

I could have missed some drivers, but a scale of the problem is obvious.
As you can see most of the drivers perform an unprotected
Read-modify-write chip-select register modification in the set_cs callback.
Seeing the spi_setup() function is calling the spi_set_cs() and it can be
executed concurrently with SPI-transfers exec procedure, which also calls
spi_set_cs() in the SPI core spi_transfer_one_message() method, the race
condition of the register modification turns to be obvious.

To sum up the problem denoted above affects each driver for a controller
having more than one chip-select lane and which:
1) performs the RMW to some CS-related register with no serialization;
2) directly disables any CS on spi_set_cs(dev, false).
* the later is the case of the DW APB SSI driver.

The controllers which equipped with a single CS theoretically can also
experience the problem, but in practice will not since normally the
spi_setup() isn't called concurrently with the SPI-transfers executed on
the same SPI peripheral device.

In order to generically fix the denoted bug I'd suggest to serialize an
access to the controller IO by taking the IO mutex in the spi_setup()
callback. The mutex is held while there is an SPI communication going on
on the SPI-bus of the corresponding SPI-controller. So calling the
spi_setup() method and disabling/updating the CS state within it would be
safe while there is no any SPI-transfers being executed. Also note I
suppose it would be safer to protect the spi_controller->setup() callback
invocation too, seeing some of the SPI-controller drivers update a HW
state in there.

Fixes: 49d7d695ca4b ("spi: dw: Explicitly de-assert CS on SPI transfer 
completion")
Signed-off-by: Serge Semin 
---
 drivers/spi/spi.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 0cab239d8e7f..353fa178e39b 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -3327,12 +3327,15 @@ int spi_setup(struct spi_device *spi)
if (!spi->max_speed_hz)
spi->max_speed_hz = spi->controller->max_speed_hz;
 
+   mutex_lock(>controller->io_mutex);
+
if (spi->controller->setup)
status = spi->controller->setup(spi);
 
if (spi->controller->

Re: [RFC PATCH] spi: Take the SPI IO-mutex in the spi_setup() method

[Serge Semin]

On Tue, Nov 17, 2020 at 12:56:44PM +0200, Andy Shevchenko wrote:
> On Tue, Nov 17, 2020 at 11:45 AM Serge Semin
>  wrote:
> >
> > I've discovered that due to the recent commit 49d7d695ca4b ("spi: dw:
> > Explicitly de-assert CS on SPI transfer completion") a concurrent usage of
> > the spidev devices with different chip-selects causes the "SPI transfer
> > timed out" error.
> 
> I'll read this later...
> 
> > +   mutex_lock(>controller->io_mutex);
> > +
> > if (spi->controller->setup)
> > status = spi->controller->setup(spi);
> >
> > if (spi->controller->auto_runtime_pm && spi->controller->set_cs) {
> > status = pm_runtime_get_sync(spi->controller->dev.parent);
> 

> I didn't check what this lock is protecting,

It is used to protect the SPI io operations. So it's locked only
during the SPI memory operations and the SPI-message execution. That's
the time when the core toggles the controller chip-selects by calling
the spi_set_cs() method and the set_cs callback.

> but have you checked all
> PM runtime callbacks if they are not taking the lock. When you call PM
> runtime functions with 'sync' it may include a lot of work, some of
> which may sleep (not a problem for mutex) and may take arbitrary locks
> (might be a deadlock in case of trying the same lock).

Yeah, I understand that. Simple grepping hasn't showed anyone else but
the SPI-core using it. So unless the controllers PM methods also call
spi_setup() or request SPI-transfers, there shouldn't be a deadlock.
Moreover as I can see from the __spi_pump_messages() method the
IO-mutex is locked during the sync-suffixed PM-methods invocation.
AFAICS locking io_mutex around the PM-methods here shouldn't cause
problems. But of course testing it in various platforms/controllers is
always welcome.

-Sergey

> 
> > if (status < 0) {
> > +   mutex_unlock(>controller->io_mutex);
> > pm_runtime_put_noidle(spi->controller->dev.parent);
> > dev_err(>controller->dev, "Failed to power 
> > device: %d\n",
> > status);
> > @@ -3354,6 +3357,8 @@ int spi_setup(struct spi_device *spi)
> > spi_set_cs(spi, false);
> > }
> >
> > +   mutex_unlock(>controller->io_mutex);
> > +
> 
> 
> -- 
> With Best Regards,
> Andy Shevchenko

[PATCH v5 00/19] dt-bindings: usb: Add generic USB HCD, xHCI, DWC USB3 DT schema

[Serge Semin]

gs
  with respect to the original binding file.
- Discard duplicated "additionalProperties" from the usb-hcd.yaml schema.
- Make sure dr_mode exist in DW USB3 node to apply the USB-gadget-only schema.
- Add a new patch:
  [PATCH v5 19/19] dt-bindings: usb: intel,keembay-dwc3: Validate DWC3 sub-node
  since the Intel Keem Bay DWC3 bindings has been just added.

Signed-off-by: Serge Semin 
Cc: Alexey Malahov 
Cc: Pavel Parkhomenko 
Cc: Andy Gross 
Cc: Bjorn Andersson 
Cc: Manu Gautam 
Cc: Roger Quadros 
Cc: Lad Prabhakar 
Cc: Yoshihiro Shimoda 
Cc: Neil Armstrong 
Cc: Kevin Hilman 
Cc: Martin Blumenstingl 
Cc: Ahmad Zainie 
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-snps-...@lists.infradead.org
Cc: linux-m...@vger.kernel.org
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (19):
  dt-bindings: usb: usb-hcd: Detach generic USB controller properties
  dt-bindings: usb: Convert generic USB properties to DT schemas
  dt-bindings: usb: usb-drd: Add "otg-rev" property constraints
  dt-bindings: usb: Add "ulpi/serial/hsic" PHY types
  dt-bindings: usb: usb-hcd: Add "tpl-support" property
  dt-bindings: usb: Add generic "usb-phy" property
  dt-bindings: usb: Convert xHCI bindings to DT schema
  dt-bindings: usb: xhci: Add Broadcom STB v2 compatible device
  dt-bindings: usb: renesas-xhci: Refer to the usb-xhci.yaml file
  dt-bindings: usb: Convert DWC USB3 bindings to DT schema
  dt-bindings: usb: dwc3: Add interrupt-names property support
  dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string
  dt-bindings: usb: dwc3: Add Tx De-emphasis constraints
  dt-bindings: usb: dwc3: Add Frame Length Adj constraints
  dt-bindings: usb: meson-g12a-usb: Fix FL-adj property value
  dt-bindings: usb: meson-g12a-usb: Validate DWC2/DWC3 sub-nodes
  dt-bindings: usb: keystone-dwc3: Validate DWC3 sub-node
  dt-bindings: usb: qcom,dwc3: Validate DWC3 sub-node
  dt-bindings: usb: intel,keembay-dwc3: Validate DWC3 sub-node

 .../usb/amlogic,meson-g12a-usb-ctrl.yaml  |   6 +-
 .../devicetree/bindings/usb/dwc3.txt  | 128 ---
 .../devicetree/bindings/usb/generic-xhci.yaml |  65 
 .../devicetree/bindings/usb/generic.txt   |  57 ---
 .../bindings/usb/intel,keembay-dwc3.yaml  |   9 +-
 .../devicetree/bindings/usb/qcom,dwc3.yaml|   9 +-
 .../bindings/usb/renesas,usb-xhci.yaml|   4 +-
 .../devicetree/bindings/usb/snps,dwc3.yaml| 332 ++
 .../bindings/usb/ti,keystone-dwc3.yaml|   4 +-
 .../devicetree/bindings/usb/usb-drd.yaml  |  78 
 .../devicetree/bindings/usb/usb-hcd.yaml  |  19 +-
 .../devicetree/bindings/usb/usb-xhci.txt  |  41 ---
 .../devicetree/bindings/usb/usb-xhci.yaml |  42 +++
 .../devicetree/bindings/usb/usb.yaml  |  60 
 14 files changed, 600 insertions(+), 254 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/dwc3.txt
 create mode 100644 Documentation/devicetree/bindings/usb/generic-xhci.yaml
 delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
 create mode 100644 Documentation/devicetree/bindings/usb/snps,dwc3.yaml
 create mode 100644 Documentation/devicetree/bindings/usb/usb-drd.yaml
 delete mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.txt
 create mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.yaml
 create mode 100644 Documentation/devicetree/bindings/usb/usb.yaml

-- 
2.29.2

[PATCH v5 03/19] dt-bindings: usb: usb-drd: Add "otg-rev" property constraints

[Serge Semin]

There are only four OTG revisions are currently supported by the kernel:
0x0100, 0x0120, 0x0130, 0x0200. Any another value is considered as
invalid.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v4:
- Move the constraints to the usb-drd.yaml schema where the otg-rev
  property is now defined.
---
 Documentation/devicetree/bindings/usb/usb-drd.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/usb/usb-drd.yaml 
b/Documentation/devicetree/bindings/usb/usb-drd.yaml
index f3a64c46dcd0..f229fc8068d9 100644
--- a/Documentation/devicetree/bindings/usb/usb-drd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-drd.yaml
@@ -18,6 +18,7 @@ properties:
   features (HNP/SRP/ADP) is enabled. If ADP is required, otg-rev should be
   0x0200 or above.
 $ref: /schemas/types.yaml#/definitions/uint32
+enum: [0x0100, 0x0120, 0x0130, 0x0200]
 
   dr_mode:
 description:
-- 
2.29.2

[PATCH v5 01/19] dt-bindings: usb: usb-hcd: Detach generic USB controller properties

[Serge Semin]

There can be three distinctive types of the USB controllers: USB hosts,
USB peripherals/gadgets and USB OTG, which can switch from one role to
another. In order to have that hierarchy handled in the DT binding files,
we need to collect common properties in a common DT schema and specific
properties in dedicated schemas. Seeing the usb-hcd.yaml DT schema is
dedicated for the USB host controllers only, let's move some common
properties from there into the usb.yaml schema. So the later would be
available to evaluate all currently supported types of the USB
controllers.

While at it add an explicit "additionalProperties: true" into the
usb-hcd.yaml as setting the additionalProperties/unevaluateProperties
properties is going to be get mandatory soon.

Signed-off-by: Serge Semin 

---

Changelog v4:
- This is a new patch created as a result of the comment left
  by Chunfeng Yun in v3

Changelog v5:
- Discard duplicated additionalProperties property definition.
---
 .../devicetree/bindings/usb/usb-hcd.yaml  | 14 ++---
 .../devicetree/bindings/usb/usb.yaml  | 29 +++
 2 files changed, 31 insertions(+), 12 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/usb.yaml

diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml 
b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
index b545b087b342..81f3ad1419d8 100644
--- a/Documentation/devicetree/bindings/usb/usb-hcd.yaml
+++ b/Documentation/devicetree/bindings/usb/usb-hcd.yaml
@@ -9,18 +9,8 @@ title: Generic USB Host Controller Device Tree Bindings
 maintainers:
   - Greg Kroah-Hartman 
 
-properties:
-  $nodename:
-pattern: "^usb(@.*)?"
-
-  phys:
-$ref: /schemas/types.yaml#/definitions/phandle-array
-description:
-  List of all the USB PHYs on this HCD
-
-  phy-names:
-description:
-  Name specifier for the USB PHY
+allOf:
+  - $ref: usb.yaml#
 
 additionalProperties: true
 
diff --git a/Documentation/devicetree/bindings/usb/usb.yaml 
b/Documentation/devicetree/bindings/usb/usb.yaml
new file mode 100644
index ..941ad59fbac5
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/usb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic USB Controller Device Tree Bindings
+
+maintainers:
+  - Greg Kroah-Hartman 
+
+select: false
+
+properties:
+  $nodename:
+pattern: "^usb(@.*)?"
+
+  phys:
+$ref: /schemas/types.yaml#/definitions/phandle-array
+description:
+  List of all the USB PHYs on this HCD
+
+  phy-names:
+description:
+  Name specifier for the USB PHY
+
+additionalProperties: true
+
+...
-- 
2.29.2

[PATCH v5 02/19] dt-bindings: usb: Convert generic USB properties to DT schemas

[Serge Semin]

The generic USB properties have been described in the legacy bindings
text file: Documentation/devicetree/bindings/usb/generic.txt . Let's
convert its content into the generic USB, USB HCD and USB DRD DT
schemas. So the Generic USB schema will be applicable to all USB
controllers, USB HCD - for the generic USB Host controllers and the USB
DRD - for the USB Dual-role controllers.

Note the USB DRD schema is supposed to work in conjunction with
the USB peripheral/gadget and USB host controllers DT schemas.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Discard '|' in all the new properties, since we don't need to preserve
  the text formatting.
- Convert abbreviated form of the "maximum-speed" enum restriction into
  the multi-lined version of the list.
- Drop quotes from around the string constants.

Changelog v4:
- Redistribute the properties between generic ones, USB HCD-specific and
  USB DRD-specific.
- Discard the Rob'es Reviewed-by tag. Please review the patch one more time.
---
 .../devicetree/bindings/usb/generic.txt   | 57 --
 .../devicetree/bindings/usb/usb-drd.yaml  | 77 +++
 .../devicetree/bindings/usb/usb-hcd.yaml  |  5 ++
 .../devicetree/bindings/usb/usb.yaml  | 22 ++
 4 files changed, 104 insertions(+), 57 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/generic.txt
 create mode 100644 Documentation/devicetree/bindings/usb/usb-drd.yaml

diff --git a/Documentation/devicetree/bindings/usb/generic.txt 
b/Documentation/devicetree/bindings/usb/generic.txt
deleted file mode 100644
index ba472e7aefc9..
--- a/Documentation/devicetree/bindings/usb/generic.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-Generic USB Properties
-
-Optional properties:
- - maximum-speed: tells USB controllers we want to work up to a certain
-   speed. Valid arguments are "super-speed-plus",
-   "super-speed", "high-speed", "full-speed" and
-   "low-speed". In case this isn't passed via DT, USB
-   controllers should default to their maximum HW
-   capability.
- - dr_mode: tells Dual-Role USB controllers that we want to work on a
-   particular mode. Valid arguments are "host",
-   "peripheral" and "otg". In case this attribute isn't
-   passed via DT, USB DRD controllers should default to
-   OTG.
- - phy_type: tells USB controllers that we want to configure the core to 
support
-   a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
-   selected. Valid arguments are "utmi" and "utmi_wide".
-   In case this isn't passed via DT, USB controllers should
-   default to HW capability.
- - otg-rev: tells usb driver the release number of the OTG and EH supplement
-   with which the device and its descriptors are compliant,
-   in binary-coded decimal (i.e. 2.0 is 0200H). This
-   property is used if any real OTG features(HNP/SRP/ADP)
-   is enabled, if ADP is required, otg-rev should be
-   0x0200 or above.
- - companion: phandle of a companion
- - hnp-disable: tells OTG controllers we want to disable OTG HNP, normally HNP
-   is the basic function of real OTG except you want it
-   to be a srp-capable only B device.
- - srp-disable: tells OTG controllers we want to disable OTG SRP, SRP is
-   optional for OTG device.
- - adp-disable: tells OTG controllers we want to disable OTG ADP, ADP is
-   optional for OTG device.
- - usb-role-switch: boolean, indicates that the device is capable of assigning
-   the USB data role (USB host or USB device) for a given
-   USB connector, such as Type-C, Type-B(micro).
-   see connector/usb-connector.yaml.
- - role-switch-default-mode: indicating if usb-role-switch is enabled, the
-   device default operation mode of controller while usb
-   role is USB_ROLE_NONE. Valid arguments are "host" and
-   "peripheral". Defaults to "peripheral" if not
-   specified.
-
-
-This is an attribute to a USB controller such as:
-
-dwc3@4a03 {
-   compatible = "synopsys,dwc3";
-   reg = <0x4a03 0xcfff>;
-   interrupts = <0 92 4>
-   usb-phy = <_phy>, <,phy>;
-   maximum-speed = "super-speed";
-   dr_mode = "otg";
-   phy_type = "utmi_wide";
-   otg-rev = <0x0200>;
-   adp-disable;

[PATCH v5 10/19] dt-bindings: usb: Convert DWC USB3 bindings to DT schema

[Serge Semin]

DWC USB3 DT node is supposed to be compliant with the Generic xHCI
Controller schema, but with additional vendor-specific properties, the
controller-specific reference clocks and PHYs. So let's convert the
currently available legacy text-based DWC USB3 bindings to the DT schema
and make sure the DWC USB3 nodes are also validated against the
usb-xhci.yaml schema.

Note 1. we have to discard the nodename restriction of being prefixed with
"dwc3@" string, since in accordance with the usb-hcd.yaml schema USB nodes
are supposed to be named as "^usb(@.*)".

Note 2. The clock-related properties are marked as optional to match the
DWC USB3 driver expectation and to improve the bindings mainainability
so in case if there is a glue-node it would the responsible for the
clocks initialization.

Signed-off-by: Serge Semin 

---

Changelog v2:
- Discard '|' from the descriptions, since we don't need to preserve
  the text formatting in any of them.
- Drop quotes from around the string constants.
- Fix the "clock-names" prop description to be referring the enumerated
  clock-names instead of the ones from the Databook.

Changelog v3:
- Apply usb-xhci.yaml# schema only if the controller is supposed to work
  as either host or otg.

Changelog v4:
- Apply usb-drd.yaml schema first. If the controller is configured
  to work in a gadget mode only, then apply the usb.yaml schema too,
  otherwise apply the usb-xhci.yaml schema.
- Discard the Rob'es Reviewed-by tag. Please review the patch one more
  time.

Changelog v5:
- Add "snps,dis-split-quirk" property to the DWC USB3 DT schema.
- Add a commit log text about the clock-related property changes.
- Make sure dr_mode exist to apply the USB-gadget-only schema.
---
 .../devicetree/bindings/usb/dwc3.txt  | 128 ---
 .../devicetree/bindings/usb/snps,dwc3.yaml| 312 ++
 2 files changed, 312 insertions(+), 128 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/usb/dwc3.txt
 create mode 100644 Documentation/devicetree/bindings/usb/snps,dwc3.yaml

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt 
b/Documentation/devicetree/bindings/usb/dwc3.txt
deleted file mode 100644
index 1aae2b6160c1..
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ /dev/null
@@ -1,128 +0,0 @@
-synopsys DWC3 CORE
-
-DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
-  as described in 'usb/generic.txt'
-
-Required properties:
- - compatible: must be "snps,dwc3"
- - reg : Address and length of the register set for the device
- - interrupts: Interrupts used by the dwc3 controller.
- - clock-names: list of clock names. Ideally should be "ref",
-"bus_early", "suspend" but may be less or more.
- - clocks: list of phandle and clock specifier pairs corresponding to
-   entries in the clock-names property.
-
-Exception for clocks:
-  clocks are optional if the parent node (i.e. glue-layer) is compatible to
-  one of the following:
-"cavium,octeon-7130-usb-uctl"
-"qcom,dwc3"
-"samsung,exynos5250-dwusb3"
-"samsung,exynos5433-dwusb3"
-"samsung,exynos7-dwusb3"
-"sprd,sc9860-dwc3"
-"st,stih407-dwc3"
-"ti,am437x-dwc3"
-"ti,dwc3"
-"ti,keystone-dwc3"
-"rockchip,rk3399-dwc3"
-"xlnx,zynqmp-dwc3"
-
-Optional properties:
- - usb-phy : array of phandle for the PHY device.  The first element
-   in the array is expected to be a handle to the USB2/HS PHY and
-   the second element is expected to be a handle to the USB3/SS PHY
- - phys: from the *Generic PHY* bindings
- - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy"
-   or "usb3-phy".
- - resets: set of phandle and reset specifier pairs
- - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
- - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
- - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command
-   failure SW work-around for DWC_usb31 version 1.70a-ea06
-   and prior.
- - snps,disable_scramble_quirk: true when SW should disable data scrambling.
-   Only really useful for FPGA builds.
- - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
- - snps,lpm-nyet-threshold: LPM NYET threshold
- - snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk
- - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
- - snps,req_p1p2p3_quirk: when set, the core will always request for
-   P1/P2/P3 transition sequence.
- - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
-   amount of 8B10B errors occur.
- - snps,del_phy_power_chg_quirk: when set core wil

[PATCH v3 05/10] powerpc: dts: akebono: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/powerpc/boot/dts/akebono.dts | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/boot/dts/akebono.dts 
b/arch/powerpc/boot/dts/akebono.dts
index df18f8dc4642..343326c30380 100644
--- a/arch/powerpc/boot/dts/akebono.dts
+++ b/arch/powerpc/boot/dts/akebono.dts
@@ -126,7 +126,7 @@ SATA0: sata@301 {
interrupts = <93 2>;
};
 
-   EHCI0: ehci@3001000 {
+   EHCI0: usb@3001000 {
compatible = "ibm,476gtr-ehci", "generic-ehci";
reg = <0x300 0x1000 0x0 0x1>;
interrupt-parent = <>;
@@ -140,14 +140,14 @@ SD0: sd@300 {
interrupt-parent = <>;
};
 
-   OHCI0: ohci@3001001 {
+   OHCI0: usb@3001001 {
compatible = "ibm,476gtr-ohci", "generic-ohci";
reg = <0x300 0x1001 0x0 0x1>;
interrupt-parent = <>;
interrupts = <89 1>;
};
 
-   OHCI1: ohci@3001002 {
+   OHCI1: usb@3001002 {
compatible = "ibm,476gtr-ohci", "generic-ohci";
reg = <0x300 0x1002 0x0 0x1>;
interrupt-parent = <>;
-- 
2.29.2

[PATCH v5 17/19] dt-bindings: usb: keystone-dwc3: Validate DWC3 sub-node

[Serge Semin]

TI Keystone DWC3 compatible DT node is supposed to have a DWC USB3
compatible sub-node to describe a fully functioning USB interface.
Since DWC USB3 has now got a DT schema describing its DT node, let's make
sure the TI Keystone DWC3 sub-node passes validation against it.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/it'/its"
---
 Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml 
b/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
index c1b19fc5d0a2..ca7fbe3ed22e 100644
--- a/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
@@ -64,9 +64,7 @@ properties:
 
 patternProperties:
   "usb@[a-f0-9]+$":
-type: object
-description: This is the node representing the DWC3 controller instance
-  Documentation/devicetree/bindings/usb/dwc3.txt
+$ref: snps,dwc3.yaml#
 
 required:
   - compatible
-- 
2.29.2

[PATCH v3 04/10] arm: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Vladimir Zapolskiy 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/lpc18xx.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index 10b8249b8ab6..82ffd7b0ad8a 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -121,7 +121,7 @@ mmcsd: mmcsd@40004000 {
status = "disabled";
};
 
-   usb0: ehci@40006100 {
+   usb0: usb@40006100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40006100 0x100>;
interrupts = <8>;
@@ -133,7 +133,7 @@ usb0: ehci@40006100 {
status = "disabled";
};
 
-   usb1: ehci@40007100 {
+   usb1: usb@40007100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40007100 0x100>;
interrupts = <9>;
-- 
2.29.2

[PATCH v3 07/10] arm: dts: stih407-family: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/stih407-family.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stih407-family.dtsi 
b/arch/arm/boot/dts/stih407-family.dtsi
index 23a1746f3baa..2352f76b5a69 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -681,7 +681,7 @@ st_dwc3: dwc3@8f94000 {
 
status = "disabled";
 
-   dwc3: dwc3@990 {
+   dwc3: usb@990 {
compatible  = "snps,dwc3";
reg = <0x0990 0x10>;
interrupts  = ;
-- 
2.29.2

[PATCH v3 03/10] arc: dts: Harmonize EHCI/OHCI DT nodes name

[Serge Semin]

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin 
Acked-by: Alexey Brodkin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arc/boot/dts/axc003.dtsi| 4 ++--
 arch/arc/boot/dts/axc003_idu.dtsi| 4 ++--
 arch/arc/boot/dts/axs10x_mb.dtsi | 4 ++--
 arch/arc/boot/dts/hsdk.dts   | 4 ++--
 arch/arc/boot/dts/vdk_axs10x_mb.dtsi | 2 +-
 5 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index cd1edcf4f95e..3434c8131ecd 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -103,11 +103,11 @@ ethernet@18000 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
dma-coherent;
};
 
-   ohci@6 {
+   usb@6 {
dma-coherent;
};
 
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi 
b/arch/arc/boot/dts/axc003_idu.dtsi
index 70779386ca79..67556f4b7057 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -110,11 +110,11 @@ ethernet@18000 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
dma-coherent;
};
 
-   ohci@6 {
+   usb@6 {
dma-coherent;
};
 
diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi
index 99d3e7175bf7..b64435385304 100644
--- a/arch/arc/boot/dts/axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/axs10x_mb.dtsi
@@ -87,13 +87,13 @@ gmac: ethernet@18000 {
mac-address = [00 00 00 00 00 00]; /* Filled in by 
U-Boot */
};
 
-   ehci@4 {
+   usb@4 {
compatible = "generic-ehci";
reg = < 0x4 0x100 >;
interrupts = < 8 >;
};
 
-   ohci@6 {
+   usb@6 {
compatible = "generic-ohci";
reg = < 0x6 0x100 >;
interrupts = < 8 >;
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index dcaa44e408ac..fdd4f7f635d3 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -234,7 +234,7 @@ phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
};
};
 
-   ohci@6 {
+   usb@6 {
compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
reg = <0x6 0x100>;
interrupts = <15>;
@@ -242,7 +242,7 @@ ohci@6 {
dma-coherent;
};
 
-   ehci@4 {
+   usb@4 {
compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
reg = <0x4 0x100>;
interrupts = <15>;
diff --git a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi 
b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
index cbb179770293..90a412026e64 100644
--- a/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
+++ b/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
@@ -46,7 +46,7 @@ ethernet@18000 {
clock-names = "stmmaceth";
};
 
-   ehci@4 {
+   usb@4 {
compatible = "generic-ehci";
reg = < 0x4 0x100 >;
interrupts = < 8 >;
-- 
2.29.2

[PATCH v5 18/19] dt-bindings: usb: qcom,dwc3: Validate DWC3 sub-node

[Serge Semin]

Qualcomm msm8996/sc7180/sdm845 DWC3 compatible DT nodes are supposed to
have a DWC USB3 compatible sub-node to describe a fully functioning USB
interface. Let's use the available DWC USB3 DT schema to validate the
Qualcomm DWC3 sub-nodes.

Note since the generic DWC USB3 DT node is supposed to be named as generic
USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name
regexp and fix the DT node example.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Discard the "^dwc3@[0-9a-f]+$" nodes from being acceptable as sub-nodes.
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index 2cf525d21e05..b336662e838c 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -103,11 +103,8 @@ properties:
 # Required child node:
 
 patternProperties:
-  "^dwc3@[0-9a-f]+$":
-type: object
-description:
-  A child node must exist to represent the core DWC3 IP block
-  The content of the node is defined in dwc3.txt.
+  "^usb@[0-9a-f]+$":
+$ref: snps,dwc3.yaml#
 
 required:
   - compatible
@@ -162,7 +159,7 @@ examples:
 
 resets = < GCC_USB30_PRIM_BCR>;
 
-dwc3@a60 {
+usb@a60 {
 compatible = "snps,dwc3";
 reg = <0 0x0a60 0 0xcd00>;
 interrupts = ;
-- 
2.29.2

[PATCH v5 15/19] dt-bindings: usb: meson-g12a-usb: Fix FL-adj property value

[Serge Semin]

An empty snps,quirk-frame-length-adjustment won't cause any change
performed by the driver. Moreover the DT schema validation will fail,
since it expects the property being assigned with some value. So set
fix the example by setting a valid FL-adj value in accordance with
Neil Armstrong comment.

Link: 
https://lore.kernel.org/linux-usb/20201010224121.12672-16-sergey.se...@baikalelectronics.ru/
Signed-off-by: Serge Semin 
Acked-by: Neil Armstrong 
Reviewed-by: Rob Herring 
Reviewed-by: Martin Blumenstingl 

---

Note the same problem is in the DT source file
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi .
---
 .../devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml| 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml 
b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index c0058332b967..1eda16dd4ee0 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -229,6 +229,6 @@ examples:
   interrupts = <30>;
   dr_mode = "host";
   snps,dis_u2_susphy_quirk;
-  snps,quirk-frame-length-adjustment;
+  snps,quirk-frame-length-adjustment = <0x20>;
   };
 };
-- 
2.29.2

[PATCH v5 07/19] dt-bindings: usb: Convert xHCI bindings to DT schema

[Serge Semin]

Currently the DT bindings of Generic xHCI Controllers are described by
means of the legacy text file. Since such format is deprecated in favor of
the DT schema, let's convert the Generic xHCI Controllers bindings file to
the corresponding yaml files. There will be two of them: a DT schema for
the xHCI controllers on a generic platform and a DT schema validating a
generic xHCI controllers properties. The later will be used to validate
the xHCI controllers, which aside from some vendor-specific features
support the basic xHCI functionality.

An xHCI-compatible DT node shall support the standard USB HCD properties
and custom ones like: usb2-lpm-disable, usb3-lpm-capable,
quirk-broken-port-ped and imod-interval-ns. In addition if a generic xHCI
controller is being validated against the DT schema it is also supposed to
be equipped with mandatory compatible string, single registers range,
single interrupts source, and is supposed to optionally contain up to two
reference clocks for the controller core and CSRs.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Add explicit "additionalProperties: true" to the usb-xhci.yaml schema,
  since additionalProperties/unevaluatedProperties are going to be mandary
  for each binding.
---
 .../devicetree/bindings/usb/generic-xhci.yaml | 63 +++
 .../devicetree/bindings/usb/usb-xhci.txt  | 41 
 .../devicetree/bindings/usb/usb-xhci.yaml | 42 +
 3 files changed, 105 insertions(+), 41 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/generic-xhci.yaml
 delete mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.txt
 create mode 100644 Documentation/devicetree/bindings/usb/usb-xhci.yaml

diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml 
b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
new file mode 100644
index ..1ea1d49a8175
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: USB xHCI Controller Device Tree Bindings
+
+maintainers:
+  - Mathias Nyman 
+
+allOf:
+  - $ref: "usb-xhci.yaml#"
+
+properties:
+  compatible:
+oneOf:
+  - description: Generic xHCI device
+const: generic-xhci
+  - description: Armada 37xx/375/38x/8k SoCs
+items:
+  - enum:
+  - marvell,armada3700-xhci
+  - marvell,armada-375-xhci
+  - marvell,armada-380-xhci
+  - marvell,armada-8k-xhci
+  - const: generic-xhci
+  - description: Broadcom STB SoCs with xHCI
+const: brcm,bcm7445-xhci
+  - description: Generic xHCI device
+const: xhci-platform
+deprecated: true
+
+  reg:
+maxItems: 1
+
+  interrupts:
+maxItems: 1
+
+  clocks:
+minItems: 1
+maxItems: 2
+
+  clock-names:
+minItems: 1
+items:
+  - const: core
+  - const: reg
+
+unevaluatedProperties: false
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+examples:
+  - |
+usb@f0931000 {
+  compatible = "generic-xhci";
+  reg = <0xf0931000 0x8c8>;
+  interrupts = <0x0 0x4e 0x0>;
+};
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt 
b/Documentation/devicetree/bindings/usb/usb-xhci.txt
deleted file mode 100644
index 0c5cff84a969..
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ /dev/null
@@ -1,41 +0,0 @@
-USB xHCI controllers
-
-Required properties:
-  - compatible: should be one or more of
-
-- "generic-xhci" for generic XHCI device
-- "marvell,armada3700-xhci" for Armada 37xx SoCs
-- "marvell,armada-375-xhci" for Armada 375 SoCs
-- "marvell,armada-380-xhci" for Armada 38x SoCs
-- "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
-- "xhci-platform" (deprecated)
-
-When compatible with the generic version, nodes must list the
-SoC-specific version corresponding to the platform first
-followed by the generic version.
-
-  - reg: should contain address and length of the standard XHCI
-register set for the device.
-  - interrupts: one XHCI interrupt should be described here.
-
-Optional properties:
-  - clocks: reference to the clocks
-  - clock-names: mandatory if there is a second clock, in this case
-the name must be "core" for the first clock and "reg" for the
-second one
-  - usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM
-  - usb3-lpm-capable: determines if platform is USB3 LPM capable
-  - quirk-broken-port-ped: set if the controller has broken port disable 
mechanism
-  - imod-interval-ns: default interrupt moderation interval is 5000ns
-  - phys : see usb-hcd.yaml in the current directory
-
-a

[PATCH RESEND v3 00/10] dt-bindings: usb: Harmonize xHCI/EHCI/OHCI/DWC3 nodes name

[Serge Semin]

ply.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-m...@vger.kernel.org
Cc: linux-media...@lists.infradead.org
Cc: linuxppc-...@lists.ozlabs.org
Cc: linux-samsung-...@vger.kernel.org
Cc: linux-o...@vger.kernel.org
Cc: linux-arm-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (10):
  arm: dts: keystone: Correct DWC USB3 compatible string
  arm64: dts: amlogic: meson-g12: Set FL-adj property value
  arc: dts: Harmonize EHCI/OHCI DT nodes name
  arm: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name
  powerpc: dts: akebono: Harmonize EHCI/OHCI DT nodes name
  arm: dts: keystone: Harmonize DWC USB3 DT nodes name
  arm: dts: stih407-family: Harmonize DWC USB3 DT nodes name
  arm64: dts: apm: Harmonize DWC USB3 DT nodes name
  usb: dwc3: qcom: Detect DWC3 DT-nodes with "usb"-prefixed names
  arm64: dts: qcom: Harmonize DWC USB3 DT nodes name

 arch/arc/boot/dts/axc003.dtsi | 4 ++--
 arch/arc/boot/dts/axc003_idu.dtsi | 4 ++--
 arch/arc/boot/dts/axs10x_mb.dtsi  | 4 ++--
 arch/arc/boot/dts/hsdk.dts| 4 ++--
 arch/arc/boot/dts/vdk_axs10x_mb.dtsi  | 2 +-
 arch/arm/boot/dts/keystone-k2e.dtsi   | 6 +++---
 arch/arm/boot/dts/keystone.dtsi   | 4 ++--
 arch/arm/boot/dts/lpc18xx.dtsi| 4 ++--
 arch/arm/boot/dts/stih407-family.dtsi | 2 +-
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 +-
 arch/arm64/boot/dts/apm/apm-shadowcat.dtsi| 4 ++--
 arch/arm64/boot/dts/apm/apm-storm.dtsi| 6 +++---
 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi  | 4 ++--
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/qcs404-evb.dtsi  | 2 +-
 arch/arm64/boot/dts/qcom/qcs404.dtsi  | 4 ++--
 arch/arm64/boot/dts/qcom/sc7180.dtsi  | 2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi  | 4 ++--
 arch/arm64/boot/dts/qcom/sm8150.dtsi  | 2 +-
 arch/powerpc/boot/dts/akebono.dts | 6 +++---
 drivers/usb/dwc3/dwc3-qcom.c  | 3 ++-
 23 files changed, 42 insertions(+), 41 deletions(-)

-- 
2.29.2

[PATCH v3 10/10] arm64: dts: qcom: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
Reviewed-by: Bjorn Andersson 
---
 arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/ipq8074.dtsi| 4 ++--
 arch/arm64/boot/dts/qcom/msm8996.dtsi| 4 ++--
 arch/arm64/boot/dts/qcom/msm8998.dtsi| 2 +-
 arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
 9 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi 
b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
index defcbd15edf9..34e97da98270 100644
--- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
@@ -1064,7 +1064,7 @@  {
status = "okay";
extcon = <_id>;
 
-   dwc3@760 {
+   usb@760 {
extcon = <_id>;
dr_mode = "otg";
maximum-speed = "high-speed";
@@ -1075,7 +1075,7 @@  {
status = "okay";
extcon = <_id>;
 
-   dwc3@6a0 {
+   usb@6a0 {
extcon = <_id>;
dr_mode = "otg";
};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi 
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 829e37ac82f6..984e855bd8fd 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -427,7 +427,7 @@ usb_0: usb@8af8800 {
resets = < GCC_USB0_BCR>;
status = "disabled";
 
-   dwc_0: dwc3@8a0 {
+   dwc_0: usb@8a0 {
compatible = "snps,dwc3";
reg = <0x8a0 0xcd00>;
interrupts = ;
@@ -468,7 +468,7 @@ usb_1: usb@8cf8800 {
resets = < GCC_USB1_BCR>;
status = "disabled";
 
-   dwc_1: dwc3@8c0 {
+   dwc_1: usb@8c0 {
compatible = "snps,dwc3";
reg = <0x8c0 0xcd00>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index fd6ae5464dea..4b073b8584de 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1768,7 +1768,7 @@ usb3: usb@6af8800 {
power-domains = < USB30_GDSC>;
status = "disabled";
 
-   dwc3@6a0 {
+   usb@6a0 {
compatible = "snps,dwc3";
reg = <0x06a0 0xcc00>;
interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
@@ -1979,7 +1979,7 @@ usb2: usb@76f8800 {
power-domains = < USB30_GDSC>;
status = "disabled";
 
-   dwc3@760 {
+   usb@760 {
compatible = "snps,dwc3";
reg = <0x0760 0xcc00>;
interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi 
b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c45870600909..7cc7897e7b83 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -1678,7 +1678,7 @@ usb3: usb@a8f8800 {
 
resets = < GCC_USB_30_BCR>;
 
-   usb3_dwc3: dwc3@a80 {
+   usb3_dwc3: usb@a80 {
compatible = "snps,dwc3";
reg = <0x0a80 0xcd00>;
interrupts = ;
diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi 
b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
index a80c578484ba..f8a55307b855 100644
--- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
@@ -337,7 +337,7 @@ _phy_sec {
  {
status = "okay";
 
-   dwc3@758 {
+   usb@758 {
dr_mode = "host";
};
 };
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi 
b/arch/arm64/boot/dts/qcom/qcs404.dtsi
inde

[PATCH v3 06/10] arm: dts: keystone: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm/boot/dts/keystone-k2e.dtsi | 4 ++--
 arch/arm/boot/dts/keystone.dtsi | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi 
b/arch/arm/boot/dts/keystone-k2e.dtsi
index fa1b8499c5a7..b8f152e7af7f 100644
--- a/arch/arm/boot/dts/keystone-k2e.dtsi
+++ b/arch/arm/boot/dts/keystone-k2e.dtsi
@@ -52,7 +52,7 @@  {
 
usb: usb@268 {
interrupts = ;
-   dwc3@269 {
+   usb@269 {
interrupts = ;
};
};
@@ -78,7 +78,7 @@ keystone_usb1: usb@2500 {
dma-ranges;
status = "disabled";
 
-   usb1: dwc3@2501 {
+   usb1: usb@2501 {
compatible = "snps,dwc3";
reg = <0x2501 0x7>;
interrupts = ;
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index 8d046a1b690c..fc9fdc857ae8 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -217,7 +217,7 @@ keystone_usb0: usb@268 {
dma-ranges;
status = "disabled";
 
-   usb0: dwc3@269 {
+   usb0: usb@269 {
compatible = "snps,dwc3";
reg = <0x269 0x7>;
interrupts = ;
-- 
2.29.2

[PATCH v5 06/19] dt-bindings: usb: Add generic "usb-phy" property

[Serge Semin]

Even though the Generic PHY framework is the more preferable way of
setting the USB PHY up, there are still many dts-files and DT bindings
which rely on having the legacy "usb-phy" specified to attach particular
USB PHYs to USB cores. Let's have the "usb-phy" property described in
the generic USB HCD binding file so it would be validated against the
nodes in which it's specified. Mark the property as deprecated to
discourage the developers from using it.

Signed-off-by: Serge Semin 
Acked-by: Martin Blumenstingl 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Discard '|' from the property description, since we don't need to
  preserve the text formatting.

Changelog v4:
- Move the "usb-phy" property definition into the usb.yaml schema where
  all generic USB properties are now defined.
---
 Documentation/devicetree/bindings/usb/usb.yaml | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/usb.yaml 
b/Documentation/devicetree/bindings/usb/usb.yaml
index 6dc4821e63c3..5400893d693e 100644
--- a/Documentation/devicetree/bindings/usb/usb.yaml
+++ b/Documentation/devicetree/bindings/usb/usb.yaml
@@ -24,6 +24,13 @@ properties:
 description:
   Name specifier for the USB PHY
 
+  usb-phy:
+$ref: /schemas/types.yaml#/definitions/phandle-array
+description:
+  List of all the USB PHYs on this HCD to be accepted by the legacy USB
+  Physical Layer subsystem.
+deprecated: true
+
   phy_type:
 description:
   Tells USB controllers that we want to configure the core to support a
-- 
2.29.2

[PATCH v3 08/10] arm64: dts: apm: Harmonize DWC USB3 DT nodes name

[Serge Semin]

In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named despite of the warning comment about possible backward
compatibility issues.

Signed-off-by: Serge Semin 
Acked-by: Krzysztof Kozlowski 
---
 arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++--
 arch/arm64/boot/dts/apm/apm-storm.dtsi | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi 
b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
index a83c82c50e29..832dd85b00bd 100644
--- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -597,8 +597,8 @@ serial0: serial@1060 {
interrupts = <0x0 0x4c 0x4>;
};
 
-   /* Do not change dwusb name, coded for backward compatibility */
-   usb0: dwusb@1900 {
+   /* Node-name might need to be coded as dwusb for backward 
compatibility */
+   usb0: usb@1900 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1900 0x0 0x10>;
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi 
b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index 0f37e77f5459..1520a945b7f9 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -923,8 +923,8 @@ sata3: sata@1a80 {
phy-names = "sata-phy";
};
 
-   /* Do not change dwusb name, coded for backward compatibility */
-   usb0: dwusb@1900 {
+   /* Node-name might need to be coded as dwusb for backward 
compatibility */
+   usb0: usb@1900 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1900 0x0 0x10>;
@@ -933,7 +933,7 @@ usb0: dwusb@1900 {
dr_mode = "host";
};
 
-   usb1: dwusb@1980 {
+   usb1: usb@1980 {
status = "disabled";
compatible = "snps,dwc3";
reg =  <0x0 0x1980 0x0 0x10>;
-- 
2.29.2

[PATCH v5 16/19] dt-bindings: usb: meson-g12a-usb: Validate DWC2/DWC3 sub-nodes

[Serge Semin]

Amlogic G12A USB DT sub-nodes are supposed to be compatible with the
generic DWC USB2 and USB3 devices. Since now we've got DT schemas for
both of the later IP cores let's make sure that the Amlogic G12A USB
DT nodes are fully evaluated including the DWC sub-nodes.

Signed-off-by: Serge Semin 
Reviewed-by: Neil Armstrong 
Reviewed-by: Rob Herring 
Reviewed-by: Martin Blumenstingl 

---

Changelog v2:
- Use "oneOf: [dwc2.yaml#, snps,dwc3.yaml#]" instead of the bulky "if:
  properties: compatibe: ..." statement.
---
 .../devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml  | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git 
a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml 
b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index 1eda16dd4ee0..e349fa5de606 100644
--- a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -79,7 +79,9 @@ properties:
 
 patternProperties:
   "^usb@[0-9a-f]+$":
-type: object
+oneOf:
+  - $ref: dwc2.yaml#
+  - $ref: snps,dwc3.yaml#
 
 additionalProperties: false
 
-- 
2.29.2

[PATCH v5 14/19] dt-bindings: usb: dwc3: Add Frame Length Adj constraints

[Serge Semin]

In accordance with the IP core databook the
snps,quirk-frame-length-adjustment property can be set within [0, 0x3F].
Let's make sure the DT schema applies a correct constraints on the
property.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index e39ad899c92e..feb41f3e6b21 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -243,6 +243,8 @@ properties:
   length adjustment when the fladj_30mhz_sdbnd signal is invalid or
   incorrect.
 $ref: /schemas/types.yaml#/definitions/uint32
+minimum: 0
+maximum: 0x3f
 
   snps,rx-thr-num-pkt-prd:
 description:
-- 
2.29.2

[PATCH v3 09/10] usb: dwc3: qcom: Detect DWC3 DT-nodes with "usb"-prefixed names

[Serge Semin]

In accordance with the USB HCD/DRD schema all the USB controllers are
supposed to have DT-nodes named with prefix "^usb(@.*)?".  Since the
existing DT-nodes will be renamed in a subsequent patch let's first make
sure the DWC3 Qualcomm driver supports them and second falls back to the
deprecated naming so not to fail on the legacy DTS-files passed to the
newer kernels.

Signed-off-by: Serge Semin 
Reviewed-by: Bjorn Andersson 
---
 drivers/usb/dwc3/dwc3-qcom.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index c703d552bbcf..49ad8d507d37 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -630,7 +630,8 @@ static int dwc3_qcom_of_register_core(struct 
platform_device *pdev)
struct device   *dev = >dev;
int ret;
 
-   dwc3_np = of_get_child_by_name(np, "dwc3");
+   dwc3_np = of_get_child_by_name(np, "usb") ?:
+ of_get_child_by_name(np, "dwc3");
if (!dwc3_np) {
dev_err(dev, "failed to find dwc3 core child\n");
return -ENODEV;
-- 
2.29.2

[PATCH v5 19/19] dt-bindings: usb: intel,keembay-dwc3: Validate DWC3 sub-node

[Serge Semin]

Intel Keem Bay DWC3 compatible DT nodes are supposed to have a DWC USB3
compatible sub-node to describe a fully functioning USB interface. Let's
use the available DWC USB3 DT schema to validate the Qualcomm DWC3
sub-nodes.

Note since the generic DWC USB3 DT node is supposed to be named as generic
USB HCD ("^usb(@.*)?") one we have to accordingly fix the sub-nodes name
regexp and fix the DT node example.

Signed-off-by: Serge Semin 

---

Changelog v5:
- This is a new patch created for the new Intel Keem Bay bindings file,
  which has been added just recently.
---
 .../devicetree/bindings/usb/intel,keembay-dwc3.yaml  | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml 
b/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml
index dd32c10ce6c7..43b91ab62004 100644
--- a/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml
@@ -34,11 +34,8 @@ properties:
 # Required child node:
 
 patternProperties:
-  "^dwc3@[0-9a-f]+$":
-type: object
-description:
-  A child node must exist to represent the core DWC3 IP block.
-  The content of the node is defined in dwc3.txt.
+  "^usb@[0-9a-f]+$":
+$ref: snps,dwc3.yaml#
 
 required:
   - compatible
@@ -68,7 +65,7 @@ examples:
   #address-cells = <1>;
   #size-cells = <1>;
 
-  dwc3@3400 {
+  usb@3400 {
 compatible = "snps,dwc3";
 reg = <0x3400 0x1>;
 interrupts = ;
-- 
2.29.2

[PATCH v5 08/19] dt-bindings: usb: xhci: Add Broadcom STB v2 compatible device

[Serge Semin]

For some reason the "brcm,xhci-brcm-v2" compatible string has been missing
in the original bindings file. Add it to the Generic xHCI Controllers DT
schema since the controller driver expects it to be supported.

Signed-off-by: Serge Semin 
Acked-by: Florian Fainelli 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/usb/generic-xhci.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml 
b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
index 1ea1d49a8175..23d73df96ea3 100644
--- a/Documentation/devicetree/bindings/usb/generic-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-xhci.yaml
@@ -26,7 +26,9 @@ properties:
   - marvell,armada-8k-xhci
   - const: generic-xhci
   - description: Broadcom STB SoCs with xHCI
-const: brcm,bcm7445-xhci
+enum:
+  - brcm,xhci-brcm-v2
+  - brcm,bcm7445-xhci
   - description: Generic xHCI device
 const: xhci-platform
 deprecated: true
-- 
2.29.2

[PATCH RESEND v4 0/3] usb: dwc3: ulpi: Fix UPLI registers read/write ops

[Serge Semin]

Our Baikal-T1 SoC is equipped with DWC USB3 IP core as a USB2.0 bus
controller. In general the DWC USB3 driver is working well for it except
the ULPI-bus part. We've found out that the DWC USB3 ULPI-bus driver detected
PHY with VID:PID tuple as 0x:0x, which of course wasn't true since
it was supposed to be 0x0424:0x0006. After a short digging inside the
ulpi.c code and studying the DWC USB3 documentation, it has been
discovered that the ULPI bus IO ops didn't work quite correct. The
busy-loop had stopped waiting before the actual operation was finished. We
found out that the problem was caused by several bugs hidden in the DWC
USB3 ULPI-bus IO implementation.

First of all in accordance with the DWC USB3 databook [1] the ULPI IO
busy-loop is supposed to use the GUSB2PHYACCn.VStsDone flag as an
indication of the PHY vendor control access completion. Instead it polled
the GUSB2PHYACCn.VStsBsy flag, which as we discovered can be cleared a
bit before the VStsDone flag.

Secondly having the simple counter-based loop in the modern kernel is
really a weak design of the busy-looping pattern especially seeing the
ULPI operations delay can be easily estimated [2], since the bus clock is
fixed to 60MHz.

Finally the root cause of the denoted in the prologue problem was due to
the Suspend PHY DWC USB3 feature perception. The commit e0082698b689
("usb: dwc3: ulpi: conditionally resume ULPI PHY") introduced the Suspend
USB2.0 HS/FS/LS PHY regression as the Low-power consumption mode would be
disable after a first attempt to read/write from the ULPI PHY control
registers, and still didn't fix the problem it was originally intended for
since the very first attempt of the ULPI PHY control registers IO would
need much more time than the busy-loop provided. So instead of disabling
the Suspend USB2.0 HS/FS/LS PHY feature we suggest to just extend the
busy-loop delay in case if the GUSB2PHYCFGn.SusPHY flag set to 1. By doing
so we'll eliminate the regression and fix the false busy-loop timeout
problem.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

[2] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Link: 
https://lore.kernel.org/linux-usb/20201010222351.7323-1-sergey.se...@baikalelectronics.ru
Changelog v2:
- Add Heikki'es acked-byt tag.
- Resend the series so it wouldn't be lost but merged in the kernel 5.10.

Link: 
https://lore.kernel.org/linux-usb/20201026164050.30380-1-sergey.se...@baikalelectronics.ru
Changelog v3:
- Add Fixes tag to the commit log of the patch:
  [PATCH 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

Link: 
https://lore.kernel.org/linux-usb/2020090254.12842-1-sergey.se...@baikalelectronics.ru
Changelog v4:
- Just resend.

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
Cc: Alexey Malahov 
Cc: Pavel Parkhomenko 
Cc: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

Serge Semin (3):
  usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion
  usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one
  usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

 drivers/usb/dwc3/core.h |  1 +
 drivers/usb/dwc3/ulpi.c | 38 +-
 2 files changed, 22 insertions(+), 17 deletions(-)

-- 
2.29.2

[PATCH v4 1/3] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access completion

[Serge Semin]

In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone
bit when the PHY vendor control access is done and clears it when the
application initiates a new transaction. The doc doesn't say anything
about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover
we've discovered that the VStsBsy flag can be cleared before the VStsDone
bit. So using the former as a signal of the PHY control registers
completion might be dangerous. Let's have the VStsDone flag utilized
instead then.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller
Databook, 2.70a, December 2013, p.388

Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 

---

Changelog v3:
- Add Fixes tag to the commit log.
---
 drivers/usb/dwc3/core.h | 1 +
 drivers/usb/dwc3/ulpi.c | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 2f95f08ca511..1b241f937d8f 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -285,6 +285,7 @@
 
 /* Global USB2 PHY Vendor Control Register */
 #define DWC3_GUSB2PHYACC_NEWREGREQ BIT(25)
+#define DWC3_GUSB2PHYACC_DONE  BIT(24)
 #define DWC3_GUSB2PHYACC_BUSY  BIT(23)
 #define DWC3_GUSB2PHYACC_WRITE BIT(22)
 #define DWC3_GUSB2PHYACC_ADDR(n)   (n << 16)
diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index aa213c9815f6..3cc4f4970c05 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
 
while (count--) {
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
-   if (!(reg & DWC3_GUSB2PHYACC_BUSY))
+   if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
cpu_relax();
}
-- 
2.29.2

Re: [PATCH] spi: dw: Fix error return code in dw_spi_bt1_probe()

[Serge Semin]

Hello Zhang

On Fri, Dec 04, 2020 at 04:42:37PM +0800, Zhang Changzhong wrote:
> Fix to return a negative error code from the error handling
> case instead of 0, as done elsewhere in this function.
> 
> Fixes: abf00907538e ("spi: dw: Add Baikal-T1 SPI Controller glue driver")
> Reported-by: Hulk Robot 
> Signed-off-by: Zhang Changzhong 

Thanks for the patch. Definitely

Acked-by: Serge Semin 

-Sergey

> ---
>  drivers/spi/spi-dw-bt1.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-dw-bt1.c b/drivers/spi/spi-dw-bt1.c
> index f382dfad..c279b78 100644
> --- a/drivers/spi/spi-dw-bt1.c
> +++ b/drivers/spi/spi-dw-bt1.c
> @@ -280,8 +280,10 @@ static int dw_spi_bt1_probe(struct platform_device *pdev)
>   dws->bus_num = pdev->id;
>   dws->reg_io_width = 4;
>   dws->max_freq = clk_get_rate(dwsbt1->clk);
> - if (!dws->max_freq)
> + if (!dws->max_freq) {
> + ret = -EINVAL;
>   goto err_disable_clk;
> + }
>  
>   init_func = device_get_match_data(>dev);
>   ret = init_func(pdev, dwsbt1);
> -- 
> 2.9.5
> 

[PATCH v4 2/3] usb: dwc3: ulpi: Replace CPU-based busyloop with Protocol-based one

[Serge Semin]

Originally the procedure of the ULPI transaction finish detection has been
developed as a simple busy-loop with just decrementing counter and no
delays. It's wrong since on different systems the loop will take a
different time to complete. So if the system bus and CPU are fast enough
to overtake the ULPI bus and the companion PHY reaction, then we'll get to
take a false timeout error. Fix this by converting the busy-loop procedure
to take the standard bus speed, address value and the registers access
mode into account for the busy-loop delay calculation.

Here is the way the fix works. It's known that the ULPI bus is clocked
with 60MHz signal. In accordance with [1] the ULPI bus protocol is created
so to spend 5 and 6 clock periods for immediate register write and read
operations respectively, and 6 and 7 clock periods - for the extended
register writes and reads. Based on that we can easily pre-calculate the
time which will be needed for the controller to perform a requested IO
operation. Note we'll still preserve the attempts counter in case if the
DWC USB3 controller has got some internals delays.

[1] UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1,
October 20, 2004, pp. 30 - 36.

Fixes: 88bc9d194ff6 ("usb: dwc3: add ULPI interface support")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 3cc4f4970c05..54c877f7b51d 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -7,6 +7,8 @@
  * Author: Heikki Krogerus 
  */
 
+#include 
+#include 
 #include 
 
 #include "core.h"
@@ -17,12 +19,22 @@
DWC3_GUSB2PHYACC_ADDR(ULPI_ACCESS_EXTENDED) | \
DWC3_GUSB2PHYACC_EXTEND_ADDR(a) : DWC3_GUSB2PHYACC_ADDR(a))
 
-static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
+#define DWC3_ULPI_BASE_DELAY   DIV_ROUND_UP(NSEC_PER_SEC, 6000L)
+
+static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
+   unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
unsigned int count = 1000;
u32 reg;
 
+   if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
+   ns += DWC3_ULPI_BASE_DELAY;
+
+   if (read)
+   ns += DWC3_ULPI_BASE_DELAY;
+
while (count--) {
+   ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
if (reg & DWC3_GUSB2PHYACC_DONE)
return 0;
@@ -47,7 +59,7 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   ret = dwc3_ulpi_busyloop(dwc);
+   ret = dwc3_ulpi_busyloop(dwc, addr, true);
if (ret)
return ret;
 
@@ -71,7 +83,7 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
-   return dwc3_ulpi_busyloop(dwc);
+   return dwc3_ulpi_busyloop(dwc, addr, false);
 }
 
 static const struct ulpi_ops dwc3_ulpi_ops = {
-- 
2.29.2

[PATCH v4 3/3] usb: dwc3: ulpi: Fix USB2.0 HS/FS/LS PHY suspend regression

[Serge Semin]

First of all the commit e0082698b689 ("usb: dwc3: ulpi: conditionally
resume ULPI PHY") introduced the Suspend USB2.0 HS/FS/LS PHY regression,
as by design of the fix any attempt to read/write from/to the PHY control
registers will completely disable the PHY suspension, which consequently
will increase the USB bus power consumption. Secondly the fix won't work
well for the very first attempt of the ULPI PHY control registers IO,
because after disabling the USB2.0 PHY suspension functionality it will
still take some time for the bus to resume from the sleep state if one has
been reached before it. So the very first PHY register read/write
operation will take more time than the busy-loop provides and the IO
timeout error might be returned anyway.

Here we suggest to fix the denoted problems in the following way. First of
all let's not disable the Suspend USB2.0 HS/FS/LS PHY functionality so to
make the controller and the USB2.0 bus more power efficient. Secondly
instead of that we'll extend the PHY IO op wait procedure with 1 - 1.2 ms
sleep if the PHY suspension is enabled (1ms should be enough as by LPM
specification it is at most how long it takes for the USB2.0 bus to resume
from L1 (Sleep) state). Finally in case if the USB2.0 PHY suspension
functionality has been disabled on the DWC USB3 controller setup procedure
we'll compensate the USB bus resume process latency by extending the
busy-loop attempts counter.

Fixes: e0082698b689 ("usb: dwc3: ulpi: conditionally resume ULPI PHY")
Signed-off-by: Serge Semin 
Acked-by: Heikki Krogerus 
---
 drivers/usb/dwc3/ulpi.c | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/dwc3/ulpi.c b/drivers/usb/dwc3/ulpi.c
index 54c877f7b51d..f23f4c9a557e 100644
--- a/drivers/usb/dwc3/ulpi.c
+++ b/drivers/usb/dwc3/ulpi.c
@@ -24,7 +24,7 @@
 static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, bool read)
 {
unsigned long ns = 5L * DWC3_ULPI_BASE_DELAY;
-   unsigned int count = 1000;
+   unsigned int count = 1;
u32 reg;
 
if (addr >= ULPI_EXT_VENDOR_SPECIFIC)
@@ -33,6 +33,10 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc, u8 addr, 
bool read)
if (read)
ns += DWC3_ULPI_BASE_DELAY;
 
+   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+   if (reg & DWC3_GUSB2PHYCFG_SUSPHY)
+   usleep_range(1000, 1200);
+
while (count--) {
ndelay(ns);
reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
@@ -50,12 +54,6 @@ static int dwc3_ulpi_read(struct device *dev, u8 addr)
u32 reg;
int ret;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
 
@@ -73,12 +71,6 @@ static int dwc3_ulpi_write(struct device *dev, u8 addr, u8 
val)
struct dwc3 *dwc = dev_get_drvdata(dev);
u32 reg;
 
-   reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-   if (reg & DWC3_GUSB2PHYCFG_SUSPHY) {
-   reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-   dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-   }
-
reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
reg |= DWC3_GUSB2PHYACC_WRITE | val;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
-- 
2.29.2

[PATCH v5 12/19] dt-bindings: usb: dwc3: Add synopsys,dwc3 compatible string

[Serge Semin]

The DWC USB3 driver and some DTS files like Exynos 5250, Keystone k2e, etc
expects the DWC USB3 DT node to have the compatible string with the
"synopsys" vendor prefix. Let's add the corresponding compatible string to
the controller DT schema, but mark it as deprecated seeing the Synopsys,
Inc. is presented with just "snps" vendor prefix.

Signed-off-by: Serge Semin 

---

Changelog v2:
- Drop quotes from around the compat string constant.

Changelog v4:
- Get the patch back, since we can't discard the deprecated prefix from the
  driver.
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 94ede43586f7..b1890558affe 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -31,7 +31,10 @@ allOf:
 properties:
   compatible:
 contains:
-  const: snps,dwc3
+  oneOf:
+- const: snps,dwc3
+- const: synopsys,dwc3
+  deprecated: true
 
   interrupts:
 description:
-- 
2.29.2

[PATCH v5 13/19] dt-bindings: usb: dwc3: Add Tx De-emphasis constraints

[Serge Semin]

In accordance with the driver comments the PIPE3 de-emphasis can be tuned
to be either -6dB, -2.5dB or disabled. Let's add the de-emphasis
property constraints so the DT schema would make sure the controller DT
node is equipped with correct value.

Signed-off-by: Serge Semin 
Reviewed-by: Rob Herring 

---

Changelog v2:
- Grammar fix: "s/tunned/tuned"
- Grammar fix: remove redundant "or" conjunction.
---
 Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml 
b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index b1890558affe..e39ad899c92e 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -156,6 +156,10 @@ properties:
   The value driven to the PHY is controlled by the LTSSM during USB3
   Compliance mode.
 $ref: /schemas/types.yaml#/definitions/uint8
+enum:
+  - 0 # -6dB de-emphasis
+  - 1 # -3.5dB de-emphasis
+  - 2 # No de-emphasis
 
   snps,dis_u3_susphy_quirk:
 description: When set core will disable USB3 suspend phy
-- 
2.29.2