RE: [PATCH 0/29] PM: proposed branch for PM collaboration
I don't see this patch from Tero/Jouni as part of this set.. [PATCH 4/4] 34XX: PM: Workaround to enable autoidle for clocks and plls. Was this patch dropped? or is it now part of some other patch? > -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Kevin Hilman > Sent: Thursday, September 11, 2008 6:02 PM > To: linux-omap@vger.kernel.org > Subject: [PATCH 0/29] PM: proposed branch for PM collaboration > > Hello, > > The following patchset is an attempt to collect the various PM patches > that have been flowing around, and organize them into one branch to be > used for further collaboration on PM development, in particular > OFF-mode support. > > It is currently a collection of proposed patches[1] from TI and > various other patches from Nokia and others to get retention, > OFF-mode, CPUidle etc. working in the linux-omap tree. > > This series is nowhere near ready for merging into linux-omap, but > will be useful for discussion and collaboration on getting the various > PM features working at the head of the linux-omap tree, and a place > where cleanup and rework efforts can be focused. > > If there are no major objections, I will create a branch in linux-omap > git and commit this series there. As collaboration continues, I will > continue to collect and update patches, fix problems and rebase onto > the HEAD of linux-omap. > > The goal of this branch is only to facilitate the rework and cleanup > of the PM code so it can be merged into linux-omap. Then, the branch > will disappear and work can be focused again on the HEAD of > linux-omap. > > It has currently been tested with a minimal config on 3430SDP, and > OFF-mode is hit in suspend. In order to hit suspend: > > echo 1 > /sys/power/voltage_off_while_idle > echo 1 > /sys/power/gpio_clocks_off_while_idle > echo 1 > /sys/power/uart_clocks_off_while_idle > echo mem > /sys/power/state > > Kevin > > > [1] This series is roughly based on the following: > > Jouni Hogander, Tero Kristo > [PATCH 0/4] Refreshed PM workaround patches 2 -- 15 Aug > > Rajendra Nayak: > [PATCH 00/11] OMAP3 CPUidle patches - ver 2 -- 18 July > > As well as several patches/hacks/cleanups that have not yet been > posted to the list. > > Also, there have been newer versions of the CPUidle patches that have > been reviewed on the list, but do not apply for various reasons. As > soon as they are rebased and updated versions of those are available, > I will integrate them. > -- > To unsubscribe from this list: send the line "unsubscribe > linux-omap" in > the body of a message to [EMAIL PROTECTED] > More majordomo info at http://vger.kernel.org/majordomo-info.html > > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 15/15] OMAP3 camera driver: OMAP34XXCAM: Add Sensors Support.
Not by the moment, perhaps later. We'll leave it there by now.
Please hold this patch, as it is going to change.
Thanks for your time.
Regards,
Sergio
-Original Message-
From: Tony Lindgren [mailto:[EMAIL PROTECTED]
Sent: Wednesday, September 10, 2008 7:18 PM
To: Aguirre Rodriguez, Sergio Alberto
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH 15/15] OMAP3 camera driver: OMAP34XXCAM: Add Sensors
Support.
* Aguirre Rodriguez, Sergio Alberto <[EMAIL PROTECTED]> [080829 16:35]:
> From: Sergio Aguirre <[EMAIL PROTECTED]>
>
> OMAP34XX: CAM: Add Sensors Support
>
> This adds support in OMAP34xx SDP board file for Sensor and Lens
> driver.
Should this be in board-3430sdp-camera.c or something like that?
Tony
>
> Signed-off-by: Sergio Aguirre <[EMAIL PROTECTED]>
> ---
> arch/arm/mach-omap2/board-3430sdp.c | 228
>
> 1 file changed, 228 insertions(+)
>
> Index: linux-omap-2.6/arch/arm/mach-omap2/board-3430sdp.c
> ===
> --- linux-omap-2.6.orig/arch/arm/mach-omap2/board-3430sdp.c 2008-08-25
> 11:00:18.0 -0500
> +++ linux-omap-2.6/arch/arm/mach-omap2/board-3430sdp.c2008-08-25
> 12:16:46.0 -0500
> @@ -42,6 +42,19 @@
> #include
> #include
>
> +#ifdef CONFIG_VIDEO_OMAP3
> +#include
> +#include <../drivers/media/video/omap34xxcam.h>
> +#include <../drivers/media/video/isp/ispreg.h>
> +#if defined(CONFIG_VIDEO_MT9P012) || defined(CONFIG_VIDEO_MT9P012_MODULE)
> +#include <../drivers/media/video/mt9p012.h>
> +#endif
> +#endif
> +
> +#ifdef CONFIG_VIDEO_DW9710
> +#include <../drivers/media/video/dw9710.h>
> +#endif
> +
> #include
> #include
> #include
> @@ -266,6 +279,216 @@
> },
> };
>
> +#ifdef CONFIG_VIDEO_DW9710
> +static int dw9710_lens_power_set(enum v4l2_power power)
> +{
> +
> + return 0;
> +}
> +
> +static int dw9710_lens_set_prv_data(void *priv)
> +{
> + struct omap34xxcam_hw_config *hwc = priv;
> +
> + hwc->dev_index = 0;
> + hwc->dev_minor = 0;
> + hwc->dev_type = OMAP34XXCAM_SLAVE_LENS;
> +
> + return 0;
> +}
> +
> +static struct dw9710_platform_data sdp3430_dw9710_platform_data = {
> + .power_set = dw9710_lens_power_set,
> + .priv_data_set = dw9710_lens_set_prv_data,
> +};
> +#endif
> +
> +#if defined(CONFIG_VIDEO_MT9P012) || defined(CONFIG_VIDEO_MT9P012_MODULE)
> +static void __iomem *fpga_map_addr;
> +
> +static struct omap34xxcam_sensor_config cam_hwc = {
> + .sensor_isp = 0,
> + .xclk = OMAP34XXCAM_XCLK_A,
> +};
> +
> +static void enable_fpga_vio_1v8(u8 enable)
> +{
> + u16 reg_val;
> +
> + fpga_map_addr = ioremap(DEBUG_BASE, 4096);
> + reg_val = readw(fpga_map_addr + REG_SDP3430_FPGA_GPIO_2);
> +
> + /* Ensure that the SPR_GPIO1_3v3 is 0 - powered off.. 1 is on */
> + if (reg_val & FPGA_SPR_GPIO1_3v3) {
> + reg_val |= FPGA_SPR_GPIO1_3v3;
> + reg_val |= FPGA_GPIO6_DIR_CTRL; /* output mode */
> + writew(reg_val, fpga_map_addr + REG_SDP3430_FPGA_GPIO_2);
> + /* give a few milli sec to settle down
> + * Let the sensor also settle down.. if required..
> + */
> + if (enable)
> + mdelay(10);
> + }
> +
> + if (enable) {
> + reg_val |= FPGA_SPR_GPIO1_3v3 | FPGA_GPIO6_DIR_CTRL;
> + writew(reg_val, fpga_map_addr + REG_SDP3430_FPGA_GPIO_2);
> + }
> + /* Vrise time for the voltage - should be less than 1 ms */
> + mdelay(1);
> +}
> +
> +static int mt9p012_sensor_set_prv_data(void *priv)
> +{
> + struct omap34xxcam_hw_config *hwc = priv;
> +
> + hwc->u.sensor.xclk = cam_hwc.xclk;
> + hwc->u.sensor.sensor_isp = cam_hwc.sensor_isp;
> + hwc->dev_index = 0;
> + hwc->dev_minor = 0;
> + hwc->dev_type = OMAP34XXCAM_SLAVE_SENSOR;
> + return 0;
> +}
> +
> +static struct isp_interface_config mt9p012_if_config = {
> + .ccdc_par_ser = ISP_PARLL,
> + .dataline_shift = 0x1,
> + .hsvs_syncdetect = ISPCTRL_SYNC_DETECT_VSRISE,
> + .vdint0_timing = 0x0,
> + .vdint1_timing = 0x0,
> + .strobe = 0x0,
> + .prestrobe = 0x0,
> + .shutter = 0x0,
> + .u.par.par_bridge = 0x0,
> + .u.par.par_clk_pol = 0x0,
> +};
> +
> +static int mt9p012_sensor_power_set(enum v4l2_power power)
> +{
> + switch (power) {
> + case V4L2_POWER_OFF:
> + /* Power Down Sequence */
> +#ifdef CONFIG_TWL4030_CORE
> + twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
> + VAUX_DEV_GRP_NONE, TWL4030_VAUX2_DEV_GRP);
> +#else
> +#error "no power companion board defined!"
> +#endif
> + enable_fpga_vio_1v8(0);
> + omap_free_gpio(MT9P012_RESET_GPIO);
> + iounmap(fpga_map_addr);
> + omap_free_gpio(MT9P012_STANDBY_GPIO);
> + break;
> + case V4L2_POWER_ON:
> + /* Power Up Sequence */
> +
[PATCH] ARM: OMAP: Clean-up MMC device init (Was: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data)
* Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 11:13]:
> On Thu, Sep 11, 2008 at 10:33:33AM -0700, Tony Lindgren wrote:
> > * Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 02:13]:
> > > New version of the MMC updates for mainline pushed out - with additional
> > > cleanups in place (and since it's a different patch, I've dropped Tony's
> > > ack from it.)
> >
> > While we're at it, let's clean up the mmc mess further and split the
> > resources to mach-omap1/devices.c and mach-omap2/devices.c. That way
> > we get rid of the ifdef else between omap1 and omap2.
>
> Great, it would be nice to get something in OMAP to the point where we
> can say it's finished, and doesn't have to be regularly tinkered with
> anymore.
OK, I've pushed a patch to l-o tree. Here's a patch for you against your
devel branch.
> Is there anything else that the MMC stuff is missing at present?
Well the omap_hsmmc.c driver is not quite ready yet. That should not
affect the device init code.
Tony
From: Tony Lindgren <[EMAIL PROTECTED]>
Date: Thu, 11 Sep 2008 17:42:37 -0700
Subject: [PATCH] ARM: OMAP: Clean-up MMC device init
Clean-up MMC device init:
- Initialize devices in mach-omap1/devices.c and mach-omap2/devices.c
instead of plat-omap/devices.c
- Remove old struct omap_mmc_config, use struct omap_mmc_platform_data instead
Signed-off-by: Tony Lindgren <[EMAIL PROTECTED]>
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index ab9ee58..37031e0 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -14,6 +14,7 @@
#include
#include
+#include
#ifdef CONFIG_MMC_OMAP
static int slot_cover_open;
@@ -83,6 +84,8 @@ static struct omap_mmc_platform_data h2_mmc_data = {
.init = h2_mmc_late_init,
.cleanup= h2_mmc_cleanup,
.slots[0] = {
+ .enabled = 1,
+ .wire4 = 1,
.set_power = h2_mmc_set_power,
.set_bus_mode = h2_mmc_set_bus_mode,
.get_ro = NULL,
@@ -95,7 +98,7 @@ static struct omap_mmc_platform_data h2_mmc_data = {
void __init h2_mmc_init(void)
{
- omap_set_mmc_info(1, &h2_mmc_data);
+ omap1_init_mmc(&h2_mmc_data);
}
#else
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 3b65914..3b59354 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -381,15 +381,6 @@ static struct omap_usb_config h2_usb_config __initdata = {
.pins[1] = 3,
};
-static struct omap_mmc_config h2_mmc_config __initdata = {
- .mmc[0] = {
- .enabled = 1,
- .wire4 = 1,
- },
-};
-
-extern struct omap_mmc_platform_data h2_mmc_data;
-
static struct omap_uart_config h2_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};
@@ -400,7 +391,6 @@ static struct omap_lcd_config h2_lcd_config __initdata = {
static struct omap_board_config_kernel h2_config[] __initdata = {
{ OMAP_TAG_USB, &h2_usb_config },
- { OMAP_TAG_MMC, &h2_mmc_config },
{ OMAP_TAG_UART, &h2_uart_config },
{ OMAP_TAG_LCD, &h2_lcd_config },
};
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index 3608581..44e9d53 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -14,6 +14,7 @@
#include
#include
+#include
#ifdef CONFIG_MMC_OMAP
static int slot_cover_open;
@@ -87,6 +88,8 @@ static struct omap_mmc_platform_data h3_mmc_data = {
.init = h3_mmc_late_init,
.cleanup= h3_mmc_cleanup,
.slots[0] = {
+ .enabled = 1,
+ .wire4 = 1,
.set_power = h3_mmc_set_power,
.set_bus_mode = h3_mmc_set_bus_mode,
.get_ro = NULL,
@@ -99,7 +102,7 @@ static struct omap_mmc_platform_data h3_mmc_data = {
void __init h3_mmc_init(void)
{
- omap_set_mmc_info(1, &h3_mmc_data);
+ omap1_init_mmc(&h3_mmc_data);
}
#else
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index 2ced6d9..ff9bbe2 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -447,15 +447,6 @@ static struct omap_usb_config h3_usb_config __initdata = {
.pins[1] = 3,
};
-static struct omap_mmc_config h3_mmc_config __initdata = {
- .mmc[0] = {
- .enabled = 1,
- .wire4 = 1,
- },
-};
-
-extern struct omap_mmc_platform_data h3_mmc_data;
-
static struct omap_uart_config h3_uart_config __initdata = {
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
};
@@ -466,7 +457,6 @@ static struct omap_lcd_config h3_lcd_config __initdata = {
static struct omap_board_config_kernel h3_config[] __initdata = {
{ OMAP_TAG_USB, &h3_usb_config },
- { OMAP_TAG_MMC, &h3_mmc_config },
{ OMAP_TAG_UART, &h3_uart_config },
{ OMAP_TAG_LCD, &h3_lcd_config },
};
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index cbc11be..9ed0fef 100644
--- a/ar
Re: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions
JFYI, you can get all the updates against "l-o" from: http://4869037.web.fc2.com/tidspbridge-20080911.tgz which has already included the following changes too. From: "ext Kanigeri, Hari" <[EMAIL PROTECTED]> Subject: RE: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions Date: Thu, 11 Sep 2008 13:47:56 -0500 > Thank you for suggesting this. We will make this change. > > Thank you, > Best regards, > Hari > > > -Original Message- > > From: Hiroshi DOYU [mailto:[EMAIL PROTECTED] > > Sent: Wednesday, September 10, 2008 10:22 PM > > To: [EMAIL PROTECTED] > > Cc: [EMAIL PROTECTED]; linux-omap@vger.kernel.org; Ramirez Luna, Omar; > > Pandita, Vikram; Guzman Lugo, Fernando; Kanigeri, Hari > > Subject: Re: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions > > > > Thanks for your comments. > > > > From: "ext Russell King - ARM Linux" <[EMAIL PROTECTED]> > > Subject: Re: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions > > Date: Wed, 10 Sep 2008 20:38:30 +0100 > > > > > On Wed, Sep 10, 2008 at 08:44:14AM -0700, Tony Lindgren wrote: > > > > * Hiroshi DOYU <[EMAIL PROTECTED]> [080909 21:08]: > > > > > Hi, > > > > > > > > > > Although this TI bridge patches are not integrated and a bit > > > > > independent S/W component, it would be nice to get some comments > > just > > > > > on this bridge header file location from kernel maintainer's > > > > > perspective. > > > > > > > > > > "arch/arm/plat-omap/include/mach/bridge" > > > > > or "arch/arm/plat-omap/include/bridge"? > > > > > > > > How about put the bridge specific headers under > > include/linux/dspbridge? > > > > Then you can have just the omap specific headers under > > > > arch/arm/plat-omap/include/mach. > > > > > > There's an advantage to having them under arch/arm/plat- > > omap/include/dspbridge > > > - it's portable. If ever they need to become more visible, they can be > > easily > > > moved to arch/arm/include/dspbridge or include/dspbridge instead. > > > > "arch/arm/plat-omap/include/dspbridge" sounds reasonable, at least, > > for the meanwhile. > > > > For this header file directory name, 'dsp' prefix is needed in > > "include/'dsp'bridge" because "bridge" is too generic naming and, > > instead, "drivers/'dsp'/bridge" has 'dsp' in its path already. > > > > Hiroshi DOYU > > > > > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Thu, Sep 11, 2008 at 11:13 AM, Russell King - ARM Linux <[EMAIL PROTECTED]> wrote: > Is there anything else that the MMC stuff is missing at present? Not an answer to your question, but perhaps an expansion of it (or maybe even a demonstration of my ignorance, not sure which) :-) Has anyone successfully used the omap mmc infrastructure to support an SDIO device (say for example the libertas_sdio driver)? Steve -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
* Jarkko Lavinen <[EMAIL PROTECTED]> [080911 04:23]:
> On Thu, Sep 11, 2008 at 09:48:28AM +0100, ext Russell King - ARM Linux wrote:
> > So, given my update for this, shouldn't this be something sent almost
> > immediately to me so stuff for mainline isn't falling behind.
>
> Hi Russell and all
>
> Here is a hopefully self-explaining patch, which enables 8-bit
> support similar to the 4-bit support in Omap HSMMC when then mmc
> confifuration from platform data tells it is available.
>
> I have tested it on a testboard with 2.6.26 beased kernel and
> write speed increased some 30..40%.
>
> Cheers,
> Jarkko
>
> ---
>
> From f739457703988da18a5509bd297c4f6ebed83291 Mon Sep 17 00:00:00 2001
> From: Jarkko Lavinen <[EMAIL PROTECTED]>
> Date: Thu, 11 Sep 2008 14:15:31 +0300
> Subject: [PATCH] HSMMC: Enable 8-bit transfer when available.
>
> Signed-off-by: Jarkko Lavinen <[EMAIL PROTECTED]>
> ---
> arch/arm/plat-omap/devices.c|8 ++--
> arch/arm/plat-omap/include/mach/board.h |4 +++-
> drivers/mmc/core/mmc.c | 17 +
> drivers/mmc/host/omap_hsmmc.c | 10 ++
> include/linux/mmc/host.h| 12 +++-
> 5 files changed, 39 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
> index 3bd1da2..aa1299f 100644
> --- a/arch/arm/plat-omap/devices.c
> +++ b/arch/arm/plat-omap/devices.c
> @@ -289,13 +289,17 @@ static void __init omap_init_mmc(void)
> mmc = &mmc_conf->mmc[0];
>
> if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> - if (mmc->enabled)
> + if (mmc->enabled) {
> + mmc1_data.conf = *mmc;
> (void) platform_device_register(&mmc_omap_device1);
> + }
>
> #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
> mmc = &mmc_conf->mmc[1];
> - if (mmc->enabled)
> + if (mmc->enabled) {
> + mmc2_data.conf = *mmc;
> (void) platform_device_register(&mmc_omap_device2);
> + }
> #endif
>
> return;
I'm about to get rid of the old mmc_conf and use only
omap_mmc_platform_data. So this will need to be modified a bit
as soon as I'm done.
Regards,
Tony
> diff --git a/arch/arm/plat-omap/include/mach/board.h
> b/arch/arm/plat-omap/include/mach/board.h
> index a1a66ac..cd287dd 100644
> --- a/arch/arm/plat-omap/include/mach/board.h
> +++ b/arch/arm/plat-omap/include/mach/board.h
> @@ -46,8 +46,10 @@ struct omap_mmc_conf {
> unsigned nomux:1;
> /* switch pin can be for card detect (default) or card cover */
> unsigned cover:1;
> - /* 4 wire signaling is optional, and is only used for SD/SDIO */
> + /* 4 and 8 wire signaling are optional */
> unsigned wire4:1;
> + unsigned wire8:1;
> +
> /* use the internal clock */
> unsigned internal_clock:1;
> s16 power_pin;
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index fdd7c76..8c55df3 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -434,13 +434,23 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
>* Activate wide bus (if supported).
>*/
> if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
> - (host->caps & MMC_CAP_4_BIT_DATA)) {
> + (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
> + unsigned ext_csd_bit, driver_width;
> +
> + if (host->caps & MMC_CAP_8_BIT_DATA) {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
> + driver_width = MMC_BUS_WIDTH_8;
> + } else {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
> + driver_width = MMC_BUS_WIDTH_4;
> + }
> +
> err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
> - EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
> + EXT_CSD_BUS_WIDTH, ext_csd_bit);
> if (err)
> goto free_card;
>
> - mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
> + mmc_set_bus_width(card->host, driver_width);
> }
>
> if (!oldcard)
> @@ -624,4 +634,3 @@ err:
>
> return err;
> }
> -
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index af34871..92ad67e 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -72,6 +72,7 @@
> #define MSBS 1<<5
> #define BCE 1<<1
> #define FOUR_BIT 1 << 1
> +#define DW8 (1 << 5)
> #define CC 0x1
> #define TC 0x02
> #define OD 0x1
> @@ -631,6 +632,7 @@ static void omap_mmc_set_ios(struct mmc_host *mmc, struct
> mmc_ios *ios)
> u16 dsor = 0;
> unsigned long regval;
> unsigned long time
RE: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions
Thank you for suggesting this. We will make this change. Thank you, Best regards, Hari > -Original Message- > From: Hiroshi DOYU [mailto:[EMAIL PROTECTED] > Sent: Wednesday, September 10, 2008 10:22 PM > To: [EMAIL PROTECTED] > Cc: [EMAIL PROTECTED]; linux-omap@vger.kernel.org; Ramirez Luna, Omar; > Pandita, Vikram; Guzman Lugo, Fernando; Kanigeri, Hari > Subject: Re: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions > > Thanks for your comments. > > From: "ext Russell King - ARM Linux" <[EMAIL PROTECTED]> > Subject: Re: [PATCH 2/3][OMAP 3/4]table end for wcd command definitions > Date: Wed, 10 Sep 2008 20:38:30 +0100 > > > On Wed, Sep 10, 2008 at 08:44:14AM -0700, Tony Lindgren wrote: > > > * Hiroshi DOYU <[EMAIL PROTECTED]> [080909 21:08]: > > > > Hi, > > > > > > > > Although this TI bridge patches are not integrated and a bit > > > > independent S/W component, it would be nice to get some comments > just > > > > on this bridge header file location from kernel maintainer's > > > > perspective. > > > > > > > > "arch/arm/plat-omap/include/mach/bridge" > > > > or "arch/arm/plat-omap/include/bridge"? > > > > > > How about put the bridge specific headers under > include/linux/dspbridge? > > > Then you can have just the omap specific headers under > > > arch/arm/plat-omap/include/mach. > > > > There's an advantage to having them under arch/arm/plat- > omap/include/dspbridge > > - it's portable. If ever they need to become more visible, they can be > easily > > moved to arch/arm/include/dspbridge or include/dspbridge instead. > > "arch/arm/plat-omap/include/dspbridge" sounds reasonable, at least, > for the meanwhile. > > For this header file directory name, 'dsp' prefix is needed in > "include/'dsp'bridge" because "bridge" is too generic naming and, > instead, "drivers/'dsp'/bridge" has 'dsp' in its path already. > > Hiroshi DOYU > > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC] Patch for proper Cortex-A8 cache configuration output
* Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 01:46]: > On Wed, Sep 10, 2008 at 04:28:07PM -0700, Tony Lindgren wrote: > > I guess Catalin will submit his patch at some point after 2.6.28 opens. > > I'll apply it l-o tree, and remove the L2 debug info we had in id.c > > to clean up id.c in the future patches. > > As I've said on the main ARM lists where I've given reasons, I'm against > extending this stuff, and it is my intention to remove it completely. > It was only added because it was relatively simple and easy to print the > information. > > However, with ARMs attitude of breaking configuration register formats > willy nilly, it's just not worth having the additional complexity to > try to work out which format we have, and decode that format. > > For all we know, come the next ARM architecture revision, these registers > will have completely changed their format again. So much for providing > software with an easy way to determine the parameters of the core. > > It's just not worth the complexity and effort to try and decode this > information for no other purpose than a few printk's. Hmm, people need to see what's enabled though. For later ARMs, would it make sense to have some arm_l2_init() function that would get called from mach specific init to set the timings and enable L2? That function could then dump the cache configuration too. Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [patch 2.6.27-rc6-omap1] mach-omap2: fix more arch_initcall() breakage
* David Brownell <[EMAIL PROTECTED]> [080910 23:01]:
> From: David Brownell <[EMAIL PROTECTED]>
>
> Remove more bogus arch_initcall() logic in mach-omap2/board-xyx.c files.
> They broke a multi-OMAP build I did, at *RUN TIME* not build time, since
> it tried to do the i2c init for every board linked in the kernel.
>
> Remember, init_machine() entries run at arch_initcall() time; that's
> where any board-specific init logic should normally go. Any initcalls
> in the mach-*/*c files should normally be guarded by tests to make sure
> they only run on the relevant hardware (board, cpu). Better yet, get
> rid of the initcalls; init_machine() can *explicitly* call the right
> version of that code, and pass in board-specific config data; and there
> are hooks that can handle cpu-specific stuff too.
>
> A quick glance suggests most of the remaining initcall logic in the
> mach-omap2 directory is similarly broken... this patch gets rid of
> one frequently-cloned idiom, it should help.
Thanks, one step closer to getting the multi-omap properly working
for mach-omap2. Will push today.
Tony
> Signed-off-by: David Brownell <[EMAIL PROTECTED]>
> ---
> arch/arm/mach-omap2/board-2430sdp.c |4 ++--
> arch/arm/mach-omap2/board-3430sdp.c |2 +-
> arch/arm/mach-omap2/board-ldp.c |2 +-
> arch/arm/mach-omap2/board-omap2evm.c |4 ++--
> arch/arm/mach-omap2/board-omap3evm.c |4 ++--
> 5 files changed, 8 insertions(+), 8 deletions(-)
>
> --- a/arch/arm/mach-omap2/board-2430sdp.c
> +++ b/arch/arm/mach-omap2/board-2430sdp.c
> @@ -392,6 +392,8 @@ static int __init omap2430_i2c_init(void
>
> static void __init omap_2430sdp_init(void)
> {
> + omap2430_i2c_init();
> +
> platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
> omap_board_config = sdp2430_config;
> omap_board_config_size = ARRAY_SIZE(sdp2430_config);
> @@ -416,8 +418,6 @@ static void __init omap_2430sdp_map_io(v
> omap2_map_common_io();
> }
>
> -arch_initcall(omap2430_i2c_init);
> -
> MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
> /* Maintainer: Syed Khasim - Texas Instruments Inc */
> .phys_io= 0x4800,
> --- a/arch/arm/mach-omap2/board-3430sdp.c
> +++ b/arch/arm/mach-omap2/board-3430sdp.c
> @@ -354,6 +354,7 @@ extern void __init sdp3430_flash_init(vo
>
> static void __init omap_3430sdp_init(void)
> {
> + omap3430_i2c_init();
> platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
> omap_board_config = sdp3430_config;
> omap_board_config_size = ARRAY_SIZE(sdp3430_config);
> @@ -378,7 +379,6 @@ static void __init omap_3430sdp_map_io(v
> omap2_set_globals_343x();
> omap2_map_common_io();
> }
> -arch_initcall(omap3430_i2c_init);
>
> MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
> /* Maintainer: Syed Khasim - Texas Instruments Inc */
> --- a/arch/arm/mach-omap2/board-ldp.c
> +++ b/arch/arm/mach-omap2/board-ldp.c
> @@ -223,6 +223,7 @@ static int __init omap_i2c_init(void)
>
> static void __init omap_ldp_init(void)
> {
> + omap_i2c_init();
> platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
> omap_board_config = ldp_config;
> omap_board_config_size = ARRAY_SIZE(ldp_config);
> @@ -242,7 +243,6 @@ static void __init omap_ldp_map_io(void)
> omap2_set_globals_343x();
> omap2_map_common_io();
> }
> -arch_initcall(omap_i2c_init);
>
> MACHINE_START(OMAP_LDP, "OMAP LDP board")
> .phys_io= 0x4800,
> --- a/arch/arm/mach-omap2/board-omap2evm.c
> +++ b/arch/arm/mach-omap2/board-omap2evm.c
> @@ -261,6 +261,8 @@ static struct platform_device *omap2_evm
>
> static void __init omap2_evm_init(void)
> {
> + omap2_evm_i2c_init();
> +
> platform_add_devices(omap2_evm_devices, ARRAY_SIZE(omap2_evm_devices));
> omap_board_config = omap2_evm_config;
> omap_board_config_size = ARRAY_SIZE(omap2_evm_config);
> @@ -275,8 +277,6 @@ static void __init omap2_evm_map_io(void
> omap2_map_common_io();
> }
>
> -arch_initcall(omap2_evm_i2c_init);
> -
> MACHINE_START(OMAP2EVM, "OMAP2EVM Board")
> /* Maintainer: Arun KS <[EMAIL PROTECTED]> */
> .phys_io= 0x4800,
> --- a/arch/arm/mach-omap2/board-omap3evm.c
> +++ b/arch/arm/mach-omap2/board-omap3evm.c
> @@ -223,6 +223,8 @@ static struct platform_device *omap3_evm
>
> static void __init omap3_evm_init(void)
> {
> + omap3_evm_i2c_init();
> +
> platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
> omap_board_config = omap3_evm_config;
> omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
> @@ -238,8 +240,6 @@ static void __init omap3_evm_init(void)
> ads7846_dev_init();
> }
>
> -arch_initcall(omap3_evm_i2c_init);
> -
> static void __init omap3_evm_map_io(void)
> {
> omap2_set_globals_343x();
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a me
Re: [PATCH] Fix build for beagleboard
* Peter 'p2' De Schrijver <[EMAIL PROTECTED]> [080911 04:50]:
Signed-off-by?
Tony
> ---
> drivers/i2c/chips/twl4030-power.c |5 -
> 1 files changed, 4 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/i2c/chips/twl4030-power.c
> b/drivers/i2c/chips/twl4030-power.c
> index 195c3c4..04a13aa 100644
> --- a/drivers/i2c/chips/twl4030-power.c
> +++ b/drivers/i2c/chips/twl4030-power.c
> @@ -149,7 +149,7 @@ struct triton_ins t2_wrst_seq[] __initdata = {
> struct triton_ins sleep_on_seq[] __initdata = {
> {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
> RES_STATE_SLEEP), 4},
> - {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE_R7,
> + {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
> RES_STATE_SLEEP), 4},
> };
>
> @@ -160,6 +160,9 @@ struct triton_ins sleep_off_seq[] __initdata = {
> {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
> RES_STATE_ACTIVE), 0x2},
> };
> +
> +struct triton_ins t2_wrst_seq[] __initdata = { };
> +
> #endif
>
> static int __init twl4030_write_script_byte(u8 address, u8 byte)
> --
> 1.5.6.3
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [EMAIL PROTECTED]
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Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Thu, Sep 11, 2008 at 10:33:33AM -0700, Tony Lindgren wrote: > * Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 02:13]: > > New version of the MMC updates for mainline pushed out - with additional > > cleanups in place (and since it's a different patch, I've dropped Tony's > > ack from it.) > > While we're at it, let's clean up the mmc mess further and split the > resources to mach-omap1/devices.c and mach-omap2/devices.c. That way > we get rid of the ifdef else between omap1 and omap2. Great, it would be nice to get something in OMAP to the point where we can say it's finished, and doesn't have to be regularly tinkered with anymore. Is there anything else that the MMC stuff is missing at present? -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/29] PM: proposed branch for PM collaboration
* Kevin Hilman <[EMAIL PROTECTED]> [080911 05:32]: > Hello, > > The following patchset is an attempt to collect the various PM patches > that have been flowing around, and organize them into one branch to be > used for further collaboration on PM development, in particular > OFF-mode support. > > It is currently a collection of proposed patches[1] from TI and > various other patches from Nokia and others to get retention, > OFF-mode, CPUidle etc. working in the linux-omap tree. > > This series is nowhere near ready for merging into linux-omap, but > will be useful for discussion and collaboration on getting the various > PM features working at the head of the linux-omap tree, and a place > where cleanup and rework efforts can be focused. > > If there are no major objections, I will create a branch in linux-omap > git and commit this series there. As collaboration continues, I will > continue to collect and update patches, fix problems and rebase onto > the HEAD of linux-omap. > > The goal of this branch is only to facilitate the rework and cleanup > of the PM code so it can be merged into linux-omap. Then, the branch > will disappear and work can be focused again on the HEAD of > linux-omap. Sounds good to me. It also makes it easier for people to test it. Tony > It has currently been tested with a minimal config on 3430SDP, and > OFF-mode is hit in suspend. In order to hit suspend: > > echo 1 > /sys/power/voltage_off_while_idle > echo 1 > /sys/power/gpio_clocks_off_while_idle > echo 1 > /sys/power/uart_clocks_off_while_idle > echo mem > /sys/power/state > > Kevin > > > [1] This series is roughly based on the following: > > Jouni Hogander, Tero Kristo > [PATCH 0/4] Refreshed PM workaround patches 2 -- 15 Aug > > Rajendra Nayak: > [PATCH 00/11] OMAP3 CPUidle patches - ver 2 -- 18 July > > As well as several patches/hacks/cleanups that have not yet been > posted to the list. > > Also, there have been newer versions of the CPUidle patches that have > been reviewed on the list, but do not apply for various reasons. As > soon as they are rebased and updated versions of those are available, > I will integrate them. > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to [EMAIL PROTECTED] > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
* Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 02:13]: > On Thu, Sep 11, 2008 at 09:48:28AM +0100, Russell King - ARM Linux wrote: > > On Wed, Sep 10, 2008 at 04:56:46PM -0700, Tony Lindgren wrote: > > > * Madhusudhan Chikkature <[EMAIL PROTECTED]> [080812 23:13]: > > > > From: Madhusudhan Chikkature<[EMAIL PROTECTED]> > > > > > > > > ARM: OMAP3: Enable 4-bit support for HSMMC. > > > > > > > > This patch provides the fix to enable 4-bit support for HSMMC. > > > > > > Pushing today. > > > > So, given my update for this, shouldn't this be something sent almost > > immediately to me so stuff for mainline isn't falling behind. > > > > Otherwise we're wasting our time trying to get mainline up to date. Totally. > New version of the MMC updates for mainline pushed out - with additional > cleanups in place (and since it's a different patch, I've dropped Tony's > ack from it.) While we're at it, let's clean up the mmc mess further and split the resources to mach-omap1/devices.c and mach-omap2/devices.c. That way we get rid of the ifdef else between omap1 and omap2. I'll post some patches for that. Tony -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] Security: Kernel OOM-killer and allocation denial use different rules
From: Henrik Saari <[EMAIL PROTECTED]> Security: Kernel OOM-killer and allocation denial use different rules Original patch created by Leonid Moiseichuk <[EMAIL PROTECTED]> Fixes the issue with the oom killer and lowmem module being inconsistent; processes that are important enough to be protected from the oom killer should not be denied memory either. Signed-off-by: Henrik Saari <[EMAIL PROTECTED]> Signed-off-by: Viktor Rosendahl <[EMAIL PROTECTED]> --- security/lowmem.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/security/lowmem.c b/security/lowmem.c index a627d51..113be75 100644 --- a/security/lowmem.c +++ b/security/lowmem.c @@ -9,6 +9,7 @@ #include #include #include +#include #define MY_NAME "lowmem" @@ -207,6 +208,10 @@ static int low_vm_enough_memory(long pages) if (cap_sys_admin) return 0; + /* OOM unkillable process is allowed to consume memory */ + if (current->oomkilladj == OOM_DISABLE) + return 0; + /* uids from allowed_uids vector are also allowed no matter what */ for (i = 0; i < LOWMEM_MAX_UIDS && allowed_uids[i]; i++) if (current->uid == allowed_uids[i]) -- 1.5.6.3 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] Patches for fixing the lowmem module
Hello, Currently the lowmem module doesn't compile. Here are some patches that will fix a bug, make some improvements and even make it compile. security/lowmem.c | 258 -- 1 file changed, 154 insertions(+), 104 deletions(-) best regards, Viktor -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 03/10] lowmem: get rid of the percentages
The purpose of this patch is to get rid of the lame percentage calculations in
lowmem.c. Currently, the limits (measured in pages) are calculated from
percentages every time somebody from userspace requests some memory. With this
patch, the limits are in pages and furthermore, they are specified as minimum
amount of "free pages", instead of as maximum amount of "used pages". "Free"
means free pages or such pages that can easily be freed by the VM system.
This patch changes the names of the lowmem sysctl limits in /proc/sys/vm:
lowmem_deny_watermark=> lowmem_deny_watermark_pages
lowmem_notify_low=> lowmem_notify_low_pages
lowmem_notify_high => lowmem_notify_high_pages
The following read only value disappears:
lowmem_used_pages
The following read only value is introduced:
lowmem_free_pages
The old value can be calculated from userspace with the following pseudocode:
if lowmem_free_pages < lowmem_allowed_pages
lowmem_used_pages = lowmem_allowed_pages - lowmem_free_pages
else
lowmem_used_pages = 0;
Note that the value of lowmem_free_pages is only accurate when the system is
rather low on memory (otherwise it's a bit too pessimistic), this was true also
for the lowmem_used_pages metric.
Signed-off-by: Viktor Rosendahl <[EMAIL PROTECTED]>
---
security/lowmem.c | 82 +++-
1 files changed, 36 insertions(+), 46 deletions(-)
diff --git a/security/lowmem.c b/security/lowmem.c
index a965676..2dc0c4a 100644
--- a/security/lowmem.c
+++ b/security/lowmem.c
@@ -16,48 +16,48 @@
#define LOWMEM_MAX_UIDS 8
enum {
- VM_LOWMEM_DENY = 1,
- VM_LOWMEM_LEVEL1_NOTIFY,
- VM_LOWMEM_LEVEL2_NOTIFY,
+ VM_LOWMEM_DENY_PAGES = 1,
+ VM_LOWMEM_NOTIFY_LOW_PAGES,
+ VM_LOWMEM_NOTIFY_HIGH_PAGES,
VM_LOWMEM_NR_DECAY_PAGES,
VM_LOWMEM_ALLOWED_UIDS,
VM_LOWMEM_ALLOWED_PAGES,
- VM_LOWMEM_USED_PAGES,
+ VM_LOWMEM_FREE_PAGES,
};
-static unsigned int deny_percentage;
-static unsigned int l1_notify, l2_notify;
+static long deny_pages;
+static long notify_low_pages, notify_high_pages;
static unsigned int nr_decay_pages;
static unsigned long allowed_pages;
-static long used_pages;
+static unsigned long lowmem_free_pages;
static unsigned int allowed_uids[LOWMEM_MAX_UIDS];
static unsigned int minuid = 1;
static unsigned int maxuid = 65535;
static ctl_table lowmem_table[] = {
{
- .ctl_name = VM_LOWMEM_DENY,
- .procname = "lowmem_deny_watermark",
- .data = &deny_percentage,
- .maxlen = sizeof(unsigned int),
+ .ctl_name = VM_LOWMEM_DENY_PAGES,
+ .procname = "lowmem_deny_watermark_pages",
+ .data = &deny_pages,
+ .maxlen = sizeof(long),
.mode = 0644,
.child = NULL,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
- .ctl_name = VM_LOWMEM_LEVEL1_NOTIFY,
- .procname = "lowmem_notify_low",
- .data = &l1_notify,
- .maxlen = sizeof(unsigned int),
+ .ctl_name = VM_LOWMEM_NOTIFY_LOW_PAGES,
+ .procname = "lowmem_notify_low_pages",
+ .data = ¬ify_low_pages,
+ .maxlen = sizeof(long),
.mode = 0644,
.child = NULL,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
- .ctl_name = VM_LOWMEM_LEVEL2_NOTIFY,
- .procname = "lowmem_notify_high",
- .data = &l2_notify,
- .maxlen = sizeof(unsigned int),
+ .ctl_name = VM_LOWMEM_NOTIFY_HIGH_PAGES,
+ .procname = "lowmem_notify_high_pages",
+ .data = ¬ify_high_pages,
+ .maxlen = sizeof(long),
.mode = 0644,
.child = NULL,
.proc_handler = &proc_dointvec,
@@ -92,10 +92,10 @@ static ctl_table lowmem_table[] = {
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
- .ctl_name = VM_LOWMEM_USED_PAGES,
- .procname = "lowmem_used_pages",
- .data = &used_pages,
- .maxlen = sizeof(long),
+ .ctl_name = VM_LOWMEM_FREE_PAGES,
+ .procname = "lowmem_free_pages",
+ .data = &lowmem_free_pages,
+ .maxlen = sizeof(unsigned long),
.mode = 0444,
.child = NULL,
.proc_handler = &proc_dointvec,
@@ -163,21 +163,18 @@ static void high_watermark_state(int new_state)
static int low_vm_enough_memory(long pages)
{
unsigned long free, allowed;
- long deny_threshold, level1, level2, used;
int cap_sys_admin = 0, notify;
if (cap_capable(current, CAP_SYS_ADMIN) == 0)
cap_sys_admin = 1;
[PATCH 04/10] lowmem: remove an unecessary local variable
This "changed" variable is kind of deprecated. We used to have a spinlock
[which was later deemed unecessary] around the first if clause in the
*_watermark_state() functions; the variable was needed in order to move the
operation in the second if clause out of the lock section.
Signed-off-by: Viktor Rosendahl <[EMAIL PROTECTED]>
---
security/lowmem.c | 14 ++
1 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/security/lowmem.c b/security/lowmem.c
index 2dc0c4a..183c57f 100644
--- a/security/lowmem.c
+++ b/security/lowmem.c
@@ -136,28 +136,18 @@ KERNEL_ATTR_RO(high_watermark);
static void low_watermark_state(int new_state)
{
- int changed = 0;
-
if (low_watermark_reached != new_state) {
low_watermark_reached = new_state;
- changed = 1;
- }
-
- if (changed)
sysfs_notify(&kernel_subsys.kset.kobj, NULL, "low_watermark");
+ }
}
static void high_watermark_state(int new_state)
{
- int changed = 0;
-
if (high_watermark_reached != new_state) {
high_watermark_reached = new_state;
- changed = 1;
- }
-
- if (changed)
sysfs_notify(&kernel_subsys.kset.kobj, NULL, "high_watermark");
+ }
}
static int low_vm_enough_memory(long pages)
--
1.5.6.3
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[PATCH 02/10] lowmem: remove unecessary usage of proc_dointvec_minmax()
As far as I can understand, using proc_dointvec_minmax() instead of
proc_dointvec only makes sense if you supply the min and/or max values in the
extra1 and extra2 fields of the struct.
Signed-off-by: Viktor Rosendahl <[EMAIL PROTECTED]>
---
security/lowmem.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/security/lowmem.c b/security/lowmem.c
index 113be75..a965676 100644
--- a/security/lowmem.c
+++ b/security/lowmem.c
@@ -69,7 +69,7 @@ static ctl_table lowmem_table[] = {
.maxlen = sizeof(unsigned int),
.mode = 0644,
.child = NULL,
- .proc_handler = &proc_dointvec_minmax,
+ .proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
.ctl_name = VM_LOWMEM_ALLOWED_UIDS,
@@ -89,7 +89,7 @@ static ctl_table lowmem_table[] = {
.maxlen = sizeof(unsigned long),
.mode = 0444,
.child = NULL,
- .proc_handler = &proc_dointvec_minmax,
+ .proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
.ctl_name = VM_LOWMEM_USED_PAGES,
@@ -98,7 +98,7 @@ static ctl_table lowmem_table[] = {
.maxlen = sizeof(long),
.mode = 0444,
.child = NULL,
- .proc_handler = &proc_dointvec_minmax,
+ .proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec,
}, {
.ctl_name = 0
--
1.5.6.3
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Re: [PATCH 04/12] I2C re-init for every cmd
> Hi,
>
> Few comments inlined.
>
> Regards,
> Chandra
> - Original Message -
> From: ""Högander" Jouni" <[EMAIL PROTECTED]>
> To: "ext Rajendra Nayak" <[EMAIL PROTECTED]>
> Cc:
> Sent: Thursday, September 11, 2008 3:34 PM
> Subject: Re: [PATCH 04/12] I2C re-init for every cmd
>
>
> "ext Rajendra Nayak" <[EMAIL PROTECTED]> writes:
>
>> This patch does i2c init/re-init for every transfer
>>
>> Signed-off-by: Rajendra Nayak <[EMAIL PROTECTED]>
>> ---
>> drivers/i2c/busses/i2c-omap.c |2 ++
>> 1 files changed, 2 insertions(+)
>>
>> Index: linux-omap-2.6/drivers/i2c/busses/i2c-omap.c
>> ===
>> --- linux-omap-2.6.orig/drivers/i2c/busses/i2c-omap.c 2008-09-01
>> 18:11:28.0 +0530
>> +++ linux-omap-2.6/drivers/i2c/busses/i2c-omap.c 2008-09-01
>> 18:11:52.0
>> +0530
>> @@ -496,6 +496,8 @@ omap_i2c_xfer(struct i2c_adapter *adap,
>>
>> omap_i2c_unidle(dev);
>>
>> + omap_i2c_init(dev);
>> +
>> if ((r = omap_i2c_wait_for_bb(dev)) < 0)
>> goto out;
>
> This is causing unacceptable delays on i2c transfers. This is because
> occasionally reset loop in init function enters msleep. Is it
> necessary to reset i2c controller after off-mode?
>
> Any opinions on this:
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 3778735..4a27035 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -126,6 +126,14 @@
> /* I2C System Configuration Register (OMAP_I2C_SYSC): */
> #define OMAP_I2C_SYSC_SRST (1 << 1)/* Soft Reset */
>
> +struct omap3_i2c_regs {
> + u16 sysc;
> + u16 psc;
> + u16 scll;
> + u16 sclh;
> + u16 buf;
> +};
> +
>
>
>
> We can add this as a part of controller structure itself instaed of
> creating a new structure. we will store this
> psc, scll and others as a part of controller and just restore it. That
> way we can do away with omap3_i2c_save_context every time in clk
> disable.
>My patch is neither saving ctx on every clk disable. Just after init.
>
>
>
>
>
> struct omap_i2c_dev {
>struct device *dev;
>void __iomem*base; /* virtual */
> @@ -147,6 +155,9 @@ struct omap_i2c_dev {
>unsignedb_hw:1; /* bad h/w fixes */
>unsignedidle:1;
>u16 iestate;/* Saved interrupt register */
> +#ifdef CONFIG_ARCH_OMAP34XX
> + struct omap3_i2c_regs context;
> +#endif
>
>
>
> I guess this should work for all the platforms. at least for omap2/3
> it should work w/o any hiccups.
> I2C_BUF is the only register which will require cpu check..so while
> restoring we can put that check for 2430/34xx.
>Can we use off mode with omap2? Generally, should we build in
>save/restore code for other than omap3?
agreed..but i guess it will not compile for 2430 and prev. platforms.
omap3_i2c_save_context and restore definition is under macro
while call is not. let me know if i am missing something.
also is SYSC register restore needed??
>
>
> };
>
>
>
> static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> @@ -160,6 +171,26 @@ static inline u16 omap_i2c_read_reg(struct
> omap_i2c_dev *i2c_dev, int reg)
>return __raw_readw(i2c_dev->base + reg);
> }
>
> +#ifdef CONFIG_ARCH_OMAP34XX
> +void omap3_i2c_save_context(struct omap_i2c_dev *dev)
> +{
> + dev->context.sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG);
> + dev->context.psc = omap_i2c_read_reg(dev, OMAP_I2C_PSC_REG);
> + dev->context.scll = omap_i2c_read_reg(dev, OMAP_I2C_SCLL_REG);
> + dev->context.sclh = omap_i2c_read_reg(dev, OMAP_I2C_SCLH_REG);
> + dev->context.buf = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG);
> +}
> +
>
>
> +void omap3_i2c_restore_context(struct omap_i2c_dev *dev)
> +{
> + omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->context.sysc);
> + omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->context.psc);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->context.scll);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->context.sclh);
> + omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->context.buf);
> +}
> +#endif
> +
>
> static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> {
>if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
> @@ -210,6 +241,10 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
>clk_enable(dev->iclk);
>clk_enable(dev->fclk);
>dev->idle = 0;
> +
> + if (cpu_is_omap34xx())
> + omap3_i2c_restore_context(dev);
> +
>if (dev->iestate)
>omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
> }
> @@ -344,6 +379,10 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
>OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
>(OM
Re: [PATCH 15/29] OMAP3: PM: Move serial console check from omap3_can_sleep to idle loop
On Thu, Sep 11, 2008 at 03:33:59PM +0300, ext Kevin Hilman wrote: > Signed-off-by: Git administrator <[EMAIL PROTECTED]> Oops. :) Cheers, Daniel signature.asc Description: Digital signature
Re: [PATCH 28/29] PM FIX: convert TI io_p2v() usage to OMAP2_IO_ADDRESS()
On Thu, Sep 11, 2008 at 03:34:12PM +0300, Kevin Hilman wrote:
> Signed-off-by: Kevin Hilman <[EMAIL PROTECTED]>
> ---
> arch/arm/mach-omap2/pm34xx.c |6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
> index 5242ba0..7436332 100644
> --- a/arch/arm/mach-omap2/pm34xx.c
> +++ b/arch/arm/mach-omap2/pm34xx.c
> @@ -222,7 +222,7 @@ static void restore_table_entry(void)
> u32 previous_value, control_reg_value;
> u32 *address;
> /* Get virtual address of SCRATCHPAD */
> - scratchpad_address = (u32 *) io_p2v(SCRATCHPAD);
> + scratchpad_address = (u32 *) OMAP2_IO_ADDRESS(SCRATCHPAD);
scratchpad_address should be u32 __iomem *, and that cast shouldn't
be there.
> /* Get address of entry that was modified */
> address = (u32 *) *(scratchpad_address + TABLE_ADDRESS_OFFSET);
> /* Get the previous value which needs to be restored */
> @@ -924,7 +924,7 @@ void clear_scratchpad_contents(void)
> u32 max_offset = SCRATHPAD_ROM_OFFSET;
> u32 offset = 0;
> u32 v;
> - u32 v_addr = io_p2v(SCRATCHPAD_ROM);
> + u32 v_addr = OMAP2_IO_ADDRESS(SCRATCHPAD_ROM);
Ditto.
> if (__raw_readl(OMAP3430_PRM_RSTST) & 0x1) {
> for ( ; offset <= max_offset; offset += 0x4)
>__raw_writel(0x0, (v_addr + offset));
> @@ -942,7 +942,7 @@ void save_scratchpad_contents(void)
> u32 *sdram_context_address;
>
> /* Get virtual address of SCRATCHPAD */
> - scratchpad_address = (u32 *) io_p2v(SCRATCHPAD);
> + scratchpad_address = (u32 *) OMAP2_IO_ADDRESS(SCRATCHPAD);
Ditto.
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[PATCH 01/29] PM: Dynamic GPIO clock handling
From: ext Jouni Hogander <[EMAIL PROTECTED]>
In omap3 gpios 2-6 are in per domain. Functional clocks for these
should be disabled.
GPIO modules in PER domain are not able to act as a wake up source if
PER domain is in retention. PER domain sleep transition before MPU is
prevented by leaving icks active. PER domain still enters retention
together with MPU. When this happens IOPAD wake up mechanism is used
for gpios.
Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm.c | 20 --
arch/arm/mach-omap2/pm.h |2 +-
arch/arm/mach-omap2/pm34xx.c | 56 +-
3 files changed, 67 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 4652136..1de5f14 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -32,7 +32,7 @@
#include "pm.h"
unsigned short enable_dyn_sleep;
-unsigned short clocks_off_while_idle;
+unsigned short gpio_clocks_off_while_idle;
atomic_t sleep_block = ATOMIC_INIT(0);
static ssize_t idle_show(struct kobject *, struct kobj_attribute *, char *);
@@ -42,16 +42,16 @@ static ssize_t idle_store(struct kobject *k, struct
kobj_attribute *,
static struct kobj_attribute sleep_while_idle_attr =
__ATTR(sleep_while_idle, 0644, idle_show, idle_store);
-static struct kobj_attribute clocks_off_while_idle_attr =
- __ATTR(clocks_off_while_idle, 0644, idle_show, idle_store);
+static struct kobj_attribute gpio_clocks_off_while_idle_attr =
+ __ATTR(gpio_clocks_off_while_idle, 0644, idle_show, idle_store);
static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr,
char *buf)
{
if (attr == &sleep_while_idle_attr)
return sprintf(buf, "%hu\n", enable_dyn_sleep);
- else if (attr == &clocks_off_while_idle_attr)
- return sprintf(buf, "%hu\n", clocks_off_while_idle);
+ else if (attr == &gpio_clocks_off_while_idle_attr)
+ return sprintf(buf, "%hu\n", gpio_clocks_off_while_idle);
else
return -EINVAL;
}
@@ -69,8 +69,8 @@ static ssize_t idle_store(struct kobject *kobj, struct
kobj_attribute *attr,
if (attr == &sleep_while_idle_attr)
enable_dyn_sleep = value;
- else if (attr == &clocks_off_while_idle_attr)
- clocks_off_while_idle = value;
+ else if (attr == &gpio_clocks_off_while_idle_attr)
+ gpio_clocks_off_while_idle = value;
else
return -EINVAL;
@@ -106,10 +106,12 @@ static int __init omap_pm_init(void)
/* disabled till drivers are fixed */
enable_dyn_sleep = 0;
error = sysfs_create_file(power_kobj, &sleep_while_idle_attr.attr);
- if (error)
+ if (error) {
printk(KERN_ERR "sysfs_create_file failed: %d\n", error);
+ return error;
+ }
error = sysfs_create_file(power_kobj,
- &clocks_off_while_idle_attr.attr);
+ &gpio_clocks_off_while_idle_attr.attr);
if (error)
printk(KERN_ERR "sysfs_create_file failed: %d\n", error);
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 68c9278..d446ea4 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -17,7 +17,7 @@ extern int omap2_pm_init(void);
extern int omap3_pm_init(void);
extern unsigned short enable_dyn_sleep;
-extern unsigned short clocks_off_while_idle;
+extern unsigned short gpio_clocks_off_while_idle;
extern atomic_t sleep_block;
extern void omap2_block_sleep(void);
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a16eb33..0baf359 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -53,6 +53,43 @@ static void (*saved_idle)(void);
static struct powerdomain *mpu_pwrdm;
+/* Dynamic GPIO clock handling for sleep routines.
+ * omap_sram_idle() will call these functions and they will dynamically
+ * enable / disable GPIO clocks to allow sleep transitions. */
+#define NUM_OF_PERGPIOS 5
+static struct clk *gpio_fcks[NUM_OF_PERGPIOS];
+
+/* Enable GPIO clocks from sleep routines if allowed */
+static void per_gpio_clk_enable(void)
+{
+ int i;
+
+ if (gpio_clocks_off_while_idle == 0)
+ return;
+ for (i = 1; i < NUM_OF_PERGPIOS + 1; i++)
+ clk_enable(gpio_fcks[i-1]);
+}
+
+/* Disable GPIO clocks from sleep routines if allowed */
+static void per_gpio_clk_disable(void)
+{
+ int i;
+
+ if (gpio_clocks_off_while_idle == 0)
+ return;
+ for (i = 1; i < NUM_OF_PERGPIOS + 1; i++)
+ clk_disable(gpio_fcks[i-1]);
+}
+
+/* XXX This is for gpio fclk hack. Will be removed as gpio driver
+ * handles fcks correctly */
+static void gpio_fclk_mask(u32 *fclk)
+{
+ if (gpio_clocks_off_while_idle == 0)
+ return;
+
[PATCH 19/29] OMAP3: Do not set mpu, core, neon states if cpuidle is used
From: Jouni Hogander <[EMAIL PROTECTED]> Let the cpuidle do the selection. Signed-off-by: Git administrator <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/pm34xx.c | 17 ++--- 1 files changed, 10 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d696dde..d6acf6c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -815,12 +815,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) if (!pwrst) return -ENOMEM; pwrst->pwrdm = pwrdm; - if (!strcmp(pwrst->pwrdm->name, "core_pwrdm") || - !strcmp(pwrst->pwrdm->name, "mpu_pwrdm") || - !strcmp(pwrst->pwrdm->name, "mpu_pwrdm")) - pwrst->next_state = PWRDM_POWER_ON; - else - pwrst->next_state = PWRDM_POWER_OFF; + pwrst->next_state = PWRDM_POWER_RET; list_add(&pwrst->node, &pwrst_list); if (pwrdm_has_hdwr_sar(pwrdm)) @@ -838,7 +833,15 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) if (sysfs_create_file(suspend_dir_kobj, &(attr->attr))) return -ENOMEM; - return set_pwrdm_state(pwrst->pwrdm, pwrst->next_state); +#ifdef CONFIG_CPU_IDLE + /* Let cpuidle do selection here */ + if (!strcmp(pwrst->pwrdm->name, "core_pwrdm") || + !strcmp(pwrst->pwrdm->name, "mpu_pwrdm") || + !strcmp(pwrst->pwrdm->name, "neon_pwrdm")) + return set_pwrdm_state(pwrst->pwrdm, PWRDM_POWER_ON); + else +#endif + return set_pwrdm_state(pwrst->pwrdm, pwrst->next_state); } void omap_push_sram_idle() -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 05/29] Basic cpuidle driver
From: Rajendra Nayak <[EMAIL PROTECTED]>
OMAP3 Basic cpuidle
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/cpuidle34xx.c | 245 +
arch/arm/mach-omap2/cpuidle34xx.h | 56 +
arch/arm/mach-omap2/pm34xx.c |5 +-
4 files changed, 306 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-omap2/cpuidle34xx.c
create mode 100644 arch/arm/mach-omap2/cpuidle34xx.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e18da0c..a514562 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -23,7 +23,7 @@ ifeq ($(CONFIG_PM),y)
obj-y += pm.o
obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP24XX)+= sleep24xx.o
-obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o
+obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o cpuidle34xx.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
endif
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
new file mode 100644
index 000..d06146d
--- /dev/null
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -0,0 +1,245 @@
+/*
+ * linux/arch/arm/mach-omap2/cpuidle34xx.c
+ *
+ * OMAP3 CPU IDLE Routines
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Rajendra Nayak <[EMAIL PROTECTED]>
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Karthik Dasu <[EMAIL PROTECTED]>
+ *
+ * Copyright (C) 2006 Nokia Corporation
+ * Tony Lindgren <[EMAIL PROTECTED]>
+ *
+ * Copyright (C) 2005 Texas Instruments, Inc.
+ * Richard Woodruff <[EMAIL PROTECTED]>
+ *
+ * Based on pm.c for omap2
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include
+#include
+#include
+#include
+#include "cpuidle34xx.h"
+
+#ifdef CONFIG_CPU_IDLE
+
+struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
+struct omap3_processor_cx current_cx_state;
+
+static int omap3_idle_bm_check(void)
+{
+ return 0;
+}
+
+/* omap3_enter_idle - Programs OMAP3 to enter the specified state.
+ * returns the total time during which the system was idle.
+ */
+static int omap3_enter_idle(struct cpuidle_device *dev,
+ struct cpuidle_state *state)
+{
+ struct omap3_processor_cx *cx = cpuidle_get_statedata(state);
+ struct timespec ts_preidle, ts_postidle, ts_idle;
+ struct powerdomain *mpu_pd;
+
+ current_cx_state = *cx;
+
+ /* Used to keep track of the total time in idle */
+ getnstimeofday(&ts_preidle);
+
+
+ if (cx->type == OMAP3_STATE_C0) {
+ /* Do nothing for C0, not even a wfi */
+ return 0;
+ }
+
+ mpu_pd = pwrdm_lookup("mpu_pwrdm");
+ /* Program MPU to target state */
+ if (cx->mpu_state < PWRDM_POWER_ON)
+ pwrdm_set_next_pwrst(mpu_pd, cx->mpu_state);
+
+ /* Execute ARM wfi */
+ omap_sram_idle();
+
+ /* Program MPU to ON */
+ if (cx->mpu_state < PWRDM_POWER_ON)
+ pwrdm_set_next_pwrst(mpu_pd, PWRDM_POWER_ON);
+
+ getnstimeofday(&ts_postidle);
+ ts_idle = timespec_sub(ts_postidle, ts_preidle);
+ return timespec_to_ns(&ts_idle);
+}
+
+static int omap3_enter_idle_bm(struct cpuidle_device *dev,
+ struct cpuidle_state *state)
+{
+ struct cpuidle_state *new_state = NULL;
+ int i, j;
+
+ if ((state->flags & CPUIDLE_FLAG_CHECK_BM) && omap3_idle_bm_check()) {
+
+ /* Find current state in list */
+ for (i = 0; i < OMAP3_MAX_STATES; i++)
+ if (state == &dev->states[i])
+ break;
+ BUG_ON(i == OMAP3_MAX_STATES);
+
+ /* Back up to non 'CHECK_BM' state */
+ for (j = i - 1; j > 0; j--) {
+ struct cpuidle_state *s = &dev->states[j];
+
+ if (!(s->flags & CPUIDLE_FLAG_CHECK_BM)) {
+ new_state = s;
+ break;
+ }
+ }
+
+ pr_debug("%s: Bus activity: Entering %s (instead of %s)\n",
+ __func__, new_state->name, state->name);
+ }
+
+ return omap3_enter_idle(dev, new_state ? : state);
+}
+
+DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
+
+/* omap3_init_power_states - Initialises the OMAP3 specific C states.
+ * Below is the desciption of each C state.
+ *
+ C0 . System executing code
+ C1 . MPU WFI + Core active
+ C2 . MPU CSWR + Core active
+ C3 . MPU OFF + Core active
+ C4 . MPU CSWR + Core CSWR
+ C5 . MPU OFF + Core CSWR
+ C6 . MPU OFF + Core OFF
+ */
+void omap_init_power_states(void)
+{
+ /* C0 . System executing code */
+ oma
[PATCH 21/29] OMAP3: PM: Remove unneeded code from suspend
From: Jouni Hogander <[EMAIL PROTECTED]>
Removed code is in omap_sram_idle which is shared between cpuidle,
pm_idle and suspend.
Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c | 14 --
1 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 46b0b20..fc7da5a 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -514,21 +514,7 @@ static int omap3_pm_suspend(void)
goto restore;
}
- omap2_gpio_prepare_for_retention();
-
- omap_serial_enable_clocks(0, 0);
- omap_serial_enable_clocks(0, 1);
- omap_serial_enable_clocks(0, 2);
- per_gpio_clk_disable();
-
omap_sram_idle();
-
- omap_serial_enable_clocks(1, 0);
- omap_serial_enable_clocks(1, 1);
- omap_serial_enable_clocks(1, 2);
- per_gpio_clk_enable();
-
- omap2_gpio_resume_after_retention();
restore:
/* Restore next_pwrsts */
list_for_each_entry(pwrst, &pwrst_list, node) {
--
1.6.0
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[PATCH 29/29] PM: serial: ensure padconf wake-enable bits are set for UARTs
FIXME: there needs to be a platform specific way to set which
padconf regs are actually used, as the current ones
are specific to 3430SDP.
Signed-off-by: Kevin Hilman <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/serial.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index c189cc9..96e3165 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -298,6 +298,15 @@ void __init omap_serial_init(void)
v = __raw_readl(omap_uart_wk_en[i]);
v |= omap_uart_wk_bit[i];
__raw_writel(v, omap_uart_wk_en[i]);
+
+ /* Ensure PADCONF wake-enables are set */
+ if (cpu_is_omap34xx() && omap34xx_uart_padconf[i]) {
+ u16 w;
+
+ w = omap_ctrl_readw(omap34xx_uart_padconf[i]);
+ w |= 0x4000;
+ omap_ctrl_writew(w, omap34xx_uart_padconf[i]);
+ }
}
omap_serial_kick();
--
1.6.0
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[PATCH 26/29] OMAP: Sysfs interface for enabling voltage off in idle
From: Kalle Jokiniemi <[EMAIL PROTECTED]>
This patch creates a sysfs interface (/sys/power/voltage_off_while_idle) to
set or clear a variable which can be used in determining wether voltage
regulators should be shut down in idle.
Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm.c | 21 -
arch/arm/mach-omap2/pm.h |1 +
2 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index c063565..c89de1e 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -36,6 +36,7 @@
unsigned short enable_dyn_sleep;
unsigned short gpio_clocks_off_while_idle;
unsigned short uart_clocks_off_while_idle;
+unsigned short voltage_off_while_idle;
atomic_t sleep_block = ATOMIC_INIT(0);
static ssize_t idle_show(struct kobject *, struct kobj_attribute *, char *);
@@ -51,6 +52,9 @@ static struct kobj_attribute gpio_clocks_off_while_idle_attr =
static struct kobj_attribute uart_clocks_off_while_idle_attr =
__ATTR(uart_clocks_off_while_idle, 0644, idle_show, idle_store);
+static struct kobj_attribute voltage_off_while_idle_attr =
+ __ATTR(voltage_off_while_idle, 0644, idle_show, idle_store);
+
static ssize_t idle_show(struct kobject *kobj, struct kobj_attribute *attr,
char *buf)
{
@@ -60,6 +64,8 @@ static ssize_t idle_show(struct kobject *kobj, struct
kobj_attribute *attr,
return sprintf(buf, "%hu\n", gpio_clocks_off_while_idle);
else if (attr == &uart_clocks_off_while_idle_attr)
return sprintf(buf, "%hu\n", uart_clocks_off_while_idle);
+ else if (attr == &voltage_off_while_idle_attr)
+ return sprintf(buf, "%hu\n", voltage_off_while_idle);
else
return -EINVAL;
}
@@ -81,6 +87,8 @@ static ssize_t idle_store(struct kobject *kobj, struct
kobj_attribute *attr,
gpio_clocks_off_while_idle = value;
else if (attr == &uart_clocks_off_while_idle_attr)
uart_clocks_off_while_idle = value;
+ else if (attr == &voltage_off_while_idle_attr)
+ voltage_off_while_idle = value;
else
return -EINVAL;
@@ -129,9 +137,20 @@ static int __init omap_pm_init(void)
error = sysfs_create_file(power_kobj,
&gpio_clocks_off_while_idle_attr.attr);
- if (error)
+ if (error) {
printk(KERN_ERR "sysfs_create_file failed: %d\n", error);
+ return error;
+ }
+ voltage_off_while_idle = 0;
+ /* Going to 0V on anything under ES2.1 will eventually cause a crash */
+ if (is_sil_rev_greater_than(OMAP3430_REV_ES2_0)) {
+ error = sysfs_create_file(power_kobj,
+ &voltage_off_while_idle_attr.attr);
+ if (error)
+ printk(KERN_ERR "sysfs_create_file failed: %d\n",
+ error);
+ }
return error;
}
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 7776cdb..aad4aeb 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -19,6 +19,7 @@ extern int omap3_pm_init(void);
extern unsigned short enable_dyn_sleep;
extern unsigned short gpio_clocks_off_while_idle;
extern unsigned short uart_clocks_off_while_idle;
+extern unsigned short voltage_off_while_idle;
extern atomic_t sleep_block;
extern void omap2_block_sleep(void);
--
1.6.0
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[PATCH 23/29] OMAP3: PM: Add new Kconfig option to enable/disable off mode
From: Jouni Hogander <[EMAIL PROTECTED]> Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/Kconfig |6 ++ arch/arm/mach-omap2/cpuidle34xx.c | 12 arch/arm/mach-omap2/pm34xx.c |4 3 files changed, 22 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 362edfa..5c0eafc 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -142,3 +142,9 @@ config OMAP_TICK_GPTIMER due to hardware sensitivity to glitches on the OMAP 32kHz clock input. +config OMAP3_OFF_MODE + bool "OMAP 3430 OFF mode support" + depends on ARCH_OMAP3 + default n + help + Use off mode for powerdomains. \ No newline at end of file diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index c970a06..248b365 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -555,7 +555,11 @@ void omap_init_power_states(void) CPUIDLE_FLAG_BALANCED; /* C3 . MPU OFF + Core active */ +#ifdef CONFIG_OMAP3_OFF_MODE omap3_power_states[OMAP3_STATE_C3].valid = 1; +#else + omap3_power_states[OMAP3_STATE_C3].valid = 0; +#endif omap3_power_states[OMAP3_STATE_C3].type = OMAP3_STATE_C3; omap3_power_states[OMAP3_STATE_C3].sleep_latency = 1500; omap3_power_states[OMAP3_STATE_C3].wakeup_latency = 1800; @@ -577,7 +581,11 @@ void omap_init_power_states(void) CPUIDLE_FLAG_BALANCED | CPUIDLE_FLAG_CHECK_BM; /* C5 . MPU OFF + Core CSWR */ +#ifdef CONFIG_OMAP3_OFF_MODE omap3_power_states[OMAP3_STATE_C5].valid = 1; +#else + omap3_power_states[OMAP3_STATE_C5].valid = 0; +#endif omap3_power_states[OMAP3_STATE_C5].type = OMAP3_STATE_C5; omap3_power_states[OMAP3_STATE_C5].sleep_latency = 3000; omap3_power_states[OMAP3_STATE_C5].wakeup_latency = 8500; @@ -588,7 +596,11 @@ void omap_init_power_states(void) CPUIDLE_FLAG_BALANCED | CPUIDLE_FLAG_CHECK_BM; /* C6 . MPU OFF + Core OFF */ +#ifdef CONFIG_OMAP3_OFF_MODE omap3_power_states[OMAP3_STATE_C6].valid = 1; +#else + omap3_power_states[OMAP3_STATE_C6].valid = 0; +#endif omap3_power_states[OMAP3_STATE_C6].type = OMAP3_STATE_C6; omap3_power_states[OMAP3_STATE_C6].sleep_latency = 1; omap3_power_states[OMAP3_STATE_C6].wakeup_latency = 3; diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fc7da5a..53814b6 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -801,7 +801,11 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm) if (!pwrst) return -ENOMEM; pwrst->pwrdm = pwrdm; +#ifdef CONFIG_OMAP3_OFF_MODE + pwrst->next_state = PWRDM_POWER_OFF; +#else pwrst->next_state = PWRDM_POWER_RET; +#endif list_add(&pwrst->node, &pwrst_list); if (pwrdm_has_hdwr_sar(pwrdm)) -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 28/29] PM FIX: convert TI io_p2v() usage to OMAP2_IO_ADDRESS()
Signed-off-by: Kevin Hilman <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 5242ba0..7436332 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -222,7 +222,7 @@ static void restore_table_entry(void)
u32 previous_value, control_reg_value;
u32 *address;
/* Get virtual address of SCRATCHPAD */
- scratchpad_address = (u32 *) io_p2v(SCRATCHPAD);
+ scratchpad_address = (u32 *) OMAP2_IO_ADDRESS(SCRATCHPAD);
/* Get address of entry that was modified */
address = (u32 *) *(scratchpad_address + TABLE_ADDRESS_OFFSET);
/* Get the previous value which needs to be restored */
@@ -924,7 +924,7 @@ void clear_scratchpad_contents(void)
u32 max_offset = SCRATHPAD_ROM_OFFSET;
u32 offset = 0;
u32 v;
- u32 v_addr = io_p2v(SCRATCHPAD_ROM);
+ u32 v_addr = OMAP2_IO_ADDRESS(SCRATCHPAD_ROM);
if (__raw_readl(OMAP3430_PRM_RSTST) & 0x1) {
for ( ; offset <= max_offset; offset += 0x4)
__raw_writel(0x0, (v_addr + offset));
@@ -942,7 +942,7 @@ void save_scratchpad_contents(void)
u32 *sdram_context_address;
/* Get virtual address of SCRATCHPAD */
- scratchpad_address = (u32 *) io_p2v(SCRATCHPAD);
+ scratchpad_address = (u32 *) OMAP2_IO_ADDRESS(SCRATCHPAD);
/* Get Restore pointer to jump to while waking up from OFF */
restore_address = get_restore_pointer();
/* Convert it to physical address */
--
1.6.0
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[PATCH 20/29] OMAP3: PM: Fixed header paths in include statements
From: Jouni Hogander <[EMAIL PROTECTED]> Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/cpuidle34xx.c | 14 +++--- arch/arm/mach-omap2/pm34xx.c |2 +- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index b19d2eb..11ff573 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -23,13 +23,13 @@ */ #include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include +#include #include #include "cpuidle34xx.h" #include "cm.h" diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d6acf6c..46b0b20 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include "sdrc.h" #include "cm.h" -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 24/29] OMAP3SDP: Add new config for off mode testing
From: Jouni Hogander <[EMAIL PROTECTED]> Signed-off-by: Jouni Hogander <[EMAIL PROTECTED]> --- arch/arm/configs/omap_3430sdp_offmode_defconfig | 1073 +++ 1 files changed, 1073 insertions(+), 0 deletions(-) create mode 100644 arch/arm/configs/omap_3430sdp_offmode_defconfig diff --git a/arch/arm/configs/omap_3430sdp_offmode_defconfig b/arch/arm/configs/omap_3430sdp_offmode_defconfig new file mode 100644 index 000..0d8ee50 --- /dev/null +++ b/arch/arm/configs/omap_3430sdp_offmode_defconfig @@ -0,0 +1,1073 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc3-omap1 +# Fri Aug 22 11:46:52 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0x +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is n
[PATCH 14/29] CORE context save/restore
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch adds the CORE context save/restore routines
- save/restores the following
1) PRCM registers
2) INTC context
3) System Control module context
4) Padconf
---
arch/arm/mach-omap2/cpuidle34xx.c | 608 ++---
arch/arm/mach-omap2/cpuidle34xx.h | 33 ++-
arch/arm/mach-omap2/pm34xx.c | 144 +++-
arch/arm/mach-omap2/prm.h |2 +
arch/arm/mach-omap2/serial.c | 19 +-
arch/arm/mach-omap2/sleep34xx.S | 12 +-
arch/arm/plat-omap/include/mach/common.h |2 +-
arch/arm/plat-omap/include/mach/control.h | 22 +-
arch/arm/plat-omap/include/mach/prcm.h| 56 +++-
arch/arm/plat-omap/sram.c |9 +-
drivers/serial/8250.c | 20 +
11 files changed, 755 insertions(+), 172 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index ee58873..a02da6d 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -28,7 +28,382 @@
#include
#include
#include
+#include
+#include
+#include
#include "cpuidle34xx.h"
+#include "cm.h"
+#include "cm-regbits-34xx.h"
+#include "prm-regbits-34xx.h"
+#include "prm.h"
+#include "pm.h"
+#include "clock34xx.h"
+
+static int padconf_saved;
+void omap3_save_prcm_ctx(void)
+{
+ prcm_sleep_save[1] = omap_readl(INTC_MIR_0);
+ prcm_sleep_save[2] = omap_readl(INTC_MIR_1);
+ prcm_sleep_save[3] = omap_readl(INTC_MIR_2);
+ prcm_sleep_save[4] = omap_readl(CONTROL_PADCONF_SYS_NIRQ);
+ prcm_sleep_save[5] = omap_readl(OMAP34XX_GPIO1_IRQENABLE1);
+ prcm_sleep_save[6] = omap_readl(OMAP34XX_GPIO1_WAKEUPEN);
+ prcm_sleep_save[7] = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
+ prcm_sleep_save[8] = __raw_readl(OMAP3430_CM_SYSCONFIG);
+ prcm_sleep_save[9] = cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
+ prcm_sleep_save[10] = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
+ prcm_sleep_save[11] = cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
+ prcm_sleep_save[12] = cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
+ prcm_sleep_save[13] = cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
+ prcm_sleep_save[14] = cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
+ prcm_sleep_save[15] = cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[16] = cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
+ prcm_sleep_save[17] = cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
+ prcm_sleep_save[18] = __raw_readl(OMAP3430_CM_POLCTRL);
+ prcm_sleep_save[19] = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
+ prcm_sleep_save[20] = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
+ prcm_sleep_save[21] = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
+ prcm_sleep_save[22] = cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
+ prcm_sleep_save[23] = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
+ prcm_sleep_save[24] = cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
+ prcm_sleep_save[25] = cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
+ prcm_sleep_save[26] = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
+ prcm_sleep_save[27] = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
+ CM_FCLKEN);
+ prcm_sleep_save[28] = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
+ prcm_sleep_save[29] = cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
+ prcm_sleep_save[30] = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
+ prcm_sleep_save[31] = cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
+ prcm_sleep_save[32] = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
+ prcm_sleep_save[33] = cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
+ prcm_sleep_save[34] = cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
+ prcm_sleep_save[35] = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
+ prcm_sleep_save[36] = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
+ CM_ICLKEN);
+ prcm_sleep_save[37] = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
+ prcm_sleep_save[38] = cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
+ prcm_sleep_save[39] = cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
+ prcm_sleep_save[40] = cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[41] = cm_read_mod_reg(MPU_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[42] = cm_read_mod_reg(CORE_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[43] = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
+ CM_CLKSTCTRL);
+ prcm_sleep_save[44] = cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[45] = cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[46] = cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSTCTRL);
+ prcm_sleep_save[47] = cm_read
[PATCH 15/29] OMAP3: PM: Move serial console check from omap3_can_sleep to idle loop
From: Jouni Hogander <[EMAIL PROTECTED]>
This fixes sluggish serial console.
Signed-off-by: Git administrator <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/cpuidle34xx.c |2 +-
arch/arm/mach-omap2/pm34xx.c |5 +++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index a02da6d..b19d2eb 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -431,7 +431,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
current_cx_state = *cx;
- if (cx->type == OMAP3_STATE_C0) {
+ if (cx->type == OMAP3_STATE_C0 || !omap_serial_can_sleep()) {
/* Do nothing for C0, not even a wfi */
return 0;
}
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index da6eae1..42fa546 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -398,8 +398,6 @@ int omap3_can_sleep(void)
return 0;
if (atomic_read(&sleep_block) > 0)
return 0;
- if (!omap_serial_can_sleep())
- return 0;
return 1;
}
@@ -478,6 +476,9 @@ static void omap3_pm_idle(void)
if (omap_irq_pending())
goto out;
+ if (!omap_serial_can_sleep())
+ goto out;
+
omap2_gpio_prepare_for_retention();
omap_serial_enable_clocks(0, 0);
--
1.6.0
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[PATCH 22/29] DMA context save / restore
From: Tero Kristo <[EMAIL PROTECTED]>
Signed-off-by: Tero Kristo <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/cpuidle34xx.c |3 +++
arch/arm/plat-omap/dma.c | 26 ++
arch/arm/plat-omap/include/mach/dma.h |3 +++
3 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 11ff573..c970a06 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
#include
#include "cpuidle34xx.h"
#include "cm.h"
@@ -392,6 +393,7 @@ void omap3_save_core_ctx(void)
omap_save_gpmc_ctx();
/* Save the system control module context, padconf already save above*/
omap_save_control_ctx();
+ omap_dma_global_context_save();
}
void omap3_restore_core_ctx(void)
@@ -402,6 +404,7 @@ void omap3_restore_core_ctx(void)
omap_restore_gpmc_ctx();
/* Restore the interrupt controller context */
omap_restore_intc_ctx();
+ omap_dma_global_context_restore();
padconf_saved = 0;
}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index eaea12a..38c57ce 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -51,6 +51,12 @@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOTSTARTED };
static int enable_1510_mode;
+static struct omap_dma_global_context_registers {
+ u32 dma_irqenable_l0;
+ u32 dma_ocp_sysconfig;
+ u32 dma_gcr;
+} omap_dma_global_context;
+
struct omap_dma_lch {
int next_lch;
int dev_id;
@@ -2291,6 +2297,26 @@ void omap_stop_lcd_dma(void)
}
EXPORT_SYMBOL(omap_stop_lcd_dma);
+void omap_dma_global_context_save(void)
+{
+ omap_dma_global_context.dma_irqenable_l0 =
+ dma_read(IRQENABLE_L0);
+ omap_dma_global_context.dma_ocp_sysconfig =
+ dma_read(OCP_SYSCONFIG);
+ omap_dma_global_context.dma_gcr = dma_read(GCR);
+}
+EXPORT_SYMBOL(omap_dma_global_context_save);
+
+void omap_dma_global_context_restore(void)
+{
+ dma_write(omap_dma_global_context.dma_gcr, GCR);
+ dma_write(omap_dma_global_context.dma_ocp_sysconfig,
+ OCP_SYSCONFIG);
+ dma_write(omap_dma_global_context.dma_irqenable_l0,
+ IRQENABLE_L0);
+}
+EXPORT_SYMBOL(omap_dma_global_context_restore);
+
/**/
static int __init omap_init_dma(void)
diff --git a/arch/arm/plat-omap/include/mach/dma.h
b/arch/arm/plat-omap/include/mach/dma.h
index 54fe966..f1f588a 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -528,6 +528,9 @@ extern void omap_set_dma_dst_endian_type(int lch, enum
end_type etype);
extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
extern int omap_get_dma_index(int lch, int *ei, int *fi);
+void omap_dma_global_context_save(void);
+void omap_dma_global_context_restore(void);
+
/* Chaining APIs */
#ifndef CONFIG_ARCH_OMAP1
extern int omap_request_dma_chain(int dev_id, const char *dev_name,
--
1.6.0
--
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[PATCH 12/29] gpio context save/restore
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch adds the context save restore functions for GPIO
---
arch/arm/plat-omap/gpio.c| 92 ++
arch/arm/plat-omap/include/mach/common.h |2 +
2 files changed, 94 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index ac55616..401120f 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -101,6 +101,7 @@
#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
#define OMAP24XX_GPIO_IRQENABLE2 0x002c
#define OMAP24XX_GPIO_IRQENABLE1 0x001c
+#define OMAP24XX_GPIO_WAKE_EN 0x0020
#define OMAP24XX_GPIO_CTRL 0x0030
#define OMAP24XX_GPIO_OE 0x0034
#define OMAP24XX_GPIO_DATAIN 0x0038
@@ -217,6 +218,22 @@ static struct gpio_bank gpio_bank_34xx[6] = {
{ OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160,
METHOD_GPIO_24XX },
};
+struct gpio_restore_regs {
+ u32 gpio_sysconfig;
+ u32 gpio_irqenable1;
+ u32 gpio_irqenable2;
+ u32 gpio_wake_en;
+ u32 gpio_ctrl;
+ u32 gpio_oe;
+ u32 gpio_leveldetect0;
+ u32 gpio_leveldetect1;
+ u32 gpio_risingdetect;
+ u32 gpio_fallingdetect;
+ u32 gpio_dataout;
+ u32 gpio_setwkuena;
+ u32 gpio_setdataout;
+};
+static struct gpio_restore_regs gpio_restore_banks[6];
#endif
static struct gpio_bank *gpio_bank;
@@ -1707,6 +1724,81 @@ void omap2_gpio_resume_after_retention(void)
#endif
+#ifdef CONFIG_ARCH_OMAP34XX
+/* save the registers of bank 2-6 */
+void omap_gpio_save(void)
+{
+ int i;
+ /* saving banks from 2-6 only */
+ for (i = 1; i < gpio_bank_count; i++) {
+ struct gpio_bank *bank = &gpio_bank[i];
+ gpio_restore_banks[i].gpio_sysconfig =
+ __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ gpio_restore_banks[i].gpio_irqenable1 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ gpio_restore_banks[i].gpio_irqenable2 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ gpio_restore_banks[i].gpio_wake_en =
+ __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN);
+ gpio_restore_banks[i].gpio_ctrl =
+ __raw_readl(bank->base + OMAP24XX_GPIO_CTRL);
+ gpio_restore_banks[i].gpio_oe =
+ __raw_readl(bank->base + OMAP24XX_GPIO_OE);
+ gpio_restore_banks[i].gpio_leveldetect0 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ gpio_restore_banks[i].gpio_leveldetect1 =
+ __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ gpio_restore_banks[i].gpio_risingdetect =
+ __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ gpio_restore_banks[i].gpio_fallingdetect =
+ __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
+ gpio_restore_banks[i].gpio_dataout =
+ __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT);
+ gpio_restore_banks[i].gpio_setwkuena =
+ __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA);
+ gpio_restore_banks[i].gpio_setdataout =
+ __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT);
+ }
+}
+EXPORT_SYMBOL(omap_gpio_save);
+
+/* restore the required registers of bank 2-6 */
+void omap_gpio_restore(void)
+{
+ int i;
+ for (i = 1; i < gpio_bank_count; i++) {
+ struct gpio_bank *bank = &gpio_bank[i];
+ __raw_writel(gpio_restore_banks[i].gpio_sysconfig,
+ bank->base + OMAP24XX_GPIO_SYSCONFIG);
+ __raw_writel(gpio_restore_banks[i].gpio_irqenable1,
+ bank->base + OMAP24XX_GPIO_IRQENABLE1);
+ __raw_writel(gpio_restore_banks[i].gpio_irqenable2,
+ bank->base + OMAP24XX_GPIO_IRQENABLE2);
+ __raw_writel(gpio_restore_banks[i].gpio_wake_en,
+ bank->base + OMAP24XX_GPIO_WAKE_EN);
+ __raw_writel(gpio_restore_banks[i].gpio_ctrl,
+ bank->base + OMAP24XX_GPIO_CTRL);
+ __raw_writel(gpio_restore_banks[i].gpio_oe,
+ bank->base + OMAP24XX_GPIO_OE);
+ __raw_writel(gpio_restore_banks[i].gpio_leveldetect0,
+ bank->base + OMAP24XX_GPIO_LEVELDETECT0);
+ __raw_writel(gpio_restore_banks[i].gpio_leveldetect1,
+ bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+ __raw_writel(gpio_restore_banks[i].gpio_risingdetect,
+ bank->base + OMAP24XX_GPIO_RISINGDETECT);
+ __raw_w
[PATCH 27/29] OMAP3: OFF command integration
From: Kalle Jokiniemi <[EMAIL PROTECTED]>
This patch detects wether device is going into off mode and sets the
appropriate off command to be sent to voltage controller on WFI. By default
only I2C voltage lowering is used, but if user has enabled the
voltage_off_while_idle sysfs switch, SYS_OFFMODE signal is used.
Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm.c | 12 ++--
arch/arm/mach-omap2/pm34xx.c |7 +++
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index c89de1e..386e6c6 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -31,6 +31,7 @@
#include
#include
+#include "prm-regbits-34xx.h"
#include "pm.h"
unsigned short enable_dyn_sleep;
@@ -87,9 +88,16 @@ static ssize_t idle_store(struct kobject *kobj, struct
kobj_attribute *attr,
gpio_clocks_off_while_idle = value;
else if (attr == &uart_clocks_off_while_idle_attr)
uart_clocks_off_while_idle = value;
- else if (attr == &voltage_off_while_idle_attr)
+ else if (attr == &voltage_off_while_idle_attr) {
voltage_off_while_idle = value;
- else
+ if (voltage_off_while_idle)
+ prm_set_mod_reg_bits(OMAP3430_SEL_OFF, OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTCTRL_OFFSET);
+ else
+ prm_clear_mod_reg_bits(OMAP3430_SEL_OFF,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTCTRL_OFFSET);
+ } else
return -EINVAL;
return n;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0267959..5242ba0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -297,6 +297,9 @@ void omap_sram_idle(void)
omap_serial_enable_clocks(0, 2);
}
if (core_next_state == PWRDM_POWER_OFF) {
+ prm_set_mod_reg_bits(OMAP3430_AUTO_OFF,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTCTRL_OFFSET);
omap3_save_core_ctx();
omap3_save_prcm_ctx();
omap_save_uart_ctx(0);
@@ -334,6 +337,10 @@ void omap_sram_idle(void)
omap_restore_uart_ctx(0);
omap_restore_uart_ctx(1);
}
+ if (core_next_state == PWRDM_POWER_OFF)
+ prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF,
+ OMAP3430_GR_MOD,
+ OMAP3_PRM_VOLTCTRL_OFFSET);
if (per_next_state < PWRDM_POWER_ON) {
per_gpio_clk_enable();
/* This would be actually more effective */
--
1.6.0
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[PATCH 18/29] OMAP3: PM: Do not build pm_idle loop if cpuidle is used
From: Jouni Hogander <[EMAIL PROTECTED]>
Signed-off-by: Git administrator <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ae324b4..d696dde 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -465,6 +465,7 @@ err:
return ret;
}
+#ifndef CONFIG_CPU_IDLE
static void omap3_pm_idle(void)
{
local_irq_disable();
@@ -484,6 +485,7 @@ out:
local_fiq_enable();
local_irq_enable();
}
+#endif /* CONFIG_CPU_IDLE */
static int omap3_pm_prepare(void)
{
--
1.6.0
--
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[PATCH 06/29] per/neon and core handling in idle
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patches adds handling of PER/NEON and CORE domain in idle.
---
arch/arm/mach-omap2/cpuidle34xx.c | 94 ++---
arch/arm/mach-omap2/cpuidle34xx.h |6 ++-
arch/arm/mach-omap2/pm34xx.c | 38 ---
3 files changed, 101 insertions(+), 37 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index d06146d..99ecd75 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,8 @@
#include
#include
#include
+#include
+#include
#include "cpuidle34xx.h"
#ifdef CONFIG_CPU_IDLE
@@ -35,6 +37,8 @@ struct omap3_processor_cx current_cx_state;
static int omap3_idle_bm_check(void)
{
+ if (!omap3_can_sleep())
+ return 1;
return 0;
}
@@ -46,34 +50,82 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
{
struct omap3_processor_cx *cx = cpuidle_get_statedata(state);
struct timespec ts_preidle, ts_postidle, ts_idle;
- struct powerdomain *mpu_pd;
+ struct powerdomain *mpu_pd, *core_pd, *per_pd, *neon_pd;
+ int per_pwrst, neon_pwrst;
current_cx_state = *cx;
- /* Used to keep track of the total time in idle */
- getnstimeofday(&ts_preidle);
-
-
if (cx->type == OMAP3_STATE_C0) {
/* Do nothing for C0, not even a wfi */
return 0;
}
+ /* Used to keep track of the total time in idle */
+ getnstimeofday(&ts_preidle);
+
mpu_pd = pwrdm_lookup("mpu_pwrdm");
+ core_pd = pwrdm_lookup("core_pwrdm");
+ per_pd = pwrdm_lookup("per_pwrdm");
+ neon_pd = pwrdm_lookup("neon_pwrdm");
+
+ /* Reset previous power state registers */
+ pwrdm_clear_all_prev_pwrst(mpu_pd);
+ pwrdm_clear_all_prev_pwrst(neon_pd);
+ pwrdm_clear_all_prev_pwrst(core_pd);
+ pwrdm_clear_all_prev_pwrst(per_pd);
+
+ if (omap_irq_pending())
+ return 0;
+
+ per_pwrst = pwrdm_read_pwrst(per_pd);
+ neon_pwrst = pwrdm_read_pwrst(neon_pd);
+
/* Program MPU to target state */
- if (cx->mpu_state < PWRDM_POWER_ON)
+ if (cx->mpu_state < PWRDM_POWER_ON) {
+ if (neon_pwrst == PWRDM_POWER_ON)
+ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_RET);
pwrdm_set_next_pwrst(mpu_pd, cx->mpu_state);
+ }
+
+ /* Program CORE and PER to target state */
+ if (cx->core_state < PWRDM_POWER_ON) {
+ if (per_pwrst == PWRDM_POWER_ON) {
+ omap2_gpio_prepare_for_retention();
+ per_gpio_clk_disable();
+ omap_serial_enable_clocks(0);
+ }
+ pwrdm_set_next_pwrst(core_pd, cx->core_state);
+ }
/* Execute ARM wfi */
omap_sram_idle();
- /* Program MPU to ON */
- if (cx->mpu_state < PWRDM_POWER_ON)
+ /* Program MPU/NEON to ON */
+ if (cx->mpu_state < PWRDM_POWER_ON) {
+ if (neon_pwrst == PWRDM_POWER_ON)
+ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_ON);
pwrdm_set_next_pwrst(mpu_pd, PWRDM_POWER_ON);
+ }
+
+ if (cx->core_state < PWRDM_POWER_ON) {
+ if (per_pwrst == PWRDM_POWER_ON) {
+ omap_serial_enable_clocks(1);
+ per_gpio_clk_enable();
+ omap2_gpio_resume_after_retention();
+ }
+ pwrdm_set_next_pwrst(core_pd, PWRDM_POWER_ON);
+ }
+
+ pr_debug("MPU prev st:%x,NEON prev st:%x\n",
+ pwrdm_read_prev_pwrst(mpu_pd),
+ pwrdm_read_prev_pwrst(neon_pd));
+ pr_debug("PER prev st:%x,CORE prev st:%x\n",
+ pwrdm_read_prev_pwrst(per_pd),
+ pwrdm_read_prev_pwrst(core_pd));
getnstimeofday(&ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
- return timespec_to_ns(&ts_idle);
+ return (u32)timespec_to_ns(&ts_idle)/1000;
}
static int omap3_enter_idle_bm(struct cpuidle_device *dev,
@@ -130,7 +182,7 @@ void omap_init_power_states(void)
omap3_power_states[0].threshold = 0;
omap3_power_states[0].mpu_state = PWRDM_POWER_ON;
omap3_power_states[0].core_state = PWRDM_POWER_ON;
- omap3_power_states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+ omap3_power_states[0].flags = CPUIDLE_FLAG_SHALLOW;
/* C1 . MPU WFI + Core active */
omap3_power_states[1].valid = 1;
@@ -140,7 +192,8 @@ void omap_init_power_states(void)
omap3_power_states[1].threshold = 30;
omap3_power_states[1].mpu_state = PWRDM_POWER_ON;
omap3_power_states[1].core_state = PWRDM_POWER_ON;
- omap3_power_states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+ omap3_power_states[1].flags = CPUIDLE_FLAG_TI
[PATCH 25/29] OMAP3: Remove CONFIG_OMAP_SYSOFFMODE flag
From: Kalle Jokiniemi <[EMAIL PROTECTED]> Remove CONFIG_OMAP_SYSOFFMODE flag and do the full initialization of voltage controller . Enabling automatic sending of OFF command and selecting wether SYS_OFF_MODE signal is used should be determined dynamically. Hence they are now not set in the initialization. The sleep voltage for OFF mode is changed to default 1,2V for VDD1 and 1,15V for VDD2. Using the 0,9V setting causes hangup. Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/pm34xx.c | 10 +- arch/arm/mach-omap2/prm-regbits-34xx.h |4 ++-- 2 files changed, 3 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 53814b6..0267959 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -1060,10 +1060,7 @@ static void __init configure_vc(void) OMAP3_PRM_VC_I2C_CFG_OFFSET); /* Setup voltctrl and other setup times */ - -#ifdef CONFIG_OMAP_SYSOFFMODE - prm_write_mod_reg(OMAP3430_AUTO_OFF | OMAP3430_AUTO_RET | - OMAP3430_SEL_OFF, OMAP3430_GR_MOD, + prm_write_mod_reg(OMAP3430_AUTO_RET, OMAP3430_GR_MOD, OMAP3_PRM_VOLTCTRL_OFFSET); prm_write_mod_reg(OMAP3430_CLKSETUP_DURATION, OMAP3430_GR_MOD, @@ -1078,11 +1075,6 @@ static void __init configure_vc(void) OMAP3_PRM_VOLTOFFSET_OFFSET); prm_write_mod_reg(OMAP3430_VOLTSETUP2_DURATION, OMAP3430_GR_MOD, OMAP3_PRM_VOLTSETUP2_OFFSET); -#else - prm_set_mod_reg_bits(OMAP3430_AUTO_RET, OMAP3430_GR_MOD, - OMAP3_PRM_VOLTCTRL_OFFSET); -#endif - } static int __init omap3_pm_early_init(void) diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index f82b5a7..d73eee8 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -466,13 +466,13 @@ #define OMAP3430_VC_CMD_VAL0_ON(0x3 << 4) #define OMAP3430_VC_CMD_VAL0_ONLP (0x3 << 3) #define OMAP3430_VC_CMD_VAL0_RET (0x3 << 3) -#define OMAP3430_VC_CMD_VAL0_OFF (0x3 << 3) +#define OMAP3430_VC_CMD_VAL0_OFF (0x3 << 4) /* PRM_VC_CMD_VAL_1 specific bits */ #define OMAP3430_VC_CMD_VAL1_ON(0xB << 2) #define OMAP3430_VC_CMD_VAL1_ONLP (0x3 << 3) #define OMAP3430_VC_CMD_VAL1_RET (0x3 << 3) -#define OMAP3430_VC_CMD_VAL1_OFF (0x3 << 3) +#define OMAP3430_VC_CMD_VAL1_OFF (0xB << 2) /* PRM_VC_CH_CONF */ #define OMAP3430_CMD1 (1 << 20) -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/29] mpu off state enabled
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch updates the CPUidle code to handle MPU OFF related C states
---
arch/arm/mach-omap2/cpuidle34xx.c | 19 +++
arch/arm/mach-omap2/cpuidle34xx.h |5 +
2 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 99ecd75..ee58873 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -82,8 +82,12 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
/* Program MPU to target state */
if (cx->mpu_state < PWRDM_POWER_ON) {
- if (neon_pwrst == PWRDM_POWER_ON)
- pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_RET);
+ if (neon_pwrst == PWRDM_POWER_ON) {
+ if (cx->mpu_state == PWRDM_POWER_RET)
+ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_RET);
+ else if (cx->mpu_state == PWRDM_POWER_OFF)
+ pwrdm_set_next_pwrst(neon_pd, PWRDM_POWER_OFF);
+ }
pwrdm_set_next_pwrst(mpu_pd, cx->mpu_state);
}
@@ -97,9 +101,13 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
pwrdm_set_next_pwrst(core_pd, cx->core_state);
}
+ *(scratchpad_restore_addr) = restore_pointer_address;
+
/* Execute ARM wfi */
omap_sram_idle();
+ *(scratchpad_restore_addr) = 0x0;
+
/* Program MPU/NEON to ON */
if (cx->mpu_state < PWRDM_POWER_ON) {
if (neon_pwrst == PWRDM_POWER_ON)
@@ -207,7 +215,7 @@ void omap_init_power_states(void)
CPUIDLE_FLAG_BALANCED;
/* C3 . MPU OFF + Core active */
- omap3_power_states[3].valid = 0;
+ omap3_power_states[3].valid = 1;
omap3_power_states[3].type = OMAP3_STATE_C3;
omap3_power_states[3].sleep_latency = 1500;
omap3_power_states[3].wakeup_latency = 1800;
@@ -229,7 +237,7 @@ void omap_init_power_states(void)
CPUIDLE_FLAG_BALANCED | CPUIDLE_FLAG_CHECK_BM;
/* C5 . MPU OFF + Core CSWR */
- omap3_power_states[5].valid = 0;
+ omap3_power_states[5].valid = 1;
omap3_power_states[5].type = OMAP3_STATE_C5;
omap3_power_states[5].sleep_latency = 3000;
omap3_power_states[5].wakeup_latency = 8500;
@@ -266,6 +274,9 @@ int omap3_idle_init(void)
struct cpuidle_state *state;
struct cpuidle_device *dev;
+ clear_scratchpad_contents();
+ save_scratchpad_contents();
+
omap_init_power_states();
cpuidle_register_driver(&omap3_idle_driver);
diff --git a/arch/arm/mach-omap2/cpuidle34xx.h
b/arch/arm/mach-omap2/cpuidle34xx.h
index 46ed51e..f2ebe68 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.h
+++ b/arch/arm/mach-omap2/cpuidle34xx.h
@@ -40,6 +40,11 @@ extern void per_gpio_clk_enable(void);
extern void per_gpio_clk_disable(void);
extern void omap_serial_enable_clocks(int enable);
extern int omap3_can_sleep();
+extern void clear_scratchpad_contents(void);
+extern void save_scratchpad_contents(void);
+extern u32 *scratchpad_restore_addr;
+extern u32 restore_pointer_address;
+
struct omap3_processor_cx {
u8 valid;
u8 type;
--
1.6.0
--
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[PATCH 17/29] OMAP3: PM: Remove unneeded code from traditional pm_idle loop
From: Jouni Hogander <[EMAIL PROTECTED]> Remove code from traditional pm_idle loop. Removed code is in omap_sram_idle which is shared between cpuidle and pm_idle. Signed-off-by: Git administrator <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/pm34xx.c | 14 -- 1 files changed, 0 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 73f32a0..ae324b4 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -479,21 +479,7 @@ static void omap3_pm_idle(void) if (!omap_serial_can_sleep()) goto out; - omap2_gpio_prepare_for_retention(); - - omap_serial_enable_clocks(0, 0); - omap_serial_enable_clocks(0, 1); - omap_serial_enable_clocks(0, 2); - per_gpio_clk_disable(); - omap_sram_idle(); - - omap_serial_enable_clocks(1, 0); - omap_serial_enable_clocks(1, 1); - omap_serial_enable_clocks(1, 2); - per_gpio_clk_enable(); - - omap2_gpio_resume_after_retention(); out: local_fiq_enable(); local_irq_enable(); -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 16/29] OMAP3: PM: Remove static keyword from _omap_sram_idle declaration
From: Jouni Hogander <[EMAIL PROTECTED]> _omap_sram_idle is shared between cpuidle34xx.c and pm34xx.c so static keyword needs to be removed. Signed-off-by: Git administrator <[EMAIL PROTECTED]> --- arch/arm/mach-omap2/pm34xx.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 42fa546..73f32a0 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -60,7 +60,7 @@ u32 restore_pointer_address; static LIST_HEAD(pwrst_list); -static void (*_omap_sram_idle)(u32 *addr, int save_state); +void (*_omap_sram_idle)(u32 *addr, int save_state); static void (*saved_idle)(void); -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 11/29] serial context save/restore
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch adds the context save restore functions for UART
---
arch/arm/mach-omap2/serial.c | 62 ++
include/linux/serial_reg.h |1 +
2 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 281c1c7..879d7c1 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -83,6 +83,16 @@ static const u32 omap34xx_uart_padconf[OMAP_MAX_NR_PORTS] = {
CONTROL_PADCONF_UART3_RX
};
+struct omap_uart_regs {
+ u16 dll;
+ u16 dlh;
+ u16 ier;
+ u16 sysc;
+ u16 scr;
+ u16 wer;
+};
+static struct omap_uart_regs uart_ctx[OMAP_MAX_NR_PORTS];
+
static struct plat_serial8250_port serial_platform_data[] = {
{
.membase= IO_ADDRESS(OMAP_UART1_BASE),
@@ -314,6 +324,58 @@ static ssize_t awake_store(struct kobject *kobj, struct
kobj_attribute *attr,
return n;
}
+void omap_save_uart_ctx(int unum)
+{
+ u16 lcr = 0;
+
+ struct plat_serial8250_port *p = serial_platform_data + unum;
+
+ if (uart_ick[unum] == NULL)
+ return;
+
+ lcr = serial_read_reg(p, UART_LCR);
+ serial_write_reg(p, UART_LCR, 0xBF);
+ uart_ctx[unum].dll = serial_read_reg(p, UART_DLL);
+ uart_ctx[unum].dlh = serial_read_reg(p, UART_DLM);
+ serial_write_reg(p, UART_LCR, lcr);
+ uart_ctx[unum].ier = serial_read_reg(p, UART_IER);
+ uart_ctx[unum].sysc = serial_read_reg(p, UART_OMAP_SYSC);
+ uart_ctx[unum].scr = serial_read_reg(p, UART_OMAP_SCR);
+ uart_ctx[unum].wer = serial_read_reg(p, UART_OMAP_WER);
+}
+EXPORT_SYMBOL(omap_save_uart_ctx);
+
+void omap_restore_uart_ctx(int unum)
+{
+ u16 efr = 0;
+
+ struct plat_serial8250_port *p = serial_platform_data + unum;
+
+ if (uart_ick[unum] == NULL)
+ return;
+
+ serial_write_reg(p, UART_OMAP_MDR1, 0x7);
+ serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
+ efr = serial_read_reg(p, UART_EFR);
+ serial_write_reg(p, UART_EFR, UART_EFR_ECB);
+ serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */
+ serial_write_reg(p, UART_IER, 0x0);
+ serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
+ serial_write_reg(p, UART_DLL, uart_ctx[unum].dll);
+ serial_write_reg(p, UART_DLM, uart_ctx[unum].dlh);
+ serial_write_reg(p, UART_LCR, 0x0); /* Operational mode */
+ serial_write_reg(p, UART_IER, uart_ctx[unum].ier);
+ serial_write_reg(p, UART_FCR, 0xA1);
+ serial_write_reg(p, UART_LCR, 0xBF); /* Config B mode */
+ serial_write_reg(p, UART_EFR, efr);
+ serial_write_reg(p, UART_LCR, UART_LCR_WLEN8);
+ serial_write_reg(p, UART_OMAP_SCR, uart_ctx[unum].scr);
+ serial_write_reg(p, UART_OMAP_WER, uart_ctx[unum].wer);
+ serial_write_reg(p, UART_OMAP_SYSC, uart_ctx[unum].sysc);
+ serial_write_reg(p, UART_OMAP_MDR1, 0x00); /* UART 16x mode */
+}
+EXPORT_SYMBOL(omap_restore_uart_ctx);
+
static struct platform_device serial_device = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index 96c0d93..76ffd3c 100644
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -323,6 +323,7 @@
#define UART_OMAP_MVER 0x14/* Module version register */
#define UART_OMAP_SYSC 0x15/* System configuration register */
#define UART_OMAP_SYSS 0x16/* System status register */
+#define UART_OMAP_WER 0x17/* Wake-up enable register */
#endif /* _LINUX_SERIAL_REG_H */
--
1.6.0
--
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[PATCH 13/29] i2c context save/restore
From: Rajendra Nayak <[EMAIL PROTECTED]> This patch does i2c init/re-init for every transfer --- drivers/i2c/busses/i2c-omap.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 0f7cbe8..a661ed3 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -503,6 +503,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) omap_i2c_unidle(dev); + omap_i2c_init(dev); + if ((r = omap_i2c_wait_for_bb(dev)) < 0) goto out; -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 07/29] menuconfig updates for cpuidle
From: Rajendra Nayak <[EMAIL PROTECTED]> This patch enables the cpuidle option in menuconfig and selects the menu governor --- arch/arm/Kconfig| 10 ++ drivers/cpuidle/Kconfig | 26 +- 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index aa475d9..a365bfc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1005,6 +1005,16 @@ config ATAGS_PROC endmenu +if (ARCH_OMAP) + +menu "CPUIdle" + +source "drivers/cpuidle/Kconfig" + +endmenu + +endif + if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) menu "CPU Frequency scaling" diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig index 7dbc4a8..e27bb34 100644 --- a/drivers/cpuidle/Kconfig +++ b/drivers/cpuidle/Kconfig @@ -1,20 +1,36 @@ +menu "CPU idle PM support" config CPU_IDLE bool "CPU idle PM support" - default ACPI + default n help CPU idle is a generic framework for supporting software-controlled idle processor power management. It includes modular cross-platform governors that can be swapped during runtime. - If you're using an ACPI-enabled platform, you should say Y here. + If you're using a mobile platform that supports CPU idle PM (e.g. + an ACPI-capable notebook), you should say Y here. + +if CPU_IDLE + +comment "Governors" config CPU_IDLE_GOV_LADDER - bool + bool "ladder" depends on CPU_IDLE - default y + default n config CPU_IDLE_GOV_MENU - bool + bool "menu" depends on CPU_IDLE && NO_HZ default y +help + This cpuidle governor evaluates all available states and chooses the + deepest state that meets all of the following constraints: BM activity, + expected time until next timer interrupt, and last break event time + delta. It is designed to minimize power consumption. Currently + dynticks is required. + +endif # CPU_IDLE + +endmenu -- 1.6.0 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/29] gpmc context save/restore
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch adds the context save restore functions for GPMC
---
arch/arm/mach-omap2/gpmc.c | 80
arch/arm/plat-omap/include/mach/gpmc.h | 14 ++
2 files changed, 94 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f3e0271..32f36fa 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -54,6 +54,21 @@
#define GPMC_CHUNK_SHIFT 24 /* 16 MB */
#define GPMC_SECTION_SHIFT 28 /* 128 MB */
+/*
+ * Structure to save/restore gpmc context
+ * to support core off
+ */
+static struct gpmc_context {
+ u32 sysconfig;
+ u32 irqenable;
+ u32 timeout_ctrl;
+ u32 config;
+ u32 prefetch_config1;
+ u32 prefetch_config2;
+ u32 prefetch_control;
+ struct gpmc_cs_config cs_context[GPMC_CS_NUM];
+} gpmc_ctx;
+
static struct resource gpmc_mem_root;
static struct resource gpmc_cs_mem[GPMC_CS_NUM];
static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -451,3 +466,68 @@ void __init gpmc_init(void)
gpmc_mem_init();
}
+
+void omap_save_gpmc_ctx()
+{
+ int i;
+ gpmc_ctx.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
+ gpmc_ctx.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
+ gpmc_ctx.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
+ gpmc_ctx.config = gpmc_read_reg(GPMC_CONFIG);
+ gpmc_ctx.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
+ gpmc_ctx.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2);
+ gpmc_ctx.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL);
+ for (i = 0; i < GPMC_CS_NUM; i++) {
+ gpmc_ctx.cs_context[i].is_valid =
+ (gpmc_cs_read_reg(i, GPMC_CS_CONFIG7))
+ & (1 << 6);
+ if (gpmc_ctx.cs_context[i].is_valid) {
+ gpmc_ctx.cs_context[i].gpmc_config1 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG1);
+ gpmc_ctx.cs_context[i].gpmc_config2 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG2);
+ gpmc_ctx.cs_context[i].gpmc_config3 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG3);
+ gpmc_ctx.cs_context[i].gpmc_config4 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG4);
+ gpmc_ctx.cs_context[i].gpmc_config5 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG5);
+ gpmc_ctx.cs_context[i].gpmc_config6 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG6);
+ gpmc_ctx.cs_context[i].gpmc_config7 =
+ gpmc_cs_read_reg(i, GPMC_CS_CONFIG7);
+ }
+ }
+}
+
+void omap_restore_gpmc_ctx()
+{
+ int i;
+ gpmc_write_reg(GPMC_SYSCONFIG, gpmc_ctx.sysconfig);
+ gpmc_write_reg(GPMC_IRQENABLE, gpmc_ctx.irqenable);
+ gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_ctx.timeout_ctrl);
+ gpmc_write_reg(GPMC_CONFIG, gpmc_ctx.config);
+ gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_ctx.prefetch_config1);
+ gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_ctx.prefetch_config2);
+ gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_ctx.prefetch_control);
+ for (i = 0; i < GPMC_CS_NUM; i++) {
+ if (gpmc_ctx.cs_context[i].is_valid) {
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG1,
+ gpmc_ctx.cs_context[i].gpmc_config1);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG2,
+ gpmc_ctx.cs_context[i].gpmc_config2);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG3,
+ gpmc_ctx.cs_context[i].gpmc_config3);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG4,
+ gpmc_ctx.cs_context[i].gpmc_config4);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG5,
+ gpmc_ctx.cs_context[i].gpmc_config5);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG6,
+ gpmc_ctx.cs_context[i].gpmc_config6);
+ gpmc_cs_write_reg(i, GPMC_CS_CONFIG7,
+ gpmc_ctx.cs_context[i].gpmc_config7);
+ }
+ }
+}
+
+
diff --git a/arch/arm/plat-omap/include/mach/gpmc.h
b/arch/arm/plat-omap/include/mach/gpmc.h
index 921b165..133991c 100644
--- a/arch/arm/plat-omap/include/mach/gpmc.h
+++ b/arch/arm/plat-omap/include/mach/gpmc.h
@@ -90,6 +90,18 @@ struct gpmc_timings {
u16 wr_data_mux_bus;/* WRDATAONADMUXBUS */
};
+/* Structure to save gpmc cs context */
+struct gpmc_cs_config {
+ u32 gpmc_config1;
+ u32 gpmc_config2;
+
[PATCH 02/29] Added sleep support to UART
From: Tero Kristo <[EMAIL PROTECTED]>
UART usage (e.g. serial console) now denies sleep for 5 seconds. This
makes it possible to use serial console when dynamic idle is
enabled. Write 1 to /sys/power/uart_clocks_off_while_idle to enable uart
clock disable on idle. Without this omap won't enter retention.
Also moved code from pm-debug.c to serial.c, and made pm24xx.c use
this new implementation.
Sleep deny timer can be configured by writing desired value (in ms) to
/sys/devices/platform/serial8250.0/serial_awake_time (default 5000, i.e.
5 seconds.)
Signed-off-by: Tero Kristo <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm-debug.c | 132 --
arch/arm/mach-omap2/pm.c | 15 +++
arch/arm/mach-omap2/pm.h | 10 +--
arch/arm/mach-omap2/pm24xx.c | 54 +
arch/arm/mach-omap2/pm34xx.c | 13 ++
arch/arm/mach-omap2/serial.c | 180 +-
arch/arm/plat-omap/include/mach/common.h |3 +
7 files changed, 242 insertions(+), 165 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 1b14bcf..b00f5f4 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -37,138 +37,6 @@
#ifdef CONFIG_PM_DEBUG
int omap2_pm_debug = 0;
-static int serial_console_clock_disabled;
-static int serial_console_uart;
-static unsigned int serial_console_next_disable;
-
-static struct clk *console_iclk, *console_fclk;
-
-static void serial_console_kick(void)
-{
- serial_console_next_disable = omap2_read_32k_sync_counter();
- /* Keep the clocks on for 4 secs */
- serial_console_next_disable += 4 * 32768;
-}
-
-static void serial_wait_tx(void)
-{
- static const unsigned long uart_bases[3] = {
- 0x4806a000, 0x4806c000, 0x4806e000
- };
- unsigned long lsr_reg;
- int looped = 0;
-
- /* Wait for TX FIFO and THR to get empty */
- lsr_reg = IO_ADDRESS(uart_bases[serial_console_uart - 1] + (5 << 2));
- while ((__raw_readb(lsr_reg) & 0x60) != 0x60)
- looped = 1;
- if (looped)
- serial_console_kick();
-}
-
-u32 omap2_read_32k_sync_counter(void)
-{
-return omap_readl(OMAP2_32KSYNCT_BASE + 0x0010);
-}
-
-void serial_console_fclk_mask(u32 *f1, u32 *f2)
-{
- switch (serial_console_uart) {
- case 1:
- *f1 &= ~(1 << 21);
- break;
- case 2:
- *f1 &= ~(1 << 22);
- break;
- case 3:
- *f2 &= ~(1 << 2);
- break;
- }
-}
-
-void serial_console_sleep(int enable)
-{
- if (console_iclk == NULL || console_fclk == NULL)
- return;
-
- if (enable) {
- BUG_ON(serial_console_clock_disabled);
- if (clk_get_usecount(console_fclk) == 0)
- return;
- if ((int) serial_console_next_disable - (int)
omap2_read_32k_sync_counter() >= 0)
- return;
- serial_wait_tx();
- clk_disable(console_iclk);
- clk_disable(console_fclk);
- serial_console_clock_disabled = 1;
- } else {
- int serial_wakeup = 0;
- u32 l;
-
- switch (serial_console_uart) {
- case 1:
- l = prm_read_mod_reg(CORE_MOD, PM_WKST1);
- if (l & OMAP24XX_ST_UART1)
- serial_wakeup = 1;
- break;
- case 2:
- l = prm_read_mod_reg(CORE_MOD, PM_WKST1);
- if (l & OMAP24XX_ST_UART2)
- serial_wakeup = 1;
- break;
- case 3:
- l = prm_read_mod_reg(CORE_MOD, OMAP24XX_PM_WKST2);
- if (l & OMAP24XX_ST_UART3)
- serial_wakeup = 1;
- break;
- }
- if (serial_wakeup)
- serial_console_kick();
- if (!serial_console_clock_disabled)
- return;
- clk_enable(console_iclk);
- clk_enable(console_fclk);
- serial_console_clock_disabled = 0;
- }
-}
-
-void pm_init_serial_console(void)
-{
- const struct omap_serial_console_config *conf;
- char name[16];
-
- conf = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
- struct omap_serial_console_config);
- if (conf == NULL)
- return;
- if (conf->console_uart > 3 || conf->console_uart < 1)
- return;
- serial_console_uart = conf->console_uart;
- sprintf(name, "uart%d_fck", conf->console_uart);
- console_fclk = clk_get(NULL, name);
- if (IS_ERR(console_fclk))
- console_fclk = NULL;
- name[6] = 'i';
[PATCH 03/29] PM debug support for 34xx
From: Tero Kristo <[EMAIL PROTECTED]>
This patch adds a few files to the debug file system for PM debugging
purposes. Enabled with kernel config options CONFIG_PM_DEBUG and
CONFIG_DEBUG_FS. Data available in debug filesystem after this patch:
- State enter counters for power domains (OFF, RET, ON)
- State timers for the above (in ns)
- PM register dumps with programmable save points
- Current power domain states
- Interface to set_pwrdm_state()
This patch depends on the PM workaround set from Jouni Hogander.
Signed-off-by: Tero Kristo <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/clock.c |2 +
arch/arm/mach-omap2/clockdomain.c | 27 ++
arch/arm/mach-omap2/pm-debug.c| 406 +
arch/arm/mach-omap2/pm.c |2 +
arch/arm/mach-omap2/pm.h | 33 ++-
arch/arm/mach-omap2/pm34xx.c |6 +-
arch/arm/mach-omap2/powerdomain.c | 69 +
arch/arm/plat-omap/include/mach/powerdomain.h |7 +-
8 files changed, 548 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 88c8ef4..a5fc5b0 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -39,6 +39,7 @@
#include "cm.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"
+#include "pm.h"
#define MAX_CLOCK_ENABLE_WAIT 10
@@ -1025,5 +1026,6 @@ void omap2_clk_disable_unused(struct clk *clk)
printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name);
_omap2_clk_disable(clk);
+ pm_dbg_clk_state_switch(clk);
}
#endif
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index fa62f14..9670ed1 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -36,6 +36,8 @@
#include
#include
+#include "pm.h"
+
/* clkdm_list contains all registered struct clockdomains */
static LIST_HEAD(clkdm_list);
@@ -567,6 +569,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm,
struct clk *clk)
else
omap2_clkdm_wakeup(clkdm);
+ pm_dbg_clkdm_state_switch(clkdm);
+
return 0;
}
@@ -618,6 +622,29 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm,
struct clk *clk)
else
omap2_clkdm_sleep(clkdm);
+ pm_dbg_clkdm_state_switch(clkdm);
+
+ return 0;
+}
+
+#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
+#include
+#include
+int clkdm_dbg_show_counters(struct seq_file *s, void *unused)
+{
+ struct clockdomain *clkdm;
+
+ list_for_each_entry(clkdm, &clkdm_list, node) {
+ if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
+ strcmp(clkdm->name, "wkup_clkdm") == 0)
+ continue;
+ seq_printf(s, "%s->%s (%d)", clkdm->name,
+ clkdm->pwrdm.ptr->name,
+ atomic_read(&clkdm->usecount));
+ seq_printf(s, "\n");
+ }
+
return 0;
}
+#endif
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index b00f5f4..380a2a0 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -30,6 +30,9 @@
#include
#include
+#include
+#include
+#include
#include "prm.h"
#include "cm.h"
#include "pm.h"
@@ -153,4 +156,407 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
printk("%-20s: 0x%08x\n", regs[i].name, regs[i].val);
}
+#ifdef CONFIG_DEBUG_FS
+#include
+#include
+
+static void pm_dbg_regset_store(u32 *ptr);
+
+struct dentry *pm_dbg_dir;
+
+static int pm_dbg_init_done;
+
+enum {
+ PM_DBG_STATE_NOW = 0,
+ PM_DBG_STATE_PREV,
+};
+
+struct pm_module_def {
+ char name[8]; /* Name of the module */
+ short type; /* CM or PRM */
+ unsigned short offset;
+ int low; /* First register address on this module */
+ int high; /* Last register address on this module */
+};
+
+#define MOD_CM 0
+#define MOD_PRM 1
+
+static const struct pm_module_def pm_dbg_reg_modules[] = {
+ { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
+ { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
+ { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
+ { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
+ { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
+ { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
+ { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
+ { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
+ { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
+ { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
+ { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
+ { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
+ { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
+
+ { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
+ { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
+ { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
+ { "CORE"
[PATCH 08/29] scratchpad contents
From: Rajendra Nayak <[EMAIL PROTECTED]>
This patch populates the scratchpad
---
arch/arm/mach-omap2/pm.h |7 ++
arch/arm/mach-omap2/pm34xx.c | 170 +-
arch/arm/mach-omap2/sleep34xx.S |8 +-
arch/arm/plat-omap/include/mach/pm.h |5 +
4 files changed, 181 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 19da5c7..7776cdb 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -24,6 +24,13 @@ extern atomic_t sleep_block;
extern void omap2_block_sleep(void);
extern void omap2_allow_sleep(void);
+#define SCRATCHPAD_ROM 0x48002860
+#define SCRATCHPAD 0x48002910
+#define SCRATHPAD_ROM_OFFSET 0x19C
+#define TABLE_ADDRESS_OFFSET 0x31
+#define TABLE_VALUE_OFFSET 0x30
+#define CONTROL_REG_VALUE_OFFSET 0x32
+
#ifdef CONFIG_PM_DEBUG
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
extern int omap2_pm_debug;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0646595..acfca0b 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -30,6 +30,9 @@
#include
#include
#include
+#include
+#include
+#include "sdrc.h"
#include "cm.h"
#include "cm-regbits-34xx.h"
@@ -38,6 +41,12 @@
#include "prm.h"
#include "pm.h"
#include "smartreflex.h"
+#include "clock34xx.h"
+
+#define OMAP3430_PRM_RSTST \
+ OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0058)
+
+u32 context_mem[128];
struct power_state {
struct powerdomain *pwrdm;
@@ -46,6 +55,9 @@ struct power_state {
struct list_head node;
};
+u32 *scratchpad_restore_addr;
+u32 restore_pointer_address;
+
static LIST_HEAD(pwrst_list);
static void (*_omap_sram_idle)(u32 *addr, int save_state);
@@ -185,6 +197,35 @@ static irqreturn_t prcm_interrupt_handler (int irq, void
*dev_id)
return IRQ_HANDLED;
}
+static void restore_control_register(u32 val)
+{
+ __asm__ __volatile__ ("mcr p15, 0, %0, c1, c0, 0" : : "r" (val));
+}
+
+/* Function to restore the table entry that was modified for enabling MMU*/
+static void restore_table_entry(void)
+{
+ u32 *scratchpad_address;
+ u32 previous_value, control_reg_value;
+ u32 *address;
+ /* Get virtual address of SCRATCHPAD */
+ scratchpad_address = (u32 *) io_p2v(SCRATCHPAD);
+ /* Get address of entry that was modified */
+ address = (u32 *) *(scratchpad_address + TABLE_ADDRESS_OFFSET);
+ /* Get the previous value which needs to be restored */
+ previous_value = *(scratchpad_address + TABLE_VALUE_OFFSET);
+ /* Convert address to virtual address */
+ address = __va(address);
+ /* Restore table entry */
+ *address = previous_value;
+ /* Flush TLB */
+ flush_tlb_all();
+ control_reg_value = *(scratchpad_address + CONTROL_REG_VALUE_OFFSET);
+ /* Restore control register*/
+ /* This will enable caches and prediction */
+ restore_control_register(control_reg_value);
+}
+
void omap_sram_idle(void)
{
/* Variable to tell what needs to be saved and restored
@@ -205,6 +246,9 @@ void omap_sram_idle(void)
/* No need to save context */
save_state = 0;
break;
+ case PWRDM_POWER_OFF:
+ save_state = 3;
+ break;
default:
/* Invalid state */
printk(KERN_ERR "Invalid mpu state in sram_idle\n");
@@ -213,9 +257,10 @@ void omap_sram_idle(void)
pm_dbg_pre_suspend();
- _omap_sram_idle(NULL, save_state);
-
- omap2_gpio_resume_after_retention();
+ _omap_sram_idle(context_mem, save_state);
+ /* Restore table entry modified during MMU restoration */
+ if (pwrdm_read_prev_pwrst(mpu_pwrdm) == 0x0)
+ restore_table_entry();
pm_dbg_post_suspend();
}
@@ -677,7 +722,10 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
if (!pwrst)
return -ENOMEM;
pwrst->pwrdm = pwrdm;
- pwrst->next_state = PWRDM_POWER_RET;
+ if (!strcmp(pwrst->pwrdm->name, "core_pwrdm"))
+ pwrst->next_state = PWRDM_POWER_RET;
+ else
+ pwrst->next_state = PWRDM_POWER_OFF;
list_add(&pwrst->node, &pwrst_list);
if (pwrdm_has_hdwr_sar(pwrdm))
@@ -764,6 +812,120 @@ err2:
return ret;
}
+/* Clears the scratchpad contents in case of cold boot- called during bootup*/
+void clear_scratchpad_contents(void)
+{
+ u32 max_offset = SCRATHPAD_ROM_OFFSET;
+ u32 offset = 0;
+ u32 v;
+ u32 v_addr = io_p2v(SCRATCHPAD_ROM);
+ if (__raw_readl(OMAP3430_PRM_RSTST) & 0x1) {
+ for ( ; offset <= max_offset; offset += 0x4)
+__raw_writel(0x0, (v_addr + offset));
+ v = __raw_readl(OMAP3430_PRM_RSTST);
+
[PATCH 04/29] Sysfs interface for controlling suspend states + set_pwrdm_state fix
From: Tero Kristo <[EMAIL PROTECTED]>
Target states for each powerdomain can now be set via sysfs interface.
E.g. "echo 0 > /sys/power/suspend/mpu_pwrdm" will program MPU suspend
state to be OFF.
Also, set_pwrdm_state() should now work when pwrdm is currently in
power save state.
Signed-off-by: Tero Kristo <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c | 97 +-
1 files changed, 96 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e0d1b1f..a272720 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -82,6 +82,8 @@ static void per_gpio_clk_disable(void)
clk_disable(gpio_fcks[i-1]);
}
+static struct kobject *suspend_dir_kobj;
+
/* XXX This is for gpio fclk hack. Will be removed as gpio driver
* handles fcks correctly */
static void gpio_fclk_mask(u32 *fclk)
@@ -306,6 +308,7 @@ int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
{
u32 cur_state;
int ret = 0;
+ int sleep_switch = 0;
if (pwrdm == NULL || IS_ERR(pwrdm))
return -EINVAL;
@@ -315,6 +318,16 @@ int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
if (cur_state == state)
return ret;
+ /* Check if we need to wake-up the pwrdm for state switch */
+ /* MPU, core and per are never in sleep states when we are here*/
+ if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
+ if ((cm_read_mod_reg(pwrdm->prcm_offs, 0x48) & 0x3) == 0x3) {
+ sleep_switch = 1;
+ cm_rmw_mod_reg_bits(0x3, 0x2, pwrdm->prcm_offs, 0x48);
+ pwrdm_wait_transition(pwrdm);
+ }
+ }
+
pwrdm_for_each_clkdm(pwrdm, _clkdm_deny_idle);
ret = pwrdm_set_next_pwrst(pwrdm, state);
@@ -326,6 +339,12 @@ int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
pwrdm_for_each_clkdm(pwrdm, _clkdm_allow_idle);
+ if (sleep_switch) {
+ cm_rmw_mod_reg_bits(0x3, 0x3, pwrdm->prcm_offs, 0x48);
+ pwrdm_wait_transition(pwrdm);
+ pm_dbg_pwrdm_state_switch(pwrdm);
+ }
+
err:
return ret;
}
@@ -380,7 +399,6 @@ static int omap3_pm_suspend(void)
restore:
/* Restore next_pwrsts */
list_for_each_entry(pwrst, &pwrst_list, node) {
- set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
state = pwrdm_read_prev_pwrst(pwrst->pwrdm);
if (state != pwrst->next_state) {
printk(KERN_INFO "Powerdomain (%s) didn't enter "
@@ -388,6 +406,7 @@ restore:
pwrst->pwrdm->name, pwrst->next_state);
ret = -1;
}
+ set_pwrdm_state(pwrst->pwrdm, pwrst->saved_state);
}
if (ret)
printk(KERN_ERR "Could not enter target state in pm_suspend\n");
@@ -584,9 +603,67 @@ static void __init prcm_setup_regs(void)
OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET);
}
+static struct power_state *get_pwrst_node(const char *name)
+{
+ struct powerdomain *pwrdm;
+ struct power_state *pwrst_tmp;
+ struct power_state *pwrst = NULL;
+
+ pwrdm = pwrdm_lookup(name);
+
+ if (pwrdm == NULL) {
+ printk(KERN_ERR "pwrdm not found %s\n", name);
+ return NULL;
+ }
+
+ list_for_each_entry(pwrst_tmp, &pwrst_list, node)
+ if (pwrst_tmp->pwrdm == pwrdm)
+ pwrst = pwrst_tmp;
+
+ if (pwrst == NULL)
+ printk(KERN_ERR "pwrdm not in suspend list %s\n", name);
+
+ return pwrst;
+}
+
+static ssize_t state_show(struct kobject *kobj, struct kobj_attribute *attr,
+char *buf)
+{
+ struct power_state *pwrst;
+
+ pwrst = get_pwrst_node(attr->attr.name);
+
+ if (pwrst == NULL)
+ return -EINVAL;
+
+ return sprintf(buf, "%hu\n", pwrst->next_state);
+}
+
+static ssize_t state_store(struct kobject *kobj, struct kobj_attribute *attr,
+ const char *buf, size_t n)
+{
+ struct power_state *pwrst;
+ unsigned short value;
+
+ if (sscanf(buf, "%hu", &value) != 1 || value > PWRDM_POWER_ON) {
+ printk(KERN_ERR "state_store: Invalid value\n");
+ return -EINVAL;
+ }
+
+ pwrst = get_pwrst_node(attr->attr.name);
+
+ if (pwrst == NULL)
+ return -EINVAL;
+
+ pwrst->next_state = value;
+
+ return n;
+}
+
static int __init pwrdms_setup(struct powerdomain *pwrdm)
{
struct power_state *pwrst;
+ struct kobj_attribute *attr;
if (!pwrdm->pwrsts)
return 0;
@@ -601,6 +678,18 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
if (pwrdm_has_hdwr_sar(pwrdm))
pwrdm_enable_hdwr_sar(pwrdm)
[PATCH 0/29] PM: proposed branch for PM collaboration
Hello, The following patchset is an attempt to collect the various PM patches that have been flowing around, and organize them into one branch to be used for further collaboration on PM development, in particular OFF-mode support. It is currently a collection of proposed patches[1] from TI and various other patches from Nokia and others to get retention, OFF-mode, CPUidle etc. working in the linux-omap tree. This series is nowhere near ready for merging into linux-omap, but will be useful for discussion and collaboration on getting the various PM features working at the head of the linux-omap tree, and a place where cleanup and rework efforts can be focused. If there are no major objections, I will create a branch in linux-omap git and commit this series there. As collaboration continues, I will continue to collect and update patches, fix problems and rebase onto the HEAD of linux-omap. The goal of this branch is only to facilitate the rework and cleanup of the PM code so it can be merged into linux-omap. Then, the branch will disappear and work can be focused again on the HEAD of linux-omap. It has currently been tested with a minimal config on 3430SDP, and OFF-mode is hit in suspend. In order to hit suspend: echo 1 > /sys/power/voltage_off_while_idle echo 1 > /sys/power/gpio_clocks_off_while_idle echo 1 > /sys/power/uart_clocks_off_while_idle echo mem > /sys/power/state Kevin [1] This series is roughly based on the following: Jouni Hogander, Tero Kristo [PATCH 0/4] Refreshed PM workaround patches 2 -- 15 Aug Rajendra Nayak: [PATCH 00/11] OMAP3 CPUidle patches - ver 2 -- 18 July As well as several patches/hacks/cleanups that have not yet been posted to the list. Also, there have been newer versions of the CPUidle patches that have been reviewed on the list, but do not apply for various reasons. As soon as they are rebased and updated versions of those are available, I will integrate them. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Fix for twl4030-power.c build failure for beagleboard
This patch should fix the twl4030-power.c build failure for beagleboard. Peter 'p2' De Schrijver (1): Fix build for beagleboard drivers/i2c/chips/twl4030-power.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] Fix build for beagleboard
---
drivers/i2c/chips/twl4030-power.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/chips/twl4030-power.c
b/drivers/i2c/chips/twl4030-power.c
index 195c3c4..04a13aa 100644
--- a/drivers/i2c/chips/twl4030-power.c
+++ b/drivers/i2c/chips/twl4030-power.c
@@ -149,7 +149,7 @@ struct triton_ins t2_wrst_seq[] __initdata = {
struct triton_ins sleep_on_seq[] __initdata = {
{MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0,
RES_STATE_SLEEP), 4},
- {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE_R7,
+ {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
RES_STATE_SLEEP), 4},
};
@@ -160,6 +160,9 @@ struct triton_ins sleep_off_seq[] __initdata = {
{MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, RES_TYPE_ALL, RES_TYPE2_R0,
RES_STATE_ACTIVE), 0x2},
};
+
+struct triton_ins t2_wrst_seq[] __initdata = { };
+
#endif
static int __init twl4030_write_script_byte(u8 address, u8 byte)
--
1.5.6.3
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Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Thu, Sep 11, 2008 at 02:23:15PM +0300, ext Jarkko Lavinen wrote:
> On Thu, Sep 11, 2008 at 09:48:28AM +0100, ext Russell King - ARM Linux wrote:
> > So, given my update for this, shouldn't this be something sent almost
> > immediately to me so stuff for mainline isn't falling behind.
>
> Hi Russell and all
>
> Here is a hopefully self-explaining patch, which enables 8-bit
> support similar to the 4-bit support in Omap HSMMC when then mmc
> confifuration from platform data tells it is available.
>
> I have tested it on a testboard with 2.6.26 beased kernel and
> write speed increased some 30..40%.
Maybe Pierre should be watching this patch as well. I'm putting him in
the loop.
> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> index fdd7c76..8c55df3 100644
> --- a/drivers/mmc/core/mmc.c
> +++ b/drivers/mmc/core/mmc.c
> @@ -434,13 +434,23 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
>* Activate wide bus (if supported).
>*/
> if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
> - (host->caps & MMC_CAP_4_BIT_DATA)) {
> + (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
> + unsigned ext_csd_bit, driver_width;
> +
> + if (host->caps & MMC_CAP_8_BIT_DATA) {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
> + driver_width = MMC_BUS_WIDTH_8;
> + } else {
> + ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
> + driver_width = MMC_BUS_WIDTH_4;
> + }
maybe you could:
[...]
unsigned ext_csd_bit, driver_width;
[...]
if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
(host->caps & MMC_CAP_4_BIT_DATA)) {
ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
driver_width = MMC_BUS_WIDTH_8;
}
if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
(host->caps & MMC_CAP_8_BIT_DATA)) {
ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
driver_width = MMC_BUS_WIDTH_4;
}
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index af34871..92ad67e 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -72,6 +72,7 @@
> #define MSBS 1<<5
> #define BCE 1<<1
> #define FOUR_BIT 1 << 1
someone needs to clean up those #defines...
> @@ -111,11 +112,12 @@ struct mmc_host {
> unsigned long caps; /* Host capabilities */
>
> #define MMC_CAP_4_BIT_DATA (1 << 0)/* Can the host do 4 bit
> transfers */
> -#define MMC_CAP_MMC_HIGHSPEED(1 << 1)/* Can do MMC
> high-speed timing */
> -#define MMC_CAP_SD_HIGHSPEED (1 << 2)/* Can do SD high-speed timing
> */
> -#define MMC_CAP_SDIO_IRQ (1 << 3)/* Can signal pending SDIO IRQs
> */
> -#define MMC_CAP_SPI (1 << 4)/* Talks only SPI protocols */
> -#define MMC_CAP_NEEDS_POLL (1 << 5)/* Needs polling for
> card-detection */
> +#define MMC_CAP_8_BIT_DATA (1 << 1)/* Can the host do 8 bit
> transfers */
> +#define MMC_CAP_MMC_HIGHSPEED(1 << 2)/* Can do MMC
> high-speed timing */
> +#define MMC_CAP_SD_HIGHSPEED (1 << 3)/* Can do SD high-speed timing
> */
> +#define MMC_CAP_SDIO_IRQ (1 << 4)/* Can signal pending SDIO IRQs
> */
> +#define MMC_CAP_SPI (1 << 5)/* Talks only SPI protocols */
> +#define MMC_CAP_NEEDS_POLL (1 << 6)/* Needs polling for
> card-detection */
This would require changes to all other mmc host drivers, right ?
How about:
+#define MMC_CAP_8_BIT_DATA (1 << 6)/* Can the host do 8 bit
transfers */
--
balbi
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Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Thu, Sep 11, 2008 at 09:48:28AM +0100, ext Russell King - ARM Linux wrote:
> So, given my update for this, shouldn't this be something sent almost
> immediately to me so stuff for mainline isn't falling behind.
Hi Russell and all
Here is a hopefully self-explaining patch, which enables 8-bit
support similar to the 4-bit support in Omap HSMMC when then mmc
confifuration from platform data tells it is available.
I have tested it on a testboard with 2.6.26 beased kernel and
write speed increased some 30..40%.
Cheers,
Jarkko
---
>From f739457703988da18a5509bd297c4f6ebed83291 Mon Sep 17 00:00:00 2001
From: Jarkko Lavinen <[EMAIL PROTECTED]>
Date: Thu, 11 Sep 2008 14:15:31 +0300
Subject: [PATCH] HSMMC: Enable 8-bit transfer when available.
Signed-off-by: Jarkko Lavinen <[EMAIL PROTECTED]>
---
arch/arm/plat-omap/devices.c|8 ++--
arch/arm/plat-omap/include/mach/board.h |4 +++-
drivers/mmc/core/mmc.c | 17 +
drivers/mmc/host/omap_hsmmc.c | 10 ++
include/linux/mmc/host.h| 12 +++-
5 files changed, 39 insertions(+), 12 deletions(-)
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 3bd1da2..aa1299f 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -289,13 +289,17 @@ static void __init omap_init_mmc(void)
mmc = &mmc_conf->mmc[0];
if (cpu_is_omap2430() || cpu_is_omap34xx()) {
- if (mmc->enabled)
+ if (mmc->enabled) {
+ mmc1_data.conf = *mmc;
(void) platform_device_register(&mmc_omap_device1);
+ }
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
mmc = &mmc_conf->mmc[1];
- if (mmc->enabled)
+ if (mmc->enabled) {
+ mmc2_data.conf = *mmc;
(void) platform_device_register(&mmc_omap_device2);
+ }
#endif
return;
diff --git a/arch/arm/plat-omap/include/mach/board.h
b/arch/arm/plat-omap/include/mach/board.h
index a1a66ac..cd287dd 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -46,8 +46,10 @@ struct omap_mmc_conf {
unsigned nomux:1;
/* switch pin can be for card detect (default) or card cover */
unsigned cover:1;
- /* 4 wire signaling is optional, and is only used for SD/SDIO */
+ /* 4 and 8 wire signaling are optional */
unsigned wire4:1;
+ unsigned wire8:1;
+
/* use the internal clock */
unsigned internal_clock:1;
s16 power_pin;
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index fdd7c76..8c55df3 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -434,13 +434,23 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
* Activate wide bus (if supported).
*/
if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
- (host->caps & MMC_CAP_4_BIT_DATA)) {
+ (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
+ unsigned ext_csd_bit, driver_width;
+
+ if (host->caps & MMC_CAP_8_BIT_DATA) {
+ ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
+ driver_width = MMC_BUS_WIDTH_8;
+ } else {
+ ext_csd_bit = EXT_CSD_BUS_WIDTH_4;
+ driver_width = MMC_BUS_WIDTH_4;
+ }
+
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
- EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4);
+EXT_CSD_BUS_WIDTH, ext_csd_bit);
if (err)
goto free_card;
- mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4);
+ mmc_set_bus_width(card->host, driver_width);
}
if (!oldcard)
@@ -624,4 +634,3 @@ err:
return err;
}
-
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index af34871..92ad67e 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -72,6 +72,7 @@
#define MSBS 1<<5
#define BCE1<<1
#define FOUR_BIT 1 << 1
+#define DW8(1 << 5)
#define CC 0x1
#define TC 0x02
#define OD 0x1
@@ -631,6 +632,7 @@ static void omap_mmc_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
u16 dsor = 0;
unsigned long regval;
unsigned long timeout;
+ u32 con;
switch (ios->power_mode) {
case MMC_POWER_OFF:
@@ -641,12 +643,18 @@ static void omap_mmc_set_ios(struct mmc_host *mmc, struct
mmc_ios *ios)
break;
}
+ con = OMAP_HSMMC_READ(host->base, CON);
switch (mmc->ios.bus_width) {
+ case MMC_BUS_WIDTH_8:
+
Re: [PATCH 04/12] I2C re-init for every cmd
"ext shekhar, chandra" <[EMAIL PROTECTED]> writes:
> Hi,
>
> Few comments inlined.
>
> Regards,
> Chandra
> - Original Message -
> From: ""Högander" Jouni" <[EMAIL PROTECTED]>
> To: "ext Rajendra Nayak" <[EMAIL PROTECTED]>
> Cc:
> Sent: Thursday, September 11, 2008 3:34 PM
> Subject: Re: [PATCH 04/12] I2C re-init for every cmd
>
>
> "ext Rajendra Nayak" <[EMAIL PROTECTED]> writes:
>
>> This patch does i2c init/re-init for every transfer
>>
>> Signed-off-by: Rajendra Nayak <[EMAIL PROTECTED]>
>> ---
>> drivers/i2c/busses/i2c-omap.c |2 ++
>> 1 files changed, 2 insertions(+)
>>
>> Index: linux-omap-2.6/drivers/i2c/busses/i2c-omap.c
>> ===
>> --- linux-omap-2.6.orig/drivers/i2c/busses/i2c-omap.c 2008-09-01
>> 18:11:28.0 +0530
>> +++ linux-omap-2.6/drivers/i2c/busses/i2c-omap.c 2008-09-01
>> 18:11:52.0
>> +0530
>> @@ -496,6 +496,8 @@ omap_i2c_xfer(struct i2c_adapter *adap,
>>
>> omap_i2c_unidle(dev);
>>
>> + omap_i2c_init(dev);
>> +
>> if ((r = omap_i2c_wait_for_bb(dev)) < 0)
>> goto out;
>
> This is causing unacceptable delays on i2c transfers. This is because
> occasionally reset loop in init function enters msleep. Is it
> necessary to reset i2c controller after off-mode?
>
> Any opinions on this:
>
> diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
> index 3778735..4a27035 100644
> --- a/drivers/i2c/busses/i2c-omap.c
> +++ b/drivers/i2c/busses/i2c-omap.c
> @@ -126,6 +126,14 @@
> /* I2C System Configuration Register (OMAP_I2C_SYSC): */
> #define OMAP_I2C_SYSC_SRST (1 << 1)/* Soft Reset */
>
> +struct omap3_i2c_regs {
> + u16 sysc;
> + u16 psc;
> + u16 scll;
> + u16 sclh;
> + u16 buf;
> +};
> +
>
>
>
> We can add this as a part of controller structure itself instaed of
> creating a new structure. we will store this
> psc, scll and others as a part of controller and just restore it. That
> way we can do away with omap3_i2c_save_context every time in clk
> disable.
My patch is neither saving ctx on every clk disable. Just after init.
>
>
>
>
>
> struct omap_i2c_dev {
>struct device *dev;
>void __iomem*base; /* virtual */
> @@ -147,6 +155,9 @@ struct omap_i2c_dev {
>unsignedb_hw:1; /* bad h/w fixes */
>unsignedidle:1;
>u16 iestate;/* Saved interrupt register */
> +#ifdef CONFIG_ARCH_OMAP34XX
> + struct omap3_i2c_regs context;
> +#endif
>
>
>
> I guess this should work for all the platforms. at least for omap2/3
> it should work w/o any hiccups.
> I2C_BUF is the only register which will require cpu check..so while
> restoring we can put that check for 2430/34xx.
Can we use off mode with omap2? Generally, should we build in
save/restore code for other than omap3?
>
>
> };
>
>
>
> static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
> @@ -160,6 +171,26 @@ static inline u16 omap_i2c_read_reg(struct
> omap_i2c_dev *i2c_dev, int reg)
>return __raw_readw(i2c_dev->base + reg);
> }
>
> +#ifdef CONFIG_ARCH_OMAP34XX
> +void omap3_i2c_save_context(struct omap_i2c_dev *dev)
> +{
> + dev->context.sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG);
> + dev->context.psc = omap_i2c_read_reg(dev, OMAP_I2C_PSC_REG);
> + dev->context.scll = omap_i2c_read_reg(dev, OMAP_I2C_SCLL_REG);
> + dev->context.sclh = omap_i2c_read_reg(dev, OMAP_I2C_SCLH_REG);
> + dev->context.buf = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG);
> +}
> +
>
>
> +void omap3_i2c_restore_context(struct omap_i2c_dev *dev)
> +{
> + omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->context.sysc);
> + omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->context.psc);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->context.scll);
> + omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->context.sclh);
> + omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->context.buf);
> +}
> +#endif
> +
>
> static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
> {
>if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
> @@ -210,6 +241,10 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
>clk_enable(dev->iclk);
>clk_enable(dev->fclk);
>dev->idle = 0;
> +
> + if (cpu_is_omap34xx())
> + omap3_i2c_restore_context(dev);
> +
>if (dev->iestate)
>omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
> }
> @@ -344,6 +379,10 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
>OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
>OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
>(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
> +
> + if (cpu_is_omap34xx())
> + omap3_i2c_save_context(dev);
> +
>
>
>
> this will become redundant as data will be p
Re: [PATCH 04/12] I2C re-init for every cmd
Hi,
Few comments inlined.
Regards,
Chandra
- Original Message -
From: ""Högander" Jouni" <[EMAIL PROTECTED]>
To: "ext Rajendra Nayak" <[EMAIL PROTECTED]>
Cc:
Sent: Thursday, September 11, 2008 3:34 PM
Subject: Re: [PATCH 04/12] I2C re-init for every cmd
"ext Rajendra Nayak" <[EMAIL PROTECTED]> writes:
This patch does i2c init/re-init for every transfer
Signed-off-by: Rajendra Nayak <[EMAIL PROTECTED]>
---
drivers/i2c/busses/i2c-omap.c |2 ++
1 files changed, 2 insertions(+)
Index: linux-omap-2.6/drivers/i2c/busses/i2c-omap.c
===
--- linux-omap-2.6.orig/drivers/i2c/busses/i2c-omap.c 2008-09-01
18:11:28.0 +0530
+++ linux-omap-2.6/drivers/i2c/busses/i2c-omap.c 2008-09-01 18:11:52.0
+0530
@@ -496,6 +496,8 @@ omap_i2c_xfer(struct i2c_adapter *adap,
omap_i2c_unidle(dev);
+ omap_i2c_init(dev);
+
if ((r = omap_i2c_wait_for_bb(dev)) < 0)
goto out;
This is causing unacceptable delays on i2c transfers. This is because
occasionally reset loop in init function enters msleep. Is it
necessary to reset i2c controller after off-mode?
Any opinions on this:
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 3778735..4a27035 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -126,6 +126,14 @@
/* I2C System Configuration Register (OMAP_I2C_SYSC): */
#define OMAP_I2C_SYSC_SRST (1 << 1)/* Soft Reset */
+struct omap3_i2c_regs {
+ u16 sysc;
+ u16 psc;
+ u16 scll;
+ u16 sclh;
+ u16 buf;
+};
+
We can add this as a part of controller structure itself instaed of creating a
new structure. we will store this
psc, scll and others as a part of controller and just restore it. That way we
can do away with omap3_i2c_save_context every time in clk disable.
struct omap_i2c_dev {
struct device *dev;
void __iomem*base; /* virtual */
@@ -147,6 +155,9 @@ struct omap_i2c_dev {
unsignedb_hw:1; /* bad h/w fixes */
unsignedidle:1;
u16 iestate;/* Saved interrupt register */
+#ifdef CONFIG_ARCH_OMAP34XX
+ struct omap3_i2c_regs context;
+#endif
I guess this should work for all the platforms. at least for omap2/3 it should
work w/o any hiccups.
I2C_BUF is the only register which will require cpu check..so while restoring we
can put that check for 2430/34xx.
};
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
@@ -160,6 +171,26 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev
*i2c_dev, int reg)
return __raw_readw(i2c_dev->base + reg);
}
+#ifdef CONFIG_ARCH_OMAP34XX
+void omap3_i2c_save_context(struct omap_i2c_dev *dev)
+{
+ dev->context.sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG);
+ dev->context.psc = omap_i2c_read_reg(dev, OMAP_I2C_PSC_REG);
+ dev->context.scll = omap_i2c_read_reg(dev, OMAP_I2C_SCLL_REG);
+ dev->context.sclh = omap_i2c_read_reg(dev, OMAP_I2C_SCLH_REG);
+ dev->context.buf = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG);
+}
+
+void omap3_i2c_restore_context(struct omap_i2c_dev *dev)
+{
+ omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->context.sysc);
+ omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->context.psc);
+ omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->context.scll);
+ omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->context.sclh);
+ omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->context.buf);
+}
+#endif
+
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
{
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
@@ -210,6 +241,10 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
clk_enable(dev->iclk);
clk_enable(dev->fclk);
dev->idle = 0;
+
+ if (cpu_is_omap34xx())
+ omap3_i2c_restore_context(dev);
+
if (dev->iestate)
omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
}
@@ -344,6 +379,10 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
+
+ if (cpu_is_omap34xx())
+ omap3_i2c_save_context(dev);
+
this will become redundant as data will be part of controller structure.
return 0;
}
@@ -496,8 +535,6 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg
msgs[], int num)
omap_i2c_unidle(dev);
- omap_i2c_init(dev);
-
instead of calling restore from clk_enable we can replace omap_i2c_init by
omap3_i2c_restore_context. that way clock enable code will be clean.
if ((r = omap_i2c_wait_for_bb(dev)) < 0)
goto out;
--
Jouni Högander
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RE: Remaining kautobuild errors with mainline
Russell > -Original Message- > From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Russell > On Tue, Sep 09, 2008 at 08:59:29AM +0100, Russell King - ARM Linux wrote: > > As of last nights merge of the ARM tree, the only remaining build error > > is: > > > > arch/arm/mach-omap1/built-in.o: In function `sx1_mmc_init': > > board-sx1-mmc.c:(.init.text+0xd64): undefined reference to > > `omap_set_mmc_info' > > arch/arm/mach-omap1/built-in.o: In function `h2_mmc_init': > > arch/arm/mach-omap1/board-h2-mmc.c:98: undefined reference to > > `omap_set_mmc_info' > > > > This seems to be because of arch/arm/plat-omap/devices.c not being up to > > date; it seems to pass a struct omap_mmc_conf to the OMAP MMC driver, > > but the MMC driver expects a struct omap_mmc_platform_data instead. > > > > Can I lift just the MMC changes for arch/arm/plat-omap/devices.c from > > the OMAP tree to fix this, or is there something more required for this? > > I couldn't pull the commits from the omapzoom tree because there seem to > be differences between mainline and omapzoom which aren't identifyable in > the omapzoom history. For omapzoom git the current strategy is to base the tree of l-o tree. Every two weeks I rebase of the l-o tree and apply TI-PM and TI-extra-functionality on top of l-o tree and that's what the omapzoom tree is today. I believe this might not be the smartest way, but with parallel development happening on l-o as well as omapzoom, sometimes by same developers, either tree has to be in sync so that none of the fixes is lost. Other way for zoom tree would be to diverge by taking linus upmerges and selectively take l-o bug-fixes. The issue here would be the trees would diverge over time. > > So... what I have is: > > From c37e0062150668dd260a6ce0664697f0fbcf2239 Mon Sep 17 00:00:00 2001 > From: Russell King <[EMAIL PROTECTED]> > Date: Tue, 9 Sep 2008 10:16:22 +0100 > Subject: [PATCH] [ARM] OMAP: Fix MMC device data > > OMAPs MMC device data was passing the wrong structure via the platform > device. Moreover, a missing function means that both sx1_defconfig > and omap_h2_1610_defconfig builds failed with > > undefined reference to `omap_set_mmc_info' > > errors. Fix this by updating the MMC support from the omapzoom tree. > > Signed-off-by: Russell King <[EMAIL PROTECTED]> > --- > arch/arm/plat-omap/devices.c | 88 > +++--- > 1 files changed, 74 insertions(+), 14 deletions(-) > -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: omapzoom tree broken?
Russell > -Original Message- > From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Russell > King - ARM Linux > Sent: Wednesday, September 10, 2008 12:24 AM > To: Ashwin Bihari > Cc: linux-omap@vger.kernel.org > Subject: Re: omapzoom tree broken? > > > > > > > Could we have it accessible via git the protocol please, rather than > > > http? > > > > Russell, > > > > I just pulled the omapzoom tree for the first time and it had no > > problems in the "git clone". Perhaps something to do with fetching > > into an existing repo? > > Looks like the pack index was corrupted; removing the one it just fetched > and repulling has made it happier. > > However, it's made me unhappier. Again, can we please have it accessible > via the git protocol. Yes TI is looking into the option of enabling GIT protocol for the zoom tree. >Or at least can whoever looks after that tree avoid > repacking it except maybe once a month? Yes I will take care not to repack often, till git protocol is available. > > Why? I don't want to have to keep on fetching 300 odd MB of pack files > every time I pull from this tree. 10 minutes into my current pull and > I only have 80MB... another 220MB to go. IOW, 45 minutes for a pull. > > This really isn't practical. Agreed. > -- > To unsubscribe from this list: send the line "unsubscribe linux-omap" in > the body of a message to [EMAIL PROTECTED] > More majordomo info at http://vger.kernel.org/majordomo-info.html -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[RESENDING][PATCH 1/2]OMAP3 NAND: Add NAND support on OMAP3430
From: Teerth Reddy <[EMAIL PROTECTED]>
This patch adds NAND support on 3430sdp board
[VS: updated for NAND_BLOCK_SIZE macros]
Signed-off-by: Teerth Reddy <[EMAIL PROTECTED]>
Signed-off-by: Vimal Singh <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/board-3430sdp-flash.c | 87 --
arch/arm/plat-omap/include/mach/gpmc.h| 10 +++
include/linux/mtd/nand.h |2
3 files changed, 93 insertions(+), 6 deletions(-)
Index: linux-omap-2.6_27_08_2008/arch/arm/mach-omap2/board-3430sdp-flash.c
===
---
linux-omap-2.6_27_08_2008.orig/arch/arm/mach-omap2/board-3430sdp-flash.c
2008-08-27
11:40:26.0 +0530
+++
linux-omap-2.6_27_08_2008/arch/arm/mach-omap2/board-3430sdp-flash.c
2008-09-11
15:21:10.0 +0530
@@ -24,6 +24,7 @@
#include
#include
#include
+#include
static struct mtd_partition sdp_nor_partitions[] = {
/* bootloader (U-Boot, etc) in first sector */
@@ -137,6 +138,61 @@
/* Onenand setup does nothing at present */
return 0;
}
+
+static struct mtd_partition sdp_nand_partitions[] = {
+ /* All the partition sizes are listed in terms of NAND block size */
+ {
+ .name = "X-Loader-NAND",
+ .offset = 0,
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "U-Boot-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x8 */
+ .size = 4 * NAND_BLOCK_SIZE,
+ .mask_flags = MTD_WRITEABLE,/* force read-only */
+ },
+ {
+ .name = "Boot Env-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x10 */
+ .size = 2 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = "Kernel-NAND",
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x14 */
+ .size = 32 * NAND_BLOCK_SIZE,
+ },
+ {
+ .name = "File System - NAND",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND, /* Offset = 0x54 */
+ },
+};
+
+static struct omap_nand_platform_data sdp_nand_data = {
+ .parts = sdp_nand_partitions,
+ .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
+ .nand_setup = NULL,
+ .dma_channel= -1, /* disable DMA in OMAP NAND driver */
+ .dev_ready = NULL,
+};
+
+static struct resource sdp_nand_resource = {
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device sdp_nand_device = {
+ .name = "omap2-nand",
+ .id = 0,
+ .dev= {
+ .platform_data = &sdp_nand_data,
+ },
+ .num_resources = 1,
+ .resource = &sdp_nand_resource,
+};
+
+
/**
* sdp3430_flash_init - Identify devices connected to GPMC and register.
*
@@ -145,7 +201,11 @@
void __init sdp3430_flash_init(void)
{
u8 cs = 0;
+ u8 nandcs = GPMC_CS_NUM + 1;
u8 onenandcs = GPMC_CS_NUM + 1;
+ unsigned long gpmc_base_add;
+
+ gpmc_base_add = OMAP34XX_GPMC_VIRT;
/* Configure start address and size of NOR device */
if (is_sil_rev_greater_than(OMAP3430_REV_ES1_0)) {
@@ -163,25 +223,42 @@
while (cs < GPMC_CS_NUM) {
u32 ret = 0;
- ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
/*
- * xloader/Uboot would have programmed the oneNAND
+ * xloader/Uboot would have programmed the NAND/oneNAND
* base address for us This is a ugly hack. The proper
* way of doing this is to pass the setup of u-boot up
* to kernel using kernel params - something on the
* lines of machineID. Check if oneNAND is configured
*/
- if ((ret & 0x3F) == (ONENAND_MAP >> 24))
+ if ((ret & 0xC00) == 0x800) {
+ /* Found it!! */
+ if (nandcs > GPMC_CS_NUM)
+ nandcs = cs;
+ } else {
+ ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
+ if ((ret & 0x3F) == (ONENAND_MAP >> 24))
onenandcs = cs;
+ }
cs++;
}
- if (onenandcs > GPMC_CS_NUM) {
- printk(KERN_INFO "OneNAND: Unable to find configuration "
+ if ((nandcs > GPMC_CS_NUM) && (onenandcs > GPMC_CS_NUM)) {
+ printk(KERN_INFO "NAND/OneNAND: Unable to find configuration "
Re: [PATCH 04/12] I2C re-init for every cmd
"ext Rajendra Nayak" <[EMAIL PROTECTED]> writes:
> This patch does i2c init/re-init for every transfer
>
> Signed-off-by: Rajendra Nayak <[EMAIL PROTECTED]>
> ---
> drivers/i2c/busses/i2c-omap.c |2 ++
> 1 files changed, 2 insertions(+)
>
> Index: linux-omap-2.6/drivers/i2c/busses/i2c-omap.c
> ===
> --- linux-omap-2.6.orig/drivers/i2c/busses/i2c-omap.c 2008-09-01
> 18:11:28.0 +0530
> +++ linux-omap-2.6/drivers/i2c/busses/i2c-omap.c 2008-09-01
> 18:11:52.0
> +0530
> @@ -496,6 +496,8 @@ omap_i2c_xfer(struct i2c_adapter *adap,
>
> omap_i2c_unidle(dev);
>
> + omap_i2c_init(dev);
> +
> if ((r = omap_i2c_wait_for_bb(dev)) < 0)
> goto out;
This is causing unacceptable delays on i2c transfers. This is because
occasionally reset loop in init function enters msleep. Is it
necessary to reset i2c controller after off-mode?
Any opinions on this:
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 3778735..4a27035 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -126,6 +126,14 @@
/* I2C System Configuration Register (OMAP_I2C_SYSC): */
#define OMAP_I2C_SYSC_SRST (1 << 1)/* Soft Reset */
+struct omap3_i2c_regs {
+ u16 sysc;
+ u16 psc;
+ u16 scll;
+ u16 sclh;
+ u16 buf;
+};
+
struct omap_i2c_dev {
struct device *dev;
void __iomem*base; /* virtual */
@@ -147,6 +155,9 @@ struct omap_i2c_dev {
unsignedb_hw:1; /* bad h/w fixes */
unsignedidle:1;
u16 iestate;/* Saved interrupt register */
+#ifdef CONFIG_ARCH_OMAP34XX
+ struct omap3_i2c_regs context;
+#endif
};
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
@@ -160,6 +171,26 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev
*i2c_dev, int reg)
return __raw_readw(i2c_dev->base + reg);
}
+#ifdef CONFIG_ARCH_OMAP34XX
+void omap3_i2c_save_context(struct omap_i2c_dev *dev)
+{
+ dev->context.sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG);
+ dev->context.psc = omap_i2c_read_reg(dev, OMAP_I2C_PSC_REG);
+ dev->context.scll = omap_i2c_read_reg(dev, OMAP_I2C_SCLL_REG);
+ dev->context.sclh = omap_i2c_read_reg(dev, OMAP_I2C_SCLH_REG);
+ dev->context.buf = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG);
+}
+
+void omap3_i2c_restore_context(struct omap_i2c_dev *dev)
+{
+ omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, dev->context.sysc);
+ omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->context.psc);
+ omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->context.scll);
+ omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->context.sclh);
+ omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, dev->context.buf);
+}
+#endif
+
static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev)
{
if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
@@ -210,6 +241,10 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
clk_enable(dev->iclk);
clk_enable(dev->fclk);
dev->idle = 0;
+
+ if (cpu_is_omap34xx())
+ omap3_i2c_restore_context(dev);
+
if (dev->iestate)
omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
}
@@ -344,6 +379,10 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
OMAP_I2C_IE_ARDY | OMAP_I2C_IE_NACK |
OMAP_I2C_IE_AL) | ((dev->fifo_size) ?
(OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0));
+
+ if (cpu_is_omap34xx())
+ omap3_i2c_save_context(dev);
+
return 0;
}
@@ -496,8 +535,6 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg
msgs[], int num)
omap_i2c_unidle(dev);
- omap_i2c_init(dev);
-
if ((r = omap_i2c_wait_for_bb(dev)) < 0)
goto out;
--
Jouni Högander
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[patch 2.6.27-rc6-omap1] twl4030: improve rtc device setup
From: David Brownell <[EMAIL PROTECTED]>
Make the twl4030 RTC initialization follow the driver model better.
The platform device is created (if needed) as part of twl4030 setup
instead of as a board-specific thing, and fits properly into the
driver model tree.
The only minor glitch here is on boards using platform_data to pass
MSECURE initialization hooks to the RTC driver. The right solution
probably just removes that platform_data, and might even make Linux
follow the principle of "least privilege" (at the hardware level!)
instead of always holding this signal high.
Pending better handling of MSECURE, this patch just does what the
RTC init does, but earlier: MSECURE is always high, so the RTC time
and calendar registers can be updated (and presumably a bunch of
non-RTC privileged operations will be allowed too).
Yet to be done: set up the IRQ resource; make the rtc driver use
that IRQ resource; and properly issue wakeup alarms.
Signed-off-by: David Brownell <[EMAIL PROTECTED]>
---
This is an example of what was discussed earlier ... starting
to clean up the twl4030 driver model support. More can be done
when twl4030 becomes a new-style I2C driver; clean support for
things like the keypad, power control, and gpio will need that to
get proper handling for board-specific data.
Note the net code shrink from "doing it right" and sharing code.
arch/arm/mach-omap2/board-2430sdp.c | 34 +--
arch/arm/mach-omap2/board-3430sdp.c | 41 ---
arch/arm/mach-omap2/board-ldp.c | 36
arch/arm/mach-omap2/board-omap3beagle.c |8
arch/arm/mach-omap2/board-omap3evm.c|8
drivers/i2c/chips/twl4030-core.c| 52 ++
6 files changed, 76 insertions(+), 103 deletions(-)
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -24,7 +24,6 @@
#include
#include
#include
-#include
#include
#include
@@ -190,13 +189,14 @@ static struct platform_device sdp2430_kp
},
};
-static int twl4030_rtc_init(void)
+static int __init msecure_init(void)
{
int ret = 0;
- ret = omap_request_gpio(TWL4030_MSECURE_GPIO);
+#ifdef CONFIG_RTC_DRV_TWL4030
+ ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure");
if (ret < 0) {
- printk(KERN_ERR "twl4030_rtc_init: can't reserve GPIO:%d !\n",
+ printk(KERN_ERR "msecure_init: can't reserve GPIO:%d !\n",
TWL4030_MSECURE_GPIO);
goto out;
}
@@ -205,36 +205,18 @@ static int twl4030_rtc_init(void)
* Make msecure line high in order to change the TWL4030 RTC time
* and calender registers.
*/
- omap_set_gpio_direction(TWL4030_MSECURE_GPIO, 0); /*dir out */
- omap_set_gpio_dataout(TWL4030_MSECURE_GPIO, 1);
+ gpio_direction_output(TWL4030_MSECURE_GPIO, 1);
out:
- return ret;
-}
+#endif
-static void twl4030_rtc_exit(void)
-{
- omap_free_gpio(TWL4030_MSECURE_GPIO);
+ return ret;
}
-static struct twl4030rtc_platform_data sdp2430_twl4030rtc_data = {
- .init = &twl4030_rtc_init,
- .exit = &twl4030_rtc_exit,
-};
-
-static struct platform_device sdp2430_twl4030rtc_device = {
- .name = "twl4030_rtc",
- .id = -1,
- .dev= {
- .platform_data = &sdp2430_twl4030rtc_data,
- },
-};
-
static struct platform_device *sdp2430_devices[] __initdata = {
&sdp2430_smc91x_device,
&sdp2430_flash_device,
&sdp2430_kp_device,
&sdp2430_lcd_device,
- &sdp2430_twl4030rtc_device,
};
static void ads7846_dev_init(void)
@@ -398,6 +380,8 @@ static void __init omap_2430sdp_init(voi
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
omap_serial_init();
+ msecure_init();
+
sdp2430_flash_init();
usb_musb_init();
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -20,9 +20,9 @@
#include
#include
#include
-#include
#include
#include
+#include
#include
#include
@@ -129,20 +129,20 @@ static struct platform_device sdp3430_kp
static int ts_gpio;
-#ifdef CONFIG_RTC_DRV_TWL4030
-static int twl4030_rtc_init(void)
+static int __init msecure_init(void)
{
int ret = 0;
+#ifdef CONFIG_RTC_DRV_TWL4030
/* 3430ES2.0 doesn't have msecure/gpio-22 line connected to T2 */
if (is_device_type_gp() && is_sil_rev_less_than(OMAP3430_REV_ES2_0)) {
u32 msecure_pad_config_reg = omap_ctrl_base_get() + 0xA3C;
int mux_mask = 0x04;
u16 tmp;
- ret = omap_request_gpio(TWL4030_MSECURE_GPIO);
+ ret = gpio_request(TWL4030_MSECURE_GPIO, "msecure");
if (ret < 0) {
- printk(KERN_ERR "twl4030_rtc_init: can't"
+ printk(KERN_ERR "msecure_i
Re: [RESENDING][PATCH 1/2]OMAP3 NAND: Add NAND support on OMAP3430
On Thursday 11 September 2008, Singh, Vimal wrote: > I will define NAND_BLOCK_SIZE as: > #define NAND_BLOCK_SIZE 64 * NAND_MAX_PAGESIZE Never define such things without parentheses ... Also, that looks wrong as well as sub-optimal. Current NAND chips can have page sizes up to 4 KB (right?), so I think "MAX" isn't what you would want (even if it never grows again). I'd just use SZ_128K for NAND_BLOCK_SIZE, and avoid the confusion. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Thu, Sep 11, 2008 at 09:48:28AM +0100, Russell King - ARM Linux wrote: > On Wed, Sep 10, 2008 at 04:56:46PM -0700, Tony Lindgren wrote: > > * Madhusudhan Chikkature <[EMAIL PROTECTED]> [080812 23:13]: > > > From: Madhusudhan Chikkature<[EMAIL PROTECTED]> > > > > > > ARM: OMAP3: Enable 4-bit support for HSMMC. > > > > > > This patch provides the fix to enable 4-bit support for HSMMC. > > > > Pushing today. > > So, given my update for this, shouldn't this be something sent almost > immediately to me so stuff for mainline isn't falling behind. > > Otherwise we're wasting our time trying to get mainline up to date. New version of the MMC updates for mainline pushed out - with additional cleanups in place (and since it's a different patch, I've dropped Tony's ack from it.) -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] Fixed CPU type check for OMAP3
>From: ext Tony Lindgren [mailto:[EMAIL PROTECTED] >Sent: 11 September, 2008 03:29 > >I've redone the id.c, the old one was getting messy for omap2. >Maybe try my patch I posted on Tuesday and see how it works for you? Hmm did not notice this patch, just made a quick fix for this as I was seeing some problems with CPU type detection. I need to check this out when I have more time for this. > >Also one comment below. >> #define OMAP3430_REV_ES1_0 0x3430 >> #define OMAP3430_REV_ES2_0 0x34301000 >> #define OMAP3430_REV_ES2_1 0x34302000 >> -#define OMAP3430_REV_ES2_2 0x34303000 >> +#define OMAP3430_REV_ES3_0 0x34303000 >> >> /* >> * omap_chip bits > >Are you sure ES3.0 gives a three for revision? I believe 2.2 >had 3, or is the revision register broken again? I have tested this piece of code with ES2.1 and ES3.0 and it gives correct results, so I am certain 3.0 gives a 3 for rev. Regarding 2.2 I am not so sure, I think such chip revision does not exist at all. There was also something weird with the earlier code as it increased revision by 1, thus giving wrong results for any revision... and causing is_sil_rev_* macros to give incorrect results. -Tero -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [RESENDING][PATCH 1/2]OMAP3 NAND: Add NAND support on OMAP3430
> > + /* All the partition sizes are listed in terms of NAND block size > > ... > > + .size = SZ_512K, > > ... > > + .size = SZ_512K, > > ... > > But now they're not "in terms of NAND block size". Agree. > > Wouldn't it be better to use either 4 * SZ_128K or 4 * NAND_BLOCK_SIZE? 4 * NAND_BLOCK_SIZE looks much better. I'll send patch after updating for this. I will define NAND_BLOCK_SIZE as: #define NAND_BLOCK_SIZE64 * NAND_MAX_PAGESIZE-- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Load triton2 scripts.
Kalle Jokiniemi <[EMAIL PROTECTED]> writes: > From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]> > > This patch loads the triton2 (twl4030) with scripts that will cut off VDD1 > and VDD2 voltages when SYS_OFF_MODE signal is set. > > Signed-off-by: Peter 'p2' De Schrijver <[EMAIL PROTECTED]> > Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]> > --- > drivers/i2c/chips/Makefile|2 +- > drivers/i2c/chips/twl4030-power.c | 337 > + > 2 files changed, 338 insertions(+), 1 deletions(-) > create mode 100644 drivers/i2c/chips/twl4030-power.c > > diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile > index 9e245b1..ad5f5db 100644 > --- a/drivers/i2c/chips/Makefile > +++ b/drivers/i2c/chips/Makefile > @@ -24,7 +24,7 @@ obj-$(CONFIG_GPIOEXPANDER_OMAP) += gpio_expander_omap.o > obj-$(CONFIG_MENELAUS) += menelaus.o > obj-$(CONFIG_SENSORS_TSL2550)+= tsl2550.o > obj-$(CONFIG_SENSORS_TSL2563)+= tsl2563.o > -obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-pwrirq.o > +obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-pwrirq.o > twl4030-power.o > obj-$(CONFIG_TWL4030_GPIO) += twl4030-gpio.o > obj-$(CONFIG_TWL4030_USB)+= twl4030-usb.o > obj-$(CONFIG_TWL4030_POWEROFF) += twl4030-poweroff.o > diff --git a/drivers/i2c/chips/twl4030-power.c > b/drivers/i2c/chips/twl4030-power.c > new file mode 100644 > index 000..195c3c4 > --- /dev/null > +++ b/drivers/i2c/chips/twl4030-power.c > @@ -0,0 +1,337 @@ > +/* > + * linux/drivers/i2c/chips/twl4030-power.c > + * > + * Handle TWL4030 Power initialization > + * > + * Copyright (C) 2008 Nokia Corporation > + * Copyright (C) 2006 Texas Instruments, Inc > + * > + * Written byKalle Jokiniemi > + * Peter De Schrijver <[EMAIL PROTECTED]> > + * > + * This file is subject to the terms and conditions of the GNU General > + * Public License. See the file "COPYING" in the main directory of this > + * archive for more details. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA > + */ > + > +#include > +#include > +#include > + > +#define PWR_P1_SW_EVENTS 0x10 > +#define PWR_DEVOFF (1<<0) > + > +#define PHY_TO_OFF_PM_MASTER(p) (p - 0x36) > +#define PHY_TO_OFF_PM_RECIEVER(p)(p - 0x5b) > + > +/* resource - hfclk */ > +#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECIEVER(0xe6) > + > +/* PM events */ > +#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) > +#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) > +#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) > +#define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36) > +#define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37) > +#define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38) > + > +#define LVL_WAKEUP 0x08 > + > +#define ENABLE_WARMRESET (1<<4) > + > +/* sequence script */ > + > +#define END_OF_SCRIPT0x3f > + > +#define R_SEQ_ADD_A2SPHY_TO_OFF_PM_MASTER(0x55) > +#define R_SEQ_ADD_SA12 PHY_TO_OFF_PM_MASTER(0x56) > +#define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) > +#define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) > +#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) > +#define R_MEMORY_DATAPHY_TO_OFF_PM_MASTER(0x5a) > + > +/* Power bus message definitions */ > + > +#define DEV_GRP_NULL 0x0 > +#define DEV_GRP_P1 0x1 > +#define DEV_GRP_P2 0x2 > +#define DEV_GRP_P3 0x4 > + > +#define RES_GRP_RES 0x0 > +#define RES_GRP_PP 0x1 > +#define RES_GRP_RC 0x2 > +#define RES_GRP_PP_RC0x3 > +#define RES_GRP_PR 0x4 > +#define RES_GRP_PP_PR0x5 > +#define RES_GRP_RC_PR0x6 > +#define RES_GRP_ALL 0x7 > + > +#define RES_TYPE2_R0 0x0 > + > +#define RES_TYPE_ALL 0x7 > + > +#define RES_STATE_WRST 0xF > +#define RES_STATE_ACTIVE 0xE > +#define RES_STATE_SLEEP 0x8 > +#define RES_STATE_OFF0x0 > + > +/* > +*Power Bus Message Format > +* > +*Broadcast Message (16 Bits) > +*DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4] > +*RES_STATE[3:0] > +* > +*Singular Message (16 Bits) > +*DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0] > +* > +*/ > + > +#define MSG_BROADCAST(devgrp, grp, type, type2, state) \ > + (devgrp << 13 | 1 << 12 | grp << 9 | type2 << 7 | type << 4 | state) > + > +#define MS
Re: [PATCH]Enable 4-bit in HSMMC1 and HSMMC2 platform data
On Wed, Sep 10, 2008 at 04:56:46PM -0700, Tony Lindgren wrote: > * Madhusudhan Chikkature <[EMAIL PROTECTED]> [080812 23:13]: > > From: Madhusudhan Chikkature<[EMAIL PROTECTED]> > > > > ARM: OMAP3: Enable 4-bit support for HSMMC. > > > > This patch provides the fix to enable 4-bit support for HSMMC. > > Pushing today. So, given my update for this, shouldn't this be something sent almost immediately to me so stuff for mainline isn't falling behind. Otherwise we're wasting our time trying to get mainline up to date. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC] Patch for proper Cortex-A8 cache configuration output
On Wed, Sep 10, 2008 at 04:28:07PM -0700, Tony Lindgren wrote: > I guess Catalin will submit his patch at some point after 2.6.28 opens. > I'll apply it l-o tree, and remove the L2 debug info we had in id.c > to clean up id.c in the future patches. As I've said on the main ARM lists where I've given reasons, I'm against extending this stuff, and it is my intention to remove it completely. It was only added because it was relatively simple and easy to print the information. However, with ARMs attitude of breaking configuration register formats willy nilly, it's just not worth having the additional complexity to try to work out which format we have, and decode that format. For all we know, come the next ARM architecture revision, these registers will have completely changed their format again. So much for providing software with an easy way to determine the parameters of the core. It's just not worth the complexity and effort to try and decode this information for no other purpose than a few printk's. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] Load triton2 scripts.
Op 11 sep 2008, om 05:20 heeft Steve Sakoman het volgende geschreven: On Wed, Sep 10, 2008 at 5:08 PM, Tony Lindgren <[EMAIL PROTECTED]> wrote: * Kalle Jokiniemi <[EMAIL PROTECTED]> [080825 03:28]: From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]> This patch loads the triton2 (twl4030) with scripts that will cut off VDD1 and VDD2 voltages when SYS_OFF_MODE signal is set. Pushing today. I guess we should remove the CONFIG_DISABLE_HFCLK at some point? This patch causes a build error due to a missing define: | CC drivers/i2c/chips/twl4030-power.o | drivers/i2c/chips/twl4030-power.c:152: error: 'RES_TYPE_R7' undeclared here (not in a function) Same here: make[3]: Entering directory `/OE/angstrom-dev/work/beagleboard- angstrom-linux-gnueabi/linux-omap-2.6.26+2.6.27- rc6+r1+gite9e9988a4ded6acee1d5387debb39f006f4c11a3-r1/git' CC drivers/i2c/chips/twl4030-power.o drivers/i2c/chips/twl4030-power.c:152: error: 'RES_TYPE_R7' undeclared here (not in a function) drivers/i2c/chips/twl4030-power.c: In function 'config_sleep_wake_sequence': drivers/i2c/chips/twl4030-power.c:215: warning: unused variable 'data' drivers/i2c/chips/twl4030-power.c: In function 'config_warmreset_sequence': drivers/i2c/chips/twl4030-power.c:275: error: 't2_wrst_seq' undeclared (first use in this function) drivers/i2c/chips/twl4030-power.c:275: error: (Each undeclared identifier is reported only once drivers/i2c/chips/twl4030-power.c:275: error: for each function it appears in.) drivers/i2c/chips/twl4030-power.c:275: error: invalid operands to binary / drivers/i2c/chips/twl4030-power.c:284: error: invalid operands to binary / drivers/i2c/chips/twl4030-power.c:284: warning: passing argument 3 of 'twl4030_write_script' makes integer from pointer without a cast make[3]: *** [drivers/i2c/chips/twl4030-power.o] Error 1 regards, Koen Steve -- To unsubscribe from this list: send the line "unsubscribe linux- omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html PGP.sig Description: This is a digitally signed message part
Re: [PATCH] MUSB: fix memory corruption when using more than max endpoints
On Wed, Sep 10, 2008 at 04:52:03PM -0700, Tony Lindgren wrote: > I guess you're talking about 8cc4af26d1e2b01cd9dc2c5e6b166d08946bc2e6 > that I just pushed? Precisely. -- balbi -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 07/12] System Control Module context save/restore
"Rajendra Nayak" <[EMAIL PROTECTED]> writes: >> >>> #define OMAP3430_PRM_RSTST \ >> >>> OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, RM_RSTST) >> >>> +static struct omap3_control_module_regs control_ctx; >> >>> + >> >> I'm not sure what this patch was generated against, but it doesn't >> >> apply against linux-omap. The PRM_RSTST definition above is not in >> >> linux-omap code. >> >> >> >> Kevin >> > >> > There is no reference to PRM_RSTST in this patch. It uses >> RM_RSTST which >> > can be found in arch/arm/mach-omap2/prm.h. >> >> You can see in the above quoted text that your 7/12 patch >> adds some code >> immediately after a line which defines OMAP3430_PRM_RSTST. >> Since this >> existing code is not in linux-omap, and I couldn't find it in >> previous >> patches, it's not clear what this patch was generated against. >> >> Kevin > > Yes, those lines are not present in linux-omap and are added by patch [PATCH > 03/06] scratchpad populate > posted by me on 08/26/2008. It is part of the patch set [PATCH 00/06] OMAP3 > CPUidle patches - supports C0-C5 > posted the same day. > > To summarise I have posted 2 patch sets as discussed earlier for CPUIdle > 1) [PATCH 00/06] OMAP3 CPUidle patches - supports C0-C5 - posted on 08/26/2008 > 2) [PATCH 00/12] OMAP3 CPUidle context save/restore patches - supports > C6 - posted on 09/01/2008 > > Apart from these the following patch set posted by Jouni is needed for these > patches to apply > 1) [PATCH 0/4] Refreshed PM workaround patches 2. - posted on 07/15/2008 > NOTE: Patch 1/4 from this set is already pushed in l-o mainline. > > So if you apply the patches in the following order on top of commit > 81c893795c2e1fbe0bf5f638e.. I am > hoping they should work. > 1) [PATCH 0/4] Refreshed PM workaround patches 2. > 2) [PATCH 00/06] OMAP3 CPUidle patches - supports C0-C5 > 3) [PATCH 00/12] OMAP3 CPUidle context save/restore patches This doesn't work either. The "Refreshed PM workaround" patches do not apply cleanly to that commit, and if I hack them to apply, your the first CPUidle patches do not apply on top of Jouni's patches. That's enough trying to force these for now. I will wait for updated patches against recent linux-omap. Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: testers wanted: isp1301_omap conversion to new-style i2c driver
Hi Tony, On Wed, 10 Sep 2008 15:31:50 -0700, Tony Lindgren wrote: > Hi, > > * Felipe Balbi <[EMAIL PROTECTED]> [080821 07:47]: > > On Fri, Aug 08, 2008 at 12:45:52PM +0300, Tony Lindgren wrote: > > > Yeah, I will add it to linux-omap for testing for sure. This should be > > > easy to test though, it either works or does not.. But we need to find > > > somebody to boot it and connect USB cable to it :) > > > > Hi Carlos, > > > > could you test it for us on H2 ?? > > > > Do you guys still have H2 boards there ? > > Jean, sorry for the long delay on getting this tested. Here's what > happens on H2 after Felipe's and your isp_1301.c patches: > > # otg: b_idle, SWITCH to gadget, ctrl 018021 > otg: a_idle, SWITCH to host, ctrl 080021 > otg: a_vbus_err, VBUS_ERR 2000 ctrl 140821 > hub 1-0:1.0: unable to enumerate USB device on port 2 > > So things work the same as before them. > > Here's my ack for the following patches: > > i2c/isp1301_omap: Convert to a new-style i2c driver, part 1 > i2c/isp1301_omap: Convert to a new-style i2c driver, part 2 > > Acked-by: Tony Lindgren <[EMAIL PROTECTED]> Thanks for testing and reporting! Both patches are in my i2c tree and scheduled to be send to Linus for kernel 2.6.28. -- Jean Delvare -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
