Re: [PATCH 2.6.27-rc8 1/2] drivers/mfd/twl4030-core.c
* David Brownell [EMAIL PROTECTED] [081002 00:53]: On Wednesday 01 October 2008, David Brownell wrote: NOTE: this is the current code from the linux-omap tree. This chip being used on a whole bunch of boards: - Gumstix Overo - BeagleBoard.org - Omap ZOOM (Labrador) - OMAP 2430 and 3430 SDP, - OMAP2 and OMAP3 EVM - ... more (openpandora.org ?) which will get much closer to usable with mainline kernels when their power management chip works in mainline! :) Cool. I'll post some patches against mainline kernel for booting minimal omap3 boards within next few days. So we should get at least beagle and overo booting to some extent, maybe with serial and musb. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] omap-keypad fixes for OMAP2
* Peter Ujfalusi [EMAIL PROTECTED] [081002 08:29]: Fixes for the omap-keypad driver on OMAP2 Peter Ujfalusi (2) OMAP2: omap-keypad: interrupt disable fix OMAP2: omap-keypad: Enable more than 6 rows drivers/input/keyboard/omap-keypad.c |6 +- 1 files changed, 1 insertions(+), 5 deletions(-) Looks good to me, here's my ack: Acked-by: Tony Lindgren [EMAIL PROTECTED] Can you please send your series to [EMAIL PROTECTED] for inclusion into the mainline kernel? Also cc linux-omap list. You might also want to also include other pending patches sitting in linux-omap into your series so we get this driver into sync with mainline too. Thanks, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[patch twl 1/2] remove linux/i2c/twl4030-rtc.h
From: David Brownell [EMAIL PROTECTED]
Remove linux/i2c/twl4030-rtc.h by moving all the relevant contents
into the driver itself, and removing the rest. Stuff removed included
many useless bitmasks, and remnants of the platform data hook.
Add markers inside the rtc driver to split sections apart: first
data structure declarations, then the RTC driver, then platform bus
glue for it all.
There's still an issue with the twl4030-pwrirq.h registers ... this
driver has no business touching them! This patch at least switches
away from having private versions of those register definitions, and
removes some unnecessary accesses to them.
No functional changes, just shrinkage.
Signed-off-by: David Brownell [EMAIL PROTECTED]
---
This depends on an as-yet-unmerged RTC cleanup patch removing a
bunch of headers.
drivers/rtc/rtc-twl4030.c | 105 +++--
include/linux/i2c/twl4030-pwrirq.h |8 +
include/linux/i2c/twl4030-rtc.h| 172 ---
3 files changed, 79 insertions(+), 206 deletions(-)
--- a/drivers/rtc/rtc-twl4030.c
+++ b/drivers/rtc/rtc-twl4030.c
@@ -28,11 +28,63 @@
#include linux/interrupt.h
#include linux/i2c/twl4030.h
-#include linux/i2c/twl4030-rtc.h
+#include linux/i2c/twl4030-pwrirq.h
+
+
+/*
+ * RTC block register offsets (use TWL_MODULE_RTC)
+ */
+#define REG_SECONDS_REG 0x00
+#define REG_MINUTES_REG 0x01
+#define REG_HOURS_REG0x02
+#define REG_DAYS_REG 0x03
+#define REG_MONTHS_REG 0x04
+#define REG_YEARS_REG0x05
+#define REG_WEEKS_REG0x06
+#define REG_ALARM_SECONDS_REG0x07
+#define REG_ALARM_MINUTES_REG0x08
+#define REG_ALARM_HOURS_REG 0x09
+#define REG_ALARM_DAYS_REG 0x0A
+#define REG_ALARM_MONTHS_REG 0x0B
+#define REG_ALARM_YEARS_REG 0x0C
+
+#define REG_RTC_CTRL_REG 0x0D
+#define REG_RTC_STATUS_REG 0x0E
+#define REG_RTC_INTERRUPTS_REG 0x0F
+
+#define REG_RTC_COMP_LSB_REG 0x10
+#define REG_RTC_COMP_MSB_REG 0x11
+/* RTC_CTRL_REG bitfields */
+#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
+#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
+#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
+#define BIT_RTC_CTRL_REG_MODE_12_24_M0x08
+#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
+#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M0x20
+#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
+
+/* RTC_STATUS_REG bitfields */
+#define BIT_RTC_STATUS_REG_RUN_M 0x02
+#define BIT_RTC_STATUS_REG_1S_EVENT_M0x04
+#define BIT_RTC_STATUS_REG_1M_EVENT_M0x08
+#define BIT_RTC_STATUS_REG_1H_EVENT_M0x10
+#define BIT_RTC_STATUS_REG_1D_EVENT_M0x20
+#define BIT_RTC_STATUS_REG_ALARM_M 0x40
+#define BIT_RTC_STATUS_REG_POWER_UP_M0x80
+
+/* RTC_INTERRUPTS_REG bitfields */
+#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
+#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M0x04
+#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M0x08
+
+
+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
#define ALL_TIME_REGS 6
+/*--*/
+
/*
* Supports 1 byte read from TWL4030 RTC register.
*/
@@ -315,12 +367,19 @@ static irqreturn_t twl4030_rtc_interrupt
if (res)
goto out;
- /* Clear on Read enabled. RTC_IT bit of REG_PWR_ISR1 needs
-* 2 reads to clear the interrupt. One read is done in
+ /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
+* needs 2 reads to clear the interrupt. One read is done in
* do_twl4030_pwrirq(). Doing the second read, to clear
* the bit.
+*
+* FIXME the reason PWR_ISR1 needs an extra read is that
+* RTC_IF retriggered until we cleared REG_ALARM_M above.
+* But re-reading like this is a bad hack; by doing so we
+* risk wrongly clearing status for some other IRQ (losing
+* the interrupt). Be smarter about handling RTC_UF ...
*/
- res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, rd_reg, REG_PWR_ISR1);
+ res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
+ rd_reg, TWL4030_INT_PWR_ISR1);
if (res)
goto out;
@@ -340,9 +399,10 @@ static struct rtc_class_ops twl4030_rtc_
.set_alarm = twl4030_rtc_set_alarm,
};
+/*--*/
+
static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
{
- struct twl4030rtc_platform_data *pdata =
[patch twl 2/2] remove linux/i2c/twl4030-pwrirq.h
From: David Brownell [EMAIL PROTECTED]
Get rid of another needless TWL header file: twl4030-pwrirq.h
can easily live in twl4030.h; updating its three users.
Also switch to the shared definition of the SIH_CTRL COR bit,
remove useless-to-non-driver MODULE_ALIAS(), and add a note
about a but that will appear if anyone ever removes this code.
No functional changes, just shrinkage.
Signed-off-by: David Brownell [EMAIL PROTECTED]
---
This leaves only linux/i2c/twl4030-madc.h as extra yet
associated with the TWL core code. It's got all kinds of
stuff; maybe someone else could split that up, making sure
ioctl bits get properly exported by make headers_install.
drivers/i2c/chips/twl4030-pwrirq.c | 13 +--
drivers/mfd/twl4030-core.c |1
drivers/rtc/rtc-twl4030.c |1
include/linux/i2c/twl4030-pwrirq.h | 39 ---
include/linux/i2c/twl4030.h| 15 +
5 files changed, 21 insertions(+), 48 deletions(-)
--- a/drivers/i2c/chips/twl4030-pwrirq.c
+++ b/drivers/i2c/chips/twl4030-pwrirq.c
@@ -27,9 +27,7 @@
#include linux/random.h
#include linux/kthread.h
#include linux/i2c/twl4030.h
-#include linux/i2c/twl4030-pwrirq.h
-#define PWR_SIH_CTRL_COR (12)
static u8 twl4030_pwrirq_mask;
static u8 twl4030_pwrirq_pending_unmask;
@@ -177,8 +175,9 @@ static int __init twl4030_pwrirq_init(vo
/* Enable clear on read */
- err = twl4030_i2c_write_u8(TWL4030_MODULE_INT, PWR_SIH_CTRL_COR,
- TWL4030_INT_PWR_SIH_CTRL);
+ err = twl4030_i2c_write_u8(TWL4030_MODULE_INT,
+ TWL4030_SIH_CTRL_COR_MASK,
+ TWL4030_INT_PWR_SIH_CTRL);
if (err)
return err;
@@ -201,12 +200,15 @@ static int __init twl4030_pwrirq_init(vo
return 0;
}
+subsys_initcall(twl4030_pwrirq_init);
static void __exit twl4030_pwrirq_exit(void)
{
int i;
+ /* FIXME the irqs are left enabled; trouble when they arrive... */
+
set_irq_handler(TWL4030_MODIRQ_PWR, NULL);
set_irq_flags(TWL4030_MODIRQ_PWR, 0);
@@ -220,7 +222,4 @@ static void __exit twl4030_pwrirq_exit(v
twl4030_pwrirq_unmask_thread = NULL;
}
}
-
-MODULE_ALIAS(i2c:twl4030-pwrirq);
-subsys_initcall(twl4030_pwrirq_init);
module_exit(twl4030_pwrirq_exit);
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -40,7 +40,6 @@
#include linux/i2c.h
#include linux/i2c/twl4030.h
#include linux/i2c/twl4030-madc.h
-#include linux/i2c/twl4030-pwrirq.h
#define DRIVER_NAMEtwl4030
--- a/drivers/rtc/rtc-twl4030.c
+++ b/drivers/rtc/rtc-twl4030.c
@@ -28,7 +28,6 @@
#include linux/interrupt.h
#include linux/i2c/twl4030.h
-#include linux/i2c/twl4030-pwrirq.h
/*
--- a/include/linux/i2c/twl4030-pwrirq.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * twl4030-pwrirq.h - header for TWL4030 power interrupts
- *
- * Copyright (C) 2008 Texas Instruments, Inc.
- * Copyright (C) 2008 Nokia Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef __TWL4030_PWRIRQ_H_
-#define __TWL4030_PWRIRQ_H_
-
-/*
- * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
- */
-
-#define TWL4030_INT_PWR_ISR1 0x0
-#define TWL4030_INT_PWR_IMR1 0x1
-#define TWL4030_INT_PWR_ISR2 0x2
-#define TWL4030_INT_PWR_IMR2 0x3
-#define TWL4030_INT_PWR_SIR0x4 /* test register */
-#define TWL4030_INT_PWR_EDR1 0x5
-#define TWL4030_INT_PWR_EDR2 0x6
-#define TWL4030_INT_PWR_SIH_CTRL 0x7
-
-#endif /* End of __TWL4030_PWRIRQ_H */
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -152,6 +152,21 @@ int twl4030_i2c_read(u8 mod_no, u8 *valu
/*--*/
+/*
+ * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
+ */
+
+#define TWL4030_INT_PWR_ISR1 0x0
+#define TWL4030_INT_PWR_IMR1 0x1
+#define TWL4030_INT_PWR_ISR2 0x2
+#define TWL4030_INT_PWR_IMR2 0x3
+#define TWL4030_INT_PWR_SIR0x4 /* test register */
+#define TWL4030_INT_PWR_EDR1 0x5
+#define TWL4030_INT_PWR_EDR2 0x6
+#define
Re: [PATCH 2.6.27-rc8 1/2] drivers/mfd/twl4030-core.c
On Wednesday 01 October 2008, Tony Lindgren wrote: * David Brownell [EMAIL PROTECTED] [081002 00:53]: On Wednesday 01 October 2008, David Brownell wrote: NOTE: this is the current code from the linux-omap tree. This chip being used on a whole bunch of boards: - Gumstix Overo - BeagleBoard.org - Omap ZOOM (Labrador) - OMAP 2430 and 3430 SDP, - OMAP2 and OMAP3 EVM - ... more (openpandora.org ?) My bad. Openpandora just opened for preorders *today* (PST) and sold out all 3000 units. I'm sure I mentioned it well after most of them were sold, so it's not my fault their server was killed. Really ... which will get much closer to usable with mainline kernels when their power management chip works in mainline! :) Cool. I'll post some patches against mainline kernel for booting minimal omap3 boards within next few days. So we should get at least beagle and overo booting to some extent, maybe with serial and musb. Sounds like it *should* be a nice, modest, achievable goal, right? Something tells me it won't be that easy! More power to you. - Dave -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2.6.27-rc8 1/2] drivers/mfd/twl4030-core.c
* David Brownell [EMAIL PROTECTED] [081002 09:54]: On Wednesday 01 October 2008, Tony Lindgren wrote: * David Brownell [EMAIL PROTECTED] [081002 00:53]: On Wednesday 01 October 2008, David Brownell wrote: NOTE: this is the current code from the linux-omap tree. This chip being used on a whole bunch of boards: - Gumstix Overo - BeagleBoard.org - Omap ZOOM (Labrador) - OMAP 2430 and 3430 SDP, - OMAP2 and OMAP3 EVM - ... more (openpandora.org ?) My bad. Openpandora just opened for preorders *today* (PST) and sold out all 3000 units. I'm sure I mentioned it well after most of them were sold, so it's not my fault their server was killed. Really ... which will get much closer to usable with mainline kernels when their power management chip works in mainline! :) Cool. I'll post some patches against mainline kernel for booting minimal omap3 boards within next few days. So we should get at least beagle and overo booting to some extent, maybe with serial and musb. Sounds like it *should* be a nice, modest, achievable goal, right? Something tells me it won't be that easy! More power to you. Hmm, well it's really the rest of the already posted omap2-upstream that RMK already commented on, plus one patch for sram for 34xx, then just the board files. So it should be doable yeah. Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PREVIEW] New display subsystem for OMAP2/3
Hi Vaibhav, On Wed, 2008-10-01 at 16:21 +0530, ext Hiremath, Vaibhav wrote: Tomi, Have you got a chance to review the DSS library and V4l2 driver which we have posted? Unfortunately not very much. I've been glancing the DSS side of the driver, but not the v4l side as I don't know much about it. There seems to be awfully lot ifdefs for board/cpu types in the code. Also there are strange things defined, like L4_VIRT My biased and superficial view of the differences between my DSS and yours is that: - My implementation is cleaner, better organized and more generic - My implementation has support for DSI, SDI, RFBI, L4 updates - Your implementation has better support for extra things like VRFB, color conversions, alpha etc. - Your implementation most likely has better power management support. - And of course what is most visible to the user, my version uses only framebuffers, and yours uses also v4l2 devices. As for the future, I have no choice but to keep using my DSS as we need the features it has. I feel it would be quite a big job to get those in to your driver. And even if I had a choice, I (unsurprisingly =) think that my version is better and would stick to it. Have you had time to look at my code after I changed the overlay handling? I've put the most recent version to a public git tree at http://www.bat.org/~tomba/git/linux-omap-dss.git/ and I'll try to keep that up to date. Tomi Thanks, Vaibhav Hiremath Senior Software Engg. Platform Support Products Texas Instruments Inc Ph: +91-80-25099927 -Original Message- From: Hiremath, Vaibhav Sent: Monday, September 15, 2008 9:51 PM To: 'Tomi Valkeinen' Cc: Shah, Hardik; linux-omap@vger.kernel.org; [EMAIL PROTECTED] Subject: RE: [PREVIEW] New display subsystem for OMAP2/3 Thanks, Vaibhav Hiremath Senior Software Engg. Platform Support Products Texas Instruments Inc Ph: +91-80-25099927 TI IP Ph: 509-9927 http://dbdwss01.india.ti.com/pspproducts/ -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Tomi Valkeinen Sent: Monday, September 15, 2008 8:08 PM To: Hiremath, Vaibhav Cc: Shah, Hardik; linux-omap@vger.kernel.org; [EMAIL PROTECTED] Subject: RE: [PREVIEW] New display subsystem for OMAP2/3 On Mon, 2008-09-15 at 19:02 +0530, ext Hiremath, Vaibhav wrote: We more concentrated on TV and LCD interface, out design doesn't support DSI as of now. As mentioned earlier it is easily extendible to support DSI. If I understand your implementation correctly, right now there is no way you can switch the outputs, I mean to say from LCD to DVI. The frame buffer driver gets the handle with API omap_dss_get_display, which will return pointer to omap_display for panel-sdp3430. Henceforth all your functions will use omap_display configuring for LCD panel. How are you planning to add support for this? Through some ioctls or sysfs entry? How about switching between multiple overlay managers? You can switch the outputs in the DSS driver. You can enable/disable displays individually, and configure the planes and or L4 pixel source for the display. But yes, the fb driver does not support that currently. One idea I had was to present each display with one framebuffer, so let's say we have 3 displays, we would have fb[0-2]. In addition to that, we would have two framebuffers for the video overlays. Only one of the displays can be updated with DISPC, so the overlays would appear there. Then the display that is updated with DISPC could be changed on the fly to another one, but the framebuffer arrangement would stay the same (so fb0 would still be seen on display0, even if it's now updated with L4). There's still the question how to manage the video overlays, in this scenario they would automatically move to other LCD's as the DISPC target is changed. Also the TV-out is problematic. This issue has been addresses with our design, you can change the output either to TV, LCD or to DVI through sysfs entry. Switching between multiple overlay managers is very well supported in DSS library. Currently SYSFS is the user interface layer to control the overlay managers. But in future DSS library will easily be suitable to support media processor interface which is in concept phase right now. RFC for the media processor is at Does your design support displays that are not updated with DISPC? Yes, it should. I don't see any reason why it should fail if the display is completely independent. Your design has good points. I have to think about the overlay managers a bit more. Especially if in some future hardware there were more overlay managers instead of the current two. Let me take this opportunity, shortly I will post the DSS library and V4L2 driver. We can work
[PATCH] OMAP: Increase VMALLOC_END to allow 256MB RAM
This increases VMALLOC_END to 0x1800, making room for 256MB RAM with the default 128MB vmalloc region. Signed-off-by: Mans Rullgard [EMAIL PROTECTED] --- arch/arm/plat-omap/include/mach/vmalloc.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h index d8515cb..b97dfaf 100644 --- a/arch/arm/plat-omap/include/mach/vmalloc.h +++ b/arch/arm/plat-omap/include/mach/vmalloc.h @@ -17,5 +17,5 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#define VMALLOC_END (PAGE_OFFSET + 0x1700) +#define VMALLOC_END (PAGE_OFFSET + 0x1800) -- 1.6.0.2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [patch twl 1/2] remove linux/i2c/twl4030-rtc.h
On Wed, Oct 01, 2008 at 11:42:50PM -0700, David Brownell wrote: From: David Brownell [EMAIL PROTECTED] Remove linux/i2c/twl4030-rtc.h by moving all the relevant contents into the driver itself, and removing the rest. Stuff removed included many useless bitmasks, and remnants of the platform data hook. Add markers inside the rtc driver to split sections apart: first data structure declarations, then the RTC driver, then platform bus glue for it all. There's still an issue with the twl4030-pwrirq.h registers ... this driver has no business touching them! This patch at least switches away from having private versions of those register definitions, and removes some unnecessary accesses to them. No functional changes, just shrinkage. Signed-off-by: David Brownell [EMAIL PROTECTED] I was willing to get rid of all of them and just keep twl4030.h Nice job Dave :-) Acked-by: Felipe Balbi [EMAIL PROTECTED] --- This depends on an as-yet-unmerged RTC cleanup patch removing a bunch of headers. drivers/rtc/rtc-twl4030.c | 105 +++-- include/linux/i2c/twl4030-pwrirq.h |8 + include/linux/i2c/twl4030-rtc.h| 172 --- 3 files changed, 79 insertions(+), 206 deletions(-) --- a/drivers/rtc/rtc-twl4030.c +++ b/drivers/rtc/rtc-twl4030.c @@ -28,11 +28,63 @@ #include linux/interrupt.h #include linux/i2c/twl4030.h -#include linux/i2c/twl4030-rtc.h +#include linux/i2c/twl4030-pwrirq.h + + +/* + * RTC block register offsets (use TWL_MODULE_RTC) + */ +#define REG_SECONDS_REG 0x00 +#define REG_MINUTES_REG 0x01 +#define REG_HOURS_REG0x02 +#define REG_DAYS_REG 0x03 +#define REG_MONTHS_REG 0x04 +#define REG_YEARS_REG0x05 +#define REG_WEEKS_REG0x06 +#define REG_ALARM_SECONDS_REG0x07 +#define REG_ALARM_MINUTES_REG0x08 +#define REG_ALARM_HOURS_REG 0x09 +#define REG_ALARM_DAYS_REG 0x0A +#define REG_ALARM_MONTHS_REG 0x0B +#define REG_ALARM_YEARS_REG 0x0C + +#define REG_RTC_CTRL_REG 0x0D +#define REG_RTC_STATUS_REG 0x0E +#define REG_RTC_INTERRUPTS_REG 0x0F + +#define REG_RTC_COMP_LSB_REG 0x10 +#define REG_RTC_COMP_MSB_REG 0x11 +/* RTC_CTRL_REG bitfields */ +#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 +#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 +#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 +#define BIT_RTC_CTRL_REG_MODE_12_24_M0x08 +#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 +#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M0x20 +#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 + +/* RTC_STATUS_REG bitfields */ +#define BIT_RTC_STATUS_REG_RUN_M 0x02 +#define BIT_RTC_STATUS_REG_1S_EVENT_M0x04 +#define BIT_RTC_STATUS_REG_1M_EVENT_M0x08 +#define BIT_RTC_STATUS_REG_1H_EVENT_M0x10 +#define BIT_RTC_STATUS_REG_1D_EVENT_M0x20 +#define BIT_RTC_STATUS_REG_ALARM_M 0x40 +#define BIT_RTC_STATUS_REG_POWER_UP_M0x80 + +/* RTC_INTERRUPTS_REG bitfields */ +#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 +#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M0x04 +#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M0x08 + + +/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ #define ALL_TIME_REGS6 +/*--*/ + /* * Supports 1 byte read from TWL4030 RTC register. */ @@ -315,12 +367,19 @@ static irqreturn_t twl4030_rtc_interrupt if (res) goto out; - /* Clear on Read enabled. RTC_IT bit of REG_PWR_ISR1 needs - * 2 reads to clear the interrupt. One read is done in + /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 + * needs 2 reads to clear the interrupt. One read is done in * do_twl4030_pwrirq(). Doing the second read, to clear * the bit. + * + * FIXME the reason PWR_ISR1 needs an extra read is that + * RTC_IF retriggered until we cleared REG_ALARM_M above. + * But re-reading like this is a bad hack; by doing so we + * risk wrongly clearing status for some other IRQ (losing + * the interrupt). Be smarter about handling RTC_UF ... */ - res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, rd_reg, REG_PWR_ISR1); + res = twl4030_i2c_read_u8(TWL4030_MODULE_INT, + rd_reg, TWL4030_INT_PWR_ISR1); if (res) goto out; @@ -340,9 +399,10 @@ static struct rtc_class_ops
Re: [patch twl 2/2] remove linux/i2c/twl4030-pwrirq.h
On Wed, Oct 01, 2008 at 11:45:18PM -0700, David Brownell wrote:
From: David Brownell [EMAIL PROTECTED]
Get rid of another needless TWL header file: twl4030-pwrirq.h
can easily live in twl4030.h; updating its three users.
Also switch to the shared definition of the SIH_CTRL COR bit,
remove useless-to-non-driver MODULE_ALIAS(), and add a note
about a but that will appear if anyone ever removes this code.
No functional changes, just shrinkage.
Signed-off-by: David Brownell [EMAIL PROTECTED]
Acked-by: Felipe Balbi [EMAIL PROTECTED]
---
This leaves only linux/i2c/twl4030-madc.h as extra yet
associated with the TWL core code. It's got all kinds of
stuff; maybe someone else could split that up, making sure
ioctl bits get properly exported by make headers_install.
drivers/i2c/chips/twl4030-pwrirq.c | 13 +--
drivers/mfd/twl4030-core.c |1
drivers/rtc/rtc-twl4030.c |1
include/linux/i2c/twl4030-pwrirq.h | 39 ---
include/linux/i2c/twl4030.h| 15 +
5 files changed, 21 insertions(+), 48 deletions(-)
--- a/drivers/i2c/chips/twl4030-pwrirq.c
+++ b/drivers/i2c/chips/twl4030-pwrirq.c
@@ -27,9 +27,7 @@
#include linux/random.h
#include linux/kthread.h
#include linux/i2c/twl4030.h
-#include linux/i2c/twl4030-pwrirq.h
-#define PWR_SIH_CTRL_COR (12)
static u8 twl4030_pwrirq_mask;
static u8 twl4030_pwrirq_pending_unmask;
@@ -177,8 +175,9 @@ static int __init twl4030_pwrirq_init(vo
/* Enable clear on read */
- err = twl4030_i2c_write_u8(TWL4030_MODULE_INT, PWR_SIH_CTRL_COR,
-TWL4030_INT_PWR_SIH_CTRL);
+ err = twl4030_i2c_write_u8(TWL4030_MODULE_INT,
+ TWL4030_SIH_CTRL_COR_MASK,
+ TWL4030_INT_PWR_SIH_CTRL);
if (err)
return err;
@@ -201,12 +200,15 @@ static int __init twl4030_pwrirq_init(vo
return 0;
}
+subsys_initcall(twl4030_pwrirq_init);
static void __exit twl4030_pwrirq_exit(void)
{
int i;
+ /* FIXME the irqs are left enabled; trouble when they arrive... */
+
set_irq_handler(TWL4030_MODIRQ_PWR, NULL);
set_irq_flags(TWL4030_MODIRQ_PWR, 0);
@@ -220,7 +222,4 @@ static void __exit twl4030_pwrirq_exit(v
twl4030_pwrirq_unmask_thread = NULL;
}
}
-
-MODULE_ALIAS(i2c:twl4030-pwrirq);
-subsys_initcall(twl4030_pwrirq_init);
module_exit(twl4030_pwrirq_exit);
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -40,7 +40,6 @@
#include linux/i2c.h
#include linux/i2c/twl4030.h
#include linux/i2c/twl4030-madc.h
-#include linux/i2c/twl4030-pwrirq.h
#define DRIVER_NAME twl4030
--- a/drivers/rtc/rtc-twl4030.c
+++ b/drivers/rtc/rtc-twl4030.c
@@ -28,7 +28,6 @@
#include linux/interrupt.h
#include linux/i2c/twl4030.h
-#include linux/i2c/twl4030-pwrirq.h
/*
--- a/include/linux/i2c/twl4030-pwrirq.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * twl4030-pwrirq.h - header for TWL4030 power interrupts
- *
- * Copyright (C) 2008 Texas Instruments, Inc.
- * Copyright (C) 2008 Nokia Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- */
-
-#ifndef __TWL4030_PWRIRQ_H_
-#define __TWL4030_PWRIRQ_H_
-
-/*
- * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
- */
-
-#define TWL4030_INT_PWR_ISR1 0x0
-#define TWL4030_INT_PWR_IMR1 0x1
-#define TWL4030_INT_PWR_ISR2 0x2
-#define TWL4030_INT_PWR_IMR2 0x3
-#define TWL4030_INT_PWR_SIR 0x4 /* test register */
-#define TWL4030_INT_PWR_EDR1 0x5
-#define TWL4030_INT_PWR_EDR2 0x6
-#define TWL4030_INT_PWR_SIH_CTRL 0x7
-
-#endif /* End of __TWL4030_PWRIRQ_H */
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -152,6 +152,21 @@ int twl4030_i2c_read(u8 mod_no, u8 *valu
/*--*/
+/*
+ * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
+ */
+
+#define TWL4030_INT_PWR_ISR1 0x0
+#define TWL4030_INT_PWR_IMR1 0x1
+#define TWL4030_INT_PWR_ISR2 0x2
+#define
[PATCH] lm8323 pwm fixes
This patch fixes two problems in LM8323 PWM control. One is that
locking is needed when setting and reading pwm-desired_brightness
asynchronously. The other is that LM8323 may stop a PWM script only
after the current instruction has finished. If it is a long RAMP,
the chip would keep executing the old instruction and new
settings were effectively ignored.
Signed-off-by: Timo Karjalainen [EMAIL PROTECTED]
Signed-off-by: Daniel Stone [EMAIL PROTECTED]
---
drivers/input/keyboard/lm8323.c | 129 +--
1 files changed, 69 insertions(+), 60 deletions(-)
diff --git a/drivers/input/keyboard/lm8323.c b/drivers/input/keyboard/lm8323.c
index 72bb587..342ef6a 100644
--- a/drivers/input/keyboard/lm8323.c
+++ b/drivers/input/keyboard/lm8323.c
@@ -141,6 +141,8 @@ struct lm8323_pwm {
int fade_time;
int brightness;
int desired_brightness;
+ int running;
+ struct mutexlock;
struct work_struct work;
struct led_classdev cdev;
};
@@ -384,6 +386,15 @@ static int lm8323_configure(struct lm8323_chip *lm)
return 0;
}
+static void pwm_done(struct lm8323_pwm *pwm)
+{
+ mutex_lock(pwm-lock);
+ pwm-running = 0;
+ if (pwm-desired_brightness != pwm-brightness)
+ schedule_work(pwm-work);
+ mutex_unlock(pwm-lock);
+}
+
/*
* Bottom half: handle the interrupt by posting key events, or dealing with
* errors appropriately.
@@ -411,12 +422,18 @@ static void lm8323_work(struct work_struct *work)
reinitialising\n);
lm8323_configure(lm);
}
- if (ints INT_PWM1)
+ if (ints INT_PWM1) {
debug(lm-client-dev, pwm1 engine completed\n);
- if (ints INT_PWM2)
+ pwm_done(lm-pwm1);
+ }
+ if (ints INT_PWM2) {
debug(lm-client-dev, pwm2 engine completed\n);
- if (ints INT_PWM3)
+ pwm_done(lm-pwm2);
+ }
+ if (ints INT_PWM3) {
debug(lm-client-dev, pwm3 engine completed\n);
+ pwm_done(lm-pwm3);
+ }
}
mutex_unlock(lm-lock);
@@ -458,92 +475,80 @@ static void lm8323_write_pwm_one(struct lm8323_pwm *pwm,
int pos, u16 cmd)
/*
* Write a script into a given PWM engine, concluding with PWM_END.
- * If 'keepalive' is specified, the engine will be kept running
- * indefinitely.
+ * If 'kill' is nonzero, the engine will be shut down at the end
+ * of the script, producing a zero output. Otherwise the engine
+ * will be kept running at the final PWM level indefinitely.
*/
-static void lm8323_write_pwm(struct lm8323_pwm *pwm, int keepalive,
-int len, ...)
+static void lm8323_write_pwm(struct lm8323_pwm *pwm, int kill,
+int len, const u16 *cmds)
{
struct lm8323_chip *lm = pwm_to_lm8323(pwm);
- int i, cmd;
- va_list ap;
-
- /*
-* If there are any scripts running at the moment, terminate them
-* and make sure the duty cycle is as if it finished.
-*/
- lm8323_write(lm, 2, LM8323_CMD_STOP_PWM, pwm-id);
-
- va_start(ap, len);
- for (i = 0; i len; i++) {
- cmd = va_arg(ap, int);
- lm8323_write_pwm_one(pwm, i, cmd);
- }
- va_end(ap);
+ int i;
- /* Wait for a trigger from any channel. This keeps the engine alive. */
- if (keepalive)
- lm8323_write_pwm_one(pwm, i++, PWM_WAIT_TRIG(0xe));
- else
- lm8323_write_pwm_one(pwm, i++, PWM_END(1));
+ for (i = 0; i len; i++)
+ lm8323_write_pwm_one(pwm, i, cmds[i]);
+ lm8323_write_pwm_one(pwm, i++, PWM_END(kill));
lm8323_write(lm, 2, LM8323_CMD_START_PWM, pwm-id);
+ pwm-running = 1;
}
static void lm8323_pwm_work(struct work_struct *work)
{
struct lm8323_pwm *pwm = work_to_pwm(work);
- int div, perstep, steps, hz, direction, keepalive;
+ int div512, perstep, steps, hz, up, kill;
+ u16 pwm_cmds[3];
+ int num_cmds = 0;
+
+ mutex_lock(pwm-lock);
- /* Do nothing if we're already at the requested level. */
- if (pwm-desired_brightness == pwm-brightness)
+ /*
+* Do nothing if we're already at the requested level,
+* or previous setting is not yet complete. In the latter
+* case we will be called again when the previous PWM script
+* finishes.
+*/
+ if (pwm-running || pwm-desired_brightness == pwm-brightness) {
+ mutex_unlock(pwm-lock);
return;
+ }
- keepalive = (pwm-desired_brightness 0);
- direction =
Re: [patch 2.6.27-rc7-omap1-git 1/2] twl4030-core: move to drivers/mfd
On Wed, Oct 01, 2008 at 07:47:54PM -0700, David Brownell wrote:
Signed-off-by: David Brownell [EMAIL PROTECTED]
I suppose this first one should be From:
-static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs
*t,
- const u8 t_sz)
-{
- int i, j;
-
- /*
- * N.B. - further efficiency is possible here. Eight I2C
- * operations on BCI and GPIO modules are avoidable if I2C
- * burst read/write transactions were implemented. Would
- * probably save about 1ms of boot time and a small amount of
- * power.
- */
- for (i = 0; i t_sz; i++) {
- const struct twl4030_mod_iregs tmr = t[i];
- int cor;
-
- /* Are ISRs cleared by reads or writes? */
- cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
- WARN_ON(cor 0);
-
- for (j = 0; j tmr.reg_cnt; j++) {
-
- /* Mask interrupts at the TWL4030 */
- WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
- tmr.imrs[j]) 0);
-
- /* Clear TWL4030 ISRs */
- WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
- tmr.isrs[j], cor) 0);
- }
- }
-
- return;
this return can be removed.
+static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs
*t,
+ const u8 t_sz)
+{
+ int i, j;
+
+ /*
+ * N.B. - further efficiency is possible here. Eight I2C
+ * operations on BCI and GPIO modules are avoidable if I2C
+ * burst read/write transactions were implemented. Would
+ * probably save about 1ms of boot time and a small amount of
+ * power.
+ */
+ for (i = 0; i t_sz; i++) {
+ const struct twl4030_mod_iregs tmr = t[i];
+ int cor;
+
+ /* Are ISRs cleared by reads or writes? */
+ cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
+ WARN_ON(cor 0);
+
+ for (j = 0; j tmr.reg_cnt; j++) {
+
+ /* Mask interrupts at the TWL4030 */
+ WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
+ tmr.imrs[j]) 0);
+
+ /* Clear TWL4030 ISRs */
+ WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
+ tmr.isrs[j], cor) 0);
+ }
+ }
+
+ return;
also this one
--
balbi
--
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[PATCH 0/5 v2] ASoC Add TLV320AIC23 codec driver
Hi all, This is the next version of patches for tlv320aic23 codec. Only patch 1 and 2 are different from their version 1 counterparts. Changes: Patch1 - Incorporated the comments from Mark Brown. Patch2- File name is changed to osk5912.c from 5912osk.c. Thanks Troy Kisky for your help and time. Since my mailer is word wrapping the patches, I am attaching them too. Thanks Arun -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: Power management in omap3430
Hi Monte, monte L [EMAIL PROTECTED] writes: I just got hold of omapzoom and am running linux from omapzoom site. Since I am new to omap, request some guidance on power mgmt: - Is OMAP PM interface from Paul the current power mgmt framework for omap3430? - Does it work together with PM QoS or any other framework (I have read Kevin's comments: http://marc.info/?l=linux-omapm=120962073813933w=2) Is there an update on this - will they co-exist? In terms of power management, the omapzoom tree and the linux-omap tree have very different approaches. Currently, the only public tree with fully functional PM is the omapzoom tree. The interfaces you mention above are not part of omapzoom, but are being worked on for the linux-omap tree. Paul, myself, some folks at Nokia (Jouni Hogander, Tero Kristo, Peter De Schrijver) and some folks at TI (Rajendra Nayak) are working on organizing and stabilizing the various PM efforts into something that can be merged into the linux-omap tree. To that end, I've started to maintain PM branches of the linux-omap tree where these efforts will be focused. The current branch is pm-0 which contains support for retention and OFF-mode in suspend and dynamic idle tested mainly on OMAP3430SDP boards. The pm-1 branch will shortly contain updated versions of pm-0 patches, and several of the pm-0 patches have been merged into linux-omap. The 'OMAP PM interface' will be included in pm-1 (or maybe pm-2), but will be included shortly. Re: PM QoS, the OMAP PM layer and the CPUidle layer work together with PM QoS constraints, and they are taken into consideration during various PM decisions. The goal of these pm-N branches is to get this PM code in shape so it can be merged into linux-omap and then to mainline. My work involves porting few middleware and applications on to OMAP3430 platform. I am seeking your help in how to go about handling power management aspects, which are so elaborate in omap3. If you need something working out of the box today, then omapzoom is the only tree will fully functional PM in the kernel, and all the driver changes required to support the various PM states. That being said, what the power management goals of your middleware applications? Are you expecting for your applications to communicate various PM requirements to the kernel? Hope that helps, Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP: Increase VMALLOC_END to allow 256MB RAM
Mans Rullgard [EMAIL PROTECTED] writes: This increases VMALLOC_END to 0x1800, making room for 256MB RAM with the default 128MB vmalloc region. Signed-off-by: Mans Rullgard [EMAIL PROTECTED] --- arch/arm/plat-omap/include/mach/vmalloc.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h index d8515cb..b97dfaf 100644 --- a/arch/arm/plat-omap/include/mach/vmalloc.h +++ b/arch/arm/plat-omap/include/mach/vmalloc.h @@ -17,5 +17,5 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#define VMALLOC_END(PAGE_OFFSET + 0x1700) +#define VMALLOC_END(PAGE_OFFSET + 0x1800) Acked-by: Kevin Hilman [EMAIL PROTECTED] I have a similar patch locally, but the problem I currently have with it is that there is no longer any hole between vmalloc space and the beginning of IO space (the first virtual mappings start at 0xd800.) It's a bit unsafe, but IMO it's is probably OK for the short term. Longer term I think the virtual address space of the OMAP kernels needs to be reworked. It currenly just maps directly onto the physical address space, which makes the IO_ADDRESS() conversion macros simple, but leaves lots of wasted space in the virtual address space. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 5/5 v2] ASoC Adds DSP DAI format support for platform driver
Enables DSP DAI format for mcbsp in omap platform driver Signed-off-by: Arun KS [EMAIL PROTECTED] --- sound/soc/omap/omap-mcbsp.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 35310e1..fb920e1 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -245,6 +245,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, regs-rcr2 |= RDATDLY(1); regs-xcr2 |= XDATDLY(1); break; + case SND_SOC_DAIFMT_DSP_A: + /* 0-bit data delay */ + regs-rcr2 |= RDATDLY(0); + regs-xcr2 |= XDATDLY(0); + break; default: /* Unsupported data format */ return -EINVAL; -- 1.5.3.4 From 3f3c252625236bd7f3a3c949769d41b26efbc805 Mon Sep 17 00:00:00 2001 From: Arun KS [EMAIL PROTECTED] Date: Tue, 30 Sep 2008 13:30:15 +0530 Subject: [PATCH] ASoC Adds DSP DAI format support for platform driver Enables DSP DAI format for mcbsp in omap platform driver Signed-off-by: Arun KS [EMAIL PROTECTED] --- sound/soc/omap/omap-mcbsp.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 35310e1..fb920e1 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -245,6 +245,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, regs-rcr2 |= RDATDLY(1); regs-xcr2 |= XDATDLY(1); break; + case SND_SOC_DAIFMT_DSP_A: + /* 0-bit data delay */ + regs-rcr2 |= RDATDLY(0); + regs-xcr2 |= XDATDLY(0); + break; default: /* Unsupported data format */ return -EINVAL; -- 1.5.3.4
[PATCH 4/5 v2] ASOC adds destination and source port for dma
Adds destination and source port for dma in platform driver as
required by OMAP1
Signed-off-by: Arun KS [EMAIL PROTECTED]
---
sound/soc/omap/omap-pcm.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 690bfea..e9084fd 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -97,7 +97,7 @@ static int omap_pcm_hw_params(struct
snd_pcm_substream *substream,
prtd-dma_data = dma_data;
err = omap_request_dma(dma_data-dma_req, dma_data-name,
omap_pcm_dma_irq, substream, prtd-dma_ch);
- if (!cpu_is_omap1510()) {
+ if (!err !cpu_is_omap1510()) {
/*
* Link channel with itself so DMA doesn't need any
* reprogramming while looping the buffer
@@ -147,12 +147,14 @@ static int omap_pcm_prepare(struct
snd_pcm_substream *substream)
dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
dma_params.src_start= runtime-dma_addr;
dma_params.dst_start= dma_data-port_addr;
+ dma_params.dst_port = OMAP_DMA_PORT_MPUI;
} else {
dma_params.src_amode= OMAP_DMA_AMODE_CONSTANT;
dma_params.dst_amode= OMAP_DMA_AMODE_POST_INC;
dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
dma_params.src_start= dma_data-port_addr;
dma_params.dst_start= runtime-dma_addr;
+ dma_params.src_port = OMAP_DMA_PORT_MPUI;
}
/*
* Set DMA transfer frame size equal to ALSA period size and frame
--
1.5.3.4
From 931f23962ab516c1f48505a9d652e753d0106955 Mon Sep 17 00:00:00 2001
From: Arun KS [EMAIL PROTECTED]
Date: Tue, 30 Sep 2008 13:26:18 +0530
Subject: [PATCH] ASOC adds destination and source port for dma
Adds destination and source port for dma in platform driver as
required by OMAP1
Signed-off-by: Arun KS [EMAIL PROTECTED]
---
sound/soc/omap/omap-pcm.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 690bfea..e9084fd 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -97,7 +97,7 @@ static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
prtd-dma_data = dma_data;
err = omap_request_dma(dma_data-dma_req, dma_data-name,
omap_pcm_dma_irq, substream, prtd-dma_ch);
- if (!cpu_is_omap1510()) {
+ if (!err !cpu_is_omap1510()) {
/*
* Link channel with itself so DMA doesn't need any
* reprogramming while looping the buffer
@@ -147,12 +147,14 @@ static int omap_pcm_prepare(struct snd_pcm_substream *substream)
dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
dma_params.src_start = runtime-dma_addr;
dma_params.dst_start = dma_data-port_addr;
+ dma_params.dst_port = OMAP_DMA_PORT_MPUI;
} else {
dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT;
dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC;
dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
dma_params.src_start = dma_data-port_addr;
dma_params.dst_start = runtime-dma_addr;
+ dma_params.src_port = OMAP_DMA_PORT_MPUI;
}
/*
* Set DMA transfer frame size equal to ALSA period size and frame
--
1.5.3.4
[PATCH 3/5 v2] Adds I2C board info for tlvaic23
Adding I2C board info required for tlvaic23 i2c chip driver
Signed-off-by: Arun KS [EMAIL PROTECTED]
---
arch/arm/mach-omap1/board-osk.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 3e766e4..e506aef 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -258,8 +258,10 @@ static struct i2c_board_info __initdata
osk_i2c_board_info[] = {
.platform_data = tps_board,
},
+ {
+ I2C_BOARD_INFO(tlv320aic23, 0x1B),
+ },
/* TODO when driver support is ready:
-* - aic23 audio chip at 0x1a
* - on Mistral, 24c04 eeprom at 0x50
* - optionally on Mistral, ov9640 camera sensor at 0x30
*/
--
1.5.3.4
From 4fa38ce1bff4030151db2081b6fdc2ed4f3e12fc Mon Sep 17 00:00:00 2001
From: Arun KS [EMAIL PROTECTED]
Date: Tue, 30 Sep 2008 13:23:19 +0530
Subject: [PATCH] Adds I2C board info for tlvaic23
Adding I2C board info required for tlvaic23 i2c chip driver
Signed-off-by: Arun KS [EMAIL PROTECTED]
---
arch/arm/mach-omap1/board-osk.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index 3e766e4..e506aef 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -258,8 +258,10 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = {
.platform_data = tps_board,
},
+ {
+ I2C_BOARD_INFO(tlv320aic23, 0x1B),
+ },
/* TODO when driver support is ready:
- * - aic23 audio chip at 0x1a
* - on Mistral, 24c04 eeprom at 0x50
* - optionally on Mistral, ov9640 camera sensor at 0x30
*/
--
1.5.3.4
[PATCH 2/5 v2] Adds ASOC Support for osk5912
Adding ASOC machine driver for osk5912
Signed-off-by: Arun KS [EMAIL PROTECTED]
---
sound/soc/omap/Kconfig |8 ++
sound/soc/omap/Makefile |2 +
sound/soc/omap/osk5912.c | 232 ++
3 files changed, 242 insertions(+), 0 deletions(-)
create mode 100644 sound/soc/omap/osk5912.c
diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
index aea27e7..8b7766b 100644
--- a/sound/soc/omap/Kconfig
+++ b/sound/soc/omap/Kconfig
@@ -13,3 +13,11 @@ config SND_OMAP_SOC_N810
select SND_SOC_TLV320AIC3X
help
Say Y if you want to add support for SoC audio on Nokia N810.
+
+config SND_OMAP_SOC_OSK5912
+ tristate SoC Audio support for omap osk5912
+ depends on SND_OMAP_SOC MACH_OMAP_OSK
+ select SND_OMAP_SOC_MCBSP
+ select SND_SOC_TLV320AIC23
+ help
+ Say Y if you want to add support for SoC audio on osk5912.
diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile
index d8d8d58..e09d1f2 100644
--- a/sound/soc/omap/Makefile
+++ b/sound/soc/omap/Makefile
@@ -7,5 +7,7 @@ obj-$(CONFIG_SND_OMAP_SOC_MCBSP) += snd-soc-omap-mcbsp.o
# OMAP Machine Support
snd-soc-n810-objs := n810.o
+snd-soc-osk5912-objs := osk5912.o
obj-$(CONFIG_SND_OMAP_SOC_N810) += snd-soc-n810.o
+obj-$(CONFIG_SND_OMAP_SOC_OSK5912) += snd-soc-osk5912.o
diff --git a/sound/soc/omap/osk5912.c b/sound/soc/omap/osk5912.c
new file mode 100644
index 000..0fe7337
--- /dev/null
+++ b/sound/soc/omap/osk5912.c
@@ -0,0 +1,232 @@
+/*
+ * osk5912.c -- SoC audio for OSK 5912
+ *
+ * Copyright (C) 2008 Mistral Solutions
+ *
+ * Contact: Arun KS [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ *
+ */
+
+#include linux/clk.h
+#include linux/platform_device.h
+#include sound/core.h
+#include sound/pcm.h
+#include sound/soc.h
+#include sound/soc-dapm.h
+
+#include asm/mach-types.h
+#include mach/hardware.h
+#include linux/gpio.h
+#include mach/mcbsp.h
+
+#include omap-mcbsp.h
+#include omap-pcm.h
+#include ../codecs/tlv320aic23.h
+
+#define CODEC_CLOCK1200
+
+static struct clk *tlv320aic23_mclk;
+
+static int osk_startup(struct snd_pcm_substream *substream)
+{
+ return clk_enable(tlv320aic23_mclk);
+}
+
+static void osk_shutdown(struct snd_pcm_substream *substream)
+{
+ clk_disable(tlv320aic23_mclk);
+}
+
+static int osk_hw_params(struct snd_pcm_substream *substream,
+struct snd_pcm_hw_params *params)
+{
+ struct snd_soc_pcm_runtime *rtd = substream-private_data;
+ struct snd_soc_dai *codec_dai = rtd-dai-codec_dai;
+ struct snd_soc_dai *cpu_dai = rtd-dai-cpu_dai;
+ int err;
+
+ /* Set codec DAI configuration */
+ err = snd_soc_dai_set_fmt(codec_dai,
+ SND_SOC_DAIFMT_DSP_A |
+ SND_SOC_DAIFMT_NB_IF |
+ SND_SOC_DAIFMT_CBM_CFM);
+ if (err 0) {
+ printk(KERN_ERR can't set codec DAI configuration\n);
+ return err;
+ }
+
+ /* Set cpu DAI configuration */
+ err = snd_soc_dai_set_fmt(cpu_dai,
+ SND_SOC_DAIFMT_DSP_A |
+ SND_SOC_DAIFMT_NB_IF |
+ SND_SOC_DAIFMT_CBM_CFM);
+ if (err 0) {
+ printk(KERN_ERR can't set cpu DAI configuration\n);
+ return err;
+ }
+
+ /* Set the codec system clock for DAC and ADC */
+ err =
+ snd_soc_dai_set_sysclk(codec_dai, 0, CODEC_CLOCK, SND_SOC_CLOCK_IN);
+
+ if (err 0) {
+ printk(KERN_ERR can't set codec system clock\n);
+ return err;
+ }
+
+ return err;
+}
+
+static struct snd_soc_ops osk_ops = {
+ .startup = osk_startup,
+ .hw_params = osk_hw_params,
+ .shutdown = osk_shutdown,
+};
+
+static const struct snd_soc_dapm_widget tlv320aic23_dapm_widgets[] = {
+ SND_SOC_DAPM_HP(Headphone Jack, NULL),
+ SND_SOC_DAPM_LINE(Line In, NULL),
+ SND_SOC_DAPM_MIC(Mic Jack, NULL),
+};
+
+static const struct snd_soc_dapm_route audio_map[] = {
+ {Headphone Jack, NULL, LHPOUT},
+ {Headphone Jack, NULL, RHPOUT},
+
+ {LLINEIN, NULL, Line In},
+ {RLINEIN, NULL, Line In},
+
+ {MICIN, NULL, Mic Jack},
+};
+
+static int
Re: [alsa-devel] [PATCH 1/5 v2] ASoC Add TLV320AIC23 codec driver
On Thu, Oct 02, 2008 at 02:55:27PM +0530, Arun KS wrote:
ASoC codec driver for TLV320AIC23 device
Signed-off-by: Arun KS [EMAIL PROTECTED]
This looks good and it's probably as well to merge it now since the one
issue below is mostly cosmetic so if nothing else it'll be easier to
review incrementally so:
Acked-by: Mark Brown [EMAIL PROTECTED]
+static const char *deemph_text[] = {None, 32Khz, 44.1Khz, 48Khz};
+static const char *sidetone_text[] = {-6db, -9db, -12db, -18db,
0db};
...
+static const struct soc_enum tlv320aic23_sidetone =
+ SOC_ENUM_SINGLE(TLV320AIC23_ANLG, 6, 5, sidetone_text);
...
+ SOC_ENUM(Sidetone Gain, tlv320aic23_sidetone),
As I said on the last submission this should really be a SOC_SINGLE_TLV
called Sidetone Volume rather than an enumeration - it's a dB scale
controlling gain rather than an enumeration.
--
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the body of a message to [EMAIL PROTECTED]
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Re: [PATCH 0/2] omap-keypad fixes for OMAP2
Hello, the diff between l-o and mainline are these commits regarding to omap-keypad.c: commit fdee8764947cde1e6933e7d981ce5b9de00e83e6 Author: Tony Lindgren [EMAIL PROTECTED] Merge current mainline tree into linux-omap tree commit ed39c59ff267249e7e789ea3bb64afc1e9afb5bd Author: Russell King [EMAIL PROTECTED] omap: fix a load of warning: symbol 'xxx' was not declared. Should it be static? commit e85a9daa48453a4e7ffedf174b4358cdb444fbbb Author: David Brownell [EMAIL PROTECTED] some drivers switch away from OMAP-specific GPIO calls Should I take the relevant parts from these commits and send it to linux-input? Also there are other things broken in the omap-keypad driver. One thing came to my mind is in the omap_kp_enable_store: No matter what platform the code is running it tries to enable/disable IRQ number 33 (IH2_BASE + 1), which is not a nice thing to do... Péter On Thursday 02 October 2008 09:12:39 ext Tony Lindgren wrote: * Peter Ujfalusi [EMAIL PROTECTED] [081002 08:29]: Fixes for the omap-keypad driver on OMAP2 Peter Ujfalusi (2) OMAP2: omap-keypad: interrupt disable fix OMAP2: omap-keypad: Enable more than 6 rows drivers/input/keyboard/omap-keypad.c |6 +- 1 files changed, 1 insertions(+), 5 deletions(-) Looks good to me, here's my ack: Acked-by: Tony Lindgren [EMAIL PROTECTED] Can you please send your series to [EMAIL PROTECTED] for inclusion into the mainline kernel? Also cc linux-omap list. You might also want to also include other pending patches sitting in linux-omap into your series so we get this driver into sync with mainline too. Thanks, Tony -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [patch 2.6.27-rc7-omap1-git 1/2] twl4030-core: move to drivers/mfd
On Thursday 02 October 2008, Felipe Balbi wrote: On Wed, Oct 01, 2008 at 07:47:54PM -0700, David Brownell wrote: Signed-off-by: David Brownell [EMAIL PROTECTED] I suppose this first one should be From: Yes. + return; also this one I've got a lots of twl-core cleanups patch; I'll include this change there. This was *just* a move. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [patch 2.6.27-rc7-omap1-git 1/2] twl4030-core: move to drivers/mfd
On Thu, Oct 02, 2008 at 07:52:35AM -0700, David Brownell wrote: On Thursday 02 October 2008, Felipe Balbi wrote: On Wed, Oct 01, 2008 at 07:47:54PM -0700, David Brownell wrote: Signed-off-by: David Brownell [EMAIL PROTECTED] I suppose this first one should be From: Yes. + return; also this one I've got a lots of twl-core cleanups patch; I'll include this change there. This was *just* a move. Sounds good :-) -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] omap-keypad fixes for OMAP2
On Thursday 02 October 2008, Peter Ujfalusi wrote: commit e85a9daa48453a4e7ffedf174b4358cdb444fbbb Author: David Brownell [EMAIL PROTECTED] some drivers switch away from OMAP-specific GPIO calls Should I take the relevant parts from these commits and send it to linux-input? For that one, sure. The mainline patch doesn't seem to have gotten queued anywhere yet -- Andrew was off for a while. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/2] omap-keypad fixes for OMAP2
On Thursday 02 October 2008, Peter Ujfalusi wrote: commit ed39c59ff267249e7e789ea3bb64afc1e9afb5bd Author: Russell King [EMAIL PROTECTED] omap: fix a load of warning: symbol 'xxx' was not declared. Should it be static? Should I take the relevant parts from these commits and send it to linux-input? I think those may be in Russell's GIT waiting for a 2.6.28 merge request. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] ARM: OMAP2: Add non-CORE DPLL rate set code and M, N programming
Add non-CORE DPLL rate set code and M,N programming for OMAP3.
Connect it to OMAP34xx DPLLs 1, 2, 4, 5 via the clock framework.
You may see some warnings on rate sets from the freqsel code. The
table that TI presented in the 3430 TRM Rev F does not cover Fint
75, which definitely occurs in practice. However, the lack of this
freqsel case does not appear to impair the DPLL rate change.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock34xx.c | 141 +++
arch/arm/mach-omap2/clock34xx.h | 10 ++
arch/arm/plat-omap/include/mach/clock.h |1
3 files changed, 151 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 084e110..5ceff8e 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -104,6 +104,42 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8
state)
return ret;
}
+/* From 3430 TRM ES2 4.7.6.2 */
+static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n)
+{
+ unsigned long fint;
+ u16 f = 0;
+
+ fint = clk-parent-rate / (n + 1);
+
+ pr_debug(clock: fint is %lu\n, fint);
+
+ if (fint = 75 fint = 100)
+ f = 0x3;
+ else if (fint 100 fint = 125)
+ f = 0x4;
+ else if (fint 125 fint = 150)
+ f = 0x5;
+ else if (fint 150 fint = 175)
+ f = 0x6;
+ else if (fint 175 fint = 210)
+ f = 0x7;
+ else if (fint 750 fint = 1000)
+ f = 0xB;
+ else if (fint 1000 fint = 1250)
+ f = 0xC;
+ else if (fint 1250 fint = 1500)
+ f = 0xD;
+ else if (fint 1500 fint = 1750)
+ f = 0xE;
+ else if (fint 1750 fint = 2100)
+ f = 0xF;
+ else
+ pr_debug(clock: unknown freqsel setting for %d\n, n);
+
+ return f;
+}
+
/* Non-CORE DPLL (e.g., DPLLs that do not control SDRC) clock functions */
/*
@@ -240,7 +276,7 @@ static int omap3_noncore_dpll_enable(struct clk *clk)
if (clk == dpll3_ck)
return -EINVAL;
- if (clk-parent-rate == clk_get_rate(clk))
+ if (clk-parent-rate == omap2_get_dpll_rate(clk))
r = _omap3_noncore_dpll_bypass(clk);
else
r = _omap3_noncore_dpll_lock(clk);
@@ -270,6 +306,109 @@ static void omap3_noncore_dpll_disable(struct clk *clk)
_omap3_noncore_dpll_stop(clk);
}
+
+/* Non-CORE DPLL rate set code */
+
+/*
+ * omap3_noncore_dpll_program - set non-core DPLL M,N values directly
+ * @clk: struct clk * of DPLL to set
+ * @m: DPLL multiplier to set
+ * @n: DPLL divider to set
+ * @freqsel: FREQSEL value to set
+ *
+ * Program the DPLL with the supplied M, N values, and wait for the DPLL to
+ * lock.. Returns -EINVAL upon error, or 0 upon success.
+ */
+static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16
freqsel)
+{
+ struct dpll_data *dd;
+ u32 v;
+
+ if (!clk)
+ return -EINVAL;
+
+ dd = clk-dpll_data;
+ if (!dd)
+ return -EINVAL;
+
+ /*
+* According to the 12-5 CDP code from TI, Limitation 2.5
+* on 3430ES1 prevents us from changing DPLL multipliers or dividers
+* on DPLL4.
+*/
+ if (is_sil_rev_equal_to(OMAP3430_REV_ES1_0)
+ !strcmp(dpll4_ck, clk-name)) {
+ printk(KERN_ERR clock: DPLL4 cannot change rate due to
+ silicon 'Limitation 2.5' on 3430ES1.\n);
+ return -EINVAL;
+ }
+
+ /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
+ _omap3_noncore_dpll_bypass(clk);
+
+ v = __raw_readl(dd-mult_div1_reg);
+ v = ~(dd-mult_mask | dd-div1_mask);
+
+ /* Set mult (M), div1 (N), freqsel */
+ v |= m __ffs(dd-mult_mask);
+ v |= n __ffs(dd-div1_mask);
+ v |= freqsel __ffs(dd-freqsel_mask);
+
+ __raw_writel(v, dd-mult_div1_reg);
+
+ /* We let the clock framework set the other output dividers later */
+
+ /* REVISIT: Set ramp-up delay? */
+
+ _omap3_noncore_dpll_lock(clk);
+
+ return 0;
+}
+
+/**
+ * omap3_noncore_dpll_set_rate - set non-core DPLL rate
+ * @clk: struct clk * of DPLL to set
+ * @rate: rounded target rate
+ *
+ * Program the DPLL with the rounded target rate. Returns -EINVAL upon
+ * error, or 0 upon success.
+ */
+static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
+{
+ u16 freqsel;
+ struct dpll_data *dd;
+
+ if (!clk || !rate)
+ return -EINVAL;
+
+ dd = clk-dpll_data;
+ if (!dd)
+ return -EINVAL;
+
+ if (rate == omap2_get_dpll_rate(clk))
+ return 0;
+
+ if
[PATCH 00/10] OMAP clock updates for post 2.6.27
Hello, This patch series updates the OMAP2/3 clock tree. Some patches are from Tony's previous omap2-upstream series, and were already posted to linux-arm-kernel and reviewed[1]. The remaining patches are mostly clockdomain updates. The series can be pulled from: git://git.pwsan.com/linux-2.6 omap-clock-upstream The branch is based on rmk/devel, since powerdomain and clockdomain changes are not yet in mainline. - Paul 1. http://lists.arm.linux.org.uk/lurker/message/20080823.233712.c5e3bf4e.en.html --- Kevin Hilman (1): ARM: OMAP2: Implement CPUfreq frequency table based on PRCM table Paul Walmsley (8): OMAP2/3 clock: add clockdomains to all remaining clocks; remove superfluous init OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains; mark clocks OMAP2/3 clockdomains: add CM, PRM, virt_opp_clkdm clockdomains OMAP2/3 clockdomains: combine pwrdm, pwrdm_name into union in struct clockdomain OMAP2/3 clock: combine clkdm, clkdm_name into union in struct clk ARM: OMAP: Clock tree updates for OMAP2/3 ARM: OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code ARM: OMAP2: Add non-CORE DPLL rate set code and M,N programming Tony Lindgren (1): ARM: OMAP2: Remove OMAP_PRM_REGADDR, OMAP_CM_REGADDR arch/arm/mach-omap2/clock.c | 143 ++-- arch/arm/mach-omap2/clock.h |2 arch/arm/mach-omap2/clock24xx.c | 145 +++- arch/arm/mach-omap2/clock24xx.h | 611 +- arch/arm/mach-omap2/clock34xx.c | 141 arch/arm/mach-omap2/clock34xx.h | 850 ++--- arch/arm/mach-omap2/clockdomain.c | 58 +- arch/arm/mach-omap2/clockdomains.h| 119 +++- arch/arm/mach-omap2/cm-regbits-34xx.h | 15 arch/arm/mach-omap2/cm.h | 17 - arch/arm/mach-omap2/memory.c |3 arch/arm/mach-omap2/pm.c |2 arch/arm/mach-omap2/powerdomains.h|5 arch/arm/mach-omap2/powerdomains34xx.h| 31 + arch/arm/mach-omap2/prm-regbits-34xx.h|9 arch/arm/mach-omap2/prm.h | 166 ++--- arch/arm/mach-omap2/sram242x.S|5 arch/arm/mach-omap2/sram243x.S|5 arch/arm/plat-omap/common.c |1 arch/arm/plat-omap/cpu-omap.c | 58 ++ arch/arm/plat-omap/include/mach/clock.h | 17 - arch/arm/plat-omap/include/mach/clockdomain.h | 24 - arch/arm/plat-omap/include/mach/common.h |5 arch/arm/plat-omap/include/mach/powerdomain.h |5 arch/arm/plat-omap/include/mach/prcm.h|5 arch/arm/plat-omap/include/mach/system.h |4 26 files changed, 1484 insertions(+), 962 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/10] ARM: OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code
Fix sparse checkpatch warnings in OMAP2/3 PRCM PM code. This mostly
consists of:
- converting pointer comparisons to integers in form similar to
(ptr == 0) to the standard idiom (!ptr)
- labeling a few non-static private functions as static
- adding prototypes for *_init() functions in the appropriate header
files, and getting rid of the corresponding open-coded extern
prototypes in other C files
- renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
to avoid shadowing an earlier declaration
Clean up checkpatch issues. This mostly involves:
- converting some asm/ includes to linux/ includes
- cleaning up some whitespace
- getting rid of braces for conditionals with single following statements
Also take care of a few odds and ends, including:
- getting rid of unlikely() and likely() - none of this code is particularly
fast-path code, so the performance impact seems slim; and some of those
likely() and unlikely() indicators are probably not as accurate as the
ARM's branch predictor
- removing some superfluous casts
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock.c | 101 -
arch/arm/mach-omap2/clock.h |2
arch/arm/mach-omap2/clock24xx.c | 16 ++--
arch/arm/mach-omap2/pm.c |2
arch/arm/plat-omap/include/mach/clock.h |4 -
arch/arm/plat-omap/include/mach/powerdomain.h |1
arch/arm/plat-omap/include/mach/prcm.h|5 +
arch/arm/plat-omap/include/mach/system.h |4 -
8 files changed, 68 insertions(+), 67 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ad721e0..fff35cd 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -26,7 +26,6 @@
#include mach/clock.h
#include mach/clockdomain.h
-#include mach/sram.h
#include mach/cpu.h
#include asm/div64.h
@@ -190,11 +189,10 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask,
const char *name)
* 24xx uses 0 to indicate not ready, and 1 to indicate ready.
* 34xx reverses this, just to keep us on our toes
*/
- if (cpu_mask (RATE_IN_242X | RATE_IN_243X)) {
+ if (cpu_mask (RATE_IN_242X | RATE_IN_243X))
ena = mask;
- } else if (cpu_mask RATE_IN_343X) {
+ else if (cpu_mask RATE_IN_343X)
ena = 0;
- }
/* Wait for lock */
while (((__raw_readl(reg) mask) != ena)
@@ -217,29 +215,27 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask,
const char *name)
* Note: We don't need special code here for INVERT_ENABLE
* for the time being since INVERT_ENABLE only applies to clocks enabled by
* CM_CLKEN_PLL
+ *
+ * REVISIT: This code is ugly and does not belong here.
*/
static void omap2_clk_wait_ready(struct clk *clk)
{
- void __iomem *reg, *other_reg, *st_reg;
- u32 bit;
-
- /*
-* REVISIT: This code is pretty ugly. It would be nice to generalize
-* it and pull it into struct clk itself somehow.
-*/
- reg = clk-enable_reg;
- if u32)reg 0xff) = CM_FCLKEN1)
- (((u32)reg 0xff) = OMAP24XX_CM_FCLKEN2))
- other_reg = (void __iomem *)(((u32)reg ~0xf0) | 0x10); /*
CM_ICLKEN* */
- else if u32)reg 0xff) = CM_ICLKEN1)
-(((u32)reg 0xff) = OMAP24XX_CM_ICLKEN4))
- other_reg = (void __iomem *)(((u32)reg ~0xf0) | 0x00); /*
CM_FCLKEN* */
+ u32 bit, other_reg, st_reg;
+ unsigned long reg;
+
+ reg = (unsigned long)clk-enable_reg;
+ if (((reg 0xff) = CM_FCLKEN1)
+ ((reg 0xff) = OMAP24XX_CM_FCLKEN2))
+ other_reg = ((reg ~0xf0) | 0x10); /* CM_ICLKEN* */
+ else if (((reg 0xff) = CM_ICLKEN1)
+((reg 0xff) = OMAP24XX_CM_ICLKEN4))
+ other_reg = ((reg ~0xf0) | 0x00); /* CM_FCLKEN* */
else
return;
/* REVISIT: What are the appropriate exclusions for 34XX? */
/* No check for DSS or cam clocks */
- if (cpu_is_omap24xx() ((u32)reg 0x0f) == 0) { /* CM_{F,I}CLKEN1 */
+ if (cpu_is_omap24xx() (reg 0x0f) == 0) { /* CM_{F,I}CLKEN1 */
if (clk-enable_bit == OMAP24XX_EN_DSS2_SHIFT ||
clk-enable_bit == OMAP24XX_EN_DSS1_SHIFT ||
clk-enable_bit == OMAP24XX_EN_CAM_SHIFT)
@@ -249,25 +245,25 @@ static void omap2_clk_wait_ready(struct clk *clk)
/* REVISIT: What are the appropriate exclusions for 34XX? */
/* OMAP3: ignore DSS-mod clocks */
if (cpu_is_omap34xx()
- (((u32)reg ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) ||
-u32)reg ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0))
-clk-enable_bit == OMAP3430_EN_SSI_SHIFT)))
+ ((reg ~0xff) ==
[PATCH 05/10] ARM: OMAP2: Implement CPUfreq frequency table based on PRCM table
From: Kevin Hilman [EMAIL PROTECTED]
This patch adds a CPUfreq frequency-table implementation for OMAP2 by
walking the PRCM rate-table for available entries and adding them to a
CPUfreq table.
CPUfreq can then be used to manage switching between all the available
entries in the PRCM rate table. Either use the CPUfreq sysfs
interface directly, (see Section 3 of Documentation/cpu-freq/user-guide.txt)
or use the cpufrequtils package:
http://www.kernel.org/pub/linux/utils/kernel/cpufreq/cpufrequtils.html
Signed-off-by: Kevin Hilman [EMAIL PROTECTED]
Updated to try to use cpufreq_table if it exists.
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock24xx.c | 42 ++
arch/arm/plat-omap/cpu-omap.c | 58 +--
arch/arm/plat-omap/include/mach/clock.h |3 ++
3 files changed, 99 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 133c36f..9240e64 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -378,6 +378,45 @@ static int omap2_select_table_rate(struct clk *clk,
unsigned long rate)
return 0;
}
+#ifdef CONFIG_CPU_FREQ
+/*
+ * Walk PRCM rate table and fillout cpufreq freq_table
+ */
+static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)];
+
+void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
+{
+ struct prcm_config *prcm;
+ int i = 0;
+
+ for (prcm = rate_table; prcm-mpu_speed; prcm++) {
+ if (!(prcm-flags cpu_mask))
+ continue;
+ if (prcm-xtal_speed != sys_ck.rate)
+ continue;
+
+ /* don't put bypass rates in table */
+ if (prcm-dpll_speed == prcm-xtal_speed)
+ continue;
+
+ freq_table[i].index = i;
+ freq_table[i].frequency = prcm-mpu_speed / 1000;
+ i++;
+ }
+
+ if (i == 0) {
+ printk(KERN_WARNING %s: failed to initialize frequency
+ table\n, __func__);
+ return;
+ }
+
+ freq_table[i].index = i;
+ freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+ *table = freq_table[0];
+}
+#endif
+
static struct clk_functions omap2_clk_functions = {
.clk_enable = omap2_clk_enable,
.clk_disable= omap2_clk_disable,
@@ -385,6 +424,9 @@ static struct clk_functions omap2_clk_functions = {
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
.clk_disable_unused = omap2_clk_disable_unused,
+#ifdef CONFIG_CPU_FREQ
+ .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
+#endif
};
static u32 omap2_get_apll_clkin(void)
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index b269024..e7d09c3 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -23,10 +23,14 @@
#include linux/io.h
#include mach/hardware.h
+#include mach/clock.h
+#include linux/io.h
#include asm/system.h
#define VERY_HI_RATE 9
+static struct cpufreq_frequency_table *freq_table;
+
#ifdef CONFIG_ARCH_OMAP1
#define MPU_CLKmpu
#else
@@ -39,6 +43,9 @@ static struct clk *mpu_clk;
int omap_verify_speed(struct cpufreq_policy *policy)
{
+ if (freq_table)
+ return cpufreq_frequency_table_verify(policy, freq_table);
+
if (policy-cpu)
return -EINVAL;
@@ -70,12 +77,26 @@ static int omap_target(struct cpufreq_policy *policy,
struct cpufreq_freqs freqs;
int ret = 0;
+ /* Ensure desired rate is within allowed range. Some govenors
+* (ondemand) will just pass target_freq=0 to get the minimum. */
+ if (target_freq policy-cpuinfo.min_freq)
+ target_freq = policy-cpuinfo.min_freq;
+ if (target_freq policy-cpuinfo.max_freq)
+ target_freq = policy-cpuinfo.max_freq;
+
freqs.old = omap_getspeed(0);
freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
freqs.cpu = 0;
+ if (freqs.old == freqs.new)
+ return ret;
+
cpufreq_notify_transition(freqs, CPUFREQ_PRECHANGE);
- ret = clk_set_rate(mpu_clk, target_freq * 1000);
+#ifdef CONFIG_CPU_FREQ_DEBUG
+ printk(KERN_DEBUG cpufreq-omap: transition: %u -- %u\n,
+ freqs.old, freqs.new);
+#endif
+ ret = clk_set_rate(mpu_clk, freqs.new * 1000);
cpufreq_notify_transition(freqs, CPUFREQ_POSTCHANGE);
return ret;
@@ -83,16 +104,31 @@ static int omap_target(struct cpufreq_policy *policy,
static int __init omap_cpu_init(struct cpufreq_policy *policy)
{
+ int result = 0;
+
mpu_clk = clk_get(NULL, MPU_CLK);
if (IS_ERR(mpu_clk))
[PATCH 07/10] OMAP2/3 clockdomains: combine pwrdm, pwrdm_name into union in struct clockdomain
struct clockdomain contains a struct powerdomain *pwrdm and const char
*pwrdm_name. The pwrdm_name is only used at initialization to look up
the appropriate pwrdm pointer. Combining these into a union saves
about 100 bytes on 3430SDP. This patch should not cause any change in
kernel function.
Boot-tested on 3430SDP ES2.
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clockdomain.c | 58 +++--
arch/arm/mach-omap2/clockdomains.h| 54 ---
arch/arm/plat-omap/include/mach/clockdomain.h | 24 ++
3 files changed, 68 insertions(+), 68 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index 4c3ce9c..882809d 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -71,14 +71,14 @@ static void _autodep_lookup(struct clkdm_pwrdm_autodep
*autodep)
if (!omap_chip_is(autodep-omap_chip))
return;
- pwrdm = pwrdm_lookup(autodep-pwrdm_name);
+ pwrdm = pwrdm_lookup(autodep-pwrdm.name);
if (!pwrdm) {
pr_debug(clockdomain: _autodep_lookup: powerdomain %s
-does not exist\n, autodep-pwrdm_name);
+does not exist\n, autodep-pwrdm.name);
WARN_ON(1);
return;
}
- autodep-pwrdm = pwrdm;
+ autodep-pwrdm.ptr = pwrdm;
return;
}
@@ -95,16 +95,13 @@ static void _clkdm_add_autodeps(struct clockdomain *clkdm)
{
struct clkdm_pwrdm_autodep *autodep;
- for (autodep = autodeps; autodep-pwrdm_name; autodep++) {
- if (!autodep-pwrdm)
- continue;
-
+ for (autodep = autodeps; autodep-pwrdm.ptr; autodep++) {
pr_debug(clockdomain: adding %s sleepdep/wkdep for
-pwrdm %s\n, autodep-pwrdm_name,
-clkdm-pwrdm-name);
+pwrdm %s\n, autodep-pwrdm.ptr-name,
+clkdm-pwrdm.ptr-name);
- pwrdm_add_sleepdep(clkdm-pwrdm, autodep-pwrdm);
- pwrdm_add_wkdep(clkdm-pwrdm, autodep-pwrdm);
+ pwrdm_add_sleepdep(clkdm-pwrdm.ptr, autodep-pwrdm.ptr);
+ pwrdm_add_wkdep(clkdm-pwrdm.ptr, autodep-pwrdm.ptr);
}
}
@@ -120,16 +117,13 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm)
{
struct clkdm_pwrdm_autodep *autodep;
- for (autodep = autodeps; autodep-pwrdm_name; autodep++) {
- if (!autodep-pwrdm)
- continue;
-
+ for (autodep = autodeps; autodep-pwrdm.ptr; autodep++) {
pr_debug(clockdomain: removing %s sleepdep/wkdep for
-pwrdm %s\n, autodep-pwrdm_name,
-clkdm-pwrdm-name);
+pwrdm %s\n, autodep-pwrdm.ptr-name,
+clkdm-pwrdm.ptr-name);
- pwrdm_del_sleepdep(clkdm-pwrdm, autodep-pwrdm);
- pwrdm_del_wkdep(clkdm-pwrdm, autodep-pwrdm);
+ pwrdm_del_sleepdep(clkdm-pwrdm.ptr, autodep-pwrdm.ptr);
+ pwrdm_del_wkdep(clkdm-pwrdm.ptr, autodep-pwrdm.ptr);
}
}
@@ -179,7 +173,7 @@ void clkdm_init(struct clockdomain **clkdms,
autodeps = init_autodeps;
if (autodeps)
- for (autodep = autodeps; autodep-pwrdm_name; autodep++)
+ for (autodep = autodeps; autodep-pwrdm.ptr; autodep++)
_autodep_lookup(autodep);
}
@@ -202,13 +196,13 @@ int clkdm_register(struct clockdomain *clkdm)
if (!omap_chip_is(clkdm-omap_chip))
return -EINVAL;
- pwrdm = pwrdm_lookup(clkdm-pwrdm_name);
+ pwrdm = pwrdm_lookup(clkdm-pwrdm.name);
if (!pwrdm) {
pr_debug(clockdomain: clkdm_register %s: powerdomain %s
-does not exist\n, clkdm-name, clkdm-pwrdm_name);
+does not exist\n, clkdm-name, clkdm-pwrdm.name);
return -EINVAL;
}
- clkdm-pwrdm = pwrdm;
+ clkdm-pwrdm.ptr = pwrdm;
mutex_lock(clkdm_mutex);
/* Verify that the clockdomain is not already registered */
@@ -242,7 +236,7 @@ int clkdm_unregister(struct clockdomain *clkdm)
if (!clkdm)
return -EINVAL;
- pwrdm_del_clkdm(clkdm-pwrdm, clkdm);
+ pwrdm_del_clkdm(clkdm-pwrdm.ptr, clkdm);
mutex_lock(clkdm_mutex);
list_del(clkdm-node);
@@ -327,7 +321,7 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain
*clkdm)
if (!clkdm)
return NULL;
- return clkdm-pwrdm;
+ return clkdm-pwrdm.ptr;
}
@@ -348,7 +342,7 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain
*clkdm)
if (!clkdm)
return -EINVAL;
- v =
[PATCH 10/10] OMAP2/3 clock: add clockdomains to all remaining clocks; remove superfluous init
Add clockdomains for all remaining clocks without them, and warn in
clk_register() if any are missing a clockdomain. Also remove
omap2_init_clk_clkdm() from all clocks that use it, since the OMAP3
arch clock init code already calls it.
The following TI documents are used as reference:
OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 TRM Version Q
OMAP2430 Multimedia Device Package-on-Package (POP) Silicon Revision 2.1 TRM
Version Q
OMAP34xx Multimedia Device Silicon Revision 3.0 Version I TRM
OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.0 Security
Addendum Version B TRM
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock.c |8 +--
arch/arm/mach-omap2/clock24xx.h |7 +-
arch/arm/mach-omap2/clock34xx.h | 43 +++
3 files changed, 36 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 04b8cdb..a0017ce 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -77,8 +77,10 @@ void omap2_init_clk_clkdm(struct clk *clk)
{
struct clockdomain *clkdm;
- if (!clk-clkdm.name)
+ if (!clk-clkdm.name) {
+ pr_err(clock: %s: missing clockdomain, clk-name);
return;
+ }
clkdm = clkdm_lookup(clk-clkdm.name);
if (clkdm) {
@@ -86,8 +88,8 @@ void omap2_init_clk_clkdm(struct clk *clk)
clk-name, clk-clkdm.name);
clk-clkdm.ptr = clkdm;
} else {
- pr_debug(clock: could not associate clk %s to
-clkdm %s\n, clk-name, clk-clkdm.name);
+ pr_err(clock: %s: could not associate to clkdm %s\n,
+ clk-name, clk-clkdm.name);
}
}
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index b3119e3..01ef619 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -1088,12 +1088,13 @@ static struct clk dsp_irate_ick = {
.parent = dsp_fck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP |
CONFIG_PARTICIPANT | PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dsp_clkdm },
.clksel_reg = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_CLKSEL),
.clksel_mask= OMAP24XX_CLKSEL_DSP_IF_MASK,
.clksel = dsp_irate_ick_clksel,
.recalc = omap2_clksel_recalc,
.round_rate = omap2_clksel_round_rate,
- .set_rate = omap2_clksel_set_rate
+ .set_rate = omap2_clksel_set_rate
};
/* 2420 only */
@@ -1101,6 +1102,7 @@ static struct clk dsp_ick = {
.name = dsp_ick, /* apparently ipi and isp */
.parent = dsp_irate_ick,
.flags = CLOCK_IN_OMAP242X | DELAYED_APP | CONFIG_PARTICIPANT,
+ .clkdm = { .name = dsp_clkdm },
.enable_reg = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_ICLKEN),
.enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */
};
@@ -1110,6 +1112,7 @@ static struct clk iva2_1_ick = {
.name = iva2_1_ick,
.parent = dsp_irate_ick,
.flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT,
+ .clkdm = { .name = dsp_clkdm },
.enable_reg = _CM_REG_OFFSET(OMAP24XX_DSP_MOD, CM_FCLKEN),
.enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT,
};
@@ -1689,6 +1692,7 @@ static struct clk gpt7_ick = {
.name = gpt7_ick,
.parent = l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
+ .clkdm = { .name = core_l4_clkdm },
.enable_reg = _CM_REG_OFFSET(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP24XX_EN_GPT7_SHIFT,
.recalc = followparent_recalc,
@@ -2584,6 +2588,7 @@ static struct clk mmchs2_fck = {
.id = 2,
.parent = func_96m_ck,
.flags = CLOCK_IN_OMAP243X,
+ .clkdm = { .name = core_l4_clkdm },
.enable_reg = _CM_REG_OFFSET(CORE_MOD, OMAP24XX_CM_FCLKEN2),
.enable_bit = OMAP2430_EN_MMCHS2_SHIFT,
.recalc = followparent_recalc,
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index f1c5c58..355e7e8 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -790,7 +790,7 @@ static struct clk virt_omap_54m_fck = {
.clksel = virt_omap_54m_fck_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
- .clkdm = { .name = cm_clkdm },
+ .clkdm = { .name = dpll4_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -1015,6 +1015,7 @@ static struct
[PATCH 09/10] OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains; mark clocks
Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and
clockdomain; so, create powerdomain and clockdomain structures for them.
Mark each DPLL clock as belonging to their respective DPLL clockdomain.
cf. 34xx TRM Table 4-27 (among other references).
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock34xx.h| 27 +
arch/arm/mach-omap2/clockdomains.h | 35
arch/arm/mach-omap2/powerdomains.h |5 +
arch/arm/mach-omap2/powerdomains34xx.h | 31
4 files changed, 98 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 7578146..f1c5c58 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -316,6 +316,7 @@ static struct clk dpll1_ck = {
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
+ .clkdm = { .name = dpll1_clkdm },
.recalc = omap3_dpll_recalc,
};
@@ -328,6 +329,7 @@ static struct clk dpll1_x2_ck = {
.parent = dpll1_ck,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll1_clkdm },
.recalc = omap3_clkoutx2_recalc,
};
@@ -350,6 +352,7 @@ static struct clk dpll1_x2m2_ck = {
.clksel = div16_dpll1_x2m2_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll1_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -387,6 +390,7 @@ static struct clk dpll2_ck = {
.disable= omap3_noncore_dpll_disable,
.round_rate = omap2_dpll_round_rate,
.set_rate = omap3_noncore_dpll_set_rate,
+ .clkdm = { .name = dpll2_clkdm },
.recalc = omap3_dpll_recalc,
};
@@ -409,6 +413,7 @@ static struct clk dpll2_m2_ck = {
.clksel = div16_dpll2_m2x2_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll2_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -440,6 +445,7 @@ static struct clk dpll3_ck = {
.dpll_data = dpll3_dd,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED,
.round_rate = omap2_dpll_round_rate,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap3_dpll_recalc,
};
@@ -452,6 +458,7 @@ static struct clk dpll3_x2_ck = {
.parent = dpll3_ck,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap3_clkoutx2_recalc,
};
@@ -509,6 +516,7 @@ static struct clk dpll3_m2_ck = {
.clksel = div31_dpll3m2_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -544,6 +552,7 @@ static struct clk dpll3_m2x2_ck = {
.clksel = dpll3_m2x2_ck_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -563,6 +572,7 @@ static struct clk dpll3_m3_ck = {
.clksel = div16_dpll3_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -573,6 +583,7 @@ static struct clk dpll3_m3x2_ck = {
.enable_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_EMU_CORE_SHIFT,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap3_clkoutx2_recalc,
};
@@ -591,6 +602,7 @@ static struct clk emu_core_alwon_ck = {
.clksel = emu_core_alwon_ck_clksel,
.flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
PARENT_CONTROLS_CLOCK,
+ .clkdm = { .name = dpll3_clkdm },
.recalc = omap2_clksel_recalc,
};
@@ -626,6 +638,7 @@ static struct clk dpll4_ck = {
.disable= omap3_noncore_dpll_disable,
.round_rate = omap2_dpll_round_rate,
.set_rate =
[PATCH 08/10] OMAP2/3 clockdomains: add CM, PRM, virt_opp_clkdm clockdomains
Add clockdomains for the CM and PRM. These replace wkup_clkdm, a
placeholder clockdomain which does not exist on the hardware. Add a
clockdomain for virtual OPP clocks, virt_opp_clkdm. Mark all clocks
in the clock tree with a valid clockdomain.
The following TI documents are used as reference:
OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 TRM Version Q
OMAP34xx Multimedia Device Silicon Revision 3.0 Version I TRM
OMAP34xx Multimedia High Security (HS) Device Silicon Revision 3.0 Security
Addendum Version B TRM
Signed-off-by: Paul Walmsley [EMAIL PROTECTED]
Signed-off-by: Tony Lindgren [EMAIL PROTECTED]
This patch includes an earlier fix to sys_clkout2's clockdomain by
Tomi Valkeinen [EMAIL PROTECTED].
Signed-off-by: Tomi Valkeinen [EMAIL PROTECTED]
---
arch/arm/mach-omap2/clock24xx.h | 49 ++
arch/arm/mach-omap2/clock34xx.h | 70 ++---
arch/arm/mach-omap2/clockdomains.h| 30 +--
arch/arm/plat-omap/include/mach/powerdomain.h |4 +
4 files changed, 106 insertions(+), 47 deletions(-)
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h
index 3459321..b3119e3 100644
--- a/arch/arm/mach-omap2/clock24xx.h
+++ b/arch/arm/mach-omap2/clock24xx.h
@@ -633,7 +633,7 @@ static struct clk func_32k_ck = {
.rate = 32000,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.recalc = propagate_rate,
};
@@ -642,7 +642,7 @@ static struct clk osc_ck = {/* (*12, *13,
19.2, *26, 38.4)MHz */
.name = osc_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_PROPAGATES,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.enable = omap2_enable_osc_ck,
.disable= omap2_disable_osc_ck,
.recalc = omap2_osc_clk_recalc,
@@ -654,7 +654,7 @@ static struct clk sys_ck = {/* (*12, *13,
19.2, 26, 38.4)MHz */
.parent = osc_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
ALWAYS_ENABLED | RATE_PROPAGATES,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.recalc = omap2_sys_clk_recalc,
};
@@ -663,7 +663,7 @@ static struct clk alt_ck = {/* Typical 54M
or 48M, may not exist */
.rate = 5400,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.recalc = propagate_rate,
};
@@ -695,7 +695,7 @@ static struct clk dpll_ck = {
.dpll_data = dpll_dd,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_PROPAGATES | ALWAYS_ENABLED,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.recalc = omap2_dpllcore_recalc,
.set_rate = omap2_reprogram_dpllcore,
};
@@ -706,7 +706,7 @@ static struct clk apll96_ck = {
.rate = 9600,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.enable_reg = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_96M_PLL_SHIFT,
.enable = omap2_clk_fixed_enable,
@@ -720,7 +720,7 @@ static struct clk apll54_ck = {
.rate = 5400,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = prm_clkdm },
.enable_reg = _CM_REG_OFFSET(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP24XX_EN_54M_PLL_SHIFT,
.enable = omap2_clk_fixed_enable,
@@ -755,7 +755,7 @@ static struct clk func_54m_ck = {
.parent = apll54_ck, /* can also be alt_clk */
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_PROPAGATES | PARENT_CONTROLS_CLOCK,
- .clkdm = { .name = wkup_clkdm },
+ .clkdm = { .name = cm_clkdm },
.init = omap2_init_clksel_parent,
.clksel_reg = _CM_REG_OFFSET(PLL_MOD, CM_CLKSEL1),
.clksel_mask= OMAP24XX_54M_SOURCE,
@@ -768,7 +768,7 @@ static struct clk
[patch twl] twl4030-core -- more cleanups
From: David Brownell [EMAIL PROTECTED] A variety of twl4030-core cleanups: - SIH register declarations moved from core.c to twl4030.h, for keypad, madc, bci; this decouples from twl4030-madc.h; add several omitted register decls; remove a duplicate. - Use a global inuse flag, not a per-slave one; - Remove pointless slave NUM_NUM symbols; just use 0/1/2/3 - Comments: * Add comments: header, register values * Add some section delimiters * Correct clock init and other comments - Minor stuff: * Group some variables and code with siblings * Make clock init a bit simpler * List twl5030 in supported i2c chips list * Remove needless return; And one IRQ-related bugfix: if any I2C error (like the timeout bug) strikes while reading PIH interrupt status, force an immediate retry. Otherwise the twl4030 IRQ will never get re-enabled... Object size shrinks by not-quite-200 bytes, w00t! Signed-off-by: David Brownell [EMAIL PROTECTED] --- This is the last non-IRQ cleanup I anticipate for this code; with the preceding remove headers patches, this resolves all the comments (mostly mine, sigh) received from the LKML post. So far... drivers/mfd/twl4030-core.c | 263 ++--- include/linux/i2c/twl4030-madc.h |8 - include/linux/i2c/twl4030.h | 51 +++ 3 files changed, 181 insertions(+), 141 deletions(-) --- a/drivers/mfd/twl4030-core.c +++ b/drivers/mfd/twl4030-core.c @@ -39,7 +39,20 @@ #include linux/i2c.h #include linux/i2c/twl4030.h -#include linux/i2c/twl4030-madc.h + + +/* + * The TWL4030 Triton 2 is one of a family of a multi-function Power + * Management and System Companion Device chips originally designed for + * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C, + * often at around 3 Mbit/sec, including for interrupt handling. + * + * This driver core provides genirq support for the interrupts emitted, + * by the various modules, and exports register access primitives. + * + * FIXME this driver currently requires use of the first interrupt line + * (and associated registers). + */ #define DRIVER_NAMEtwl4030 @@ -108,23 +121,20 @@ static inline void activate_irq(int irq) #define TWL4030_NUM_SLAVES 4 -/* Slave address */ -#define TWL4030_SLAVENUM_NUM0 0x00 -#define TWL4030_SLAVENUM_NUM1 0x01 -#define TWL4030_SLAVENUM_NUM2 0x02 -#define TWL4030_SLAVENUM_NUM3 0x03 -/* Base Address defns */ -/* USB ID */ +/* Base Address defns for twl4030_map[] */ + +/* subchip/slave 0 - USB ID */ #define TWL4030_BASEADD_USB0x -/* AUD ID */ + +/* subchip/slave 1 - AUD ID */ #define TWL4030_BASEADD_AUDIO_VOICE0x #define TWL4030_BASEADD_GPIO 0x0098 - #define TWL4030_BASEADD_INTBR 0x0085 #define TWL4030_BASEADD_PIH0x0080 #define TWL4030_BASEADD_TEST 0x004C -/* AUX ID */ + +/* subchip/slave 2 - AUX ID */ #define TWL4030_BASEADD_INTERRUPTS 0x00B9 #define TWL4030_BASEADD_LED0x00EE #define TWL4030_BASEADD_MADC 0x @@ -135,7 +145,8 @@ static inline void activate_irq(int irq) #define TWL4030_BASEADD_PWMA 0x00EF #define TWL4030_BASEADD_PWMB 0x00F1 #define TWL4030_BASEADD_KEYPAD 0x00D2 -/* POWER ID */ + +/* subchip/slave 3 - POWER ID */ #define TWL4030_BASEADD_BACKUP 0x0014 #define TWL4030_BASEADD_INT0x002E #define TWL4030_BASEADD_PM_MASTER 0x0036 @@ -143,44 +154,26 @@ static inline void activate_irq(int irq) #define TWL4030_BASEADD_RTC0x001C #define TWL4030_BASEADD_SECURED_REG0x -/* TWL4030 BCI registers */ -#define TWL4030_INTERRUPTS_BCIIMR1A0x2 -#define TWL4030_INTERRUPTS_BCIIMR2A0x3 -#define TWL4030_INTERRUPTS_BCIIMR1B0x6 -#define TWL4030_INTERRUPTS_BCIIMR2B0x7 -#define TWL4030_INTERRUPTS_BCIISR1A0x0 -#define TWL4030_INTERRUPTS_BCIISR2A0x1 -#define TWL4030_INTERRUPTS_BCIISR1B0x4 -#define TWL4030_INTERRUPTS_BCIISR2B0x5 - -/* TWL4030 keypad registers */ -#define TWL4030_KEYPAD_KEYP_IMR1 0x12 -#define TWL4030_KEYPAD_KEYP_IMR2 0x14 -#define TWL4030_KEYPAD_KEYP_ISR1 0x11 -#define TWL4030_KEYPAD_KEYP_ISR2 0x13 - - /* Triton Core internal information (END) */ + /* Few power values */ #define R_CFG_BOOT 0x05 #define R_PROTECT_KEY 0x0E -/* access control */ +/* access control values for R_PROTECT_KEY */ #define KEY_UNLOCK10xce #define KEY_UNLOCK20xec #define KEY_LOCK 0x00 +/* some fields in R_CFG_BOOT */ #define HFCLK_FREQ_19p2_MHZ(1 0) #define HFCLK_FREQ_26_MHZ (2 0) #define HFCLK_FREQ_38p4_MHZ(3 0) #define HIGH_PERF_SQ (1 3) -/* SIH_CTRL registers that aren't defined elsewhere */ -#define TWL4030_INTERRUPTS_BCISIHCTRL 0x0d
Re: [patch 2.6.27-rc7-omap1-git 1/2] twl4030-core: move to drivers/mfd
On Wednesday 01 October 2008, David Brownell wrote:
NOTE: minor weirdness. The twl403-pwrirq initializes earlier (?)
than before ... but i2c_omap i2c_omap.1: controller timed out
I'm seeing a bunch of these ... not clear why. Usually while
booting ... but regardless, lack of fault recovery makes for
lots of trouble.
is the response to its first I2C request. So it bails, causing
twl4030_usb and then rtc_twl4030 request_irq() calls to fail, and
those drivers probe() calls fail.
But, for the first time in a long while, the USB host now enumerates
my Ethernet adapter!! So it's a net win in terms of overall behavior,
since I can now get the time from NTP (loss of RTC doesn't hurt).
Make the pwrirq code retry that first write (setting the mask to
the value the core already set it) ... and pwrirq comes up, RTC,
the transceiver glue. And USB can't enumerate that adapter. :(
My retry hack is appended. If anyone has an idea what's up with
the I2C driver, it'd be good to fix ... although I'm happy to see
what fault handling bugs these errors turn up.
More info on the USB thing: the issue is that if the external
hub is connected when MUSB comes up, it misbehaves. If it's
plugged in later, it works. The misbehavior may involve not
seeing the external hub; or it may instead be errors in some
operations talking to a devices hooked up to it.
- Dave
Usually a single retry lets this chip behave.
---
drivers/i2c/chips/twl4030-pwrirq.c | 10 ++
1 file changed, 10 insertions(+)
--- a/drivers/i2c/chips/twl4030-pwrirq.c
+++ b/drivers/i2c/chips/twl4030-pwrirq.c
@@ -161,6 +161,8 @@ static int twl4030_pwrirq_thread(void *d
return 0;
}
+#include linux/delay.h
+
static int __init twl4030_pwrirq_init(void)
{
int i, err;
@@ -168,8 +170,16 @@ static int __init twl4030_pwrirq_init(vo
twl4030_pwrirq_mask = 0xff;
twl4030_pwrirq_pending_unmask = 0;
+/* HEY: core already did this.
+ * But that's surely not why we
+ * sometimes see timeouts here ...
+ */
+for (i = 0; i 5; i++) {
err = twl4030_i2c_write_u8(TWL4030_MODULE_INT, twl4030_pwrirq_mask,
TWL4030_INT_PWR_IMR1);
+if (!err) break;
+msleep(10);
+}
if (err)
return err;
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Re: [PATCH 00/10] OMAP clock updates for post 2.6.27
On Thu, Oct 02, 2008 at 10:37:46AM -0600, Paul Walmsley wrote: This patch series updates the OMAP2/3 clock tree. Some patches are from Tony's previous omap2-upstream series, and were already posted to linux-arm-kernel and reviewed[1]. The remaining patches are mostly clockdomain updates. Great. The series can be pulled from: git://git.pwsan.com/linux-2.6 omap-clock-upstream The branch is based on rmk/devel, since powerdomain and clockdomain changes are not yet in mainline. I assume then you haven't read the top commit on my devel branch, which reads: DO NOT BASE YOUR TREE ON THE DEVEL BRANCH Merge branch 'master' into devel The reason is that 'devel' is a convenience merge branch of currently about 25 other sub-branches for people who want to get the entire lot of changes. As such, the merges found there are frequently discarded and recreated. If you want something more stable and omap related, that can be arranged. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] [RFC] clk: introduce clk_associate
On Wednesday 01 October 2008, Hiroshi DOYU wrote: Or, this feature itself can be covered by 'virtual clock(vclk)'? http://marc.info/?l=linux-omapm=122066992729949w=2 which means that, in this case, if 'vclk' just has a single child, not multiple, it can be used just as 'aliasing' of clock names, without touching the contents of 'struct clk', since 'vclk' is a inhritance of 'struct clk'. If clk_get(dev, alias) keys on dev, then that could seem to be an alternate implementation strategy. Does it? I've not been tracking the evolution of the OMAP clock tree code, but the treatment of dev seems quite indirect. It doesn't seem possible, for example, to stick a programmable clock onto a non-platform device ... even when that's the relevant input to, for example, some external CODEC. I think that the point here is how to __hide__ the real detail clock information(names, numbers, functionalites and so on) from client device drivers. That's one way to look at it. Hiding is not the requirement though; I have no problem if they can see that information. (Not that the clock interfaces support querying by any scheme more intelligent than looking up all possible names!) The requirement is instead to provide a portable logical view of the clock tree ... it doesn't matter if a physical view is available too, or even that both models exist. Some driver may need to control multiple clocks at once. Some may need a clock which has different names between omap1, omap2/3 or target boards. Or some may need to control multiple clock groups from the functional perspective. So I think that a *flexible* infrastructure would be better to afford such requiments, keeping 'struct clk' as simple as possible. That vclk stuff looked a bit less obvious than I like. Maybe I just haven't seen the need for those particular flavors of flexibility. - Dave -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] [RFC] clk: introduce clk_associate
On Thu, Oct 02, 2008 at 01:50:02PM -0700, David Brownell wrote: On Wednesday 01 October 2008, Hiroshi DOYU wrote: Or, this feature itself can be covered by 'virtual clock(vclk)'? http://marc.info/?l=linux-omapm=122066992729949w=2 which means that, in this case, if 'vclk' just has a single child, not multiple, it can be used just as 'aliasing' of clock names, without touching the contents of 'struct clk', since 'vclk' is a inhritance of 'struct clk'. If clk_get(dev, alias) keys on dev, then that could seem to be an alternate implementation strategy. Does it? in that case, clk_associate (or clk_add_alias like in pxa) would be needed to associate the device with the struct clk, right ? I've not been tracking the evolution of the OMAP clock tree code, but the treatment of dev seems quite indirect. It doesn't seem possible, for example, to stick a programmable clock onto a non-platform device ... even when that's the relevant input to, for example, some external CODEC. in this case I think clk_associate would fail. Same for anything else that hides the device pointer from board-files. That's one way to look at it. Hiding is not the requirement though; I have no problem if they can see that information. (Not that the clock interfaces support querying by any scheme more intelligent than looking up all possible names!) the problem with names for omap is that it's useful to name the clock with the same name we see in TRM to ease the search (it's +3k pages manual, anything to make searching easier is valid :-) but then again, clk names changes among omap versions. So an alias (or function) name would help us keeping the correct clk name in the header files and yet have a standard/simpler name for drivers to use, like mmc interface clock (mmc_ick) and mmc functional clock (mmc_fck). No matter if it's omap1/2/3/... we could keep the function name the same while clk name refers to TRM. The requirement is instead to provide a portable logical view of the clock tree ... it doesn't matter if a physical view is available too, or even that both models exist. that's true. We need a logical and rather stable (I'm referring to clk names here) view of the clk tree so drivers don't have to care anymore about different clk names. Having to add cpu conditional code in the driver just because of a different clk name doesn't sound doable anymore neither passing an extra char * to the driver via pdata. -- balbi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
[patch 2.6.27-rc7-omap-git+ 1/3] gpiolib: gpio_to_irq() hooks
From: David Brownell [EMAIL PROTECTED]
Add a new gpiolib mechanism: gpio_chip instances can provide mappings
between their (input) GPIOs and any associated IRQs. This makes it easier
for platforms to support IRQs that are provided by board-specific external
chips instead of as part of their core (such as SOC-integrated GPIOs).
Also update the irq_to_gpio() description, saying to avoid it because it's
not always supported.
Signed-off-by: David Brownell [EMAIL PROTECTED]
Signed-off-by: Andrew Morton [EMAIL PROTECTED]
---
This is in MM, queued for 2.6.28 ... following are patches teaching
OMAP and TWL4030 GPIOs (respectively) to use it.
Documentation/gpio.txt |5 +++--
drivers/gpio/gpiolib.c | 18 ++
include/asm-generic/gpio.h |7 +++
3 files changed, 28 insertions(+), 2 deletions(-)
diff -puN Documentation/gpio.txt~gpiolib-gpio_to_irq-hooks
Documentation/gpio.txt
--- a/Documentation/gpio.txt~gpiolib-gpio_to_irq-hooks
+++ a/Documentation/gpio.txt
@@ -264,7 +264,7 @@ map between them using calls like:
/* map GPIO numbers to IRQ numbers */
int gpio_to_irq(unsigned gpio);
- /* map IRQ numbers to GPIO numbers */
+ /* map IRQ numbers to GPIO numbers (avoid using this) */
int irq_to_gpio(unsigned irq);
Those return either the corresponding number in the other namespace, or
@@ -284,7 +284,8 @@ system wakeup capabilities.
Non-error values returned from irq_to_gpio() would most commonly be used
with gpio_get_value(), for example to initialize or update driver state
-when the IRQ is edge-triggered.
+when the IRQ is edge-triggered. Note that some platforms don't support
+this reverse mapping, so you should avoid using it.
Emulating Open Drain Signals
diff -puN drivers/gpio/gpiolib.c~gpiolib-gpio_to_irq-hooks
drivers/gpio/gpiolib.c
--- a/drivers/gpio/gpiolib.c~gpiolib-gpio_to_irq-hooks
+++ a/drivers/gpio/gpiolib.c
@@ -1010,6 +1010,24 @@ int __gpio_cansleep(unsigned gpio)
}
EXPORT_SYMBOL_GPL(__gpio_cansleep);
+/**
+ * __gpio_to_irq() - return the IRQ corresponding to a GPIO
+ * @gpio: gpio whose IRQ will be returned (already requested)
+ * Context: any
+ *
+ * This is used directly or indirectly to implement gpio_to_irq().
+ * It returns the number of the IRQ signaled by this (input) GPIO,
+ * or a negative errno.
+ */
+int __gpio_to_irq(unsigned gpio)
+{
+ struct gpio_chip*chip;
+
+ chip = gpio_to_chip(gpio);
+ return chip-to_irq ? chip-to_irq(chip, gpio - chip-base) : -ENXIO;
+}
+EXPORT_SYMBOL_GPL(__gpio_to_irq);
+
/* There's no value in making it easy to inline GPIO calls that may sleep.
diff -puN include/asm-generic/gpio.h~gpiolib-gpio_to_irq-hooks
include/asm-generic/gpio.h
--- a/include/asm-generic/gpio.h~gpiolib-gpio_to_irq-hooks
+++ a/include/asm-generic/gpio.h
@@ -40,6 +40,8 @@ struct module;
* returns either the value actually sensed, or zero
* @direction_output: configures signal offset as output, or returns error
* @set: assigns output value for signal offset
+ * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
+ * implementation may not sleep
* @dbg_show: optional routine to show contents in debugfs; default code
* will be used when this is omitted, but custom code can show extra
* state (such as pullup/pulldown configuration).
@@ -73,6 +75,10 @@ struct gpio_chip {
unsigned offset, int value);
void(*set)(struct gpio_chip *chip,
unsigned offset, int value);
+
+ int (*to_irq)(struct gpio_chip *chip,
+ unsigned offset);
+
void(*dbg_show)(struct seq_file *s,
struct gpio_chip *chip);
int base;
@@ -112,6 +118,7 @@ extern void __gpio_set_value(unsigned gp
extern int __gpio_cansleep(unsigned gpio);
+extern int __gpio_to_irq(unsigned gpio);
#ifdef CONFIG_GPIO_SYSFS
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[patch 2.6.27-rc7-omap-git+ 2/3] omap uses new gpio_to_irq() hooks
Make OMAP use the new __gpio_to_irq() hook, to make it easier to
support IRQs coming in from off-chip gpio controllers, like the
TWL4030/TPS65930 chip used on OMAP3 boads like Beagleboard.org and
the Gumstix Overo.
Signed-off-by: David Brownell [EMAIL PROTECTED]
---
arch/arm/plat-omap/gpio.c |9 +
arch/arm/plat-omap/include/mach/gpio.h | 16
2 files changed, 21 insertions(+), 4 deletions(-)
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1296,6 +1296,14 @@ static void gpio_set(struct gpio_chip *c
spin_unlock_irqrestore(bank-lock, flags);
}
+static int gpio_2irq(struct gpio_chip *chip, unsigned offset)
+{
+ struct gpio_bank *bank;
+
+ bank = container_of(chip, struct gpio_bank, chip);
+ return bank-virtual_irq_start + offset;
+}
+
/*-*/
static int initialized;
@@ -1495,6 +1503,7 @@ static int __init _omap_gpio_init(void)
bank-chip.get = gpio_get;
bank-chip.direction_output = gpio_output;
bank-chip.set = gpio_set;
+ bank-chip.to_irq = gpio_2irq;
if (bank_is_mpuio(bank)) {
bank-chip.label = mpuio;
#ifdef CONFIG_ARCH_OMAP16XX
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -109,16 +109,24 @@ static inline int gpio_cansleep(unsigned
static inline int gpio_to_irq(unsigned gpio)
{
- if (gpio (OMAP_MAX_GPIO_LINES + 16))
- return OMAP_GPIO_IRQ(gpio);
- return -EINVAL;
+ return __gpio_to_irq(gpio);
}
static inline int irq_to_gpio(unsigned irq)
{
+ int tmp;
+
+ /* omap1 SOC mpuio */
if (cpu_class_is_omap1() (irq (IH_MPUIO_BASE + 16)))
return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
- return irq - IH_GPIO_BASE;
+
+ /* SOC gpio */
+ tmp = irq - IH_GPIO_BASE;
+ if (tmp OMAP_MAX_GPIO_LINES)
+ return tmp;
+
+ /* we don't supply reverse mappings for non-SOC gpios */
+ return -EIO;
}
#endif
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[patch 2.6.27-rc7-omap-git+ 3/3] twl4030 uses new gpio_to_irq() hooks
From: David Brownell [EMAIL PROTECTED]
Make twl4030 GPIO support the new gpio_to_irq() hook
Signed-off-by: David Brownell [EMAIL PROTECTED]
---
drivers/gpio/twl4030-gpio.c |7 +++
1 file changed, 7 insertions(+)
--- a/drivers/gpio/twl4030-gpio.c
+++ b/drivers/gpio/twl4030-gpio.c
@@ -630,6 +630,12 @@ static void twl_set(struct gpio_chip *ch
twl4030_set_gpio_dataout(offset, value);
}
+static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ /* NOTE: assumes IRQs are set up ... */
+ return twl4030_gpio_irq_base + offset;
+}
+
static struct gpio_chip twl_gpiochip = {
.label = twl4030,
.owner = THIS_MODULE,
@@ -639,6 +645,7 @@ static struct gpio_chip twl_gpiochip = {
.get= twl_get,
.direction_output = twl_direction_out,
.set= twl_set,
+ .to_irq = twl_to_irq,
.can_sleep = 1,
};
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RE: [patch twl] twl4030-core -- more cleanups
/* - * twl4030_irq_thread() runs as a kernel thread. It queries the twl4030 - * interrupt controller to see which modules are generating interrupt requests - * and then calls the desc-handle method for each module requesting service. + * This thread processes interrupts reported by the Primary Interrupt Handler. */ Why do we need to remove that piece of comment? Can we not keep the comment this way? /* - * twl4030_irq_thread() runs as a kernel thread. It queries the twl4030 - * interrupt controller to see which modules are generating interrupt requests + * This thread processes interrupts reported by the Primary Interrupt Handler, * and then calls the desc-handle method for each module requesting service. */ -- Jagadeesh -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
