Re: [PATCH 4/8] omap_hsmmc: set DVFS/PM constraints
Paul Walmsley wrote:
Hello Adrian,
Thanks for your comments. I will be dropping this patch for now.
There are a couple more comments below.
On Thu, 14 Jan 2010, Adrian Hunter wrote:
Paul Walmsley wrote:
(added Denis and Kevin)
Hello Denis, Adrian,
On Wed, 13 Jan 2010, Adrian Hunter wrote:
From afab8b432b37ae1f42b281e58989c8d607ed7183 Mon Sep 17 00:00:00 2001
From: Denis Karpov ext-denis.2.kar...@nokia.com
Date: Wed, 8 Jul 2009 16:15:08 +0200
Subject: [PATCH] omap_hsmmc: set DVFS/PM constraints
Set constraint for MPU minimal frequency to maintain good
I/O performance.
The constraint is set in MMC host 'ENABLED' state and dropped
when MMC host enters 'DISABLED' state which currently happens
upon 100ms of inactivity.
Signed-off-by: Denis Karpov ext-denis.2.kar...@nokia.com
Signed-off-by: Adrian Hunter adrian.hun...@nokia.com
---
arch/arm/mach-omap2/board-rx51-peripherals.c | 18 ++
arch/arm/mach-omap2/hsmmc.c |2 ++
arch/arm/mach-omap2/hsmmc.h |2 ++
arch/arm/plat-omap/include/plat/mmc.h|3 +++
drivers/mmc/host/omap_hsmmc.c| 17 +
5 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c
b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ab07ca2..b6318b1 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -209,6 +209,22 @@ static struct twl4030_madc_platform_data
rx51_madc_data = {
.irq_line = 1,
};
+#if defined(CONFIG_BRIDGE_DVFS)
+/*
+ * This handler can be used for setting other DVFS/PM constraints:
+ * intr latency, wakeup latency, DMA start latency, bus throughput
+ * according to API in mach/omap-pm.h. Currently we only set constraints
+ * for MPU frequency.
+ */
+#define MMC_MIN_MPU_FREQUENCY 5 /* S500M at OPP3 */
+static void rx51_mmc_set_pm_constraints(struct device *dev, int on)
+{
+ omap_pm_set_min_mpu_freq(dev, (on ? MMC_MIN_MPU_FREQUENCY : 0));
+}
NAK. The MMC driver (or any other driver, for that matter) must not set MPU
frequency constraints merely to boost performance. Drivers have no way of
knowing what the power vs. performance policy is for a given device or use
case.
The driver doesn't but RX-51 does, which is why the code is in the RX-51
board file.
I don't think that changes the situation. The RX-51 board file represents
the hardware integration on the device, not MPU power policy. That's the
CPUFreq governor's responsibility. It shouldn't be necessary to hack a
board file to change the CPU power management policy. Maybe that is
acceptable on a device that has been locked down by the manufacturer to
only boot kernels signed by them, but that's not the case for RX-51.
I agree it is not the ideal way to do it. I will drop this patch while
we try to find a better solution.
Denis didn't go into detail on the performance problem that you and he
observed. Further info would be welcome. Hypothesizing, if the problem
is that MMC does a lot of MPU work before the CPUFreq timer fires to
re-evaluate performance, then maybe some CPUFreq function call needs to
exist to ask the CPUFreq governor to elevate MPU speed in advance. But
it's hard to say without knowing more about the problem you observed.
We were not able to identify a single source of the reduced performance.
We suspect it is a combination of factors, all of which are addressed
by operating at a faster operating point.
We know exactly the use cases and the effect on performance.
Certainly for Maemo 5 Harmattan as shipped that is true. It's not
necessarily true if someone wants to boot another distribution like Debian
and use (for example) a userspace CPUFreq governor on the device.
I think we know the 3 people in the world that might try that and they
can make their own kernel ;-)
Seriously though, I would argue that end users would prefer good MMC
performance.
If the system is not upscaling MPU frequency quickly enough, then the power
management policy code -- CPUFreq, in the MPU case -- or the parameters for
that code -- need to be adjusted. (Of course, integrators can always dump
hacks like this in their own trees if they get lazy, but these should be
kept far, far away from mainline.)
It is unreasonable to override the policy decisions of the board maker
as defined in their board files.
Could you explain why? MPU power management policy for an on-chip device
such as MMC, which is located internally in the OMAP SoC, is board
hardware-invariant, and so doesn't belong in the board file. I agree that
this is dependent on the software distribution. So we either need to
understand the problem and come up with a clean way to resolve it, or keep
hacks like this distribution-specific.
I assumed that other boards could have completely different use-cases and
completely different operating points. Since it
[PATCH 04/18] OMAP2 clock: move all static functions to the top of the file
Move static functions to the top of the file and ensure that their names
are prefixed with an underscore to conform with the practice in the newer
OMAP clock code files.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.c | 88 ++-
1 files changed, 46 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d3ebb74..0d54fde 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -42,6 +42,51 @@ u8 cpu_mask;
* OMAP2/3/4 specific clock functions
*-*/
+/* Private functions */
+
+/**
+ * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
+ * @clk: struct clk * belonging to the module
+ *
+ * If the necessary clocks for the OMAP hardware IP block that
+ * corresponds to clock @clk are enabled, then wait for the module to
+ * indicate readiness (i.e., to leave IDLE). This code does not
+ * belong in the clock code and will be moved in the medium term to
+ * module-dependent code. No return value.
+ */
+static void _omap2_module_wait_ready(struct clk *clk)
+{
+ void __iomem *companion_reg, *idlest_reg;
+ u8 other_bit, idlest_bit;
+
+ /* Not all modules have multiple clocks that their IDLEST depends on */
+ if (clk-ops-find_companion) {
+ clk-ops-find_companion(clk, companion_reg, other_bit);
+ if (!(__raw_readl(companion_reg) (1 other_bit)))
+ return;
+ }
+
+ clk-ops-find_idlest(clk, idlest_reg, idlest_bit);
+
+ omap2_cm_wait_idlest(idlest_reg, (1 idlest_bit), clk-name);
+}
+
+/* Enables clock without considering parent dependencies or use count
+ * REVISIT: Maybe change this to use clk-enable like on omap1?
+ */
+static int _omap2_clk_enable(struct clk *clk)
+{
+ return clk-ops-enable(clk);
+}
+
+/* Disables clock without considering parent dependencies or use count */
+static void _omap2_clk_disable(struct clk *clk)
+{
+ clk-ops-disable(clk);
+}
+
+/* Public functions */
+
/**
* omap2xxx_clk_commit - commit clock parent/rate changes in hardware
* @clk: struct clk *
@@ -149,33 +194,6 @@ void omap2_clk_dflt_find_idlest(struct clk *clk, void
__iomem **idlest_reg,
*idlest_bit = clk-enable_bit;
}
-/**
- * omap2_module_wait_ready - wait for an OMAP module to leave IDLE
- * @clk: struct clk * belonging to the module
- *
- * If the necessary clocks for the OMAP hardware IP block that
- * corresponds to clock @clk are enabled, then wait for the module to
- * indicate readiness (i.e., to leave IDLE). This code does not
- * belong in the clock code and will be moved in the medium term to
- * module-dependent code. No return value.
- */
-static void omap2_module_wait_ready(struct clk *clk)
-{
- void __iomem *companion_reg, *idlest_reg;
- u8 other_bit, idlest_bit;
-
- /* Not all modules have multiple clocks that their IDLEST depends on */
- if (clk-ops-find_companion) {
- clk-ops-find_companion(clk, companion_reg, other_bit);
- if (!(__raw_readl(companion_reg) (1 other_bit)))
- return;
- }
-
- clk-ops-find_idlest(clk, idlest_reg, idlest_bit);
-
- omap2_cm_wait_idlest(idlest_reg, (1 idlest_bit), clk-name);
-}
-
int omap2_dflt_clk_enable(struct clk *clk)
{
u32 v;
@@ -195,7 +213,7 @@ int omap2_dflt_clk_enable(struct clk *clk)
v = __raw_readl(clk-enable_reg); /* OCP barrier */
if (clk-ops-find_idlest)
- omap2_module_wait_ready(clk);
+ _omap2_module_wait_ready(clk);
return 0;
}
@@ -235,20 +253,6 @@ const struct clkops clkops_omap2_dflt = {
.disable= omap2_dflt_clk_disable,
};
-/* Enables clock without considering parent dependencies or use count
- * REVISIT: Maybe change this to use clk-enable like on omap1?
- */
-static int _omap2_clk_enable(struct clk *clk)
-{
- return clk-ops-enable(clk);
-}
-
-/* Disables clock without considering parent dependencies or use count */
-static void _omap2_clk_disable(struct clk *clk)
-{
- clk-ops-disable(clk);
-}
-
void omap2_clk_disable(struct clk *clk)
{
if (clk-usecount 0 !(--clk-usecount)) {
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[PATCH 00/18] OMAP2/3/4 clock: split out code for clock types and clean up
Hi,
This patch series splits clock2xxx.c and clock34xx.c by
clock type, e.g., DPLLs, APLLs, clksel clocks, etc. The point
is to make the code easier to read and easier to debug (by
restricting the scope of DEBUG defines). This also lays the
groundwork for further generalization of the clock code.
The series also cleans up a few other minor aspects of the clock
code: the various struct omap2_clk_functions are combined; a
warning identified by sparse is resolved; unnecessary includes
have been trimmed; and some formerly-common code is now only
compiled for the chips that need it.
There are a few minor functional changes, documented in some of
the patch descriptions, but nothing significant.
Compile-tested with n8x0_defconfig, omap_2430sdp_defconfig, and
omap3_beagle_defconfig. Boot-tested on Beagle and N800.
Applies on the for_2.6.34 branch of git://git.pwsan.com/linux-2.6
- Paul
---
size:
textdata bss dec hex filename
2329525 126400 64056 2519981 2673ad vmlinux.n8x0.orig
2329585 126400 64056 2520041 2673e9 vmlinux.n8x0.patched
3418395 179456 146848 3744699 3923bb vmlinux.2430sdp.orig
3418547 179456 146848 3744851 392453 vmlinux.2430sdp.patched
3624493 199200 102984 3926677 3bea95 vmlinux.beagle.orig
3624373 199200 102984 3926557 3bea1d vmlinux.beagle
Paul Walmsley (18):
OMAP3 clock: move OMAP3-specific DPLL functions to dpll3xxx.c
OMAP2/3/4 clock: move DPLL clock functions into clkt_dpll.c
OMAP2/3/4 clock: move clksel clock functions into clkt_clksel.c
OMAP2 clock: move all static functions to the top of the file
OMAP2/3/4 clock: combine all omap2_clk_functions
OMAP2xxx clock: move the DPLL+CORE composite clock code into
clkt2xxx_dpllcore.c
OMAP2xxx clock: move the DVFS virtual clock code into
clkt2xxx_virt_prcm_set.c
OMAP2xxx clock: move the APLL clock code into clkt2xxx_apll.c
OMAP2xxx clock: move osc_clk code into clkt2xxx_osc.c
OMAP2xxx clock: move sys_clk code into clkt2xxx_sys.c
OMAP2 clock: don't compile OMAP2430-only functions on non-2430 builds
OMAP3 clock: split out DPLL3 M2 divider functions into clkt3xxx_dpll3m2.c
OMAP2/3 clock: clean up omap*_clk_arch_init()
OMAP2/3 clock: remove unnecessary includes and clean up header
OMAP2/3/4 clock: omap2_clk_prepare_for_reboot() is OMAP2xxx-only
OMAP3 DPLL: reorganize static functions
OMAP clock: resolve all remaining sparse warnings
OMAP2/3/4 clock: rename and clean the omap2_clk_init() functions
arch/arm/mach-omap2/Makefile | 18 -
arch/arm/mach-omap2/clkt2xxx_apll.c | 120
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 172 +
arch/arm/mach-omap2/clkt2xxx_osc.c | 62 ++
arch/arm/mach-omap2/clkt2xxx_sys.c | 50 ++
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 245
arch/arm/mach-omap2/clkt3xxx_dpll3m2.c | 120
arch/arm/mach-omap2/clkt_clksel.c| 413 +
arch/arm/mach-omap2/clkt_dpll.c | 386
arch/arm/mach-omap2/clock.c | 825 ++
arch/arm/mach-omap2/clock.h | 11
arch/arm/mach-omap2/clock2xxx.c | 548 +
arch/arm/mach-omap2/clock2xxx.h |7
arch/arm/mach-omap2/clock2xxx_data.c |6
arch/arm/mach-omap2/clock34xx.c | 154 -
arch/arm/mach-omap2/clock34xx.h |1
arch/arm/mach-omap2/clock34xx_data.c | 19 -
arch/arm/mach-omap2/clock44xx.c | 14
arch/arm/mach-omap2/clock44xx.h |2
arch/arm/mach-omap2/clock44xx_data.c |4
arch/arm/mach-omap2/dpll3xxx.c | 113 ++--
arch/arm/mach-omap2/io.c | 15
arch/arm/mach-omap2/prcm.c |8
arch/arm/plat-omap/clock.c |2
arch/arm/plat-omap/include/plat/clock.h |2
25 files changed, 1774 insertions(+), 1543 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_apll.c
create mode 100644 arch/arm/mach-omap2/clkt2xxx_dpllcore.c
create mode 100644 arch/arm/mach-omap2/clkt2xxx_osc.c
create mode 100644 arch/arm/mach-omap2/clkt2xxx_sys.c
create mode 100644 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
create mode 100644 arch/arm/mach-omap2/clkt3xxx_dpll3m2.c
create mode 100644 arch/arm/mach-omap2/clkt_clksel.c
create mode 100644 arch/arm/mach-omap2/clkt_dpll.c
rename arch/arm/mach-omap2/{dpll.c = dpll3xxx.c} (98%)
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[PATCH 01/18] OMAP3 clock: move OMAP3-specific DPLL functions to dpll3xxx.c
Mark the OMAP3-specific DPLL functions as being OMAP3-specific by moving
them from mach-omap2/dpll.c to mach-omap2/dpll3xxx.c.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/dpll3xxx.c |0
2 files changed, 1 insertions(+), 1 deletions(-)
rename arch/arm/mach-omap2/{dpll.c = dpll3xxx.c} (100%)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 64de2fd..7d46fde 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -6,7 +6,7 @@
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
omap-2-3-common= irq.o sdrc.o omap_hwmod.o
-omap-3-4-common= dpll.o
+omap-3-4-common= dpll3xxx.o
prcm-common= prcm.o powerdomain.o
clock-common = clock.o clock_common_data.o
clockdomain.o
diff --git a/arch/arm/mach-omap2/dpll.c b/arch/arm/mach-omap2/dpll3xxx.c
similarity index 100%
rename from arch/arm/mach-omap2/dpll.c
rename to arch/arm/mach-omap2/dpll3xxx.c
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[PATCH 18/18] OMAP2/3/4 clock: rename and clean the omap2_clk_init() functions
Rename the omap2_clk_init() in the OMAP2, 3, and 4 clock code to be
omap2xxx_clk_init(), omap3xxx_clk_init(), etc. Remove all traces of
the (commented) old virt_prcm_set code from omap3xxx_clk_init() and
omap4xxx_clk_init(), since this will be handled with the OPP code that
is cooking in the PM branch.
After this patch, there should be very little else in the clock code
that blocks a multi-OMAP 2+3 kernel. (OMAP2420+OMAP2430 still has some
outstanding issues that need to be resolved; this is pending on some
additions to the hwmod data.)
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock2xxx.h |1 +
arch/arm/mach-omap2/clock2xxx_data.c |2 +-
arch/arm/mach-omap2/clock34xx.c |2 +-
arch/arm/mach-omap2/clock34xx.h |1 +
arch/arm/mach-omap2/clock34xx_data.c | 19 +--
arch/arm/mach-omap2/clock44xx.h |2 ++
arch/arm/mach-omap2/clock44xx_data.c |4 +---
arch/arm/mach-omap2/io.c | 15 +--
9 files changed, 21 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index be5a55f..7bc344b 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -47,7 +47,6 @@
#define DPLL_LOW_POWER_BYPASS 0x5
#define DPLL_LOCKED0x7
-int omap2_clk_init(void);
int omap2_clk_enable(struct clk *clk);
void omap2_clk_disable(struct clk *clk);
long omap2_clk_round_rate(struct clk *clk, unsigned long rate);
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index bed294a..32f3d0a 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -19,6 +19,7 @@ unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
u32 omap2xxx_get_apll_clkin(void);
u32 omap2xxx_get_sysclkdiv(void);
void omap2xxx_clk_prepare_for_reboot(void);
+int omap2xxx_clk_init(void);
/* REVISIT: These should be set dynamically for CONFIG_MULTI_OMAP2 */
#ifdef CONFIG_ARCH_OMAP2420
diff --git a/arch/arm/mach-omap2/clock2xxx_data.c
b/arch/arm/mach-omap2/clock2xxx_data.c
index 3a435bb..52c7a6c 100644
--- a/arch/arm/mach-omap2/clock2xxx_data.c
+++ b/arch/arm/mach-omap2/clock2xxx_data.c
@@ -2238,7 +2238,7 @@ static struct omap_clk omap24xx_clks[] = {
* init code
*/
-int __init omap2_clk_init(void)
+int __init omap2xxx_clk_init(void)
{
const struct prcm_config *prcm;
struct omap_clk *c;
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 34d3950..1f1b5a6 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -150,7 +150,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long
rate)
return omap3_noncore_dpll_set_rate(clk, rate);
}
-void omap3_clk_lock_dpll5(void)
+void __init omap3_clk_lock_dpll5(void)
{
struct clk *dpll5_clk;
struct clk *dpll5_m2_clk;
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 9a2c07e..73f2109 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -8,6 +8,7 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
#define __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
+int omap3xxx_clk_init(void);
int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
void omap3_clk_lock_dpll5(void);
diff --git a/arch/arm/mach-omap2/clock34xx_data.c
b/arch/arm/mach-omap2/clock34xx_data.c
index 9e7f68a..0d04f92 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -3212,11 +3212,9 @@ static struct omap_clk omap3xxx_clks[] = {
};
-int __init omap2_clk_init(void)
+int __init omap3xxx_clk_init(void)
{
- /* struct prcm_config *prcm; */
struct omap_clk *c;
- /* u32 clkrate; */
u32 cpu_clkflg = CK_3XXX;
if (cpu_is_omap3517()) {
@@ -3254,21 +3252,6 @@ int __init omap2_clk_init(void)
omap2_init_clk_clkdm(c-lk.clk);
}
- /* REVISIT: Not yet ready for OMAP3 */
-#if 0
- /* Check the MPU rate set by bootloader */
- clkrate = omap2_get_dpll_rate_24xx(dpll_ck);
- for (prcm = rate_table; prcm-mpu_speed; prcm++) {
- if (!(prcm-flags cpu_mask))
- continue;
- if (prcm-xtal_speed != sys_ck.rate)
- continue;
- if (prcm-dpll_speed = clkrate)
- break;
- }
- curr_prcm_set = prcm;
-#endif
-
recalculate_root_clocks();
printk(KERN_INFO Clocking rate (Crystal/Core/MPU):
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h
index 59b9ced..1f55b6b 100644
--- a/arch/arm/mach-omap2/clock44xx.h
+++ b/arch/arm/mach-omap2/clock44xx.h
@@ -10,6 +10,8 @@
#define OMAP4430_MAX_DPLL_MULT 2048
#define OMAP4430_MAX_DPLL_DIV 128
+int
[PATCH 02/18] OMAP2/3/4 clock: move DPLL clock functions into clkt_dpll.c
Move all DPLL-related clock functions from mach-omap2/clock.c to
clkt_dpll.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/Makefile|3
arch/arm/mach-omap2/clkt_dpll.c | 386 +++
arch/arm/mach-omap2/clock.c | 355
3 files changed, 388 insertions(+), 356 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt_dpll.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7d46fde..1a135c8 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -8,7 +8,8 @@ obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o
timer-gp.o
omap-2-3-common= irq.o sdrc.o omap_hwmod.o
omap-3-4-common= dpll3xxx.o
prcm-common= prcm.o powerdomain.o
-clock-common = clock.o clock_common_data.o
clockdomain.o
+clock-common = clock.o clock_common_data.o \
+ clockdomain.o clkt_dpll.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
new file mode 100644
index 000..c332e59
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -0,0 +1,386 @@
+/*
+ * clkt_dpll.c - OMAP2/3/4 DPLL clock functions
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include asm/div64.h
+
+#include plat/clock.h
+
+#include clock.h
+#include cm.h
+#include cm-regbits-24xx.h
+#include cm-regbits-34xx.h
+
+/* DPLL rate rounding: minimum DPLL multiplier, divider values */
+#define DPLL_MIN_MULTIPLIER1
+#define DPLL_MIN_DIVIDER 1
+
+/* Possible error results from _dpll_test_mult */
+#define DPLL_MULT_UNDERFLOW-1
+
+/*
+ * Scale factor to mitigate roundoff errors in DPLL rate rounding.
+ * The higher the scale factor, the greater the risk of arithmetic overflow,
+ * but the closer the rounded rate to the target rate. DPLL_SCALE_FACTOR
+ * must be a power of DPLL_SCALE_BASE.
+ */
+#define DPLL_SCALE_FACTOR 64
+#define DPLL_SCALE_BASE2
+#define DPLL_ROUNDING_VAL ((DPLL_SCALE_BASE / 2) * \
+(DPLL_SCALE_FACTOR / DPLL_SCALE_BASE))
+
+/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */
+#define DPLL_FINT_BAND1_MIN75
+#define DPLL_FINT_BAND1_MAX210
+#define DPLL_FINT_BAND2_MIN750
+#define DPLL_FINT_BAND2_MAX2100
+
+/* _dpll_test_fint() return codes */
+#define DPLL_FINT_UNDERFLOW-1
+#define DPLL_FINT_INVALID -2
+
+/* Private functions */
+
+/*
+ * _dpll_test_fint - test whether an Fint value is valid for the DPLL
+ * @clk: DPLL struct clk to test
+ * @n: divider value (N) to test
+ *
+ * Tests whether a particular divider @n will result in a valid DPLL
+ * internal clock frequency Fint. See the 34xx TRM 4.7.6.2 DPLL Jitter
+ * Correction. Returns 0 if OK, -1 if the enclosing loop can terminate
+ * (assuming that it is counting N upwards), or -2 if the enclosing loop
+ * should skip to the next iteration (again assuming N is increasing).
+ */
+static int _dpll_test_fint(struct clk *clk, u8 n)
+{
+ struct dpll_data *dd;
+ long fint;
+ int ret = 0;
+
+ dd = clk-dpll_data;
+
+ /* DPLL divider must result in a valid jitter correction val */
+ fint = clk-parent-rate / (n + 1);
+ if (fint DPLL_FINT_BAND1_MIN) {
+
+ pr_debug(rejecting n=%d due to Fint failure,
+lowering max_divider\n, n);
+ dd-max_divider = n;
+ ret = DPLL_FINT_UNDERFLOW;
+
+ } else if (fint DPLL_FINT_BAND1_MAX
+ fint DPLL_FINT_BAND2_MIN) {
+
+ pr_debug(rejecting n=%d due to Fint failure\n, n);
+ ret = DPLL_FINT_INVALID;
+
+ } else if (fint DPLL_FINT_BAND2_MAX) {
+
+ pr_debug(rejecting n=%d due to Fint failure,
+boosting min_divider\n, n);
+ dd-min_divider = n;
+ ret = DPLL_FINT_INVALID;
+
+ }
+
+ return ret;
+}
+
+static unsigned long _dpll_compute_new_rate(unsigned long parent_rate,
+
[PATCH 14/18] OMAP2/3 clock: remove unnecessary includes and clean up header
Now that almost all of the code has been removed from clock2xxx.c and clock34xx.c, many of the includes are now unnecessary and can be removed. While we're here, standardize the initial comment blocks. Signed-off-by: Paul Walmsley p...@pwsan.com Cc: Richard Woodruff r-woodru...@ti.com Cc: Jouni Högander jouni.hogan...@nokia.com --- arch/arm/mach-omap2/clock2xxx.c | 35 ++- arch/arm/mach-omap2/clock34xx.c | 16 +++- 2 files changed, 13 insertions(+), 38 deletions(-) diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c index b7e81ec..e98f48b 100644 --- a/arch/arm/mach-omap2/clock2xxx.c +++ b/arch/arm/mach-omap2/clock2xxx.c @@ -1,15 +1,15 @@ /* - * linux/arch/arm/mach-omap2/clock.c + * clock2xxx.c - OMAP2xxx-specific clock integration code * - * Copyright (C) 2005-2008 Texas Instruments, Inc. - * Copyright (C) 2004-2008 Nokia Corporation + * Copyright (C) 2005-2008 Texas Instruments, Inc. + * Copyright (C) 2004-2010 Nokia Corporation * - * Contacts: - * Richard Woodruff r-woodru...@ti.com - * Paul Walmsley + * Contacts: + * Richard Woodruff r-woodru...@ti.com + * Paul Walmsley * - * Based on earlier work by Tuukka Tikkanen, Tony Lindgren, - * Gordon McNutt and RidgeRun, Inc. + * Based on earlier work by Tuukka Tikkanen, Tony Lindgren, + * Gordon McNutt and RidgeRun, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -17,38 +17,23 @@ */ #undef DEBUG -#include linux/module.h #include linux/kernel.h -#include linux/device.h -#include linux/list.h #include linux/errno.h -#include linux/delay.h #include linux/clk.h #include linux/io.h -#include linux/cpufreq.h -#include linux/bitops.h #include plat/clock.h -#include plat/sram.h -#include plat/prcm.h -#include plat/clkdev_omap.h -#include asm/div64.h -#include asm/clkdev.h -#include plat/sdrc.h #include clock.h #include clock2xxx.h -#include opp2xxx.h -#include prm.h -#include prm-regbits-24xx.h #include cm.h #include cm-regbits-24xx.h struct clk *vclk, *sclk, *dclk; -/*- +/* * Omap24xx specific clock functions - *-*/ + */ #ifdef CONFIG_ARCH_OMAP2430 diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index d38ad44..8a7db7a 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -2,10 +2,10 @@ * OMAP3-specific clock framework functions * * Copyright (C) 2007-2008 Texas Instruments, Inc. - * Copyright (C) 2007-2009 Nokia Corporation + * Copyright (C) 2007-2010 Nokia Corporation * - * Written by Paul Walmsley - * Testing and integration fixes by Jouni Högander + * Paul Walmsley + * Jouni Högander * * Parts of this code are based on code written by * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu @@ -16,27 +16,17 @@ */ #undef DEBUG -#include linux/module.h #include linux/kernel.h -#include linux/device.h -#include linux/list.h #include linux/errno.h #include linux/delay.h #include linux/clk.h #include linux/io.h -#include linux/limits.h -#include linux/bitops.h #include plat/cpu.h #include plat/clock.h -#include plat/sram.h -#include plat/sdrc.h -#include asm/div64.h -#include asm/clkdev.h #include clock.h #include clock34xx.h -#include sdrc.h #include prm.h #include prm-regbits-34xx.h #include cm.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 15/18] OMAP2/3/4 clock: omap2_clk_prepare_for_reboot() is OMAP2xxx-only
omap2_clk_prepare_for_reboot() is only applicable to OMAP2xxx chips,
so rename it to omap2xxx_clk_prepare_for_reboot() and only call it when
running on OMAP2xxx chips. Remove the old stub in the OMAP3 clock code.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock.h |1 -
arch/arm/mach-omap2/clock2xxx.c |2 +-
arch/arm/mach-omap2/clock2xxx.h |1 +
arch/arm/mach-omap2/clock34xx.c | 21 ++---
arch/arm/mach-omap2/clock44xx.c |5 -
arch/arm/mach-omap2/prcm.c |8 +---
6 files changed, 9 insertions(+), 29 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index dcd58cd..be5a55f 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -84,7 +84,6 @@ int omap2_clksel_set_parent(struct clk *clk, struct clk
*new_parent);
u32 omap2_get_dpll_rate(struct clk *clk);
void omap2_init_dpll_parent(struct clk *clk);
int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
-void omap2_clk_prepare_for_reboot(void);
int omap2_dflt_clk_enable(struct clk *clk);
void omap2_dflt_clk_disable(struct clk *clk);
void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg,
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e98f48b..a48b01a 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -71,7 +71,7 @@ const struct clkops clkops_omap2430_i2chs_wait = {
/*
* Set clocks for bypass mode for reboot to work.
*/
-void omap2_clk_prepare_for_reboot(void)
+void omap2xxx_clk_prepare_for_reboot(void)
{
u32 rate;
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index c14061b..bed294a 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -18,6 +18,7 @@ int omap2_reprogram_dpllcore(struct clk *clk, unsigned long
rate);
unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
u32 omap2xxx_get_apll_clkin(void);
u32 omap2xxx_get_sysclkdiv(void);
+void omap2xxx_clk_prepare_for_reboot(void);
/* REVISIT: These should be set dynamically for CONFIG_MULTI_OMAP2 */
#ifdef CONFIG_ARCH_OMAP2420
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 8a7db7a..34d3950 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -150,25 +150,6 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long
rate)
return omap3_noncore_dpll_set_rate(clk, rate);
}
-/* Common clock code */
-
-/*
- * Set clocks for bypass mode for reboot to work.
- */
-void omap2_clk_prepare_for_reboot(void)
-{
- /* REVISIT: Not ready for 343x */
-#if 0
- u32 rate;
-
- if (vclk == NULL || sclk == NULL)
- return;
-
- rate = clk_get_rate(sclk);
- clk_set_rate(vclk, rate);
-#endif
-}
-
void omap3_clk_lock_dpll5(void)
{
struct clk *dpll5_clk;
@@ -191,6 +172,8 @@ void omap3_clk_lock_dpll5(void)
return;
}
+/* Common clock code */
+
/* REVISIT: Move this init stuff out into clock.c */
/*
diff --git a/arch/arm/mach-omap2/clock44xx.c b/arch/arm/mach-omap2/clock44xx.c
index 08dd642..c238717 100644
--- a/arch/arm/mach-omap2/clock44xx.c
+++ b/arch/arm/mach-omap2/clock44xx.c
@@ -17,8 +17,3 @@ const struct clkops clkops_noncore_dpll_ops = {
.enable = omap3_noncore_dpll_enable,
.disable= omap3_noncore_dpll_disable,
};
-
-void omap2_clk_prepare_for_reboot(void)
-{
- return;
-}
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index 63330d2..814376a 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -29,6 +29,7 @@
#include plat/control.h
#include clock.h
+#include clock2xxx.h
#include cm.h
#include prm.h
#include prm-regbits-24xx.h
@@ -136,11 +137,12 @@ EXPORT_SYMBOL(omap_prcm_get_reset_sources);
void omap_prcm_arch_reset(char mode)
{
s16 prcm_offs;
- omap2_clk_prepare_for_reboot();
- if (cpu_is_omap24xx())
+ if (cpu_is_omap24xx()) {
+ omap2xxx_clk_prepare_for_reboot();
+
prcm_offs = WKUP_MOD;
- else if (cpu_is_omap34xx()) {
+ } else if (cpu_is_omap34xx()) {
u32 l;
prcm_offs = OMAP3430_GR_MOD;
--
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[PATCH 16/18] OMAP3 DPLL: reorganize static functions
Move all static functions up to the top of the file to match the
practice in other OMAP clock code. Make omap3_noncore_dpll_program()
static (noted by sparse) and prepend an underscore to the function
name to mark that it is file-local.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/dpll3xxx.c | 113 +---
1 files changed, 58 insertions(+), 55 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index f6055b4..2b559fc 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -44,17 +44,7 @@
#define MAX_DPLL_WAIT_TRIES100
-
-/**
- * omap3_dpll_recalc - recalculate DPLL rate
- * @clk: DPLL struct clk
- *
- * Recalculate and propagate the DPLL rate.
- */
-unsigned long omap3_dpll_recalc(struct clk *clk)
-{
- return omap2_get_dpll_rate(clk);
-}
+/* Private functions */
/* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits)
@@ -136,8 +126,6 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8
n)
return f;
}
-/* Non-CORE DPLL (e.g., DPLLs that do not control SDRC) clock functions */
-
/*
* _omap3_noncore_dpll_lock - instruct a DPLL to lock and wait for readiness
* @clk: pointer to a DPLL struct clk
@@ -237,6 +225,63 @@ static int _omap3_noncore_dpll_stop(struct clk *clk)
return 0;
}
+/*
+ * _omap3_noncore_dpll_program - set non-core DPLL M,N values directly
+ * @clk: struct clk * of DPLL to set
+ * @m: DPLL multiplier to set
+ * @n: DPLL divider to set
+ * @freqsel: FREQSEL value to set
+ *
+ * Program the DPLL with the supplied M, N values, and wait for the DPLL to
+ * lock.. Returns -EINVAL upon error, or 0 upon success.
+ */
+static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16
freqsel)
+{
+ struct dpll_data *dd = clk-dpll_data;
+ u32 v;
+
+ /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
+ _omap3_noncore_dpll_bypass(clk);
+
+ /* Set jitter correction */
+ if (!cpu_is_omap44xx()) {
+ v = __raw_readl(dd-control_reg);
+ v = ~dd-freqsel_mask;
+ v |= freqsel __ffs(dd-freqsel_mask);
+ __raw_writel(v, dd-control_reg);
+ }
+
+ /* Set DPLL multiplier, divider */
+ v = __raw_readl(dd-mult_div1_reg);
+ v = ~(dd-mult_mask | dd-div1_mask);
+ v |= m __ffs(dd-mult_mask);
+ v |= (n - 1) __ffs(dd-div1_mask);
+ __raw_writel(v, dd-mult_div1_reg);
+
+ /* We let the clock framework set the other output dividers later */
+
+ /* REVISIT: Set ramp-up delay? */
+
+ _omap3_noncore_dpll_lock(clk);
+
+ return 0;
+}
+
+/* Public functions */
+
+/**
+ * omap3_dpll_recalc - recalculate DPLL rate
+ * @clk: DPLL struct clk
+ *
+ * Recalculate and propagate the DPLL rate.
+ */
+unsigned long omap3_dpll_recalc(struct clk *clk)
+{
+ return omap2_get_dpll_rate(clk);
+}
+
+/* Non-CORE DPLL (e.g., DPLLs that do not control SDRC) clock functions */
+
/**
* omap3_noncore_dpll_enable - instruct a DPLL to enter bypass or lock mode
* @clk: pointer to a DPLL struct clk
@@ -292,48 +337,6 @@ void omap3_noncore_dpll_disable(struct clk *clk)
/* Non-CORE DPLL rate set code */
-/*
- * omap3_noncore_dpll_program - set non-core DPLL M,N values directly
- * @clk: struct clk * of DPLL to set
- * @m: DPLL multiplier to set
- * @n: DPLL divider to set
- * @freqsel: FREQSEL value to set
- *
- * Program the DPLL with the supplied M, N values, and wait for the DPLL to
- * lock.. Returns -EINVAL upon error, or 0 upon success.
- */
-int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
-{
- struct dpll_data *dd = clk-dpll_data;
- u32 v;
-
- /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */
- _omap3_noncore_dpll_bypass(clk);
-
- /* Set jitter correction */
- if (!cpu_is_omap44xx()) {
- v = __raw_readl(dd-control_reg);
- v = ~dd-freqsel_mask;
- v |= freqsel __ffs(dd-freqsel_mask);
- __raw_writel(v, dd-control_reg);
- }
-
- /* Set DPLL multiplier, divider */
- v = __raw_readl(dd-mult_div1_reg);
- v = ~(dd-mult_mask | dd-div1_mask);
- v |= m __ffs(dd-mult_mask);
- v |= (n - 1) __ffs(dd-div1_mask);
- __raw_writel(v, dd-mult_div1_reg);
-
- /* We let the clock framework set the other output dividers later */
-
- /* REVISIT: Set ramp-up delay? */
-
- _omap3_noncore_dpll_lock(clk);
-
- return 0;
-}
-
/**
* omap3_noncore_dpll_set_rate - set non-core DPLL rate
* @clk: struct clk * of DPLL to set
--
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[PATCH 17/18] OMAP clock: resolve all remaining sparse warnings
Resolve all remaining sparse warnings in the OMAP clock code.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/plat-omap/clock.c |2 +-
arch/arm/plat-omap/include/plat/clock.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index e0f72f4..0ae2753 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -173,7 +173,7 @@ EXPORT_SYMBOL(clk_get_parent);
* OMAP specific clock functions shared between omap1 and omap2
*-*/
-unsigned int __initdata mpurate;
+int __initdata mpurate;
/*
* By default we use the rate set by the bootloader.
diff --git a/arch/arm/plat-omap/include/plat/clock.h
b/arch/arm/plat-omap/include/plat/clock.h
index 896cedc..e413132 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -123,7 +123,7 @@ struct clk_functions {
#endif
};
-extern unsigned int mpurate;
+extern int mpurate;
extern int clk_init(struct clk_functions *custom_clocks);
extern void clk_preinit(struct clk *clk);
--
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[PATCH 13/18] OMAP2/3 clock: clean up omap*_clk_arch_init()
In the OMAP3xxx clock code, remove the #ifdef CONFIG_ARCH_OMAP3 in
clock34xx.c, since this file is only compiled for OMAP3xxx builds. Also,
rename omap2_clk_arch_init in this file to omap3xxx_clk_arch_init() to
pave the way for multi-OMAP kernels. Ensure that it is not executed
on non-OMAP3xxx systems.
In the OMAP2xxx clock code, rename omap2_clk_arch_init in this file to
omap2xxx_clk_arch_init() to pave the way for multi-OMAP kernels.
Ensure that it is not executed on non-OMAP2xxx systems.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock2xxx.c |7 +--
arch/arm/mach-omap2/clock34xx.c | 16 +---
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index e5b9851..b7e81ec 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -101,11 +101,14 @@ void omap2_clk_prepare_for_reboot(void)
* Switch the MPU rate if specified on cmdline.
* We cannot do this early until cmdline is parsed.
*/
-static int __init omap2_clk_arch_init(void)
+static int __init omap2xxx_clk_arch_init(void)
{
struct clk *virt_prcm_set, *sys_ck, *dpll_ck, *mpu_ck;
unsigned long sys_ck_rate;
+ if (!cpu_is_omap24xx())
+ return 0;
+
if (!mpurate)
return -EINVAL;
@@ -129,6 +132,6 @@ static int __init omap2_clk_arch_init(void)
return 0;
}
-arch_initcall(omap2_clk_arch_init);
+arch_initcall(omap2xxx_clk_arch_init);
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 552ad30..d38ad44 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -163,12 +163,6 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long
rate)
/* Common clock code */
/*
- * As it is structured now, this will prevent an OMAP2/3 multiboot
- * kernel from compiling. This will need further attention.
- */
-#if defined(CONFIG_ARCH_OMAP3)
-
-/*
* Set clocks for bypass mode for reboot to work.
*/
void omap2_clk_prepare_for_reboot(void)
@@ -213,11 +207,14 @@ void omap3_clk_lock_dpll5(void)
* Switch the MPU rate if specified on cmdline.
* We cannot do this early until cmdline is parsed.
*/
-static int __init omap2_clk_arch_init(void)
+static int __init omap3xxx_clk_arch_init(void)
{
struct clk *osc_sys_ck, *dpll1_ck, *arm_fck, *core_ck;
unsigned long osc_sys_rate;
+ if (!cpu_is_omap34xx())
+ return 0;
+
if (!mpurate)
return -EINVAL;
@@ -246,9 +243,6 @@ static int __init omap2_clk_arch_init(void)
return 0;
}
-arch_initcall(omap2_clk_arch_init);
-
-
-#endif
+arch_initcall(omap3xxx_clk_arch_init);
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 12/18] OMAP3 clock: split out DPLL3 M2 divider functions into clkt3xxx_dpll3m2.c
Split the DPLL3 M2 divider clock functions out of clock34xx.c and move them
into clkt3xxx_dpll3m2.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Jouni Högander jouni.hogan...@nokia.com
---
arch/arm/mach-omap2/Makefile |3 +
arch/arm/mach-omap2/clkt3xxx_dpll3m2.c | 120
arch/arm/mach-omap2/clock34xx.c| 90
3 files changed, 122 insertions(+), 91 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt3xxx_dpll3m2.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 7ce5fea..b002c81 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -15,11 +15,12 @@ clock-omap2xxx =
clkt2xxx_dpllcore.o \
clkt2xxx_virt_prcm_set.o \
clkt2xxx_apll.o clkt2xxx_osc.o \
clkt2xxx_sys.o
+clock-omap3xxx = clkt3xxx_dpll3m2.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(clock-omap2xxx)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
- $(omap-3-4-common)
+ $(omap-3-4-common) $(clock-omap3xxx)
obj-$(CONFIG_ARCH_OMAP4) += $(omap-3-4-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
diff --git a/arch/arm/mach-omap2/clkt3xxx_dpll3m2.c
b/arch/arm/mach-omap2/clkt3xxx_dpll3m2.c
new file mode 100644
index 000..14f1a4b
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt3xxx_dpll3m2.c
@@ -0,0 +1,120 @@
+/*
+ * OMAP3 M2 divider clock code
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2010 Nokia Corporation
+ *
+ * Paul Walmsley
+ * Jouni Högander
+ *
+ * Parts of this code are based on code written by
+ * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+#include plat/sram.h
+#include plat/sdrc.h
+
+#include clock.h
+#include clock34xx.h
+#include sdrc.h
+
+#define CYCLES_PER_MHZ 100
+
+/*
+ * CORE DPLL (DPLL3) M2 divider rate programming functions
+ *
+ * These call into SRAM code to do the actual CM writes, since the SDRAM
+ * is clocked from DPLL3.
+ */
+
+/**
+ * omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider
+ * @clk: struct clk * of DPLL to set
+ * @rate: rounded target rate
+ *
+ * Program the DPLL M2 divider with the rounded target rate. Returns
+ * -EINVAL upon error, or 0 upon success.
+ */
+int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
+{
+ u32 new_div = 0;
+ u32 unlock_dll = 0;
+ u32 c;
+ unsigned long validrate, sdrcrate, _mpurate;
+ struct omap_sdrc_params *sdrc_cs0;
+ struct omap_sdrc_params *sdrc_cs1;
+ int ret;
+
+ if (!clk || !rate)
+ return -EINVAL;
+
+ validrate = omap2_clksel_round_rate_div(clk, rate, new_div);
+ if (validrate != rate)
+ return -EINVAL;
+
+ sdrcrate = sdrc_ick_p-rate;
+ if (rate clk-rate)
+ sdrcrate = ((rate / clk-rate) 1);
+ else
+ sdrcrate = ((clk-rate / rate) 1);
+
+ ret = omap2_sdrc_get_params(sdrcrate, sdrc_cs0, sdrc_cs1);
+ if (ret)
+ return -EINVAL;
+
+ if (sdrcrate MIN_SDRC_DLL_LOCK_FREQ) {
+ pr_debug(clock: will unlock SDRC DLL\n);
+ unlock_dll = 1;
+ }
+
+ /*
+* XXX This only needs to be done when the CPU frequency changes
+*/
+ _mpurate = arm_fck_p-rate / CYCLES_PER_MHZ;
+ c = (_mpurate SDRC_MPURATE_SCALE) SDRC_MPURATE_BASE_SHIFT;
+ c += 1; /* for safety */
+ c *= SDRC_MPURATE_LOOPS;
+ c = SDRC_MPURATE_SCALE;
+ if (c == 0)
+ c = 1;
+
+ pr_debug(clock: changing CORE DPLL rate from %lu to %lu\n, clk-rate,
+validrate);
+ pr_debug(clock: SDRC CS0 timing params used:
+ RFR %08x CTRLA %08x CTRLB %08x MR %08x\n,
+sdrc_cs0-rfr_ctrl, sdrc_cs0-actim_ctrla,
+sdrc_cs0-actim_ctrlb, sdrc_cs0-mr);
+ if (sdrc_cs1)
+ pr_debug(clock: SDRC CS1 timing params used:
+ RFR %08x CTRLA %08x CTRLB %08x MR %08x\n,
+sdrc_cs1-rfr_ctrl, sdrc_cs1-actim_ctrla,
+sdrc_cs1-actim_ctrlb, sdrc_cs1-mr);
+
+ if (sdrc_cs1)
+ omap3_configure_core_dpll(
+ new_div, unlock_dll, c, rate clk-rate,
+
[PATCH 09/18] OMAP2xxx clock: move osc_clk code into clkt2xxx_osc.c
Move the osc_clk clock functions from clock2xxx.c to clkt2xxx_osc.c to
improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/Makefile |2 +
arch/arm/mach-omap2/clkt2xxx_osc.c | 62
arch/arm/mach-omap2/clock2xxx.c| 34 +---
arch/arm/mach-omap2/clock2xxx.h|1 +
4 files changed, 66 insertions(+), 33 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_osc.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 825c303..51178bf 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -13,7 +13,7 @@ clock-common = clock.o
clock_common_data.o \
clkt_clksel.o
clock-omap2xxx = clkt2xxx_dpllcore.o \
clkt2xxx_virt_prcm_set.o \
- clkt2xxx_apll.o
+ clkt2xxx_apll.o clkt2xxx_osc.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(clock-omap2xxx)
diff --git a/arch/arm/mach-omap2/clkt2xxx_osc.c
b/arch/arm/mach-omap2/clkt2xxx_osc.c
new file mode 100644
index 000..1b31e02
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt2xxx_osc.c
@@ -0,0 +1,62 @@
+/*
+ * clkt2xxx_osc.c - OMAP2xxx osc_clk-specific clock code
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ * Gordon McNutt and RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/module.h
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+
+#include clock.h
+#include clock2xxx.h
+#include prm.h
+#include prm-regbits-24xx.h
+
+static int omap2_enable_osc_ck(struct clk *clk)
+{
+ u32 pcc;
+
+ pcc = __raw_readl(prcm_clksrc_ctrl);
+
+ __raw_writel(pcc ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
+
+ return 0;
+}
+
+static void omap2_disable_osc_ck(struct clk *clk)
+{
+ u32 pcc;
+
+ pcc = __raw_readl(prcm_clksrc_ctrl);
+
+ __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
+}
+
+const struct clkops clkops_oscck = {
+ .enable = omap2_enable_osc_ck,
+ .disable= omap2_disable_osc_ck,
+};
+
+unsigned long omap2_osc_clk_recalc(struct clk *clk)
+{
+ return omap2xxx_get_apll_clkin() * omap2xxx_get_sysclkdiv();
+}
+
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 88077e7..62c3b02 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -79,31 +79,6 @@ const struct clkops clkops_omap2430_i2chs_wait = {
.find_companion = omap2_clk_dflt_find_companion,
};
-static int omap2_enable_osc_ck(struct clk *clk)
-{
- u32 pcc;
-
- pcc = __raw_readl(prcm_clksrc_ctrl);
-
- __raw_writel(pcc ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
-
- return 0;
-}
-
-static void omap2_disable_osc_ck(struct clk *clk)
-{
- u32 pcc;
-
- pcc = __raw_readl(prcm_clksrc_ctrl);
-
- __raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);
-}
-
-const struct clkops clkops_oscck = {
- .enable = omap2_enable_osc_ck,
- .disable= omap2_disable_osc_ck,
-};
-
#ifdef OLD_CK
/* Recalculate SYST_CLK */
static void omap2_sys_clk_recalc(struct clk *clk)
@@ -116,7 +91,7 @@ static void omap2_sys_clk_recalc(struct clk *clk)
}
#endif /* OLD_CK */
-static u32 omap2_get_sysclkdiv(void)
+u32 omap2xxx_get_sysclkdiv(void)
{
u32 div;
@@ -127,14 +102,9 @@ static u32 omap2_get_sysclkdiv(void)
return div;
}
-unsigned long omap2_osc_clk_recalc(struct clk *clk)
-{
- return omap2xxx_get_apll_clkin() * omap2_get_sysclkdiv();
-}
-
unsigned long omap2_sys_clk_recalc(struct clk *clk)
{
- return clk-parent-rate / omap2_get_sysclkdiv();
+ return clk-parent-rate / omap2xxx_get_sysclkdiv();
}
/*
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index 3f1672e..3b0610d 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -18,6 +18,7 @@ unsigned long omap2_dpllcore_recalc(struct clk *clk);
int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
u32 omap2xxx_get_apll_clkin(void);
+u32 omap2xxx_get_sysclkdiv(void);
/* REVISIT: These should be set dynamically for CONFIG_MULTI_OMAP2 */
#ifdef CONFIG_ARCH_OMAP2420
--
To unsubscribe from this
[PATCH 10/18] OMAP2xxx clock: move sys_clk code into clkt2xxx_sys.c
Move the sys_clk clock functions from clock2xxx.c to clkt2xxx_sys.c to
improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/clkt2xxx_sys.c | 50 ++
arch/arm/mach-omap2/clock2xxx.c | 30
arch/arm/mach-omap2/clock2xxx.h |3 +-
arch/arm/mach-omap2/clock2xxx_data.c |4 +--
5 files changed, 55 insertions(+), 35 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_sys.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 51178bf..7ce5fea 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -13,7 +13,8 @@ clock-common = clock.o
clock_common_data.o \
clkt_clksel.o
clock-omap2xxx = clkt2xxx_dpllcore.o \
clkt2xxx_virt_prcm_set.o \
- clkt2xxx_apll.o clkt2xxx_osc.o
+ clkt2xxx_apll.o clkt2xxx_osc.o \
+ clkt2xxx_sys.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(clock-omap2xxx)
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c
b/arch/arm/mach-omap2/clkt2xxx_sys.c
new file mode 100644
index 000..4abd2ab
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt2xxx_sys.c
@@ -0,0 +1,50 @@
+/*
+ * clkt2xxx_sys.c - OMAP2xxx sys_clk-specific clock code
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ * Gordon McNutt and RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+
+#include clock.h
+#include clock2xxx.h
+#include prm.h
+#include prm-regbits-24xx.h
+
+void __iomem *prcm_clksrc_ctrl;
+
+u32 omap2xxx_get_sysclkdiv(void)
+{
+ u32 div;
+
+ div = __raw_readl(prcm_clksrc_ctrl);
+ div = OMAP_SYSCLKDIV_MASK;
+ div = OMAP_SYSCLKDIV_SHIFT;
+
+ return div;
+}
+
+unsigned long omap2xxx_sys_clk_recalc(struct clk *clk)
+{
+ return clk-parent-rate / omap2xxx_get_sysclkdiv();
+}
+
+
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 62c3b02..b59cb1d 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -46,8 +46,6 @@
struct clk *vclk, *sclk, *dclk;
-void __iomem *prcm_clksrc_ctrl;
-
/*-
* Omap24xx specific clock functions
*-*/
@@ -79,34 +77,6 @@ const struct clkops clkops_omap2430_i2chs_wait = {
.find_companion = omap2_clk_dflt_find_companion,
};
-#ifdef OLD_CK
-/* Recalculate SYST_CLK */
-static void omap2_sys_clk_recalc(struct clk *clk)
-{
- u32 div = PRCM_CLKSRC_CTRL;
- div = (1 7) | (1 6); /* Test if ext clk divided by 1 or 2 */
- div = clk-rate_offset;
- clk-rate = (clk-parent-rate / div);
- propagate_rate(clk);
-}
-#endif /* OLD_CK */
-
-u32 omap2xxx_get_sysclkdiv(void)
-{
- u32 div;
-
- div = __raw_readl(prcm_clksrc_ctrl);
- div = OMAP_SYSCLKDIV_MASK;
- div = OMAP_SYSCLKDIV_SHIFT;
-
- return div;
-}
-
-unsigned long omap2_sys_clk_recalc(struct clk *clk)
-{
- return clk-parent-rate / omap2xxx_get_sysclkdiv();
-}
-
/*
* Set clocks for bypass mode for reboot to work.
*/
diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h
index 3b0610d..c14061b 100644
--- a/arch/arm/mach-omap2/clock2xxx.h
+++ b/arch/arm/mach-omap2/clock2xxx.h
@@ -11,9 +11,8 @@
unsigned long omap2_table_mpu_recalc(struct clk *clk);
int omap2_select_table_rate(struct clk *clk, unsigned long rate);
long omap2_round_to_table_rate(struct clk *clk, unsigned long rate);
-unsigned long omap2_sys_clk_recalc(struct clk *clk);
+unsigned long omap2xxx_sys_clk_recalc(struct clk *clk);
unsigned long omap2_osc_clk_recalc(struct clk *clk);
-unsigned long omap2_sys_clk_recalc(struct clk *clk);
unsigned long omap2_dpllcore_recalc(struct clk *clk);
int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate);
unsigned long omap2xxx_clk_get_core_rate(struct clk *clk);
diff --git a/arch/arm/mach-omap2/clock2xxx_data.c
b/arch/arm/mach-omap2/clock2xxx_data.c
index 402115f..3a435bb 100644
--- a/arch/arm/mach-omap2/clock2xxx_data.c
+++ b/arch/arm/mach-omap2/clock2xxx_data.c
@@ -79,7 +79,7 @@
[PATCH 07/18] OMAP2xxx clock: move the DVFS virtual clock code into clkt2xxx_virt_prcm_set.c
Move the DVFS virtual clock functions from clock2xxx.c to
clkt2xxx_virt_prcm_set.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Richard Woodruff r-woodru...@ti.com
---
arch/arm/mach-omap2/Makefile |3
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 245 ++
arch/arm/mach-omap2/clock2xxx.c | 211 --
3 files changed, 247 insertions(+), 212 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 04ce372..2b58363 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -11,7 +11,8 @@ prcm-common = prcm.o powerdomain.o
clock-common = clock.o clock_common_data.o \
clockdomain.o clkt_dpll.o \
clkt_clksel.o
-clock-omap2xxx = clkt2xxx_dpllcore.o
+clock-omap2xxx = clkt2xxx_dpllcore.o \
+ clkt2xxx_virt_prcm_set.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(clock-omap2xxx)
diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
new file mode 100644
index 000..3018af7
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@ -0,0 +1,245 @@
+/*
+ * clkt2xxx_virt_prcm_set.c - OMAP2xxx DVFS virtual clock functions
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ * Gordon McNutt and RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+#include linux/cpufreq.h
+
+#include plat/clock.h
+#include plat/sram.h
+#include plat/sdrc.h
+
+#include clock.h
+#include clock2xxx.h
+#include opp2xxx.h
+#include cm.h
+#include cm-regbits-24xx.h
+
+const struct prcm_config *curr_prcm_set;
+const struct prcm_config *rate_table;
+
+/**
+ * omap2_table_mpu_recalc - just return the MPU speed
+ * @clk: virt_prcm_set struct clk
+ *
+ * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set.
+ */
+unsigned long omap2_table_mpu_recalc(struct clk *clk)
+{
+ return curr_prcm_set-mpu_speed;
+}
+
+/*
+ * Look for a rate equal or less than the target rate given a configuration
set.
+ *
+ * What's not entirely clear is which field represents the key field.
+ * Some might argue L3-DDR, others ARM, others IVA. This code is simple and
+ * just uses the ARM rates.
+ */
+long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
+{
+ const struct prcm_config *ptr;
+ long highest_rate;
+ long sys_ck_rate;
+
+ sys_ck_rate = clk_get_rate(sclk);
+
+ highest_rate = -EINVAL;
+
+ for (ptr = rate_table; ptr-mpu_speed; ptr++) {
+ if (!(ptr-flags cpu_mask))
+ continue;
+ if (ptr-xtal_speed != sys_ck_rate)
+ continue;
+
+ highest_rate = ptr-mpu_speed;
+
+ /* Can check only after xtal frequency check */
+ if (ptr-mpu_speed = rate)
+ break;
+ }
+ return highest_rate;
+}
+
+/* Sets basic clocks based on the specified rate */
+int omap2_select_table_rate(struct clk *clk, unsigned long rate)
+{
+ u32 cur_rate, done_rate, bypass = 0, tmp;
+ const struct prcm_config *prcm;
+ unsigned long found_speed = 0;
+ unsigned long flags;
+ long sys_ck_rate;
+
+ sys_ck_rate = clk_get_rate(sclk);
+
+ for (prcm = rate_table; prcm-mpu_speed; prcm++) {
+ if (!(prcm-flags cpu_mask))
+ continue;
+
+ if (prcm-xtal_speed != sys_ck_rate)
+ continue;
+
+ if (prcm-mpu_speed = rate) {
+ found_speed = prcm-mpu_speed;
+ break;
+ }
+ }
+
+ if (!found_speed) {
+ printk(KERN_INFO Could not set MPU rate to %luMHz\n,
+ rate / 100);
+ return -EINVAL;
+ }
+
+ curr_prcm_set = prcm;
+ cur_rate = omap2xxx_clk_get_core_rate(dclk);
+
+ if (prcm-dpll_speed == cur_rate / 2) {
+ omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
+ } else if (prcm-dpll_speed == cur_rate * 2) {
+ omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1);
+ } else if
[PATCH 05/18] OMAP2/3/4 clock: combine all omap2_clk_functions
The struct clk_functions for OMAP2, 3, and 4 are all essentially the
same, so combine them. This removes one multi-OMAP kernel impediment
and saves memory on multi-OMAP builds.
The stubs for omap2_clk_{init,exit}_cpufreq() code will removed once
the OPP layer code that's currently in Kevin's PM branch is merged.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-omap2/clock.c | 17 +
arch/arm/mach-omap2/clock.h |7 +++
arch/arm/mach-omap2/clock2xxx.c | 23 ---
arch/arm/mach-omap2/clock34xx.c |9 -
arch/arm/mach-omap2/clock44xx.c |9 -
5 files changed, 32 insertions(+), 33 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 0d54fde..999b91e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -351,3 +351,20 @@ void omap2_clk_disable_unused(struct clk *clk)
pwrdm_clkdm_state_switch(clk-clkdm);
}
#endif
+
+/* Common data */
+
+struct clk_functions omap2_clk_functions = {
+ .clk_enable = omap2_clk_enable,
+ .clk_disable= omap2_clk_disable,
+ .clk_round_rate = omap2_clk_round_rate,
+ .clk_set_rate = omap2_clk_set_rate,
+ .clk_set_parent = omap2_clk_set_parent,
+ .clk_disable_unused = omap2_clk_disable_unused,
+#ifdef CONFIG_CPU_FREQ
+ /* These will be removed when the OPP code is integrated */
+ .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
+ .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
+#endif
+};
+
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 0d21702..dcd58cd 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -105,5 +105,12 @@ extern const struct clksel_rate gpt_32k_rates[];
extern const struct clksel_rate gpt_sys_rates[];
extern const struct clksel_rate gfx_l3_rates[];
+#if defined(CONFIG_ARCH_OMAP24XX) defined(CONFIG_CPU_FREQ)
+extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table
**table);
+extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table
**table);
+#else
+#define omap2_clk_init_cpufreq_table 0
+#define omap2_clk_exit_cpufreq_table 0
+#endif
#endif
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 5420356..bef5574 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -453,13 +453,16 @@ int omap2_select_table_rate(struct clk *clk, unsigned
long rate)
*/
static struct cpufreq_frequency_table *freq_table;
-void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
+void omap2xxx_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
{
const struct prcm_config *prcm;
long sys_ck_rate;
int i = 0;
int tbl_sz = 0;
+ if (!cpu_is_omap2xxx())
+ return;
+
sys_ck_rate = clk_get_rate(sclk);
for (prcm = rate_table; prcm-mpu_speed; prcm++) {
@@ -516,26 +519,16 @@ void omap2_clk_init_cpufreq_table(struct
cpufreq_frequency_table **table)
*table = freq_table[0];
}
-void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
+void omap2xxx_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
{
+ if (!cpu_is_omap2xxx())
+ return;
+
kfree(freq_table);
}
#endif
-struct clk_functions omap2_clk_functions = {
- .clk_enable = omap2_clk_enable,
- .clk_disable= omap2_clk_disable,
- .clk_round_rate = omap2_clk_round_rate,
- .clk_set_rate = omap2_clk_set_rate,
- .clk_set_parent = omap2_clk_set_parent,
- .clk_disable_unused = omap2_clk_disable_unused,
-#ifdef CONFIG_CPU_FREQ
- .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
- .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
-#endif
-};
-
static u32 omap2_get_apll_clkin(void)
{
u32 aplls, srate = 0;
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index d4217b9..4c4bb3c 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -258,15 +258,6 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned
long rate)
*/
#if defined(CONFIG_ARCH_OMAP3)
-struct clk_functions omap2_clk_functions = {
- .clk_enable = omap2_clk_enable,
- .clk_disable= omap2_clk_disable,
- .clk_round_rate = omap2_clk_round_rate,
- .clk_set_rate = omap2_clk_set_rate,
- .clk_set_parent = omap2_clk_set_parent,
- .clk_disable_unused = omap2_clk_disable_unused,
-};
-
/*
* Set clocks for bypass mode for reboot to work.
*/
diff --git a/arch/arm/mach-omap2/clock44xx.c b/arch/arm/mach-omap2/clock44xx.c
index e370868..08dd642 100644
---
[PATCH 06/18] OMAP2xxx clock: move the DPLL+CORE composite clock code into clkt2xxx_dpllcore.c
Move the DPLL+CORE composite clock functions from clock2xxx.c to
clkt2xxx_dpllcore.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Richard Woodruff r-woodru...@ti.com
---
arch/arm/mach-omap2/Makefile|4 +
arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 172 +++
arch/arm/mach-omap2/clock2xxx.c | 136 -
3 files changed, 175 insertions(+), 137 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_dpllcore.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 9ecc58d..04ce372 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -11,8 +11,10 @@ prcm-common = prcm.o powerdomain.o
clock-common = clock.o clock_common_data.o \
clockdomain.o clkt_dpll.o \
clkt_clksel.o
+clock-omap2xxx = clkt2xxx_dpllcore.o
-obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
+obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
+ $(clock-omap2xxx)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(omap-3-4-common)
obj-$(CONFIG_ARCH_OMAP4) += $(omap-3-4-common) $(prcm-common) $(clock-common)
diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
new file mode 100644
index 000..e615663
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@ -0,0 +1,172 @@
+/*
+ * clkt2xxx_dpllcore.c - DPLL + CORE_CLK composite clock functions
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ * Gordon McNutt and RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX The DPLL and DPLL divider clocks should be split.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+#include plat/sram.h
+#include plat/sdrc.h
+
+#include clock.h
+#include clock2xxx.h
+#include opp2xxx.h
+#include cm.h
+#include cm-regbits-24xx.h
+
+/* #define DOWN_VARIABLE_DPLL 1 */ /* Experimental */
+
+/**
+ * omap2xxx_clk_get_core_rate - return the CORE_CLK rate
+ * @clk: pointer to the combined dpll_ck + core_ck (currently dpll_ck)
+ *
+ * Returns the CORE_CLK rate. CORE_CLK can have one of three rate
+ * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
+ * (the latter is unusual). This currently should be called with
+ * struct clk *dpll_ck, which is a composite clock of dpll_ck and
+ * core_ck.
+ */
+unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
+{
+ long long core_clk;
+ u32 v;
+
+ core_clk = omap2_get_dpll_rate(clk);
+
+ v = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ v = OMAP24XX_CORE_CLK_SRC_MASK;
+
+ if (v == CORE_CLK_SRC_32K)
+ core_clk = 32768;
+ else
+ core_clk *= v;
+
+ return core_clk;
+}
+
+/*
+ * Uses the current prcm set to tell if a rate is valid.
+ * You can go slower, but not faster within a given rate set.
+ */
+static long omap2_dpllcore_round_rate(unsigned long target_rate)
+{
+ u32 high, low, core_clk_src;
+
+ core_clk_src = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ core_clk_src = OMAP24XX_CORE_CLK_SRC_MASK;
+
+ if (core_clk_src == CORE_CLK_SRC_DPLL) {/* DPLL clockout */
+ high = curr_prcm_set-dpll_speed * 2;
+ low = curr_prcm_set-dpll_speed;
+ } else {/* DPLL clockout x 2 */
+ high = curr_prcm_set-dpll_speed;
+ low = curr_prcm_set-dpll_speed / 2;
+ }
+
+#ifdef DOWN_VARIABLE_DPLL
+ if (target_rate high)
+ return high;
+ else
+ return target_rate;
+#else
+ if (target_rate low)
+ return high;
+ else
+ return low;
+#endif
+
+}
+
+unsigned long omap2_dpllcore_recalc(struct clk *clk)
+{
+ return omap2xxx_clk_get_core_rate(clk);
+}
+
+int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
+{
+ u32 cur_rate, low, mult, div, valid_rate, done_rate;
+ u32 bypass = 0;
+ struct prcm_config tmpset;
+ const struct dpll_data *dd;
+
+ cur_rate = omap2xxx_clk_get_core_rate(dclk);
+ mult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
+ mult = OMAP24XX_CORE_CLK_SRC_MASK;
+
+ if ((rate == (cur_rate / 2)) (mult == 2)) {
+
[PATCH 03/18] OMAP2/3/4 clock: move clksel clock functions into clkt_clksel.c
Move all clksel-related clock functions from mach-omap2/clock.c to
clkt_clksel.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/Makefile |3
arch/arm/mach-omap2/clkt_clksel.c | 413 +
arch/arm/mach-omap2/clock.c | 377 --
arch/arm/mach-omap2/clock.h |2
4 files changed, 420 insertions(+), 375 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt_clksel.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1a135c8..9ecc58d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -9,7 +9,8 @@ omap-2-3-common = irq.o sdrc.o
omap_hwmod.o
omap-3-4-common= dpll3xxx.o
prcm-common= prcm.o powerdomain.o
clock-common = clock.o clock_common_data.o \
- clockdomain.o clkt_dpll.o
+ clockdomain.o clkt_dpll.o \
+ clkt_clksel.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
diff --git a/arch/arm/mach-omap2/clkt_clksel.c
b/arch/arm/mach-omap2/clkt_clksel.c
new file mode 100644
index 000..8ab34e3
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -0,0 +1,413 @@
+/*
+ * clkt_clksel.c - OMAP2/3/4 clksel clock functions
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX At some point these clksel clocks should be split into
+ * divider clocks and mux clocks to better match the hardware.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/errno.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+
+#include clock.h
+#include cm.h
+#include cm-regbits-24xx.h
+#include cm-regbits-34xx.h
+
+/* Private functions */
+
+/**
+ * _omap2_get_clksel_by_parent - return clksel struct for a given clk parent
+ * @clk: OMAP struct clk ptr to inspect
+ * @src_clk: OMAP struct clk ptr of the parent clk to search for
+ *
+ * Scan the struct clksel array associated with the clock to find
+ * the element associated with the supplied parent clock address.
+ * Returns a pointer to the struct clksel on success or NULL on error.
+ */
+static const struct clksel *_omap2_get_clksel_by_parent(struct clk *clk,
+ struct clk *src_clk)
+{
+ const struct clksel *clks;
+
+ if (!clk-clksel)
+ return NULL;
+
+ for (clks = clk-clksel; clks-parent; clks++) {
+ if (clks-parent == src_clk)
+ break; /* Found the requested parent */
+ }
+
+ if (!clks-parent) {
+ printk(KERN_ERR clock: Could not find parent clock %s in
+ clksel array of clock %s\n, src_clk-name,
+ clk-name);
+ return NULL;
+ }
+
+ return clks;
+}
+
+/*
+ * Converts encoded control register address into a full address
+ * On error, the return value (parent_div) will be 0.
+ */
+static u32 _omap2_clksel_get_src_field(struct clk *src_clk, struct clk *clk,
+ u32 *field_val)
+{
+ const struct clksel *clks;
+ const struct clksel_rate *clkr;
+
+ clks = _omap2_get_clksel_by_parent(clk, src_clk);
+ if (!clks)
+ return 0;
+
+ for (clkr = clks-rates; clkr-div; clkr++) {
+ if (clkr-flags cpu_mask clkr-flags DEFAULT_RATE)
+ break; /* Found the default rate for this platform */
+ }
+
+ if (!clkr-div) {
+ printk(KERN_ERR clock: Could not find default rate for
+ clock %s parent %s\n, clk-name,
+ src_clk-parent-name);
+ return 0;
+ }
+
+ /* Should never happen. Add a clksel mask to the struct clk. */
+ WARN_ON(clk-clksel_mask == 0);
+
+ *field_val = clkr-val;
+
+ return clkr-div;
+}
+
+
+/* Public functions */
+
+/**
+ * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware
+ * @clk: OMAP clock struct ptr to use
+ *
+ * Given a pointer to a source-selectable struct clk, read the hardware
+ * register and determine what its parent is currently set to. Update the
+ * clk-parent field with the appropriate clk ptr.
+ */
+void omap2_init_clksel_parent(struct clk *clk)
+{
+ const struct clksel *clks;
+ const struct clksel_rate *clkr;
+
[PATCH 08/18] OMAP2xxx clock: move the APLL clock code into clkt2xxx_apll.c
Move the APLL-related clock functions from clock2xxx.c to
clkt2xxx_apll.c to improve maintainability.
Signed-off-by: Paul Walmsley p...@pwsan.com
Cc: Richard Woodruff r-woodru...@ti.com
---
arch/arm/mach-omap2/Makefile|3 +
arch/arm/mach-omap2/clkt2xxx_apll.c | 120 +++
arch/arm/mach-omap2/clock2xxx.c | 86 -
arch/arm/mach-omap2/clock2xxx.h |1
4 files changed, 124 insertions(+), 86 deletions(-)
create mode 100644 arch/arm/mach-omap2/clkt2xxx_apll.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 2b58363..825c303 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -12,7 +12,8 @@ clock-common = clock.o
clock_common_data.o \
clockdomain.o clkt_dpll.o \
clkt_clksel.o
clock-omap2xxx = clkt2xxx_dpllcore.o \
- clkt2xxx_virt_prcm_set.o
+ clkt2xxx_virt_prcm_set.o \
+ clkt2xxx_apll.o
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(prcm-common) $(clock-common) \
$(clock-omap2xxx)
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c
b/arch/arm/mach-omap2/clkt2xxx_apll.c
new file mode 100644
index 000..459fd75
--- /dev/null
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -0,0 +1,120 @@
+/*
+ * clkt2xxx_apll.c - OMAP2xxx APLL clock control functions
+ *
+ * Copyright (C) 2005-2008 Texas Instruments, Inc.
+ * Copyright (C) 2004-2010 Nokia Corporation
+ *
+ * Contacts:
+ * Richard Woodruff r-woodru...@ti.com
+ * Paul Walmsley
+ *
+ * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
+ * Gordon McNutt and RidgeRun, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/clk.h
+#include linux/io.h
+
+#include plat/clock.h
+#include plat/prcm.h
+
+#include clock.h
+#include clock2xxx.h
+#include cm.h
+#include cm-regbits-24xx.h
+
+/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
+#define EN_APLL_STOPPED0
+#define EN_APLL_LOCKED 3
+
+/* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */
+#define APLLS_CLKIN_19_2MHZ0
+#define APLLS_CLKIN_13MHZ 2
+#define APLLS_CLKIN_12MHZ 3
+
+/* Private functions */
+
+/* Enable an APLL if off */
+static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
+{
+ u32 cval, apll_mask;
+
+ apll_mask = EN_APLL_LOCKED clk-enable_bit;
+
+ cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+
+ if ((cval apll_mask) == apll_mask)
+ return 0; /* apll already enabled */
+
+ cval = ~apll_mask;
+ cval |= apll_mask;
+ cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+
+ omap2_cm_wait_idlest(OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), status_mask,
+clk-name);
+
+ /*
+* REVISIT: Should we return an error code if omap2_wait_clock_ready()
+* fails?
+*/
+ return 0;
+}
+
+static int omap2_clk_apll96_enable(struct clk *clk)
+{
+ return omap2_clk_apll_enable(clk, OMAP24XX_ST_96M_APLL);
+}
+
+static int omap2_clk_apll54_enable(struct clk *clk)
+{
+ return omap2_clk_apll_enable(clk, OMAP24XX_ST_54M_APLL);
+}
+
+/* Stop APLL */
+static void omap2_clk_apll_disable(struct clk *clk)
+{
+ u32 cval;
+
+ cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+ cval = ~(EN_APLL_LOCKED clk-enable_bit);
+ cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+}
+
+/* Public data */
+
+const struct clkops clkops_apll96 = {
+ .enable = omap2_clk_apll96_enable,
+ .disable= omap2_clk_apll_disable,
+};
+
+const struct clkops clkops_apll54 = {
+ .enable = omap2_clk_apll54_enable,
+ .disable= omap2_clk_apll_disable,
+};
+
+/* Public functions */
+
+u32 omap2xxx_get_apll_clkin(void)
+{
+ u32 aplls, srate = 0;
+
+ aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
+ aplls = OMAP24XX_APLLS_CLKIN_MASK;
+ aplls = OMAP24XX_APLLS_CLKIN_SHIFT;
+
+ if (aplls == APLLS_CLKIN_19_2MHZ)
+ srate = 1920;
+ else if (aplls == APLLS_CLKIN_13MHZ)
+ srate = 1300;
+ else if (aplls == APLLS_CLKIN_12MHZ)
+ srate = 1200;
+
+ return srate;
+}
+
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index 11d6edb..88077e7 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -44,16 +44,6 @@
#include cm.h
#include cm-regbits-24xx.h
-
-/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */
-#define EN_APLL_STOPPED
[PATCH 11/18] OMAP2 clock: don't compile OMAP2430-only functions on non-2430 builds
omap2430_clk_i2chs_find_idlest() doesn't need to be compiled in on
non-2430 builds, so skip it in those cases to save memory.
Signed-off-by: Paul Walmsley p...@pwsan.com
---
arch/arm/mach-omap2/clock2xxx.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index b59cb1d..e5b9851 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -50,6 +50,8 @@ struct clk *vclk, *sclk, *dclk;
* Omap24xx specific clock functions
*-*/
+#ifdef CONFIG_ARCH_OMAP2430
+
/**
* omap2430_clk_i2chs_find_idlest - return CM_IDLEST info for 2430 I2CHS
* @clk: struct clk * being enabled
@@ -69,6 +71,10 @@ static void omap2430_clk_i2chs_find_idlest(struct clk *clk,
*idlest_bit = clk-enable_bit;
}
+#else
+#define omap2430_clk_i2chs_find_idlest NULL
+#endif
+
/* 2430 I2CHS has non-standard IDLEST register */
const struct clkops clkops_omap2430_i2chs_wait = {
.enable = omap2_dflt_clk_enable,
--
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Re: [PATCH v9 4/4] OMAP: McBSP: Use cache when modifying individual register bits
Hello,
I think there are some inconsistency in a way how for example the SPCR1 and
SPCR2 registers are used.
On Thursday 14 January 2010 18:13:36 ext Janusz Krzysztofik wrote:
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware.
Before that, values read back from McBSP registers to be used for updating
them happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively
high power requirements of an external USB adapter connected to the
board's printer dedicated USB port.
I think there is one important point that makes this patch worth of
applying, apart from my hardware quality. With the current code, if it
ever happens to any machine, no matter if OMAP1510 or newer, to read
incorrect value from a McBSP register, this wrong value will get written
back without any checking. That can lead to hardware damage if, for
example, an input pin is turned into output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
No functional changes since v3.
arch/arm/plat-omap/mcbsp.c | 78
+++-- 1 file changed, 47
insertions(+), 31 deletions(-)
--- git/arch/arm/plat-omap/mcbsp.c.orig 2010-01-14 00:36:14.0
+0100
+++ git/arch/arm/plat-omap/mcbsp.c2010-01-14 02:05:23.0 +0100
@@ -114,7 +114,8 @@ static irqreturn_t omap_mcbsp_tx_irq_han
dev_err(mcbsp_tx-dev, TX Frame Sync Error! : 0x%x\n,
irqst_spcr2);
/* Writing zero to XSYNC_ERR clears the IRQ */
- MCBSP_WRITE(mcbsp_tx, SPCR2, irqst_spcr2 ~(XSYNC_ERR));
+ MCBSP_WRITE(mcbsp_tx, SPCR2,
+ MCBSP_READ_CACHE(mcbsp_tx, SPCR2) ~(XSYNC_ERR));
The reg_cache will never have the XSYNC_ERR, or any other flags set, since
these
flags has never written to the reg_cache.
So it is kind of not necessary to clear the flag, which is actually always 0.
Another thing is that as far as I understand the reason behind of this series
is
that you have a problem, that you can not trust on the values that you read
from
the McBSP registers, if this is true, than the problem can occur when the above
path has been taken:
...
irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
...
if (irqst_spcr2 XSYNC_ERR) {
But since you read from McBSP registers much rarely, than probably the
corruption is not that visible?
Anyway, clearing the status/error flags are not necessary, since the reg_cache
will never got these bits set, you could just write back the SPCR2/SPCR1
register content from the cache as it is...
} else {
complete(mcbsp_tx-tx_irq_completion);
}
@@ -134,7 +135,8 @@ static irqreturn_t omap_mcbsp_rx_irq_han
dev_err(mcbsp_rx-dev, RX Frame Sync Error! : 0x%x\n,
irqst_spcr1);
/* Writing zero to RSYNC_ERR clears the IRQ */
- MCBSP_WRITE(mcbsp_rx, SPCR1, irqst_spcr1 ~(RSYNC_ERR));
+ MCBSP_WRITE(mcbsp_rx, SPCR1,
+ MCBSP_READ_CACHE(mcbsp_rx, SPCR1) ~(RSYNC_ERR));
Same here.
...
@@ -653,7 +657,7 @@ int omap_mcbsp_pollwrite(unsigned int id
if (MCBSP_READ(mcbsp, SPCR2) XSYNC_ERR) {
/* clear error */
MCBSP_WRITE(mcbsp, SPCR2,
- MCBSP_READ(mcbsp, SPCR2) (~XSYNC_ERR));
+ MCBSP_READ_CACHE(mcbsp, SPCR2) (~XSYNC_ERR));
Well, I think here also, the reg_cache does not have the XSYNC_ERR set, it is
only set in the McBSP register.
/* resend */
return -1;
} else {
@@ -662,10 +666,12 @@ int omap_mcbsp_pollwrite(unsigned int id
while (!(MCBSP_READ(mcbsp, SPCR2) XRDY)) {
if (attemps++ 1000) {
MCBSP_WRITE(mcbsp, SPCR2,
- MCBSP_READ(mcbsp, SPCR2) (~XRST));
+ MCBSP_READ_CACHE(mcbsp, SPCR2)
+ (~XRST));
Also here, the XRST will surely not set in the cached SPCR2...
This applies fro all other cases regarding to status/error bits in McBSP.
udelay(10);
MCBSP_WRITE(mcbsp, SPCR2,
- MCBSP_READ(mcbsp, SPCR2) | (XRST));
+
Re: [PATCH] omap3: pandora: add DSS2 support and related regulators
On Thu, 2010-01-14 at 21:37 +0100, ext Grazvydas Ignotas wrote: On Thu, Jan 14, 2010 at 4:05 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote: On Wed, 2010-01-13 at 22:01 +0100, ext Grazvydas Ignotas wrote: On Wed, Jan 13, 2010 at 5:02 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote: Hi, This doesn't apply, can you resend based on Linus' tree or my DSS2 tree? ok, will resend shortly. BTW, what about enabling vdds_dsi/vdds_sdi regulators we talked about earlier? This patch already sets up those regulators in the board file for DSS2 to get and enable them. I can come up with a patch for that if you want (perhaps doing it somewhere in dss_init()). It would be nice to get this clarified from TI's HW side, but I haven't had time to do that. However, it sure looks like your theory is correct, so a patch would be ok. I don't think dss_init is a proper place for it. The power only needs to be enabled when the display is on, so perhaps dpi_display_enable/disable() would be better place to turn it on and off (and suspend/resume). Below is a quick patch I made to test this. But is the same code needed by RFBI and SDI also? And is it needed only when certain pins are in use? And only on OMAP3. I'm not sure what would be the most elegant way for this, but perhaps for now it's good enough if we enable the power in dpi.c's enable/disable. I can only test this on pandora (24bit parallel display), and your patch works fine there. Ok, good to know. I'm not very happy with the patch yet, but something like it is needed. Gražvydas PS: I see some author names got mangled in your GIT (got prefixed with 'ext'). Argh. It's the notorious Nokia mailserver. Thanks for pointing it out. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: issue with panel drivers in DSS2
On Thu, 2010-01-14 at 21:59 +0100, ext Grazvydas Ignotas wrote: Hi, there is an issue related to panel drivers: even if panel driver provides get_rotate/set_rotate and/or get_mirror/set_mirror functions, those cannot be accessed over sysfs, even though corresponding entries are created in omapdss/displayX. This is because panel driver fills omap_dss_driver structure, but sysfs entries are created for omap_dss_device when it probes. So perhaps those pointers need to be copied from omap_dss_driver to omap_dss_device somewhere in dss_driver_probe(). If you look at dsi.c, you'll see how it currently works. So it's the job of the interface (dpi, sdi, rfbi or dsi) to act as a intermediary, and call the functions in the driver. Rotate and mirror aren't implemented in dpi and sdi, as I don't know any displays that could use them. But if there are such displays, dpi.c can either just copy the driver's function in to the device struct, or implement an intermediary function of its own. That said, I'm actually in the process of changing the driver/device model a bit. My aim is that all the calls (from omapfb, sysfs etc) go directly to the driver code, which then will call necessary functions in the dss to accomplish its goal. It was foolish of me to design the model the way it's now, but my reasoning was that all the displays of certain type must be very similar, and thus it's easier for everyone if the dss driver is in control. I coulnd't have been more wrong =). Especially the more complex DSI peripherals are unique, and the only solution is to let the driver be in total control. But more of that later, when I have something working. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] OMAP3630:DSS2:Enable Pre-Multiplied Alpha Support
Hi,
On Mon, 2009-12-21 at 16:06 +0100, ext Y, Kishore wrote:
From 2f873819a4b9eb0bd658db1e59408d8f0aeb14b6 Mon Sep 17 00:00:00 2001
From: Sudeep Basavaraj sudeep.basava...@ti.com
Date: Mon, 14 Dec 2009 18:54:51 +0530
Subject: [PATCH] OMAP3630:DSS2:Enable Pre-Multiplied Alpha Support
Enables dss to process color formats with pre-mulitplied alpha values.
With this we can have alpha values defined for each pixel
and hence can have different blending values for each pixel.
What does pre-multiplied alpha mean? The TRM didn't really open it up...
Don't we already have per pixel alpha when using ARGB/RGBA?
This patch seems to always set the bit on, never set it off. Is that the
purpose?
Tomi
Signed-off-by: Sudeep Basavaraj sudeep.basava...@ti.com
Signed-off-by: Kishore Y kishor...@ti.com
---
drivers/video/omap2/dss/dispc.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 6dabf4b..5f7819b 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -913,6 +913,11 @@ static void _dispc_set_vid_color_conv(enum omap_plane
plane, bool enable)
dispc_write_reg(dispc_reg_att[plane], val);
}
+static void _dispc_set_alpha_blend_attrs(enum omap_plane plane, bool enable)
+{
+ REG_FLD_MOD(dispc_reg_att[plane], enable ? 1 : 0, 28, 28);
+}
+
void dispc_enable_replication(enum omap_plane plane, bool enable)
{
int bit;
@@ -1689,6 +1694,9 @@ static int _dispc_setup_plane(enum omap_plane plane,
_dispc_set_rotation_attrs(plane, rotation, mirror, color_mode);
+ if (cpu_is_omap3630() (plane != OMAP_DSS_VIDEO1))
+ _dispc_set_alpha_blend_attrs(plane, 1);
+
if (plane != OMAP_DSS_VIDEO1)
_dispc_setup_global_alpha(plane, global_alpha);
--
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Re: [PM-WIP-OPP][PATCH] OPP: Introduces enum for addressing different OPP types
Romit Dasgupta had written, on 01/13/2010 07:22 AM, the following:
Apologies on a delayed response, few other topics required urgent
attention meanwhile.
Nishanth Menon wrote:
Romit Dasgupta said the following on 01/13/2010 04:41 AM:
Menon, Nishanth wrote:
General comment: might be good to state the enum types you are introducing
for OMAP3 in the commit message
Actually the introduction of enum type itself is the heart of the patch. The
details are irrelevant.
could you be a little more verbose as to what is irrelevant? the OMAP3
enums descriptions in commit message?
Yes, because they are going to be SoC specific.
Here is a sample commit message I can think of:
Using omap_opp * to refer to domain types restricts opp implementation
into maintaining pointers outside the opp layer. This causes issues such as:
a) Describing cross domain dependencies (e.g. dsp vs mpu)
b) Ease of transitioning/supporting to multiple silicon variants and
families
c) Choice of varied options in implementing opp layer internals.
Since all we need a identifying a specific domain for query/operational
purposes, we introduce enum for identifying OPP types instead of using
opp layer's internal data structure pointer.
Currently, OMAP3 is the only silicon supporting the OPP layer, hence
mpu_opps, l3_opps and dsp_opps are deprecated and replaced with OPP_MPU,
OPP_L3 and OPP_DSP respectively.
---
Benefit of this is that someone who may not monitoring linux-omap very
closely and is not aware of this change (e.g. private trees and
potential users such as dspbridge) can figure out from the git log which
commit might potentially affect them. The patch does SOC specific
change, so the commit message ought to catch their attention. It also
allows maintainers(later in the pipeline) who maynot know about this
specific discussion (btw, a link might be useful as mentioned
previously), to understand the scope of the change accurately.
Please note I have divided the commit message into three parts:
i) why is the old strategy not effection (motivation for the patch)
ii) why is the new strategy beneficial (benefit of the patch)
iii) what is the impact of the patch (warning for historical
purposes/informative).
[...]
+ for (i = 1; i = entries; i++) {
+ ret = opp_init_list(i, omap3_opp_def_list[i - 1]);
a) if you remove OPP_NONE, i-1 is not needed (same everywhere in the patch)
Frankly, I did not want to introduce OPP_NONE but did so as you are checking all
parameters passed to the OPP APIs.
Lets remove it then.
OK
Thanks.
definition of enum and the implicit usage of enums are in two different
files. there is a distinct possibility of some one modifying the header
without actually knowing that .c depends on the exact values of the enum
definition.
As I said before one needs to make changes in the kernel by knowing what they
are doing.
pm34xx.c has no right to depend on opp.h definition values - if it does
it ties it down and a constraint for future flexibility. please change.
The right approach should be to take out the loop in pm34xx.c for now and
explicitly call the opp_init_list function after passing OPP_MPU, OPP_L3,
OPP_DSP in any order. So pm34xx.c needs to change not opp.[ch]. What do you
think?
I did dig into this a few mins ago.. and yes I can see similar example
in drivers/mfd/twl4030-core.c
The intent of my comment is this: when someone else, few months from
now, is focusing on adding/changing opp logic, they will focus on opp.c
and .h. we have two choices to handle this:
a) Ensure that users of opp.h do not know how it works internally -
e.g. ordering of opp list for example.
b) add
/* WARNING: See file:arch/arm/mach-omap2/pm34xx.c before modifying the
sequence of these enums */ to opp.h
and
/* WARNING: See file:arch/arm/plat-omap/include/plat/opp.h before
modifying this */ in pm34xx.c
now, I was recommending doing a, till a thought a little more on the
implementation(array based) and how long that implementation might
last(we might potentially move opp.c to a list implementation). the
effort would be to complicate the opp_init,add functions for a very
short lifetime. This effort maynot be worth it.
Instead I would request at least (b) be done to prevent mistaken
modifications.
*/
-static int __deprecated opp_to_freq(unsigned long *freq,
- const struct omap_opp *opps, u8 opp_id)
+static int __deprecated opp_to_freq(unsigned long *freq, enum opp_t opp_t,
Enum type and variable have the same name :( mebbe a rename of variable is
appropriate
Not sure why you say this. Did you see the compiler throwing up any warning?
The usage later in the code is opp_t - this is a readability issue not
a compiler warning.
What is the readability issue? Why cant we declare something like enum opp_t
opp_t?
Let me try to explain this clearly. assume we have a struct opp_t (not
enum) for the
Re: [PM-WIP-OPP][PATCH] OPP: Introduces enum for addressing different OPP types
Nishanth,
I was about to post a re-worked patch. Anyways, please see below:
Here is a sample commit message I can think of:
Using omap_opp * to refer to domain types restricts opp implementation
into maintaining pointers outside the opp layer. This causes issues such as:
a) Describing cross domain dependencies (e.g. dsp vs mpu)
b) Ease of transitioning/supporting to multiple silicon variants and
families
c) Choice of varied options in implementing opp layer internals.
Since all we need a identifying a specific domain for query/operational
purposes, we introduce enum for identifying OPP types instead of using
opp layer's internal data structure pointer.
Currently, OMAP3 is the only silicon supporting the OPP layer, hence
mpu_opps, l3_opps and dsp_opps are deprecated and replaced with OPP_MPU,
OPP_L3 and OPP_DSP respectively.
I like this message. I will include it.
definition of enum and the implicit usage of enums are in two different
files. there is a distinct possibility of some one modifying the header
without actually knowing that .c depends on the exact values of the enum
definition.
As I said before one needs to make changes in the kernel by knowing what they
are doing.
pm34xx.c has no right to depend on opp.h definition values - if it does
it ties it down and a constraint for future flexibility. please change.
The right approach should be to take out the loop in pm34xx.c for now and
explicitly call the opp_init_list function after passing OPP_MPU, OPP_L3,
OPP_DSP in any order. So pm34xx.c needs to change not opp.[ch]. What do you
think?
I did dig into this a few mins ago.. and yes I can see similar example
in drivers/mfd/twl4030-core.c
The intent of my comment is this: when someone else, few months from
now, is focusing on adding/changing opp logic, they will focus on opp.c
and .h. we have two choices to handle this:
a) Ensure that users of opp.h do not know how it works internally -
e.g. ordering of opp list for example.
b) add
/* WARNING: See file:arch/arm/mach-omap2/pm34xx.c before modifying the
sequence of these enums */ to opp.h
and
/* WARNING: See file:arch/arm/plat-omap/include/plat/opp.h before
modifying this */ in pm34xx.c
now, I was recommending doing a, till a thought a little more on the
implementation(array based) and how long that implementation might
last(we might potentially move opp.c to a list implementation). the
effort would be to complicate the opp_init,add functions for a very
short lifetime. This effort maynot be worth it.
I understand your concern. I have made some changes in the code. Please look at
the reposted patch (in few mins from now I shall post them).
Enum type and variable have the same name :( mebbe a rename of variable is
appropriate
Not sure why you say this. Did you see the compiler throwing up any
warning?
The usage later in the code is opp_t - this is a readability issue not
a compiler warning.
What is the readability issue? Why cant we declare something like enum opp_t
opp_t?
Let me try to explain this clearly. assume we have a struct opp_t (not
enum) for the time being.
void some_func(struct opp_t *opp_t)
{
struct opp_t *opp;
..
200 line of code (one page full)
/* point 1 */
BUG_ON(opp_t.xyz)
...
200 lines of more code
..
/* point 2 */
BUG_ON(opp.xyz)
...
}
lets say this is compiled by some non follower of this mail chain,
compiler throws an error for point 1: filex:liney
so the guy/gal fires up vim and opens the filex, goes to line y
he/she cannot see the start of the function, knows that there is a
struct opp_t
If a function is that big then the fault lies there to start with! What do you
say?
Nevertheless, your suggestion is cosmetic but I think we should not assume that
developers are so ignorant. For now I will do away with your suggestion. Please
feel free to change the code if you think what you say is the right thing.
Regards,
-Romit
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[PATCHv3 2/6] OMAP3: PM: Added support for INACTIVE and ON states for powerdomains
From: Tero Kristo tero.kri...@nokia.com
Previously omap_sram_idle() did not know about the difference between ON and
INACTIVE states, which complicated the state handling in these cases. Now,
the following changes are done in the idle logic:
- Check for IO-chain arming is changed to reflect desired state (RET)
- UART clocks will be disabled if we attempt to enter INACTIVE (this allows
the state change to actually happen)
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/pm34xx.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a5335f9..7cc3293 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -386,6 +386,7 @@ void omap_sram_idle(void)
mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
switch (mpu_next_state) {
case PWRDM_POWER_ON:
+ case PWRDM_POWER_INACTIVE:
case PWRDM_POWER_RET:
/* No need to save context */
save_state = 0;
@@ -452,9 +453,11 @@ void omap_sram_idle(void)
OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET);
}
- /* Enable IO-PAD and IO-CHAIN wakeups */
- prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
- omap3_enable_io_chain();
+ if (core_next_state = PWRDM_POWER_RET) {
+ /* Enable IO-PAD and IO-CHAIN wakeups */
+ prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
+ omap3_enable_io_chain();
+ }
}
omap3_intc_prepare_idle();
@@ -555,15 +558,13 @@ void omap_sram_idle(void)
}
/* Disable IO-PAD and IO-CHAIN wakeup */
- if (core_next_state PWRDM_POWER_ON) {
+ if (core_next_state = PWRDM_POWER_RET) {
prm_clear_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
omap3_disable_io_chain();
}
pwrdm_post_transition();
-
- omap2_clkdm_allow_idle(mpu_pwrdm-pwrdm_clkdms[0]);
}
int omap3_can_sleep(void)
@@ -611,7 +612,6 @@ int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
}
if (sleep_switch) {
- omap2_clkdm_allow_idle(pwrdm-pwrdm_clkdms[0]);
pwrdm_wait_transition(pwrdm);
pwrdm_state_switch(pwrdm);
}
--
1.5.4.3
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[PATCHv3 5/6] OMAP: Powerdomains: Add support for checking if pwrdm/clkdm can idle
From: Tero Kristo tero.kri...@nokia.com
pwrdm_can_idle(pwrdm) will check if the specified powerdomain can enter
idle. This is done by checking all clockdomains under the powerdomain
if they can idle also.
omap2_clkdm_can_idle(clkdm) will check if the specified clockdomain can
enter idle. This checks the functional clocks and idle status bits of the
domain according to following rules:
1) get inverse of idlest and mask against idle_def.mask
* this gives a bitmask with non-idle bits high
2) bitwise OR active functional clocks from the domain to the result
* in some cases FCLK can be active but idlest still shows module in idle
3) disable bits defined in idle_def.mask
* some bits should be ignored, like UART clocks which are dynamically
switched inside sleep loop
These calls can be used e.g. inside cpuidle to decide which power states
core and mpu should enter during idle, as there are certain dependencies
between wakeup capabilities and reset logic.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/clockdomain.c | 27
arch/arm/mach-omap2/clockdomains.h| 54 +
arch/arm/mach-omap2/powerdomain.c | 25 +++
arch/arm/plat-omap/include/plat/clockdomain.h | 17
arch/arm/plat-omap/include/plat/powerdomain.h |1 +
5 files changed, 124 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c
b/arch/arm/mach-omap2/clockdomain.c
index dd285f0..f42111a 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -472,6 +472,33 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
return 0;
}
+
+/**
+ * omap2_clkdm_can_idle - check if clockdomain has any active clocks or not
+ * @clkdm: struct clockdomain *
+ *
+ * Checks if the clockdomain has any active clock or not, i.e. whether it
+ * can enter idle. Returns -EINVAL if clkdm is NULL; 0 if unable to idle;
+ * 1 if can idle.
+ */
+int omap2_clkdm_can_idle(struct clockdomain *clkdm)
+{
+ int i;
+
+ if (!clkdm)
+ return -EINVAL;
+
+ for (i = 0; i clkdm-clk_reg_amt; i++)
+ if (((~cm_read_mod_reg(clkdm-pwrdm.ptr-prcm_offs,
+ CM_IDLEST + 4 * i)
+ clkdm-idle_def[i].mask) |
+ cm_read_mod_reg(clkdm-pwrdm.ptr-prcm_offs,
+ CM_FCLKEN + 4 * i))
+ ~clkdm-idle_def[i].ignore)
+ return 0;
+ return 1;
+}
+
/**
* omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm
* @clkdm: struct clockdomain *
diff --git a/arch/arm/mach-omap2/clockdomains.h
b/arch/arm/mach-omap2/clockdomains.h
index c4ee076..2c1f2eb 100644
--- a/arch/arm/mach-omap2/clockdomains.h
+++ b/arch/arm/mach-omap2/clockdomains.h
@@ -167,6 +167,12 @@ static struct clockdomain iva2_clkdm = {
.flags = CLKDM_CAN_HWSUP_SWSUP,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .clk_reg_amt= 1,
+ .idle_def = {
+ [0] = {
+ .mask = 0x1,
+ },
+ },
};
static struct clockdomain gfx_3430es1_clkdm = {
@@ -183,6 +189,12 @@ static struct clockdomain sgx_clkdm = {
.flags = CLKDM_CAN_HWSUP_SWSUP,
.clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
+ .clk_reg_amt= 1,
+ .idle_def = {
+ [0] = {
+ .mask = 0x1,
+ },
+ },
};
/*
@@ -206,6 +218,23 @@ static struct clockdomain core_l3_34xx_clkdm = {
.flags = CLKDM_CAN_HWSUP,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .clk_reg_amt= 3,
+ .idle_def = {
+ [0] = {
+ .ignore = OMAP3430_ST_UART2_MASK |
+ OMAP3430_ST_UART1_MASK |
+ OMAP3430_ST_SDRC_MASK |
+ OMAP3430_ST_OMAPCTRL_MASK |
+ OMAP3430ES2_ST_HSOTGUSB_IDLE_MASK,
+ .mask = 0x,
+ },
+ [1] = {
+ .mask = 0x1f,
+ },
+ [2] = {
+ .mask = 0x4,
+ },
+ },
};
static struct clockdomain core_l4_34xx_clkdm = {
@@ -222,6 +251,12 @@ static struct clockdomain dss_34xx_clkdm = {
.flags = CLKDM_CAN_HWSUP_SWSUP,
.clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .clk_reg_amt= 1,
+ .idle_def = {
+ [0] = {
+ .mask = 0x1,
+ },
+ },
};
[PATCHv3 6/6] OMAP3: CPUidle: Added peripheral pwrdm checks into bm check
From: Tero Kristo tero.kri...@nokia.com
Following checks are made (and their reasoning):
- If CAM domain is active, prevent idle completely
* CAM pwrdm does not have HW wakeup capability
- If PER is likely to remain on, prevent PER off
* Saves on unnecessary context save/restore
- If CORE domain is active, prevent PER off-mode
* PER off in this case would prevent wakeups from PER completely
- Only allow CORE off, if all peripheral domains are off
* CORE off will cause a chipwide reset
Also, enabled CHECK_BM flag for C2, as this is needed for the camera case.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 118 ++--
1 files changed, 111 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 4a81ef1..dad64a9 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -58,7 +58,8 @@ struct omap3_processor_cx {
struct omap3_processor_cx omap3_power_states[OMAP3_MAX_STATES];
struct omap3_processor_cx current_cx_state;
-struct powerdomain *mpu_pd, *core_pd;
+struct powerdomain *mpu_pd, *core_pd, *per_pd, *iva2_pd;
+struct powerdomain *sgx_pd, *usb_pd, *cam_pd, *dss_pd;
/*
* The latencies/thresholds for various C states have
@@ -92,6 +93,22 @@ static int omap3_idle_bm_check(void)
}
/**
+ * pwrdm_get_idle_state - Get the power state a pwrdm will enter during idle
+ * @pwrdm: powerdomain to check state for
+ *
+ * Checks if the powerdomain can enter idle or not, if yes, will return
+ * the programmed target state for the domain. Otherwise will indicate
+ * that the domain will stay on.
+ * Returns the power state the pwrdm will enter.
+ */
+static int pwrdm_get_idle_state(struct powerdomain *pwrdm)
+{
+ if (pwrdm_can_idle(pwrdm))
+ return pwrdm_read_next_pwrst(pwrdm);
+ return PWRDM_POWER_ON;
+}
+
+/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
* @state: The target state to be programmed
@@ -153,14 +170,94 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
struct cpuidle_state *new_state = state;
-
- if ((state-flags CPUIDLE_FLAG_CHECK_BM) omap3_idle_bm_check()) {
- BUG_ON(!dev-safe_state);
- new_state = dev-safe_state;
+ u32 per_state = 0, saved_per_state = 0, cam_state, usb_state;
+ u32 iva2_state, sgx_state, dss_state, new_core_state;
+ struct omap3_processor_cx *cx;
+ int ret;
+
+ if (state-flags CPUIDLE_FLAG_CHECK_BM) {
+ if (omap3_idle_bm_check()) {
+ BUG_ON(!dev-safe_state);
+ new_state = dev-safe_state;
+ goto select_state;
+ }
+ cx = cpuidle_get_statedata(state);
+ new_core_state = cx-core_state;
+
+ /* Check if CORE is active, if yes, fallback to inactive */
+ if (!pwrdm_can_idle(core_pd))
+ new_core_state = PWRDM_POWER_INACTIVE;
+
+ /*
+* Prevent idle completely if CAM is active.
+* CAM does not have wakeup capability in OMAP3.
+*/
+ cam_state = pwrdm_get_idle_state(cam_pd);
+ if (cam_state == PWRDM_POWER_ON) {
+ new_state = dev-safe_state;
+ goto select_state;
+ }
+
+ /*
+* Check if PER can idle or not. If we are not likely
+* to idle, deny PER off. This prevents unnecessary
+* context save/restore.
+*/
+ saved_per_state = pwrdm_read_next_pwrst(per_pd);
+ if (pwrdm_can_idle(per_pd)) {
+ per_state = saved_per_state;
+ /*
+* Prevent PER off if CORE is active as this
+* would disable PER wakeups completely
+*/
+ if (per_state == PWRDM_POWER_OFF
+ new_core_state PWRDM_POWER_RET)
+ per_state = PWRDM_POWER_RET;
+
+ } else if (saved_per_state == PWRDM_POWER_OFF)
+ per_state = PWRDM_POWER_RET;
+
+ /*
+* If we are attempting CORE off, check if any other
+* powerdomains are at retention or higher. CORE off causes
+* chipwide reset which would reset these domains also.
+*/
+ if (new_core_state == PWRDM_POWER_OFF) {
+ dss_state = pwrdm_get_idle_state(dss_pd);
+ iva2_state = pwrdm_get_idle_state(iva2_pd);
+ sgx_state = pwrdm_get_idle_state(sgx_pd);
+ usb_state =
[PATCHv3 3/6] OMAP3: CPUidle: Fixed support for ON / INACTIVE states
From: Tero Kristo tero.kri...@nokia.com
New powerdomain code support for INACTIVE state removes the need to control
clockdomains directly from cpuidle. Also, cpuidle state definitions can now
directly support ON / INACTIVE simplifying the implementation.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/cpuidle34xx.c | 32
1 files changed, 4 insertions(+), 28 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c
b/arch/arm/mach-omap2/cpuidle34xx.c
index 1cfa5a6..4a81ef1 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -91,20 +91,6 @@ static int omap3_idle_bm_check(void)
return 0;
}
-static int _cpuidle_allow_idle(struct powerdomain *pwrdm,
- struct clockdomain *clkdm)
-{
- omap2_clkdm_allow_idle(clkdm);
- return 0;
-}
-
-static int _cpuidle_deny_idle(struct powerdomain *pwrdm,
- struct clockdomain *clkdm)
-{
- omap2_clkdm_deny_idle(clkdm);
- return 0;
-}
-
/**
* omap3_enter_idle - Programs OMAP3 to enter the specified state
* @dev: cpuidle device
@@ -141,19 +127,9 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
if (omap_irq_pending() || need_resched())
goto return_sleep_time;
- if (cx-type == OMAP3_STATE_C1) {
- pwrdm_for_each_clkdm(mpu_pd, _cpuidle_deny_idle);
- pwrdm_for_each_clkdm(core_pd, _cpuidle_deny_idle);
- }
-
/* Execute ARM wfi */
omap_sram_idle();
- if (cx-type == OMAP3_STATE_C1) {
- pwrdm_for_each_clkdm(mpu_pd, _cpuidle_allow_idle);
- pwrdm_for_each_clkdm(core_pd, _cpuidle_allow_idle);
- }
-
return_sleep_time:
getnstimeofday(ts_postidle);
ts_idle = timespec_sub(ts_postidle, ts_preidle);
@@ -246,8 +222,8 @@ void omap_init_power_states(void)
cpuidle_params_table[OMAP3_STATE_C2].wake_latency;
omap3_power_states[OMAP3_STATE_C2].threshold =
cpuidle_params_table[OMAP3_STATE_C2].threshold;
- omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_ON;
- omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_ON;
+ omap3_power_states[OMAP3_STATE_C2].mpu_state = PWRDM_POWER_INACTIVE;
+ omap3_power_states[OMAP3_STATE_C2].core_state = PWRDM_POWER_INACTIVE;
omap3_power_states[OMAP3_STATE_C2].flags = CPUIDLE_FLAG_TIME_VALID;
/* C3 . MPU CSWR + Core inactive */
@@ -261,7 +237,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C3].threshold =
cpuidle_params_table[OMAP3_STATE_C3].threshold;
omap3_power_states[OMAP3_STATE_C3].mpu_state = PWRDM_POWER_RET;
- omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_ON;
+ omap3_power_states[OMAP3_STATE_C3].core_state = PWRDM_POWER_INACTIVE;
omap3_power_states[OMAP3_STATE_C3].flags = CPUIDLE_FLAG_TIME_VALID |
CPUIDLE_FLAG_CHECK_BM;
@@ -276,7 +252,7 @@ void omap_init_power_states(void)
omap3_power_states[OMAP3_STATE_C4].threshold =
cpuidle_params_table[OMAP3_STATE_C4].threshold;
omap3_power_states[OMAP3_STATE_C4].mpu_state = PWRDM_POWER_OFF;
- omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_ON;
+ omap3_power_states[OMAP3_STATE_C4].core_state = PWRDM_POWER_INACTIVE;
omap3_power_states[OMAP3_STATE_C4].flags = CPUIDLE_FLAG_TIME_VALID |
CPUIDLE_FLAG_CHECK_BM;
--
1.5.4.3
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[PATCHv3 0/6] Idle status patches revisited again
From: Tero Kristo tero.kri...@nokia.com Improvements / fixes compared to previous version: - Added pwrdm next_state cache initialization to patch 1 - Fixed changelog for patch 1 - Added FCLK checks to patch 5 (now checks both idlest and fclk) - Added more info to changelog for patch 5 -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv3 4/6] OMAP3: PM: Removed pwrdm state hacking from omap_sram_idle
From: Tero Kristo tero.kri...@nokia.com
Following hacks will be moved inside cpuidle in subsequent patch:
- CAM domain prevents idle completely
- PER should not go OFF if core remains active
This simplifies the design and allows cpuidle to keep better track of which
power states system will actually enter.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/pm34xx.c | 18 ++
1 files changed, 2 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 7cc3293..549be95 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -93,7 +93,6 @@ static int (*_omap_save_secure_sram)(u32 *addr);
static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
static struct powerdomain *core_pwrdm, *per_pwrdm;
-static struct powerdomain *cam_pwrdm;
static struct prm_setup_vc prm_setup = {
.clksetup = 0xff,
@@ -373,7 +372,6 @@ void omap_sram_idle(void)
int core_next_state = PWRDM_POWER_ON;
int core_prev_state, per_prev_state;
u32 sdrc_pwr = 0;
- int per_state_modified = 0;
if (!_omap_sram_idle)
return;
@@ -411,20 +409,11 @@ void omap_sram_idle(void)
core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (per_next_state PWRDM_POWER_ON) {
omap2_gpio_prepare_for_idle(per_next_state);
- if (per_next_state == PWRDM_POWER_OFF) {
- if (core_next_state == PWRDM_POWER_ON) {
- per_next_state = PWRDM_POWER_RET;
- pwrdm_set_next_pwrst(per_pwrdm, per_next_state);
- per_state_modified = 1;
- } else
- omap3_per_save_context();
- }
+ if (per_next_state == PWRDM_POWER_OFF)
+ omap3_per_save_context();
omap_uart_prepare_idle(2);
}
- if (pwrdm_read_pwrst(cam_pwrdm) == PWRDM_POWER_ON)
- omap2_clkdm_deny_idle(mpu_pwrdm-pwrdm_clkdms[0]);
-
/*
* Disable smartreflex before entering WFI.
* Only needed if we are going to enter retention or off.
@@ -553,8 +542,6 @@ void omap_sram_idle(void)
}
omap2_gpio_resume_after_idle();
omap_uart_resume_idle(2);
- if (per_state_modified)
- pwrdm_set_next_pwrst(per_pwrdm, PWRDM_POWER_OFF);
}
/* Disable IO-PAD and IO-CHAIN wakeup */
@@ -1171,7 +1158,6 @@ static int __init omap3_pm_init(void)
neon_pwrdm = pwrdm_lookup(neon_pwrdm);
per_pwrdm = pwrdm_lookup(per_pwrdm);
core_pwrdm = pwrdm_lookup(core_pwrdm);
- cam_pwrdm = pwrdm_lookup(cam_pwrdm);
omap_push_sram_idle();
#ifdef CONFIG_SUSPEND
--
1.5.4.3
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Re: [PATCH 1/4] Add minimal support for DEVKIT8000
Hi,
On Thu, Jan 14, 2010 at 03:59:51PM +0100, ext Thomas Weber wrote:
I use Kims patches and I have done some work on it over the time and
after the comments from Felipe, so I want to submit them one more time.
and you resent the same patch without my comments sorted out
diff --git a/arch/arm/mach-omap2/board-omap3devkit8000.c
b/arch/arm/mach-omap2/board-omap3devkit8000.c
new file mode 100644
index 000..5f85dc6
--- /dev/null
+++ b/arch/arm/mach-omap2/board-omap3devkit8000.c
@@ -0,0 +1,616 @@
+/*
+ * linux/arch/arm/mach-omap2/board-omap3devkit8000.c
+ *
+ * Copyright (C) 2008 Texas Instruments
still this part wasn't addressed.
+static struct platform_device omap3devkit8000_nand_device = {
+.name= omap2-nand,
+.id= -1,
+.dev= {
+.platform_data= omap3devkit8000_nand_data,
+},
+.num_resources= 1,
+.resource= omap3devkit8000_nand_resource,
neither this...
+static struct gpio_led gpio_leds[] = {
+{
+.name= led1,
+.default_trigger= heartbeat,
+.gpio= 186,
+.active_low= true,
+},
+{
+.name= led2,
+.default_trigger= mmc0,
+.gpio= 163,
+.active_low= true,
+},
+{
+.name= ledB,
+.default_trigger= none,
+.gpio= 153,
+.active_low = true,
+},
+{
+.name= led3,
+.default_trigger= none,
+.gpio= 164,/* gets replaced */
nor this.
+static struct spi_board_info omap3devkit8000_spi_board_info[]
__initdata = {
+{
+.modalias= ads7846,
+.bus_num= 2,
+.chip_select= 0,
+.max_speed_hz= 150,
+.controller_data= ads7846_mcspi_config,
+.irq= OMAP_GPIO_IRQ(OMAP3_DEVKIT_TS_GPIO),
+.platform_data= ads7846_config,
+}
+};
+
+
nor this.
--
balbi
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[PATCHv3 1/6] OMAP: Powerdomains: Add support for INACTIVE state on pwrdm level
From: Tero Kristo tero.kri...@nokia.com
Currently only ON, RET and OFF are supported, and ON is arguably broken as it
allows the powerdomain to enter INACTIVE state unless idle is prevented.
Now, pwrdm code prevents idle if ON is selected, and also adds support for
INACTIVE. This simplifies the control needed inside sleep code.
This patch also requires caching of next power state inside powerdomain code,
as INACTIVE is not directly supported by hardware. Next powerstate is thus
now stored for each powerdomain in next_state.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
---
arch/arm/mach-omap2/powerdomain.c | 32
arch/arm/mach-omap2/powerdomains34xx.h| 26 ++--
arch/arm/plat-omap/include/plat/powerdomain.h |4 +++
3 files changed, 43 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 26b3f3e..a08d596 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -110,8 +110,8 @@ static struct powerdomain *_pwrdm_deps_lookup(struct
powerdomain *pwrdm,
static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
{
- int prev;
- int state;
+ u8 prev;
+ u8 state;
if (pwrdm == NULL)
return -EINVAL;
@@ -218,7 +218,9 @@ int pwrdm_register(struct powerdomain *pwrdm)
pr_debug(powerdomain: registered %s\n, pwrdm-name);
ret = 0;
-
+ pwrdm-next_state =
+ prm_read_mod_bits_shift(pwrdm-prcm_offs, PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
pr_unlock:
write_unlock_irqrestore(pwrdm_rwlock, flags);
@@ -699,19 +701,38 @@ int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
*/
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
{
+ u8 prg_pwrst;
+
if (!pwrdm)
return -EINVAL;
+ if (pwrdm-next_state == pwrst)
+ return 0;
+
if (!(pwrdm-pwrsts (1 pwrst)))
return -EINVAL;
pr_debug(powerdomain: setting next powerstate for %s to %0x\n,
pwrdm-name, pwrst);
+ /* INACTIVE is reserved, so we program pwrdm as ON */
+ if (pwrst == PWRDM_POWER_INACTIVE)
+ prg_pwrst = PWRDM_POWER_ON;
+ else
+ prg_pwrst = pwrst;
+
prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
-(pwrst OMAP_POWERSTATE_SHIFT),
+(prg_pwrst OMAP_POWERSTATE_SHIFT),
pwrdm-prcm_offs, PM_PWSTCTRL);
+ /* If next state is ON, prevent idle */
+ if (pwrst == PWRDM_POWER_ON)
+ omap2_clkdm_deny_idle(pwrdm-pwrdm_clkdms[0]);
+ else
+ omap2_clkdm_allow_idle(pwrdm-pwrdm_clkdms[0]);
+
+ pwrdm-next_state = pwrst;
+
return 0;
}
@@ -728,8 +749,7 @@ int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
if (!pwrdm)
return -EINVAL;
- return prm_read_mod_bits_shift(pwrdm-prcm_offs, PM_PWSTCTRL,
- OMAP_POWERSTATE_MASK);
+ return pwrdm-next_state;
}
/**
diff --git a/arch/arm/mach-omap2/powerdomains34xx.h
b/arch/arm/mach-omap2/powerdomains34xx.h
index 588f7e0..f50a3f2 100644
--- a/arch/arm/mach-omap2/powerdomains34xx.h
+++ b/arch/arm/mach-omap2/powerdomains34xx.h
@@ -165,7 +165,7 @@ static struct powerdomain iva2_pwrdm = {
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
.dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
.wkdep_srcs = iva2_wkdeps,
- .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts = PWRSTS_OFF_RET_INA_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.banks= 4,
.pwrsts_mem_ret = {
@@ -188,7 +188,7 @@ static struct powerdomain mpu_34xx_pwrdm = {
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
.dep_bit = OMAP3430_EN_MPU_SHIFT,
.wkdep_srcs = mpu_34xx_wkdeps,
- .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts = PWRSTS_OFF_RET_INA_ON,
.pwrsts_logic_ret = PWRSTS_OFF_RET,
.flags= PWRDM_HAS_MPU_QUIRK,
.banks= 1,
@@ -207,7 +207,7 @@ static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
CHIP_IS_OMAP3430ES2 |
CHIP_IS_OMAP3430ES3_0),
- .pwrsts = PWRSTS_OFF_RET_ON,
+ .pwrsts = PWRSTS_OFF_RET_INA_ON,
.dep_bit = OMAP3430_EN_CORE_SHIFT,
.banks= 2,
.pwrsts_mem_ret = {
@@ -215,8 +215,8 @@ static struct powerdomain core_34xx_pre_es3_1_pwrdm = {
[1] = PWRSTS_OFF_RET,/* MEM2RETSTATE */
},
.pwrsts_mem_on= {
- [0] =
Re: [PM-WIP-OPP][PATCH] OPP: Introduces enum for addressing different OPP types
Dasgupta, Romit had written, on 01/15/2010 04:42 AM, the following:
[..]
I like this message. I will include it.
:) I am getting this wrong feel that I should start writing novels ;).
[...]
now, I was recommending doing a, till a thought a little more on the
implementation(array based) and how long that implementation might
last(we might potentially move opp.c to a list implementation). the
effort would be to complicate the opp_init,add functions for a very
short lifetime. This effort maynot be worth it.
I understand your concern. I have made some changes in the code. Please look at
the reposted patch (in few mins from now I shall post them).
Thanks..
Enum type and variable have the same name :( mebbe a rename of variable is
appropriate
Not sure why you say this. Did you see the compiler throwing up any warning?
The usage later in the code is opp_t - this is a readability issue not
a compiler warning.
What is the readability issue? Why cant we declare something like enum opp_t
opp_t?
Let me try to explain this clearly. assume we have a struct opp_t (not
enum) for the time being.
void some_func(struct opp_t *opp_t)
{
struct opp_t *opp;
..
200 line of code (one page full)
/* point 1 */
BUG_ON(opp_t.xyz)
...
200 lines of more code
..
/* point 2 */
BUG_ON(opp.xyz)
...
}
lets say this is compiled by some non follower of this mail chain,
compiler throws an error for point 1: filex:liney
so the guy/gal fires up vim and opens the filex, goes to line y
he/she cannot see the start of the function, knows that there is a
struct opp_t
If a function is that big then the fault lies there to start with! What do you
say?
Nevertheless, your suggestion is cosmetic but I think we should not assume that
developers are so ignorant. For now I will do away with your suggestion. Please
feel free to change the code if you think what you say is the right thing.
Having spent a few years on properitory s/w and been one of those
confused blokes(I being a certified nitwit), I will try to see if I can
provide a patch on top and Kevin/community can choose to add their
comments/club the patches and make the few folks like me happy.
--
Regards,
Nishanth Menon
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[PM-WIP-OPP] [PATCH 0/2]: OPP layer changes (introducing enum for OPP types and returning NULL on failure from some OPP APIs)
Based on the discussion in the mailing list, I have taken some suggestions and am reposting the patch. In this two part patchset: a) the first patch introduces a new enum type for identifying different OPP types. This helps in encapsulating the actual pointers to the respective OPP lists inside the OPP layer itself. One can now interact with the OPP layer by passing the appropriate OPP enum type instead of the actual pointer to the OPP list. b) the second patch is for the OPP layer to return NULL pointer (instead of ERR_PTR) when the return type of the API is struct omap_opp * Signed-off-by: Romit Dasgupta ro...@ti.com --- arch/arm/mach-omap2/pm34xx.c | 15 -- arch/arm/mach-omap2/resource34xx.c| 86 ++-- arch/arm/mach-omap2/smartreflex.c | 33 +- arch/arm/plat-omap/common.c |6 - arch/arm/plat-omap/cpu-omap.c | 12 +- arch/arm/plat-omap/include/plat/opp.h | 58 +- arch/arm/plat-omap/omap-pm-noop.c |4 arch/arm/plat-omap/omap-pm-srf.c |4 arch/arm/plat-omap/opp.c | 127 9 files changed, 170 insertions(+), 175 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PM-WIP-OPP] [PATCH 1/2]: Introducing enum for OPP types
Using omap_opp * to refer to domain types restricts opp implementation
into maintaining pointers outside the opp layer. This causes issues such
as:
a) Describing cross domain dependencies (e.g. dsp vs mpu)
b) Ease of transitioning/supporting to multiple silicon variants and
families
c) Choice of varied options in implementing opp layer internals.
Since all we need a identifying a specific domain for query/operational
purposes, we introduce enum for identifying OPP types instead of using
opp layer's internal data structure pointer.
Currently, OMAP3 is the only silicon supporting the OPP layer, hence
mpu_opps, l3_opps and dsp_opps are deprecated and replaced with
OPP_MPU,
OPP_L3 and OPP_DSP respectively.
Signed-off-by: Romit Dasgupta ro...@ti.com
---
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 5c751c1..0930aef 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1347,7 +1347,6 @@ static void __init configure_vc(void)
void __init omap3_pm_init_opp_table(void)
{
- int i;
struct omap_opp_def **omap3_opp_def_list;
struct omap_opp_def *omap34xx_opp_def_list[] = {
omap34xx_mpu_rate_table,
@@ -1359,19 +1358,13 @@ void __init omap3_pm_init_opp_table(void)
omap36xx_l3_rate_table,
omap36xx_dsp_rate_table
};
- struct omap_opp **omap3_rate_tables[] = {
- mpu_opps,
- l3_opps,
- dsp_opps
- };
omap3_opp_def_list = cpu_is_omap3630() ? omap36xx_opp_def_list :
omap34xx_opp_def_list;
- for (i = 0; i ARRAY_SIZE(omap3_rate_tables); i++) {
- *omap3_rate_tables[i] = opp_init_list(omap3_opp_def_list[i]);
- /* We dont want half configured system at the moment */
- BUG_ON(IS_ERR(omap3_rate_tables[i]));
- }
+
+ BUG_ON(opp_init_list(OPP_MPU, omap3_opp_def_list[0]));
+ BUG_ON(opp_init_list(OPP_L3, omap3_opp_def_list[1]));
+ BUG_ON(opp_init_list(OPP_DSP, omap3_opp_def_list[2]));
}
static int __init omap3_pm_early_init(void)
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index 157b38e..5ec072e 100644
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -161,7 +161,7 @@ static DEFINE_MUTEX(dvfs_mutex);
/**
* opp_to_freq - convert OPPID to frequency (DEPRECATED)
* @freq: return frequency back to caller
- * @opps: opp list
+ * @opp_t: OPP type where we need to look.
* @opp_id: OPP ID we are searching for
*
* return 0 and freq is populated if we find the opp_id, else,
@@ -169,14 +169,14 @@ static DEFINE_MUTEX(dvfs_mutex);
*
* NOTE: this function is a standin for the timebeing as opp_id is deprecated
*/
-static int __deprecated opp_to_freq(unsigned long *freq,
- const struct omap_opp *opps, u8 opp_id)
+static int __deprecated opp_to_freq(unsigned long *freq, enum opp_t opp_t,
+u8 opp_id)
{
struct omap_opp *opp;
- BUG_ON(!freq || !opps);
+ BUG_ON(!freq || opp_t = OPP_TYPES_MAX);
- opp = opp_find_by_opp_id(opps, opp_id);
+ opp = opp_find_by_opp_id(opp_t, opp_id);
if (!opp)
return -EINVAL;
@@ -188,20 +188,20 @@ static int __deprecated opp_to_freq(unsigned long *freq,
/**
* freq_to_opp - convert a frequency back to OPP ID (DEPRECATED)
* @opp_id: opp ID returned back to caller
- * @opps: opp list
+ * @opp_t: OPP type where we need to look.
* @freq: frequency we are searching for
*
* return 0 and opp_id is populated if we find the freq, else, we return error
*
* NOTE: this function is a standin for the timebeing as opp_id is deprecated
*/
-static int __deprecated freq_to_opp(u8 *opp_id, struct omap_opp *opps,
+static int __deprecated freq_to_opp(u8 *opp_id, enum opp_t opp_t,
unsigned long freq)
{
struct omap_opp *opp;
- BUG_ON(!opp_id || !opps);
- opp = opp_find_freq_ceil(opps, freq);
+ BUG_ON(opp_t = OPP_TYPES_MAX);
+ opp = opp_find_freq_ceil(opp_t, freq);
if (IS_ERR(opp))
return -EINVAL;
*opp_id = opp_get_opp_id(opp);
@@ -218,9 +218,6 @@ void init_opp(struct shared_resource *resp)
u8 opp_id;
resp-no_of_users = 0;
- if (!mpu_opps || !dsp_opps || !l3_opps)
- return;
-
/* Initialize the current level of the OPP resource
* to the opp set by u-boot.
*/
@@ -228,14 +225,14 @@ void init_opp(struct shared_resource *resp)
vdd1_resp = resp;
dpll1_clk = clk_get(NULL, dpll1_ck);
dpll2_clk = clk_get(NULL, dpll2_ck);
- ret = freq_to_opp(opp_id, mpu_opps, dpll1_clk-rate);
+ ret = freq_to_opp(opp_id, OPP_MPU, dpll1_clk-rate);
BUG_ON(ret); /* TBD Cleanup handling */
curr_vdd1_opp =
[PM-WIP-OPP] [PATCH 2/2]: Change return value from ERR_PTR(..) to NULL in opp layer
Returning NULL pointer from the OPP APIs instead of ERR_PTR where
return struct omap_opp *. This is because there is no inherent value in
returning ERR_PTR from the opp layer. Returning NULL serves the purpose.
Signed-off-by: Romit Dasgupta ro...@ti.com
---
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index 5ec072e..9572062 100644
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -202,7 +202,7 @@ static int __deprecated freq_to_opp(u8 *opp_id, enum opp_t
opp_t,
BUG_ON(opp_t = OPP_TYPES_MAX);
opp = opp_find_freq_ceil(opp_t, freq);
- if (IS_ERR(opp))
+ if (!opp)
return -EINVAL;
*opp_id = opp_get_opp_id(opp);
return 0;
diff --git a/arch/arm/plat-omap/opp.c b/arch/arm/plat-omap/opp.c
index 8fd9366..7835b5d 100644
--- a/arch/arm/plat-omap/opp.c
+++ b/arch/arm/plat-omap/opp.c
@@ -129,7 +129,7 @@ struct omap_opp *opp_find_freq_exact(enum opp_t opp_t,
if (unlikely(opp_t = OPP_TYPES_MAX)) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = _opp_list[opp_t];
@@ -143,7 +143,7 @@ struct omap_opp *opp_find_freq_exact(enum opp_t opp_t,
oppl++;
}
- return OPP_TERM(oppl) ? ERR_PTR(-ENOENT) : oppl;
+ return OPP_TERM(oppl) ? NULL : oppl;
}
struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t, unsigned long *freq)
@@ -153,7 +153,7 @@ struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t,
unsigned long *freq)
if (unlikely(opp_t = OPP_TYPES_MAX || !freq ||
IS_ERR(freq))) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = _opp_list[opp_t];
@@ -169,7 +169,7 @@ struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t,
unsigned long *freq)
}
if (OPP_TERM(oppl))
- return ERR_PTR(-ENOENT);
+ return NULL;
*freq = oppl-rate;
@@ -183,7 +183,7 @@ struct omap_opp *opp_find_freq_floor(enum opp_t opp_t,
unsigned long *freq)
if (unlikely(opp_t = OPP_TYPES_MAX || !freq ||
IS_ERR(freq))) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = prev_opp = _opp_list[opp_t];
@@ -202,7 +202,7 @@ struct omap_opp *opp_find_freq_floor(enum opp_t opp_t,
unsigned long *freq)
}
if (prev_opp-rate *freq)
- return ERR_PTR(-ENOENT);
+ return NULL;
*freq = prev_opp-rate;
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Re: [PATCHv2 0/4] Regulator: OMAP: Removing common code for TWL4030 from OMAP3- board-evms
On Tue, Jan 12, 2010 at 02:43:45PM +0530, Anuj Aggarwal wrote: Anuj Aggarwal (4): Regulator: OMAP: Creating TWL4030 file having supplies init data I'd expect to see the header file here have ifdef guards and also include the headers it depends on (linux/regulator/machine.h at least) but both of those could be fixed up later. Otherwise it all looks OK from a regulator point of view Acked-by: Mark Brown broo...@opensource.wolfsonmicro.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 12/18] OMAP3 clock: split out DPLL3 M2 divider functions into clkt3xxx_dpll3m2.c
On Fri, Jan 15, 2010 at 02:07:04 -0700, Paul Walmsley wrote: Split the DPLL3 M2 divider clock functions out of clock34xx.c and move them into clkt3xxx_dpll3m2.c to improve maintainability. I'm not very familiar with maintainability issues of dpll3m2, so forgive me if it is ignorant for me to ask you to elaborate on this. It does look like a bit of an overkill to have a separate file for a divider. But again, I might well be missing the point. Regards, -- Alex -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/7] misc patches (for ioctl and ssi)
Hi Omar, On Tue, 2010-01-12 at 02:00 +0100, ext Omar Ramirez Luna wrote: Ioctl numbers has changed, this will require an update on libbridge and clients accesing directly to the driver - IO_ADDRESS is replaced for ioremap. *v3 - modified: DSPBRIDGE: replace IO_ADDRESS with ioremap, checking the result of ioremap (http://marc.info/?l=linux-omapm=126324914710445w=2). DSPBRIDGE: Use _IOxx macro to define ioctls (as per Nishanth comments) - new patch: DSPBRIDGE: remove WCD_Cmd structure *v2 - dropped from the series: DSPBRIDGE: Increased DMM size to 256MB DSPBRIDGE: sysfs entry for global driver state - will be kept in bridge-pm DSPBRIDGE: Use dspbridge to initialize platform data DSPBRIDGE: change to cpufreq_register_notifier for OPP changes DSPBRIDGE: Fix header locations mach to plat Where is the bridge-pm repository? I am trying to compile dspbridge branch with HEAD commit as: DSPBRIDGE: Use _IOxx macro to define ioctls. But compilation fails because of following missing commit: DSPBRIDGE: Fix header locations mach to plat Can you move this commit from bridge-pm to dspbridge so that dspbridge is in compilable state? Thanks! Cheers, Ameya. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/8] omap_hsmmc: RX51: set padconfs to pull down when powering off eMMC
Tony Lindgren wrote: * Tony Lindgren t...@atomide.com [100113 12:38]: * Tony Lindgren t...@atomide.com [100113 12:36]: You might want to check what happens in omap off-idle mode in these cases and see if enabling OMAP_PIN_OFF_INPUT_PULLDOWN makes any difference in power consumption in off state. That probably does not matter unless the floating lines cause the eMMC to do something on it's own :) Or OMAP_PIN_OFF_OUTPUT_LOW actually. One more time.. Most likely OMAP_PIN_OFF_INPUT_PULLDOWN is safer in general as the OMAP_PIN_OFF_OUTPUT_LOW does not work for all pins. According to the TRM, OMAP_PIN_OFF_OUTPUT_LOW only works for pins where at least one of the mux modes supports output mode. While eMMC is on, it is better if the lines are pulled up, irrespective of whether OMAP is OFF, just to keep to the MMC specification. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PM-WIP-OPP][PATCH] pm: omap3: fix build error for PM disabled
omap3_pm_init_opp_table should be under #ifdef CONFIG_PM
else build fails when PM is disabled. Reported by Paul originally.
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Reported-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/pm.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index d257225..5fc056f 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -69,7 +69,13 @@ static inline void omap3_pm_init_vc(struct prm_setup_vc
*setup_vc)
* Initialize the basic opp table here, board files could choose to modify opp
* table after the basic initialization
*/
+#ifdef CONFIG_PM
extern void omap3_pm_init_opp_table(void);
+#else
+static inline void omap3_pm_init_opp_table(void)
+{
+}
+#endif
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
--
1.6.3.3
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Re: [PM-WIP-OPP][PATCH] pm: omap3: fix build error for PM disabled
Romit Dasgupta wrote:
Nishanth Menon wrote:
omap3_pm_init_opp_table should be under #ifdef CONFIG_PM
else build fails when PM is disabled. Reported by Paul originally.
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Reported-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/pm.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index d257225..5fc056f 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -69,7 +69,13 @@ static inline void omap3_pm_init_vc(struct prm_setup_vc
*setup_vc)
* Initialize the basic opp table here, board files could choose to modify
opp
* table after the basic initialization
*/
+#ifdef CONFIG_PM
extern void omap3_pm_init_opp_table(void);
+#else
+static inline void omap3_pm_init_opp_table(void)
+{
+}
+#endif
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
This patch IMHO just solves the build issue. The runtime behaviour is a nasty
crash. OMAP architecture has tied CONFIG_PM with CONFIG_CPU_FREQ. So I think
we
need a fix that solves the runtime behavior too.
What I meant to say is that CONFIG_PM CONFIG_CPU_FREQ are independent. So this
is not correct.
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Re: [PM-WIP-OPP][PATCH] pm: omap3: fix build error for PM disabled
Dasgupta, Romit had written, on 01/15/2010 07:23 AM, the following:
Nishanth Menon wrote:
omap3_pm_init_opp_table should be under #ifdef CONFIG_PM
else build fails when PM is disabled. Reported by Paul originally.
Cc: Kevin Hilman khil...@deeprootsystems.com
Cc: Paul Walmsley p...@pwsan.com
Reported-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/pm.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index d257225..5fc056f 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -69,7 +69,13 @@ static inline void omap3_pm_init_vc(struct prm_setup_vc
*setup_vc)
* Initialize the basic opp table here, board files could choose to modify opp
* table after the basic initialization
*/
+#ifdef CONFIG_PM
extern void omap3_pm_init_opp_table(void);
+#else
+static inline void omap3_pm_init_opp_table(void)
+{
+}
+#endif
extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
This patch IMHO just solves the build issue. The runtime behaviour is a nasty
crash. OMAP architecture has tied CONFIG_PM with CONFIG_CPU_FREQ. So I think we
need a fix that solves the runtime behavior too.
hmm.. thanks for pointing it out (dropping the patch) - even though that
was not the reason for this patch - I had send this patch after booting
the kernel using omap3_pm_defconfig (disable PM) on SDP3630:
SDP3630: http://pastebin.mozilla.org/697292 - complete boot
SDP3430: http://pastebin.mozilla.org/697294 - hang
--
Regards,
Nishanth Menon
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Re: Enabling spidev in MCSPI1
On 01/13/2010 03:36 PM, Paul Walmsley wrote: Hi Philip, On Wed, 13 Jan 2010, Philip Balister wrote: I'm trying to enable spidev on mcspi1, but when I do, the kernel while booting after the kernel is uncompressed. No useful messages are displayed. This is with a current git. I've attached the diff I use to add the spi driver to the board file. (OVero + Summit). Maybe try enabling early printk support if you haven't already? http://www.mail-archive.com/linux-omap@vger.kernel.org/msg21017.html I think the early printk stuff was stopping me seeing the message Unfortunately, I found the conflicting driver, the 7846 touchscreen driver, and disabled it, so the kernel boots again. (Before I could boot with debugging messages enabled) I suspect the kernel should not crash if two drivers try to claim the spi device. If someone is interested, I can reanable the bad configuration and try to collect better data. Philip -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 4/4] OMAP: McBSP: Use cache when modifying individual register bits
Peter Ujfalusi wrote:
Hello,
Hi Peter,
I think there are some inconsistency in a way how for example the SPCR1 and
SPCR2 registers are used.
On Thursday 14 January 2010 18:13:36 ext Janusz Krzysztofik wrote:
Change the way McBSP registers are updated: use cached values instead of
relying upon those read back from the device.
With this patch, I have finally managed to get rid of all random
playback/recording hangups on my OMAP1510 based Amstrad Delta hardware.
Before that, values read back from McBSP registers to be used for updating
them happened to be errornous.
From the hardware side, the issue appeared to be caused by a relatively
high power requirements of an external USB adapter connected to the
board's printer dedicated USB port.
I think there is one important point that makes this patch worth of
applying, apart from my hardware quality. With the current code, if it
ever happens to any machine, no matter if OMAP1510 or newer, to read
incorrect value from a McBSP register, this wrong value will get written
back without any checking. That can lead to hardware damage if, for
example, an input pin is turned into output as a result.
Applies on top of patch 3 from this series:
[PATCH v9 3/4] OMAP: McBSP: Introduce caching in register write operations
Tested on OMAP1510 based Amstrad Delta using linux-omap for-next, commit
fb7380d70e041e4b3892f6b19dff7efb609d15a4 (2.6.33-rc3+ dated 2010-01-11).
Compile-tested with omap_3430sdp_defconfig.
Signed-off-by: Janusz Krzysztofik jkrzy...@tis.icnet.pl
---
No functional changes since v3.
arch/arm/plat-omap/mcbsp.c | 78
+++-- 1 file changed, 47
insertions(+), 31 deletions(-)
--- git/arch/arm/plat-omap/mcbsp.c.orig 2010-01-14 00:36:14.0 +0100
+++ git/arch/arm/plat-omap/mcbsp.c 2010-01-14 02:05:23.0 +0100
@@ -114,7 +114,8 @@ static irqreturn_t omap_mcbsp_tx_irq_han
dev_err(mcbsp_tx-dev, TX Frame Sync Error! : 0x%x\n,
irqst_spcr2);
/* Writing zero to XSYNC_ERR clears the IRQ */
- MCBSP_WRITE(mcbsp_tx, SPCR2, irqst_spcr2 ~(XSYNC_ERR));
+ MCBSP_WRITE(mcbsp_tx, SPCR2,
+ MCBSP_READ_CACHE(mcbsp_tx, SPCR2) ~(XSYNC_ERR));
The reg_cache will never have the XSYNC_ERR, or any other flags set, since these
flags has never written to the reg_cache.
So it is kind of not necessary to clear the flag, which is actually always 0.
Agree.
Another thing is that as far as I understand the reason behind of this series is
that you have a problem, that you can not trust on the values that you read from
the McBSP registers, if this is true, than the problem can occur when the above
path has been taken:
...
irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
...
if (irqst_spcr2 XSYNC_ERR) {
But since you read from McBSP registers much rarely, than probably the
corruption is not that visible?
Sure no software solution can correct my hardware issue in case of
register bits manintained by the hardware itself. Well, maybe software
that limits heat dissipation by lowering overal power consumption could
do to some extent ;).
What I'm going to address here is only a case when writing back possibly
corrupted bits can be avoided if correct values are well known and
can be determined without reading them back from the register itself.
Anyway, clearing the status/error flags are not necessary, since the reg_cache
will never got these bits set, you could just write back the SPCR2/SPCR1
register content from the cache as it is...
} else {
complete(mcbsp_tx-tx_irq_completion);
}
@@ -134,7 +135,8 @@ static irqreturn_t omap_mcbsp_rx_irq_han
dev_err(mcbsp_rx-dev, RX Frame Sync Error! : 0x%x\n,
irqst_spcr1);
/* Writing zero to RSYNC_ERR clears the IRQ */
- MCBSP_WRITE(mcbsp_rx, SPCR1, irqst_spcr1 ~(RSYNC_ERR));
+ MCBSP_WRITE(mcbsp_rx, SPCR1,
+ MCBSP_READ_CACHE(mcbsp_rx, SPCR1) ~(RSYNC_ERR));
Same here.
...
@@ -653,7 +657,7 @@ int omap_mcbsp_pollwrite(unsigned int id
if (MCBSP_READ(mcbsp, SPCR2) XSYNC_ERR) {
/* clear error */
MCBSP_WRITE(mcbsp, SPCR2,
- MCBSP_READ(mcbsp, SPCR2) (~XSYNC_ERR));
+ MCBSP_READ_CACHE(mcbsp, SPCR2) (~XSYNC_ERR));
Well, I think here also, the reg_cache does not have the XSYNC_ERR set, it is
only set in the McBSP register.
/* resend */
return -1;
} else {
@@ -662,10 +666,12 @@ int omap_mcbsp_pollwrite(unsigned int id
while (!(MCBSP_READ(mcbsp, SPCR2) XRDY)) {
if (attemps++ 1000) {
MCBSP_WRITE(mcbsp, SPCR2,
- MCBSP_READ(mcbsp, SPCR2) (~XRST));
+
Re: [PATCH 2/3] OMAP: hwmod: add read/write API for SYSCONFIG
On Thu, 14 Jan 2010, Kevin Hilman wrote: Turns out I needed more than just smart-idle enable/disable. There are UART errata that also require force-idle (when DMA is in use.) So, instead I added an API for simply setting slave idle mode (patch below.) Thanks Kevin, queued for 2.6.34. - Paul -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [alsa-devel] Audio suspend/resume status on OMAP3 based platforms
I want to check the status of suspend/resume functionality when audio subsystem is being used. Specifically, has some one tried the following tests on their omap3 based platforms: a) echo mem /sys/power/state, when audio playback is running in background b) same command, when audio capture is running in background b) same command, when audio loopback is running in background I am facing some issues with (b) (c) so wanted to confirm whether someone else has faced similar problem or not. As Jarkko pointed out in a separate mail, we should not expect the suspend/resume to be working correctly until the context save/restore, and the clock management is sorted out. On the other hand it seams that the problem is in the capture path (b and c having issues). How is the McBSP configured in your setup (master or slave)? [Aggarwal, Anuj] TWL4030 is master and McBSP is slave. I think we might have different issues with suspend/resume when OMAP McBSP is slave or if it is master. Few (+)updates from my side: a) Capture not working after suspend/resume: After taking a dump of mcbsp, DMA and codec registers and comparing them, I found out that DMA.CCR[Enable] and DMA.CSR[Sync] bits were set when system was coming out of suspend. I don't understand why these two bits are not set in case of playback running in backgnd but when I forcefully clear them in omap_pcm_trigger() fn under SNDRV_PCM_TRIGGER_RESUME, my problem goes away. Now I am able to do suspend/resume successfully while capture is running in bg without getting the Input/output error. b) McBSP registers being accessed from omap_pcm_trigger(): When audio playback is running in background and I try suspend, I saw mcbsp registers getting read/written by omap_pcm_trigger() through dma_data-set_threshold(). This happens when soc_pcm_trigger() calls platform-pcm_ops-trigger before cpu_dai-ops-trigger and the clocks are getting enabled only in cpu_dai-trigger. Because of this, I found one warning coming through but this needs a fix. c) System hangs when audio loopback is going on in background: Finally, I was able to narrow down the problem. After the mcbsp clocks are cut for playback stream, when suspend gets called for capture, mcbsp is stopped inside omap_mcbsp_dai_trigger-SNDRV_PCM_TRIGGER_PAUSE_PUSH, before disabling the clocks. This resulted in hang and the system doesn't come out of snd_pcm_suspend_all() which I reported in my previous email. I modified the clock disabling routine and averted the hang. Now the problem is with the mcbsp/DMA configuration as I am not able to resume the loopback fully (1 in 5 times only it works) and receive this error: ALSA sound/core/pcm_lib.c:1708: playback write error (DMA or IRQ trouble?) After this, the application exits gracefully. On further debugging, I realized that mcbsp is not getting configured properly on either the playback or capture stream, while resuming. Hence the error. I think this problem can go if I apply the mcbsp-register-cache patches but I have to try that before I can come to a conclusion. I have (dirty) fixes for (a) and (b) which, on cleaning, I would be sending for reviews. Thanks for the suggestions/pointers. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PM-WIP-OPP] [PATCH 2/2]: Change return value from ERR_PTR(..) to NULL in opp layer
Romit Dasgupta ro...@ti.com writes:
Returning NULL pointer from the OPP APIs instead of ERR_PTR where
return struct omap_opp *. This is because there is no inherent value in
returning ERR_PTR from the opp layer. Returning NULL serves the purpose.
NAK.
Using ERR_PTR allows returning different types of error conditions,
and is common practice across the kernel.
Kevin
Signed-off-by: Romit Dasgupta ro...@ti.com
---
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index 5ec072e..9572062 100644
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -202,7 +202,7 @@ static int __deprecated freq_to_opp(u8 *opp_id, enum
opp_t opp_t,
BUG_ON(opp_t = OPP_TYPES_MAX);
opp = opp_find_freq_ceil(opp_t, freq);
- if (IS_ERR(opp))
+ if (!opp)
return -EINVAL;
*opp_id = opp_get_opp_id(opp);
return 0;
diff --git a/arch/arm/plat-omap/opp.c b/arch/arm/plat-omap/opp.c
index 8fd9366..7835b5d 100644
--- a/arch/arm/plat-omap/opp.c
+++ b/arch/arm/plat-omap/opp.c
@@ -129,7 +129,7 @@ struct omap_opp *opp_find_freq_exact(enum opp_t opp_t,
if (unlikely(opp_t = OPP_TYPES_MAX)) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = _opp_list[opp_t];
@@ -143,7 +143,7 @@ struct omap_opp *opp_find_freq_exact(enum opp_t opp_t,
oppl++;
}
- return OPP_TERM(oppl) ? ERR_PTR(-ENOENT) : oppl;
+ return OPP_TERM(oppl) ? NULL : oppl;
}
struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t, unsigned long *freq)
@@ -153,7 +153,7 @@ struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t,
unsigned long *freq)
if (unlikely(opp_t = OPP_TYPES_MAX || !freq ||
IS_ERR(freq))) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = _opp_list[opp_t];
@@ -169,7 +169,7 @@ struct omap_opp *opp_find_freq_ceil(enum opp_t opp_t,
unsigned long *freq)
}
if (OPP_TERM(oppl))
- return ERR_PTR(-ENOENT);
+ return NULL;
*freq = oppl-rate;
@@ -183,7 +183,7 @@ struct omap_opp *opp_find_freq_floor(enum opp_t opp_t,
unsigned long *freq)
if (unlikely(opp_t = OPP_TYPES_MAX || !freq ||
IS_ERR(freq))) {
pr_err(%s: Invalid parameters being passed\n, __func__);
- return ERR_PTR(-EINVAL);
+ return NULL;
}
oppl = prev_opp = _opp_list[opp_t];
@@ -202,7 +202,7 @@ struct omap_opp *opp_find_freq_floor(enum opp_t opp_t,
unsigned long *freq)
}
if (prev_opp-rate *freq)
- return ERR_PTR(-ENOENT);
+ return NULL;
*freq = prev_opp-rate;
--
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Re: [PATCH 00/13] OMAP PM fixes for 2.6.33-rc
On Fri, 2010-01-08 at 09:59 -0800, Kevin Hilman wrote: Here's a set of fixes from the OMAP PM brach intended for 2.6.33-rc. This series applies on top Tony's omap-fixes-for-linus branch. They can be also viewed/pulled from: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git pm-fixes Tony, In addition to adding patches 14 15, I've rebased this after your latest update to -rc4. My pm-fixes branch is now based on your current omap-fixes branch. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: issue with panel drivers in DSS2
On Fri, Jan 15, 2010 at 12:07 PM, Tomi Valkeinen tomi.valkei...@nokia.com wrote: On Thu, 2010-01-14 at 21:59 +0100, ext Grazvydas Ignotas wrote: Hi, there is an issue related to panel drivers: even if panel driver provides get_rotate/set_rotate and/or get_mirror/set_mirror functions, those cannot be accessed over sysfs, even though corresponding entries are created in omapdss/displayX. This is because panel driver fills omap_dss_driver structure, but sysfs entries are created for omap_dss_device when it probes. So perhaps those pointers need to be copied from omap_dss_driver to omap_dss_device somewhere in dss_driver_probe(). If you look at dsi.c, you'll see how it currently works. So it's the job of the interface (dpi, sdi, rfbi or dsi) to act as a intermediary, and call the functions in the driver. Rotate and mirror aren't implemented in dpi and sdi, as I don't know any displays that could use them. But if there are such displays, dpi.c can either just copy the driver's function in to the device struct, or implement an intermediary function of its own. Pandora's TPO display supports mirroring (vertical and horizontal), and also several resolutions. It would be nice to have this functionality accessible somehow. That said, I'm actually in the process of changing the driver/device model a bit. My aim is that all the calls (from omapfb, sysfs etc) go directly to the driver code, which then will call necessary functions in the dss to accomplish its goal. It was foolish of me to design the model the way it's now, but my reasoning was that all the displays of certain type must be very similar, and thus it's easier for everyone if the dss driver is in control. I coulnd't have been more wrong =). Especially the more complex DSI peripherals are unique, and the only solution is to let the driver be in total control. But more of that later, when I have something working. Good luck then, I should be able to do some testing as needed. Tomi -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: USB: Add empty functions in otg.h
On Tue, Jan 05, 2010 at 02:16:58PM +0530, Maulik Mankad wrote: USB : Add empty functions in otg.h Add empty functions for usb_nop_xceiv_register() and usb_nop_xceiv_unregister() in otg.h so that these functions can be called even when CONFIG_NOP_USB_XCEIV is not enabled. It allows to remove ifdef's from board file. Signed-off-by: Maulik Mankad x0082...@ti.com Cc: Tony Lindgren t...@atomide.com Signed-off-by: Felipe Balbi felipe.ba...@nokia.com Acked-by: Olof Johansson o...@lixom.net Cc: Sergei Shtylyov sshtyl...@ru.mvista.com Cc: Gupta, Ajay Kumar ajay.gu...@ti.com Signed-off-by: Greg Kroah-Hartman gre...@suse.de Oops, no, I'm rejecting this, as it breaks the build: CC [M] drivers/usb/otg/nop-usb-xceiv.o drivers/usb/otg/nop-usb-xceiv.c:41: error: redefinition of ‘usb_nop_xceiv_register’ include/linux/usb/otg.h:132: error: previous definition of ‘usb_nop_xceiv_register’ was here drivers/usb/otg/nop-usb-xceiv.c:53: error: redefinition of ‘usb_nop_xceiv_unregister’ include/linux/usb/otg.h:136: error: previous definition of ‘usb_nop_xceiv_unregister’ was here make[2]: *** [drivers/usb/otg/nop-usb-xceiv.o] Error 1 make[1]: *** [drivers/usb/otg] Error 2 make[1]: *** Waiting for unfinished jobs Doesn't anyone build their patches anymore? Kids these days... thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
patch arm-defconfig-rx51-enable-phonet-and-g_nokia.patch added to gregkh-2.6 tree
This is a note to let you know that I've just added the patch titled Subject: arm: defconfig: rx51: enable phonet and g_nokia to my gregkh-2.6 tree. Its filename is arm-defconfig-rx51-enable-phonet-and-g_nokia.patch This tree can be found at http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/patches/ From felipe.ba...@nokia.com Fri Jan 15 10:59:45 2010 From: Felipe Balbi felipe.ba...@nokia.com Date: Tue, 5 Jan 2010 16:10:14 +0200 Subject: arm: defconfig: rx51: enable phonet and g_nokia To: linux-...@vger.kernel.org Cc: Linux OMAP Mailing List linux-omap@vger.kernel.org, Tony Lindgren t...@atomide.com, Greg KH g...@kroah.com, Felipe Balbi felipe.ba...@nokia.com Message-ID: 1262700614-16438-2-git-send-email-felipe.ba...@nokia.com trivial patch enabling g_nokia on rx51_defconfig. Signed-off-by: Felipe Balbi felipe.ba...@nokia.com Signed-off-by: Greg Kroah-Hartman gre...@suse.de --- arch/arm/configs/rx51_defconfig | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) --- a/arch/arm/configs/rx51_defconfig +++ b/arch/arm/configs/rx51_defconfig @@ -445,6 +445,8 @@ CONFIG_IP_NF_FILTER=m # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set +CONFIG_PHONET=y +# CONFIG_IEEE802154 is not set # CONFIG_NET_SCHED is not set # CONFIG_DCB is not set @@ -1325,27 +1327,34 @@ CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_LH7A40X is not set # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set # CONFIG_USB_GADGET_PXA27X is not set -# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set # CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set # CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_AMD5536UDC is not set # CONFIG_USB_GADGET_FSL_QE is not set # CONFIG_USB_GADGET_CI13XXX is not set # CONFIG_USB_GADGET_NET2280 is not set # CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set CONFIG_USB_GADGET_DUALSPEED=y CONFIG_USB_ZERO=m # CONFIG_USB_ZERO_HNPTEST is not set +# CONFIG_USB_AUDIO is not set # CONFIG_USB_ETH is not set # CONFIG_USB_GADGETFS is not set CONFIG_USB_FILE_STORAGE=m # CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_MASS_STORAGE is not set # CONFIG_USB_G_SERIAL is not set # CONFIG_USB_MIDI_GADGET is not set # CONFIG_USB_G_PRINTER is not set # CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_USB_G_NOKIA=m +# CONFIG_USB_G_MULTI is not set # # OTG and related infrastructure -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
patch usb-gadget-introduce-g_nokia-gadget-driver.patch added to gregkh-2.6 tree
This is a note to let you know that I've just added the patch titled
Subject: USB: gadget: introduce g_nokia gadget driver
to my gregkh-2.6 tree. Its filename is
usb-gadget-introduce-g_nokia-gadget-driver.patch
This tree can be found at
http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/patches/
From felipe.ba...@nokia.com Fri Jan 15 10:59:19 2010
From: Felipe Balbi felipe.ba...@nokia.com
Date: Tue, 5 Jan 2010 16:10:13 +0200
Subject: USB: gadget: introduce g_nokia gadget driver
To: linux-...@vger.kernel.org
Cc: Linux OMAP Mailing List linux-omap@vger.kernel.org, Tony Lindgren
t...@atomide.com, Greg KH g...@kroah.com, Felipe Balbi
felipe.ba...@nokia.com
Message-ID: 1262700614-16438-1-git-send-email-felipe.ba...@nokia.com
g_nokia is the gadget driver implementing
WMCDC Wireless Handset Control Model for the N900
device.
Signed-off-by: Felipe Balbi felipe.ba...@nokia.com
Signed-off-by: Greg Kroah-Hartman gre...@suse.de
---
drivers/usb/gadget/Kconfig | 10 +
drivers/usb/gadget/Makefile |2
drivers/usb/gadget/nokia.c | 259
3 files changed, 271 insertions(+)
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -812,6 +812,16 @@ config USB_CDC_COMPOSITE
Say y to link the driver statically, or m to build a
dynamically linked module.
+config USB_G_NOKIA
+ tristate Nokia composite gadget
+ depends on PHONET
+ help
+ The Nokia composite gadget provides support for acm, obex
+ and phonet in only one composite gadget driver.
+
+ It's only really useful for N900 hardware. If you're building
+ a kernel for N900, say Y or M here. If unsure, say N.
+
config USB_G_MULTI
tristate Multifunction Composite Gadget (EXPERIMENTAL)
depends on BLOCK NET
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -43,6 +43,7 @@ g_mass_storage-objs := mass_storage.o
g_printer-objs := printer.o
g_cdc-objs := cdc2.o
g_multi-objs := multi.o
+g_nokia-objs := nokia.o
obj-$(CONFIG_USB_ZERO) += g_zero.o
obj-$(CONFIG_USB_AUDIO)+= g_audio.o
@@ -55,4 +56,5 @@ obj-$(CONFIG_USB_G_PRINTER) += g_printer
obj-$(CONFIG_USB_MIDI_GADGET) += g_midi.o
obj-$(CONFIG_USB_CDC_COMPOSITE) += g_cdc.o
obj-$(CONFIG_USB_G_MULTI) += g_multi.o
+obj-$(CONFIG_USB_G_NOKIA) += g_nokia.o
--- /dev/null
+++ b/drivers/usb/gadget/nokia.c
@@ -0,0 +1,259 @@
+/*
+ * nokia.c -- Nokia Composite Gadget Driver
+ *
+ * Copyright (C) 2008-2010 Nokia Corporation
+ * Contact: Felipe Balbi felipe.ba...@nokia.com
+ *
+ * This gadget driver borrows from serial.c which is:
+ *
+ * Copyright (C) 2003 Al Borchers (alborch...@steinerpoint.com)
+ * Copyright (C) 2008 by David Brownell
+ * Copyright (C) 2008 by Nokia Corporation
+ *
+ * This software is distributed under the terms of the GNU General
+ * Public License (GPL) as published by the Free Software Foundation,
+ * version 2 of that License.
+ */
+
+#include linux/kernel.h
+#include linux/utsname.h
+#include linux/device.h
+
+#include u_serial.h
+#include u_ether.h
+#include u_phonet.h
+#include gadget_chips.h
+
+/* Defines */
+
+#define NOKIA_VERSION_NUM 0x0211
+#define NOKIA_LONG_NAMEN900 (PC-Suite Mode)
+
+/*-*/
+
+/*
+ * Kbuild is not very cooperative with respect to linking separately
+ * compiled library objects into one module. So for now we won't use
+ * separate compilation ... ensuring init/exit sections work to shrink
+ * the runtime footprint, and giving us at least some parts of what
+ * a gcc --combine ... part1.c part2.c part3.c ... build would.
+ */
+#include composite.c
+#include usbstring.c
+#include config.c
+#include epautoconf.c
+
+#include u_serial.c
+#include f_acm.c
+#include f_ecm.c
+#include f_obex.c
+#include f_serial.c
+#include f_phonet.c
+#include u_ether.c
+
+/*-*/
+
+#define NOKIA_VENDOR_ID0x0421 /* Nokia */
+#define NOKIA_PRODUCT_ID 0x01c8 /* Nokia Gadget */
+
+/* string IDs are assigned dynamically */
+
+#define STRING_MANUFACTURER_IDX0
+#define STRING_PRODUCT_IDX 1
+#define STRING_DESCRIPTION_IDX 2
+
+static char manufacturer_nokia[] = Nokia;
+static const char product_nokia[] = NOKIA_LONG_NAME;
+static const char description_nokia[] = PC-Suite Configuration;
+
+static struct usb_string strings_dev[] = {
+ [STRING_MANUFACTURER_IDX].s = manufacturer_nokia,
+ [STRING_PRODUCT_IDX].s = NOKIA_LONG_NAME,
+ [STRING_DESCRIPTION_IDX].s = description_nokia,
+ { } /* end of list */
+};
+
+static struct usb_gadget_strings stringtab_dev = {
+ .language = 0x0409, /* en-us */
+
Re: [PATCH v3 2/2] ARM : OMAP : Remove #ifdef from board-omap3evm.c
On Tue, Jan 05, 2010 at 12:56:04PM +0200, Felipe Balbi wrote: On Tue, Jan 05, 2010 at 09:49:32AM +0100, ext Maulik Mankad wrote: ARM : OMAP : Remove #ifdef from board-omap3evm.c Remove #ifdef around usb_nop_xceiv_register() from board-omap3evm.c Signed-off-by: Maulik Mankad x0082...@ti.com Cc: Tony Lindgren t...@atomide.com Acked-by: Felipe Balbi felipe.ba...@nokia.com Tony, let's wait for Greg's Ack to the previous patch, but if everything is Fine, you can take this one on for-next. I can take it as I took the one that this depended on. Or both can go through Tony's tree, I don't care :) If so, please add: Acked-by: Greg Kroah-Hartman gre...@suse.de to the patches. thanks, greg k-h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 02/10] DSPBRIDGE: contributors file
This creates a new contributors file under Documentation/tidspbridge to acknowledge all the people working in DSP/Bridge project. Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com --- Documentation/tidspbridge/CONTRIBUTORS | 70 1 files changed, 70 insertions(+), 0 deletions(-) create mode 100644 Documentation/tidspbridge/CONTRIBUTORS diff --git a/Documentation/tidspbridge/CONTRIBUTORS b/Documentation/tidspbridge/CONTRIBUTORS new file mode 100644 index 000..d3977ad --- /dev/null +++ b/Documentation/tidspbridge/CONTRIBUTORS @@ -0,0 +1,70 @@ +TI DSP/Bridge Driver - Contributors File + +The DSP/Bridge project wish to thank all of its contributors, current bridge +driver is the result of the work of all of them. If any name is accidentally +omitted, let us know by sending a mail to omar.rami...@ti.com or +x095...@ti.com. + +Please keep the following list in alphabetical order. + + Suman Anna + Felipe Balbi + Phil Carmody + Felipe Contreras + Hiroshi Doyu + Seth Forshee + Mark Grosen + Ramesh Gupta G + Fernando Guzman Lugo + Axel Haslam + Janet Head + Hari Kanigeri + Tony Lindgren + Antonio Luna + Hari Nagalla + Ameya Palande + Gilbert Pitney + Omar Ramirez Luna + Ernesto Ramos + Chris Ring + Rebecca Schultz Zavin + Andy Shevchenko + Roman Tereshonkov + Armando Uribe de Leon + Nischal Varide + Wenbiao Wang + +The following list was taken from file Revision History, if you recognize your +alias or did any contribution to the project please let us now, so we can +proper credit your work. + + ag + ap + cc + db + dh4 + dr + hp + jg + kc + kln + kw + ge + gv + map + mf + mk + mr + nn + rajesh + rg + rr + rt + sb + sg + sh + sp + srid + swa + vp + ww -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/10] DSPBRIDGE: checkpatch - printk() should include KERN_ facility level
WARNING: printk() should include KERN_ facility level Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com --- arch/arm/plat-omap/include/dspbridge/dbc.h |2 +- arch/arm/plat-omap/include/dspbridge/gt.h |2 +- drivers/dsp/bridge/gen/_gt_para.c |2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/plat-omap/include/dspbridge/dbc.h b/arch/arm/plat-omap/include/dspbridge/dbc.h index e9cb548..ac5d178 100644 --- a/arch/arm/plat-omap/include/dspbridge/dbc.h +++ b/arch/arm/plat-omap/include/dspbridge/dbc.h @@ -36,7 +36,7 @@ #define DBC_Assert(exp) \ if (!(exp)) \ - printk(%s, line %d: Assertion ( #exp ) failed.\n, \ + pr_err(%s, line %d: Assertion ( #exp ) failed.\n, \ __FILE__, __LINE__) #define DBC_Require DBC_Assert /* Function Precondition. */ #define DBC_Ensure DBC_Assert /* Function Postcondition. */ diff --git a/arch/arm/plat-omap/include/dspbridge/gt.h b/arch/arm/plat-omap/include/dspbridge/gt.h index b43b1e7..6082d15 100644 --- a/arch/arm/plat-omap/include/dspbridge/gt.h +++ b/arch/arm/plat-omap/include/dspbridge/gt.h @@ -232,7 +232,7 @@ extern struct GT_Config _GT_params; #define GT_assert(mask, expr) \ (!(expr) ? \ - printk(assertion violation: %s, line %d\n, \ + pr_err(assertion violation: %s, line %d\n, \ __FILE__, __LINE__), NULL : NULL) #define GT_config(config) (_GT_params = *(config)) diff --git a/drivers/dsp/bridge/gen/_gt_para.c b/drivers/dsp/bridge/gen/_gt_para.c index 9f8246b..f676d3f 100644 --- a/drivers/dsp/bridge/gen/_gt_para.c +++ b/drivers/dsp/bridge/gen/_gt_para.c @@ -77,7 +77,7 @@ static void error(char *fmt, ...) va_end(va); - printk(ERROR: ); + pr_err(ERROR: ); printk(fmt, arg1, arg2, arg3, arg4, arg5, arg6); #if defined(DEBUG) || defined(DDSP_DEBUG_PRODUCT) -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/10] trivial cleanups
This is a small set of trivial cleanups piled up in the patch queue. Higlights: - New patch with contributors file. - Fix multiline macros to use do while patch is dropped for rework. Omar Ramirez Luna (10): DSPBRIDGE: trivial license fix in tramp and tramp_table_c6000 DSPBRIDGE: contributors file DSPBRIDGE: trivial file history cleanup for headers DSPBRIDGE: trivial file history cleanup for driver sources DSPBRIDGE: checkpatch - space required after comma DSPBRIDGE: checkpatch - space required before open parenthesis DSPBRIDGE: checkpatch spacing and indentation DSPBRIDGE: Checkpatch - line over 80 characters DSPBRIDGE: checkpatch - printk() should include KERN_ facility level DSPBRIDGE: trivial cleanup for io_sm Documentation/tidspbridge/CONTRIBUTORS| 70 ++ arch/arm/plat-omap/include/dspbridge/_chnl_sm.h | 46 +- arch/arm/plat-omap/include/dspbridge/_dcd.h | 40 +- arch/arm/plat-omap/include/dspbridge/brddefs.h| 18 +- arch/arm/plat-omap/include/dspbridge/cfg.h| 50 +-- arch/arm/plat-omap/include/dspbridge/cfgdefs.h| 27 +- arch/arm/plat-omap/include/dspbridge/chnl.h | 45 +- arch/arm/plat-omap/include/dspbridge/chnl_sm.h| 30 +- arch/arm/plat-omap/include/dspbridge/chnldefs.h | 26 +- arch/arm/plat-omap/include/dspbridge/chnlpriv.h | 33 +- arch/arm/plat-omap/include/dspbridge/clk.h| 11 +- arch/arm/plat-omap/include/dspbridge/cmm.h| 66 +-- arch/arm/plat-omap/include/dspbridge/cmmdefs.h| 20 +- arch/arm/plat-omap/include/dspbridge/cod.h| 58 +-- arch/arm/plat-omap/include/dspbridge/dbc.h| 32 +- arch/arm/plat-omap/include/dspbridge/dbdcd.h | 26 +- arch/arm/plat-omap/include/dspbridge/dbdcddef.h | 27 +- arch/arm/plat-omap/include/dspbridge/dbdefs.h | 61 +-- arch/arm/plat-omap/include/dspbridge/dbg.h| 25 +- arch/arm/plat-omap/include/dspbridge/dbldefs.h| 10 - arch/arm/plat-omap/include/dspbridge/dbll.h | 15 +- arch/arm/plat-omap/include/dspbridge/dblldefs.h | 11 - arch/arm/plat-omap/include/dspbridge/dbtype.h | 21 +- arch/arm/plat-omap/include/dspbridge/dehdefs.h| 14 +- arch/arm/plat-omap/include/dspbridge/dev.h| 64 +-- arch/arm/plat-omap/include/dspbridge/devdefs.h| 15 +- arch/arm/plat-omap/include/dspbridge/disp.h | 31 +- arch/arm/plat-omap/include/dspbridge/dispdefs.h | 14 +- arch/arm/plat-omap/include/dspbridge/dmm.h| 18 +- arch/arm/plat-omap/include/dspbridge/dpc.h| 26 +- arch/arm/plat-omap/include/dspbridge/drv.h| 48 +- arch/arm/plat-omap/include/dspbridge/drvdefs.h| 13 +- arch/arm/plat-omap/include/dspbridge/dspdrv.h | 33 +- arch/arm/plat-omap/include/dspbridge/errbase.h| 37 +- arch/arm/plat-omap/include/dspbridge/gb.h | 10 +- arch/arm/plat-omap/include/dspbridge/getsection.h | 21 +- arch/arm/plat-omap/include/dspbridge/gh.h |8 - arch/arm/plat-omap/include/dspbridge/gs.h | 15 +- arch/arm/plat-omap/include/dspbridge/gt.h | 27 +- arch/arm/plat-omap/include/dspbridge/host_os.h| 10 - arch/arm/plat-omap/include/dspbridge/io.h | 21 +- arch/arm/plat-omap/include/dspbridge/io_sm.h | 44 +- arch/arm/plat-omap/include/dspbridge/iodefs.h | 13 +- arch/arm/plat-omap/include/dspbridge/ldr.h| 34 +- arch/arm/plat-omap/include/dspbridge/list.h | 36 +- arch/arm/plat-omap/include/dspbridge/mbx_sh.h | 25 +- arch/arm/plat-omap/include/dspbridge/mem.h| 54 +-- arch/arm/plat-omap/include/dspbridge/memdefs.h| 16 +- arch/arm/plat-omap/include/dspbridge/mgr.h| 32 +- arch/arm/plat-omap/include/dspbridge/mgrpriv.h| 14 +- arch/arm/plat-omap/include/dspbridge/msg.h| 24 +- arch/arm/plat-omap/include/dspbridge/msgdefs.h| 15 +- arch/arm/plat-omap/include/dspbridge/nldr.h | 29 +- arch/arm/plat-omap/include/dspbridge/nldrdefs.h | 14 +- arch/arm/plat-omap/include/dspbridge/node.h | 48 +- arch/arm/plat-omap/include/dspbridge/nodedefs.h | 16 +- arch/arm/plat-omap/include/dspbridge/nodepriv.h | 23 +- arch/arm/plat-omap/include/dspbridge/ntfy.h | 22 +- arch/arm/plat-omap/include/dspbridge/proc.h | 47 +- arch/arm/plat-omap/include/dspbridge/procpriv.h | 13 +- arch/arm/plat-omap/include/dspbridge/pwr.h| 19 - arch/arm/plat-omap/include/dspbridge/pwr_sh.h | 12 +- arch/arm/plat-omap/include/dspbridge/reg.h| 35 +- arch/arm/plat-omap/include/dspbridge/rmm.h| 26 +- arch/arm/plat-omap/include/dspbridge/rms_sh.h | 34 +- arch/arm/plat-omap/include/dspbridge/rmstypes.h | 15 +- arch/arm/plat-omap/include/dspbridge/services.h | 17 +- arch/arm/plat-omap/include/dspbridge/std.h| 48 -- arch/arm/plat-omap/include/dspbridge/strm.h | 41 +-
[PATCH 05/10] DSPBRIDGE: checkpatch - space required after comma
ERROR: space required after that ',' (ctx:VxV)
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/hw/GlobalTypes.h |4 ++--
drivers/dsp/bridge/hw/PRCMRegAcM.h | 24
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/dsp/bridge/hw/GlobalTypes.h
b/drivers/dsp/bridge/hw/GlobalTypes.h
index 6f54589..73a2d93 100644
--- a/drivers/dsp/bridge/hw/GlobalTypes.h
+++ b/drivers/dsp/bridge/hw/GlobalTypes.h
@@ -101,7 +101,7 @@
* DESCRIPTION: Returns a 32 bit value given a 16 bit lower value and a 16
* bit upper value
*/
-#define RETURN_32BITS_FROM_16LOWER_AND_16UPPER(lower16Bits,upper16Bits)\
+#define RETURN_32BITS_FROM_16LOWER_AND_16UPPER(lower16Bits, upper16Bits)\
(u32)lower16Bits) LOWER_16BIT_MASK)) | \
(u32)upper16Bits) LOWER_16BIT_MASK) UPPER_16BIT_SHIFT)))
@@ -111,7 +111,7 @@
* DESCRIPTION: Returns a 16 bit value given a 8 bit lower value and a 8
*bit upper value
*/
-#define RETURN_16BITS_FROM_8LOWER_AND_8UPPER(lower8Bits,upper8Bits)\
+#define RETURN_16BITS_FROM_8LOWER_AND_8UPPER(lower8Bits, upper8Bits)\
(u32)lower8Bits) LOWER_8BIT_MASK)) | \
(u32)upper8Bits) LOWER_8BIT_MASK) UPPER_8BIT_OF16_SHIFT)))
diff --git a/drivers/dsp/bridge/hw/PRCMRegAcM.h
b/drivers/dsp/bridge/hw/PRCMRegAcM.h
index 280a812..4c9d732 100644
--- a/drivers/dsp/bridge/hw/PRCMRegAcM.h
+++ b/drivers/dsp/bridge/hw/PRCMRegAcM.h
@@ -51,7 +51,7 @@
__raw_readl(((u32)(baseAddress))+CM_ICLKEN_PER_OFFSET))
-#define CM_FCLKEN_PER_GPT5WriteRegister32(baseAddress,value)\
+#define CM_FCLKEN_PER_GPT5WriteRegister32(baseAddress, value)\
{\
const u32 offset = CM_FCLKEN_PER_OFFSET;\
register u32 data = \
@@ -66,7 +66,7 @@
}
-#define CM_FCLKEN_PER_GPT6WriteRegister32(baseAddress,value)\
+#define CM_FCLKEN_PER_GPT6WriteRegister32(baseAddress, value)\
{\
const u32 offset = CM_FCLKEN_PER_OFFSET;\
register u32 data =\
@@ -81,7 +81,7 @@
}
-#define CM_ICLKEN_PER_GPT5WriteRegister32(baseAddress,value)\
+#define CM_ICLKEN_PER_GPT5WriteRegister32(baseAddress, value)\
{\
const u32 offset = CM_ICLKEN_PER_OFFSET;\
register u32 data = \
@@ -96,7 +96,7 @@
}
-#define CM_ICLKEN_PER_GPT6WriteRegister32(baseAddress,value)\
+#define CM_ICLKEN_PER_GPT6WriteRegister32(baseAddress, value)\
{\
const u32 offset = CM_ICLKEN_PER_OFFSET;\
register u32 data = \
@@ -116,7 +116,7 @@
__raw_readl(((u32)(baseAddress))+CM_FCLKEN1_CORE_OFFSET))
-#define PRCMCM_FCLKEN1_COREEN_GPT8Write32(baseAddress,value)\
+#define PRCMCM_FCLKEN1_COREEN_GPT8Write32(baseAddress, value)\
{\
const u32 offset = PRCM_CM_FCLKEN1_CORE_OFFSET;\
register u32 data = \
@@ -131,7 +131,7 @@
}
-#define PRCMCM_FCLKEN1_COREEN_GPT7Write32(baseAddress,value)\
+#define PRCMCM_FCLKEN1_COREEN_GPT7Write32(baseAddress, value)\
{\
const u32 offset = PRCM_CM_FCLKEN1_CORE_OFFSET;\
register u32 data = \
@@ -360,7 +360,7 @@
PRCM_CM_CLKSEL1_PLL_APLLs_Clkin_OFFSET))
-#define CM_FCLKEN_IVA2EN_DSPWrite32(baseAddress,value)\
+#define CM_FCLKEN_IVA2EN_DSPWrite32(baseAddress, value)\
{\
const u32 offset = CM_FCLKEN_IVA2_OFFSET;\
register u32 data = \
@@ -426,7 +426,7 @@
}
-#define PRCMCM_CLKSEL_DSPSYNC_DSPWrite32(baseAddress,value)\
+#define PRCMCM_CLKSEL_DSPSYNC_DSPWrite32(baseAddress, value)\
{\
const u32 offset = PRCM_CM_CLKSEL_DSP_OFFSET;\
register u32 data = \
@@ -514,7 +514,7 @@
__raw_readl(((baseAddress))+PRCM_RM_RSTCTRL_DSP_OFFSET))
-#define PRM_RSTCTRL_IVA2RST1_DSPWrite32(baseAddress,value)\
+#define PRM_RSTCTRL_IVA2RST1_DSPWrite32(baseAddress, value)\
{\
const u32 offset = PRM_RSTCTRL_IVA2_OFFSET;\
register u32 data =\
@@ -529,7 +529,7 @@
}
-#define PRM_RSTCTRL_IVA2RST2_DSPWrite32(baseAddress,value)\
+#define PRM_RSTCTRL_IVA2RST2_DSPWrite32(baseAddress, value)\
{\
const u32 offset = PRM_RSTCTRL_IVA2_OFFSET;\
register u32 data =\
@@ -544,7 +544,7 @@
}
-#define PRM_RSTCTRL_IVA2RST3_DSPWrite32(baseAddress,value)\
+#define PRM_RSTCTRL_IVA2RST3_DSPWrite32(baseAddress, value)\
{\
const u32 offset = PRM_RSTCTRL_IVA2_OFFSET;\
register u32 data =\
@@ -564,7 +564,7 @@
__raw_readl(((baseAddress))+PRCM_RM_RSTST_DSP_OFFSET))
-#define PRCMRM_RSTST_DSPWriteRegister32(baseAddress,value)\
+#define PRCMRM_RSTST_DSPWriteRegister32(baseAddress, value)\
{\
const u32 offset = PRCM_RM_RSTST_DSP_OFFSET;\
register u32 newValue = ((u32)(value));\
--
1.6.2.4
--
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[PATCH 01/10] DSPBRIDGE: trivial license fix in tramp and tramp_table_c6000
Seems that these files had a licensing mismatch, changing to GPL2. Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com --- drivers/dsp/bridge/dynload/tramp.c | 18 +- drivers/dsp/bridge/dynload/tramp_table_c6000.c | 18 +- 2 files changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/dsp/bridge/dynload/tramp.c b/drivers/dsp/bridge/dynload/tramp.c index 8c725c7..c2fe02d 100644 --- a/drivers/dsp/bridge/dynload/tramp.c +++ b/drivers/dsp/bridge/dynload/tramp.c @@ -1,11 +1,19 @@ /* - * Copyright 2009 by Texas Instruments Incorporated. - * All rights reserved. Property of Texas Instruments Incorporated. - * Restricted rights to use, duplicate or disclose this code are - * granted through contract. + * tramp.c * - * @(#) DSP/BIOS Bridge + * DSP-BIOS Bridge driver support functions for TI OMAP processors. + * + * Copyright (C) 2009 Texas Instruments, Inc. + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. */ + #include header.h #if TMS32060 diff --git a/drivers/dsp/bridge/dynload/tramp_table_c6000.c b/drivers/dsp/bridge/dynload/tramp_table_c6000.c index 1a7d974..acda513 100644 --- a/drivers/dsp/bridge/dynload/tramp_table_c6000.c +++ b/drivers/dsp/bridge/dynload/tramp_table_c6000.c @@ -1,11 +1,19 @@ /* - * Copyright 2009 by Texas Instruments Incorporated. - * All rights reserved. Property of Texas Instruments Incorporated. - * Restricted rights to use, duplicate or disclose this code are - * granted through contract. + * tramp_table_c6000.c * - * @(#) DSP/BIOS Bridge + * DSP-BIOS Bridge driver support functions for TI OMAP processors. + * + * Copyright (C) 2005-2006 Texas Instruments, Inc. + * + * This package is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. */ + #include dload_internal.h /* These are defined in coff.h, but may not be available on all platforms -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/10] DSPBRIDGE: trivial cleanup for io_sm
- Removed duplicate set of braces from if statement
- Placed braces for single (if or else) statements when
their counter part is a multiline block.
- Reduce indentation
- Removed a preprocessor block statement affecting
DSP trace buffer and reduced condition as MBX_DBG_CLASS
and MBX_DBG_SYSPRINTF have the same value
- Fix multiline comments according to Documentation/CodingStyle
Functions comments will be addressed in a different patch.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
drivers/dsp/bridge/wmd/io_sm.c | 503 ++--
1 files changed, 275 insertions(+), 228 deletions(-)
diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c
index e37d447..3a35378 100644
--- a/drivers/dsp/bridge/wmd/io_sm.c
+++ b/drivers/dsp/bridge/wmd/io_sm.c
@@ -17,14 +17,14 @@
*/
/*
- * Channel Invariant:
- * There is an important invariant condition which must be maintained per
- * channel outside of WMD_CHNL_GetIOC() and IO_Dispatch(), violation of
- * which may cause timeouts and/or failure of the SYNC_WaitOnEvent
- * function.
+ * Channel Invariant:
+ * There is an important invariant condition which must be maintained per
+ * channel outside of WMD_CHNL_GetIOC() and IO_Dispatch(), violation of
+ * which may cause timeouts and/or failure of the SYNC_WaitOnEvent
+ * function.
*/
-/* --- Host OS */
+/* Host OS */
#include dspbridge/host_os.h
#include linux/workqueue.h
@@ -33,11 +33,11 @@
#include dspbridge/dbdefs.h
#include dspbridge/errbase.h
-/* --- Trace Debug */
+/* Trace Debug */
#include dspbridge/dbc.h
#include dspbridge/dbg.h
-/* --- OS Adaptation Layer */
+/* Services Layer */
#include dspbridge/cfg.h
#include dspbridge/dpc.h
#include dspbridge/mem.h
@@ -45,11 +45,11 @@
#include dspbridge/sync.h
#include dspbridge/reg.h
-/* Hardware Abstraction Layer */
+/* Hardware Abstraction Layer */
#include hw_defs.h
#include hw_mmu.h
-/* --- Mini Driver */
+/* Mini Driver */
#include dspbridge/wmddeh.h
#include dspbridge/wmdio.h
#include dspbridge/wmdioctl.h
@@ -57,25 +57,25 @@
#include tiomap_io.h
#include _tiomap_pwr.h
-/* --- Platform Manager */
+/* Platform Manager */
#include dspbridge/cod.h
#include dspbridge/dev.h
#include dspbridge/chnl_sm.h
-/* --- Others */
+/* Others */
#include dspbridge/rms_sh.h
#include dspbridge/mgr.h
#include dspbridge/drv.h
#include _cmm.h
-/* --- This */
+/* This */
#include dspbridge/io_sm.h
#include _msg_sm.h
#include dspbridge/gt.h
-/* --- Defines, Data Structures, Typedefs */
+/* Defines, Data Structures, Typedefs */
#define OUTPUTNOTREADY 0x
-#define NOTENABLED 0x /* channel(s) not enabled */
+#define NOTENABLED 0x /* Channel(s) not enabled */
#define EXTEND _EXT_END
@@ -84,34 +84,34 @@
#define MAX_PM_REQS 32
-/* IO Manager: only one created per board: */
+/* IO Manager: only one created per board */
struct IO_MGR {
- /* These four fields must be the first fields in a IO_MGR_ struct: */
- u32 dwSignature;/* Used for object validation */
- struct WMD_DEV_CONTEXT *hWmdContext;/* WMD device context */
+ /* These four fields must be the first fields in a IO_MGR_ struct */
+ u32 dwSignature;/* Used for object validation */
+ struct WMD_DEV_CONTEXT *hWmdContext;/* WMD device context */
struct WMD_DRV_INTERFACE *pIntfFxns;/* Function interface to WMD */
struct DEV_OBJECT *hDevObject; /* Device this board represents */
- /* These fields initialized in WMD_IO_Create():*/
+ /* These fields initialized in WMD_IO_Create() */
struct CHNL_MGR *hChnlMgr;
- struct SHM *pSharedMem; /* Shared Memory control*/
- u8 *pInput; /* Address of input channel */
- u8 *pOutput;/* Address of output channel*/
+ struct SHM *pSharedMem; /* Shared Memory control */
+ u8 *pInput; /* Address of input channel */
+ u8 *pOutput;/* Address of output channel */
struct MSG_MGR *hMsgMgr;/* Message manager */
struct MSG *pMsgInputCtrl; /* Msg control for from DSP messages */
struct MSG *pMsgOutputCtrl; /* Msg control for to DSP messages */
- u8 *pMsgInput; /* Address of input messages*/
- u8 *pMsgOutput; /* Address of output messages */
+ u8 *pMsgInput; /* Address of input messages */
+ u8 *pMsgOutput; /* Address of output messages */
u32 uSMBufSize; /* Size of a shared memory I/O channel */
- bool fSharedIRQ;
Re: [PM-WIP-OPP] [PATCH 1/2]: Introducing enum for OPP types
Romit Dasgupta ro...@ti.com writes:
Using omap_opp * to refer to domain types restricts opp implementation
into maintaining pointers outside the opp layer. This causes issues such
as:
a) Describing cross domain dependencies (e.g. dsp vs mpu)
b) Ease of transitioning/supporting to multiple silicon variants and
families
c) Choice of varied options in implementing opp layer internals.
Since all we need a identifying a specific domain for query/operational
purposes, we introduce enum for identifying OPP types instead of using
opp layer's internal data structure pointer.
Currently, OMAP3 is the only silicon supporting the OPP layer, hence
mpu_opps, l3_opps and dsp_opps are deprecated and replaced with
OPP_MPU,
OPP_L3 and OPP_DSP respectively.
Signed-off-by: Romit Dasgupta ro...@ti.com
OK, this looks mostly ok, but I agree with Nishanth about he readability of
the 'enum opp_t opp_t' stuff.
Please re-spin one more time using 'enum opp_type type' which I think
is much more redable and greppable.
After this, I'll be considering the OPP API frozen, and begin
consolidating stuff for a push to mainline or 2.6.34.
Kevin
---
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 5c751c1..0930aef 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -1347,7 +1347,6 @@ static void __init configure_vc(void)
void __init omap3_pm_init_opp_table(void)
{
- int i;
struct omap_opp_def **omap3_opp_def_list;
struct omap_opp_def *omap34xx_opp_def_list[] = {
omap34xx_mpu_rate_table,
@@ -1359,19 +1358,13 @@ void __init omap3_pm_init_opp_table(void)
omap36xx_l3_rate_table,
omap36xx_dsp_rate_table
};
- struct omap_opp **omap3_rate_tables[] = {
- mpu_opps,
- l3_opps,
- dsp_opps
- };
omap3_opp_def_list = cpu_is_omap3630() ? omap36xx_opp_def_list :
omap34xx_opp_def_list;
- for (i = 0; i ARRAY_SIZE(omap3_rate_tables); i++) {
- *omap3_rate_tables[i] = opp_init_list(omap3_opp_def_list[i]);
- /* We dont want half configured system at the moment */
- BUG_ON(IS_ERR(omap3_rate_tables[i]));
- }
+
+ BUG_ON(opp_init_list(OPP_MPU, omap3_opp_def_list[0]));
+ BUG_ON(opp_init_list(OPP_L3, omap3_opp_def_list[1]));
+ BUG_ON(opp_init_list(OPP_DSP, omap3_opp_def_list[2]));
}
static int __init omap3_pm_early_init(void)
diff --git a/arch/arm/mach-omap2/resource34xx.c
b/arch/arm/mach-omap2/resource34xx.c
index 157b38e..5ec072e 100644
--- a/arch/arm/mach-omap2/resource34xx.c
+++ b/arch/arm/mach-omap2/resource34xx.c
@@ -161,7 +161,7 @@ static DEFINE_MUTEX(dvfs_mutex);
/**
* opp_to_freq - convert OPPID to frequency (DEPRECATED)
* @freq: return frequency back to caller
- * @opps: opp list
+ * @opp_t: OPP type where we need to look.
* @opp_id: OPP ID we are searching for
*
* return 0 and freq is populated if we find the opp_id, else,
@@ -169,14 +169,14 @@ static DEFINE_MUTEX(dvfs_mutex);
*
* NOTE: this function is a standin for the timebeing as opp_id is deprecated
*/
-static int __deprecated opp_to_freq(unsigned long *freq,
- const struct omap_opp *opps, u8 opp_id)
+static int __deprecated opp_to_freq(unsigned long *freq, enum opp_t opp_t,
+ u8 opp_id)
{
struct omap_opp *opp;
- BUG_ON(!freq || !opps);
+ BUG_ON(!freq || opp_t = OPP_TYPES_MAX);
- opp = opp_find_by_opp_id(opps, opp_id);
+ opp = opp_find_by_opp_id(opp_t, opp_id);
if (!opp)
return -EINVAL;
@@ -188,20 +188,20 @@ static int __deprecated opp_to_freq(unsigned long *freq,
/**
* freq_to_opp - convert a frequency back to OPP ID (DEPRECATED)
* @opp_id: opp ID returned back to caller
- * @opps: opp list
+ * @opp_t: OPP type where we need to look.
* @freq: frequency we are searching for
*
* return 0 and opp_id is populated if we find the freq, else, we return
error
*
* NOTE: this function is a standin for the timebeing as opp_id is deprecated
*/
-static int __deprecated freq_to_opp(u8 *opp_id, struct omap_opp *opps,
+static int __deprecated freq_to_opp(u8 *opp_id, enum opp_t opp_t,
unsigned long freq)
{
struct omap_opp *opp;
- BUG_ON(!opp_id || !opps);
- opp = opp_find_freq_ceil(opps, freq);
+ BUG_ON(opp_t = OPP_TYPES_MAX);
+ opp = opp_find_freq_ceil(opp_t, freq);
if (IS_ERR(opp))
return -EINVAL;
*opp_id = opp_get_opp_id(opp);
@@ -218,9 +218,6 @@ void init_opp(struct shared_resource *resp)
u8 opp_id;
resp-no_of_users = 0;
- if (!mpu_opps || !dsp_opps || !l3_opps)
- return;
-
/* Initialize the current level of the OPP resource
* to the opp set by u-boot.
*/
@@ -228,14 +225,14 @@
[PATCH 4/4] DSPBRIDGE: Remove DPC object structure
Remove DPC object structure and declare required members
for each tasklet inside their correspondent modules.
Remove dpc header file.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/_chnl_sm.h |1 -
arch/arm/plat-omap/include/dspbridge/dpc.h | 38 ---
drivers/dsp/bridge/pmgr/chnl.c |1 -
drivers/dsp/bridge/services/services.c |1 -
drivers/dsp/bridge/wmd/_deh.h |5 +-
drivers/dsp/bridge/wmd/io_sm.c | 79 ---
drivers/dsp/bridge/wmd/mmu_fault.c | 24 +--
drivers/dsp/bridge/wmd/ue_deh.c | 25 +--
8 files changed, 35 insertions(+), 139 deletions(-)
delete mode 100644 arch/arm/plat-omap/include/dspbridge/dpc.h
diff --git a/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
b/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
index f22b2cb..eb5adc2 100644
--- a/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
+++ b/arch/arm/plat-omap/include/dspbridge/_chnl_sm.h
@@ -25,7 +25,6 @@
#include dspbridge/wcd.h
#include dspbridge/wmd.h
-#include dspbridge/dpc.h
#include dspbridge/list.h
#include dspbridge/ntfy.h
diff --git a/arch/arm/plat-omap/include/dspbridge/dpc.h
b/arch/arm/plat-omap/include/dspbridge/dpc.h
deleted file mode 100644
index aee910d..000
--- a/arch/arm/plat-omap/include/dspbridge/dpc.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * dpc.h
- *
- * DSP-BIOS Bridge driver support functions for TI OMAP processors.
- *
- * Deferred Procedure Call(DPC) Services.
- *
- * Copyright (C) 2005-2006 Texas Instruments, Inc.
- *
- * This package is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
- * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
- */
-
-#ifndef DPC_
-#define DPC_
-
-/* The DPC object, passed to our priority event callback routine: */
-struct DPC_OBJECT {
- u32 dwSignature;/* Used for object validation. */
- void *pRefData; /* Argument for client's DPC.*/
- u32 numRequested; /* Number of requested DPC's. */
- u32 numScheduled; /* Number of executed DPC's. */
- struct tasklet_struct dpc_tasklet;
-
-#ifdef DEBUG
- u32 cEntryCount;/* Number of times DPC reentered. */
- u32 numRequestedMax;/* Keep track of max pending DPC's. */
-#endif
-
- spinlock_t dpc_lock;
-};
-
-#endif /* DPC_ */
diff --git a/drivers/dsp/bridge/pmgr/chnl.c b/drivers/dsp/bridge/pmgr/chnl.c
index f4d0fc1..fd487f0 100644
--- a/drivers/dsp/bridge/pmgr/chnl.c
+++ b/drivers/dsp/bridge/pmgr/chnl.c
@@ -31,7 +31,6 @@
/* --- OS Adaptation Layer */
#include dspbridge/cfg.h
-#include dspbridge/dpc.h
#include dspbridge/list.h
#include dspbridge/mem.h
#include dspbridge/sync.h
diff --git a/drivers/dsp/bridge/services/services.c
b/drivers/dsp/bridge/services/services.c
index e337cf3..efedb00 100644
--- a/drivers/dsp/bridge/services/services.c
+++ b/drivers/dsp/bridge/services/services.c
@@ -29,7 +29,6 @@
/* --- OS Adaptation Layer */
#include dspbridge/cfg.h
#include dspbridge/dbg.h
-#include dspbridge/dpc.h
#include dspbridge/list.h
#include dspbridge/mem.h
#include dspbridge/ntfy.h
diff --git a/drivers/dsp/bridge/wmd/_deh.h b/drivers/dsp/bridge/wmd/_deh.h
index 2b364b5..aadb9fa 100644
--- a/drivers/dsp/bridge/wmd/_deh.h
+++ b/drivers/dsp/bridge/wmd/_deh.h
@@ -19,7 +19,6 @@
#ifndef _DEH_
#define _DEH_
-#include dspbridge/dpc.h
#include dspbridge/ntfy.h
#include dspbridge/wmd.h
@@ -30,8 +29,10 @@ struct DEH_MGR {
u32 dwSignature;/* Used for object validation. */
struct WMD_DEV_CONTEXT *hWmdContext;/* WMD device context. */
struct NTFY_OBJECT *hNtfy; /* NTFY object */
- struct DPC_OBJECT *hMmuFaultDpc;/* DPC object handle. */
struct DSP_ERRORINFO errInfo; /* DSP exception info. */
+
+ /* MMU Fault DPC */
+ struct tasklet_struct dpc_tasklet;
} ;
#endif /* _DEH_ */
diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c
index 470c83b..4511ec5 100644
--- a/drivers/dsp/bridge/wmd/io_sm.c
+++ b/drivers/dsp/bridge/wmd/io_sm.c
@@ -39,7 +39,6 @@
/* Services Layer */
#include dspbridge/cfg.h
-#include dspbridge/dpc.h
#include dspbridge/mem.h
#include dspbridge/ntfy.h
#include dspbridge/sync.h
@@ -104,7 +103,6 @@ struct IO_MGR {
u8 *pMsgOutput; /* Address of output messages */
u32 uSMBufSize; /* Size of a shared memory I/O channel */
bool fSharedIRQ;/* Is this IRQ
[PATCH 2/4] DSPBRIDGE: Remove main DPC wrapper for IO and MMUfault
Remove DeferredProcedure which is used as a wrapper to call
either IO or MMUfault DPCs. This also removes a custom typedef.
Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com
---
arch/arm/plat-omap/include/dspbridge/dpc.h | 23 ---
arch/arm/plat-omap/include/dspbridge/io_sm.h |2 +-
drivers/dsp/bridge/services/dpc.c| 36 ---
drivers/dsp/bridge/wmd/io_sm.c | 40 +
drivers/dsp/bridge/wmd/mmu_fault.c |2 +-
drivers/dsp/bridge/wmd/mmu_fault.h |2 +-
drivers/dsp/bridge/wmd/ue_deh.c |5 +--
7 files changed, 31 insertions(+), 79 deletions(-)
diff --git a/arch/arm/plat-omap/include/dspbridge/dpc.h
b/arch/arm/plat-omap/include/dspbridge/dpc.h
index 0c60342..b22140f 100644
--- a/arch/arm/plat-omap/include/dspbridge/dpc.h
+++ b/arch/arm/plat-omap/include/dspbridge/dpc.h
@@ -19,30 +19,10 @@
#ifndef DPC_
#define DPC_
-/*
- * DPC_PROC
- * Purpose:
- * Deferred processing routine. Typically scheduled from an ISR to
- * complete I/O processing.
- * Parameters:
- * pRefData: Ptr to user data: passed in via ISR_ScheduleDPC.
- * Returns:
- * Requires:
- * The DPC should not block, or otherwise acquire resources.
- * Interrupts to the processor are enabled.
- * DPC_PROC executes in a critical section.
- * Ensures:
- * This DPC will not be reenterred on the same thread.
- * However, the DPC may take hardware interrupts during execution.
- * Interrupts to the processor are enabled.
- */
- typedef void(*DPC_PROC) (void *pRefData);
-
/* The DPC object, passed to our priority event callback routine: */
struct DPC_OBJECT {
u32 dwSignature;/* Used for object validation. */
void *pRefData; /* Argument for client's DPC.*/
- DPC_PROC pfnDPC;/* Client's DPC. */
u32 numRequested; /* Number of requested DPC's. */
u32 numScheduled; /* Number of executed DPC's. */
struct tasklet_struct dpc_tasklet;
@@ -81,7 +61,4 @@ struct DPC_OBJECT {
*/
extern bool DPC_Init(void);
-/* --- Function Prototypes */
- void DPC_DeferredProcedure(IN unsigned long pDeferredContext);
-
#endif /* DPC_ */
diff --git a/arch/arm/plat-omap/include/dspbridge/io_sm.h
b/arch/arm/plat-omap/include/dspbridge/io_sm.h
index 77f9e25..67e3834 100644
--- a/arch/arm/plat-omap/include/dspbridge/io_sm.h
+++ b/arch/arm/plat-omap/include/dspbridge/io_sm.h
@@ -77,7 +77,7 @@
* Ensures:
* Non-preemptible (but interruptible).
*/
- extern void IO_DPC(IN OUT void *pRefData);
+ extern void IO_DPC(IN OUT unsigned long pRefData);
/*
* IO_ISR
diff --git a/drivers/dsp/bridge/services/dpc.c
b/drivers/dsp/bridge/services/dpc.c
index 10bd792..bbb2d47 100644
--- a/drivers/dsp/bridge/services/dpc.c
+++ b/drivers/dsp/bridge/services/dpc.c
@@ -66,39 +66,3 @@ bool DPC_Init(void)
return true;
}
-/*
- * DeferredProcedure
- * Purpose:
- * Main DPC routine. This is called by host OS DPC callback
- * mechanism with interrupts enabled.
- */
-void DPC_DeferredProcedure(IN unsigned long pDeferredContext)
-{
- struct DPC_OBJECT *pDPCObject = (struct DPC_OBJECT *)pDeferredContext;
- /* read numRequested in local variable */
- u32 requested;
- u32 serviced;
-
- DBC_Require(pDPCObject != NULL);
- requested = pDPCObject-numRequested;
- serviced = pDPCObject-numScheduled;
-
- GT_1trace(DPC_DebugMask, GT_ENTER, DPC_DeferredProcedure
- pDeferredContext=%x\n, pDeferredContext);
- /* Rollover taken care of using != instead of */
- if (serviced != requested) {
- if (pDPCObject-pfnDPC != NULL) {
- /* Process pending DPC's: */
- do {
- /* Call client's DPC: */
- (*(pDPCObject-pfnDPC))(pDPCObject-pRefData);
- serviced++;
- } while (serviced != requested);
- }
- pDPCObject-numScheduled = requested;
- }
- GT_2trace(DPC_DebugMask, GT_ENTER,
- DPC_DeferredProcedure requested %d
- serviced %d\n, requested, serviced);
-}
-
diff --git a/drivers/dsp/bridge/wmd/io_sm.c b/drivers/dsp/bridge/wmd/io_sm.c
index b7b7bd9..470c83b 100644
--- a/drivers/dsp/bridge/wmd/io_sm.c
+++ b/drivers/dsp/bridge/wmd/io_sm.c
@@ -252,10 +252,8 @@ DSP_STATUS WMD_IO_Create(OUT struct IO_MGR **phIOMgr,
IO_MGRSIGNATURE);
if (pIOMgr-hDPC) {
tasklet_init(pIOMgr-hDPC-dpc_tasklet,
- DPC_DeferredProcedure, (u32)pIOMgr-hDPC);
+
[PATCH 0/4] omap multiboot improvments for merge window after 2.6.34
Hi all, Here are some multiboot improvments for review. These patches are intended for the 2.6.34 merge window. Comments and testing would be nice, I've tested them so far on osk, 770, n800, rx51 and overo. Regards, Tony --- Tony Lindgren (4): omap: Clean the serial port defines omap: Make uncompress code and DEBUG_LL code generic omap: Remove old DEBUG_LL serial port options omap: Make get_irqnr_and_base common for mach-omap2 multiboot arch/arm/mach-omap1/include/mach/debug-macro.S | 83 ++-- arch/arm/mach-omap1/serial.c | 18 ++- arch/arm/mach-omap2/include/mach/debug-macro.S | 91 + arch/arm/mach-omap2/include/mach/entry-macro.S | 55 +--- arch/arm/mach-omap2/serial.c | 26 +++- arch/arm/plat-omap/Kconfig | 19 --- arch/arm/plat-omap/common.c| 18 +++ arch/arm/plat-omap/include/plat/common.h |5 + arch/arm/plat-omap/include/plat/serial.h | 62 ++--- arch/arm/plat-omap/include/plat/uncompress.h | 168 +--- 10 files changed, 390 insertions(+), 155 deletions(-) -- Signature -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] omap: Clean the serial port defines
This way we don't have conflicts with the defines
with compiling in multiple omaps. Set the addresses
for uarts in struct omap_globals for the early serial
init code.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/include/mach/debug-macro.S | 16 +
arch/arm/mach-omap1/serial.c |6 ++-
arch/arm/mach-omap2/include/mach/debug-macro.S | 15
arch/arm/mach-omap2/serial.c | 15 ++--
arch/arm/plat-omap/common.c| 18 ++
arch/arm/plat-omap/include/plat/common.h |5 +++
arch/arm/plat-omap/include/plat/serial.h | 44 +---
7 files changed, 77 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S
b/arch/arm/mach-omap1/include/mach/debug-macro.S
index aedb746..23e4724 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -11,6 +11,10 @@
*
*/
+#include linux/serial_reg.h
+
+#include plat/serial.h
+
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -30,13 +34,13 @@
.endm
.macro busyuart,rd,rx
-1001: ldrb\rd, [\rx, #(0x5 2)] @ OMAP-1510 and friends
- and \rd, \rd, #0x60
- teq \rd, #0x60
+1001: ldrb\rd, [\rx, #(UART_LSR OMAP_PORT_SHIFT)]
+ and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+ teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
beq 1002f
- ldrb\rd, [\rx, #(0x5 0)] @ OMAP-730 only
- and \rd, \rd, #0x60
- teq \rd, #0x60
+ ldrb\rd, [\rx, #(UART_LSR OMAP7XX_PORT_SHIFT)]
+ and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+ teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
bne 1001b
1002:
.endm
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index 6e5207c..349de90 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct
plat_serial8250_port *p)
static struct plat_serial8250_port serial_platform_data[] = {
{
- .mapbase= OMAP_UART1_BASE,
+ .mapbase= OMAP1_UART1_BASE,
.irq= INT_UART1,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
@@ -72,7 +72,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
.uartclk= OMAP16XX_BASE_BAUD * 16,
},
{
- .mapbase= OMAP_UART2_BASE,
+ .mapbase= OMAP1_UART2_BASE,
.irq= INT_UART2,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
@@ -80,7 +80,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
.uartclk= OMAP16XX_BASE_BAUD * 16,
},
{
- .mapbase= OMAP_UART3_BASE,
+ .mapbase= OMAP1_UART3_BASE,
.irq= INT_UART3,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S
b/arch/arm/mach-omap2/include/mach/debug-macro.S
index e9f255d..0c96e1c 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -11,6 +11,10 @@
*
*/
+#include linux/serial_reg.h
+
+#include plat/serial.h
+
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
@@ -44,15 +48,10 @@
.endm
.macro busyuart,rd,rx
-1001: ldrb\rd, [\rx, #(0x5 2)] @ OMAP-1510 and friends
- and \rd, \rd, #0x60
- teq \rd, #0x60
- beq 1002f
- ldrb\rd, [\rx, #(0x5 0)] @ OMAP-730 only
- and \rd, \rd, #0x60
- teq \rd, #0x60
+1001: ldrb\rd, [\rx, #(UART_LSR OMAP_PORT_SHIFT)]
+ and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+ teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
bne 1001b
-1002:
.endm
.macro waituart,rd,rx
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 837b347..21e51c5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -74,7 +74,6 @@ static LIST_HEAD(uart_list);
static struct plat_serial8250_port serial_platform_data0[] = {
{
- .mapbase= OMAP_UART1_BASE,
.irq= 72,
[PATCH 3/4] omap: Remove old DEBUG_LL serial port options
These are no longer needed. Note that zoom boards should now set their own function in uncompress.h and debug-macro.S for the external UART. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/plat-omap/Kconfig | 19 --- 1 files changed, 0 insertions(+), 19 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index e2ea04a..484d6a9 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -141,25 +141,6 @@ config OMAP_DM_TIMER help Select this option if you want to use OMAP Dual-Mode timers. -choice - prompt Low-level debug console UART - depends on ARCH_OMAP - default OMAP_LL_DEBUG_NONE - -config OMAP_LL_DEBUG_UART1 - bool UART1 - -config OMAP_LL_DEBUG_UART2 - bool UART2 - -config OMAP_LL_DEBUG_UART3 - bool UART3 - -config OMAP_LL_DEBUG_NONE - bool None - -endchoice - config OMAP_SERIAL_WAKE bool Enable wake-up events for serial ports depends on ARCH_OMAP1 OMAP_MUX -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4] omap: Make get_irqnr_and_base common for mach-omap2 multiboot
Make get_irqnr_and_base common for mach-omap2 multiboot Note that this will only work currently for 24xx and 34xx. The overhead of this should be minimal, it basically adds one cmp to see if omap_irq_base has been configured already. If necessary, we can set separate optimized get_irqnr_and_base for non-multiboot configurations. Support for 44xx can be added later on for basic multiboot, and similar patch should be done for mach-omap1/entry-macro.S. Signed-off-by: Tony Lindgren t...@atomide.com --- arch/arm/mach-omap2/include/mach/entry-macro.S | 55 1 files changed, 37 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index c7f1720..3f75a09 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -17,18 +17,7 @@ #include plat/omap24xx.h #include plat/omap34xx.h - -/* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */ -#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) -#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) -#elif defined(CONFIG_ARCH_OMAP34XX) -#define OMAP2_VA_IC_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) -#endif -#if defined(CONFIG_ARCH_OMAP4) #include plat/omap44xx.h -#endif -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ -#defineACTIVEIRQ_MASK 0x7f/* Active interrupt bits */ .macro disable_fiq .endm @@ -39,23 +28,53 @@ .macro arch_ret_to_user, tmp1, tmp2 .endm -#ifndef CONFIG_ARCH_OMAP4 +#if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430) || \ + defined(CONFIG_ARCH_OMAP34XX) + +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ +#defineACTIVEIRQ_MASK 0x7f/* Active interrupt bits */ + +omap_irq_base: .word 0x0 + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =OMAP2_VA_IC_BASE - ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ + ldr \base, omap_irq_base + cmp \base, #0 @ is irq base configured? + bne 9998f @ already configured + + /* Check the processor type */ + mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision + and \tmp, \tmp, #0x000f @ only check architecture + cmp \tmp, #0x0006 @ is v6? + beq 2400f @ found v6 so it's omap24xx + cmp \tmp, #0x000f @ is cortex? + beq 3400f @ found v7 so it's omap34xx + +2400: ldr \base, =OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE) + str \base, omap_irq_base + b 9998f + +3400: ldr \base, =OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE) + str \base, omap_irq_base + + /* Check the pending interrupts */ +9998: ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ cmp \irqnr, #0x0 - bne f + bne f ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ cmp \irqnr, #0x0 - bne f + bne f ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 -: +: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ .endm -#else +#endif + + +#ifdef CONFIG_ARCH_OMAP4 + #define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE) /* -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/3] dspbridge-pm patches
This set of patches is required to compile dspbridge branch against pm branch. Current set fixes: - compilation issues due to header migration from mach to plat. - Bridge DVFS migration to cpufreq_register_notifier. - Fix initializaton of platform data DVFS functions because of EXPORT_SYMBOL removal. dspbridge-pm is currently based on pm-2.6.32. Fernando Guzman Lugo (1): DSPBRIDGE: change to cpufreq_register_notifier for OPP changes Omar Ramirez Luna (2): DSPBRIDGE: Fix header locations mach to plat DSPBRIDGE: Use dspbridge to initialize platform data arch/arm/mach-omap2/Makefile |4 ++- arch/arm/mach-omap2/dspbridge.c|2 +- arch/arm/plat-omap/include/dspbridge/host_os.h |2 +- drivers/dsp/bridge/Kconfig |2 +- drivers/dsp/bridge/rmgr/drv_interface.c| 25 ++- drivers/dsp/bridge/wmd/tiomap3430.c|2 +- 6 files changed, 22 insertions(+), 15 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/3] DSPBRIDGE: change to cpufreq_register_notifier for OPP changes
From: Fernando Guzman Lugo x0095...@ti.com
This patch changes clk_notifier_unregister with
cpufreq_unregister_notifier, which is used for OPP change
notifications
Signed-off-by: Fernando Guzman Lugo x0095...@ti.com
---
drivers/dsp/bridge/Kconfig |2 +-
drivers/dsp/bridge/rmgr/drv_interface.c | 25 +++--
2 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/dsp/bridge/Kconfig b/drivers/dsp/bridge/Kconfig
index e494f02..ea639e3 100644
--- a/drivers/dsp/bridge/Kconfig
+++ b/drivers/dsp/bridge/Kconfig
@@ -13,7 +13,7 @@ menuconfig MPU_BRIDGE
config BRIDGE_DVFS
bool Enable Bridge Dynamic Voltage and Frequency Scaling (DVFS)
- depends on MPU_BRIDGE OMAP_PM_SRF
+ depends on MPU_BRIDGE OMAP_PM_SRF CPU_FREQ
default n
help
DVFS allows DSP Bridge to initiate the operating point change to
diff --git a/drivers/dsp/bridge/rmgr/drv_interface.c
b/drivers/dsp/bridge/rmgr/drv_interface.c
index 8fce70c..19682b5 100644
--- a/drivers/dsp/bridge/rmgr/drv_interface.c
+++ b/drivers/dsp/bridge/rmgr/drv_interface.c
@@ -236,15 +236,18 @@ u32 vdd1_dsp_freq[6][4] = {
};
#ifdef CONFIG_BRIDGE_DVFS
-static int dspbridge_post_scale(struct notifier_block *op, unsigned long level,
- void *ptr)
+static int dspbridge_scale_notification(struct notifier_block *op,
+ unsigned long val, void *ptr)
{
- PWR_PM_PostScale(PRCM_VDD1, level);
+ struct dspbridge_platform_data *pdata =
+ omap_dspbridge_dev-dev.platform_data;
+ if (CPUFREQ_POSTCHANGE == val pdata-dsp_get_opp)
+ PWR_PM_PostScale(PRCM_VDD1, pdata-dsp_get_opp());
return 0;
}
static struct notifier_block iva_clk_notifier = {
- .notifier_call = dspbridge_post_scale,
+ .notifier_call = dspbridge_scale_notification,
NULL,
};
#endif
@@ -380,12 +383,13 @@ static int __devinit omap34xx_bridge_probe(struct
platform_device *pdev)
GT_0trace(driverTrace, GT_7CLASS,
clk_get PASS to get iva2_ck \n);
}
- if (!clk_notifier_register(clk_handle, iva_clk_notifier)) {
+ if (!cpufreq_register_notifier(iva_clk_notifier,
+ CPUFREQ_TRANSITION_NOTIFIER)) {
GT_0trace(driverTrace, GT_7CLASS,
- clk_notifier_register PASS for iva2_ck \n);
+ cpufreq_register_notifier PASS for iva2_ck\n);
} else {
GT_0trace(driverTrace, GT_7CLASS,
- clk_notifier_register FAIL for iva2_ck \n);
+ cpufreq_register_notifier FAIL for iva2_ck\n);
}
#endif
driverContext = DSP_Init(initStatus);
@@ -429,12 +433,13 @@ static int __devexit omap34xx_bridge_remove(struct
platform_device *pdev)
goto func_cont;
#ifdef CONFIG_BRIDGE_DVFS
- if (!clk_notifier_unregister(clk_handle, iva_clk_notifier)) {
+ if (!cpufreq_unregister_notifier(iva_clk_notifier,
+ CPUFREQ_TRANSITION_NOTIFIER)) {
GT_0trace(driverTrace, GT_7CLASS,
- clk_notifier_unregister PASS for iva2_ck \n);
+ cpufreq_unregister_notifier PASS for iva2_ck\n);
} else {
GT_0trace(driverTrace, GT_7CLASS,
- clk_notifier_unregister FAILED for iva2_ck \n);
+ cpufreq_unregister_notifier FAILED for iva2_ck\n);
}
#endif /* #ifdef CONFIG_BRIDGE_DVFS */
--
1.6.2.4
--
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[PATCH 3/3] DSPBRIDGE: Use dspbridge to initialize platform data
Include dspbridge compilation whenever bridge driver is selected to be compiled, either as a module or part of the kernel. This will initialize platform data specific PM functions. Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com --- arch/arm/mach-omap2/Makefile |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index a37c713..1693c03 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -57,7 +57,9 @@ obj-$(CONFIG_OMAP_IOMMU) += $(iommu-y) # Debobs obj-$(CONFIG_OMAP3_DEBOBS) += debobs.o -obj-$(CONFIG_MPU_BRIDGE) += dspbridge.o +ifneq ($(CONFIG_MPU_BRIDGE),) +obj-y += dspbridge.o +endif # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC)+= board-generic.o -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/3] DSPBRIDGE: Fix header locations mach to plat
Fix header locations, replaced mach to plat Signed-off-by: Omar Ramirez Luna omar.rami...@ti.com --- arch/arm/mach-omap2/dspbridge.c|2 +- arch/arm/plat-omap/include/dspbridge/host_os.h |2 +- drivers/dsp/bridge/wmd/tiomap3430.c|2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/dspbridge.c b/arch/arm/mach-omap2/dspbridge.c index ea109a3..4150896 100644 --- a/arch/arm/mach-omap2/dspbridge.c +++ b/arch/arm/mach-omap2/dspbridge.c @@ -14,7 +14,7 @@ #include linux/platform_device.h #ifdef CONFIG_BRIDGE_DVFS -#include mach/omap-pm.h +#include plat/omap-pm.h #endif #include dspbridge/host_os.h diff --git a/arch/arm/plat-omap/include/dspbridge/host_os.h b/arch/arm/plat-omap/include/dspbridge/host_os.h index 6fe1462..74cf6d4 100644 --- a/arch/arm/plat-omap/include/dspbridge/host_os.h +++ b/arch/arm/plat-omap/include/dspbridge/host_os.h @@ -54,7 +54,7 @@ #include linux/ioport.h #include linux/platform_device.h #include dspbridge/dbtype.h -#include mach/clock.h +#include plat/clock.h #include linux/clk.h #include linux/pagemap.h #include asm/cacheflush.h diff --git a/drivers/dsp/bridge/wmd/tiomap3430.c b/drivers/dsp/bridge/wmd/tiomap3430.c index 7138396..b123707 100644 --- a/drivers/dsp/bridge/wmd/tiomap3430.c +++ b/drivers/dsp/bridge/wmd/tiomap3430.c @@ -34,7 +34,7 @@ #include mach-omap2/cm.h #include mach-omap2/prm-regbits-34xx.h #include mach-omap2/cm-regbits-34xx.h -#include mach/control.h +#include plat/control.h /* --- DSP/BIOS Bridge */ #include dspbridge/std.h -- 1.6.2.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PM-WIP-OPP] [PATCH 2/2]: Change return value from ERR_PTR(..) to NULL in opp layer
Dasgupta, Romit had written, on 01/15/2010 08:36 PM, the following: Returning NULL pointer from the OPP APIs instead of ERR_PTR where return struct omap_opp *. This is because there is no inherent value in returning ERR_PTR from the opp layer. Returning NULL serves the purpose. NAK. Using ERR_PTR allows returning different types of error conditions, and is common practice across the kernel. Yes, it is true that it is a common practice but in case of the OPP layer I did not see any purpose. The caller of the APIs returning struct omap_opp * can just check for NULL value for failure. My initial intention of introducing ERR_PTR had the objective of being flexible: I could not predict how each function would develop into - e.g. lists etc. They may prefer to return error values which could be independently handled. allow future flexibility. let me illustrate it - now that we are aligned that we are moving to enums: The caller does not have an idea if mpu_opps was initialized or not. opp_find_freq_exact can return: (examples ofcourse) -EDATA to say that the domain requested was not initialized or -EAGAIN once we introduce locks to say that it is locked (non-blocking implementation) or -ERANGE to say that the caller is asking for a frequency beyond the supported range. Another example: opp_enable can now return -EEXIST to say that the the opp was already enabled etc.. The benefit I definitely see is that with an previously placed single pr_err of the return value by the caller, I can remotely debug an issue in code instead of having the developer to add printks/use lauterbach to debug. ok, I might not have selected the best of return values, but I hope the idea is clear. NAK from myside too. Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PM-WIP-OPP] [PATCH 2/2]: Change return value from ERR_PTR(..) to NULL in opp layer
Returning NULL pointer from the OPP APIs instead of ERR_PTR where return struct omap_opp *. This is because there is no inherent value in returning ERR_PTR from the opp layer. Returning NULL serves the purpose. NAK. Using ERR_PTR allows returning different types of error conditions, and is common practice across the kernel. Yes, it is true that it is a common practice but in case of the OPP layer I did not see any purpose. The caller of the APIs returning struct omap_opp * can just check for NULL value for failure.-- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
overo_defconfig missing MUSB transceiver definition?
Hi, Overo crashes on boot with an overo_defconfig kernel; looks like the reason why is a missing MUSB transceiver definition. It would be nice if the MUSB init would simply fail if no transceiver was defined, that would avoid what seems to be an unnecessary crash. regards - Paul musb_hdrc: version 6.0, pio, host, debug=0 HS USB OTG: no transceiver configured musb_hdrc musb_hdrc: musb_init_controller failed with status -19 Unable to handle kernel NULL pointer dereference at virtual address 0040 pgd = c0004000 [0040] *pgd= Internal error: Oops: 5 [#1] last sysfs file: Modules linked in: CPU: 0Not tainted (2.6.33-rc3-07237-g445c4a9 #210) PC is at musb_platform_suspend+0x40/0x88 LR is at musb_platform_suspend+0x3c/0x88 pc : [c02321bc]lr : [c02321b8]psr: a013 sp : cf823e30 ip : fp : r10: cf862000 r9 : r8 : c04cc4f8 r7 : cf880300 r6 : cf8620f8 r5 : cf8620f8 r4 : cf8620f8 r3 : c04abd3c r2 : cf855b70 r1 : fa0ab404 r0 : Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 80004019 DAC: 0017 Process swapper (pid: 1, stack limit = 0xcf8222f0) Stack: (0xcf823e30 to 0xcf824000) 3e20: cf8620f8 c0232210 c02315b0 3e40: ffed cf8620f8 c001c644 c04bbfec 3e60: c0362c9c c04aefc8 c04aefd0 005c fa0ab000 c04aefac cf862194 0002 3e80: cf8f6880 cf8f6880 0002 c051bc8c cf823eec c019e19c 3ea0: cf806850 00d0 c01013d8 0007 cf8f71b0 cf8f7210 3ec0: cf823f08 c01011cc cf823f08 cf8f7210 c0363310 cf823f08 3ee0: cf823f08 c0101718 cf823f08 cf823f08 cf8f7210 cf823f08 3f00: cf8f7210 c0101c5c cf855b70 c04aefd0 c04aefd0 c04d1ac0 cf880300 c04cc4f8 3f20: c01d2fcc c04aefd0 c01d2090 c04aefd0 c04af004 3f40: c04d1ac0 cf880300 c04cc4f8 c01d219c c01d213c c04d1ac0 c01d1900 3f60: cf80d1b8 cf880cb0 c00240f8 0080 c04d1ac0 c01d1254 c0386210 c0386210 3f80: 0001 c00240f8 c04d1aac c04d1ac0 c01d246c 3fa0: c00240f8 c04d1aac c001ba90 c01d3240 c00240f8 3fc0: c001ba90 c002a334 0031 0170 c00240f8 3fe0: c0008578 c002b870 00ffed00 0077ef58 [c02321bc] (musb_platform_suspend+0x40/0x88) from [c0232210] (musb_platform_exit+0xc/0x20) [c0232210] (musb_platform_exit+0xc/0x20) from [c02315b0] (musb_free+0x60/0x94) [c02315b0] (musb_free+0x60/0x94) from [c001c644] (musb_probe+0xa14/0xaf8) [c001c644] (musb_probe+0xa14/0xaf8) from [c01d2fcc] (platform_drv_probe+0x18/0x1c) [c01d2fcc] (platform_drv_probe+0x18/0x1c) from [c01d2090] (driver_probe_device+0xa0/0x14c) [c01d2090] (driver_probe_device+0xa0/0x14c) from [c01d219c] (__driver_attach+0x60/0x84) [c01d219c] (__driver_attach+0x60/0x84) from [c01d1900] (bus_for_each_dev+0x44/0x74) [c01d1900] (bus_for_each_dev+0x44/0x74) from [c01d1254] (bus_add_driver+0xf4/0x284) [c01d1254] (bus_add_driver+0xf4/0x284) from [c01d246c] (driver_register+0xa8/0x130) [c01d246c] (driver_register+0xa8/0x130) from [c01d3240] (platform_driver_probe+0x18/0x68) [c01d3240] (platform_driver_probe+0x18/0x68) from [c002a334] (do_one_initcall+0x5c/0x1b4) [c002a334] (do_one_initcall+0x5c/0x1b4) from [c0008578] (kernel_init+0x90/0x10c) [c0008578] (kernel_init+0x90/0x10c) from [c002b870] (kernel_thread_exit+0x0/0x8) Code: e59f104c e384 ebf82651 e5940090 (e5903040) ---[ end trace 1b75b31a2719ed1c ]--- Kernel panic - not syncing: Attempted to kill init! INFO: RCU detected CPU 0 stall (t=1280 jiffies) -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v3 0/7] misc patches (for ioctl and ssi)
Hi Ameya, Hi Omar, On Tue, 2010-01-12 at 02:00 +0100, ext Omar Ramirez Luna wrote: Ioctl numbers has changed, this will require an update on libbridge and clients accesing directly to the driver - IO_ADDRESS is replaced for ioremap. *v3 - modified: DSPBRIDGE: replace IO_ADDRESS with ioremap, checking the result of ioremap (http://marc.info/?l=linux-omapm=126324914710445w=2). DSPBRIDGE: Use _IOxx macro to define ioctls (as per Nishanth comments) - new patch: DSPBRIDGE: remove WCD_Cmd structure *v2 - dropped from the series: DSPBRIDGE: Increased DMM size to 256MB DSPBRIDGE: sysfs entry for global driver state - will be kept in bridge-pm DSPBRIDGE: Use dspbridge to initialize platform data DSPBRIDGE: change to cpufreq_register_notifier for OPP changes DSPBRIDGE: Fix header locations mach to plat Where is the bridge-pm repository? I am trying to compile dspbridge branch with HEAD commit as: DSPBRIDGE: Use _IOxx macro to define ioctls. But compilation fails because of following missing commit: DSPBRIDGE: Fix header locations mach to plat Can you move this commit from bridge-pm to dspbridge so that dspbridge is in compilable state? This will break any attempt to compile dspbridge as is on LO. I have created dspbridge-pm, however patch set to compile this branch has just been sent as nobody reviewed it yet. For the patches please refer to: http://marc.info/?l=linux-omapm=126360672728600w=2 Dspbridge-pm at dev.omapzoom.org http://dev.omapzoom.org/?p=tidspbridge/kernel-dspbridge.git;a=shortlog;h=refs/heads/dspbridge-pm The branch was created on top of pm-2.6.32. Best Regards, omar -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 1/4] omap: Clean the serial port defines
Thanks for the nice cleanup.
snip
-Original Message-
From: linux-omap-ow...@vger.kernel.org
[mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Saturday, January 16, 2010 7:05 AM
To: linux-arm-ker...@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Subject: [PATCH 1/4] omap: Clean the serial port defines
This way we don't have conflicts with the defines
with compiling in multiple omaps. Set the addresses
for uarts in struct omap_globals for the early serial
init code.
Signed-off-by: Tony Lindgren t...@atomide.com
---
arch/arm/mach-omap1/include/mach/debug-macro.S | 16 +
arch/arm/mach-omap1/serial.c |6 ++-
arch/arm/mach-omap2/include/mach/debug-macro.S | 15
arch/arm/mach-omap2/serial.c | 15 ++--
arch/arm/plat-omap/common.c| 18 ++
arch/arm/plat-omap/include/plat/common.h |5 +++
arch/arm/plat-omap/include/plat/serial.h | 44
+---
7 files changed, 77 insertions(+), 42 deletions(-)
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S
b/arch/arm/mach-omap1/include/mach/debug-macro.S
index aedb746..23e4724 100644
--- a/arch/arm/mach-omap1/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap1/include/mach/debug-macro.S
@@ -11,6 +11,10 @@
...
diff --git a/arch/arm/mach-omap2/serial.c
b/arch/arm/mach-omap2/serial.c
index 837b347..21e51c5 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -74,7 +74,6 @@ static LIST_HEAD(uart_list);
...
diff --git a/arch/arm/plat-omap/include/plat/common.h
b/arch/arm/plat-omap/include/plat/common.h
index 32c2227..a8fa0d7 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -47,6 +47,10 @@ struct omap_globals {
void __iomem*prm; /* Power and Reset Management */
void __iomem*cm;/* Clock Management */
void __iomem*cm2;
+ unsigned long uart1_phys;
+ unsigned long uart2_phys;
+ unsigned long uart3_phys;
+ unsigned long uart4_phys;
Considering they are register base address, can
these be declared as void __iomem instead of unsigned long
Regards
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