RE: [GIT PULL] omap2 sparse fixes
-Original Message- From: Tony Lindgren [mailto:t...@atomide.com] Sent: Saturday, September 25, 2010 5:49 AM To: G, Manjunath Kondaiah Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org Subject: Re: [GIT PULL] omap2 sparse fixes * G, Manjunath Kondaiah manj...@ti.com [100924 12:33]: Tony, Here is new pull request which is rebased to 2.6.36-rc5. -Manjunath The following changes since commit b30a3f6257ed2105259b404d419b4964e363928c: Linus Torvalds (1): Linux 2.6.36-rc5 are available in the git repository at: git://dev.omapzoom.org/pub/scm/manju/kernel-omap3-dev.git sparse_fixes G, Manjunath Kondaiah (10): OMAP: mach-omap2: Fix incorrect assignment warnings OMAP: mach-omap2: Fix static declaration warnings OMAP: mach-omap2: Fix static function warnings OMAP: mach-omap2: Fix miscellaneous sparse warnings OMAP: plat-omap: Fix static function warnings OMAP: NAND: Fix static declaration warning TWL CORE: Fix sparse warning TWL IRQ: Fix fucntion declaration warnings OMAP2/3: Convert write/read functions to raw read/write OMAP3: Keypad: Fix incorrect type initializer Hmm tried pulling these, but ran into an issue where at least 2430 takes about a minute to boot with these patches with no output on the console intially. Can you please check that? Will not merge for now until we figure out what changes with these patches. Sure. I will check and verify this issue. Then, I also noticed the following exports getting added: +EXPORT_SYMBOL(omap2_gp_clockevent_set_gptimer); +EXPORT_SYMBOL(omapfb_reserve_sram); +EXPORT_SYMBOL(omap_sram_init); How about having it as extern functions in header file instead of exporting? -Manjunath -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] nand: omap2: Missing arg to gpmc_prefetch_reset()
-Original Message- From: Loïc Minier [mailto:loic.min...@linaro.org] Sent: Saturday, September 25, 2010 3:15 AM To: linux-...@lists.infradead.org; linux-omap@vger.kernel.org Cc: Tony Lindgren; Ghorai, Sukumar; Loïc Minier Subject: [PATCH] nand: omap2: Missing arg to gpmc_prefetch_reset() Fix missing cs arg to gpmc_prefetch_reset() when CONFIG_MTD_NAND_OMAP_PREFETCH_DMA=y which caused a build failure since 948d38e799f0ab87cf8ed9113fcdaaee61acf321: drivers/mtd/nand/omap2.c: In function 'omap_nand_dma_transfer': drivers/mtd/nand/omap2.c:416: error: too few arguments to function 'gpmc_prefetch_reset' Signed-off-by: Loïc Minier loic.min...@linaro.org --- drivers/mtd/nand/omap2.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 133d515..513e0a7 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -413,7 +413,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr, prefetch_status = gpmc_read_status(GPMC_PREFETCH_COUNT); } while (prefetch_status); /* disable and stop the PFPW engine */ - gpmc_prefetch_reset(); + gpmc_prefetch_reset(info-gpmc_cs); dma_unmap_single(info-pdev-dev, dma_addr, len, dir); return 0; -- 1.7.1 [Ghorai] Acked-by: Sukumar Ghorai s-gho...@ti.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC 2/5] OMAP: mux: Make low level function private
On 09/24/10 19:07, Anand Gadiyar wrote: -Original Message- From: Tim Nordell [mailto:tim.nord...@logicpd.com] Sent: Saturday, September 25, 2010 5:20 AM To: Gadiyar, Anand Cc: Benoit Cousson; linux-omap@vger.kernel.org; Tony Lindgren; Paul Walmsley; Kevin Hilman Subject: Re: [RFC 2/5] OMAP: mux: Make low level function private On 09/24/10 18:09, Gadiyar, Anand wrote: On Fri, Sep 24, 2010 at 2:45 PM, Benoit Cousson b-cous...@ti.com wrote: omap_mux_read / omap_mux_write should not be accessed directly outside the mux framework. Do we really have use case that require dynamic mux change beside GPIO? Only case I can think of is for any workarounds for issues that turn up. No such cases exist today on OMAP3 at least, and none are likely to appear in future (I hope). So your assumption is valid. We have a use-case here - granted the code currently is a complete hack and not something clean enough for the mainline kernel. We recently rediscovered the USB3320 PHY suspend issue that is in the errata on the OMAP35x platform (Advisory 3.1.1.193) and we came up with a workaround for it (despite the errata saying there isn't any) where essentially we do: 1) Allow the EHCI controller to suspend the PHY as normal 2) Cut the power to the USB host controller using power domains. This resets the logic states in the USB host controller so that it is usable again. 3) Remux all the pins talking to the PHY into GPIO mode 4) Monitor said pins for changes in status to know when a remote wakeup request occurs 5) Remux pins back to USB PHY mode 6) Reenable power to the USB host controller and reinitialize registers We've tried this technique before - you still need to re-enumerate after the resume, right? So you might as well just power down the PHY and you should be able to recover. Ajay Gupta did a lot of work on this - not sure if this worked well. We basically gave up on this interoperability issue and decided to work around it in newer silicon. 3630 ES1.1 and later has suspend-resume working with the SMSC PHY. So, currently our patch to our local kernel essentially the downstream device is reset-resumed. We needed to be able to support USB suspend with it waking up when a device is plugged into our USB port. Since we allow the PHY to suspend (rather than holding it in reset) and we're monitoring the PHY pins via GPIO we can wake up the USB subsystem when device is plugged into the system. It works well enough that the USB subsystem comes up immediately after we plug in a device, and that it supports suspension without a device. I've even done some tests where I did a remote wakeup with a HID device (mouse button clicks) and some of the time the device would end up being reenumerated, and sometimes a reset-resume, so our current hack isn't perfect, but it does allow what we were mainly aiming for - being able to wake up the USB subsystem when a device is plugged in. That actually is working quite well with our current hack. I should note that our hardware has a permanent hub downstream of the USB3320 phy - not sure if this makes any difference in terms of the behavior of the PHY and doing GPIO against it. And yes, you're right that newer silicon might work better with the PHY, but we also had hardware that was designed with the problematic PHY before we were aware of the errata. Having something that performs the minimum functionality we needed is better than nothing. - Tim -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[GIT PULL] OMAP: clock/CM/PRM/SCM updates for OMAP4 ES2, OMAP3 CORE DVFS fix: for 2.6.37
Hi Tony, The following changes since commit b30a3f6257ed2105259b404d419b4964e363928c: Linux 2.6.36-rc5 (2010-09-20 16:56:53 -0700) are available in the git repository at: git://git.pwsan.com/linux-2.6 omap4_and_sdrc_2.6.27 Benoit Cousson (9): OMAP: hwmod: Rename dma_ch to dma_req OMAP: hwmod: Do not disable clocks if hwmod already in idle OMAP4: prcm: Add temporarily helper functions for rmw and read inside the PRM OMAP: hwmod: Force a softreset during _setup OMAP: hwmod: Fix softreset status check for some new OMAP4 IPs OMAP: hwmod: Fix softreset for modules with optional clocks OMAP4: clock: Fix clock names and align with hwmod names OMAP4: clock: Add optional clock nodes OMAP4: clocks: Fix ES2 clock issues Benoît Cousson (2): OMAP4: PRM: add module hard reset support OMAP: hwmod: Add hardreset management support Jon Hunter (1): omap3: Prevent SDRC deadlock when L3 is changing frequency Kevin Hilman (1): OMAP: hwmod: separate list locking and hwmod hardware locking Liam Girdwood (1): OMAP: hwmod: Fix omap_hwmod_reset wrong state test Partha Basak (1): OMAP: hwmod: Handle opt clocks node using clk_add_alias Paul Walmsley (3): OMAP2/3: PRM: add module hard reset support OMAP: hwmod: add an hardreset API for use by other core code OMAP: hwmod: improve documentation, clean up function names Rajeev Kulkarni (1): OMAP4: prcm: Fix global warm reset bit position Rajendra Nayak (5): OMAP: hwmod: Enable module wakeup if in smartidle OMAP4: clocks: Update clock tree for ES2 OMAP4: CM PRM: Update PRCM register bitshifts and masks for ES2 OMAP4: PM: Define additional registers for ES2 OMAP4: powerdomain: Update DSS logic state for ES2 Santosh Shilimkar (4): omap4: control: Add ctrl_pad_base to omap_globals omap4: control: Add accessor api's for pad control module omap4: control: Add the register definition headers omap4: control: Fix the control module register accesses arch/arm/mach-omap2/Makefile |4 +- arch/arm/mach-omap2/clock44xx_data.c | 1310 +++--- arch/arm/mach-omap2/cm-regbits-44xx.h | 1287 ++- arch/arm/mach-omap2/cm44xx.h | 90 ++- arch/arm/mach-omap2/control.c | 25 + arch/arm/mach-omap2/hsmmc.c| 67 +- arch/arm/mach-omap2/id.c |2 +- .../include/mach/ctrl_module_core_44xx.h | 391 ++ .../include/mach/ctrl_module_pad_core_44xx.h | 1409 .../include/mach/ctrl_module_pad_wkup_44xx.h | 236 .../include/mach/ctrl_module_wkup_44xx.h | 92 ++ arch/arm/mach-omap2/omap_hwmod.c | 562 +++-- arch/arm/mach-omap2/powerdomains44xx.h |2 +- arch/arm/mach-omap2/prcm.c | 29 +- arch/arm/mach-omap2/prm-regbits-44xx.h | 1314 ++- arch/arm/mach-omap2/prm.h | 18 +- arch/arm/mach-omap2/prm2xxx_3xxx.c | 110 ++ arch/arm/mach-omap2/prm44xx.c | 116 ++ arch/arm/mach-omap2/prm44xx.h | 14 +- arch/arm/mach-omap2/sram34xx.S |6 +- arch/arm/plat-omap/common.c|3 +- arch/arm/plat-omap/include/plat/common.h |1 + arch/arm/plat-omap/include/plat/control.h | 31 +- arch/arm/plat-omap/include/plat/omap_hwmod.h | 55 +- arch/arm/plat-omap/include/plat/powerdomain.h |1 + arch/arm/plat-omap/include/plat/prcm.h |2 + arch/arm/plat-omap/omap_device.c | 43 +- 27 files changed, 5328 insertions(+), 1892 deletions(-) create mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h create mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h create mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_pad_wkup_44xx.h create mode 100644 arch/arm/mach-omap2/include/mach/ctrl_module_wkup_44xx.h create mode 100644 arch/arm/mach-omap2/prm2xxx_3xxx.c create mode 100644 arch/arm/mach-omap2/prm44xx.c - Paul
[PATCH RFC:] FIX: OMAP3EVM: Ethernet controller smsc911x reset
Do reset of Ethernet controller smsc911x using OMAP gpio7
while initializing the Ethernet controller.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c
b/arch/arm/mach-omap2/board-omap3evm.c
index f76d9c0..54a7e20 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -55,6 +55,7 @@
#define OMAP3EVM_ETHR_SIZE 1024
#define OMAP3EVM_ETHR_ID_REV 0x50
#define OMAP3EVM_ETHR_GPIO_IRQ 176
+#define OMAP3EVM_ETHR_GPIO_RST 7
#define OMAP3EVM_SMSC911X_CS 5
static u8 omap3_evm_version;
@@ -134,6 +135,20 @@ static inline void __init omap3evm_init_smsc911x(void)
else
rate = clk_get_rate(l3ck);
+ /* Configure ethernet controller reset gpio */
+ if (gpio_request(OMAP3EVM_ETHR_GPIO_RST, SMSC911x gpio) 0) {
+ pr_err(KERN_ERR Failed to request GPIO8 for smsc911x gpio\n);
+ return;
+ }
+
+ gpio_direction_output(OMAP3EVM_ETHR_GPIO_RST, 1);
+
+ /* reset pulse to ethernet controller*/
+ gpio_set_value(OMAP3EVM_ETHR_GPIO_RST, 0);
+ usleep_range(150, 220);
+ gpio_set_value(OMAP3EVM_ETHR_GPIO_RST, 1);
+ usleep_range(1, 2);
+
if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, SMSC911x irq) 0) {
printk(KERN_ERR Failed to request GPIO%d for smsc911x IRQ\n,
OMAP3EVM_ETHR_GPIO_IRQ);
--
1.7.0.4
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RE: [PATCH RFC:] FIX: OMAP3EVM: Ethernet controller smsc911x reset
Sanjeev,
With GPIO hwmod series, OMAP3EVM board is not up with DHCP + nfs root.
This issue was reported by Kevin.
The root cause of this issue is that during OMAP3EVM board init, the
Ethernet controller (smsc911x) is not reset and it relies on the uboot
configurations for it's operations. The reset GPIO pin used for this
purpose is not even reserved.
After gpio hmwod series are merged, this patch is required to make the
EVM board working. Also omap3evm_init_smsc911x() needs to be fixed
including CS settings and other required settings for Ethernet controller.
Links to related discussions:
http://www.spinics.net/lists/linux-omap/msg37234.html
http://www.spinics.net/lists/linux-omap/msg36698.html
http://www.spinics.net/lists/linux-omap/msg36799.html
The below patch is tested on OMAP3 EVM board (ES3.1).
Thanks,
V Charulatha
-Original Message-
From: Varadarajan, Charulatha
Sent: Saturday, September 25, 2010 5:07 PM
To: linux-omap@vger.kernel.org
Cc: khil...@deeprootsystems.com; t...@atomide.com; Premi, Sanjeev;
Varadarajan, Charulatha
Subject: [PATCH RFC:] FIX: OMAP3EVM: Ethernet controller smsc911x reset
Do reset of Ethernet controller smsc911x using OMAP gpio7
while initializing the Ethernet controller.
Signed-off-by: Charulatha V ch...@ti.com
---
arch/arm/mach-omap2/board-omap3evm.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-
omap2/board-omap3evm.c
index f76d9c0..54a7e20 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -55,6 +55,7 @@
#define OMAP3EVM_ETHR_SIZE 1024
#define OMAP3EVM_ETHR_ID_REV 0x50
#define OMAP3EVM_ETHR_GPIO_IRQ 176
+#define OMAP3EVM_ETHR_GPIO_RST 7
#define OMAP3EVM_SMSC911X_CS 5
static u8 omap3_evm_version;
@@ -134,6 +135,20 @@ static inline void __init
omap3evm_init_smsc911x(void)
else
rate = clk_get_rate(l3ck);
+ /* Configure ethernet controller reset gpio */
+ if (gpio_request(OMAP3EVM_ETHR_GPIO_RST, SMSC911x gpio) 0) {
+ pr_err(KERN_ERR Failed to request GPIO8 for smsc911x
gpio\n);
+ return;
+ }
+
+ gpio_direction_output(OMAP3EVM_ETHR_GPIO_RST, 1);
+
+ /* reset pulse to ethernet controller*/
+ gpio_set_value(OMAP3EVM_ETHR_GPIO_RST, 0);
+ usleep_range(150, 220);
+ gpio_set_value(OMAP3EVM_ETHR_GPIO_RST, 1);
+ usleep_range(1, 2);
+
if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, SMSC911x irq) 0) {
printk(KERN_ERR Failed to request GPIO%d for smsc911x IRQ\n,
OMAP3EVM_ETHR_GPIO_IRQ);
--
1.7.0.4
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RE: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
Kevin,
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Sent: Saturday, September 25, 2010 12:07 AM
To: Varadarajan, Charulatha; Premi, Sanjeev
Cc: t...@atomide.com; linux-omap@vger.kernel.org; p...@pwsan.com; Cousson,
Benoit; Nayak, Rajendra; Basak, Partha
Subject: Re: [PATCH v6 00/13] OMAP: GPIO: Implement GPIO in hwmod way
Varadarajan, Charulatha ch...@ti.com writes:
Aha. Thanks for digging into this.
Now it makes sense why it worked for SDP and overo, but not omap3evm.
Relying too much on bootloader settings is definitely a bug in the board
file. Since we understand it, I am OK if your series breaks this board
support.
Thanks. Would send the new series of GPIO hwmod patches as per our latest
alignment soon.
With GPIO hwmod series, gpio module reset happens during init and hence
the uboot settings are modified which makes the Ethernet controller to
fail.
Patch [1] below if applied on top of gpio hwmod series would make the
evm board work with DHCP and nfsroot.
Indeed, I verified that this method works, although maybe I have an
older board with a reset line that is not in GPIO1, because setting the
flag in GPIO1 didn't work. I blindly set it in all the banks, and got
my board working.
Okay. Something similar must be the reason. Let us get the OMAP3 EVM
Ethernet Controller initialization fixed.
Rather, patch [2] below would be a better fix for this. I am not
getting deeper into the minor details of Ethernet controller
initialization for OMAP3 EVM board. This patch would suffice for
now. But my observation is that omap3evm_init_smsc911x() needs to be
fixed including CS configuration and other required settings for
Ethernet controller.
Yes, patch 2 is the better approach (although, I couldn't get it to work
for me.) I suggest you raise this with Sanjeev and post your patch 2 as
an RFC to
the list saying that something like this will be needed after your GPIO
series. We'll let Sanjeev or someone on his team fix omap3evm support,
being sure it works for older boards as well.
Posted. See [a]
snip
+ /* Configure ethernet controller reset gpio */
+ if (gpio_request(OMAP3EVM_ETHR_GPIO_RST, SMSC911x gpio) 0) {
+ pr_err(KERN_ERR Failed to request GPIO8 for smsc911x
gpio\n);
+ return;
+ }
This request has to come before you set the direction and set the value.
My bad :-(
I had sent wrong patch by mistake.
-V Charulatha
[a] https://patchwork.kernel.org/patch/208892/
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RE: [PATCH v7 4/6] OMAP4: hwmod data: Add watchdog timer
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Cousson, Benoit b-cous...@ti.com writes:
On 9/21/2010 3:37 PM, Varadarajan, Charulatha wrote:
[...]
static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
/* dmm class */
omap44xx_dmm_hwmod,
@@ -472,6 +602,11 @@ static __initdata struct omap_hwmod
*omap44xx_hwmods[] = {
/* mpu class */
omap44xx_mpu_hwmod,
+ /* wd_timer class */
+ omap44xx_wd_timer2_hwmod,
+
+ /* wd_timer3 not yet supported */
+/*omap44xx_wd_timer3_hwmod, */
Sorry, I forgot to comment that part in your previous revision.
What we agreed with Kevin is to enable that hwmod watchdog as well in
order to allow the hwmod core to initialize properly this module, even
if it not used by any driver yet.
Beside that you can add my Acked-by: for the whole series.
Charu,
If this is OK with you, can you test with timer3 hwmod enabled, and
repost an updated version of this patch?
Then, I will add Benoit's ack and queue this up for 2.6.37.
Already posted the series with this review comment fixed [1].
The latest series (version v8) [1] may also be pulled from [2]
[1] https://patchwork.kernel.org/patch/202152/
[2] git://gitorious.org/omap-pm/linux.git wdt_for_2.6.37
-V Charulatha
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[PATCH v2 00/11] OMAP4: Smartreflex and Voltage layer support
This patch series adds support for OMAP4 support in the smartreflex and voltage layer. The series involves extensions to voltage layer and smartreflex layer for supporting OMAP4. In addition it involves changes to pm debugfs layer to support OMAP4 so that smartreflex and voltage debug entries can be viewed, changes in opp layer so that opp layer gets enabled for OMAP4, some changes in OMAP4 clock database and finally addition of OMAP4 opp tables. All these patches might not be dependent on voltage and smartreflex layer but is required for the correct functionality of these layers for OMAP4. This series in based off origin/pm-core and origin/pm-opp branches off Kevin Hilman' PM tree. But for this series to compile and work properly one will have to apply the following additional patches also. http://dev.omapzoom.org/?p=santosh/kernel-omap4-base.git;a=summary branch - omap4_scm_2.6.37 http://marc.info/?l=linux-omapm=128516673609816w=2 All these patches are also available at http://dev.omapzoom.org/?p=thara/omap-dvfs.git;a=summary head: thara-pm-sr This patch series has been tested on OMAP4430 SDP with omap3_defconfig and omap_4430dsp_defconfig with the following menuconfig options enabled System type - TI OMAP Implementations - Smartreflex Support System type - TI OMAP Implementations - Class 3 mode of Smartreflex Implementation Benoit Cousson (1): OMAP4: hwmod: Add inital data for smartreflex modules. Thara Gopinath (10): OMAP4: PM debugfs support OMAP4: OPP framework support OMAP4: Add the new voltage to vsel calculation formula OMAP4: Extend clock data. OMAP4: Adding voltage driver support OMAP4: PM: Program correct init voltages for scalable VDDs OMAP4: Adding dev atrributes to OMAP4 smartreflex hwmod data OMAP4: Smartreflex framework extensions OMAP4: Enabling smartrefles class 3 driver. OMAP4: Add opp tables. arch/arm/mach-omap2/Makefile |3 +- arch/arm/mach-omap2/board-4430sdp.c|2 + arch/arm/mach-omap2/clock44xx_data.c | 40 - arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 219 arch/arm/mach-omap2/opp44xx_data.c | 99 + arch/arm/mach-omap2/pm-debug.c | 28 ++-- arch/arm/mach-omap2/pm.c |5 + arch/arm/mach-omap2/pm.h |1 + arch/arm/mach-omap2/smartreflex.c |8 +- arch/arm/mach-omap2/sr_device.c| 15 ++- arch/arm/mach-omap2/voltage.c | 211 ++- arch/arm/plat-omap/Kconfig |2 +- arch/arm/plat-omap/Makefile|1 + arch/arm/plat-omap/include/plat/control.h | 12 ++ arch/arm/plat-omap/include/plat/voltage.h | 20 +++- arch/arm/plat-omap/opp_twl_tps.c | 71 + 16 files changed, 707 insertions(+), 30 deletions(-) create mode 100644 arch/arm/mach-omap2/opp44xx_data.c -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 01/11] OMAP4: PM debugfs support
This patch extends pm debugfs to support OMAP4 debug entries
also. Currently PM register dump support is not added for OMAP4.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/pm-debug.c | 28 +++-
1 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 7d95112..29ca4b4 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -617,7 +617,7 @@ static int __init pm_dbg_init(void)
if (cpu_is_omap34xx())
pm_dbg_reg_modules = omap3_pm_reg_modules;
- else {
+ else if (!cpu_is_omap44xx()) {
printk(KERN_ERR %s: only OMAP3 supported\n, __func__);
return -ENODEV;
}
@@ -633,20 +633,22 @@ static int __init pm_dbg_init(void)
pwrdm_for_each(pwrdms_setup, (void *)d);
- pm_dbg_dir = debugfs_create_dir(registers, d);
- if (IS_ERR(pm_dbg_dir))
- return PTR_ERR(pm_dbg_dir);
+ if (cpu_is_omap34xx()) {
+ pm_dbg_dir = debugfs_create_dir(registers, d);
+ if (IS_ERR(pm_dbg_dir))
+ return PTR_ERR(pm_dbg_dir);
- (void) debugfs_create_file(current, S_IRUGO,
- pm_dbg_dir, (void *)0, debug_reg_fops);
+ (void) debugfs_create_file(current, S_IRUGO,
+ pm_dbg_dir, (void *)0, debug_reg_fops);
- for (i = 0; i PM_DBG_MAX_REG_SETS; i++)
- if (pm_dbg_reg_set[i] != NULL) {
- sprintf(name, %d, i+1);
- (void) debugfs_create_file(name, S_IRUGO,
- pm_dbg_dir, (void *)(i+1), debug_reg_fops);
-
- }
+ for (i = 0; i PM_DBG_MAX_REG_SETS; i++)
+ if (pm_dbg_reg_set[i] != NULL) {
+ sprintf(name, %d, i+1);
+ (void) debugfs_create_file(name, S_IRUGO,
+ pm_dbg_dir, (void *)(i+1),
+ debug_reg_fops);
+ }
+ }
(void) debugfs_create_file(enable_off_mode, S_IRUGO | S_IWUGO, d,
enable_off_mode, pm_dbg_option_fops);
--
1.7.0.4
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[PATCH v2 08/11] OMAP4: Adding dev atrributes to OMAP4 smartreflex hwmod data
This patch adds dev attributes for smartreflex modules
in the OMAP4 hwmod database. This patch also updates the
smartreflex rev in the smartreflex class data structure
in the OMAP4 hwmod database.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 56
arch/arm/plat-omap/include/plat/control.h | 12 ++
2 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index ba3c215..82657b5 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -22,6 +22,8 @@
#include plat/omap_hwmod.h
#include plat/cpu.h
+#include plat/smartreflex.h
+#include plat/control.h
#include omap_hwmod_common_data.h
@@ -474,6 +476,7 @@ static struct omap_hwmod_class_sysconfig
omap44xx_smartreflex_sysc = {
static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
.name = smartreflex,
.sysc = omap44xx_smartreflex_sysc,
+ .rev = 2,
};
/* smartreflex_core */
@@ -505,6 +508,22 @@ static struct omap_hwmod_ocp_if
*omap44xx_smartreflex_core_slaves[] = {
omap44xx_l4_cfg__smartreflex_core,
};
+static u32 omap44xx_sr_core_efuse_offs[] = {
+ OMAP44XX_CONTROL_FUSE_CORE_OPP50, OMAP44XX_CONTROL_FUSE_CORE_OPP100,
+};
+
+static u32 omap44xx_sr_core_test_nvalues[] = {
+ 0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_core_dev_attr = {
+ .efuse_nvalues_offs = omap44xx_sr_core_efuse_offs,
+ .test_sennenable= 0x1,
+ .test_senpenable= 0x1,
+ .test_nvalues = omap44xx_sr_core_test_nvalues,
+ .vdd_name = core
+};
+
static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
.name = smartreflex_core,
.class = omap44xx_smartreflex_hwmod_class,
@@ -518,6 +537,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
},
.slaves = omap44xx_smartreflex_core_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
+ .dev_attr = omap44xx_sr_core_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -550,6 +570,23 @@ static struct omap_hwmod_ocp_if
*omap44xx_smartreflex_iva_slaves[] = {
omap44xx_l4_cfg__smartreflex_iva,
};
+static u32 omap44xx_sr_iva_efuse_offs[] = {
+ OMAP44XX_CONTROL_FUSE_IVA_OPP50, OMAP44XX_CONTROL_FUSE_IVA_OPP100,
+ OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO,
+};
+
+static u32 omap44xx_sr_iva_test_nvalues[] = {
+ 0x0, 0x0, 0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_iva_dev_attr = {
+ .efuse_nvalues_offs = omap44xx_sr_iva_efuse_offs,
+ .test_sennenable= 0x1,
+ .test_senpenable= 0x1,
+ .test_nvalues = omap44xx_sr_iva_test_nvalues,
+ .vdd_name = iva
+};
+
static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
.name = smartreflex_iva,
.class = omap44xx_smartreflex_hwmod_class,
@@ -563,6 +600,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
},
.slaves = omap44xx_smartreflex_iva_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
+ .dev_attr = omap44xx_sr_iva_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
@@ -595,6 +633,23 @@ static struct omap_hwmod_ocp_if
*omap44xx_smartreflex_mpu_slaves[] = {
omap44xx_l4_cfg__smartreflex_mpu,
};
+static u32 omap44xx_sr_mpu_efuse_offs[] = {
+ OMAP44XX_CONTROL_FUSE_MPU_OPP50, OMAP44XX_CONTROL_FUSE_MPU_OPP100,
+ OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO,
+};
+
+static u32 omap44xx_sr_mpu_test_nvalues[] = {
+ 0x0, 0x0, 0x0, 0x0
+};
+
+static struct omap_sr_dev_data omap44xx_sr_mpu_dev_attr = {
+ .efuse_nvalues_offs = omap44xx_sr_mpu_efuse_offs,
+ .test_sennenable= 0x1,
+ .test_senpenable= 0x1,
+ .test_nvalues = omap44xx_sr_mpu_test_nvalues,
+ .vdd_name = mpu
+};
+
static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
.name = smartreflex_mpu,
.class = omap44xx_smartreflex_hwmod_class,
@@ -608,6 +663,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
},
.slaves = omap44xx_smartreflex_mpu_slaves,
.slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
+ .dev_attr = omap44xx_sr_mpu_dev_attr,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
diff --git a/arch/arm/plat-omap/include/plat/control.h
b/arch/arm/plat-omap/include/plat/control.h
index 042eb6e..1e8f6ec 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -181,6 +181,18 @@
#define
[PATCH v2 03/11] OMAP4: Add the new voltage to vsel calculation formula
TWL6030 the power IC used along with OMAP4 in OMAP4 SDPs,
blaze boards and panda boards has a different formula
from that of TWL4030 for voltage to vsel and
vsel to voltage calculation. This patch implements the new
formula depending on the PMIC type.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/plat-omap/opp_twl_tps.c | 71 ++
1 files changed, 71 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/opp_twl_tps.c b/arch/arm/plat-omap/opp_twl_tps.c
index 4448fc5..358b67b 100644
--- a/arch/arm/plat-omap/opp_twl_tps.c
+++ b/arch/arm/plat-omap/opp_twl_tps.c
@@ -15,9 +15,16 @@
#include linux/module.h
+#include linux/i2c/twl.h
+
#include plat/opp_twl_tps.h
#include plat/voltage.h
+static bool is_offset_valid;
+static u8 smps_offset;
+
+#define REG_SMPS_OFFSET 0xE0
+
/**
* omap_twl_vsel_to_vdc - convert TWL/TPS VSEL value to microvolts DC
* @vsel: TWL/TPS VSEL value to convert
@@ -27,6 +34,38 @@
*/
unsigned long omap_twl_vsel_to_uv(const u8 vsel)
{
+ if (twl_class_is_6030()) {
+ /*
+* In TWL6030 depending on the value of SMPS_OFFSET
+* efuse register the voltage range supported in
+* standard mode can be either between 0.6V - 1.3V or
+* 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
+* is programmed to all 0's where as starting from
+* TWL6030 ES1.1 the efuse is programmed to 1
+*/
+ if (!is_offset_valid) {
+ twl_i2c_read_u8(TWL6030_MODULE_ID0, smps_offset, 0xE0);
+ is_offset_valid = true;
+ }
+
+ if (smps_offset 0x8) {
+ return vsel - 1) * 125) + 7000)) * 100;
+ } else {
+ /*
+* In case of the supported voltage range being
+* between 0.6V - 1.3V, there is not specific
+* formula for voltage to vsel conversion above
+* 1.3V. There are special hardcoded values for
+* voltages above 1.3V. Currently we are hardcodig
+* only for 1.35 V which is used for 1GH OPP for
+* OMAP4430.
+*/
+ if (vsel == 0x3A)
+ return 135;
+ return vsel - 1) * 125) + 6000)) * 100;
+ }
+ }
+
return (((vsel * 125) + 6000)) * 100;
}
@@ -40,6 +79,38 @@ unsigned long omap_twl_vsel_to_uv(const u8 vsel)
u8 omap_twl_uv_to_vsel(unsigned long uv)
{
/* Round up to higher voltage */
+ if (twl_class_is_6030()) {
+ /*
+* In TWL6030 depending on the value of SMPS_OFFSET
+* efuse register the voltage range supported in
+* standard mode can be either between 0.6V - 1.3V or
+* 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
+* is programmed to all 0's where as starting from
+* TWL6030 ES1.1 the efuse is programmed to 1
+*/
+ if (!is_offset_valid) {
+ twl_i2c_read_u8(TWL6030_MODULE_ID0, smps_offset, 0xE0);
+ is_offset_valid = true;
+ }
+
+ if (smps_offset 0x8) {
+ return DIV_ROUND_UP(uv - 70, 12500) + 1;
+ } else {
+ /*
+* In case of the supported voltage range being
+* between 0.6V - 1.3V, there is not specific
+* formula for voltage to vsel conversion above
+* 1.3V. There are special hardcoded values for
+* voltages above 1.3V. Currently we are hardcodig
+* only for 1.35 V which is used for 1GH OPP for
+* OMAP4430.
+*/
+ if (uv == 135)
+ return 0x3A;
+ return DIV_ROUND_UP(uv - 60, 12500) + 1;
+ }
+ }
+
return DIV_ROUND_UP(uv - 60, 12500);
}
--
1.7.0.4
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[PATCH v2 06/11] OMAP4: PM: Program correct init voltages for scalable VDDs
By default the system boots up at nominal voltage for every
voltage domain in the system. This patch puts vdd_mpu, vdd_iva
and vdd_core to the correct boot up voltage as per the opp tables
specified. This patch implements this by matching the rate of
the main clock of the voltage domain with the opp table and
picking up the correct voltage.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/pm.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 9ba2c5f..0e03ea0 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -207,6 +207,10 @@ static int __init omap2_common_pm_init(void)
omap3_pm_init_opp_table();
omap2_set_init_voltage(mpu, dpll1_ck, mpu_dev);
omap2_set_init_voltage(core, l3_ick, l3_dev);
+ } else if (cpu_is_omap44xx()) {
+ omap2_set_init_voltage(mpu, dpll_mpu_ck, mpu_dev);
+ omap2_set_init_voltage(core, l3_div_ck, l3_dev);
+ omap2_set_init_voltage(iva, dpll_iva_m5x2_ck, iva_dev);
}
omap_pm_if_init();
--
1.7.0.4
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[PATCH v2 02/11] OMAP4: OPP framework support
This patch allows the compilation of the generic opp layer for OMAP4 also. Signed-off-by: Thara Gopinath th...@ti.com --- arch/arm/plat-omap/Makefile |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 852fa33..cbf8f2e 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o # OPP support in (OMAP3+ only at the moment) ifdef CONFIG_PM obj-$(CONFIG_ARCH_OMAP3) += opp.o +obj-$(CONFIG_ARCH_OMAP4) += opp.o obj-$(CONFIG_TWL4030_CORE) += opp_twl_tps.o endif -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v2 11/11] OMAP4: Add opp tables.
This patch adds OPP tables for OMAP4. A new file
opp44xx_data.c has been introduced to keep the OMAP4
opp tables and the registeration of these tables with
the generic opp framework.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/opp44xx_data.c | 99
arch/arm/mach-omap2/pm.c |1 +
arch/arm/mach-omap2/pm.h |1 +
4 files changed, 103 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/opp44xx_data.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index b18d171..dce7e3b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -52,7 +52,8 @@ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
cpuidle34xx.o pm_bus.o
-obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o voltage.o pm_bus.o
+obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o voltage.o pm_bus.o \
+ opp44xx_data.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/opp44xx_data.c
b/arch/arm/mach-omap2/opp44xx_data.c
new file mode 100644
index 000..90aa4c4
--- /dev/null
+++ b/arch/arm/mach-omap2/opp44xx_data.c
@@ -0,0 +1,99 @@
+/*
+ * OMAP4 OPP table definitions.
+ *
+ * Copyright (C) 2009 - 2010 Texas Instruments Incorporated.
+ * Nishanth Menon
+ * Copyright (C) 2009 - 2010 Deep Root Systems, LLC.
+ * Kevin Hilman
+ * Copyright (C) 2010 Nokia Corporation.
+ * Eduardo Valentin
+ * Copyright (C) 2010 Texas Instruments Incorporated.
+ * Thara Gopinath
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ * History:
+ */
+
+#include linux/module.h
+#include linux/err.h
+
+#include plat/opp.h
+#include plat/cpu.h
+#include plat/omap_device.h
+
+static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
+ /* MPU OPP1 - OPP50 */
+ OMAP_OPP_DEF(mpu, true, 3, 93),
+ /* MPU OPP2 - OPP100 */
+ OMAP_OPP_DEF(mpu, true, 6, 110),
+ /* MPU OPP3 - OPP-Turbo */
+ OMAP_OPP_DEF(mpu, true, 8, 126),
+ /* MPU OPP4 - OPP-SB */
+ OMAP_OPP_DEF(mpu, true, 100800, 135),
+ /* IVA OPP1 - OPP50 */
+ OMAP_OPP_DEF(iva, true, 13300, 93),
+ /* IVA OPP2 - OPP100 */
+ OMAP_OPP_DEF(iva, true, 26600, 110),
+ /* IVA OPP3 - OPP-Turbo */
+ OMAP_OPP_DEF(iva, false, 33200, 126),
+ /* L3 OPP1 - OPP50 */
+ OMAP_OPP_DEF(l3_main_1, true, 1, 93),
+ /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
+ OMAP_OPP_DEF(l3_main_1, true, 2, 110),
+};
+
+static u32 omap44xx_opp_def_size = ARRAY_SIZE(omap44xx_opp_def_list);
+
+/* Temp variable to allow multiple calls */
+static u8 __initdata omap4_table_init;
+
+
+int __init omap4_pm_init_opp_table(void)
+{
+ struct omap_opp_def *opp_def;
+ int i, r;
+
+ /*
+* Allow multiple calls, but initialize only if not already initalized
+* even if the previous call failed, coz, no reason we'd succeed again
+*/
+ if (omap4_table_init)
+ return 0;
+
+ omap4_table_init = 1;
+
+ opp_def = omap44xx_opp_def_list;
+
+ for (i = 0; i omap44xx_opp_def_size; i++) {
+ struct omap_hwmod *oh;
+ struct device *dev;
+
+ if (!opp_def-hwmod_name) {
+ pr_err(%s: missing name of omap_hwmod in opp data\n,
+ __func__);
+ opp_def++;
+ continue;
+ }
+
+ oh = omap_hwmod_lookup(opp_def-hwmod_name);
+ if (!oh || !oh-od) {
+ pr_warn(%s: no hwmod or odev for %s.Cannot add OPP\n,
+ __func__, opp_def-hwmod_name);
+ opp_def++;
+ continue;
+ }
+
+ dev = oh-od-pdev.dev;
+ r = opp_add(dev, opp_def++);
+ if (r)
+ pr_err(unable to add OPP %ld Hz for %s\n,
+ opp_def-freq, opp_def-hwmod_name);
+ }
+ return 0;
+}
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index
[PATCH v2 04/11] OMAP4: Extend clock data.
This patch extends the OMAP4 clock data to include
various x2 clockc nodes as the clock framework
skips a *2 whie calculating the dpll locked frequency.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/clock44xx_data.c | 40 +++--
1 files changed, 32 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index edf2c28..3652fda 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -481,14 +481,21 @@ static struct clk dpll_core_m5_ck = {
.set_rate = omap2_clksel_set_rate,
};
+static struct clk dpll_core_m5x2_ck = {
+ .name = dpll_core_m5x2_ck,
+ .parent = dpll_core_m5_ck,
+ .ops= clkops_null,
+ .recalc = omap3_clkoutx2_recalc,
+};
+
static const struct clksel div_core_div[] = {
- { .parent = dpll_core_m5_ck, .rates = div2_1to2_rates },
+ { .parent = dpll_core_m5x2_ck, .rates = div2_1to2_rates },
{ .parent = NULL },
};
static struct clk div_core_ck = {
.name = div_core_ck,
- .parent = dpll_core_m5_ck,
+ .parent = dpll_core_m5x2_ck,
.clksel = div_core_div,
.clksel_reg = OMAP4430_CM_CLKSEL_CORE,
.clksel_mask= OMAP4430_CLKSEL_CORE_MASK,
@@ -507,13 +514,13 @@ static const struct clksel_rate div4_1to8_rates[] = {
};
static const struct clksel div_iva_hs_clk_div[] = {
- { .parent = dpll_core_m5_ck, .rates = div4_1to8_rates },
+ { .parent = dpll_core_m5x2_ck, .rates = div4_1to8_rates },
{ .parent = NULL },
};
static struct clk div_iva_hs_clk = {
.name = div_iva_hs_clk,
- .parent = dpll_core_m5_ck,
+ .parent = dpll_core_m5x2_ck,
.clksel = div_iva_hs_clk_div,
.clksel_reg = OMAP4430_CM_BYPCLK_DPLL_IVA,
.clksel_mask= OMAP4430_CLKSEL_0_1_MASK,
@@ -525,7 +532,7 @@ static struct clk div_iva_hs_clk = {
static struct clk div_mpu_hs_clk = {
.name = div_mpu_hs_clk,
- .parent = dpll_core_m5_ck,
+ .parent = dpll_core_m5x2_ck,
.clksel = div_iva_hs_clk_div,
.clksel_reg = OMAP4430_CM_BYPCLK_DPLL_MPU,
.clksel_mask= OMAP4430_CLKSEL_0_1_MASK,
@@ -651,6 +658,13 @@ static struct clk dpll_iva_m4_ck = {
.set_rate = omap2_clksel_set_rate,
};
+static struct clk dpll_iva_m4x2_ck = {
+ .name = dpll_iva_m4x2_ck,
+ .parent = dpll_iva_m4_ck,
+ .ops= clkops_null,
+ .recalc = omap3_clkoutx2_recalc,
+};
+
static struct clk dpll_iva_m5_ck = {
.name = dpll_iva_m5_ck,
.parent = dpll_iva_ck,
@@ -663,6 +677,13 @@ static struct clk dpll_iva_m5_ck = {
.set_rate = omap2_clksel_set_rate,
};
+static struct clk dpll_iva_m5x2_ck = {
+ .name = dpll_iva_m5x2_ck,
+ .parent = dpll_iva_m5_ck,
+ .ops= clkops_null,
+ .recalc = omap3_clkoutx2_recalc,
+};
+
/* DPLL_MPU */
static struct dpll_data dpll_mpu_dd = {
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_MPU,
@@ -1350,7 +1371,7 @@ static struct clk dsp_fck = {
.enable_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = tesla_clkdm,
- .parent = dpll_iva_m4_ck,
+ .parent = dpll_iva_m4x2_ck,
.recalc = followparent_recalc,
};
@@ -1725,7 +1746,7 @@ static struct clk iva_fck = {
.enable_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = ivahd_clkdm,
- .parent = dpll_iva_m5_ck,
+ .parent = dpll_iva_m5x2_ck,
.recalc = followparent_recalc,
};
@@ -2089,7 +2110,7 @@ static struct clk sl2if_ick = {
.enable_reg = OMAP4430_CM_IVAHD_SL2_CLKCTRL,
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
.clkdm_name = ivahd_clkdm,
- .parent = dpll_iva_m5_ck,
+ .parent = dpll_iva_m5x2_ck,
.recalc = followparent_recalc,
};
@@ -2782,6 +2803,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, dpll_core_m2_ck, dpll_core_m2_ck,
CK_443X),
CLK(NULL, ddrphy_ck,ddrphy_ck,
CK_443X),
CLK(NULL, dpll_core_m5_ck, dpll_core_m5_ck,
CK_443X),
+ CLK(NULL, dpll_core_m5x2_ck,dpll_core_m5x2_ck,
CK_443X),
CLK(NULL, div_core_ck, div_core_ck,
CK_443X),
CLK(NULL, div_iva_hs_clk, div_iva_hs_clk,
CK_443X),
CLK(NULL, div_mpu_hs_clk, div_mpu_hs_clk,
CK_443X),
@@ -2793,7
[PATCH v2 05/11] OMAP4: Adding voltage driver support
OMAP4 has three scalable voltage domains vdd_mpu, vdd_iva
and vdd_core. This patch adds the voltage tables and other
configurable voltage processor and voltage controller
settings to control these three scalable domains in OMAP4.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/voltage.c | 211 -
arch/arm/plat-omap/include/plat/voltage.h | 20 +++-
3 files changed, 229 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 38458b7..b18d171 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o
obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o pm_bus.o
obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o voltage.o \
cpuidle34xx.o pm_bus.o
-obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o pm_bus.o
+obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o voltage.o pm_bus.o
obj-$(CONFIG_PM_DEBUG) += pm-debug.o
obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o
obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 5375bf9..03cfd7d 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -29,6 +29,8 @@
#include plat/voltage.h
#include prm-regbits-34xx.h
+#include prm44xx.h
+#include prm-regbits-44xx.h
#include pm.h
#define VP_IDLE_TIMEOUT200
@@ -148,7 +150,50 @@ static struct omap_vdd_info omap3_vdd_info[] = {
#define OMAP3_NR_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
-/* TODO: OMAP4 register offsets */
+/* OMAP4 VDD sturctures */
+static struct omap_vdd_info omap4_vdd_info[] = {
+ {
+ .vp_offs = {
+ .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
+ .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
+ .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
+ .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
+ .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
+ .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
+ },
+ .voltdm = {
+ .name = mpu,
+ },
+ },
+ {
+ .vp_offs = {
+ .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
+ .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
+ .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
+ .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
+ .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
+ .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
+ },
+ .voltdm = {
+ .name = iva,
+ },
+ },
+ {
+ .vp_offs = {
+ .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
+ .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
+ .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
+ .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
+ .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
+ .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
+ },
+ .voltdm = {
+ .name = core,
+ },
+ },
+};
+
+#define OMAP4_NR_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)
/*
* Default voltage controller settings.
@@ -212,6 +257,29 @@ static struct omap_volt_data omap36xx_vdd2_volt_data[] = {
{.volt_nominal = 1137500, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
};
+/*
+ * Structures containing OMAP4430 voltage supported and various
+ * data associated with it per voltage domain basis. Smartreflex Ntarget
+ * values are left as 0 as they have to be populated by smartreflex
+ * driver after reading the efuse.
+ */
+static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
+ {.volt_nominal = 93, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 110, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+ {.volt_nominal = 126, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
+ {.volt_nominal = 135, .sr_errminlimit = 0xFA, .vp_errgain = 0x27},
+};
+
+static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
+ {.volt_nominal = 93, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 110, .sr_errminlimit = 0xF9, .vp_errgain = 0x16},
+ {.volt_nominal = 126, .sr_errminlimit = 0xFA, .vp_errgain = 0x23},
+};
+
+static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
+ {.volt_nominal = 93, .sr_errminlimit = 0xF4, .vp_errgain = 0x0C},
+ {.volt_nominal = 110,
[PATCH v2 10/11] OMAP4: Enabling smartrefles class 3 driver.
This patch enables smartreflex class3 mode of operation for OMAP4430 SDP board.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/board-4430sdp.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index 9447644..3395e61 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -36,6 +36,7 @@
#include plat/usb.h
#include plat/mmc.h
#include hsmmc.h
+#include smartreflex-class3.h
#define ETH_KS8851_IRQ 34
#define ETH_KS8851_POWER_ON48
@@ -182,6 +183,7 @@ static void __init omap_4430sdp_init_irq(void)
#endif
gic_init_irq();
omap_gpio_init();
+ sr_class3_init();
}
static struct omap_musb_board_data musb_board_data = {
--
1.7.0.4
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[PATCH v2 07/11] OMAP4: hwmod: Add inital data for smartreflex modules.
From: Benoit Cousson b-cous...@ti.com
This patch adds the hwmod details for OMAP4 smartreflex modules.
Signed-off-by: Benoit Cousson b-cous...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 163
1 files changed, 163 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index e20b0ee..ba3c215 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -452,6 +452,165 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/*
+ * 'smartreflex' class
+ * smartreflex module (monitor silicon performance and outputs a measure of
+ * performance error)
+ */
+
+/* The IP is not compliant to type1 / type2 scheme */
+static struct omap_hwmod_sysc_fields omap_hwmod_sysc_type_smartreflex = {
+ .sidle_shift= 24,
+ .enwkup_shift = 26,
+};
+
+static struct omap_hwmod_class_sysconfig omap44xx_smartreflex_sysc = {
+ .sysc_offs = 0x0038,
+ .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields= omap_hwmod_sysc_type_smartreflex,
+};
+
+static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
+ .name = smartreflex,
+ .sysc = omap44xx_smartreflex_sysc,
+};
+
+/* smartreflex_core */
+static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
+static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
+ { .irq = 19 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
+ {
+ .pa_start = 0x4a0dd000,
+ .pa_end = 0x4a0dd03f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_cfg - smartreflex_core */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = {
+ .master = omap44xx_l4_cfg_hwmod,
+ .slave = omap44xx_smartreflex_core_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap44xx_smartreflex_core_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* smartreflex_core slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = {
+ omap44xx_l4_cfg__smartreflex_core,
+};
+
+static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
+ .name = smartreflex_core,
+ .class = omap44xx_smartreflex_hwmod_class,
+ .mpu_irqs = omap44xx_smartreflex_core_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs),
+ .main_clk = smartreflex_core_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_smartreflex_core_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* smartreflex_iva */
+static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
+static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
+ { .irq = 102 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
+ {
+ .pa_start = 0x4a0db000,
+ .pa_end = 0x4a0db03f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_cfg - smartreflex_iva */
+static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = {
+ .master = omap44xx_l4_cfg_hwmod,
+ .slave = omap44xx_smartreflex_iva_hwmod,
+ .clk= l4_div_ck,
+ .addr = omap44xx_smartreflex_iva_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs),
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* smartreflex_iva slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = {
+ omap44xx_l4_cfg__smartreflex_iva,
+};
+
+static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
+ .name = smartreflex_iva,
+ .class = omap44xx_smartreflex_hwmod_class,
+ .mpu_irqs = omap44xx_smartreflex_iva_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
+ .main_clk = smartreflex_iva_fck,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_smartreflex_iva_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* smartreflex_mpu */
+static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
+static struct
[PATCH v2 09/11] OMAP4: Smartreflex framework extensions
This patch extends the smartreflex framework to support
OMAP4. The changes are minor like compiling smartreflex Kconfig
option for OMAP4 also, and a couple of OMAP4 checks in
the smartreflex framework.
The change in sr_device.c where new logic has to be introduced
for reading the efuse registers is due to the fact that in OMAP4
the efuse registers are 24 bit aligned. A __raw_readl will
fail for non-32 bit aligned address and hence the 8-bit read
and shift.
Signed-off-by: Thara Gopinath th...@ti.com
---
arch/arm/mach-omap2/smartreflex.c |8 ++--
arch/arm/mach-omap2/sr_device.c | 15 +--
arch/arm/plat-omap/Kconfig|2 +-
3 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index b5a7878..e41be58 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -152,7 +152,11 @@ static void sr_set_clk_length(struct omap_sr *sr)
struct clk *sys_ck;
u32 sys_clk_speed;
- sys_ck = clk_get(NULL, sys_ck);
+ if (cpu_is_omap34xx())
+ sys_ck = clk_get(NULL, sys_ck);
+ else
+ sys_ck = clk_get(NULL, sys_clkin_ck);
+
if (IS_ERR(sys_ck)) {
dev_err(sr-pdev-dev, %s: unable to get sys clk\n,
__func__);
@@ -192,7 +196,7 @@ static void sr_set_regfields(struct omap_sr *sr)
* file or pmic specific data structure. In that case these structure
* fields will have to be populated using the pdata or pmic structure.
*/
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
sr-err_weight = OMAP3430_SR_ERRWEIGHT;
sr-err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
sr-accum_data = OMAP3430_SR_ACCUMDATA;
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 606da59..ef28d63 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -20,6 +20,7 @@
#include linux/err.h
#include linux/slab.h
+#include linux/io.h
#include plat/control.h
#include plat/omap_device.h
@@ -98,9 +99,19 @@ static void __init sr_set_nvalues(struct omap_sr_dev_data
*dev_data,
dev_data-senpenable_shift);
}
- for (i = 0; i dev_data-volts_supported; i++)
- dev_data-volt_data[i].sr_nvalue = omap_ctrl_readl(
+ for (i = 0; i dev_data-volts_supported; i++) {
+ if (cpu_is_omap44xx()) {
+ u16 offset = dev_data-efuse_nvalues_offs[i];
+
+ dev_data-volt_data[i].sr_nvalue =
+ omap_ctrl_readb(offset) |
+ omap_ctrl_readb(offset + 1) 8 |
+ omap_ctrl_readb(offset + 2) 16;
+ } else {
+ dev_data-volt_data[i].sr_nvalue = omap_ctrl_readl(
dev_data-efuse_nvalues_offs[i]);
+ }
+ }
}
#endif
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 89dc30e..67b1395 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -37,7 +37,7 @@ config OMAP_DEBUG_LEDS
config OMAP_SMARTREFLEX
bool SmartReflex support
- depends on ARCH_OMAP3 PM
+ depends on (ARCH_OMAP3 || ARCH_OMAP4) PM
help
Say Y if you want to enable SmartReflex.
--
1.7.0.4
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[PATCH] OMAP: PM: Fix build when CONFIG_PM_DEBUG isn't set
Since 6cdee91257bee23a46dc869ca62469b67cba2c7e the references to enable_off_mode and sleep_while_idle can't be resolved when CONFIG_PM_DEBUG isn't set: arch/arm/mach-omap2/built-in.o: In function `omap_uart_restore_context': arch/arm/mach-omap2/serial.c:253: undefined reference to `enable_off_mode' arch/arm/mach-omap2/built-in.o: In function `omap3_can_sleep': arch/arm/mach-omap2/pm34xx.c:479: undefined reference to `sleep_while_idle' Simply #define these in pm.h just like omap2_pm_debug. --- arch/arm/mach-omap2/pm.h |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 0a1..68db3a7 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -13,8 +13,13 @@ #include plat/powerdomain.h +#ifdef CONFIG_PM_DEBUG extern u32 enable_off_mode; extern u32 sleep_while_idle; +#else +#define enable_off_mode 0 +#define sleep_while_idle 0 +#endif extern void *omap3_secure_ram_storage; extern void omap3_pm_off_mode_enable(int); -- 1.7.1 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 05/11] omap3: Remove non-existent config option
On Fri, Sep 24, 2010 at 6:17 PM, Premi, Sanjeev pr...@ti.com wrote: On Fri, Sep 24, 2010 at 4:50 AM, Tony Lindgren t...@atomide.com wrote: From: Yogesh Marathe yogesh_mara...@ti.com The definition of iva2 device in iommu_device is wrapped inside CONFIG_MPU_BRIDGE_IOMMU, but this option is not defined in KConfig. This patch removes the wrapper and makes iva2 available as another iommu_device. NAK. This would break tidspbridge's MMU. This was discussed before: http://thread.gmane.org/gmane.linux.ports.arm.kernel/58302/focus=58305 When tidspbridge has migrated to iommu, then it should define CONFIG_MPU_BRIDGE_IOMMU. Can you go through earlier discussion on this patch http://marc.info/?l=linux-omapm=127979007623260w=2 I believe these concerns were discussed. I am unable to open the gmane thread (getting 504) - so can't be sure if Hiroshi had referred to same discussion. When you merge iommu support, then either you enable CONFIG_MPU_BRIDGE_IOMMU unconditionally, or you apply this patch, but this patch alone will only break things. -- Felipe Contreras -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/6] omap3: Various fixes and improvements for IGEP v2 board.
Hello, These patch series fixes and improves the support for IGEP v2 board. Please consider to add in next merge window, thanks. Kind regards, Enric -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/6] omap3: Add GPIO's for external VBUS power switch and overcurrent detect on IGEP v2 board.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com --- arch/arm/mach-omap2/board-igep0020.c | 14 ++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 175f043..1052a63 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -274,6 +274,20 @@ static int igep2_twl_gpio_setup(struct device *dev, igep2_vmmc1_supply.dev = mmc[0].dev; igep2_vmmc2_supply.dev = mmc[1].dev; + /* +* REVISIT: need ehci-omap hooks for external VBUS +* power switch and overcurrent detect +*/ + gpio_request(gpio + 1, GPIO_EHCI_NOC); + gpio_direction_input(gpio + 1); + + /* +* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN +* (out, active low) +*/ + gpio_request(gpio + TWL4030_GPIO_MAX, 0); + gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); + return 0; }; -- 1.7.0.4 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/6] omap3: fix and improve the LED handling on IGEP v2 board.
The IGEP v2 board has four leds, this patch allows control all
of these LEDs using the LED class if CONFIG_LEDS_GPIO is selected
or using the General Purpose Input/Output (GPIO) interface if
CONFIG_LEDS_GPIO is not selected.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
arch/arm/mach-omap2/board-igep0020.c | 156 +++---
1 files changed, 87 insertions(+), 69 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 1052a63..9f25d0d 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -261,6 +261,77 @@ static struct omap2_hsmmc_info mmc[] = {
{} /* Terminator */
};
+#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
+#include linux/leds.h
+
+static struct gpio_led igep2_gpio_leds[] = {
+ [0] = {
+ .name = gpio-led:red:d0,
+ .gpio = IGEP2_GPIO_LED0_RED,
+ .default_trigger = default-off
+ },
+ [1] = {
+ .name = gpio-led:green:d0,
+ .gpio = IGEP2_GPIO_LED0_GREEN,
+ .default_trigger = default-off,
+ },
+ [2] = {
+ .name = gpio-led:red:d1,
+ .gpio = IGEP2_GPIO_LED1_RED,
+ .default_trigger = default-off,
+ },
+ [3] = {
+ .name = gpio-led:green:d1,
+ .default_trigger = heartbeat,
+ .gpio = -EINVAL, /* gets replaced */
+ },
+};
+
+static struct gpio_led_platform_data igep2_led_pdata = {
+ .leds = igep2_gpio_leds,
+ .num_leds = ARRAY_SIZE(igep2_gpio_leds),
+};
+
+static struct platform_device igep2_led_device = {
+.name = leds-gpio,
+.id = -1,
+.dev= {
+.platform_data = igep2_led_pdata,
+ },
+};
+
+static void __init igep2_leds_init(void)
+{
+ platform_device_register(igep2_led_device);
+}
+
+#else
+static inline void igep2_leds_init(void)
+{
+ if ((gpio_request(IGEP2_GPIO_LED0_RED, gpio-led:red:d0) == 0)
+ (gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) {
+ gpio_export(IGEP2_GPIO_LED0_RED, 0);
+ gpio_set_value(IGEP2_GPIO_LED0_RED, 0);
+ } else
+ pr_warning(IGEP v2: Could not obtain gpio GPIO_LED0_RED\n);
+
+ if ((gpio_request(IGEP2_GPIO_LED0_GREEN, gpio-led:green:d0) == 0)
+ (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) {
+ gpio_export(IGEP2_GPIO_LED0_GREEN, 0);
+ gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0);
+ } else
+ pr_warning(IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n);
+
+ if ((gpio_request(IGEP2_GPIO_LED1_RED, gpio-led:red:d1) == 0)
+ (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) {
+ gpio_export(IGEP2_GPIO_LED1_RED, 0);
+ gpio_set_value(IGEP2_GPIO_LED1_RED, 0);
+ } else
+ pr_warning(IGEP v2: Could not obtain gpio GPIO_LED1_RED\n);
+
+}
+#endif
+
static int igep2_twl_gpio_setup(struct device *dev,
unsigned gpio, unsigned ngpio)
{
@@ -288,14 +359,26 @@ static int igep2_twl_gpio_setup(struct device *dev,
gpio_request(gpio + TWL4030_GPIO_MAX, 0);
gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
+ /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
+#if !defined(CONFIG_LEDS_GPIO) !defined(CONFIG_LEDS_GPIO_MODULE)
+ if ((gpio_request(gpio+TWL4030_GPIO_MAX+1, gpio-led:green:d1) == 0)
+(gpio_direction_output(gpio + TWL4030_GPIO_MAX + 1, 1) == 0)) {
+ gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0);
+ gpio_set_value(gpio + TWL4030_GPIO_MAX + 1, 0);
+ } else
+ pr_warning(IGEP v2: Could not obtain gpio GPIO_LED1_GREEN\n);
+#else
+ igep2_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1;
+#endif
+
return 0;
};
-static struct twl4030_gpio_platform_data igep2_gpio_data = {
+static struct twl4030_gpio_platform_data igep2_twl4030_gpio_pdata = {
.gpio_base = OMAP_MAX_GPIO_LINES,
.irq_base = TWL4030_GPIO_IRQ_BASE,
.irq_end= TWL4030_GPIO_IRQ_END,
- .use_leds = false,
+ .use_leds = true,
.setup = igep2_twl_gpio_setup,
};
@@ -369,47 +452,6 @@ static void __init igep2_display_init(void)
pr_err(IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n);
}
-#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
-#include linux/leds.h
-
-static struct gpio_led igep2_gpio_leds[] = {
- {
- .name = led0:red,
- .gpio = IGEP2_GPIO_LED0_RED,
- },
- {
- .name = led0:green,
- .default_trigger = heartbeat,
- .gpio = IGEP2_GPIO_LED0_GREEN,
- },
- {
- .name = led1:red,
- .gpio = IGEP2_GPIO_LED1_RED,
-
[PATCH 3/6] omap3: Introduce function to detect the IGEP v2 hardware revision.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
arch/arm/mach-omap2/board-igep0020.c | 47 ++
1 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index 9f25d0d..a386425 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -45,6 +45,49 @@
#define IGEP2_GPIO_WIFI_NPD94
#define IGEP2_GPIO_WIFI_NRESET 95
+/*
+ * IGEP2 Hardware Revision Table
+ *
+ * --
+ * | Id. | Hw Rev. | HW0 (28) |
+ * --
+ * | 0 | B/C | high |
+ * | 1 | C | low|
+ * --
+ */
+
+#define IGEP2_BOARD_HWREV_B0
+#define IGEP2_BOARD_HWREV_C1
+
+static u8 hwrev;
+
+static void __init igep2_get_revision(void)
+{
+ u8 ret;
+
+ omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT);
+
+ if ((gpio_request(IGEP2_GPIO_LED1_RED, GPIO_HW0_REV) == 0)
+ (gpio_direction_input(IGEP2_GPIO_LED1_RED) == 0)) {
+ ret = gpio_get_value(IGEP2_GPIO_LED1_RED);
+ if (hwrev == 0) {
+ pr_info(IGEP2: Hardware Revision C (B-NON
compatible)\n);
+ hwrev = IGEP2_BOARD_HWREV_C;
+ } else if (hwrev == 1) {
+ pr_info(IGEP2: Hardware Revision B/C (B
compatible)\n);
+ hwrev = IGEP2_BOARD_HWREV_B;
+ } else {
+ pr_err(IGEP2: Unknow Hardware Revision\n);
+ hwrev = -1;
+ }
+ } else {
+ pr_warning(IGEP2: Could not obtain gpio GPIO_HW0_REV\n);
+ pr_err(IGEP2: Unknow Hardware Revision\n);
+ }
+
+ gpio_free(IGEP2_GPIO_LED1_RED);
+}
+
#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
@@ -535,6 +578,10 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init igep2_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
+
+ /* Get IGEP2 hardware revision */
+ igep2_get_revision();
+
igep2_i2c_init();
platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
omap_serial_init();
--
1.7.0.4
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[PATCH 4/6] omap3: Fix handling some GPIO's for WLAN-BT combo on IGEP v2.
Some GPIO's used by WLAN-BT combo on IGEP v2 depends on hardware
revision. This patch handles these GPIO's.
--
| Hw Rev. | WIFI_NPD | WIFI_NRESET | BT_NRESET |
--
| B | gpio94 | gpio95| - |
| B/C (B-compatible) | gpio94 | gpio95| gpio137 |
| C | gpio138 | gpio139 | gpio137 |
--
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
arch/arm/mach-omap2/board-igep0020.c | 94 --
1 files changed, 67 insertions(+), 27 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index a386425..ec7da7f 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -38,22 +38,28 @@
#define IGEP2_SMSC911X_CS 5
#define IGEP2_SMSC911X_GPIO 176
#define IGEP2_GPIO_USBH_NRESET 24
-#define IGEP2_GPIO_LED0_GREEN 26
-#define IGEP2_GPIO_LED0_RED27
-#define IGEP2_GPIO_LED1_RED28
-#define IGEP2_GPIO_DVI_PUP 170
-#define IGEP2_GPIO_WIFI_NPD94
-#define IGEP2_GPIO_WIFI_NRESET 95
+#define IGEP2_GPIO_LED0_GREEN 26
+#define IGEP2_GPIO_LED0_RED 27
+#define IGEP2_GPIO_LED1_RED 28
+#define IGEP2_GPIO_DVI_PUP 170
+
+#define IGEP2_RB_GPIO_WIFI_NPD 94
+#define IGEP2_RB_GPIO_WIFI_NRESET 95
+#define IGEP2_RB_GPIO_BT_NRESET137
+#define IGEP2_RC_GPIO_WIFI_NPD 138
+#define IGEP2_RC_GPIO_WIFI_NRESET 139
+#define IGEP2_RC_GPIO_BT_NRESET137
/*
* IGEP2 Hardware Revision Table
*
- * --
- * | Id. | Hw Rev. | HW0 (28) |
- * --
- * | 0 | B/C | high |
- * | 1 | C | low|
- * --
+ * --
+ * | Id. | Hw Rev.| HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET |
+ * --
+ * | 0 | B | high | gpio94 | gpio95| - |
+ * | 0 | B/C (B-compatible) | high | gpio94 | gpio95| gpio137 |
+ * | 1 | C | low| gpio138 | gpio139 | gpio137 |
+ * --
*/
#define IGEP2_BOARD_HWREV_B0
@@ -295,12 +301,14 @@ static struct omap2_hsmmc_info mmc[] = {
.gpio_cd= -EINVAL,
.gpio_wp= -EINVAL,
},
+#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
{
.mmc= 2,
.wires = 4,
.gpio_cd= -EINVAL,
.gpio_wp= -EINVAL,
},
+#endif
{} /* Terminator */
};
@@ -575,6 +583,48 @@ static struct omap_board_mux board_mux[] __initdata = {
#define board_mux NULL
#endif
+#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
+
+static void __init igep2_wlan_bt_init(void)
+{
+ unsigned npd, wreset, btreset;
+
+ /* GPIO's for WLAN-BT combo depends on hardware revision */
+ if (hwrev == IGEP2_BOARD_HWREV_B) {
+ npd = IGEP2_RB_GPIO_WIFI_NPD;
+ wreset = IGEP2_RB_GPIO_WIFI_NRESET;
+ btreset = IGEP2_RB_GPIO_BT_NRESET;
+ } else if (hwrev == IGEP2_BOARD_HWREV_B) {
+ npd = IGEP2_RC_GPIO_WIFI_NPD;
+ wreset = IGEP2_RC_GPIO_WIFI_NRESET;
+ btreset = IGEP2_RC_GPIO_BT_NRESET;
+ } else
+ return;
+
+ /* Set GPIO's for WLAN-BT combo module */
+ if ((gpio_request(npd, GPIO_WIFI_NPD) == 0)
+ (gpio_direction_output(npd, 1) == 0)) {
+ gpio_export(npd, 0);
+ } else
+ pr_warning(IGEP2: Could not obtain gpio GPIO_WIFI_NPD\n);
+
+ if ((gpio_request(wreset, GPIO_WIFI_NRESET) == 0)
+ (gpio_direction_output(wreset, 1) == 0)) {
+ gpio_export(wreset, 0);
+ gpio_set_value(wreset, 0);
+ udelay(10);
+ gpio_set_value(wreset, 1);
+ } else
+ pr_warning(IGEP2: Could not obtain gpio GPIO_WIFI_NRESET\n);
+
+ if ((gpio_request(btreset, GPIO_BT_NRESET) == 0)
+ (gpio_direction_output(btreset, 1) == 0)) {
+ gpio_export(btreset, 0);
+ } else
+ pr_warning(IGEP2: Could not obtain gpio GPIO_BT_NRESET\n);
+}
+#endif
+
static void __init igep2_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
@@ -593,22 +643,12 @@ static void __init igep2_init(void)
igep2_display_init();
igep2_init_smsc911x();
- /* GPIO W-LAN + Bluetooth combo module */
- if ((gpio_request(IGEP2_GPIO_WIFI_NPD, GPIO_WIFI_NPD) ==
[PATCH 5/6] omap3: Add i2c eeprom driver to read EDID on IGEP v2.
Add i2c eeprom driver to access monitor EDID binary information
from user space, something that is required by 'decode-edid' and
'parse-edid'.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
arch/arm/mach-omap2/board-igep0020.c | 24 +---
1 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index ec7da7f..c5eaa43 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -539,7 +539,7 @@ static struct twl4030_platform_data igep2_twldata = {
};
-static struct i2c_board_info __initdata igep2_i2c_boardinfo[] = {
+static struct i2c_board_info __initdata igep2_i2c1_boardinfo[] = {
{
I2C_BOARD_INFO(twl4030, 0x48),
.flags = I2C_CLIENT_WAKE,
@@ -548,13 +548,23 @@ static struct i2c_board_info __initdata
igep2_i2c_boardinfo[] = {
},
};
+static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = {
+ {
+ I2C_BOARD_INFO(eeprom, 0x50),
+ },
+};
+
static int __init igep2_i2c_init(void)
{
- omap_register_i2c_bus(1, 2600, igep2_i2c_boardinfo,
- ARRAY_SIZE(igep2_i2c_boardinfo));
- /* Bus 3 is attached to the DVI port where devices like the pico DLP
-* projector don't work reliably with 400kHz */
- omap_register_i2c_bus(3, 100, NULL, 0);
+ omap_register_i2c_bus(1, 2600, igep2_i2c1_boardinfo,
+ ARRAY_SIZE(igep2_i2c1_boardinfo));
+ /*
+* Bus 3 is attached to the DVI port where devices like the pico DLP
+* projector don't work reliably with 400kHz
+*/
+ omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo,
+ARRAY_SIZE(igep2_i2c3_boardinfo));
+
return 0;
}
@@ -631,7 +641,7 @@ static void __init igep2_init(void)
/* Get IGEP2 hardware revision */
igep2_get_revision();
-
+ /* Register I2C busses and drivers */
igep2_i2c_init();
platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices));
omap_serial_init();
--
1.7.0.4
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[PATCH 6/6] omap3: Remove VMMC2 regulator on IGEP v2 because it's not used.
Signed-off-by: Enric Balletbo i Serra eballe...@gmail.com
---
arch/arm/mach-omap2/board-igep0020.c | 26 +++---
1 files changed, 3 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/board-igep0020.c
b/arch/arm/mach-omap2/board-igep0020.c
index c5eaa43..fa450b1 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -260,10 +260,6 @@ static struct regulator_consumer_supply igep2_vmmc1_supply
= {
.supply = vmmc,
};
-static struct regulator_consumer_supply igep2_vmmc2_supply = {
- .supply = vmmc,
-};
-
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
static struct regulator_init_data igep2_vmmc1 = {
.constraints = {
@@ -279,21 +275,6 @@ static struct regulator_init_data igep2_vmmc1 = {
.consumer_supplies = igep2_vmmc1_supply,
};
-/* VMMC2 for OMAP VDD_MMC2 (i/o) and MMC2 WIFI */
-static struct regulator_init_data igep2_vmmc2 = {
- .constraints = {
- .min_uV = 185,
- .max_uV = 315,
- .valid_modes_mask = REGULATOR_MODE_NORMAL
- | REGULATOR_MODE_STANDBY,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
- | REGULATOR_CHANGE_MODE
- | REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = igep2_vmmc2_supply,
-};
-
static struct omap2_hsmmc_info mmc[] = {
{
.mmc= 1,
@@ -390,11 +371,11 @@ static int igep2_twl_gpio_setup(struct device *dev,
mmc[0].gpio_cd = gpio + 0;
omap2_hsmmc_init(mmc);
- /* link regulators to MMC adapters ... we know the
+ /*
+* link regulators to MMC adapters ... we know the
* regulators will be set up only *after* we return.
- */
+*/
igep2_vmmc1_supply.dev = mmc[0].dev;
- igep2_vmmc2_supply.dev = mmc[1].dev;
/*
* REVISIT: need ehci-omap hooks for external VBUS
@@ -534,7 +515,6 @@ static struct twl4030_platform_data igep2_twldata = {
.codec = igep2_codec_data,
.gpio = igep2_twl4030_gpio_pdata,
.vmmc1 = igep2_vmmc1,
- .vmmc2 = igep2_vmmc2,
.vpll2 = igep2_vpll2,
};
--
1.7.0.4
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Re: [PATCH v4] power: introduce library for device-specific OPPs
On Friday, September 24, 2010, Paul E. McKenney wrote:
On Fri, Sep 24, 2010 at 07:50:40AM -0500, Nishanth Menon wrote:
...
Looks like a good start!!! Some questions and suggestions about RCU
usage interspersed below.
...
+ * Locking: RCU reader.
+ */
+int opp_get_opp_count(struct device *dev)
+{
+ struct device_opp *dev_opp;
+ struct opp *temp_opp;
+ int count = 0;
+
+ dev_opp = find_device_opp(dev);
+ if (IS_ERR(dev_opp))
+ return PTR_ERR(dev_opp);
+
+ rcu_read_lock();
+ list_for_each_entry_rcu(temp_opp, dev_opp-opp_list, node) {
+ if (temp_opp-available)
+ count++;
+ }
+ rcu_read_unlock();
This one is OK as well. You are returning a count, so if all of the
counted structures are freed at this point, no problem. The count was
valid when it was accumulated, and the fact that it might now be obsolete
is (usually) not a problem.
However, it looks like it should run rcu_read_lock() before calling
find_device_opp(dev), shouldn't it?
Rafael
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