[PATCH v2 00/10]HDMI: Split hdmi.c in DSS to seperate OMAP dependent
From: Mythri P K mythr...@ti.com
HDMI IP block is common between TI OMAP4 Procerssor and Netra processor although
the Display subsytem is different.Also the IP block in future OMAP may differ
from the one existing in OMAP4. Thus to reuse the code between these two
processors , and maintain the multi omap build functionality in DSS.
HDMI IP dependant code is seperated out from hdmi.c and moved to
new library file hdmi_ti_4xxx_ip.c.From the DSS dependent HDMI code only the
function pointer to functionality/features offered by HDMI is called.
This patch series does the split and also renames hdmi_omap4_panel.c to
hdmi_panel.c as that file has nothing specific to OMAP4 and can be reused for
other OMAP family of processors as well.
This patch series is based on Tomi's LO-DSS2 master branch.
changes since V1: Function pointer approach to call the HDMI IP functions from
DSS HDMI
Mythri P K (10):
OMAP4: DSS: HDMI: HDMI clean up to pass base_address dynamically
to IP dependant functions of HDMI
OMAP4: DSS: HDMI: Move pll and video configuration info to ip_data
structure
OMAP4: DSS: HDMI: Use specific HDMI timings structure instead of OMAP
DSS timings
OMAP4: DSS: HDMI: Move the common header file definition to
Include/video
OMAP4 : DSS : HDMI : Move the EDID portion from HDMI IP header
OMAP4: DSS2: HDMI: Split the HDMI driver to DSS and IP
specific portion.
OMAP4: DSS2: HDMI: Provide a wrapper API to configure PLL and
PHY configuration
OMAP4: DSS2: HDMI: Function pointer approach to call HDMI IP
driver function from DSS
MAP4: DSS: HDMI: Rename the functions in HDMI IP library to IP
specific name
OMAP4: DSS: Rename hdmi_omap4_panel.c to hdmi_panel.c
drivers/video/omap2/dss/Makefile |2 +-
drivers/video/omap2/dss/dss.h | 10 -
drivers/video/omap2/dss/dss_features.c | 24 +-
drivers/video/omap2/dss/dss_features.h |1 +
drivers/video/omap2/dss/hdmi.c | 925 +++-
drivers/video/omap2/dss/hdmi.h | 631 -
.../omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} |0
drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c | 776
drivers/video/omap2/dss/hdmi_ti_4xxx_ip.h | 582
include/video/omapdss.h| 19 +
include/video/omaphdmi.h | 95 ++
11 files changed, 1642 insertions(+), 1423 deletions(-)
delete mode 100644 drivers/video/omap2/dss/hdmi.h
rename drivers/video/omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} (100%)
create mode 100644 drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
create mode 100644 drivers/video/omap2/dss/hdmi_ti_4xxx_ip.h
create mode 100644 include/video/omaphdmi.h
--
1.7.5.4
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[PATCH v2 03/10] OMAP4: DSS: HDMI: Use specific HDMI timings structure
From: Mythri P K mythr...@ti.com
Define new HDMI timings structure to replace the OMAP DSS timing strucutre in
hdmi.c to have the HDMI include defintion out of DSS.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 22 +++---
drivers/video/omap2/dss/hdmi.h | 15 ++-
2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 084a47e..ba1ad06 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -537,6 +537,20 @@ static int read_edid(struct hdmi_ip_data *ip_data, u8
*pedid, u16 max_length)
return 0;
}
+static void copy_hdmi_to_dss_timings(struct hdmi_video_timings hdmi_timings,
+ struct omap_video_timings *timings)
+{
+ timings-x_res = hdmi_timings.x_res;
+ timings-y_res = hdmi_timings.y_res;
+ timings-pixel_clock = hdmi_timings.pixel_clock;
+ timings-hbp = hdmi_timings.hbp;
+ timings-hfp = hdmi_timings.hfp;
+ timings-hsw = hdmi_timings.hsw;
+ timings-vbp = hdmi_timings.vbp;
+ timings-vfp = hdmi_timings.vfp;
+ timings-vsw = hdmi_timings.vsw;
+}
+
static int get_timings_index(void)
{
int code;
@@ -561,7 +575,7 @@ static struct hdmi_cm hdmi_get_code(struct
omap_video_timings *timing)
{
int i = 0, code = -1, temp_vsync = 0, temp_hsync = 0;
int timing_vsync = 0, timing_hsync = 0;
- struct omap_video_timings temp;
+ struct hdmi_video_timings temp;
struct hdmi_cm cm = {-1};
DSSDBG(hdmi_get_code\n);
@@ -719,7 +733,8 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
code = get_timings_index();
- *dp = cea_vesa_timings[code].timings;
+ copy_hdmi_to_dss_timings(cea_vesa_timings[code].timings, dp);
+
}
static void hdmi_core_init(struct hdmi_core_video_config *video_cfg,
@@ -1178,7 +1193,8 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_read_edid(p);
}
code = get_timings_index();
- dssdev-panel.timings = cea_vesa_timings[code].timings;
+ copy_hdmi_to_dss_timings(cea_vesa_timings[code].timings,
+ dssdev-panel.timings);
update_hdmi_timings(hdmi.hdmi_data.cfg, p, code);
phy = p-pixel_clock;
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index c0f4c2a..7046ff3 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -198,9 +198,22 @@ struct hdmi_reg { u16 idx; };
#define REG_GET(base, idx, start, end) \
FLD_GET(hdmi_read_reg(base, idx), start, end)
+struct hdmi_video_timings {
+ u16 x_res;
+ u16 y_res;
+ /* Unit: KHz */
+ u32 pixel_clock;
+ u16 hsw;
+ u16 hfp;
+ u16 hbp;
+ u16 vsw;
+ u16 vfp;
+ u16 vbp;
+};
+
/* HDMI timing structure */
struct hdmi_timings {
- struct omap_video_timings timings;
+ struct hdmi_video_timings timings;
int vsync_pol;
int hsync_pol;
};
--
1.7.5.4
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[PATCH v2 02/10] OMAP4: DSS: HDMI: Move pll and video configuration
From: Mythri P K mythr...@ti.com
As the pll and the video configuration info are part of the ip_data those
structures are moved to the ip_data strtucure.Also the functions are modified
accordingly to take care of this movement.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 34 +++---
drivers/video/omap2/dss/hdmi.h | 18 ++
2 files changed, 25 insertions(+), 27 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 544f93e..084a47e 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -59,7 +59,6 @@ static struct {
u8 edid[HDMI_EDID_MAX_LENGTH];
u8 edid_set;
bool custom_set;
- struct hdmi_config cfg;
struct clk *sys_clk;
} hdmi;
@@ -230,11 +229,11 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
}
static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
- enum hdmi_clk_refsel refsel, int dcofreq,
- struct hdmi_pll_info *fmt, u16 sd)
+ enum hdmi_clk_refsel refsel)
{
u32 r;
void __iomem *pll_base = hdmi_pll_base(ip_data);
+ struct hdmi_pll_info *fmt = ip_data-pll_data;
/* PLL start always use manual mode */
REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
@@ -251,9 +250,9 @@ static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */
- if (dcofreq) {
+ if (fmt-dcofreq) {
/* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(pll_base, PLLCTRL_CFG3, sd, 17, 10);
+ REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt-regsd, 17, 10);
r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
} else {
r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
@@ -379,8 +378,7 @@ static int hdmi_phy_init(struct hdmi_ip_data *ip_data)
return 0;
}
-static int hdmi_pll_program(struct hdmi_ip_data *ip_data,
- struct hdmi_pll_info *fmt)
+static int hdmi_pll_program(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
enum hdmi_clk_refsel refsel;
@@ -399,7 +397,7 @@ static int hdmi_pll_program(struct hdmi_ip_data *ip_data,
refsel = HDMI_REFSEL_SYSCLK;
- r = hdmi_pll_init(ip_data, refsel, fmt-dcofreq, fmt, fmt-regsd);
+ r = hdmi_pll_init(ip_data, refsel);
if (r)
return r;
@@ -1015,8 +1013,7 @@ static void hdmi_wp_video_config_timing(struct
hdmi_ip_data *ip_data,
hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v);
}
-static void hdmi_basic_configure(struct hdmi_ip_data *ip_data,
- struct hdmi_config *cfg)
+static void hdmi_basic_configure(struct hdmi_ip_data *ip_data)
{
/* HDMI */
struct omap_video_timings video_timing;
@@ -1026,6 +1023,7 @@ static void hdmi_basic_configure(struct hdmi_ip_data
*ip_data,
struct hdmi_core_infoframe_avi avi_cfg;
struct hdmi_core_video_config v_core_cfg;
struct hdmi_core_packet_enable_repeat repeat_cfg;
+ struct hdmi_config *cfg = ip_data-cfg;
hdmi_wp_init(video_timing, video_format,
video_interface);
@@ -1034,8 +1032,7 @@ static void hdmi_basic_configure(struct hdmi_ip_data
*ip_data,
avi_cfg,
repeat_cfg);
- hdmi_wp_video_init_format(video_format,
- video_timing, cfg);
+ hdmi_wp_video_init_format(video_format, video_timing, cfg);
hdmi_wp_video_config_timing(ip_data, video_timing);
@@ -1161,7 +1158,6 @@ static void hdmi_compute_pll(struct omap_dss_device
*dssdev, int phy,
static int hdmi_power_on(struct omap_dss_device *dssdev)
{
int r, code = 0;
- struct hdmi_pll_info pll_data;
struct omap_video_timings *p;
unsigned long phy;
@@ -1183,16 +1179,16 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
}
code = get_timings_index();
dssdev-panel.timings = cea_vesa_timings[code].timings;
- update_hdmi_timings(hdmi.cfg, p, code);
+ update_hdmi_timings(hdmi.hdmi_data.cfg, p, code);
phy = p-pixel_clock;
- hdmi_compute_pll(dssdev, phy, pll_data);
+ hdmi_compute_pll(dssdev, phy, hdmi.hdmi_data.pll_data);
hdmi_wp_video_start(hdmi.hdmi_data, 0);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
- r = hdmi_pll_program(hdmi.hdmi_data, pll_data);
+ r = hdmi_pll_program(hdmi.hdmi_data);
if (r) {
DSSDBG(Failed to lock PLL\n);
goto err;
@@ -1204,9 +1200,9 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
goto err;
}
- hdmi.cfg.cm.mode = hdmi.mode;
- hdmi.cfg.cm.code = hdmi.code;
-
[PATCH v2 05/10] OMAP4 : DSS : HDMI : Move the EDID portion from HDMI
From: Mythri P K mythr...@ti.com
Clean up to move the EDID definition to hdmi.c from the header file which is IP
dependent.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 10 ++
drivers/video/omap2/dss/hdmi.h | 10 --
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 39d1a7e..e9e07e2 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -50,6 +50,16 @@
#define HDMI_PLLCTRL 0x200
#define HDMI_PHY 0x300
+/* HDMI EDID Length move this */
+#define HDMI_EDID_MAX_LENGTH 256
+#define EDID_TIMING_DESCRIPTOR_SIZE0x12
+#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
+#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
+#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
+#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
+
+#define OMAP_HDMI_TIMINGS_NB 34
+
static struct {
struct mutex lock;
struct omap_display_platform_data *pdata;
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index 0a3342b..4b0fab3 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -182,16 +182,6 @@ struct hdmi_reg { u16 idx; };
#define HDMI_TXPHY_POWER_CTRL HDMI_REG(0x8)
#define HDMI_TXPHY_PAD_CFG_CTRLHDMI_REG(0xC)
-/* HDMI EDID Length */
-#define HDMI_EDID_MAX_LENGTH 256
-#define EDID_TIMING_DESCRIPTOR_SIZE0x12
-#define EDID_DESCRIPTOR_BLOCK0_ADDRESS 0x36
-#define EDID_DESCRIPTOR_BLOCK1_ADDRESS 0x80
-#define EDID_SIZE_BLOCK0_TIMING_DESCRIPTOR 4
-#define EDID_SIZE_BLOCK1_TIMING_DESCRIPTOR 4
-
-#define OMAP_HDMI_TIMINGS_NB 34
-
#define REG_FLD_MOD(base, idx, val, start, end) \
hdmi_write_reg(base, idx, FLD_MOD(hdmi_read_reg(base, idx),\
val, start, end))
--
1.7.5.4
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[PATCH v2 04/10] OMAP4: DSS: HDMI: Move the common header file
From: Mythri P K mythr...@ti.com
Some of the header file definitions of HDMI IP are needed by audio driver thus
moving the common defintion to more generic Include/video.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss.h | 10 -
drivers/video/omap2/dss/hdmi.c |1 +
drivers/video/omap2/dss/hdmi.h | 53
include/video/omaphdmi.h | 86
4 files changed, 87 insertions(+), 63 deletions(-)
create mode 100644 include/video/omaphdmi.h
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index a095a62..7c9565f 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -150,16 +150,6 @@ struct dsi_clock_info {
bool use_sys_clk;
};
-/* HDMI PLL structure */
-struct hdmi_pll_info {
- u16 regn;
- u16 regm;
- u32 regmf;
- u16 regm2;
- u16 regsd;
- u16 dcofreq;
-};
-
struct seq_file;
struct platform_device;
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index ba1ad06..39d1a7e 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -33,6 +33,7 @@
#include linux/pm_runtime.h
#include linux/clk.h
#include video/omapdss.h
+#include video/omaphdmi.h
#if defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI) || \
defined(CONFIG_SND_OMAP_SOC_OMAP4_HDMI_MODULE)
#include sound/soc.h
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index 7046ff3..0a3342b 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -198,39 +198,12 @@ struct hdmi_reg { u16 idx; };
#define REG_GET(base, idx, start, end) \
FLD_GET(hdmi_read_reg(base, idx), start, end)
-struct hdmi_video_timings {
- u16 x_res;
- u16 y_res;
- /* Unit: KHz */
- u32 pixel_clock;
- u16 hsw;
- u16 hfp;
- u16 hbp;
- u16 vsw;
- u16 vfp;
- u16 vbp;
-};
-
-/* HDMI timing structure */
-struct hdmi_timings {
- struct hdmi_video_timings timings;
- int vsync_pol;
- int hsync_pol;
-};
-
enum hdmi_phy_pwr {
HDMI_PHYPWRCMD_OFF = 0,
HDMI_PHYPWRCMD_LDOON = 1,
HDMI_PHYPWRCMD_TXON = 2
};
-enum hdmi_pll_pwr {
- HDMI_PLLPWRCMD_ALLOFF = 0,
- HDMI_PLLPWRCMD_PLLONLY = 1,
- HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2,
- HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3
-};
-
enum hdmi_clk_refsel {
HDMI_REFSEL_PCLK = 0,
HDMI_REFSEL_REF1 = 1,
@@ -266,11 +239,6 @@ enum hdmi_core_packet_mode {
HDMI_PACKETMODE48BITPERPIXEL = 7
};
-enum hdmi_core_hdmi_dvi {
- HDMI_DVI = 0,
- HDMI_HDMI = 1
-};
-
enum hdmi_core_tclkselclkmult {
HDMI_FPLL05IDCK = 0,
HDMI_FPLL10IDCK = 1,
@@ -571,27 +539,6 @@ struct hdmi_video_interface {
int tm; /* Timing mode */
};
-struct hdmi_cm {
- int code;
- int mode;
-};
-
-struct hdmi_config {
- struct hdmi_timings timings;
- u16 interlace;
- struct hdmi_cm cm;
-};
-
-struct hdmi_ip_data {
- void __iomem*base_wp; /* HDMI wrapper */
- unsigned long core_sys_offset;
- unsigned long core_av_offset;
- unsigned long pll_offset;
- unsigned long phy_offset;
- struct hdmi_config cfg;
- struct hdmi_pll_info pll_data;
-};
-
struct hdmi_audio_format {
enum hdmi_stereo_channels stereo_channels;
u8 active_chnnls_msk;
diff --git a/include/video/omaphdmi.h b/include/video/omaphdmi.h
new file mode 100644
index 000..bd51529
--- /dev/null
+++ b/include/video/omaphdmi.h
@@ -0,0 +1,86 @@
+/*
+ * omaphdmi.h
+ *
+ * HDMI driver definition for TI OMAP4, DM81xx, DM38xx Processor.
+ *
+ * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see http://www.gnu.org/licenses/.
+ */
+
+#ifndef _OMAP_OMAPHDMI_H
+#define _OMAP_OMAPHDMI_H
+
+enum hdmi_pll_pwr {
+ HDMI_PLLPWRCMD_ALLOFF = 0,
+ HDMI_PLLPWRCMD_PLLONLY = 1,
+ HDMI_PLLPWRCMD_BOTHON_ALLCLKS = 2,
+ HDMI_PLLPWRCMD_BOTHON_NOPHYCLK = 3
+};
+
+enum hdmi_core_hdmi_dvi {
+ HDMI_DVI = 0,
+ HDMI_HDMI = 1
+};
+
+struct hdmi_video_timings {
+ u16 x_res;
+ u16 y_res;
+ /* Unit: KHz */
+ u32 pixel_clock;
+ u16 hsw;
+ u16 hfp;
+ u16 hbp;
+
[PATCH v2 07/10] OMAP4: DSS2: HDMI: Provide a wrapper API to configure
From: Mythri P K mythr...@ti.com
Instead of DSS knowing of the interior IP driver function provide
a wrapper API to configure.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c|8
drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c | 11 ---
include/video/omaphdmi.h |8
3 files changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index 8baf4cf..fb7d66f 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -478,13 +478,13 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_wp_video_start(hdmi.hdmi_data, 0);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
- r = hdmi_pll_program(hdmi.hdmi_data);
+ r = hdmi_pll_enable(hdmi.hdmi_data);
if (r) {
DSSDBG(Failed to lock PLL\n);
goto err;
}
- r = hdmi_phy_init(hdmi.hdmi_data);
+ r = hdmi_phy_enable(hdmi.hdmi_data);
if (r) {
DSSDBG(Failed to start PHY\n);
goto err;
@@ -527,8 +527,8 @@ static void hdmi_power_off(struct omap_dss_device *dssdev)
dispc_mgr_enable(OMAP_DSS_CHANNEL_DIGIT, 0);
hdmi_wp_video_start(hdmi.hdmi_data, 0);
- hdmi_phy_off(hdmi.hdmi_data);
- hdmi_set_pll_pwr(hdmi.hdmi_data, HDMI_PLLPWRCMD_ALLOFF);
+ hdmi_phy_disable(hdmi.hdmi_data);
+ hdmi_pll_disable(hdmi.hdmi_data);
hdmi_runtime_put();
hdmi.edid_set = 0;
diff --git a/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
b/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
index a582522..f64e06c 100644
--- a/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
+++ b/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
@@ -194,7 +194,7 @@ static int hdmi_pll_reset(struct hdmi_ip_data *ip_data)
return 0;
}
-int hdmi_pll_program(struct hdmi_ip_data *ip_data)
+int hdmi_pll_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
enum hdmi_clk_refsel refsel;
@@ -220,7 +220,12 @@ int hdmi_pll_program(struct hdmi_ip_data *ip_data)
return 0;
}
-int hdmi_phy_init(struct hdmi_ip_data *ip_data)
+void hdmi_pll_disable(struct hdmi_ip_data *ip_data)
+{
+ hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF);
+}
+
+int hdmi_phy_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
void __iomem *phy_base = hdmi_phy_base(ip_data);
@@ -257,7 +262,7 @@ int hdmi_phy_init(struct hdmi_ip_data *ip_data)
return 0;
}
-void hdmi_phy_off(struct hdmi_ip_data *ip_data)
+void hdmi_phy_disable(struct hdmi_ip_data *ip_data)
{
hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
}
diff --git a/include/video/omaphdmi.h b/include/video/omaphdmi.h
index 9d4bc36..88b1ccb 100644
--- a/include/video/omaphdmi.h
+++ b/include/video/omaphdmi.h
@@ -83,11 +83,11 @@ struct hdmi_ip_data {
struct hdmi_config cfg;
struct hdmi_pll_info pll_data;
};
-int hdmi_phy_init(struct hdmi_ip_data *ip_data);
-void hdmi_phy_off(struct hdmi_ip_data *ip_data);
+int hdmi_phy_enable(struct hdmi_ip_data *ip_data);
+void hdmi_phy_disable(struct hdmi_ip_data *ip_data);
int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length);
void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
-int hdmi_pll_program(struct hdmi_ip_data *ip_data);
-int hdmi_set_pll_pwr(struct hdmi_ip_data *ip_data, enum hdmi_pll_pwr val);
+int hdmi_pll_enable(struct hdmi_ip_data *ip_data);
+void hdmi_pll_disable(struct hdmi_ip_data *ip_data);
void hdmi_basic_configure(struct hdmi_ip_data *ip_data);
#endif
--
1.7.5.4
--
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[PATCH v2 01/10] OMAP4: DSS: HDMI: HDMI clean up to pass base_address
From: Mythri P K mythr...@ti.com
As the base_address of the HDMI might differ across SoC's, offset of the HDMI
logical blocks and base address got from the platform data are passed
dynamically to the functions that modify HDMI IP registers.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/hdmi.c | 501 +++-
drivers/video/omap2/dss/hdmi.h | 292
2 files changed, 435 insertions(+), 358 deletions(-)
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index b8e02e4..544f93e 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -43,11 +43,17 @@
#include hdmi.h
#include dss_features.h
+#define HDMI_WP0x0
+#define HDMI_CORE_SYS 0x400
+#define HDMI_CORE_AV 0x900
+#define HDMI_PLLCTRL 0x200
+#define HDMI_PHY 0x300
+
static struct {
struct mutex lock;
struct omap_display_platform_data *pdata;
struct platform_device *pdev;
- void __iomem *base_wp; /* HDMI wrapper */
+ struct hdmi_ip_data hdmi_data;
int code;
int mode;
u8 edid[HDMI_EDID_MAX_LENGTH];
@@ -145,21 +151,49 @@ static const int code_vesa[85] = {
static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x0};
-static inline void hdmi_write_reg(const struct hdmi_reg idx, u32 val)
+static inline void hdmi_write_reg(void __iomem *base_addr,
+ const struct hdmi_reg idx, u32 val)
+{
+ __raw_writel(val, base_addr + idx.idx);
+}
+
+static inline u32 hdmi_read_reg(void __iomem *base_addr,
+ const struct hdmi_reg idx)
+{
+ return __raw_readl(base_addr + idx.idx);
+}
+
+static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp;
+}
+
+static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data)
{
- __raw_writel(val, hdmi.base_wp + idx.idx);
+ return ip_data-base_wp + ip_data-phy_offset;
}
-static inline u32 hdmi_read_reg(const struct hdmi_reg idx)
+static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data)
{
- return __raw_readl(hdmi.base_wp + idx.idx);
+ return ip_data-base_wp + ip_data-pll_offset;
}
-static inline int hdmi_wait_for_bit_change(const struct hdmi_reg idx,
+static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp + ip_data-core_av_offset;
+}
+
+static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data)
+{
+ return ip_data-base_wp + ip_data-core_sys_offset;
+}
+
+static inline int hdmi_wait_for_bit_change(void __iomem *base_addr,
+ const struct hdmi_reg idx,
int b2, int b1, u32 val)
{
u32 t = 0;
- while (val != REG_GET(idx, b2, b1)) {
+ while (val != REG_GET(base_addr, idx, b2, b1)) {
udelay(1);
if (t++ 1)
return !val;
@@ -195,21 +229,23 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
return 0;
}
-static int hdmi_pll_init(enum hdmi_clk_refsel refsel, int dcofreq,
+static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
+ enum hdmi_clk_refsel refsel, int dcofreq,
struct hdmi_pll_info *fmt, u16 sd)
{
u32 r;
+ void __iomem *pll_base = hdmi_pll_base(ip_data);
/* PLL start always use manual mode */
- REG_FLD_MOD(PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
+ REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
- r = hdmi_read_reg(PLLCTRL_CFG1);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG1);
r = FLD_MOD(r, fmt-regm, 20, 9); /* CFG1_PLL_REGM */
r = FLD_MOD(r, fmt-regn, 8, 1); /* CFG1_PLL_REGN */
- hdmi_write_reg(PLLCTRL_CFG1, r);
+ hdmi_write_reg(pll_base, PLLCTRL_CFG1, r);
- r = hdmi_read_reg(PLLCTRL_CFG2);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG2);
r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */
r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
@@ -217,38 +253,40 @@ static int hdmi_pll_init(enum hdmi_clk_refsel refsel, int
dcofreq,
if (dcofreq) {
/* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(PLLCTRL_CFG3, sd, 17, 10);
+ REG_FLD_MOD(pll_base, PLLCTRL_CFG3, sd, 17, 10);
r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
} else {
r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
}
- hdmi_write_reg(PLLCTRL_CFG2, r);
+ hdmi_write_reg(pll_base, PLLCTRL_CFG2, r);
- r = hdmi_read_reg(PLLCTRL_CFG4);
+ r = hdmi_read_reg(pll_base, PLLCTRL_CFG4);
r = FLD_MOD(r, fmt-regm2, 24, 18);
r = FLD_MOD(r, fmt-regmf, 17, 0);
- hdmi_write_reg(PLLCTRL_CFG4, r);
+
[PATCH v2 09/10] MAP4: DSS: HDMI: Rename the functions in HDMI IP
From: Mythri P K mythr...@ti.com
Functions that are included in the generic video include of HDMI TI OMAP4, TI8xx
etc IP library is renamed to have IP specific names so that it will not conflict
with similar function from other IP.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss_features.c| 14 +++---
drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c | 15 ---
include/video/omaphdmi.h | 15 ---
3 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/drivers/video/omap2/dss/dss_features.c
b/drivers/video/omap2/dss/dss_features.c
index edf2929..c1ef0d6 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -434,13 +434,13 @@ const struct omap_hdmi_ip_driver *omap_hdmi_functions;
/* HDMI OMAP4 Functions*/
const struct omap_hdmi_ip_driver omap4_hdmi_functions = {
- .video_configure= hdmi_basic_configure,
- .phy_enable = hdmi_phy_enable,
- .phy_disable= hdmi_phy_disable,
- .read_edid = read_edid,
- .pll_enable = hdmi_pll_enable,
- .pll_disable= hdmi_pll_disable,
- .video_enable = hdmi_wp_video_start,
+ .video_configure= hdmi_ti_4xxx_basic_configure,
+ .phy_enable = hdmi_ti_4xxx_phy_enable,
+ .phy_disable= hdmi_ti_4xxx_phy_disable,
+ .read_edid = hdmi_ti_4xxx_read_edid,
+ .pll_enable = hdmi_ti_4xxx_pll_enable,
+ .pll_disable= hdmi_ti_4xxx_pll_disable,
+ .video_enable = hdmi_ti_4xxx_wp_video_start,
};
void dss_hdmi_features_init(struct hdmi_ip_data *ip_data)
diff --git a/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
b/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
index f64e06c..3ce99b0 100644
--- a/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
+++ b/drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
@@ -194,7 +194,7 @@ static int hdmi_pll_reset(struct hdmi_ip_data *ip_data)
return 0;
}
-int hdmi_pll_enable(struct hdmi_ip_data *ip_data)
+int hdmi_ti_4xxx_pll_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
enum hdmi_clk_refsel refsel;
@@ -220,12 +220,12 @@ int hdmi_pll_enable(struct hdmi_ip_data *ip_data)
return 0;
}
-void hdmi_pll_disable(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_pll_disable(struct hdmi_ip_data *ip_data)
{
hdmi_set_pll_pwr(ip_data, HDMI_PLLPWRCMD_ALLOFF);
}
-int hdmi_phy_enable(struct hdmi_ip_data *ip_data)
+int hdmi_ti_4xxx_phy_enable(struct hdmi_ip_data *ip_data)
{
u16 r = 0;
void __iomem *phy_base = hdmi_phy_base(ip_data);
@@ -262,7 +262,7 @@ int hdmi_phy_enable(struct hdmi_ip_data *ip_data)
return 0;
}
-void hdmi_phy_disable(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_phy_disable(struct hdmi_ip_data *ip_data)
{
hdmi_set_phy_pwr(ip_data, HDMI_PHYPWRCMD_OFF);
}
@@ -368,7 +368,8 @@ static int hdmi_core_ddc_edid(struct hdmi_ip_data *ip_data,
return 0;
}
-int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length)
+int hdmi_ti_4xxx_read_edid(struct hdmi_ip_data *ip_data,
+ u8 *pedid, u16 max_length)
{
int r = 0, n = 0, i = 0;
int max_ext_blocks = (max_length / 128) - 1;
@@ -621,7 +622,7 @@ static void hdmi_wp_init(struct omap_video_timings *timings,
}
-void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start)
+void hdmi_ti_4xxx_wp_video_start(struct hdmi_ip_data *ip_data, bool start)
{
REG_FLD_MOD(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, start, 31, 31);
}
@@ -688,7 +689,7 @@ static void hdmi_wp_video_config_timing(struct hdmi_ip_data
*ip_data,
hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_TIMING_V, timing_v);
}
-void hdmi_basic_configure(struct hdmi_ip_data *ip_data)
+void hdmi_ti_4xxx_basic_configure(struct hdmi_ip_data *ip_data)
{
/* HDMI */
struct omap_video_timings video_timing;
diff --git a/include/video/omaphdmi.h b/include/video/omaphdmi.h
index a740237..9548284 100644
--- a/include/video/omaphdmi.h
+++ b/include/video/omaphdmi.h
@@ -84,11 +84,12 @@ struct hdmi_ip_data {
struct hdmi_config cfg;
struct hdmi_pll_info pll_data;
};
-int hdmi_phy_enable(struct hdmi_ip_data *ip_data);
-void hdmi_phy_disable(struct hdmi_ip_data *ip_data);
-int read_edid(struct hdmi_ip_data *ip_data, u8 *pedid, u16 max_length);
-void hdmi_wp_video_start(struct hdmi_ip_data *ip_data, bool start);
-int hdmi_pll_enable(struct hdmi_ip_data *ip_data);
-void hdmi_pll_disable(struct hdmi_ip_data *ip_data);
-void hdmi_basic_configure(struct hdmi_ip_data *ip_data);
+int hdmi_ti_4xxx_phy_enable(struct hdmi_ip_data *ip_data);
+void hdmi_ti_4xxx_phy_disable(struct hdmi_ip_data *ip_data);
+int hdmi_ti_4xxx_read_edid(struct hdmi_ip_data
[PATCH v2 08/10] OMAP4: DSS2: HDMI: Function pointer approach to call
From: Mythri P K mythr...@ti.com
To make the current hdmi DSS driver compatible with future OMAP with different
IP blocks , add HDMI as a feature in dss_features and abstract the internal
function in hdmi dss driver.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/dss_features.c | 24 +++-
drivers/video/omap2/dss/dss_features.h |1 +
drivers/video/omap2/dss/hdmi.c | 22 +++---
include/video/omapdss.h| 19 +++
include/video/omaphdmi.h |1 +
5 files changed, 55 insertions(+), 12 deletions(-)
diff --git a/drivers/video/omap2/dss/dss_features.c
b/drivers/video/omap2/dss/dss_features.c
index b63c5f8..edf2929 100644
--- a/drivers/video/omap2/dss/dss_features.c
+++ b/drivers/video/omap2/dss/dss_features.c
@@ -429,6 +429,26 @@ static const struct omap_dss_features omap4_dss_features =
{
.burst_size_unit = 16,
};
+const struct omap_hdmi_ip_driver *omap_hdmi_functions;
+
+/* HDMI OMAP4 Functions*/
+const struct omap_hdmi_ip_driver omap4_hdmi_functions = {
+
+ .video_configure= hdmi_basic_configure,
+ .phy_enable = hdmi_phy_enable,
+ .phy_disable= hdmi_phy_disable,
+ .read_edid = read_edid,
+ .pll_enable = hdmi_pll_enable,
+ .pll_disable= hdmi_pll_disable,
+ .video_enable = hdmi_wp_video_start,
+};
+
+void dss_hdmi_features_init(struct hdmi_ip_data *ip_data)
+{
+ if (cpu_is_omap44xx())
+ ip_data-hdmi_ops = omap4_hdmi_functions;
+}
+
/* Functions returning values related to a DSS feature */
int dss_feat_get_num_mgrs(void)
{
@@ -512,8 +532,10 @@ void dss_features_init(void)
omap_current_dss_features = omap3430_dss_features;
else if (omap_rev() == OMAP4430_REV_ES1_0)
omap_current_dss_features = omap4430_es1_0_dss_features;
- else if (cpu_is_omap44xx())
+ else if (cpu_is_omap44xx()) {
omap_current_dss_features = omap4_dss_features;
+ omap_hdmi_functions = omap4_hdmi_functions;
+ }
else
DSSWARN(Unsupported OMAP version);
}
diff --git a/drivers/video/omap2/dss/dss_features.h
b/drivers/video/omap2/dss/dss_features.h
index 4271e96..ca64b21 100644
--- a/drivers/video/omap2/dss/dss_features.h
+++ b/drivers/video/omap2/dss/dss_features.h
@@ -99,4 +99,5 @@ u32 dss_feat_get_burst_size_unit(void); /* in
bytes */
bool dss_has_feature(enum dss_feat_id id);
void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
void dss_features_init(void);
+void dss_hdmi_features_init(struct hdmi_ip_data *ip_data);
#endif
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index fb7d66f..c508cf6 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -184,7 +184,7 @@ static void hdmi_runtime_put(void)
int hdmi_init_display(struct omap_dss_device *dssdev)
{
DSSDBG(init_display\n);
-
+ dss_hdmi_features_init(hdmi.hdmi_data);
return 0;
}
@@ -364,8 +364,8 @@ static void hdmi_read_edid(struct omap_video_timings *dp)
memset(hdmi.edid, 0, HDMI_EDID_MAX_LENGTH);
if (!hdmi.edid_set)
- ret = read_edid(hdmi.hdmi_data, hdmi.edid,
- HDMI_EDID_MAX_LENGTH);
+ ret = hdmi.hdmi_data.hdmi_ops-read_edid(hdmi.hdmi_data,
+ hdmi.edid, HDMI_EDID_MAX_LENGTH);
if (!ret) {
if (!memcmp(hdmi.edid, edid_header, sizeof(edid_header))) {
/* search for timings of default resolution */
@@ -475,16 +475,16 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi_compute_pll(dssdev, phy, hdmi.hdmi_data.pll_data);
- hdmi_wp_video_start(hdmi.hdmi_data, 0);
+ hdmi.hdmi_data.hdmi_ops-video_enable(hdmi.hdmi_data, 0);
/* config the PLL and PHY hdmi_set_pll_pwrfirst */
- r = hdmi_pll_enable(hdmi.hdmi_data);
+ r = hdmi.hdmi_data.hdmi_ops-pll_enable(hdmi.hdmi_data);
if (r) {
DSSDBG(Failed to lock PLL\n);
goto err;
}
- r = hdmi_phy_enable(hdmi.hdmi_data);
+ r = hdmi.hdmi_data.hdmi_ops-phy_enable(hdmi.hdmi_data);
if (r) {
DSSDBG(Failed to start PHY\n);
goto err;
@@ -492,7 +492,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev)
hdmi.hdmi_data.cfg.cm.mode = hdmi.mode;
hdmi.hdmi_data.cfg.cm.code = hdmi.code;
- hdmi_basic_configure(hdmi.hdmi_data);
+ hdmi.hdmi_data.hdmi_ops-video_configure(hdmi.hdmi_data);
/* Make selection of HDMI in DSS */
dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
@@ -514,7 +514,7 @@ static int hdmi_power_on(struct omap_dss_device
[PATCH v2 10/10] OMAP4: DSS: Rename hdmi_omap4_panel.c to hdmi_panel.c
From: Mythri P K mythr...@ti.com
As the panel driver will remain generic across OMAP's renaming it to
hdmi_panel.c
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/Makefile |2 +-
.../omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} |0
2 files changed, 1 insertions(+), 1 deletions(-)
rename drivers/video/omap2/dss/{hdmi_omap4_panel.c = hdmi_panel.c} (100%)
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile
index 3ffe98f..5fd9ed4 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/omap2/dss/Makefile
@@ -6,4 +6,4 @@ omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \
- hdmi_omap4_panel.o hdmi_ti_4xxx_ip.o
+ hdmi_panel.o hdmi_ti_4xxx_ip.o
diff --git a/drivers/video/omap2/dss/hdmi_omap4_panel.c
b/drivers/video/omap2/dss/hdmi_panel.c
similarity index 100%
rename from drivers/video/omap2/dss/hdmi_omap4_panel.c
rename to drivers/video/omap2/dss/hdmi_panel.c
--
1.7.5.4
--
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[PATCH v2 06/10] OMAP4: DSS2: HDMI: Split the HDMI driver to DSS and IP
From: Mythri P K mythr...@ti.com
Splitting HDMI IP dependent IP configuring code from HDMI DSS dependent code and
moving to a new IP file.
Signed-off-by: Mythri P K mythr...@ti.com
---
drivers/video/omap2/dss/Makefile |2 +-
drivers/video/omap2/dss/hdmi.c | 737 ---
drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c | 770
.../video/omap2/dss/{hdmi.h = hdmi_ti_4xxx_ip.h} |9 +-
include/video/omaphdmi.h |7 +
5 files changed, 783 insertions(+), 742 deletions(-)
create mode 100644 drivers/video/omap2/dss/hdmi_ti_4xxx_ip.c
rename drivers/video/omap2/dss/{hdmi.h = hdmi_ti_4xxx_ip.h} (99%)
diff --git a/drivers/video/omap2/dss/Makefile b/drivers/video/omap2/dss/Makefile
index 10d9d3b..3ffe98f 100644
--- a/drivers/video/omap2/dss/Makefile
+++ b/drivers/video/omap2/dss/Makefile
@@ -6,4 +6,4 @@ omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o
omapdss-$(CONFIG_OMAP4_DSS_HDMI) += hdmi.o \
- hdmi_omap4_panel.o
+ hdmi_omap4_panel.o hdmi_ti_4xxx_ip.o
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c
index e9e07e2..8baf4cf 100644
--- a/drivers/video/omap2/dss/hdmi.c
+++ b/drivers/video/omap2/dss/hdmi.c
@@ -41,7 +41,6 @@
#endif
#include dss.h
-#include hdmi.h
#include dss_features.h
#define HDMI_WP0x0
@@ -161,56 +160,6 @@ static const int code_vesa[85] = {
static const u8 edid_header[8] = {0x0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0x0};
-static inline void hdmi_write_reg(void __iomem *base_addr,
- const struct hdmi_reg idx, u32 val)
-{
- __raw_writel(val, base_addr + idx.idx);
-}
-
-static inline u32 hdmi_read_reg(void __iomem *base_addr,
- const struct hdmi_reg idx)
-{
- return __raw_readl(base_addr + idx.idx);
-}
-
-static inline void __iomem *hdmi_wp_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp;
-}
-
-static inline void __iomem *hdmi_phy_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-phy_offset;
-}
-
-static inline void __iomem *hdmi_pll_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-pll_offset;
-}
-
-static inline void __iomem *hdmi_av_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-core_av_offset;
-}
-
-static inline void __iomem *hdmi_core_sys_base(struct hdmi_ip_data *ip_data)
-{
- return ip_data-base_wp + ip_data-core_sys_offset;
-}
-
-static inline int hdmi_wait_for_bit_change(void __iomem *base_addr,
- const struct hdmi_reg idx,
- int b2, int b1, u32 val)
-{
- u32 t = 0;
- while (val != REG_GET(base_addr, idx, b2, b1)) {
- udelay(1);
- if (t++ 1)
- return !val;
- }
- return val;
-}
-
static int hdmi_runtime_get(void)
{
int r;
@@ -239,315 +188,6 @@ int hdmi_init_display(struct omap_dss_device *dssdev)
return 0;
}
-static int hdmi_pll_init(struct hdmi_ip_data *ip_data,
- enum hdmi_clk_refsel refsel)
-{
- u32 r;
- void __iomem *pll_base = hdmi_pll_base(ip_data);
- struct hdmi_pll_info *fmt = ip_data-pll_data;
-
- /* PLL start always use manual mode */
- REG_FLD_MOD(pll_base, PLLCTRL_PLL_CONTROL, 0x0, 0, 0);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG1);
- r = FLD_MOD(r, fmt-regm, 20, 9); /* CFG1_PLL_REGM */
- r = FLD_MOD(r, fmt-regn, 8, 1); /* CFG1_PLL_REGN */
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG1, r);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG2);
-
- r = FLD_MOD(r, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */
- r = FLD_MOD(r, 0x1, 13, 13); /* PLL_REFEN */
- r = FLD_MOD(r, 0x0, 14, 14); /* PHY_CLKINEN de-assert during locking */
-
- if (fmt-dcofreq) {
- /* divider programming for frequency beyond 1000Mhz */
- REG_FLD_MOD(pll_base, PLLCTRL_CFG3, fmt-regsd, 17, 10);
- r = FLD_MOD(r, 0x4, 3, 1); /* 1000MHz and 2000MHz */
- } else {
- r = FLD_MOD(r, 0x2, 3, 1); /* 500MHz and 1000MHz */
- }
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG2, r);
-
- r = hdmi_read_reg(pll_base, PLLCTRL_CFG4);
- r = FLD_MOD(r, fmt-regm2, 24, 18);
- r = FLD_MOD(r, fmt-regmf, 17, 0);
-
- hdmi_write_reg(pll_base, PLLCTRL_CFG4, r);
-
- /* go now */
- REG_FLD_MOD(pll_base, PLLCTRL_PLL_GO, 0x1, 0, 0);
-
- /* wait for bit change */
- if (hdmi_wait_for_bit_change(pll_base, PLLCTRL_PLL_GO,
- 0, 0, 1) != 1) {
- DSSERR(PLL GO bit not set\n);
- return -ETIMEDOUT;
-
Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
Hi Kevin, Sorry for bit late reply, I've been on holiday during last 3 weeks. On Sat, 2011-08-06 at 01:37 +0200, Hilman, Kevin wrote: Tero Kristo t-kri...@ti.com writes: All voltagedomains that have support for vc and vp are now automatically registered with SMPS regulator driver. Voltage.c builds a platform device structure for this purpose during late init. Signed-off-by: Tero Kristo t-kri...@ti.com With the creation of this dummy platform device, I'm a bit confused about how is the mapping from device to regulator meant to work here. e.g., for MPU DVFS, if I want to also scale voltage in the CPUfreq driver, I would do something like dev = omap2_get_mpuss_device() and then want to somehow get the regulator associated with the MPU device so I can do a regulator_set_voltage(). What would I use for the id argument of regulator_get()? Hmm right, I haven't been thinking about this part in too much detail. However, the regulator names are built in following way: - take voltdm name (e.g. mpu_iva) - add VDD_ in the beginning - capitalize whole thing (results in VDD_MPU_IVA) What's missing (at least in my mind) is the mapping of devices to regulators. True, should I think of something for this? Specifically, this part doesn't seem right: + supply-supply = vcc; + supply-dev_name = voltdm-name; becase voltdm-name is not a device name. Kevin Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6. Kotipaikka: Helsinki -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
On Fri, 2011-08-05 at 23:54 +0200, Hilman, Kevin wrote:
Tero Kristo t-kri...@ti.com writes:
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
[...]
+static void smps_add_regulator(struct platform_device *smps_dev,
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-name;
+ init_data-constraints.min_uV = 60;
+ init_data-constraints.max_uV = 145;
These values should come from the OMAP/PMIC limitations, not from hard
coded values.
True. Should this wait until the work is finished with the PMIC
parameter work or should I try to figure out a way to do this already
now?
Kevin
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCHv4 3/4] omap: smps: add smps regulator init to voltage.c
On Fri, 2011-08-05 at 23:52 +0200, Hilman, Kevin wrote:
Tero Kristo t-kri...@ti.com writes:
All voltagedomains that have support for vc and vp are now automatically
registered with SMPS regulator driver. Voltage.c builds a platform device
structure for this purpose during late init.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/voltage.c | 68
+
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index cebc8b1..790f7ab 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -25,6 +25,9 @@
#include linux/debugfs.h
#include linux/slab.h
#include linux/clk.h
+#include linux/platform_device.h
+#include linux/regulator/machine.h
+#include linux/regulator/omap-smps.h
#include plat/common.h
@@ -238,6 +241,39 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
}
}
+static void smps_add_regulator(struct platform_device *smps_dev,
Minor: maybe smps_add_regulator_info() is a better name, since it
doesn't actually add a regulator.
I can change this.
+ struct voltagedomain *voltdm)
+{
+ struct omap_smps_platform_data *info;
+ struct regulator_init_data *init_data;
+ struct regulator_consumer_supply *supply;
+
+ if (!smps_dev || !voltdm)
+ return;
+
+ info = smps_dev-dev.platform_data;
+
+ init_data = kzalloc(sizeof(struct regulator_init_data), GFP_KERNEL);
+ supply = kzalloc(sizeof(struct regulator_consumer_supply), GFP_KERNEL);
+
+ if (!init_data || !supply) {
+ kfree(init_data);
+ kfree(supply);
+ return;
+ }
+ supply-supply = vcc;
+ supply-dev_name = voltdm-name;
+ init_data-constraints.min_uV = 60;
+ init_data-constraints.max_uV = 145;
+ init_data-constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
+ init_data-constraints.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE;
+ init_data-num_consumer_supplies = 1;
+ init_data-consumer_supplies = supply;
+
+ info-regulators[info-num_regulators++] = init_data;
+}
+
+
/**
* omap_voltage_late_init() - Init the various voltage parameters
*
@@ -248,6 +284,10 @@ void omap_change_voltscale_method(struct voltagedomain
*voltdm,
int __init omap_voltage_late_init(void)
{
struct voltagedomain *voltdm;
+ struct platform_device *smps_dev[1];
why the array? a simple pointer should suffice:
I can try to change this. platform_add_devices needs an array of
platform_devices, thats the reason I made it like this initially.
struct platform_device *pdev;
+ struct omap_smps_platform_data *smps_pdata;
+ struct regulator_init_data **reg_list;
+ int num_smps = 0;
if (list_empty(voltdm_list)) {
pr_err(%s: Voltage driver support not added\n,
@@ -279,8 +319,36 @@ int __init omap_voltage_late_init(void)
voltdm-scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
+
+ if (voltdm-vc voltdm-vp)
+ num_smps++;
}
+ if (num_smps) {
+ smps_dev[0] = kzalloc(sizeof(struct platform_device),
+ GFP_KERNEL);
platform_device_alloc() should be used here, which takes the name and id.
Okay.
+ smps_pdata = kzalloc(sizeof(struct omap_smps_platform_data),
+ GFP_KERNEL);
+ reg_list = kzalloc(sizeof(void *) * num_smps, GFP_KERNEL);
Should this (void *) be (struct regulator_init_data *)?
No, we are allocating an array of pointers here, which gets filled later
by smps_add_regulator().
+ if (!smps_dev[0] || !smps_pdata || !reg_list) {
+ kfree(smps_dev[0]);
And the free for platform_device_alloc() is platform_device_put()
Okay also.
+ kfree(smps_pdata);
+ kfree(reg_list);
+ return -ENOMEM;
+ }
+
+ smps_pdata-regulators = reg_list;
+ smps_dev[0]-name = omap-smps;
+ smps_dev[0]-id = -1;
+ smps_dev[0]-dev.platform_data = smps_pdata;
platform_device_add_data() should be used here.
Okay.
+ list_for_each_entry(voltdm, voltdm_list, node)
+ if (voltdm-vp voltdm-vc)
+ smps_add_regulator(smps_dev[0], voltdm);
+
+ platform_add_devices(smps_dev, 1);
and finally, platform_device_add() here.
Okay, this way I can drop the array part from smps_dev.
+ }
return 0;
}
Kevin
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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Re: [PATCH 6/6] usb: musb: Add support for ti81xx platform
Hi, On Mon, Aug 29, 2011 at 11:01:54AM +0530, Gupta, Ajay Kumar wrote: diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 20a2873..07f3faf 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -1014,7 +1014,9 @@ static void musb_shutdown(struct platform_device *pdev) || defined(CONFIG_USB_MUSB_OMAP2PLUS) \ || defined(CONFIG_USB_MUSB_OMAP2PLUS_MODULE)\ || defined(CONFIG_USB_MUSB_AM35X) \ - || defined(CONFIG_USB_MUSB_AM35X_MODULE) + || defined(CONFIG_USB_MUSB_AM35X_MODULE)\ + || defined(CONFIG_USB_MUSB_TI81XX) \ + || defined(CONFIG_USB_MUSB_TI81XX_MODULE) we really need to find a better way to handle this :-( How about passing the mode info from musb_config (musb-config-fifo_mode), same way as musb-config-fifo_cfg not sure... Ideally we wouldn't really need those fifo tables, but I'm still thinking how to properly do that. Infact I think, we can kill musb-config-fifo_cfg and have only musb-config-mode as in this way all the fifo tables will be at one place and should help in maintenance. The idea of musb-config-fifo_cfg was to allow boards to pass their optimal fifo table. If a certain product, knows it will only support mass storage, why not letting them enable only those needed endpoints in an optimized way (with double buffering, bulk combine/split, etc). diff --git a/drivers/usb/musb/ti81xx.c b/drivers/usb/musb/ti81xx.c new file mode 100644 index 000..f95774e --- /dev/null +++ b/drivers/usb/musb/ti81xx.c I still think this should be part of am35x.c It really look like they are very similar. Wrapper registers are different but I will see on this and provide you details On how the merged file would look like. I am afraid that we may have to use Either #ifdef or cpu_is_xxx(). we can use platform_device_id to cope with the differences :-) See how I'm using it on dwc3 driver (Greg's usb-next branch). -- balbi signature.asc Description: Digital signature
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
On Sun, Aug 28, 2011 at 09:51:10PM -0400, Alan Stern wrote: Hmmm. Although the semantics of the various mb() macros were originally defined only for inter-CPU synchronization, I believe they are also supposed to work for guaranteeing the order of accesses to DMA-coherent memory. If that's not the case with ARM, something is seriously wrong. (Maybe I'm wrong about this, but if I am then there's currently _no_ way for the kernel to order DMA-coherent accesses on ARM.) That is the case with ARM - mb() and wmb() does everything that's required. rmb() is weaker than the other two. You know better than I do what is needed to resolve the ordering issue. However, contrary to what the original patch description said, this isn't entirely a matter of making the write visible to the host controller: No doubt in time the write will eventually become visible anyway. It's a matter of making the write become visible reasonably quickly and in the correct order with respect to other writes. I'm not entirely sure what the problem is - I think its about a write by the CPU to dma coherent memory being delayed and not being visible to the HC in a timely manner. Either mb() or wmb() placed after the write on ARM will do that - and ARM has no requirement to do a read- back after the barrier. Is this extra L2-cache poke needed for proper ordering, or is it needed merely to flush the write out to memory in a timely manner? Both, though primerily it's about ensuring correct ordering. A side effect of it is that it will flush all pending writes in L2 before completing. From the theoretical viewpoint, I think I'm right to say that mb() doesn't need to provide that level of ordering as its supposed to be an inter-CPU barrier - which probably means we need to invent a new barrier to deal with DMA memory ordering. However, given the difficulty of getting the existing barriers placed correctly, I don't think inventing new barriers is a very good idea. What we can do is view devices which perform DMA as being strongly ordered with respect to their memory accesses - iow, they have an implicit memory barrier before and after their accesses to memory. This would make the CPUs use of mb() have a conceptual pairing with the DMA agents. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv6 1/3] OMAP: I2C: Reset support
On Saturday 27 August 2011 04:36 AM, Kevin Hilman wrote:
Shubhrajyoti Dshubhrajy...@ti.com writes:
Under some error conditions the i2c driver may do a reset.
Adding a reset field and support in the device-specific code.
Signed-off-by: Shubhrajyoti Dshubhrajy...@ti.com
Needs update/rebase to apply against my for_3.2/i2c-cleanup branch...
[...]
Will rebase and send.
diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h
index 98ae49b..8aa91b6 100644
--- a/include/linux/i2c-omap.h
+++ b/include/linux/i2c-omap.h
@@ -38,6 +38,7 @@ struct omap_i2c_bus_platform_data {
int (*device_enable) (struct platform_device *pdev);
int (*device_shutdown) (struct platform_device *pdev);
int (*device_idle) (struct platform_device *pdev);
The above functions no longer exist in the platform_data struct.
+ int (*device_reset) (struct device *dev);
};
#endif
Kevin
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Re: [PATCHv6 2/3] OMAP: I2C: Remove the reset in the init path
On Saturday 27 August 2011 04:41 AM, Kevin Hilman wrote: Shubhrajyoti Dshubhrajy...@ti.com writes: - The reset in the driver at init is not needed anymore as the hwmod framework takes care of reseting it. - Reset is removed from omap_i2c_init, which was called not only during probe, but also after time out and error handling. device_reset were added in those places to effect the reset. - Earlier the hwmod SYSC settings were over-written in the driver. Removing the same and letting the hwmod take care of the settings. - Clean up the SYSS_RESETDONE_MASK macro as it is no longer needed. - Clean up the SYSCONFIG SYSC bit defination macros. - Fix the typos in wakeup. Signed-off-by: Shubhrajyoti Dshubhrajy...@ti.com I asked this in an earlier version, but here it is again. Are you sure a full IP reset is needed on the timeout and error conditions and not just the module-level one done by: omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); [ and later... ] /* Take the I2C module out of reset: */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); I kind of suspect that the IP rese was done because the omap_i2c_init() function was callled under the timeout/error conditions, but that a full IP SW reset is a bit heavy handed. My idea is that case of lockup in error path it could be helpful. We internally had a discussion on this https://gforge01.dal.design.ti.com/gf/project/opbu_mail_arcv/mailman/?action=ListThreadsmailman_id=218_forum_action=ForumMessageBrowsethread_id=12483 Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 6/6] usb: musb: Add support for ti81xx platform
Hi, we really need to find a better way to handle this :-( How about passing the mode info from musb_config (musb-config- fifo_mode), same way as musb-config-fifo_cfg not sure... Ideally we wouldn't really need those fifo tables, Yes, if all the board files provide their own fifo_cfg. but I'm still thinking how to properly do that. Infact I think, we can kill musb-config-fifo_cfg and have only musb-config-mode as in this way all the fifo tables will be at one place and should help in maintenance. The idea of musb-config-fifo_cfg was to allow boards to pass their optimal fifo table. If a certain product, knows it will only support mass storage, why not letting them enable only those needed endpoints in an optimized way (with double buffering, bulk combine/split, etc). Ok fine, understood. Wrapper registers are different but I will see on this and provide you details On how the merged file would look like. I am afraid that we may have to use Either #ifdef or cpu_is_xxx(). we can use platform_device_id to cope with the differences :-) See how I'm using it on dwc3 driver (Greg's usb-next branch). Please refer the usb section in below TRMs. da8x (aka. am1x) at http://www.ti.com/lit/ug/sprufw6b/sprufw6b.pdf am35x at http://www.ti.com/lit/ug/sprugr0b/sprugr0b.pdf ti81x at http://www.ti.com/lit/ug/sprugx8/sprugx8.pdf I have compiled the differences in the register map between am35x and ti81xx and they are listed below. === Registeram35x [has one musb]ti81xx [two musb interface] === REVISION0x000x - for USBSS 0x1000 - for musb0 0x1800 - for musb1 ALL USBSS registers Not present Available from offset 0x-0x0FFC USB_CTRL_REG0x040x1014 - for musb0 0x1814 - for musb1 USB_STAT_REG0x080x1018 - for musb0 0x1818 - for musb1 USB_EMULATION_REG 0x0cNot present USB_AUTOREQ_REG 0x14Not present USB_SRP_FIX_TIME_REG0x18Not present USB_TEARDOWN_REG0x1cNot present USB_IRQ_MERGED_STATUS Present as part of 0x1020 - for musb0 EP_INTR_x or CORE_INTR_x0x1820 - for musb1 register in am35x but at different offsets USB_IRQ_EOI Same as above 0x1024 - for musb0 0x1824 - for musb1 USB_IRQ_STATUS_RAW_0Same as above 0x1028 - for musb0 0x1828 - for musb1 USB_IRQ_STATUS_RAW_1Same as above 0x102c - for musb0 0x182c - for musb1 USB_IRQ_STATUS_0Same as above 0x1030 - for musb0 0x1830 - for musb1 USB_IRQ_STATUS_1Same as above 0x1034 - for musb0 0x1834 - for musb1 USB_IRQ_ENABLE_SET_0Same as above 0x1038 - for musb0 0x1838 - for musb1 USB_IRQ_ENABLE_SET_1Same as above 0x103c - for musb0 0x183c - for musb1 USB_IRQ_ENABLE_CLR_0Same as above 0x1040 - for musb0 0x1840 - for musb1 USB_IRQ_ENABLE_CLR_1Same as above 0x1044 - for musb0 0x1844 - for musb1 EP_INTR_SRC_REG 0x20Present as part of USB_IRQ_x register in ti81xx but at different offsets EP_INTR_SRC_SET_REG 0x24Same as above EP_INTR_SRC_CLEAR_REG 0x28Same as above EP_INTR_MASK_REG0x2c
Booting hangs with updated linux-omap kernel on OMAP3EVM
Hi, I tried booting OMAP3EVM with the updated linux-omap kernel . The last commit details on the kernel are : Author: Tony Lindgren t...@atomide.com commit b148d763841161894ed6629794064065a834aa2b Linux-omap rebuilt: Updated to use omap_sdrc_init It hangs at one point. Following is the boot log, Texas Instruments X-Loader 1.51 (May 3 2011 - 19:22:23) Starting X-loader on MMC Reading boot sector 220008 Bytes Read from MMC Starting OS Bootloader from MMC... Starting OS Bootloader... U-Boot 2010.06 (May 03 2011 - 19:23:34) OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz OMAP3 EVM board + LPDDR/NAND I2C: ready DRAM: 128 MiB NAND: HW ECC [Kernel/FS layout] selected 256 MiB In:serial Out: serial Err: serial Read back SMSC id 0x9220 Die ID #46a4000404032d460d01d014 Net: smc911x-0 Hit any key to stop autoboot: 0 OMAP3_EVM # OMAP3_EVM # OMAP3_EVM # run myboot smc911x: detected LAN9220 controller smc911x: phy initialized smc911x: MAC 00:50:c2:7e:93:73 Using smc911x-0 device TFTP from server 192.168.1.79; our IP address is 192.168.1.123 Filename 'uImage'. Load address: 0x8000 Loading: # # # # # # # # # ## done Bytes transferred = 3287400 (322968 hex) mmc1 is available reading ramdisk.gz 2013059 bytes read ## Booting kernel from Legacy Image at 8000 ... Image Name: Linux-3.1.0-rc3-11176-g2e5a5f9-d Image Type: ARM Linux Kernel Image (uncompressed) Data Size:3287336 Bytes = 3.1 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [0.00] Linux version 3.1.0-rc3-11176-g2e5a5f9-dirty (x0157478@psplinux060) (gcc version 4.3.3 (GCC) ) #4 SMP Mon Aug 29 15:37:16 IST 2011 [0.00] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f [0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache [0.00] Machine: OMAP3 EVM [0.00] Memory policy: ECC disabled, Data cache writeback [0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) [0.00] SRAM: Mapped pa 0x4020 to va 0xfe40 size: 0x1 [0.00] Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz [0.00] PERCPU: Embedded 8 pages/cpu @c0cef000 s10112 r8192 d14464 u32768 [0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 [0.00] Kernel command line: mem=128M console=ttyO0,115200n8 root=/dev/ram0 initrd=0x8200,40M ramdisk_size=32768 ip=dhcp [0.00] PID hash table entries: 512 (order: -1, 2048 bytes) [0.00] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) [0.00] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) [0.00] Memory: 128MB = 128MB total [0.00] Memory: 76736k/76736k available, 54336k reserved, 0K highmem [0.00] Virtual kernel memory layout: [0.00] vector : 0x - 0x1000 ( 4 kB) [0.00] fixmap : 0xfff0 - 0xfffe ( 896 kB) [0.00] DMA : 0xffc0 - 0xffe0 ( 2 MB) [0.00] vmalloc : 0xc880 - 0xf800 ( 760 MB) [0.00] lowmem : 0xc000 - 0xc800 ( 128 MB) [0.00] modules : 0xbf00 - 0xc000 ( 16 MB) [0.00] .text : 0xc0008000 - 0xc05c0d30 (5860 kB) [0.00] .init : 0xc05c1000 - 0xc060e780 ( 310 kB) [0.00] .data : 0xc061 - 0xc0695490 ( 534 kB) [0.00].bss : 0xc06954b4 - 0xc0bea4f4 (5461 kB) [0.00] Hierarchical RCU implementation. [0.00] NR_IRQS:410 [0.00] IRQ: Found an INTC at 0xfa20 (revision 4.0) with 96 interrupts [0.00] Total of 96 interrupts on 1 active controller [0.00] OMAP clockevent source: GPTIMER1 at 32768 Hz [0.00] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms [0.00] Console: colour dummy device 80x30 [0.00] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [0.00] ... MAX_LOCKDEP_SUBCLASSES: 8 [0.00] ... MAX_LOCK_DEPTH: 48 [0.00] ... MAX_LOCKDEP_KEYS:8191 [0.00] ... CLASSHASH_SIZE:
Re: Booting hangs with updated linux-omap kernel on OMAP3EVM
On Mon, Aug 29, 2011 at 4:18 PM, Ravi, Deepthy deepthy.r...@ti.com wrote: Hi, I tried booting OMAP3EVM with the updated linux-omap kernel . The last commit details on the kernel are : Author: Tony Lindgren t...@atomide.com commit b148d763841161894ed6629794064065a834aa2b Linux-omap rebuilt: Updated to use omap_sdrc_init It hangs at one point. Following is the boot log, Texas Instruments X-Loader 1.51 (May 3 2011 - 19:22:23) Starting X-loader on MMC Reading boot sector 220008 Bytes Read from MMC Starting OS Bootloader from MMC... Starting OS Bootloader... U-Boot 2010.06 (May 03 2011 - 19:23:34) OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz OMAP3 EVM board + LPDDR/NAND I2C: ready DRAM: 128 MiB NAND: HW ECC [Kernel/FS layout] selected 256 MiB In: serial Out: serial Err: serial Read back SMSC id 0x9220 Die ID #46a4000404032d460d01d014 Net: smc911x-0 Hit any key to stop autoboot: 0 OMAP3_EVM # OMAP3_EVM # OMAP3_EVM # run myboot smc911x: detected LAN9220 controller smc911x: phy initialized smc911x: MAC 00:50:c2:7e:93:73 Using smc911x-0 device TFTP from server 192.168.1.79; our IP address is 192.168.1.123 Filename 'uImage'. Load address: 0x8000 Loading: # # # # # # # # # ## done Bytes transferred = 3287400 (322968 hex) mmc1 is available reading ramdisk.gz 2013059 bytes read ## Booting kernel from Legacy Image at 8000 ... Image Name: Linux-3.1.0-rc3-11176-g2e5a5f9-d Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3287336 Bytes = 3.1 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.00] Linux version 3.1.0-rc3-11176-g2e5a5f9-dirty (x0157478@psplinux060) (gcc version 4.3.3 (GCC) ) #4 SMP Mon Aug 29 15:37:16 IST 2011 [ 0.00] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f [ 0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache [ 0.00] Machine: OMAP3 EVM [ 0.00] Memory policy: ECC disabled, Data cache writeback [ 0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) [ 0.00] SRAM: Mapped pa 0x4020 to va 0xfe40 size: 0x1 [ 0.00] Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz [ 0.00] PERCPU: Embedded 8 pages/cpu @c0cef000 s10112 r8192 d14464 u32768 [ 0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 [ 0.00] Kernel command line: mem=128M console=ttyO0,115200n8 root=/dev/ram0 initrd=0x8200,40M ramdisk_size=32768 ip=dhcp [ 0.00] PID hash table entries: 512 (order: -1, 2048 bytes) [ 0.00] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.00] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) [ 0.00] Memory: 128MB = 128MB total [ 0.00] Memory: 76736k/76736k available, 54336k reserved, 0K highmem [ 0.00] Virtual kernel memory layout: [ 0.00] vector : 0x - 0x1000 ( 4 kB) [ 0.00] fixmap : 0xfff0 - 0xfffe ( 896 kB) [ 0.00] DMA : 0xffc0 - 0xffe0 ( 2 MB) [ 0.00] vmalloc : 0xc880 - 0xf800 ( 760 MB) [ 0.00] lowmem : 0xc000 - 0xc800 ( 128 MB) [ 0.00] modules : 0xbf00 - 0xc000 ( 16 MB) [ 0.00] .text : 0xc0008000 - 0xc05c0d30 (5860 kB) [ 0.00] .init : 0xc05c1000 - 0xc060e780 ( 310 kB) [ 0.00] .data : 0xc061 - 0xc0695490 ( 534 kB) [ 0.00] .bss : 0xc06954b4 - 0xc0bea4f4 (5461 kB) [ 0.00] Hierarchical RCU implementation. [ 0.00] NR_IRQS:410 [ 0.00] IRQ: Found an INTC at 0xfa20 (revision 4.0) with 96 interrupts [ 0.00] Total of 96 interrupts on 1 active controller [ 0.00] OMAP clockevent source: GPTIMER1 at 32768 Hz [ 0.00] sched_clock: 32 bits at 32kHz, resolution 30517ns, wraps every 131071999ms [ 0.00] Console: colour dummy device 80x30 [ 0.00] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.00] ...
Re: Booting hangs with updated linux-omap kernel on OMAP3EVM
On Mon, Aug 29, 2011 at 4:18 PM, Ravi, Deepthy deepthy.r...@ti.com wrote: Hi, I tried booting OMAP3EVM with the updated linux-omap kernel . The last commit details on the kernel are : Author: Tony Lindgren t...@atomide.com commit b148d763841161894ed6629794064065a834aa2b Linux-omap rebuilt: Updated to use omap_sdrc_init probably missing below commit from mainline, http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=69dd3d8e29e294caaf63eb5e8a72d250279f9e5f Try, git revert f3637a5f2e2eb391ff5757bc83fb5de8f9726464 -- Thanks, Govindraj.R It hangs at one point. Following is the boot log, Texas Instruments X-Loader 1.51 (May 3 2011 - 19:22:23) Starting X-loader on MMC Reading boot sector 220008 Bytes Read from MMC Starting OS Bootloader from MMC... Starting OS Bootloader... U-Boot 2010.06 (May 03 2011 - 19:23:34) OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz OMAP3 EVM board + LPDDR/NAND I2C: ready DRAM: 128 MiB NAND: HW ECC [Kernel/FS layout] selected 256 MiB In: serial Out: serial Err: serial Read back SMSC id 0x9220 Die ID #46a4000404032d460d01d014 Net: smc911x-0 Hit any key to stop autoboot: 0 OMAP3_EVM # OMAP3_EVM # OMAP3_EVM # run myboot smc911x: detected LAN9220 controller smc911x: phy initialized smc911x: MAC 00:50:c2:7e:93:73 Using smc911x-0 device TFTP from server 192.168.1.79; our IP address is 192.168.1.123 Filename 'uImage'. Load address: 0x8000 Loading: # # # # # # # # # ## done Bytes transferred = 3287400 (322968 hex) mmc1 is available reading ramdisk.gz 2013059 bytes read ## Booting kernel from Legacy Image at 8000 ... Image Name: Linux-3.1.0-rc3-11176-g2e5a5f9-d Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3287336 Bytes = 3.1 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [ 0.00] Linux version 3.1.0-rc3-11176-g2e5a5f9-dirty (x0157478@psplinux060) (gcc version 4.3.3 (GCC) ) #4 SMP Mon Aug 29 15:37:16 IST 2011 [ 0.00] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f [ 0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache [ 0.00] Machine: OMAP3 EVM [ 0.00] Memory policy: ECC disabled, Data cache writeback [ 0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) [ 0.00] SRAM: Mapped pa 0x4020 to va 0xfe40 size: 0x1 [ 0.00] Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz [ 0.00] PERCPU: Embedded 8 pages/cpu @c0cef000 s10112 r8192 d14464 u32768 [ 0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 [ 0.00] Kernel command line: mem=128M console=ttyO0,115200n8 root=/dev/ram0 initrd=0x8200,40M ramdisk_size=32768 ip=dhcp [ 0.00] PID hash table entries: 512 (order: -1, 2048 bytes) [ 0.00] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.00] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) [ 0.00] Memory: 128MB = 128MB total [ 0.00] Memory: 76736k/76736k available, 54336k reserved, 0K highmem [ 0.00] Virtual kernel memory layout: [ 0.00] vector : 0x - 0x1000 ( 4 kB) [ 0.00] fixmap : 0xfff0 - 0xfffe ( 896 kB) [ 0.00] DMA : 0xffc0 - 0xffe0 ( 2 MB) [ 0.00] vmalloc : 0xc880 - 0xf800 ( 760 MB) [ 0.00] lowmem : 0xc000 - 0xc800 ( 128 MB) [ 0.00] modules : 0xbf00 - 0xc000 ( 16 MB) [ 0.00] .text : 0xc0008000 - 0xc05c0d30 (5860 kB) [ 0.00] .init : 0xc05c1000 - 0xc060e780 ( 310 kB) [ 0.00] .data : 0xc061 - 0xc0695490 ( 534 kB) [ 0.00] .bss : 0xc06954b4 - 0xc0bea4f4 (5461 kB) [ 0.00] Hierarchical RCU implementation. [ 0.00] NR_IRQS:410 [ 0.00] IRQ: Found an INTC at 0xfa20 (revision 4.0) with 96 interrupts [ 0.00] Total of 96 interrupts on 1 active controller [ 0.00] OMAP clockevent source: GPTIMER1 at 32768 Hz [
RE: Booting hangs with updated linux-omap kernel on OMAP3EVM
Hi Govindraj, With this commit added, it is booting up.Thanks for the info. Thanks, Deepthy Ravi. From: Govindraj [govindraj...@gmail.com] Sent: Monday, August 29, 2011 4:59 PM To: Ravi, Deepthy Cc: linux-omap@vger.kernel.org Subject: Re: Booting hangs with updated linux-omap kernel on OMAP3EVM On Mon, Aug 29, 2011 at 4:18 PM, Ravi, Deepthy deepthy.r...@ti.com wrote: Hi, I tried booting OMAP3EVM with the updated linux-omap kernel . The last commit details on the kernel are : Author: Tony Lindgren t...@atomide.com commit b148d763841161894ed6629794064065a834aa2b Linux-omap rebuilt: Updated to use omap_sdrc_init probably missing below commit from mainline, http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=69dd3d8e29e294caaf63eb5e8a72d250279f9e5f Try, git revert f3637a5f2e2eb391ff5757bc83fb5de8f9726464 -- Thanks, Govindraj.R It hangs at one point. Following is the boot log, Texas Instruments X-Loader 1.51 (May 3 2011 - 19:22:23) Starting X-loader on MMC Reading boot sector 220008 Bytes Read from MMC Starting OS Bootloader from MMC... Starting OS Bootloader... U-Boot 2010.06 (May 03 2011 - 19:23:34) OMAP3430/3530-GP ES3.1, CPU-OPP2 L3-165MHz OMAP3 EVM board + LPDDR/NAND I2C: ready DRAM: 128 MiB NAND: HW ECC [Kernel/FS layout] selected 256 MiB In:serial Out: serial Err: serial Read back SMSC id 0x9220 Die ID #46a4000404032d460d01d014 Net: smc911x-0 Hit any key to stop autoboot: 0 OMAP3_EVM # OMAP3_EVM # OMAP3_EVM # run myboot smc911x: detected LAN9220 controller smc911x: phy initialized smc911x: MAC 00:50:c2:7e:93:73 Using smc911x-0 device TFTP from server 192.168.1.79; our IP address is 192.168.1.123 Filename 'uImage'. Load address: 0x8000 Loading: # # # # # # # # # ## done Bytes transferred = 3287400 (322968 hex) mmc1 is available reading ramdisk.gz 2013059 bytes read ## Booting kernel from Legacy Image at 8000 ... Image Name: Linux-3.1.0-rc3-11176-g2e5a5f9-d Image Type: ARM Linux Kernel Image (uncompressed) Data Size:3287336 Bytes = 3.1 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... Uncompressing Linux... done, booting the kernel. [0.00] Linux version 3.1.0-rc3-11176-g2e5a5f9-dirty (x0157478@psplinux060) (gcc version 4.3.3 (GCC) ) #4 SMP Mon Aug 29 15:37:16 IST 2011 [0.00] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f [0.00] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache [0.00] Machine: OMAP3 EVM [0.00] Memory policy: ECC disabled, Data cache writeback [0.00] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp ) [0.00] SRAM: Mapped pa 0x4020 to va 0xfe40 size: 0x1 [0.00] Clocking rate (Crystal/Core/MPU): 26.0/332/500 MHz [0.00] PERCPU: Embedded 8 pages/cpu @c0cef000 s10112 r8192 d14464 u32768 [0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 [0.00] Kernel command line: mem=128M console=ttyO0,115200n8 root=/dev/ram0 initrd=0x8200,40M ramdisk_size=32768 ip=dhcp [0.00] PID hash table entries: 512 (order: -1, 2048 bytes) [0.00] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) [0.00] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) [0.00] Memory: 128MB = 128MB total [0.00] Memory: 76736k/76736k available, 54336k reserved, 0K highmem [0.00] Virtual kernel memory layout: [0.00] vector : 0x - 0x1000 ( 4 kB) [0.00] fixmap : 0xfff0 - 0xfffe ( 896 kB) [0.00] DMA : 0xffc0 - 0xffe0 ( 2 MB) [0.00] vmalloc : 0xc880 - 0xf800 ( 760 MB) [0.00] lowmem : 0xc000 - 0xc800 ( 128 MB) [0.00] modules : 0xbf00 - 0xc000 ( 16 MB) [0.00] .text : 0xc0008000 - 0xc05c0d30 (5860 kB) [0.00] .init : 0xc05c1000 - 0xc060e780 ( 310 kB) [0.00] .data : 0xc061 - 0xc0695490 ( 534 kB) [0.00]
RE: [PATCH v5 01/22] gpio/omap: remove dependency on gpio_bank_count
[...]
void omap2_gpio_prepare_for_idle(int off_mode)
{
- int i, c = 0;
- int min = 0;
-
- if (cpu_is_omap34xx())
- min = 1;
+ int c = 0;
+ struct gpio_bank *bank;
- for (i = min; i gpio_bank_count; i++) {
- struct gpio_bank *bank =gpio_bank[i];
+ list_for_each_entry(bank,omap_gpio_list, node) {
u32 l1 = 0, l2 = 0;
int j;
+ /* TODO: Do not use cpu_is_omap34xx */
Is this addressed in subsequent patches ?
Yes.
--
Tarun
+ if ((cpu_is_omap34xx()) (bank-id == 0))
+ continue;
+
Rest of the changes looks good to me.
After you answer above, you can add my,
Reviewed-by: Santosh Shilimkar santosh.shilim...@ti.com
Regards
Santosh
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[RFC PATCH-V2 0/4] Introducing TI's New SoC/board AM335XEVM
From: Vaibhav Hiremath hvaib...@ti.com This patch set adds support for AM335x device having Cortex-A8 MPU. AM335X is treated as another OMAP3 variant, where, along with existing cpu class OMAP34XX, new cpu class AM33XX is created and the respective type is AM335X, which is newly added device in the family. This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks return success for AM335X. Currently submitting this patch series as a RFC (V2), to initiate the discussion on the approach we have chosen for AM335x device support. Based on the feedback, will submit the final version of patch series immediately. This patch series is created on top of linux-omap/master and Hemant's TI814X patches submitted recently. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg53457.html Also, I have validated OMAP3 boot test with this patch-series on OMAP3EVM. Changes from V1: - Created separate cpu/SoC class for AM33XX family of devices, due to all known facts. This is been mentioned in main-chain https://patchwork.kernel.org/patch/1056312/ - BUG Fix in debug-macro.S, which was leading to build failure. https://patchwork.kernel.org/patch/1056302/ Afzal Mohammed (4): AM335X: Update common omap platform files AM335X: Update common OMAP machine specific sources AM335X: Create board support and enable build for AM335XEVM AM335X: Add low level debugging support arch/arm/mach-omap2/Kconfig| 10 arch/arm/mach-omap2/Makefile |2 + arch/arm/mach-omap2/board-am335xevm.c | 57 arch/arm/mach-omap2/clock3xxx_data.c |3 + arch/arm/mach-omap2/common.c | 16 +++ arch/arm/mach-omap2/id.c |6 +++ arch/arm/mach-omap2/include/mach/debug-macro.S | 22 + arch/arm/mach-omap2/io.c | 25 ++ arch/arm/plat-omap/include/plat/am33xx.h | 25 ++ arch/arm/plat-omap/include/plat/clkdev_omap.h |1 + arch/arm/plat-omap/include/plat/clock.h|1 + arch/arm/plat-omap/include/plat/common.h |1 + arch/arm/plat-omap/include/plat/cpu.h | 23 ++ arch/arm/plat-omap/include/plat/hardware.h |1 + arch/arm/plat-omap/include/plat/io.h | 20 arch/arm/plat-omap/include/plat/omap34xx.h |2 + arch/arm/plat-omap/include/plat/serial.h |4 ++ arch/arm/plat-omap/include/plat/uncompress.h |6 +++ arch/arm/plat-omap/io.c|3 + 19 files changed, 228 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-omap2/board-am335xevm.c create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH-V2 3/4] AM335X: Create board support and enable build for AM335XEVM
From: Afzal Mohammed af...@ti.com
This patch adds minimal support and build configuration for
AM335X EVM.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/Kconfig |5 +++
arch/arm/mach-omap2/Makefile |2 +
arch/arm/mach-omap2/board-am335xevm.c | 57 +
3 files changed, 64 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/board-am335xevm.c
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f437e70..b41aee4 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -326,6 +326,11 @@ config MACH_TI8148EVM
depends on SOC_OMAPTI81XX
default y
+config MACH_AM335XEVM
+ bool AM335X Evaluation Module
+ depends on SOC_OMAPTI81XX
+ default y
+
config MACH_OMAP_4430SDP
bool OMAP 4430 SDP board
default y
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8bcb2b2..88e6a6f 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -239,6 +239,8 @@ obj-$(CONFIG_MACH_CRANEBOARD) +=
board-am3517crane.o
obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o
obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
obj-$(CONFIG_MACH_TI8148EVM) += board-ti8148evm.o
+obj-$(CONFIG_MACH_AM335XEVM) += board-am335xevm.o
+
# Platform specific device init code
omap-flash-$(CONFIG_MTD_NAND_OMAP2):= board-flash.o
diff --git a/arch/arm/mach-omap2/board-am335xevm.c
b/arch/arm/mach-omap2/board-am335xevm.c
new file mode 100644
index 000..e3f5c4e
--- /dev/null
+++ b/arch/arm/mach-omap2/board-am335xevm.c
@@ -0,0 +1,57 @@
+/*
+ * Code for AM335X EVM.
+ *
+ * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include linux/kernel.h
+#include linux/init.h
+
+#include mach/hardware.h
+#include asm/mach-types.h
+#include asm/mach/arch.h
+#include asm/mach/map.h
+
+#include plat/irqs.h
+#include plat/board.h
+#include plat/common.h
+
+static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
+};
+
+static void __init am335x_init_early(void)
+{
+ omap2_init_common_infrastructure();
+}
+
+static void __init am335x_evm_init(void)
+{
+ omap_serial_init();
+ omap_sdrc_init(NULL, NULL);
+ omap_board_config = am335x_evm_config;
+ omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
+}
+
+static void __init am335x_evm_map_io(void)
+{
+ omap2_set_globals_am33xx();
+ omapam33xx_map_common_io();
+}
+
+MACHINE_START(AM335XEVM, am335xevm)
+ /* Maintainer: Texas Instruments */
+ .boot_params= 0x8100,
+ .map_io = am335x_evm_map_io,
+ .init_early = am335x_init_early,
+ .init_irq = ti81xx_init_irq,
+ .timer = omap3_timer,
+ .init_machine = am335x_evm_init,
+MACHINE_END
--
1.6.2.4
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[RFC PATCH-V2 4/4] AM335X: Add low level debugging support
From: Afzal Mohammed af...@ti.com
Add support for low level debugging on AM335X EVM. Currently only
support for UART1 console, which is used on AM335X EVM is added.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/include/mach/debug-macro.S | 22 ++
arch/arm/plat-omap/include/plat/serial.h |4
arch/arm/plat-omap/include/plat/uncompress.h |6 ++
3 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S
b/arch/arm/mach-omap2/include/mach/debug-macro.S
index 309e328..5bdfd0b 100644
--- a/arch/arm/mach-omap2/include/mach/debug-macro.S
+++ b/arch/arm/mach-omap2/include/mach/debug-macro.S
@@ -78,6 +78,8 @@ omap_uart_lsr:.word 0
beq 82f @ configure UART2
cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
beq 83f @ configure UART3
+ cmp \rp, #AM335XUART1 @ AM335X UART offsets different
+ beq 84f @ configure UART1
cmp \rp, #ZOOM_UART @ only on zoom2/3
beq 95f @ configure ZOOM_UART
@@ -106,6 +108,9 @@ omap_uart_lsr: .word 0
b 98f
83:mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
b 98f
+84:ldr \rp, =AM335X_UART1_BASE
+ and \rp, \rp, #0x00ff
+ b 97f
95:ldr \rp, =ZOOM_UART_BASE
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
@@ -121,6 +126,23 @@ omap_uart_lsr: .word 0
b 10b
/* Store both phys and virt address for the uart */
+97:add \rp, \rp, #0x4400 @ phys base
+ mrc p15, 0, \rv, c1, c0
+ tst \rv, #1 @ MMU enabled?
+ ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
+ ldrne \rv, =omap_uart_phys@ MMU enabled
+ str \rp, [\rv, #0]
+ sub \rp, \rp, #0x4400 @ phys base
+ add \rp, \rp, #0xf900 @ virt base
+ add \rv, \rv, #4@ omap_uart_virt
+ str \rp, [\rv, #0]
+ mov \rp, #(UART_LSR OMAP_PORT_SHIFT)
+ add \rv, \rv, #4@ omap_uart_lsr
+ str \rp, [\rv, #0]
+
+ b 10b
+
+ /* Store both phys and virt address for the uart */
98:add \rp, \rp, #0x4800 @ phys base
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
diff --git a/arch/arm/plat-omap/include/plat/serial.h
b/arch/arm/plat-omap/include/plat/serial.h
index 865b13e..d7c1216 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -59,6 +59,9 @@
/* AM3505/3517 UART4 */
#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
+/* AM335X serial port */
+#define AM335X_UART1_BASE 0x44E09000
+
/* External port on Zoom2/3 */
#define ZOOM_UART_BASE 0x1000
#define ZOOM_UART_VIRT 0xfa40
@@ -92,6 +95,7 @@
#define TI81XXUART181
#define TI81XXUART282
#define TI81XXUART383
+#define AM335XUART184
#define ZOOM_UART 95 /* Only on zoom2/3 */
/* This is only used by 8250.c for omap1510 */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h
b/arch/arm/plat-omap/include/plat/uncompress.h
index 8d052e7..3592ce4 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -97,6 +97,10 @@ static inline void flush(void)
_DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
TI81XXUART##p)
+#define DEBUG_LL_AM335X(p, mach) \
+ _DEBUG_LL_ENTRY(mach, AM335X_UART##p##_BASE, OMAP_PORT_SHIFT, \
+ AM335XUART##p)
+
static inline void __arch_decomp_setup(unsigned long arch_id)
{
int port = 0;
@@ -178,6 +182,8 @@ static inline void __arch_decomp_setup(unsigned long
arch_id)
/* TI8148 base boards using UART1 */
DEBUG_LL_TI81XX(1, ti8148evm);
+ /* AM335x base boards using UART1 */
+ DEBUG_LL_AM335X(1, am335xevm);
} while (0);
}
--
1.6.2.4
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[RFC PATCH-V2 1/4] AM335X: Update common omap platform files
From: Afzal Mohammed af...@ti.com
This patch updates the common platform files with AM335X device
support.
The approach taken in this patch is,
AM33XX device will be considered as OMAP3 variant, and a separate
SoC class created for AM33XX family of devices with a subclass type
for AM335X device which is newly added device in the family.
This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x()
checks will return success on AM335X.
A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3
to include support for AM33XX build.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/Kconfig |5 +
arch/arm/plat-omap/include/plat/clkdev_omap.h |1 +
arch/arm/plat-omap/include/plat/clock.h |1 +
arch/arm/plat-omap/include/plat/cpu.h | 23 +++
4 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index cc4f213..f437e70 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -78,6 +78,11 @@ config SOC_OMAPTI81XX
depends on ARCH_OMAP3
default y
+config SOC_OMAPAM33XX
+ bool AM33XX support
+ depends on ARCH_OMAP3
+ default y
+
config OMAP_PACKAGE_ZAF
bool
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h
b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 3c50ec8..991e72c 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -41,6 +41,7 @@ struct omap_clk {
#define CK_TI816X (1 12)
#define CK_446X(1 13)
#define CK_TI814X (1 14)
+#define CK_AM335X (1 15) /* AM335x specific clocks */
#define CK_34XX(CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h
b/arch/arm/plat-omap/include/plat/clock.h
index 1c41292..b5d7447 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -60,6 +60,7 @@ struct clkops {
#define RATE_IN_TI816X (1 6)
#define RATE_IN_4460 (1 7)
#define RATE_IN_TI814X (1 8)
+#define RATE_IN_AM335X (1 9)
#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/cpu.h
b/arch/arm/plat-omap/include/plat/cpu.h
index f4ebbae..4f04ae0 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -106,6 +106,12 @@ static inline int is_ti ##class (void) \
return (GET_TI_CLASS == (id)) ? 1 : 0; \
}
+#define IS_AM_CLASS(class, id) \
+static inline int is_am ##class (void) \
+{ \
+ return (GET_TI_CLASS == (id)) ? 1 : 0; \
+}
+
#define GET_OMAP_SUBCLASS ((omap_rev() 20) 0x0fff)
#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -120,6 +126,12 @@ static inline int is_ti ##subclass (void) \
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
}
+#define IS_AM_SUBCLASS(subclass, id) \
+static inline int is_am ##subclass (void) \
+{ \
+ return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
+}
+
IS_OMAP_CLASS(7xx, 0x07)
IS_OMAP_CLASS(15xx, 0x15)
IS_OMAP_CLASS(16xx, 0x16)
@@ -128,6 +140,7 @@ IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
IS_TI_CLASS(81xx, 0x81)
+IS_AM_CLASS(33xx, 0x33)
IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
@@ -138,6 +151,7 @@ IS_OMAP_SUBCLASS(446x, 0x446)
IS_TI_SUBCLASS(816x, 0x816)
IS_TI_SUBCLASS(814x, 0x814)
+IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap7xx() 0
#define cpu_is_omap15xx() 0
@@ -150,6 +164,7 @@ IS_TI_SUBCLASS(814x, 0x814)
#define cpu_is_ti81xx()0
#define cpu_is_ti816x()0
#define cpu_is_ti814x()0
+#define cpu_is_am335x()0
#define cpu_is_omap44xx() 0
#define cpu_is_omap443x() 0
#define cpu_is_omap446x() 0
@@ -358,6 +373,8 @@ IS_OMAP_TYPE(3517, 0x3517)
# undef cpu_is_ti81xx
# undef cpu_is_ti816x
# undef cpu_is_ti814x
+# undef cpu_is_am33xx
+# undef cpu_is_am335x
# define cpu_is_omap3430() is_omap3430()
# define cpu_is_omap3503() (cpu_is_omap3430()\
(!omap3_has_iva())\
@@ -376,6 +393,8 @@ IS_OMAP_TYPE(3517, 0x3517)
# define cpu_is_ti81xx() is_ti81xx()
# define cpu_is_ti816x() is_ti816x()
# define cpu_is_ti814x() is_ti814x()
+# define cpu_is_am33xx() is_am33xx()
+# define cpu_is_am335x() is_am335x()
#endif
# if
[RFC PATCH-V2 2/4] AM335X: Update common OMAP machine specific sources
From: Afzal Mohammed af...@ti.com
This patch updates the common machine specific source files for
support for AM335x with cpu type, macros for identification of
AM335X device.
Signed-off-by: Vaibhav Hiremath hvaib...@ti.com
Signed-off-by: Afzal Mohammed af...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c |3 +++
arch/arm/mach-omap2/common.c | 16
arch/arm/mach-omap2/id.c |6 ++
arch/arm/mach-omap2/io.c | 25 +
arch/arm/plat-omap/include/plat/am33xx.h | 25 +
arch/arm/plat-omap/include/plat/common.h |1 +
arch/arm/plat-omap/include/plat/hardware.h |1 +
arch/arm/plat-omap/include/plat/io.h | 20
arch/arm/plat-omap/include/plat/omap34xx.h |2 ++
arch/arm/plat-omap/io.c|3 +++
10 files changed, 102 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-omap/include/plat/am33xx.h
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c
b/arch/arm/mach-omap2/clock3xxx_data.c
index af58741..0ad8841 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3485,6 +3485,9 @@ int __init omap3xxx_clk_init(void)
} else if (cpu_is_ti814x()) {
cpu_mask = RATE_IN_TI814X;
cpu_clkflg = CK_TI814X;
+ } else if (cpu_is_am335x()) {
+ cpu_mask = RATE_IN_AM335X;
+ cpu_clkflg = CK_AM335X;
} else if (cpu_is_omap34xx()) {
if (omap_rev() == OMAP3430_REV_ES1_0) {
cpu_mask = RATE_IN_3430ES1;
diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c
index 7ce80f2..9aea780 100644
--- a/arch/arm/mach-omap2/common.c
+++ b/arch/arm/mach-omap2/common.c
@@ -119,6 +119,22 @@ void __init omap2_set_globals_ti81xx(void)
{
__omap2_set_globals(ti81xx_globals);
}
+
+#define AM33XX_TAP_BASE(AM33XX_CTRL_BASE + \
+ TI81XX_CONTROL_DEVICE_ID - 0x204)
+
+static struct omap_globals am33xx_globals = {
+ .class = OMAP343X_CLASS,
+ .tap= OMAP2_L4_IO_ADDRESS(AM33XX_TAP_BASE),
+ .ctrl = AM33XX_CTRL_BASE,
+ .prm= AM33XX_PRCM_BASE,
+ .cm = AM33XX_PRCM_BASE,
+};
+
+void __init omap2_set_globals_am33xx(void)
+{
+ __omap2_set_globals(am33xx_globals);
+}
#endif
#if defined(CONFIG_ARCH_OMAP4)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 98f1922..bb8603f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -362,6 +362,10 @@ static void __init omap3_check_revision(void)
omap_revision = TI8148_REV_ES2_1;
}
break;
+ case 0xb944:
+ omap_revision = AM335X_REV_ES1_0;
+ omap_chip.oc |= CHIP_IS_AM335X;
+ break;
default:
/* Unknown default to latest silicon rev as default*/
omap_revision = OMAP3630_REV_ES1_2;
@@ -469,6 +473,8 @@ static void __init omap3_cpuinfo(void)
strcpy(cpu_name, TI816X);
} else if (cpu_is_ti814x()) {
strcpy(cpu_name, TI814X);
+ } else if (cpu_is_am335x()) {
+ strcpy(cpu_name, AM335X);
} else if (omap3_has_iva() omap3_has_sgx()) {
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
strcpy(cpu_name, OMAP3430/3530);
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 1bba2db..2edf9c7 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -182,7 +182,24 @@ static struct map_desc omapti81xx_io_desc[] __initdata = {
.pfn= __phys_to_pfn(L4_34XX_PHYS),
.length = L4_34XX_SIZE,
.type = MT_DEVICE
+ }
+};
+#endif
+
+#ifdef CONFIG_SOC_OMAPAM33XX
+static struct map_desc omapam33xx_io_desc[] __initdata = {
+ {
+ .virtual= L4_34XX_VIRT,
+ .pfn= __phys_to_pfn(L4_34XX_PHYS),
+ .length = L4_34XX_SIZE,
+ .type = MT_DEVICE
},
+ {
+ .virtual= L4_WK_AM33XX_VIRT,
+ .pfn= __phys_to_pfn(L4_WK_AM33XX_PHYS),
+ .length = L4_WK_AM33XX_SIZE,
+ .type = MT_DEVICE
+ }
};
#endif
@@ -286,6 +303,14 @@ void __init omapti81xx_map_common_io(void)
}
#endif
+#ifdef CONFIG_SOC_OMAPAM33XX
+void __init omapam33xx_map_common_io(void)
+{
+ iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
+ _omap2_map_common_io();
+}
+#endif
+
#ifdef CONFIG_ARCH_OMAP4
void __init omap44xx_map_common_io(void)
{
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h
b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 000..06c19bb
--- /dev/null
+++
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
On Mon, 29 Aug 2011, Russell King - ARM Linux wrote: You know better than I do what is needed to resolve the ordering issue. However, contrary to what the original patch description said, this isn't entirely a matter of making the write visible to the host controller: No doubt in time the write will eventually become visible anyway. It's a matter of making the write become visible reasonably quickly and in the correct order with respect to other writes. I'm not entirely sure what the problem is - I think its about a write by the CPU to dma coherent memory being delayed and not being visible to the HC in a timely manner. Either mb() or wmb() placed after the write on ARM will do that - and ARM has no requirement to do a read- back after the barrier. Okay, then this needs to be done in a way that won't slow down other architectures with an unnecessary memory barrier. And there needs to be a comment in the code explaining that the new mb() instruction isn't being used as a memory barrier but rather to expedite writeback of the L2 cache. This certainly is starting to sound like something that needs to be addressed in the arch-specific #include files... Is this extra L2-cache poke needed for proper ordering, or is it needed merely to flush the write out to memory in a timely manner? Both, though primerily it's about ensuring correct ordering. A side effect of it is that it will flush all pending writes in L2 before completing. From the theoretical viewpoint, I think I'm right to say that mb() doesn't need to provide that level of ordering as its supposed to be an inter-CPU barrier - which probably means we need to invent a new barrier to deal with DMA memory ordering. However, given the difficulty of getting the existing barriers placed correctly, I don't think inventing new barriers is a very good idea. What we can do is view devices which perform DMA as being strongly ordered with respect to their memory accesses - iow, they have an implicit memory barrier before and after their accesses to memory. This would make the CPUs use of mb() have a conceptual pairing with the DMA agents. Yes, that's the model I have been using all along. After all, if a DMA master carries out its memory accesses in some random order then it's impossible for the CPU to make any guarantees. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
Hi, On Mon, Aug 29, 2011 at 1:00 AM, Alan Stern st...@rowland.harvard.edu wrote: On Sun, 28 Aug 2011, Ming Lei wrote: I've been following this whole discussion. I didn't understand the idea behind the original patch, and I don't understand this. What reason is there for adding a memory barrier after the dummy-hw_token = token line? Such a barrier would not accomplish anything useful, because there are no later memory accesses which need to be ordered with respect to that line. Here, mb is used to synchronize between writing of CPU and reading of ehci HC, see below: A memory barrier never synchronizes events between two processors (for example, between the CPU and HC). It only affects ordering for the processor it executes on. That's why you always have to use memory barriers in pairs for inter-CPU synchronization: one memory barrier instruction for each CPU. IMO, for SMP case, memory barrier pairs(smp_*) are required to synchronize events between two processors. mb/wmb/rmb are mainly used to synchronize events between CPU and device, and one barrier may be enough, for example: CPU device A=1; wmb B=2; read B read A one wmb is used to order 'A=1' and 'B=2', which will make the two write operations reach to physical memory as the order: 'A=1' first, 'B=1' second. Then the device can observe the two write events as the order above, so if device has seen 'B==2', then device will surely see 'A==1'. CPU EHCI dummy-hw_token = token; mb read dummy-hw_token The mb() introduced was supposed to be used to make sure that EHCI can see the correct value of dummy-hw_token. It won't do that. All it will do is guarantee that the CPU writes out dumy-hw_token before it writes out or reads in any values executed after the mb. If EHCI can't get the correct hw_token in time, it will work badly, such as irq delay or irq lost which may be caused by mistaken 'IOC' or 'total bytes to transfer' in hw_token. No. All that will happen is that the HC will execute the qTD a little later, when it does read the correct hw_token. No IRQs will be lost, and there will be no mistaken IOC or total bytes to transfer values. IMO, the dummy has been linked into queue pointed by qh-hw-hw_qtd_next, so EHCI will fetch dummy qtd and execute the transaction and will not have any delay on the transaction. Let me explain the problem again: On ARM, the wmb() before 'dummy-hw_token = token;' will flush l2 write buffer into memory and all parts of 'dummy' except for hw_token field have reached into memory already, but dummy-hw_token will stay at l2 write buffer and not reach into memory at this time, so ehci may fetch a inconsistent qtd and execute it, then mistaken IOC or total bytes to transfer are read by EHCI and cause delayed irq or lost irq. It is not only a reasoning or guess, and I have traced this kind of fact certainly. This is just what the patch is to fix. The patch won't fix this. You're trying to force the CPU to write out dummy-hw_token more quickly. A memory barrier won't do that. And even if the CPU does write out the value more quickly, that doesn't guarantee it will be in time for the HC to see the new value right away. But I think the above is still not correct, and the correct way may be like below: CPU EHCI dummy-hw_token = token; wmb qh-hw-hw_qtd_next = QTD_NEXT(ehci, dummy-qtd_dma); If you do this write, you will corrupt the hardware list. You _must_ _not_ modify the hardware fields of an active QH. Yes, I agree on it. hw_qtd_next is write by HC and qh_refresh(), and it should be written only by cpu when the qh is in idle state. Besides, qh_link_async() calls qh_refresh() - qh_update(), which does this already. And it does this correctly, with the appropriate checks to make sure the QH isn't active. fetch next qtd from qh-hw-hw_qtd_next read qtd-hw_token The problem is that qh has already linked dummy into its queue before(as did in qh_update), so even after 'dummy-hw_token = token;' is executed on CPU, EHCI still may not fetch the up-to-date value of the qtd(dummy in here), and this should be the root cause, IMO. There's no way to fix this. The CPU and the HC are independent. The HC is allowed to cache values whenever it likes (within certain limits). If it has already cached an old value from the qTD, there's no way
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
On Mon, 29 Aug 2011, Ming Lei wrote: IMO, the dummy has been linked into queue pointed by qh-hw-hw_qtd_next, so EHCI will fetch dummy qtd and execute the transaction and will not have any delay on the transaction. Let me explain the problem again: On ARM, the wmb() before 'dummy-hw_token = token;' will flush l2 write buffer into memory and all parts of 'dummy' except for hw_token field have reached into memory already, but dummy-hw_token will stay at l2 write buffer and not reach into memory at this time, so ehci may fetch a inconsistent qtd and execute it, then mistaken IOC or total bytes to transfer are read by EHCI and cause delayed irq or lost irq. No. Even if the HC reads dummy before dummy-hw_token has been written out to memory from the L2 cache, it will not see any inconsistencies. It will see the old value in hw_token, which has the ACTIVE bit clear. Therefore it will not try to execute the qTD but will move on to the next QH. See what the fourth paragraph in section 4.10.2 of the EHCI spec says about the case where a qTD's ACTIVE bit is set to 0. Some EHCI implementations have a quirk, in which they perform the overlay even when ACTIVE is clear. But even these implementations won't try to execute the qTD, because the old value of dummy-hw_token also has the HALT bit set. It is not only a reasoning or guess, and I have traced this kind of fact certainly. If your controller behaves as you suggest then it is buggy. And in that case, adding another memory barrier won't fix it. There is still the possibility that the HC will read dummy during the brief time after the existing wmb() and before the CPU has written dummy-hw_token. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
Hi, On Mon, Aug 29, 2011 at 11:03 PM, Alan Stern st...@rowland.harvard.edu wrote: On Mon, 29 Aug 2011, Ming Lei wrote: IMO, the dummy has been linked into queue pointed by qh-hw-hw_qtd_next, so EHCI will fetch dummy qtd and execute the transaction and will not have any delay on the transaction. Let me explain the problem again: On ARM, the wmb() before 'dummy-hw_token = token;' will flush l2 write buffer into memory and all parts of 'dummy' except for hw_token field have reached into memory already, but dummy-hw_token will stay at l2 write buffer and not reach into memory at this time, so ehci may fetch a inconsistent qtd and execute it, then mistaken IOC or total bytes to transfer are read by EHCI and cause delayed irq or lost irq. No. Even if the HC reads dummy before dummy-hw_token has been written out to memory from the L2 cache, it will not see any inconsistencies. It will see the old value in hw_token, which has the ACTIVE bit clear. Therefore it will not try to execute the qTD but will move on to the next QH. See what the fourth paragraph in section 4.10.2 of the EHCI spec says about the case where a qTD's ACTIVE bit is set to 0. Suppose HC can see the old value in hw_token, which has the ACTIVE bit clear. The qtd transaction will not be executed until the new token is flushed into memory. From view of CPU, the irq is still be delayed because ioc irq is generated after the qtd transaction is executed when new token is flushed into memory. The delay depends on how long the token will be flushed into memory. From my observation, the delay is commonly over 5ms for CSW, sometimes the delay is more than 20ms, so caused the bad performance. Also I am not sure if EHCI can read the old hw_token correctly in this kind of inconsistent memory state. Some EHCI implementations have a quirk, in which they perform the overlay even when ACTIVE is clear. But even these implementations won't try to execute the qTD, because the old value of dummy-hw_token also has the HALT bit set. It is not only a reasoning or guess, and I have traced this kind of fact certainly. If your controller behaves as you suggest then it is buggy. And in that case, adding another memory barrier won't fix it. There is still the possibility that the HC will read dummy during the brief time after the existing wmb() and before the CPU has written dummy-hw_token. No, the mb after 'dummy-hw_token=token' does fix the problem. As said above, IOC IRQ is surely delayed from view of CPU. thanks, -- Ming Lei -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
Hi, On Mon, Aug 29, 2011 at 9:57 PM, Alan Stern st...@rowland.harvard.edu wrote: On Mon, 29 Aug 2011, Russell King - ARM Linux wrote: You know better than I do what is needed to resolve the ordering issue. However, contrary to what the original patch description said, this isn't entirely a matter of making the write visible to the host controller: No doubt in time the write will eventually become visible anyway. It's a matter of making the write become visible reasonably quickly and in the correct order with respect to other writes. I'm not entirely sure what the problem is - I think its about a write by the CPU to dma coherent memory being delayed and not being visible to the HC in a timely manner. Either mb() or wmb() placed after the write on ARM will do that - and ARM has no requirement to do a read- back after the barrier. Okay, then this needs to be done in a way that won't slow down other architectures with an unnecessary memory barrier. And there needs to be a comment in the code explaining that the new mb() instruction isn't being used as a memory barrier but rather to expedite writeback of the L2 cache. If writing to coherent memory can't reach physical memory immediately on other ARCHs, the problem can still happen on these ARCHs. But I am not sure if there are these kind of ARCHs except for ARM. Anyway, current memory barriers in qh_append_tds() can't prevent the problem from happening on ARM. If no better solutions, maybe we have to use 'mb()' after 'dummy-hw_token = token' to fix the problem: This certainly is starting to sound like something that needs to be addressed in the arch-specific #include files... Is this extra L2-cache poke needed for proper ordering, or is it needed merely to flush the write out to memory in a timely manner? Both, though primerily it's about ensuring correct ordering. A side effect of it is that it will flush all pending writes in L2 before completing. From the theoretical viewpoint, I think I'm right to say that mb() doesn't need to provide that level of ordering as its supposed to be an inter-CPU barrier - which probably means we need to invent a new barrier to deal with DMA memory ordering. However, given the difficulty of getting the existing barriers placed correctly, I don't think inventing new barriers is a very good idea. What we can do is view devices which perform DMA as being strongly ordered with respect to their memory accesses - iow, they have an implicit memory barrier before and after their accesses to memory. This would make the CPUs use of mb() have a conceptual pairing with the DMA agents. Yes, that's the model I have been using all along. After all, if a DMA master carries out its memory accesses in some random order then it's impossible for the CPU to make any guarantees. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC 1/2] OMAP3+: voltage / oscillator parameter segregation
Vishwanath Sripathy vishwanath...@ti.com writes: [...] diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach- omap2/opp3xxx_data.c index d95f3f9..b5d8294 100644 --- a/arch/arm/mach-omap2/opp3xxx_data.c +++ b/arch/arm/mach-omap2/opp3xxx_data.c @@ -26,6 +26,16 @@ #include pm.h /* 34xx */ +/* OMAP VP parameter values */ +#define OMAP3430_VP1_VLIMITTO_VDDMIN 0x14 +#define OMAP3430_VP1_VLIMITTO_VDDMAX 0x42 +#define OMAP3430_VP2_VLIMITTO_VDDMIN 0x18 +#define OMAP3430_VP2_VLIMITTO_VDDMAX 0x2c NAK - we should be using voltages here - depending on the PMIC used, the rounding factor may not map to TWL4030. Agreed. I had posted patch for this earlier I believe in series http://marc.info/?l=linux-omapm=130741297821372w=2 I know you're a bit distracted currently ;) but is there any chance you can refresh at least this patch: OMAP3+: PM: VP: use uV for max and min voltage limits from your series on top of my current pm-wip/voltdm branch? If not, maybe point us to an archived version and Tero can pick it up and add it to this series. After a quick search, I couldn't find it in the marc.info archives. Below link should help I suppose. https://patchwork.kernel.org/patch/855172/ Yes, Tero should pick this one up and add it to his series to address Nishanth's concerns. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
On Mon, 2011-08-29 at 23:55 +0800, Ming Lei wrote: If writing to coherent memory can't reach physical memory immediately on other ARCHs, the problem can still happen on these ARCHs. But I am not sure if there are these kind of ARCHs except for ARM. If there is write buffering which prevents outside bus masters from seeing the data, can we really call it coherent memory? --Mark -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] usb: ehci: fix update qtd-token in qh_append_tds
On Mon, 29 Aug 2011, Ming Lei wrote: Suppose HC can see the old value in hw_token, which has the ACTIVE bit clear. The qtd transaction will not be executed until the new token is flushed into memory. From view of CPU, the irq is still be delayed because ioc irq is generated after the qtd transaction is executed when new token is flushed into memory. The delay depends on how long the token will be flushed into memory. That's right. From my observation, the delay is commonly over 5ms for CSW, sometimes the delay is more than 20ms, so caused the bad performance. No wonder! Do you see the same sort of performance degradation when using shared memory to communicate between two CPUs? Regardless, this is not quite the same as what you were talking about earlier. You specifically mentioned ... so ehci may fetch a inconsistent qtd and execute it, then mistaken IOC or total bytes to transfer are read by EHCI and cause delayed irq or lost irq. Bad performance is different from inconsistencies and lost IRQs. Also I am not sure if EHCI can read the old hw_token correctly in this kind of inconsistent memory state. The memory state is NOT inconsistent! It is consistent at all times, both before and after the new hw_token value is stored. The memory state is just slow to update, that's all. This is a speed issue, not a correctness issue. Nevertheless, it remains true that you want to add a memory barrier instruction simply in order to speed up a cache writeback, not to force any sort of ordering. This needs to be explained carefully in the code (not just in the patch description!) and it needs to be done in a way that won't affect other architectures. Also, as you mentioned before, you may want to do the same thing in qh_link_async() just after the head-hw-hw_next = dma; line. Delays in flushing that write would also slow down performance. Alan Stern -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/22] OMAP: voltage cleanup part A
This is the first phase of the OMAP voltage layer cleanup. The primary goal is to cleanup/reorganize data structures to facilitate splitting apart the voltage processor (VP) and voltage controller (VC) into separate layers. Benoit Cousson (1): OMAP4: powerdomain data: add voltage domains Kevin Hilman (21): OMAP2+: hwmod: remove unused voltagedomain pointer OMAP2+: voltage: move PRCM mod offets into VC/VP structures OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain OMAP2+: voltage: start towards a new voltagedomain layer OMAP3: voltage: rename mpu voltagedomain to mpu_iva OMAP3: voltagedomain data: add wakeup domain OMAP3+: voltage: add scalable flag to voltagedomain OMAP2+: powerdomain: add voltagedomain to struct powerdomain OMAP2: add voltage domains and connect to powerdomains OMAP3: powerdomain data: add voltage domains OMAP2+: powerdomain: add voltage domain lookup during register OMAP2+: voltage: keep track of powerdomains in each voltagedomain OMAP2+: voltage: split voltage controller (VC) code into dedicated layer OMAP2+: voltage: move VC into struct voltagedomain, misc. renames OMAP2+: voltage: enable VC bypass scale method when VC is initialized OMAP2+: voltage: split out voltage processor (VP) code into new layer OMAP2+: VC: support PMICs with separate voltage and command registers OMAP2+: add PRM VP functions for checking/clearing VP TX done status OMAP3+ VP: replace transaction done check/clear with VP ops OMAP2+: PRM: add register access functions for VC/VP OMAP3+: voltage: convert to PRM register access functions arch/arm/mach-omap2/Makefile |5 +- arch/arm/mach-omap2/io.c |5 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |4 +- arch/arm/mach-omap2/omap_twl.c | 20 +- arch/arm/mach-omap2/pm.c |4 +- arch/arm/mach-omap2/powerdomain.c| 23 + arch/arm/mach-omap2/powerdomain.h| 10 + arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c |2 + arch/arm/mach-omap2/powerdomains2xxx_data.c |4 + arch/arm/mach-omap2/powerdomains3xxx_data.c | 16 + arch/arm/mach-omap2/powerdomains44xx_data.c | 16 + arch/arm/mach-omap2/prm2xxx_3xxx.c | 56 ++ arch/arm/mach-omap2/prm2xxx_3xxx.h | 12 + arch/arm/mach-omap2/prm44xx.c| 71 ++ arch/arm/mach-omap2/prm44xx.h| 12 + arch/arm/mach-omap2/sr_device.c |2 +- arch/arm/mach-omap2/vc.c | 259 +++ arch/arm/mach-omap2/vc.h | 34 +- arch/arm/mach-omap2/vc3xxx_data.c| 10 +- arch/arm/mach-omap2/vc44xx_data.c| 14 +- arch/arm/mach-omap2/voltage.c| 889 +- arch/arm/mach-omap2/voltage.h| 61 +- arch/arm/mach-omap2/voltagedomains2xxx_data.c| 32 + arch/arm/mach-omap2/voltagedomains3xxx_data.c| 53 +- arch/arm/mach-omap2/voltagedomains44xx_data.c| 69 +- arch/arm/mach-omap2/vp.c | 367 + arch/arm/mach-omap2/vp.h | 45 +- arch/arm/mach-omap2/vp3xxx_data.c| 21 +- arch/arm/mach-omap2/vp44xx_data.c| 28 +- arch/arm/plat-omap/include/plat/omap_hwmod.h |1 - 30 files changed, 1281 insertions(+), 864 deletions(-) create mode 100644 arch/arm/mach-omap2/vc.c create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c create mode 100644 arch/arm/mach-omap2/vp.c -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: How to handle named resources with DT?
On Saturday 27 August 2011, Paul Walmsley wrote: On Sat, 27 Aug 2011, Arnd Bergmann wrote: Right, and I guess we can simply ignore DMA and ioport resources because they are extremely rare, right? DMA resources are quite widely used. For example, looking at the SoCs with some publicly-available documentation, the Motorola i.MX51 reference manual lists 47 SDMA request lines across about 17 different IP block types[1], and to pick a representative OMAP, the OMAP3430 technical reference manual lists 77 SDMA request lines, used by at least 9 different IP block types[2]. Also, many IP blocks have multiple DMA resources. For example, the above references list UART, MCSPI, PATA, I2C, FIRI, MCBSP, SSI, CTI, CSPI, eCSPI, EMI, eSDHC, SPI, and DSS. I don't doubt that many devices have a DMA controllers with multiple channels, but I think the last time we discussed those, the conclusion was that they should not actually be represented as DMA resources. The problem with DMA resources is that they assume the presence of a global number space for DMA channel numbers, while in reality a lot of devices have multiple DMA controllers that have independent channel numbers. We should have a proper device tree binding for dma-controllers that enables us to find both the channel and the controller in a simple dma-controller API call without having to resort to global numbers. In a way that is the same with IRQ numbers, however the concept of a global number space for interrupt lines is used in so many places in the kernel that we can't reasonably move away from that. For dma-engine drivers, the concept does not exist in a driver-independent way and we should not introduce it. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: How to handle named resources with DT?
On Sunday 28 August 2011, David Gibson wrote: Right, and I guess we can simply ignore DMA and ioport resources because they are extremely rare, right? Well, remember it's where resources can appear in the DT node that matters, not what the types are in the platform device. ioports will typically appear suitably encoded in 'reg', so that's covered. I've never been very clear on what exactly DMA resources cover, but yeah, you might need something for dma-reg or other device tree properties. DMA resources are only meaningful with the legacy ISA dma API, all other uses are basically ad-hoc and I think we can ignore them or replace them with proper bindings when converting the drivers to device-tree based probing. Arnd -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/22] OMAP: voltage cleanup part A
This is the first phase of the OMAP voltage layer cleanup. The primary goal is to cleanup/reorganize data structures to facilitate splitting apart the voltage processor (VP) and voltage controller (VC) into separate layers. Based on v3.1-rc3 Series available in branch pm-wip/voltdm_a in my linux-omap-pm tree: git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Benoit Cousson (1): OMAP4: powerdomain data: add voltage domains Kevin Hilman (21): OMAP2+: hwmod: remove unused voltagedomain pointer OMAP2+: voltage: move PRCM mod offets into VC/VP structures OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain OMAP2+: voltage: start towards a new voltagedomain layer OMAP3: voltage: rename mpu voltagedomain to mpu_iva OMAP3: voltagedomain data: add wakeup domain OMAP3+: voltage: add scalable flag to voltagedomain OMAP2+: powerdomain: add voltagedomain to struct powerdomain OMAP2: add voltage domains and connect to powerdomains OMAP3: powerdomain data: add voltage domains OMAP2+: powerdomain: add voltage domain lookup during register OMAP2+: voltage: keep track of powerdomains in each voltagedomain OMAP2+: voltage: split voltage controller (VC) code into dedicated layer OMAP2+: voltage: move VC into struct voltagedomain, misc. renames OMAP2+: voltage: enable VC bypass scale method when VC is initialized OMAP2+: voltage: split out voltage processor (VP) code into new layer OMAP2+: VC: support PMICs with separate voltage and command registers OMAP2+: add PRM VP functions for checking/clearing VP TX done status OMAP3+ VP: replace transaction done check/clear with VP ops OMAP2+: PRM: add register access functions for VC/VP OMAP3+: voltage: convert to PRM register access functions arch/arm/mach-omap2/Makefile |5 +- arch/arm/mach-omap2/io.c |5 + arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |4 +- arch/arm/mach-omap2/omap_twl.c | 20 +- arch/arm/mach-omap2/pm.c |4 +- arch/arm/mach-omap2/powerdomain.c| 23 + arch/arm/mach-omap2/powerdomain.h| 10 + arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c |2 + arch/arm/mach-omap2/powerdomains2xxx_data.c |4 + arch/arm/mach-omap2/powerdomains3xxx_data.c | 16 + arch/arm/mach-omap2/powerdomains44xx_data.c | 16 + arch/arm/mach-omap2/prm2xxx_3xxx.c | 56 ++ arch/arm/mach-omap2/prm2xxx_3xxx.h | 12 + arch/arm/mach-omap2/prm44xx.c| 71 ++ arch/arm/mach-omap2/prm44xx.h| 12 + arch/arm/mach-omap2/sr_device.c |2 +- arch/arm/mach-omap2/vc.c | 259 +++ arch/arm/mach-omap2/vc.h | 34 +- arch/arm/mach-omap2/vc3xxx_data.c| 10 +- arch/arm/mach-omap2/vc44xx_data.c| 14 +- arch/arm/mach-omap2/voltage.c| 889 +- arch/arm/mach-omap2/voltage.h| 61 +- arch/arm/mach-omap2/voltagedomains2xxx_data.c| 32 + arch/arm/mach-omap2/voltagedomains3xxx_data.c| 53 +- arch/arm/mach-omap2/voltagedomains44xx_data.c| 69 +- arch/arm/mach-omap2/vp.c | 367 + arch/arm/mach-omap2/vp.h | 45 +- arch/arm/mach-omap2/vp3xxx_data.c| 21 +- arch/arm/mach-omap2/vp44xx_data.c| 28 +- arch/arm/plat-omap/include/plat/omap_hwmod.h |1 - 30 files changed, 1281 insertions(+), 864 deletions(-) create mode 100644 arch/arm/mach-omap2/vc.c create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c create mode 100644 arch/arm/mach-omap2/vp.c -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/22] OMAP2+: hwmod: remove unused voltagedomain pointer
The voltage domain pointer currently in struct omap_hwmod is not used
and does not belong here. Instead, voltage domains will be associated
with powerdomains in forthcoming patches.
Acked-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/include/plat/omap_hwmod.h |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h
b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 0e329ca..38ac4af 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -526,7 +526,6 @@ struct omap_hwmod {
char*clkdm_name;
struct clockdomain *clkdm;
char*vdd_name;
- struct voltagedomain*voltdm;
struct omap_hwmod_ocp_if**masters; /* connect to *_IA */
struct omap_hwmod_ocp_if**slaves; /* connect to *_TA */
void*dev_attr;
--
1.7.6
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[PATCH 02/22] OMAP2+: voltage: move PRCM mod offets into VC/VP structures
Eliminate need for global variables for the various PRM module offsets by
making them part of the VP/VC common structures
Eventually, these will likely be moved again, or more likely removed
when VP/VC code is isolated, but for now just getting rid of them as
global variabes so that the voltage domain initialization can be
cleaned up.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.h |2 +
arch/arm/mach-omap2/vc3xxx_data.c |1 +
arch/arm/mach-omap2/vc44xx_data.c |1 +
arch/arm/mach-omap2/voltage.c | 109 -
arch/arm/mach-omap2/voltage.h |6 +-
arch/arm/mach-omap2/voltagedomains3xxx_data.c |8 +-
arch/arm/mach-omap2/voltagedomains44xx_data.c |9 +-
arch/arm/mach-omap2/vp.h |2 +
arch/arm/mach-omap2/vp3xxx_data.c |1 +
arch/arm/mach-omap2/vp44xx_data.c |1 +
10 files changed, 70 insertions(+), 70 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index e776777..f7338af 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -23,6 +23,7 @@
* struct omap_vc_common_data - per-VC register/bitfield data
* @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
* @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
+ * @prm_mod: PRM module id used for PRM register access
* @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
* @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
* @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
@@ -40,6 +41,7 @@
struct omap_vc_common_data {
u32 cmd_on_mask;
u32 valid;
+ s16 prm_mod;
u8 smps_sa_reg;
u8 smps_volra_reg;
u8 bypass_val_reg;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c
b/arch/arm/mach-omap2/vc3xxx_data.c
index f37dc4b..55caccb 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,6 +30,7 @@
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/
static struct omap_vc_common_data omap3_vc_common = {
+ .prm_mod = OMAP3430_GR_MOD,
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c
b/arch/arm/mach-omap2/vc44xx_data.c
index a98da8d..b62678e 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -31,6 +31,7 @@
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/
static const struct omap_vc_common_data omap4_vc_common = {
+ .prm_mod = OMAP4430_PRM_DEVICE_INST,
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 9ef3789..3151d75 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info;
*/
static int nr_scalable_vdd;
-/* XXX document */
-static s16 prm_mod_offs;
-static s16 prm_irqst_ocp_mod_offs;
-
static struct dentry *voltage_dir;
/* Init function pointers */
@@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val)
return -EINVAL;
}
- vsel = vdd-read_reg(prm_mod_offs, vdd-vp_data-voltage);
+ vsel = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-voltage);
if (!vdd-pmic_info-vsel_to_uv) {
pr_warning(PMIC function to convert vsel to voltage
@@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd)
vsel = vdd-pmic_info-uv_to_vsel(uvdc);
- vpconfig = vdd-read_reg(prm_mod_offs, vdd-vp_data-vpconfig);
+ vpconfig = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
vpconfig = ~(vdd-vp_data-vp_common-vpconfig_initvoltage_mask |
vdd-vp_data-vp_common-vpconfig_initvdd);
vpconfig |= vsel vdd-vp_data-vp_common-vpconfig_initvoltage_shift;
- vdd-write_reg(vpconfig, prm_mod_offs, vdd-vp_data-vpconfig);
+ vdd-write_reg(vpconfig, vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
/* Trigger initVDD value copy to voltage processor */
vdd-write_reg((vpconfig | vdd-vp_data-vp_common-vpconfig_initvdd),
- prm_mod_offs, vdd-vp_data-vpconfig);
+ vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
/* Clear initVDD copy trigger bit */
- vdd-write_reg(vpconfig, prm_mod_offs, vdd-vp_data-vpconfig);
+ vdd-write_reg(vpconfig, vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
}
/* Generic voltage init functions */
@@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info *vdd)
[PATCH 03/22] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain
The prm_irqst_reg is not part of the VP. Move it up into the common
voltage domain struct.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c | 15 +++
arch/arm/mach-omap2/voltage.h |1 +
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +++
arch/arm/mach-omap2/vp.h |3 ---
arch/arm/mach-omap2/vp3xxx_data.c |2 --
arch/arm/mach-omap2/vp44xx_data.c |3 ---
7 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 3151d75..a366a6b 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct
omap_vdd_info *vdd,
unsigned long target_volt)
{
u32 vpconfig;
- u8 target_vsel, current_vsel, prm_irqst_reg;
+ u8 target_vsel, current_vsel;
int ret, timeout = 0;
ret = _pre_volt_scale(vdd, target_volt, target_vsel, current_vsel);
if (ret)
return ret;
- prm_irqst_reg = vdd-vp_data-prm_irqst_data-prm_irqst_reg;
-
/*
* Clear all pending TransactionDone interrupt/status. Typical latency
* is 3us
*/
while (timeout++ VP_TRANXDONE_TIMEOUT) {
vdd-write_reg(vdd-vp_data-prm_irqst_data-tranxdone_status,
- vdd-prm_irqst_mod, prm_irqst_reg);
- if (!(vdd-read_reg(vdd-prm_irqst_mod, prm_irqst_reg)
+ vdd-prm_irqst_mod, vdd-prm_irqst_reg);
+ if (!(vdd-read_reg(vdd-prm_irqst_mod, vdd-prm_irqst_reg)
vdd-vp_data-prm_irqst_data-tranxdone_status))
break;
udelay(1);
@@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct
omap_vdd_info *vdd,
* Depends on SMPSWAITTIMEMIN/MAX and voltage change
*/
timeout = 0;
- omap_test_timeout((vdd-read_reg(vdd-prm_irqst_mod, prm_irqst_reg)
+ omap_test_timeout((vdd-read_reg(vdd-prm_irqst_mod,
+vdd-prm_irqst_reg)
vdd-vp_data-prm_irqst_data-tranxdone_status),
VP_TRANXDONE_TIMEOUT, timeout);
if (timeout = VP_TRANXDONE_TIMEOUT)
@@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct
omap_vdd_info *vdd,
timeout = 0;
while (timeout++ VP_TRANXDONE_TIMEOUT) {
vdd-write_reg(vdd-vp_data-prm_irqst_data-tranxdone_status,
- vdd-prm_irqst_mod, prm_irqst_reg);
- if (!(vdd-read_reg(vdd-prm_irqst_mod, prm_irqst_reg)
+ vdd-prm_irqst_mod, vdd-prm_irqst_reg);
+ if (!(vdd-read_reg(vdd-prm_irqst_mod, vdd-prm_irqst_reg)
vdd-vp_data-prm_irqst_data-tranxdone_status))
break;
udelay(1);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index ffdc55e..db23d49 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -136,6 +136,7 @@ struct omap_vdd_info {
bool vp_enabled;
s16 prm_irqst_mod;
+ u8 prm_irqst_reg;
u32 (*read_reg) (u16 mod, u8 offset);
void (*write_reg) (u32 val, u16 mod, u8 offset);
int (*volt_scale) (struct omap_vdd_info *vdd,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 0d30b7f..f831f9a 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data
omap3_vdd1_vfsm_data = {
static struct omap_vdd_info omap3_vdd1_info = {
.prm_irqst_mod = OCP_MOD,
+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap3_vp1_data,
.vc_data = omap3_vc1_data,
.vfsm = omap3_vdd1_vfsm_data,
@@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data
omap3_vdd2_vfsm_data = {
static struct omap_vdd_info omap3_vdd2_info = {
.prm_irqst_mod = OCP_MOD,
+ .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap3_vp2_data,
.vc_data = omap3_vc2_data,
.vfsm = omap3_vdd2_vfsm_data,
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 1c2d7d7..64dc265 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data
omap4_vdd_mpu_vfsm_data = {
static struct omap_vdd_info omap4_vdd_mpu_info = {
.prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
+ .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
.vp_data =
[PATCH 04/22] OMAP2+: voltage: start towards a new voltagedomain layer
Start cleaning up the voltage layer to have a voltage domain layer
that resembles the structure of the existing clock and power domain
layers. To that end:
- move the 'struct voltagedomain' out of 'struct omap_vdd_info' to
become the primary data structure.
- convert any functions taking a pointer to struct omap_vdd_info into
functions taking a struct voltagedomain pointer.
- convert the register initialize of voltage domains to look like
that of powerdomains
- convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled
after the current powerdomain and clockdomain lookup functions.
- omap_voltage_late_init(): only configure VDD info when
the vdd_info struct is non-NULL
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/io.c |3 +
arch/arm/mach-omap2/omap_twl.c| 10 +-
arch/arm/mach-omap2/pm.c |2 +-
arch/arm/mach-omap2/sr_device.c |2 +-
arch/arm/mach-omap2/voltage.c | 257 ++---
arch/arm/mach-omap2/voltage.h | 27 ++--
arch/arm/mach-omap2/voltagedomains3xxx_data.c | 34 ++--
arch/arm/mach-omap2/voltagedomains44xx_data.c | 44 ++--
8 files changed, 207 insertions(+), 172 deletions(-)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2ce1ce6..9f5a846 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -38,6 +38,7 @@
#include io.h
#include plat/omap-pm.h
+#include voltage.h
#include powerdomain.h
#include clockdomain.h
@@ -349,10 +350,12 @@ void __init omap2_init_common_infrastructure(void)
omap2xxx_clockdomains_init();
omap2430_hwmod_init();
} else if (cpu_is_omap34xx()) {
+ omap3xxx_voltagedomains_init();
omap3xxx_powerdomains_init();
omap3xxx_clockdomains_init();
omap3xxx_hwmod_init();
} else if (cpu_is_omap44xx()) {
+ omap44xx_voltagedomains_init();
omap44xx_powerdomains_init();
omap44xx_clockdomains_init();
omap44xx_hwmod_init();
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 07d6140..fcd2f62 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -250,13 +250,13 @@ int __init omap4_twl_init(void)
if (!cpu_is_omap44xx())
return -ENODEV;
- voltdm = omap_voltage_domain_lookup(mpu);
+ voltdm = voltdm_lookup(mpu);
omap_voltage_register_pmic(voltdm, omap4_mpu_volt_info);
- voltdm = omap_voltage_domain_lookup(iva);
+ voltdm = voltdm_lookup(iva);
omap_voltage_register_pmic(voltdm, omap4_iva_volt_info);
- voltdm = omap_voltage_domain_lookup(core);
+ voltdm = voltdm_lookup(core);
omap_voltage_register_pmic(voltdm, omap4_core_volt_info);
return 0;
@@ -288,10 +288,10 @@ int __init omap3_twl_init(void)
if (!twl_sr_enable_autoinit)
omap3_twl_set_sr_bit(true);
- voltdm = omap_voltage_domain_lookup(mpu);
+ voltdm = voltdm_lookup(mpu);
omap_voltage_register_pmic(voltdm, omap3_mpu_volt_info);
- voltdm = omap_voltage_domain_lookup(core);
+ voltdm = voltdm_lookup(core);
omap_voltage_register_pmic(voltdm, omap3_core_volt_info);
return 0;
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3feb359..3bce29b 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -183,7 +183,7 @@ static int __init omap2_set_init_voltage(char *vdd_name,
char *clk_name,
goto exit;
}
- voltdm = omap_voltage_domain_lookup(vdd_name);
+ voltdm = voltdm_lookup(vdd_name);
if (IS_ERR(voltdm)) {
printk(KERN_ERR %s: Unable to get vdd pointer for vdd_%s\n,
__func__, vdd_name);
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 10d3c5e..2782d3f 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)
sr_data-senn_mod = 0x1;
sr_data-senp_mod = 0x1;
- sr_data-voltdm = omap_voltage_domain_lookup(oh-vdd_name);
+ sr_data-voltdm = voltdm_lookup(oh-vdd_name);
if (IS_ERR(sr_data-voltdm)) {
pr_err(%s: Unable to get voltage domain pointer for VDD %s\n,
__func__, oh-vdd_name);
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index a366a6b..4f0361a 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -40,20 +40,13 @@
#include vc.h
#include vp.h
-#define VOLTAGE_DIR_SIZE 16
-
-
-static struct omap_vdd_info **vdd_info;
-
-/*
- * Number of scalable voltage domains.
- */
-static int nr_scalable_vdd;
+static LIST_HEAD(voltdm_list);
[PATCH 06/22] OMAP3: voltagedomain data: add wakeup domain
Add wakeup voltage domain so that the wakeup powerdomain can have an
associated powerdomain. Note that the scalable flat is not set for
the this voltagedomain, so it will not be fully initialized like
scalable voltage domains.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltagedomains3xxx_data.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 2167ef4..42d0b11 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -69,9 +69,14 @@ static struct voltagedomain omap3_voltdm_core = {
.vdd = omap3_vdd2_info,
};
+static struct voltagedomain omap3_voltdm_wkup = {
+ .name = wakeup,
+};
+
static struct voltagedomain *voltagedomains_omap3[] __initdata = {
omap3_voltdm_mpu,
omap3_voltdm_core,
+ omap3_voltdm_wkup,
NULL,
};
--
1.7.6
--
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[PATCH 11/22] OMAP4: powerdomain data: add voltage domains
From: Benoit Cousson b-cous...@ti.com
Add voltage domain name to indicate which voltagedomain each
powerdomain is in.
The fixed voltage domain like ldo_wakeup for emu and wkup power
domain is added too.
Update the TI copyright date to 2011.
Signed-off-by: Benoit Cousson b-cous...@ti.com
Cc: Paul Walmsley p...@pwsan.com
[khil...@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomains44xx_data.c | 16
arch/arm/mach-omap2/voltagedomains44xx_data.c |5 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c
b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 247e794..45c7f29 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -33,6 +33,7 @@
/* core_44xx_pwrdm: CORE power domain */
static struct powerdomain core_44xx_pwrdm = {
.name = core_pwrdm,
+ .voltdm = { .name = core },
.prcm_offs= OMAP4430_PRM_CORE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -59,6 +60,7 @@ static struct powerdomain core_44xx_pwrdm = {
/* gfx_44xx_pwrdm: 3D accelerator power domain */
static struct powerdomain gfx_44xx_pwrdm = {
.name = gfx_pwrdm,
+ .voltdm = { .name = core },
.prcm_offs= OMAP4430_PRM_GFX_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -76,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = {
/* abe_44xx_pwrdm: Audio back end power domain */
static struct powerdomain abe_44xx_pwrdm = {
.name = abe_pwrdm,
+ .voltdm = { .name = iva },
.prcm_offs= OMAP4430_PRM_ABE_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -96,6 +99,7 @@ static struct powerdomain abe_44xx_pwrdm = {
/* dss_44xx_pwrdm: Display subsystem power domain */
static struct powerdomain dss_44xx_pwrdm = {
.name = dss_pwrdm,
+ .voltdm = { .name = core },
.prcm_offs= OMAP4430_PRM_DSS_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -114,6 +118,7 @@ static struct powerdomain dss_44xx_pwrdm = {
/* tesla_44xx_pwrdm: Tesla processor power domain */
static struct powerdomain tesla_44xx_pwrdm = {
.name = tesla_pwrdm,
+ .voltdm = { .name = iva },
.prcm_offs= OMAP4430_PRM_TESLA_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -136,6 +141,7 @@ static struct powerdomain tesla_44xx_pwrdm = {
/* wkup_44xx_pwrdm: Wake-up power domain */
static struct powerdomain wkup_44xx_pwrdm = {
.name = wkup_pwrdm,
+ .voltdm = { .name = wakeup },
.prcm_offs= OMAP4430_PRM_WKUP_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -152,6 +158,7 @@ static struct powerdomain wkup_44xx_pwrdm = {
/* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */
static struct powerdomain cpu0_44xx_pwrdm = {
.name = cpu0_pwrdm,
+ .voltdm = { .name = mpu },
.prcm_offs= OMAP4430_PRCM_MPU_CPU0_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -169,6 +176,7 @@ static struct powerdomain cpu0_44xx_pwrdm = {
/* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */
static struct powerdomain cpu1_44xx_pwrdm = {
.name = cpu1_pwrdm,
+ .voltdm = { .name = mpu },
.prcm_offs= OMAP4430_PRCM_MPU_CPU1_INST,
.prcm_partition = OMAP4430_PRCM_MPU_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -186,6 +194,7 @@ static struct powerdomain cpu1_44xx_pwrdm = {
/* emu_44xx_pwrdm: Emulation power domain */
static struct powerdomain emu_44xx_pwrdm = {
.name = emu_pwrdm,
+ .voltdm = { .name = wakeup },
.prcm_offs= OMAP4430_PRM_EMU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -202,6 +211,7 @@ static struct powerdomain emu_44xx_pwrdm = {
/* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */
static struct powerdomain mpu_44xx_pwrdm = {
.name = mpu_pwrdm,
+ .voltdm = { .name = mpu },
.prcm_offs= OMAP4430_PRM_MPU_INST,
.prcm_partition = OMAP4430_PRM_PARTITION,
.omap_chip=
[PATCH 12/22] OMAP2+: powerdomain: add voltage domain lookup during register
When a powerdomain is registered, lookup the voltage domain by name
and keep a pointer to the containing voltagedomain in the powerdomain
structure.
Modeled after similar method between powerdomain and clockdomain layers.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomain.c | 21 +
arch/arm/mach-omap2/powerdomain.h |1 +
arch/arm/mach-omap2/voltage.h |1 +
3 files changed, 23 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 9af0847..1d3013d 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name)
static int _pwrdm_register(struct powerdomain *pwrdm)
{
int i;
+ struct voltagedomain *voltdm;
if (!pwrdm || !pwrdm-name)
return -EINVAL;
@@ -94,6 +95,14 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
if (_pwrdm_lookup(pwrdm-name))
return -EEXIST;
+ voltdm = voltdm_lookup(pwrdm-voltdm.name);
+ if (!voltdm) {
+ pr_err(powerdomain: %s: voltagedomain %s does not exist\n,
+ pwrdm-name, pwrdm-voltdm.name);
+ return -EINVAL;
+ }
+ pwrdm-voltdm.ptr = voltdm;
+
list_add(pwrdm-node, pwrdm_list);
/* Initialize the powerdomain's state counter */
@@ -383,6 +392,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
}
/**
+ * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in
+ * @pwrdm: struct powerdomain *
+ *
+ * Return a pointer to the struct voltageomain that the specified powerdomain
+ * @pwrdm exists in.
+ */
+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm)
+{
+ return pwrdm-voltdm.ptr;
+}
+
+/**
* pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
* @pwrdm: struct powerdomain *
*
diff --git a/arch/arm/mach-omap2/powerdomain.h
b/arch/arm/mach-omap2/powerdomain.h
index 9ce920d..25bef48 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -183,6 +183,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct
clockdomain *clkdm);
int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
int (*fn)(struct powerdomain *pwrdm,
struct clockdomain *clkdm));
+struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm);
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index cacd76e..966aa88 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -186,4 +186,5 @@ extern void omap44xx_voltagedomains_init(void);
struct voltagedomain *voltdm_lookup(const char *name);
void voltdm_init(struct voltagedomain **voltdm_list);
+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm);
#endif
--
1.7.6
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[PATCH 14/22] OMAP2+: voltage: split voltage controller (VC) code into dedicated layer
As part of the voltage layer cleanup, split out VC specific code into
a dedicated VC layer. This patch primarily just moves VC code from
voltage.c into vc.c, and adds prototypes to vc.h.
No functional changes.
For readability, each function was given a local 'vc' pointer:
struct omap_vc_instance_data *vc = voltdm-vdd-vc_data;
and a global replace of s/vdd-vc_data/vc/ was done.
Also vc_init was renamed to vc_init_channel to reflect that this is
per-VC channel initializtion.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/vc.c | 276 +
arch/arm/mach-omap2/vc.h | 12 ++
arch/arm/mach-omap2/voltage.c | 264 +--
4 files changed, 293 insertions(+), 261 deletions(-)
create mode 100644 arch/arm/mach-omap2/vc.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 1b6cecd..ecbf361 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o
cminst44xx.o \
# OMAP voltage domains
ifeq ($(CONFIG_PM),y)
-voltagedomain-common := voltage.o
+voltagedomain-common := voltage.o vc.o
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \
voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
new file mode 100644
index 000..98f5a4b
--- /dev/null
+++ b/arch/arm/mach-omap2/vc.c
@@ -0,0 +1,276 @@
+#include linux/kernel.h
+#include linux/delay.h
+#include linux/init.h
+
+#include plat/cpu.h
+
+#include voltage.h
+#include vc.h
+#include prm-regbits-34xx.h
+#include prm-regbits-44xx.h
+#include prm44xx.h
+
+/* Voltage scale and accessory APIs */
+int omap_vc_pre_scale(struct voltagedomain *voltdm,
+ unsigned long target_volt,
+ u8 *target_vsel, u8 *current_vsel)
+{
+ struct omap_vc_instance_data *vc = voltdm-vdd-vc_data;
+ struct omap_vdd_info *vdd = voltdm-vdd;
+ struct omap_volt_data *volt_data;
+ const struct omap_vc_common_data *vc_common;
+ const struct omap_vp_common_data *vp_common;
+ u32 vc_cmdval, vp_errgain_val;
+
+ vc_common = vc-vc_common;
+ vp_common = vdd-vp_data-vp_common;
+
+ /* Check if sufficient pmic info is available for this vdd */
+ if (!vdd-pmic_info) {
+ pr_err(%s: Insufficient pmic info to scale the vdd_%s\n,
+ __func__, voltdm-name);
+ return -EINVAL;
+ }
+
+ if (!vdd-pmic_info-uv_to_vsel) {
+ pr_err(%s: PMIC function to convert voltage in uV to
+ vsel not registered. Hence unable to scale voltage
+ for vdd_%s\n, __func__, voltdm-name);
+ return -ENODATA;
+ }
+
+ if (!vdd-read_reg || !vdd-write_reg) {
+ pr_err(%s: No read/write API for accessing vdd_%s regs\n,
+ __func__, voltdm-name);
+ return -EINVAL;
+ }
+
+ /* Get volt_data corresponding to target_volt */
+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
+ if (IS_ERR(volt_data))
+ volt_data = NULL;
+
+ *target_vsel = vdd-pmic_info-uv_to_vsel(target_volt);
+ *current_vsel = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-voltage);
+
+ /* Setting the ON voltage to the new target voltage */
+ vc_cmdval = vdd-read_reg(vc-vc_common-prm_mod, vc-cmdval_reg);
+ vc_cmdval = ~vc_common-cmd_on_mask;
+ vc_cmdval |= (*target_vsel vc_common-cmd_on_shift);
+ vdd-write_reg(vc_cmdval, vc-vc_common-prm_mod, vc-cmdval_reg);
+
+ /* Setting vp errorgain based on the voltage */
+ if (volt_data) {
+ vp_errgain_val = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
+ vdd-vp_data-vpconfig);
+ vdd-vp_rt_data.vpconfig_errorgain = volt_data-vp_errgain;
+ vp_errgain_val = ~vp_common-vpconfig_errorgain_mask;
+ vp_errgain_val |= vdd-vp_rt_data.vpconfig_errorgain
+ vp_common-vpconfig_errorgain_shift;
+ vdd-write_reg(vp_errgain_val, vdd-vp_data-vp_common-prm_mod,
+ vdd-vp_data-vpconfig);
+ }
+
+ return 0;
+}
+
+void omap_vc_post_scale(struct voltagedomain *voltdm,
+ unsigned long target_volt,
+ u8 target_vsel, u8 current_vsel)
+{
+ struct omap_vdd_info *vdd = voltdm-vdd;
+ u32 smps_steps = 0, smps_delay = 0;
+
+ smps_steps = abs(target_vsel - current_vsel);
+ /* SMPS slew rate / step size. 2us added as buffer. */
+ smps_delay = ((smps_steps *
[PATCH 05/22] OMAP3: voltage: rename mpu voltagedomain to mpu_iva
This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so
rename appropriately.
Also fixup any users of the mpu name to use mpu_iva
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c|4 ++--
arch/arm/mach-omap2/omap_twl.c|2 +-
arch/arm/mach-omap2/pm.c |2 +-
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b..59fdb9f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -2597,7 +2597,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
.name = sr1_hwmod,
.class = omap34xx_smartreflex_hwmod_class,
.main_clk = sr1_fck,
- .vdd_name = mpu,
+ .vdd_name = mpu_iva,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
@@ -2619,7 +2619,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
.name = sr1_hwmod,
.class = omap36xx_smartreflex_hwmod_class,
.main_clk = sr1_fck,
- .vdd_name = mpu,
+ .vdd_name = mpu_iva,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index fcd2f62..760487b 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -288,7 +288,7 @@ int __init omap3_twl_init(void)
if (!twl_sr_enable_autoinit)
omap3_twl_set_sr_bit(true);
- voltdm = voltdm_lookup(mpu);
+ voltdm = voltdm_lookup(mpu_iva);
omap_voltage_register_pmic(voltdm, omap3_mpu_volt_info);
voltdm = voltdm_lookup(core);
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3bce29b..f81340e 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -228,7 +228,7 @@ static void __init omap3_init_voltages(void)
if (!cpu_is_omap34xx())
return;
- omap2_set_init_voltage(mpu, dpll1_ck, mpu_dev);
+ omap2_set_init_voltage(mpu_iva, dpll1_ck, mpu_dev);
omap2_set_init_voltage(core, l3_ick, l3_dev);
}
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 4bee412..2167ef4 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -60,7 +60,7 @@ static struct omap_vdd_info omap3_vdd2_info = {
};
static struct voltagedomain omap3_voltdm_mpu = {
- .name = mpu,
+ .name = mpu_iva,
.vdd = omap3_vdd1_info,
};
--
1.7.6
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[PATCH 13/22] OMAP2+: voltage: keep track of powerdomains in each voltagedomain
When a powerdomain is registered and it has an associated voltage domain,
add the powerdomain to the voltagedomain using voltdm_add_pwrdm().
Also add voltagedomain iterator helper functions to iterate over all
registered voltagedomains and all powerdomains associated with a
voltagedomain.
Modeled after a similar relationship between clockdomains and powerdomains.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomain.c |2 +
arch/arm/mach-omap2/powerdomain.h |2 +
arch/arm/mach-omap2/voltage.c | 80 +
arch/arm/mach-omap2/voltage.h | 10 +
4 files changed, 94 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c
b/arch/arm/mach-omap2/powerdomain.c
index 1d3013d..12135e2 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -102,6 +102,8 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
return -EINVAL;
}
pwrdm-voltdm.ptr = voltdm;
+ INIT_LIST_HEAD(pwrdm-voltdm_node);
+ voltdm_add_pwrdm(voltdm, pwrdm);
list_add(pwrdm-node, pwrdm_list);
diff --git a/arch/arm/mach-omap2/powerdomain.h
b/arch/arm/mach-omap2/powerdomain.h
index 25bef48..2c685a5 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -92,6 +92,7 @@ struct powerdomain;
* @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON
* @pwrdm_clkdms: Clockdomains in this powerdomain
* @node: list_head linking all powerdomains
+ * @voltdm_node: list_head linking all powerdomains in a voltagedomain
* @state:
* @state_counter:
* @timer:
@@ -116,6 +117,7 @@ struct powerdomain {
const u8 prcm_partition;
struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
struct list_head node;
+ struct list_head voltdm_node;
int state;
unsigned state_counter[PWRDM_MAX_PWRSTS];
unsigned ret_logic_off_counter;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 48a2593..1e5c122 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -36,6 +36,7 @@
#include control.h
#include voltage.h
+#include powerdomain.h
#include vc.h
#include vp.h
@@ -1085,11 +1086,90 @@ static struct voltagedomain *_voltdm_lookup(const char
*name)
return voltdm;
}
+/**
+ * voltdm_add_pwrdm - add a powerdomain to a voltagedomain
+ * @voltdm: struct voltagedomain * to add the powerdomain to
+ * @pwrdm: struct powerdomain * to associate with a voltagedomain
+ *
+ * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This
+ * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if
+ * presented with invalid pointers; -ENOMEM if memory could not be allocated;
+ * or 0 upon success.
+ */
+int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm)
+{
+ if (!voltdm || !pwrdm)
+ return -EINVAL;
+
+ pr_debug(voltagedomain: associating powerdomain %s with voltagedomain
+%s\n, pwrdm-name, voltdm-name);
+
+ list_add(pwrdm-voltdm_node, voltdm-pwrdm_list);
+
+ return 0;
+}
+
+/**
+ * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm
+ * @voltdm: struct voltagedomain * to iterate over
+ * @fn: callback function *
+ *
+ * Call the supplied function @fn for each powerdomain in the
+ * voltagedomain @voltdm. Returns -EINVAL if presented with invalid
+ * pointers; or passes along the last return value of the callback
+ * function, which should be 0 for success or anything else to
+ * indicate failure.
+ */
+int voltdm_for_each_pwrdm(struct voltagedomain *voltdm,
+ int (*fn)(struct voltagedomain *voltdm,
+ struct powerdomain *pwrdm))
+{
+ struct powerdomain *pwrdm;
+ int ret = 0;
+
+ if (!fn)
+ return -EINVAL;
+
+ list_for_each_entry(pwrdm, voltdm-pwrdm_list, voltdm_node)
+ ret = (*fn)(voltdm, pwrdm);
+
+ return ret;
+}
+
+/**
+ * voltdm_for_each - call function on each registered voltagedomain
+ * @fn: callback function *
+ *
+ * Call the supplied function @fn for each registered voltagedomain.
+ * The callback function @fn can return anything but 0 to bail out
+ * early from the iterator. Returns the last return value of the
+ * callback function, which should be 0 for success or anything else
+ * to indicate failure; or -EINVAL if the function pointer is null.
+ */
+int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user),
+ void *user)
+{
+ struct voltagedomain *temp_voltdm;
+ int ret = 0;
+
+ if (!fn)
+ return -EINVAL;
+
+ list_for_each_entry(temp_voltdm, voltdm_list, node) {
+ ret = (*fn)(temp_voltdm, user);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
static int
[PATCH 15/22] OMAP2+: voltage: move VC into struct voltagedomain, misc. renames
Move the VC instance struct from omap_vdd_info into struct voltagedomain.
While moving, perform some misc. renames for readability.
No functional changes.
Summary of renames:
- rename omap_vc_instance to omap_vc_channel, since there is only
one instance of the VC IP and this actually represents channels
using TRM terminology.
- rename 'vc_common' field of VC channel which led to:
s/vc-vc_common/vc-common/
- remove redundant '_data' suffix
- OMAP3: vc1 -- vc_mpu, vc2 -- vc_core
- omap_vc_bypass_scale_voltage() - omap_vc_bypass_scale()
Signed-off-by: Kevin Hilman khil...@ti.com
merge
---
arch/arm/mach-omap2/vc.c | 90 -
arch/arm/mach-omap2/vc.h | 26
arch/arm/mach-omap2/vc3xxx_data.c | 10 ++--
arch/arm/mach-omap2/vc44xx_data.c | 14 ++--
arch/arm/mach-omap2/voltage.c |6 +-
arch/arm/mach-omap2/voltage.h |5 +-
arch/arm/mach-omap2/voltagedomains3xxx_data.c |4 +-
arch/arm/mach-omap2/voltagedomains44xx_data.c |6 +-
8 files changed, 80 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 98f5a4b..7643940 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -15,14 +15,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
unsigned long target_volt,
u8 *target_vsel, u8 *current_vsel)
{
- struct omap_vc_instance_data *vc = voltdm-vdd-vc_data;
+ struct omap_vc_channel *vc = voltdm-vc;
struct omap_vdd_info *vdd = voltdm-vdd;
struct omap_volt_data *volt_data;
- const struct omap_vc_common_data *vc_common;
const struct omap_vp_common_data *vp_common;
u32 vc_cmdval, vp_errgain_val;
- vc_common = vc-vc_common;
vp_common = vdd-vp_data-vp_common;
/* Check if sufficient pmic info is available for this vdd */
@@ -54,10 +52,10 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
*current_vsel = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-voltage);
/* Setting the ON voltage to the new target voltage */
- vc_cmdval = vdd-read_reg(vc-vc_common-prm_mod, vc-cmdval_reg);
- vc_cmdval = ~vc_common-cmd_on_mask;
- vc_cmdval |= (*target_vsel vc_common-cmd_on_shift);
- vdd-write_reg(vc_cmdval, vc-vc_common-prm_mod, vc-cmdval_reg);
+ vc_cmdval = vdd-read_reg(vc-common-prm_mod, vc-cmdval_reg);
+ vc_cmdval = ~vc-common-cmd_on_mask;
+ vc_cmdval |= (*target_vsel vc-common-cmd_on_shift);
+ vdd-write_reg(vc_cmdval, vc-common-prm_mod, vc-cmdval_reg);
/* Setting vp errorgain based on the voltage */
if (volt_data) {
@@ -90,11 +88,11 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
vdd-curr_volt = target_volt;
}
-/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
-int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
-unsigned long target_volt)
+/* vc_bypass_scale - VC bypass method of voltage scaling */
+int omap_vc_bypass_scale(struct voltagedomain *voltdm,
+unsigned long target_volt)
{
- struct omap_vc_instance_data *vc = voltdm-vdd-vc_data;
+ struct omap_vc_channel *vc = voltdm-vc;
struct omap_vdd_info *vdd = voltdm-vdd;
u32 loop_cnt = 0, retries_cnt = 0;
u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
@@ -105,19 +103,19 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain
*voltdm,
if (ret)
return ret;
- vc_valid = vc-vc_common-valid;
- vc_bypass_val_reg = vc-vc_common-bypass_val_reg;
- vc_bypass_value = (target_vsel vc-vc_common-data_shift) |
+ vc_valid = vc-common-valid;
+ vc_bypass_val_reg = vc-common-bypass_val_reg;
+ vc_bypass_value = (target_vsel vc-common-data_shift) |
(vdd-pmic_info-pmic_reg
- vc-vc_common-regaddr_shift) |
+ vc-common-regaddr_shift) |
(vdd-pmic_info-i2c_slave_addr
- vc-vc_common-slaveaddr_shift);
+ vc-common-slaveaddr_shift);
- vdd-write_reg(vc_bypass_value, vc-vc_common-prm_mod,
vc_bypass_val_reg);
- vdd-write_reg(vc_bypass_value | vc_valid, vc-vc_common-prm_mod,
+ vdd-write_reg(vc_bypass_value, vc-common-prm_mod, vc_bypass_val_reg);
+ vdd-write_reg(vc_bypass_value | vc_valid, vc-common-prm_mod,
vc_bypass_val_reg);
- vc_bypass_value = vdd-read_reg(vc-vc_common-prm_mod,
vc_bypass_val_reg);
+ vc_bypass_value = vdd-read_reg(vc-common-prm_mod, vc_bypass_val_reg);
/*
* Loop till the bypass command is acknowledged from the SMPS.
* NOTE: This is legacy code. The loop count and retry count needs
@@ -136,7 +134,7 @@ int
[PATCH 16/22] OMAP2+: voltage: enable VC bypass scale method when VC is initialized
VC is initialized first, set default scaling method to VC bypass.
If/when VP is initialized, default scaling method will be changed to
VP force-update.
Enabling VC bypass as default as soon as VC is initialized allows for
VC bypass scaling to work when no VP is configured/initialized for a
given voltage domain.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index c6352e3..e1a22a3 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -802,8 +802,10 @@ int __init omap_voltage_late_init(void)
if (!voltdm-scalable)
continue;
- if (voltdm-vc)
+ if (voltdm-vc) {
+ voltdm-vdd-volt_scale = omap_vc_bypass_scale;
omap_vc_init_channel(voltdm);
+ }
if (voltdm-vdd) {
if (omap_vdd_data_configure(voltdm))
--
1.7.6
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[PATCH 17/22] OMAP2+: voltage: split out voltage processor (VP) code into new layer
This patch is primarily a move of VP specific code from voltage.c into
its own code in vp.c and adds prototypes to vp.h
No functional changes, except debugfs...
VP debugfs moved to 'vp' subdir of debugfs/voltage/ and 'vp_'
prefixes removed from all debugfs filenames.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/voltage.c | 348 +-
arch/arm/mach-omap2/voltage.h |3 -
arch/arm/mach-omap2/vp.c | 374 +
arch/arm/mach-omap2/vp.h |9 +
5 files changed, 387 insertions(+), 349 deletions(-)
create mode 100644 arch/arm/mach-omap2/vp.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index ecbf361..8e79ca5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o
cminst44xx.o \
# OMAP voltage domains
ifeq ($(CONFIG_PM),y)
-voltagedomain-common := voltage.o vc.o
+voltagedomain-common := voltage.o vc.o vp.o
obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \
voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index e1a22a3..9b9f019 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -46,10 +46,6 @@ static LIST_HEAD(voltdm_list);
#define VOLTAGE_DIR_SIZE 16
static struct dentry *voltage_dir;
-/* Init function pointers */
-static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm,
- unsigned long target_volt);
-
static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
{
return omap2_prm_read_mod_reg(mod, offset);
@@ -105,7 +101,7 @@ static int __init _config_common_vdd_data(struct
voltagedomain *voltdm)
sys_clk_speed /= 1000;
/* Generic voltage parameters */
- vdd-volt_scale = vp_forceupdate_scale_voltage;
+ vdd-volt_scale = omap_vp_forceupdate_scale;
vdd-vp_enabled = false;
vdd-vp_rt_data.vpconfig_erroroffset =
@@ -127,30 +123,6 @@ static int __init _config_common_vdd_data(struct
voltagedomain *voltdm)
return 0;
}
-/* Voltage debugfs support */
-static int vp_volt_debug_get(void *data, u64 *val)
-{
- struct voltagedomain *voltdm = (struct voltagedomain *)data;
- struct omap_vdd_info *vdd = voltdm-vdd;
- u8 vsel;
-
- if (!vdd) {
- pr_warning(Wrong paramater passed\n);
- return -EINVAL;
- }
-
- vsel = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-voltage);
-
- if (!vdd-pmic_info-vsel_to_uv) {
- pr_warning(PMIC function to convert vsel to voltage
- in uV not registerd\n);
- return -EINVAL;
- }
-
- *val = vdd-pmic_info-vsel_to_uv(vsel);
- return 0;
-}
-
static int nom_volt_debug_get(void *data, u64 *val)
{
struct voltagedomain *voltdm = (struct voltagedomain *)data;
@@ -165,85 +137,8 @@ static int nom_volt_debug_get(void *data, u64 *val)
return 0;
}
-DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, %llu\n);
DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
%llu\n);
-static void vp_latch_vsel(struct voltagedomain *voltdm)
-{
- u32 vpconfig;
- unsigned long uvdc;
- char vsel;
- struct omap_vdd_info *vdd = voltdm-vdd;
-
- uvdc = omap_voltage_get_nom_volt(voltdm);
- if (!uvdc) {
- pr_warning(%s: unable to find current voltage for vdd_%s\n,
- __func__, voltdm-name);
- return;
- }
-
- if (!vdd-pmic_info || !vdd-pmic_info-uv_to_vsel) {
- pr_warning(%s: PMIC function to convert voltage in uV to
-vsel not registered\n, __func__);
- return;
- }
-
- vsel = vdd-pmic_info-uv_to_vsel(uvdc);
-
- vpconfig = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
- vpconfig = ~(vdd-vp_data-vp_common-vpconfig_initvoltage_mask |
- vdd-vp_data-vp_common-vpconfig_initvdd);
- vpconfig |= vsel vdd-vp_data-vp_common-vpconfig_initvoltage_shift;
-
- vdd-write_reg(vpconfig, vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
-
- /* Trigger initVDD value copy to voltage processor */
- vdd-write_reg((vpconfig | vdd-vp_data-vp_common-vpconfig_initvdd),
- vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
-
- /* Clear initVDD copy trigger bit */
- vdd-write_reg(vpconfig, vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-vpconfig);
-}
-
-/* Generic voltage init functions
[PATCH 19/22] OMAP2+: add PRM VP functions for checking/clearing VP TX done status
Add SoC specific PRM VP helper functions for checking and clearing
the VP transaction done status.
Longer term, these events should be handled by the forthcoming PRCM
interrupt handler.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/prm2xxx_3xxx.c | 41 ++
arch/arm/mach-omap2/prm2xxx_3xxx.h |4 +++
arch/arm/mach-omap2/prm44xx.c | 49
arch/arm/mach-omap2/prm44xx.h |4 +++
arch/arm/mach-omap2/vp.h | 33 ++-
arch/arm/mach-omap2/vp3xxx_data.c | 19 ++---
arch/arm/mach-omap2/vp44xx_data.c | 25 ++---
7 files changed, 136 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 051213f..58c5c87 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -20,6 +20,8 @@
#include plat/cpu.h
#include plat/prcm.h
+#include vp.h
+
#include prm2xxx_3xxx.h
#include cm2xxx_3xxx.h
#include prm-regbits-24xx.h
@@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8
rst_shift, u8 st_shift)
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
}
+
+/* PRM VP */
+
+/*
+ * struct omap3_vp - OMAP3 VP register access description.
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap3_vp {
+ u32 tranxdone_status;
+};
+
+struct omap3_vp omap3_vp[] = {
+ [OMAP3_VP_VDD_MPU_ID] = {
+ .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+ },
+ [OMAP3_VP_VDD_CORE_ID] = {
+ .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
+ },
+};
+
+#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
+
+u32 omap3_prm_vp_check_txdone(u8 vp_id)
+{
+ struct omap3_vp *vp = omap3_vp[vp_id];
+ u32 irqstatus;
+
+ irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
+ OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+ return irqstatus vp-tranxdone_status;
+}
+
+void omap3_prm_vp_clear_txdone(u8 vp_id)
+{
+ struct omap3_vp *vp = omap3_vp[vp_id];
+
+ omap2_prm_write_mod_reg(vp-tranxdone_status,
+ OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h
b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index a1fc62a..5112526 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8
shift);
extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8
st_shift);
+/* OMAP3-specific VP functions */
+u32 omap3_prm_vp_check_txdone(u8 vp_id);
+void omap3_prm_vp_clear_txdone(u8 vp_id);
+
#endif /* CONFIG_ARCH_OMAP4 */
#endif
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0016555..390e32c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -21,6 +21,7 @@
#include plat/cpu.h
#include plat/prcm.h
+#include vp.h
#include prm44xx.h
#include prm-regbits-44xx.h
@@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16
inst, s16 reg)
return v;
}
+
+/* PRM VP */
+
+/*
+ * struct omap4_vp - OMAP4 VP register access description.
+ * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap4_vp {
+ u32 irqstatus_mpu;
+ u32 tranxdone_status;
+};
+
+static struct omap4_vp omap4_vp[] = {
+ [OMAP4_VP_VDD_MPU_ID] = {
+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
+ .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
+ },
+ [OMAP4_VP_VDD_IVA_ID] = {
+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
+ .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
+ },
+ [OMAP4_VP_VDD_CORE_ID] = {
+ .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
+ .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
+ },
+};
+
+u32 omap4_prm_vp_check_txdone(u8 vp_id)
+{
+ struct omap4_vp *vp = omap4_vp[vp_id];
+ u32 irqstatus;
+
+ irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+ OMAP4430_PRM_OCP_SOCKET_INST,
+ vp-irqstatus_mpu);
+ return irqstatus vp-tranxdone_status;
+}
+
+void omap4_prm_vp_clear_txdone(u8 vp_id)
+{
+ struct omap4_vp *vp = omap4_vp[vp_id];
+
+ omap4_prminst_write_inst_reg(vp-tranxdone_status,
+OMAP4430_PRM_PARTITION,
+OMAP4430_PRM_OCP_SOCKET_INST,
+vp-irqstatus_mpu);
+};
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
[PATCH 20/22] OMAP3+ VP: replace transaction done check/clear with VP ops
Replace the VP tranxdone check/clear with helper functions from the
PRM layer.
In the process, remove prm_irqst_* voltage structure fields for IRQ
status checking which are no longer needed.
Since these reads/writes of the IRQ status bits were the only PRM
accesses that were not to VC/VP registers, this allows the rest of the
register accesses in the VC/VP code to use VC/VP specific register
access functions (done in the following patch.)
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.h |3 ---
arch/arm/mach-omap2/voltagedomains3xxx_data.c |4
arch/arm/mach-omap2/voltagedomains44xx_data.c |6 --
arch/arm/mach-omap2/vp.c | 16 +---
4 files changed, 5 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 641597c..363eee4 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -131,7 +131,6 @@ struct omap_volt_pmic_info {
* @vfsm: voltage manager FSM data
* @debug_dir : debug directory for this voltage domain.
* @curr_volt : current voltage for this vdd.
- * @prm_irqst_mod : PRM module id used for PRM IRQ status register access
* @vp_enabled : flag to keep track of whether vp is enabled or not
* @volt_scale : API to scale the voltage of the vdd.
*/
@@ -145,8 +144,6 @@ struct omap_vdd_info {
u32 curr_volt;
bool vp_enabled;
- s16 prm_irqst_mod;
- u8 prm_irqst_reg;
u32 (*read_reg) (u16 mod, u8 offset);
void (*write_reg) (u32 val, u16 mod, u8 offset);
int (*volt_scale) (struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 7cb27ec..ad8f05b 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data
omap3_vdd1_vfsm_data = {
};
static struct omap_vdd_info omap3_vdd1_info = {
- .prm_irqst_mod = OCP_MOD,
- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap3_vp1_data,
.vfsm = omap3_vdd1_vfsm_data,
};
@@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data
omap3_vdd2_vfsm_data = {
};
static struct omap_vdd_info omap3_vdd2_info = {
- .prm_irqst_mod = OCP_MOD,
- .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap3_vp2_data,
.vfsm = omap3_vdd2_vfsm_data,
};
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index a05d90a..43e1d38 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data
omap4_vdd_mpu_vfsm_data = {
};
static struct omap_vdd_info omap4_vdd_mpu_info = {
- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
.vp_data = omap4_vp_mpu_data,
.vfsm = omap4_vdd_mpu_vfsm_data,
};
@@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data
omap4_vdd_iva_vfsm_data = {
};
static struct omap_vdd_info omap4_vdd_iva_info = {
- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap4_vp_iva_data,
.vfsm = omap4_vdd_iva_vfsm_data,
};
@@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data
omap4_vdd_core_vfsm_data = {
};
static struct omap_vdd_info omap4_vdd_core_info = {
- .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
- .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
.vp_data = omap4_vp_core_data,
.vfsm = omap4_vdd_core_vfsm_data,
};
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f3503de..113c839 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
* is 3us
*/
while (timeout++ VP_TRANXDONE_TIMEOUT) {
- vdd-write_reg(vp-prm_irqst_data-tranxdone_status,
- vdd-prm_irqst_mod, vdd-prm_irqst_reg);
- if (!(vdd-read_reg(vdd-prm_irqst_mod, vdd-prm_irqst_reg)
- vp-prm_irqst_data-tranxdone_status))
+ vp-vp_common-ops-clear_txdone(vp-id);
+ if (!vp-vp_common-ops-check_txdone(vp-id))
break;
udelay(1);
}
@@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
* Depends on SMPSWAITTIMEMIN/MAX and voltage change
*/
timeout = 0;
- omap_test_timeout((vdd-read_reg(vdd-prm_irqst_mod,
-vdd-prm_irqst_reg)
- vp-prm_irqst_data-tranxdone_status),
+
[PATCH 18/22] OMAP2+: VC: support PMICs with separate voltage and command registers
The VC layer can support PMICs with separate voltage and command
registers by putting the different registers in the PRM_VC_SMPS_VOL_RA
and PRCM_VC_SMPS_CMD_RA registers respectively.
The PMIC data must supply at least a voltage register address
(volt_reg_addr). The command register address (cmd_reg_addr) is
optional. If the PMIC data does not supply a separate command
register address, the VC will use the voltage register address for both.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 10 +-
arch/arm/mach-omap2/vc.c |4 ++--
arch/arm/mach-omap2/voltage.h |3 ++-
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 760487b..3249fe3 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -158,7 +158,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = {
.vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
- .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG,
+ .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
.vsel_to_uv = twl4030_vsel_to_uv,
.uv_to_vsel = twl4030_uv_to_vsel,
};
@@ -178,7 +178,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = {
.vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
- .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG,
+ .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
.vsel_to_uv = twl4030_vsel_to_uv,
.uv_to_vsel = twl4030_uv_to_vsel,
};
@@ -198,7 +198,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = {
.vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
- .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG,
+ .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
};
@@ -218,7 +218,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = {
.vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
- .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG,
+ .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
};
@@ -238,7 +238,7 @@ static struct omap_volt_pmic_info omap4_core_volt_info = {
.vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX,
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
- .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG,
+ .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
};
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 7643940..720c0cd 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -106,7 +106,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
vc_valid = vc-common-valid;
vc_bypass_val_reg = vc-common-bypass_val_reg;
vc_bypass_value = (target_vsel vc-common-data_shift) |
- (vdd-pmic_info-pmic_reg
+ (vdd-pmic_info-volt_reg_addr
vc-common-regaddr_shift) |
(vdd-pmic_info-i2c_slave_addr
vc-common-slaveaddr_shift);
@@ -255,7 +255,7 @@ void __init omap_vc_init_channel(struct voltagedomain
*voltdm)
vc_val = vdd-read_reg(vc-common-prm_mod,
vc-common-smps_volra_reg);
vc_val = ~vc-smps_volra_mask;
- vc_val |= vdd-pmic_info-pmic_reg vc-smps_volra_shift;
+ vc_val |= vdd-pmic_info-volt_reg_addr vc-smps_volra_shift;
vdd-write_reg(vc_val, vc-common-prm_mod,
vc-common-smps_volra_reg);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 83fa239..641597c 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -112,7 +112,8 @@ struct omap_volt_pmic_info {
u8 vp_vddmax;
u8 vp_timeout_us;
u8 i2c_slave_addr;
- u8 pmic_reg;
+ u8 volt_reg_addr;
+ u8 cmd_reg_addr;
unsigned long (*vsel_to_uv) (const u8 vsel);
u8 (*uv_to_vsel) (unsigned long uV);
};
--
1.7.6
--
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[PATCH 07/22] OMAP3+: voltage: add scalable flag to voltagedomain
Add a 'bool scalable' flag to the struct powerdomain and set it for
the scalable domains on OMAP3 and OMAP4.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c |3 +++
arch/arm/mach-omap2/voltage.h |2 ++
arch/arm/mach-omap2/voltagedomains3xxx_data.c |2 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |3 +++
4 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4f0361a..48a2593 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -1054,6 +1054,9 @@ int __init omap_voltage_late_init(void)
pr_err(%s: Unable to create voltage debugfs main dir\n,
__func__);
list_for_each_entry(voltdm, voltdm_list, node) {
+ if (!voltdm-scalable)
+ continue;
+
if (voltdm-vdd) {
if (omap_vdd_data_configure(voltdm))
continue;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 5440298..25cfb5c 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -53,11 +53,13 @@ struct omap_vfsm_instance_data {
/**
* struct voltagedomain - omap voltage domain global structure.
* @name: Name of the voltage domain which can be used as a unique identifier.
+ * @scalable: Whether or not this voltage domain is scalable
* @node: list_head linking all voltage domains
* @vdd: to be removed
*/
struct voltagedomain {
char *name;
+ bool scalable;
struct list_head node;
struct omap_vdd_info *vdd;
};
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 42d0b11..d7e1052 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -61,11 +61,13 @@ static struct omap_vdd_info omap3_vdd2_info = {
static struct voltagedomain omap3_voltdm_mpu = {
.name = mpu_iva,
+ .scalable = true,
.vdd = omap3_vdd1_info,
};
static struct voltagedomain omap3_voltdm_core = {
.name = core,
+ .scalable = true,
.vdd = omap3_vdd2_info,
};
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c
b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 245fdf9..95e1ce5 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -70,16 +70,19 @@ static struct omap_vdd_info omap4_vdd_core_info = {
static struct voltagedomain omap4_voltdm_mpu = {
.name = mpu,
+ .scalable = true,
.vdd = omap4_vdd_mpu_info,
};
static struct voltagedomain omap4_voltdm_iva = {
.name = iva,
+ .scalable = true,
.vdd = omap4_vdd_iva_info,
};
static struct voltagedomain omap4_voltdm_core = {
.name = core,
+ .scalable = true,
.vdd = omap4_vdd_core_info,
};
--
1.7.6
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[PATCH 08/22] OMAP2+: powerdomain: add voltagedomain to struct powerdomain
Each powerdomain is associated with a voltage domain. Add an entry to
struct powerdomain where the enclosing voltagedomain can be
referenced.
Modeled after similar relationship between clockdomains and powerdomains.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomain.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain.h
b/arch/arm/mach-omap2/powerdomain.h
index d23d979..9ce920d 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -24,6 +24,8 @@
#include plat/cpu.h
+#include voltage.h
+
/* Powerdomain basic power states */
#define PWRDM_POWER_OFF0x0
#define PWRDM_POWER_RET0x1
@@ -78,6 +80,7 @@ struct powerdomain;
/**
* struct powerdomain - OMAP powerdomain
* @name: Powerdomain name
+ * @voltdm: voltagedomain containing this powerdomain
* @omap_chip: represents the OMAP chip types containing this pwrdm
* @prcm_offs: the address offset from CM_BASE/PRM_BASE
* @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
@@ -98,6 +101,10 @@ struct powerdomain;
*/
struct powerdomain {
const char *name;
+ union {
+ const char *name;
+ struct voltagedomain *ptr;
+ } voltdm;
const struct omap_chip_id omap_chip;
const s16 prcm_offs;
const u8 pwrsts;
--
1.7.6
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[PATCH 21/22] OMAP2+: PRM: add register access functions for VC/VP
On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM. Add some PRM helper functions for register access to
these module registers.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/prm2xxx_3xxx.c | 15 +++
arch/arm/mach-omap2/prm2xxx_3xxx.h |8
arch/arm/mach-omap2/prm44xx.c | 22 ++
arch/arm/mach-omap2/prm44xx.h |8
4 files changed, 53 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 58c5c87..3b83763 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id)
omap2_prm_write_mod_reg(vp-tranxdone_status,
OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
}
+
+u32 omap3_prm_vcvp_read(u8 offset)
+{
+ return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+}
+
+void omap3_prm_vcvp_write(u32 val, u8 offset)
+{
+ omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+}
+
+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+ return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h
b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 5112526..cef533d 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8
rst_shift, u8 st_shift);
u32 omap3_prm_vp_check_txdone(u8 vp_id);
void omap3_prm_vp_clear_txdone(u8 vp_id);
+/*
+ * OMAP3 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap3_prm_vcvp_read(u8 offset);
+extern void omap3_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
#endif /* CONFIG_ARCH_OMAP4 */
+
#endif
/*
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 390e32c..495a31a 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -24,6 +24,8 @@
#include vp.h
#include prm44xx.h
#include prm-regbits-44xx.h
+#include prcm44xx.h
+#include prminst44xx.h
/* PRM low-level functions */
@@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id)
OMAP4430_PRM_OCP_SOCKET_INST,
vp-irqstatus_mpu);
};
+
+u32 omap4_prm_vcvp_read(u8 offset)
+{
+ return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+ OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+void omap4_prm_vcvp_write(u32 val, u8 offset)
+{
+ omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
+OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+ return omap4_prminst_rmw_inst_reg_bits(mask, bits,
+ OMAP4430_PRM_PARTITION,
+ OMAP4430_PRM_DEVICE_INST,
+ offset);
+}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index b28c87d..3d66ccd 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits,
s16 inst, s16 idx);
u32 omap4_prm_vp_check_txdone(u8 vp_id);
void omap4_prm_vp_clear_txdone(u8 vp_id);
+/*
+ * OMAP4 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap4_prm_vcvp_read(u8 offset);
+extern void omap4_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
+
# endif
#endif
--
1.7.6
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[PATCH 22/22] OMAP3+: voltage: convert to PRM register access functions
Convert VC/VP register access to use PRM VC/VP accessor functions. In
the process, move the read/write function pointers from vdd_info into
struct voltagedomain.
No functional changes.
Additional cleanup:
- remove prm_mod field from VC/VP data structures, the PRM register
access functions know which PRM module to use.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c | 69 ++---
arch/arm/mach-omap2/vc.h |2 -
arch/arm/mach-omap2/vc3xxx_data.c |1 -
arch/arm/mach-omap2/vc44xx_data.c |1 -
arch/arm/mach-omap2/voltage.c | 31 +---
arch/arm/mach-omap2/voltage.h |7 ++-
arch/arm/mach-omap2/voltagedomains3xxx_data.c |6 ++
arch/arm/mach-omap2/voltagedomains44xx_data.c |9 +++
arch/arm/mach-omap2/vp.c | 57 ++--
arch/arm/mach-omap2/vp.h |2 -
arch/arm/mach-omap2/vp3xxx_data.c |1 -
arch/arm/mach-omap2/vp44xx_data.c |1 -
12 files changed, 76 insertions(+), 111 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 720c0cd..9c2706c 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -37,7 +37,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
return -ENODATA;
}
- if (!vdd-read_reg || !vdd-write_reg) {
+ if (!voltdm-read || !voltdm-write) {
pr_err(%s: No read/write API for accessing vdd_%s regs\n,
__func__, voltdm-name);
return -EINVAL;
@@ -49,24 +49,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
volt_data = NULL;
*target_vsel = vdd-pmic_info-uv_to_vsel(target_volt);
- *current_vsel = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
vdd-vp_data-voltage);
+ *current_vsel = voltdm-read(vdd-vp_data-voltage);
/* Setting the ON voltage to the new target voltage */
- vc_cmdval = vdd-read_reg(vc-common-prm_mod, vc-cmdval_reg);
+ vc_cmdval = voltdm-read(vc-cmdval_reg);
vc_cmdval = ~vc-common-cmd_on_mask;
vc_cmdval |= (*target_vsel vc-common-cmd_on_shift);
- vdd-write_reg(vc_cmdval, vc-common-prm_mod, vc-cmdval_reg);
+ voltdm-write(vc_cmdval, vc-cmdval_reg);
/* Setting vp errorgain based on the voltage */
if (volt_data) {
- vp_errgain_val = vdd-read_reg(vdd-vp_data-vp_common-prm_mod,
- vdd-vp_data-vpconfig);
+ vp_errgain_val = voltdm-read(vdd-vp_data-vpconfig);
vdd-vp_rt_data.vpconfig_errorgain = volt_data-vp_errgain;
vp_errgain_val = ~vp_common-vpconfig_errorgain_mask;
vp_errgain_val |= vdd-vp_rt_data.vpconfig_errorgain
vp_common-vpconfig_errorgain_shift;
- vdd-write_reg(vp_errgain_val, vdd-vp_data-vp_common-prm_mod,
- vdd-vp_data-vpconfig);
+ voltdm-write(vp_errgain_val, vdd-vp_data-vpconfig);
}
return 0;
@@ -111,11 +109,10 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
(vdd-pmic_info-i2c_slave_addr
vc-common-slaveaddr_shift);
- vdd-write_reg(vc_bypass_value, vc-common-prm_mod, vc_bypass_val_reg);
- vdd-write_reg(vc_bypass_value | vc_valid, vc-common-prm_mod,
- vc_bypass_val_reg);
+ voltdm-write(vc_bypass_value, vc_bypass_val_reg);
+ voltdm-write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
- vc_bypass_value = vdd-read_reg(vc-common-prm_mod, vc_bypass_val_reg);
+ vc_bypass_value = voltdm-read(vc_bypass_val_reg);
/*
* Loop till the bypass command is acknowledged from the SMPS.
* NOTE: This is legacy code. The loop count and retry count needs
@@ -134,8 +131,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
loop_cnt = 0;
udelay(10);
}
- vc_bypass_value = vdd-read_reg(vc-common-prm_mod,
- vc_bypass_val_reg);
+ vc_bypass_value = voltdm-read(vc_bypass_val_reg);
}
omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
@@ -144,18 +140,13 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm,
static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
{
- struct omap_vc_channel *vc = voltdm-vc;
- struct omap_vdd_info *vdd = voltdm-vdd;
-
/*
* Voltage Manager FSM parameters init
* XXX This data should be passed in from the board file
*/
- vdd-write_reg(OMAP3_CLKSETUP, vc-common-prm_mod,
OMAP3_PRM_CLKSETUP_OFFSET);
- vdd-write_reg(OMAP3_VOLTOFFSET, vc-common-prm_mod,
-
[PATCH 10/22] OMAP3: powerdomain data: add voltage domains
Add voltage domain name to indicate which voltagedomain each
powerdomain is in.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c |2 ++
arch/arm/mach-omap2/powerdomains3xxx_data.c | 16
2 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index 4210c33..2242c8e 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -70,6 +70,7 @@ struct powerdomain gfx_omap2_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
struct powerdomain wkup_omap2_pwrdm = {
@@ -77,4 +78,5 @@ struct powerdomain wkup_omap2_pwrdm = {
.prcm_offs = WKUP_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
.pwrsts = PWRSTS_ON,
+ .voltdm = { .name = wakeup },
};
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c
b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920..1f37c0c 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -52,6 +52,7 @@ static struct powerdomain iva2_pwrdm = {
[2] = PWRSTS_OFF_ON,
[3] = PWRSTS_ON,
},
+ .voltdm = { .name = mpu_iva },
};
static struct powerdomain mpu_3xxx_pwrdm = {
@@ -68,6 +69,7 @@ static struct powerdomain mpu_3xxx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_OFF_ON,
},
+ .voltdm = { .name = mpu_iva },
};
/*
@@ -98,6 +100,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain core_3xxx_es3_1_pwrdm = {
@@ -121,6 +124,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
[0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain dss_pwrdm = {
@@ -136,6 +140,7 @@ static struct powerdomain dss_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
/*
@@ -157,6 +162,7 @@ static struct powerdomain sgx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain cam_pwrdm = {
@@ -172,6 +178,7 @@ static struct powerdomain cam_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain per_pwrdm = {
@@ -187,12 +194,14 @@ static struct powerdomain per_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain emu_pwrdm = {
.name = emu_pwrdm,
.prcm_offs = OMAP3430_EMU_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .voltdm = { .name = core },
};
static struct powerdomain neon_pwrdm = {
@@ -201,6 +210,7 @@ static struct powerdomain neon_pwrdm = {
.omap_chip= OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
.pwrsts = PWRSTS_OFF_RET_ON,
.pwrsts_logic_ret = PWRSTS_RET,
+ .voltdm = { .name = mpu_iva },
};
static struct powerdomain usbhost_pwrdm = {
@@ -223,36 +233,42 @@ static struct powerdomain usbhost_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
static struct powerdomain dpll1_pwrdm = {
.name = dpll1_pwrdm,
.prcm_offs = MPU_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .voltdm = { .name = mpu_iva },
};
static struct powerdomain dpll2_pwrdm = {
.name = dpll2_pwrdm,
.prcm_offs = OMAP3430_IVA2_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .voltdm = { .name = mpu_iva },
};
static struct powerdomain dpll3_pwrdm = {
.name = dpll3_pwrdm,
.prcm_offs = PLL_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .voltdm = { .name = core },
};
static struct powerdomain dpll4_pwrdm = {
.name = dpll4_pwrdm,
.prcm_offs = PLL_MOD,
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+ .voltdm = { .name = core },
};
static struct
[PATCH 09/22] OMAP2: add voltage domains and connect to powerdomains
Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains
with the newly created voltage domains.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/Makefile |3 +-
arch/arm/mach-omap2/io.c |2 +
arch/arm/mach-omap2/powerdomains2xxx_data.c |4 +++
arch/arm/mach-omap2/voltage.h |1 +
arch/arm/mach-omap2/voltagedomains2xxx_data.c | 32 +
5 files changed, 41 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f343365..1b6cecd 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -91,7 +91,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o
cminst44xx.o \
# OMAP voltage domains
ifeq ($(CONFIG_PM),y)
voltagedomain-common := voltage.o
-obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common)
+obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \
+ voltagedomains2xxx_data.o
obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \
voltagedomains3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 9f5a846..4c8a5de 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -342,10 +342,12 @@ void __init omap2_init_common_infrastructure(void)
u8 postsetup_state;
if (cpu_is_omap242x()) {
+ omap2xxx_voltagedomains_init();
omap2xxx_powerdomains_init();
omap2xxx_clockdomains_init();
omap2420_hwmod_init();
} else if (cpu_is_omap243x()) {
+ omap2xxx_voltagedomains_init();
omap2xxx_powerdomains_init();
omap2xxx_clockdomains_init();
omap2430_hwmod_init();
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c
b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index cc389fb..274f64c 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -38,6 +38,7 @@ static struct powerdomain dsp_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,
},
+ .voltdm = { .name = core },
};
static struct powerdomain mpu_24xx_pwrdm = {
@@ -53,6 +54,7 @@ static struct powerdomain mpu_24xx_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON,
},
+ .voltdm = { .name = core },
};
static struct powerdomain core_24xx_pwrdm = {
@@ -71,6 +73,7 @@ static struct powerdomain core_24xx_pwrdm = {
[1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */
[2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */
},
+ .voltdm = { .name = core },
};
@@ -95,6 +98,7 @@ static struct powerdomain mdm_pwrdm = {
.pwrsts_mem_on= {
[0] = PWRSTS_ON, /* MEMONSTATE */
},
+ .voltdm = { .name = core },
};
#endif /* CONFIG_SOC_OMAP2430 */
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 25cfb5c..cacd76e 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -180,6 +180,7 @@ static inline int omap_voltage_late_init(void)
}
#endif
+extern void omap2xxx_voltagedomains_init(void);
extern void omap3xxx_voltagedomains_init(void);
extern void omap44xx_voltagedomains_init(void);
diff --git a/arch/arm/mach-omap2/voltagedomains2xxx_data.c
b/arch/arm/mach-omap2/voltagedomains2xxx_data.c
new file mode 100644
index 000..69ff261
--- /dev/null
+++ b/arch/arm/mach-omap2/voltagedomains2xxx_data.c
@@ -0,0 +1,32 @@
+/*
+ * OMAP3 voltage domain data
+ *
+ * Copyright (C) 2007, 2010 Texas Instruments, Inc.
+
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include linux/kernel.h
+#include linux/init.h
+
+#include voltage.h
+
+static struct voltagedomain omap2_voltdm_core = {
+ .name = core,
+};
+
+static struct voltagedomain omap2_voltdm_wkup = {
+ .name = wakeup,
+};
+
+static struct voltagedomain *voltagedomains_omap2[] __initdata = {
+ omap2_voltdm_core,
+ omap2_voltdm_wkup,
+ NULL,
+};
+
+void __init omap2xxx_voltagedomains_init(void)
+{
+ voltdm_init(voltagedomains_omap2);
+}
--
1.7.6
--
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[PATCH 00/10] OMAP: voltage cleanup part B: VC cleanup
This series focuses on cleanup and better abstraction in the voltage controller (VC) layer. Available in the pm-wip/voltdm_b branch of my linux-omap-pm tree git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Applies on v3.1-rc3 + the part A series (pm-wip/voltdm_a branch) Kevin Kevin Hilman (10): OMAP3+: VC: cleanup i2c slave address configuration OMAP3+: VC: cleanup PMIC register address configuration OMAP3+: VC bypass: use fields from VC struct instead of PMIC info OMAP3+: VC: cleanup voltage setup time configuration OMAP3+: VC: move on/onlp/ret/off command configuration into common init OMAP3+: VC: abstract out channel configuration OMAP3+: voltage domain: move PMIC struct from vdd_info into struct voltagedomain OMAP3+: VC: make I2C config programmable with PMIC-specific settings OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel OMAP3+: VC: use last nominal voltage setting to get current_vsel arch/arm/mach-omap2/omap_twl.c| 32 ++-- arch/arm/mach-omap2/vc.c | 248 ++--- arch/arm/mach-omap2/vc.h | 35 +++- arch/arm/mach-omap2/vc3xxx_data.c | 13 +- arch/arm/mach-omap2/vc44xx_data.c | 18 ++- arch/arm/mach-omap2/voltage.c | 29 ++-- arch/arm/mach-omap2/voltage.h | 29 ++-- arch/arm/mach-omap2/voltagedomains3xxx_data.c |8 +- arch/arm/mach-omap2/voltagedomains44xx_data.c | 12 +- arch/arm/mach-omap2/vp.c | 13 +- 10 files changed, 293 insertions(+), 144 deletions(-) -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/10] OMAP3+: VC: cleanup i2c slave address configuration
- Add an i2c_slave_address field to the omap_vc_channel
- use VC/VP read/modify/write helper instead of open-coding
- remove smps_sa_shift, use __ffs(mask) for shift value
- I2C addresses 10-bit, change size to u16
Special thanks to Shweta Gulati shweta.gul...@ti.com for suggesting
the use of __ffs(x) instead of ffs(x) - 1.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c | 12 +++-
arch/arm/mach-omap2/vc.h |8 +---
arch/arm/mach-omap2/vc3xxx_data.c |2 --
arch/arm/mach-omap2/vc44xx_data.c |3 ---
arch/arm/mach-omap2/voltage.h |2 +-
5 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 9c2706c..ca6165d 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -232,11 +232,13 @@ void __init omap_vc_init_channel(struct voltagedomain
*voltdm)
return;
}
- /* Set up the SMPS_SA(i2c slave address in VC */
- vc_val = voltdm-read(vc-common-smps_sa_reg);
- vc_val = ~vc-smps_sa_mask;
- vc_val |= vdd-pmic_info-i2c_slave_addr vc-smps_sa_shift;
- voltdm-write(vc_val, vc-common-smps_sa_reg);
+ /* get PMIC/board specific settings */
+ vc-i2c_slave_addr = vdd-pmic_info-i2c_slave_addr;
+
+ /* Configure the i2c slave address for this VC */
+ voltdm-rmw(vc-smps_sa_mask,
+ vc-i2c_slave_addr __ffs(vc-smps_sa_mask),
+ vc-common-smps_sa_reg);
/* Setup the VOLRA(pmic reg addr) in VC */
vc_val = voltdm-read(vc-common-smps_volra_reg);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index d0050f0..165fc74 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -57,20 +57,22 @@ struct omap_vc_common {
/**
* struct omap_vc_channel - VC per-instance data
* @common: pointer to VC common data for this platform
- * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register
+ * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
- * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register
* @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register
*
* XXX It is not necessary to have both a *_mask and a *_shift -
* remove one
*/
struct omap_vc_channel {
+ /* channel state */
+ u16 i2c_slave_addr;
+
+ /* register access data */
const struct omap_vc_common *common;
u32 smps_sa_mask;
u32 smps_volra_mask;
u8 cmdval_reg;
- u8 smps_sa_shift;
u8 smps_volra_shift;
};
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c
b/arch/arm/mach-omap2/vc3xxx_data.c
index 6b67203..86be50c 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = {
struct omap_vc_channel omap3_vc_mpu = {
.common = omap3_vc_common,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
.smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA0_MASK,
@@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = {
struct omap_vc_channel omap3_vc_core = {
.common = omap3_vc_common,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
- .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
.smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA1_MASK,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c
b/arch/arm/mach-omap2/vc44xx_data.c
index e3125a3..af922b4 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -49,7 +49,6 @@ static const struct omap_vc_common omap4_vc_common = {
struct omap_vc_channel omap4_vc_mpu = {
.common = omap4_vc_common,
.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
- .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT,
.smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT,
.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
@@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = {
struct omap_vc_channel omap4_vc_iva = {
.common = omap4_vc_common,
.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
- .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT,
.smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT,
.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
@@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = {
struct omap_vc_channel omap4_vc_core = {
.common = omap4_vc_common,
.cmdval_reg =
[PATCH 02/10] OMAP3+: VC: cleanup PMIC register address configuration
- support both voltage register address and command register address
for each VC channel
- add fields for voltage register address (volra) and command register
address (cmdra) to struct omap_vc_channel
- use VC/VP register access read/modify/write helper
- remove volra_shift field (use __ffs(mask) for shift value)
- I2C addresses 10-bit, change size to u16
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c | 17 -
arch/arm/mach-omap2/vc.h |9 -
arch/arm/mach-omap2/vc3xxx_data.c |5 +++--
arch/arm/mach-omap2/vc44xx_data.c |7 ---
arch/arm/mach-omap2/voltage.h |4 ++--
5 files changed, 25 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index ca6165d..50b1f7c 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -234,17 +234,24 @@ void __init omap_vc_init_channel(struct voltagedomain
*voltdm)
/* get PMIC/board specific settings */
vc-i2c_slave_addr = vdd-pmic_info-i2c_slave_addr;
+ vc-volt_reg_addr = vdd-pmic_info-volt_reg_addr;
+ vc-cmd_reg_addr = vdd-pmic_info-cmd_reg_addr;
/* Configure the i2c slave address for this VC */
voltdm-rmw(vc-smps_sa_mask,
vc-i2c_slave_addr __ffs(vc-smps_sa_mask),
vc-common-smps_sa_reg);
- /* Setup the VOLRA(pmic reg addr) in VC */
- vc_val = voltdm-read(vc-common-smps_volra_reg);
- vc_val = ~vc-smps_volra_mask;
- vc_val |= vdd-pmic_info-volt_reg_addr vc-smps_volra_shift;
- voltdm-write(vc_val, vc-common-smps_volra_reg);
+ /*
+* Configure the PMIC register addresses.
+*/
+ voltdm-rmw(vc-smps_volra_mask,
+ vc-volt_reg_addr __ffs(vc-smps_volra_mask),
+ vc-common-smps_volra_reg);
+ if (vc-cmd_reg_addr)
+ voltdm-rmw(vc-smps_cmdra_mask,
+ vc-cmd_reg_addr __ffs(vc-smps_cmdra_mask),
+ vc-common-smps_cmdra_reg);
/* Configure the setup times */
vc_val = voltdm-read(vdd-vfsm-voltsetup_reg);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 165fc74..f3b0551 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -44,6 +44,7 @@ struct omap_vc_common {
u32 valid;
u8 smps_sa_reg;
u8 smps_volra_reg;
+ u8 smps_cmdra_reg;
u8 bypass_val_reg;
u8 data_shift;
u8 slaveaddr_shift;
@@ -59,21 +60,19 @@ struct omap_vc_common {
* @common: pointer to VC common data for this platform
* @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
- * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register
- *
- * XXX It is not necessary to have both a *_mask and a *_shift -
- * remove one
*/
struct omap_vc_channel {
/* channel state */
u16 i2c_slave_addr;
+ u16 volt_reg_addr;
+ u16 cmd_reg_addr;
/* register access data */
const struct omap_vc_common *common;
u32 smps_sa_mask;
u32 smps_volra_mask;
+ u32 smps_cmdra_mask;
u8 cmdval_reg;
- u8 smps_volra_shift;
};
extern struct omap_vc_channel omap3_vc_mpu;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c
b/arch/arm/mach-omap2/vc3xxx_data.c
index 86be50c..df8bd5e 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -32,6 +32,7 @@
static struct omap_vc_common omap3_vc_common = {
.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
+ .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
.data_shift = OMAP3430_DATA_SHIFT,
.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = {
.common = omap3_vc_common,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
- .smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA0_MASK,
+ .smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
};
struct omap_vc_channel omap3_vc_core = {
.common = omap3_vc_common,
.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
- .smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
.smps_volra_mask = OMAP3430_VOLRA1_MASK,
+ .smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
};
diff --git a/arch/arm/mach-omap2/vc44xx_data.c
b/arch/arm/mach-omap2/vc44xx_data.c
index af922b4..5d104ff 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -33,6 +33,7 @@
static const struct omap_vc_common omap4_vc_common = {
.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
[PATCH 00/12] OMAP: voltage cleanup part C: VP cleanup
This series focuses on cleanup and better abstraction in the voltage processor (VP) layer. Available in the pm-wip/voltdm_c branch of my linux-omap-pm tree git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Applies on v3.1-rc3 + the part A B series. Kevin Kevin Hilman (11): OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames OMAP3+: voltage: remove unneeded debugfs interface OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask) OMAP3+: VP: move SoC-specific sys clock rate retreival late init OMAP3+: VP: move timing calculation/config into VP init OMAP3+: VP: create VP helper function for updating error gain OMAP3+: VP: remove omap_vp_runtime_data OMAP3+: VP: move voltage scale function pointer into struct voltagedomain OMAP3+: VP: update_errorgain(): return error if VP OMAP3+: VP: remove unused omap_vp_get_curr_volt() OMAP3+: VP: combine setting init voltage into common function Todd Poynor (1): OMAP: VP: Explicitly mask VPVOLTAGE field arch/arm/mach-omap2/smartreflex.c | 29 ++- arch/arm/mach-omap2/vc.c | 22 +-- arch/arm/mach-omap2/voltage.c | 161 ++ arch/arm/mach-omap2/voltage.h | 24 +-- arch/arm/mach-omap2/voltagedomains3xxx_data.c | 18 +- arch/arm/mach-omap2/voltagedomains44xx_data.c | 23 ++- arch/arm/mach-omap2/vp.c | 292 + arch/arm/mach-omap2/vp.h | 91 +++- arch/arm/mach-omap2/vp3xxx_data.c | 16 +- arch/arm/mach-omap2/vp44xx_data.c | 19 +- 10 files changed, 226 insertions(+), 469 deletions(-) -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 01/12] OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames
- move VP instance struct from vdd_info into struct voltage domain
- remove _data suffix from structure name
- rename vp_ prefix from vp_common field: accesses are now vp-common
- move vp_enabled bool from vdd_info into VP instance
- remove remaining references to omap_vdd_info
No functional changes.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c | 11 +--
arch/arm/mach-omap2/voltage.c |4 +-
arch/arm/mach-omap2/voltage.h |6 +--
arch/arm/mach-omap2/voltagedomains3xxx_data.c | 10 +--
arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 ++---
arch/arm/mach-omap2/vp.c | 88 -
arch/arm/mach-omap2/vp.h | 24 ---
arch/arm/mach-omap2/vp3xxx_data.c | 10 ++--
arch/arm/mach-omap2/vp44xx_data.c | 14 ++--
9 files changed, 83 insertions(+), 99 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 31362cd..d0f87cc 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -98,11 +98,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
struct omap_vc_channel *vc = voltdm-vc;
struct omap_vdd_info *vdd = voltdm-vdd;
struct omap_volt_data *volt_data;
- const struct omap_vp_common_data *vp_common;
u32 vc_cmdval, vp_errgain_val;
- vp_common = vdd-vp_data-vp_common;
-
/* Check if sufficient pmic info is available for this vdd */
if (!voltdm-pmic) {
pr_err(%s: Insufficient pmic info to scale the vdd_%s\n,
@@ -139,12 +136,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
/* Setting vp errorgain based on the voltage */
if (volt_data) {
- vp_errgain_val = voltdm-read(vdd-vp_data-vpconfig);
+ vp_errgain_val = voltdm-read(voltdm-vp-vpconfig);
vdd-vp_rt_data.vpconfig_errorgain = volt_data-vp_errgain;
- vp_errgain_val = ~vp_common-vpconfig_errorgain_mask;
+ vp_errgain_val = voltdm-vp-common-vpconfig_errorgain_mask;
vp_errgain_val |= vdd-vp_rt_data.vpconfig_errorgain
- vp_common-vpconfig_errorgain_shift;
- voltdm-write(vp_errgain_val, vdd-vp_data-vpconfig);
+ voltdm-vp-common-vpconfig_errorgain_shift;
+ voltdm-write(vp_errgain_val, voltdm-vp-vpconfig);
}
return 0;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 94f7fc4..c22b53c 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -81,11 +81,11 @@ static int __init _config_common_vdd_data(struct
voltagedomain *voltdm)
/* Generic voltage parameters */
vdd-volt_scale = omap_vp_forceupdate_scale;
- vdd-vp_enabled = false;
+ voltdm-vp-enabled = false;
vdd-vp_rt_data.vpconfig_erroroffset =
(voltdm-pmic-vp_erroroffset
-vdd-vp_data-vp_common-vpconfig_erroroffset_shift);
+voltdm-vp-common-vpconfig_erroroffset_shift);
timeout_val = (sys_clk_speed * voltdm-pmic-vp_timeout_us) / 1000;
vdd-vp_rt_data.vlimitto_timeout = timeout_val;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index a0ae5c6..65f94c7 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -68,6 +68,7 @@ struct voltagedomain {
struct list_head pwrdm_list;
struct omap_vc_channel *vc;
const struct omap_vfsm_instance *vfsm;
+ struct omap_vp_instance *vp;
struct omap_voltdm_pmic *pmic;
/* VC/VP register access functions: SoC specific */
@@ -134,21 +135,16 @@ struct omap_voltdm_pmic {
*
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
- * @vp_data: the register values, shifts, masks for various
- * vp registers
* @vp_rt_data : VP data derived at runtime, not predefined
* @debug_dir : debug directory for this voltage domain.
* @curr_volt : current voltage for this vdd.
- * @vp_enabled : flag to keep track of whether vp is enabled or not
* @volt_scale : API to scale the voltage of the vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
- struct omap_vp_instance_data *vp_data;
struct omap_vp_runtime_data vp_rt_data;
struct dentry *debug_dir;
u32 curr_volt;
- bool vp_enabled;
int (*volt_scale) (struct voltagedomain *voltdm,
unsigned long target_volt);
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 4ea9a7b..4db2c6c 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++
[PATCH 02/12] OMAP3+: voltage: remove unneeded debugfs interface
Remove read-only debugfs interface to VP values. Most of the values
are init-time only and never change. Current voltage value should be
retreived from the (eventual) regulator framework interface to the
voltage domain.
Fixes to original version provided by Nishanth Menon n...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/smartreflex.c | 29 +-
arch/arm/mach-omap2/voltage.c | 78 -
arch/arm/mach-omap2/voltage.h |3 -
arch/arm/mach-omap2/vp.c | 63 -
4 files changed, 19 insertions(+), 154 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex.c
b/arch/arm/mach-omap2/smartreflex.c
index 34c01a7..bb606c9 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -62,6 +62,7 @@ static LIST_HEAD(sr_list);
static struct omap_sr_class_data *sr_class;
static struct omap_sr_pmic_data *sr_pmic_data;
+static struct dentry *sr_dbg_dir;
static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
{
@@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device
*pdev)
struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL);
struct omap_sr_data *pdata = pdev-dev.platform_data;
struct resource *mem, *irq;
- struct dentry *vdd_dbg_dir, *nvalue_dir;
+ struct dentry *nvalue_dir;
struct omap_volt_data *volt_data;
int i, ret = 0;
+ char *name;
if (!sr_info) {
dev_err(pdev-dev, %s: unable to allocate sr_info\n,
@@ -899,18 +901,25 @@ static int __init omap_sr_probe(struct platform_device
*pdev)
}
dev_info(pdev-dev, %s: SmartReflex driver initialized\n, __func__);
+ if (!sr_dbg_dir) {
+ sr_dbg_dir = debugfs_create_dir(smartreflex, NULL);
+ if (!sr_dbg_dir) {
+ ret = PTR_ERR(sr_dbg_dir);
+ pr_err(%s:sr debugfs dir creation failed(%d)\n,
+ __func__, ret);
+ goto err_iounmap;
+ }
+ }
- /*
-* If the voltage domain debugfs directory is not created, do
-* not try to create rest of the debugfs entries.
-*/
- vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info-voltdm);
- if (!vdd_dbg_dir) {
- ret = -EINVAL;
+ name = kasprintf(GFP_KERNEL, sr_%s, sr_info-voltdm-name);
+ if (!name) {
+ dev_err(pdev-dev, %s: Unable to alloc debugfs name\n,
+ __func__);
+ ret = -ENOMEM;
goto err_iounmap;
}
-
- sr_info-dbg_dir = debugfs_create_dir(smartreflex, vdd_dbg_dir);
+ sr_info-dbg_dir = debugfs_create_dir(name, sr_dbg_dir);
+ kfree(name);
if (IS_ERR(sr_info-dbg_dir)) {
dev_err(pdev-dev, %s: Unable to create debugfs directory\n,
__func__);
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index c22b53c..eaa5f93 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -43,9 +43,6 @@
static LIST_HEAD(voltdm_list);
-#define VOLTAGE_DIR_SIZE 16
-static struct dentry *voltage_dir;
-
static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
{
char *sys_ck_name;
@@ -102,51 +99,6 @@ static int __init _config_common_vdd_data(struct
voltagedomain *voltdm)
return 0;
}
-static int nom_volt_debug_get(void *data, u64 *val)
-{
- struct voltagedomain *voltdm = (struct voltagedomain *)data;
-
- if (!voltdm) {
- pr_warning(Wrong paramater passed\n);
- return -EINVAL;
- }
-
- *val = omap_voltage_get_nom_volt(voltdm);
-
- return 0;
-}
-
-DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
- %llu\n);
-static void __init vdd_debugfs_init(struct voltagedomain *voltdm)
-{
- char *name;
- struct omap_vdd_info *vdd = voltdm-vdd;
-
- name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
- if (!name) {
- pr_warning(%s: Unable to allocate memory for debugfs
-directory name for vdd_%s,
- __func__, voltdm-name);
- return;
- }
- strcpy(name, vdd_);
- strcat(name, voltdm-name);
-
- vdd-debug_dir = debugfs_create_dir(name, voltage_dir);
- kfree(name);
- if (IS_ERR(vdd-debug_dir)) {
- pr_warning(%s: Unable to create debugfs directory for
-vdd_%s\n, __func__, voltdm-name);
- vdd-debug_dir = NULL;
- return;
- }
-
- (void) debugfs_create_file(curr_nominal_volt, S_IRUGO,
- vdd-debug_dir, (void *) voltdm,
-
[PATCH 03/12] OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask)
In struct omap_vp_common, the shift value can be derived from the mask value by using __ffs(), so remove the shift value for the various VPCONFIG bitfields, and use __ffs() in the code for the shift value. While here, rename field names in kerneldoc comment to match actual field names in structure. Also, cleanup indendentaion for other VP register accesses in omap_vp_init(). No functional changes. Signed-off-by: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/vc.c |2 +- arch/arm/mach-omap2/voltage.c |2 +- arch/arm/mach-omap2/vp.c | 29 ++--- arch/arm/mach-omap2/vp.h | 34 ++ arch/arm/mach-omap2/vp3xxx_data.c |4 +--- arch/arm/mach-omap2/vp44xx_data.c |4 +--- 6 files changed, 32 insertions(+), 43 deletions(-) diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index d0f87cc..d615a0d 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -140,7 +140,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, vdd-vp_rt_data.vpconfig_errorgain = volt_data-vp_errgain; vp_errgain_val = voltdm-vp-common-vpconfig_errorgain_mask; vp_errgain_val |= vdd-vp_rt_data.vpconfig_errorgain - voltdm-vp-common-vpconfig_errorgain_shift; + __ffs(voltdm-vp-common-vpconfig_errorgain_mask); voltdm-write(vp_errgain_val, voltdm-vp-vpconfig); } diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index eaa5f93..5b16fd1 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -82,7 +82,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) vdd-vp_rt_data.vpconfig_erroroffset = (voltdm-pmic-vp_erroroffset -voltdm-vp-common-vpconfig_erroroffset_shift); +__ffs(voltdm-vp-common-vpconfig_erroroffset_mask)); timeout_val = (sys_clk_speed * voltdm-pmic-vp_timeout_us) / 1000; vdd-vp_rt_data.vlimitto_timeout = timeout_val; diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c index c9a315f..297d094 100644 --- a/arch/arm/mach-omap2/vp.c +++ b/arch/arm/mach-omap2/vp.c @@ -34,8 +34,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) vpconfig = voltdm-read(vp-vpconfig); vpconfig = ~(vp-common-vpconfig_initvoltage_mask | vp-common-vpconfig_initvdd); - vpconfig |= vsel vp-common-vpconfig_initvoltage_shift; - + vpconfig |= vsel __ffs(vp-common-vpconfig_initvoltage_mask); voltdm-write(vpconfig, vp-vpconfig); /* Trigger initVDD value copy to voltage processor */ @@ -61,28 +60,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) vp_val = vdd-vp_rt_data.vpconfig_erroroffset | (vdd-vp_rt_data.vpconfig_errorgain - vp-common-vpconfig_errorgain_shift) | +__ffs(vp-common-vpconfig_errorgain_mask)) | vp-common-vpconfig_timeouten; voltdm-write(vp_val, vp-vpconfig); vp_val = ((vdd-vp_rt_data.vstepmin_smpswaittimemin - vp-common-vstepmin_smpswaittimemin_shift) | - (vdd-vp_rt_data.vstepmin_stepmin - vp-common-vstepmin_stepmin_shift)); + vp-common-vstepmin_smpswaittimemin_shift) | + (vdd-vp_rt_data.vstepmin_stepmin + vp-common-vstepmin_stepmin_shift)); voltdm-write(vp_val, vp-vstepmin); vp_val = ((vdd-vp_rt_data.vstepmax_smpswaittimemax - vp-common-vstepmax_smpswaittimemax_shift) | - (vdd-vp_rt_data.vstepmax_stepmax - vp-common-vstepmax_stepmax_shift)); + vp-common-vstepmax_smpswaittimemax_shift) | + (vdd-vp_rt_data.vstepmax_stepmax + vp-common-vstepmax_stepmax_shift)); voltdm-write(vp_val, vp-vstepmax); vp_val = ((vdd-vp_rt_data.vlimitto_vddmax - vp-common-vlimitto_vddmax_shift) | - (vdd-vp_rt_data.vlimitto_vddmin - vp-common-vlimitto_vddmin_shift) | - (vdd-vp_rt_data.vlimitto_timeout - vp-common-vlimitto_timeout_shift)); + vp-common-vlimitto_vddmax_shift) | + (vdd-vp_rt_data.vlimitto_vddmin + vp-common-vlimitto_vddmin_shift) | + (vdd-vp_rt_data.vlimitto_timeout + vp-common-vlimitto_timeout_shift)); voltdm-write(vp_val, vp-vlimitto); } @@ -121,7 +120,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, vp-common-vpconfig_forceupdate | vp-common-vpconfig_initvoltage_mask); vpconfig |= ((target_vsel - vp-common-vpconfig_initvoltage_shift)); +
[PATCH 04/12] OMAP3+: VP: move SoC-specific sys clock rate retreival late init
Add sys clock name and rate to struct voltage domain. SoC specific
voltagedomain init code initializes sys clock name. After clock
framework is initialized, voltage late init will then use use the
sys_clk rate to calculate the various timing that depend on that rate.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c | 47 +
arch/arm/mach-omap2/voltage.h |5 +++
arch/arm/mach-omap2/voltagedomains3xxx_data.c |8
arch/arm/mach-omap2/voltagedomains44xx_data.c |8
4 files changed, 38 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 5b16fd1..533ea38 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -21,10 +21,10 @@
#include linux/delay.h
#include linux/io.h
-#include linux/clk.h
#include linux/err.h
#include linux/debugfs.h
#include linux/slab.h
+#include linux/clk.h
#include plat/common.h
@@ -45,36 +45,12 @@ static LIST_HEAD(voltdm_list);
static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
{
- char *sys_ck_name;
- struct clk *sys_ck;
- u32 sys_clk_speed, timeout_val, waittime;
struct omap_vdd_info *vdd = voltdm-vdd;
+ u32 sys_clk_rate, timeout_val, waittime;
- /*
-* XXX Clockfw should handle this, or this should be in a
-* struct record
-*/
- if (cpu_is_omap24xx() || cpu_is_omap34xx())
- sys_ck_name = sys_ck;
- else if (cpu_is_omap44xx())
- sys_ck_name = sys_clkin_ck;
- else
- return -EINVAL;
-
- /*
-* Sys clk rate is require to calculate vp timeout value and
-* smpswaittimemin and smpswaittimemax.
-*/
- sys_ck = clk_get(NULL, sys_ck_name);
- if (IS_ERR(sys_ck)) {
- pr_warning(%s: Could not get the sys clk to calculate
- various vdd_%s params\n, __func__, voltdm-name);
- return -EINVAL;
- }
- sys_clk_speed = clk_get_rate(sys_ck);
- clk_put(sys_ck);
/* Divide to avoid overflow */
- sys_clk_speed /= 1000;
+ sys_clk_rate = voltdm-sys_clk.rate / 1000;
+ WARN_ON(!sys_clk_rate);
/* Generic voltage parameters */
vdd-volt_scale = omap_vp_forceupdate_scale;
@@ -84,13 +60,13 @@ static int __init _config_common_vdd_data(struct
voltagedomain *voltdm)
(voltdm-pmic-vp_erroroffset
__ffs(voltdm-vp-common-vpconfig_erroroffset_mask));
- timeout_val = (sys_clk_speed * voltdm-pmic-vp_timeout_us) / 1000;
+ timeout_val = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
vdd-vp_rt_data.vlimitto_timeout = timeout_val;
vdd-vp_rt_data.vlimitto_vddmin = voltdm-pmic-vp_vddmin;
vdd-vp_rt_data.vlimitto_vddmax = voltdm-pmic-vp_vddmax;
waittime = ((voltdm-pmic-step_size / voltdm-pmic-slew_rate) *
- sys_clk_speed) / 1000;
+ sys_clk_rate) / 1000;
vdd-vp_rt_data.vstepmin_smpswaittimemin = waittime;
vdd-vp_rt_data.vstepmax_smpswaittimemax = waittime;
vdd-vp_rt_data.vstepmin_stepmin = voltdm-pmic-vp_vstepmin;
@@ -346,9 +322,20 @@ int __init omap_voltage_late_init(void)
}
list_for_each_entry(voltdm, voltdm_list, node) {
+ struct clk *sys_ck;
+
if (!voltdm-scalable)
continue;
+ sys_ck = clk_get(NULL, voltdm-sys_clk.name);
+ if (IS_ERR(sys_ck)) {
+ pr_warning(%s: Could not get sys clk.\n, __func__);
+ return -EINVAL;
+ }
+ voltdm-sys_clk.rate = clk_get_rate(sys_ck);
+ WARN_ON(!voltdm-sys_clk.rate);
+ clk_put(sys_ck);
+
if (voltdm-vc) {
voltdm-vdd-volt_scale = omap_vc_bypass_scale;
omap_vc_init_channel(voltdm);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 5261703..d73c956 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -76,6 +76,11 @@ struct voltagedomain {
void (*write) (u32 val, u8 offset);
u32 (*rmw)(u32 mask, u32 bits, u8 offset);
+ union {
+ const char *name;
+ u32 rate;
+ } sys_clk;
+
struct omap_vdd_info *vdd;
};
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 4db2c6c..e7a0be1 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -82,8 +82,13 @@ static struct voltagedomain *voltagedomains_omap3[]
__initdata = {
NULL,
};
+static const char *sys_clk_name __initdata = sys_ck;
+
void __init omap3xxx_voltagedomains_init(void)
{
+ struct
[PATCH 05/12] OMAP3+: VP: move timing calculation/config into VP init
Move VP timing calcluation (based on sys clock) and register programming
into VP init.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c | 22 --
arch/arm/mach-omap2/vp.c | 23 ++-
2 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 533ea38..4a15668 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list);
static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
{
struct omap_vdd_info *vdd = voltdm-vdd;
- u32 sys_clk_rate, timeout_val, waittime;
-
- /* Divide to avoid overflow */
- sys_clk_rate = voltdm-sys_clk.rate / 1000;
- WARN_ON(!sys_clk_rate);
/* Generic voltage parameters */
vdd-volt_scale = omap_vp_forceupdate_scale;
- voltdm-vp-enabled = false;
-
- vdd-vp_rt_data.vpconfig_erroroffset =
- (voltdm-pmic-vp_erroroffset
-__ffs(voltdm-vp-common-vpconfig_erroroffset_mask));
-
- timeout_val = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
- vdd-vp_rt_data.vlimitto_timeout = timeout_val;
- vdd-vp_rt_data.vlimitto_vddmin = voltdm-pmic-vp_vddmin;
- vdd-vp_rt_data.vlimitto_vddmax = voltdm-pmic-vp_vddmax;
-
- waittime = ((voltdm-pmic-step_size / voltdm-pmic-slew_rate) *
- sys_clk_rate) / 1000;
- vdd-vp_rt_data.vstepmin_smpswaittimemin = waittime;
- vdd-vp_rt_data.vstepmax_smpswaittimemax = waittime;
- vdd-vp_rt_data.vstepmin_stepmin = voltdm-pmic-vp_vstepmin;
- vdd-vp_rt_data.vstepmax_stepmax = voltdm-pmic-vp_vstepmax;
return 0;
}
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 297d094..ea61a47 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm-vp;
struct omap_vdd_info *vdd = voltdm-vdd;
- u32 vp_val;
+ u32 vp_val, sys_clk_rate, timeout_val, waittime;
if (!voltdm-read || !voltdm-write) {
pr_err(%s: No read/write API for accessing vdd_%s regs\n,
@@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
return;
}
+ vp-enabled = false;
+
+ /* Divide to avoid overflow */
+ sys_clk_rate = voltdm-sys_clk.rate / 1000;
+
+ vdd-vp_rt_data.vpconfig_erroroffset =
+ (voltdm-pmic-vp_erroroffset
+__ffs(voltdm-vp-common-vpconfig_erroroffset_mask));
+
+ timeout_val = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
+ vdd-vp_rt_data.vlimitto_timeout = timeout_val;
+ vdd-vp_rt_data.vlimitto_vddmin = voltdm-pmic-vp_vddmin;
+ vdd-vp_rt_data.vlimitto_vddmax = voltdm-pmic-vp_vddmax;
+
+ waittime = ((voltdm-pmic-step_size / voltdm-pmic-slew_rate) *
+ sys_clk_rate) / 1000;
+ vdd-vp_rt_data.vstepmin_smpswaittimemin = waittime;
+ vdd-vp_rt_data.vstepmax_smpswaittimemax = waittime;
+ vdd-vp_rt_data.vstepmin_stepmin = voltdm-pmic-vp_vstepmin;
+ vdd-vp_rt_data.vstepmax_stepmax = voltdm-pmic-vp_vstepmax;
+
vp_val = vdd-vp_rt_data.vpconfig_erroroffset |
(vdd-vp_rt_data.vpconfig_errorgain
__ffs(vp-common-vpconfig_errorgain_mask)) |
--
1.7.6
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[PATCH 06/12] OMAP3+: VP: create VP helper function for updating error gain
Create new helper function in VP layer for updating VP error gain.
Currently used during pre-scale for VP force update and VC bypass.
TODO: determine if this can be removed from the pre-scale path and
moved to VP enable path.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c | 19 ++-
arch/arm/mach-omap2/vp.c | 19 +++
arch/arm/mach-omap2/vp.h |2 ++
3 files changed, 23 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index d615a0d..38ba13b 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -96,9 +96,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
u8 *target_vsel, u8 *current_vsel)
{
struct omap_vc_channel *vc = voltdm-vc;
- struct omap_vdd_info *vdd = voltdm-vdd;
- struct omap_volt_data *volt_data;
- u32 vc_cmdval, vp_errgain_val;
+ u32 vc_cmdval;
/* Check if sufficient pmic info is available for this vdd */
if (!voltdm-pmic) {
@@ -120,11 +118,6 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
return -EINVAL;
}
- /* Get volt_data corresponding to target_volt */
- volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
- if (IS_ERR(volt_data))
- volt_data = NULL;
-
*target_vsel = voltdm-pmic-uv_to_vsel(target_volt);
*current_vsel = voltdm-pmic-uv_to_vsel(vdd-curr_volt);
@@ -134,15 +127,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
vc_cmdval |= (*target_vsel vc-common-cmd_on_shift);
voltdm-write(vc_cmdval, vc-cmdval_reg);
- /* Setting vp errorgain based on the voltage */
- if (volt_data) {
- vp_errgain_val = voltdm-read(voltdm-vp-vpconfig);
- vdd-vp_rt_data.vpconfig_errorgain = volt_data-vp_errgain;
- vp_errgain_val = voltdm-vp-common-vpconfig_errorgain_mask;
- vp_errgain_val |= vdd-vp_rt_data.vpconfig_errorgain
- __ffs(voltdm-vp-common-vpconfig_errorgain_mask);
- voltdm-write(vp_errgain_val, voltdm-vp-vpconfig);
- }
+ omap_vp_update_errorgain(voltdm, target_volt);
return 0;
}
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index ea61a47..f68a6db 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -106,6 +106,25 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
voltdm-write(vp_val, vp-vlimitto);
}
+int omap_vp_update_errorgain(struct voltagedomain *voltdm,
+unsigned long target_volt)
+{
+ struct omap_volt_data *volt_data;
+
+ /* Get volt_data corresponding to target_volt */
+ volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
+ if (IS_ERR(volt_data))
+ return -EINVAL;
+
+ /* Setting vp errorgain based on the voltage */
+ voltdm-rmw(voltdm-vp-common-vpconfig_errorgain_mask,
+ volt_data-vp_errgain
+ __ffs(voltdm-vp-common-vpconfig_errorgain_mask),
+ voltdm-vp-vpconfig);
+
+ return 0;
+}
+
/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt)
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 2afe11d..71ac738 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -148,5 +148,7 @@ void omap_vp_disable(struct voltagedomain *voltdm);
unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt);
+int omap_vp_update_errorgain(struct voltagedomain *voltdm,
+unsigned long target_volt);
#endif
--
1.7.6
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[PATCH 07/12] OMAP3+: VP: remove omap_vp_runtime_data
Remove the runtime VP data in favor of direct programming of VP registers.
The VP is in the PRM, which is in the wakeup powerdomain, so there is no
need to keep the state dynamically.
Fixes to original version from Nishanth Menon n...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.h |2 -
arch/arm/mach-omap2/vp.c | 70 ++---
arch/arm/mach-omap2/vp.h | 28
3 files changed, 31 insertions(+), 69 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index d73c956..5235eec 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -140,13 +140,11 @@ struct omap_voltdm_pmic {
*
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
- * @vp_rt_data : VP data derived at runtime, not predefined
* @curr_volt : current voltage for this vdd.
* @volt_scale : API to scale the voltage of the vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
- struct omap_vp_runtime_data vp_rt_data;
u32 curr_volt;
int (*volt_scale) (struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f68a6db..e7d38f6 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
void __init omap_vp_init(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp = voltdm-vp;
- struct omap_vdd_info *vdd = voltdm-vdd;
- u32 vp_val, sys_clk_rate, timeout_val, waittime;
+ u32 val, sys_clk_rate, timeout, waittime;
+ u32 vddmin, vddmax, vstepmin, vstepmax;
if (!voltdm-read || !voltdm-write) {
pr_err(%s: No read/write API for accessing vdd_%s regs\n,
@@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
/* Divide to avoid overflow */
sys_clk_rate = voltdm-sys_clk.rate / 1000;
- vdd-vp_rt_data.vpconfig_erroroffset =
- (voltdm-pmic-vp_erroroffset
-__ffs(voltdm-vp-common-vpconfig_erroroffset_mask));
-
- timeout_val = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
- vdd-vp_rt_data.vlimitto_timeout = timeout_val;
- vdd-vp_rt_data.vlimitto_vddmin = voltdm-pmic-vp_vddmin;
- vdd-vp_rt_data.vlimitto_vddmax = voltdm-pmic-vp_vddmax;
+ timeout = (sys_clk_rate * voltdm-pmic-vp_timeout_us) / 1000;
+ vddmin = voltdm-pmic-vp_vddmin;
+ vddmax = voltdm-pmic-vp_vddmax;
waittime = ((voltdm-pmic-step_size / voltdm-pmic-slew_rate) *
sys_clk_rate) / 1000;
- vdd-vp_rt_data.vstepmin_smpswaittimemin = waittime;
- vdd-vp_rt_data.vstepmax_smpswaittimemax = waittime;
- vdd-vp_rt_data.vstepmin_stepmin = voltdm-pmic-vp_vstepmin;
- vdd-vp_rt_data.vstepmax_stepmax = voltdm-pmic-vp_vstepmax;
-
- vp_val = vdd-vp_rt_data.vpconfig_erroroffset |
- (vdd-vp_rt_data.vpconfig_errorgain
-__ffs(vp-common-vpconfig_errorgain_mask)) |
+ vstepmin = voltdm-pmic-vp_vstepmin;
+ vstepmax = voltdm-pmic-vp_vstepmax;
+
+ /*
+* VP_CONFIG: error gain is not set here, it will be updated
+* on each scale, based on OPP.
+*/
+ val = (voltdm-pmic-vp_erroroffset
+ __ffs(voltdm-vp-common-vpconfig_erroroffset_mask)) |
vp-common-vpconfig_timeouten;
- voltdm-write(vp_val, vp-vpconfig);
-
- vp_val = ((vdd-vp_rt_data.vstepmin_smpswaittimemin
- vp-common-vstepmin_smpswaittimemin_shift) |
- (vdd-vp_rt_data.vstepmin_stepmin
- vp-common-vstepmin_stepmin_shift));
- voltdm-write(vp_val, vp-vstepmin);
-
- vp_val = ((vdd-vp_rt_data.vstepmax_smpswaittimemax
- vp-common-vstepmax_smpswaittimemax_shift) |
- (vdd-vp_rt_data.vstepmax_stepmax
- vp-common-vstepmax_stepmax_shift));
- voltdm-write(vp_val, vp-vstepmax);
-
- vp_val = ((vdd-vp_rt_data.vlimitto_vddmax
- vp-common-vlimitto_vddmax_shift) |
- (vdd-vp_rt_data.vlimitto_vddmin
- vp-common-vlimitto_vddmin_shift) |
- (vdd-vp_rt_data.vlimitto_timeout
- vp-common-vlimitto_timeout_shift));
- voltdm-write(vp_val, vp-vlimitto);
+ voltdm-write(val, vp-vpconfig);
+
+ /* VSTEPMIN */
+ val = (waittime vp-common-vstepmin_smpswaittimemin_shift) |
+ (vstepmin vp-common-vstepmin_stepmin_shift);
+ voltdm-write(val, vp-vstepmin);
+
+ /* VSTEPMAX */
+ val = (vstepmax vp-common-vstepmax_stepmax_shift) |
+ (waittime vp-common-vstepmax_smpswaittimemax_shift);
+ voltdm-write(val, vp-vstepmax);
[PATCH 09/12] OMAP: VP: Explicitly mask VPVOLTAGE field
From: Todd Poynor toddpoy...@google.com
Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently
relies on a u32 - u8 conversion to mask off the FORCEUPDATEWAIT field
in the upper bits. Make this explicit using the mask symbol
already defined, added as a new field in struct omap_vp_common.
Signed-off-by: Todd Poynor toddpoy...@google.com
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vp.c |3 ++-
arch/arm/mach-omap2/vp.h |2 ++
arch/arm/mach-omap2/vp3xxx_data.c |2 ++
arch/arm/mach-omap2/vp44xx_data.c |1 +
4 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index e7d38f6..3807620 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -227,7 +227,8 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain
*voltdm)
return 0;
}
- curr_vsel = voltdm-read(vp-voltage);
+ curr_vsel = (voltdm-read(vp-voltage) vp-common-vpvoltage_mask)
+__ffs(vp-common-vpvoltage_mask);
if (!voltdm-pmic || !voltdm-pmic-vsel_to_uv) {
pr_warning(%s: PMIC function to convert vsel to voltage
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 0d63267..f78752b 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -63,6 +63,7 @@ struct omap_vp_ops {
* @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
* @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
* @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
+ * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
*/
struct omap_vp_common {
u32 vpconfig_erroroffset_mask;
@@ -79,6 +80,7 @@ struct omap_vp_common {
u8 vlimitto_vddmin_shift;
u8 vlimitto_vddmax_shift;
u8 vlimitto_timeout_shift;
+ u8 vpvoltage_mask;
const struct omap_vp_ops *ops;
};
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c
b/arch/arm/mach-omap2/vp3xxx_data.c
index d429c44..260c554 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -51,6 +51,8 @@ static const struct omap_vp_common omap3_vp_common = {
.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT,
.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT,
.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT,
+ .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK,
+
.ops = omap3_vp_ops,
};
diff --git a/arch/arm/mach-omap2/vp44xx_data.c
b/arch/arm/mach-omap2/vp44xx_data.c
index 0daf2a4..b4e7704 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -51,6 +51,7 @@ static const struct omap_vp_common omap4_vp_common = {
.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT,
.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT,
.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT,
+ .vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK,
.ops = omap4_vp_ops,
};
--
1.7.6
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[PATCH 08/12] OMAP3+: VP: move voltage scale function pointer into struct voltagedomain
Function pointer used for actual voltage scaling (e.g. VP force update
or VC bypass) is moved from omap_vdd_info into struct voltagedomain,
resulting in renames s/vdd-volt_scale/voltdm-scale/
No functional changes.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c | 24 +++-
arch/arm/mach-omap2/voltage.h |8
2 files changed, 11 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4a15668..32f0873 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -45,10 +45,8 @@ static LIST_HEAD(voltdm_list);
static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
{
- struct omap_vdd_info *vdd = voltdm-vdd;
-
/* Generic voltage parameters */
- vdd-volt_scale = omap_vp_forceupdate_scale;
+ voltdm-scale = omap_vp_forceupdate_scale;
return 0;
}
@@ -107,22 +105,18 @@ unsigned long omap_voltage_get_nom_volt(struct
voltagedomain *voltdm)
int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
unsigned long target_volt)
{
- struct omap_vdd_info *vdd;
-
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
return -EINVAL;
}
- vdd = voltdm-vdd;
-
- if (!vdd-volt_scale) {
+ if (!voltdm-scale) {
pr_err(%s: No voltage scale API registered for vdd_%s\n,
__func__, voltdm-name);
return -ENODATA;
}
- return vdd-volt_scale(voltdm, target_volt);
+ return voltdm-scale(voltdm, target_volt);
}
/**
@@ -258,23 +252,19 @@ int omap_voltage_register_pmic(struct voltagedomain
*voltdm,
* defined in voltage.h
*/
void omap_change_voltscale_method(struct voltagedomain *voltdm,
- int voltscale_method)
+ int voltscale_method)
{
- struct omap_vdd_info *vdd;
-
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
return;
}
- vdd = voltdm-vdd;
-
switch (voltscale_method) {
case VOLTSCALE_VPFORCEUPDATE:
- vdd-volt_scale = omap_vp_forceupdate_scale;
+ voltdm-scale = omap_vp_forceupdate_scale;
return;
case VOLTSCALE_VCBYPASS:
- vdd-volt_scale = omap_vc_bypass_scale;
+ voltdm-scale = omap_vc_bypass_scale;
return;
default:
pr_warning(%s: Trying to change the method of voltage scaling
@@ -315,7 +305,7 @@ int __init omap_voltage_late_init(void)
clk_put(sys_ck);
if (voltdm-vc) {
- voltdm-vdd-volt_scale = omap_vc_bypass_scale;
+ voltdm-scale = omap_vc_bypass_scale;
omap_vc_init_channel(voltdm);
}
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 5235eec..d2a0c24 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -60,6 +60,7 @@ struct omap_vfsm_instance {
* @pwrdm_node: list_head linking all powerdomains in this voltagedomain
* @vdd: to be removed
* @pwrdms: powerdomains in this voltagedomain
+ * @scale: function used to scale the voltage of the voltagedomain
*/
struct voltagedomain {
char *name;
@@ -81,6 +82,9 @@ struct voltagedomain {
u32 rate;
} sys_clk;
+ int (*scale) (struct voltagedomain *voltdm,
+ unsigned long target_volt);
+
struct omap_vdd_info *vdd;
};
@@ -141,14 +145,10 @@ struct omap_voltdm_pmic {
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
* @curr_volt : current voltage for this vdd.
- * @volt_scale : API to scale the voltage of the vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
u32 curr_volt;
-
- int (*volt_scale) (struct voltagedomain *voltdm,
- unsigned long target_volt);
};
int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
--
1.7.6
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[PATCH 10/12] OMAP3+: VP: update_errorgain(): return error if VP
Add check for valid VP in omap_vp_update_errorgain()
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vp.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 3807620..29698ac 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -103,6 +103,9 @@ int omap_vp_update_errorgain(struct voltagedomain *voltdm,
{
struct omap_volt_data *volt_data;
+ if (!voltdm-vp)
+ return -EINVAL;
+
/* Get volt_data corresponding to target_volt */
volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
if (IS_ERR(volt_data))
--
1.7.6
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[PATCH 12/12] OMAP3+: VP: combine setting init voltage into common function
combine VPCONFIG init voltage setup into common function and use from
both vp_enable and from vp_forceupdate_scale().
NOTE: this patch changes the sequence of when the initVDD bit is
cleared. The bit is now cleared immediately after it was written.
Since only the rising edge of this bit has any affect according to the
TRM, the exact timing of clearing of this bit should not have any
effect.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vp.c | 58 +++---
1 files changed, 19 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 24020ea..66bd700 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -9,31 +9,18 @@
#include prm-regbits-44xx.h
#include prm44xx.h
-static void vp_latch_vsel(struct voltagedomain *voltdm)
+static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
struct omap_vp_instance *vp = voltdm-vp;
u32 vpconfig;
- unsigned long uvdc;
char vsel;
- uvdc = omap_voltage_get_nom_volt(voltdm);
- if (!uvdc) {
- pr_warning(%s: unable to find current voltage for vdd_%s\n,
- __func__, voltdm-name);
- return;
- }
-
- if (!voltdm-pmic || !voltdm-pmic-uv_to_vsel) {
- pr_warning(%s: PMIC function to convert voltage in uV to
-vsel not registered\n, __func__);
- return;
- }
-
- vsel = voltdm-pmic-uv_to_vsel(uvdc);
+ vsel = voltdm-pmic-uv_to_vsel(volt);
vpconfig = voltdm-read(vp-vpconfig);
vpconfig = ~(vp-common-vpconfig_initvoltage_mask |
- vp-common-vpconfig_initvdd);
+ vp-common-vpconfig_forceupdate |
+ vp-common-vpconfig_initvdd);
vpconfig |= vsel __ffs(vp-common-vpconfig_initvoltage_mask);
voltdm-write(vpconfig, vp-vpconfig);
@@ -43,6 +30,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
/* Clear initVDD copy trigger bit */
voltdm-write(vpconfig, vp-vpconfig);
+
+ return vpconfig;
}
/* Generic voltage init functions */
@@ -149,22 +138,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain
*voltdm,
return -ETIMEDOUT;
}
- /* Configure for VP-Force Update */
- vpconfig = voltdm-read(vp-vpconfig);
- vpconfig = ~(vp-common-vpconfig_initvdd |
- vp-common-vpconfig_forceupdate |
- vp-common-vpconfig_initvoltage_mask);
- vpconfig |= ((target_vsel
- __ffs(vp-common-vpconfig_initvoltage_mask)));
- voltdm-write(vpconfig, vp-vpconfig);
-
- /* Trigger initVDD value copy to voltage processor */
- vpconfig |= vp-common-vpconfig_initvdd;
- voltdm-write(vpconfig, vp-vpconfig);
+ vpconfig = _vp_set_init_voltage(voltdm, target_volt);
/* Force update of voltage */
- vpconfig |= vp-common-vpconfig_forceupdate;
- voltdm-write(vpconfig, vp-vpconfig);
+ voltdm-write(vpconfig | vp-common-vpconfig_forceupdate,
+ voltdm-vp-vpconfig);
/*
* Wait for TransactionDone. Typical latency is 200us.
@@ -197,12 +175,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
to clear the TRANXDONE status\n,
__func__, voltdm-name);
- vpconfig = voltdm-read(vp-vpconfig);
- /* Clear initVDD copy trigger bit */
- vpconfig = ~vp-common-vpconfig_initvdd;
- voltdm-write(vpconfig, vp-vpconfig);
/* Clear force bit */
- vpconfig = ~vp-common-vpconfig_forceupdate;
voltdm-write(vpconfig, vp-vpconfig);
return 0;
@@ -218,7 +191,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
void omap_vp_enable(struct voltagedomain *voltdm)
{
struct omap_vp_instance *vp;
- u32 vpconfig;
+ u32 vpconfig, volt;
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
@@ -236,12 +209,19 @@ void omap_vp_enable(struct voltagedomain *voltdm)
if (vp-enabled)
return;
- vp_latch_vsel(voltdm);
+ volt = voltdm_get_voltage(voltdm);
+ if (!volt) {
+ pr_warning(%s: unable to find current voltage for %s\n,
+ __func__, voltdm-name);
+ return;
+ }
+
+ vpconfig = _vp_set_init_voltage(voltdm, volt);
/* Enable VP */
- vpconfig = voltdm-read(vp-vpconfig);
vpconfig |= vp-common-vpconfig_vpenable;
voltdm-write(vpconfig, vp-vpconfig);
+
vp-enabled = true;
}
--
1.7.6
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[PATCH 11/12] OMAP3+: VP: remove unused omap_vp_get_curr_volt()
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vp.c | 34 --
arch/arm/mach-omap2/vp.h |1 -
2 files changed, 0 insertions(+), 35 deletions(-)
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 29698ac..24020ea 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -209,40 +209,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
}
/**
- * omap_vp_get_curr_volt() - API to get the current vp voltage.
- * @voltdm:pointer to the VDD.
- *
- * This API returns the current voltage for the specified voltage processor
- */
-unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
-{
- struct omap_vp_instance *vp = voltdm-vp;
- u8 curr_vsel;
-
- if (!voltdm || IS_ERR(voltdm)) {
- pr_warning(%s: VDD specified does not exist!\n, __func__);
- return 0;
- }
-
- if (!voltdm-read) {
- pr_err(%s: No read API for reading vdd_%s regs\n,
- __func__, voltdm-name);
- return 0;
- }
-
- curr_vsel = (voltdm-read(vp-voltage) vp-common-vpvoltage_mask)
-__ffs(vp-common-vpvoltage_mask);
-
- if (!voltdm-pmic || !voltdm-pmic-vsel_to_uv) {
- pr_warning(%s: PMIC function to convert vsel to voltage
- in uV not registerd\n, __func__);
- return 0;
- }
-
- return voltdm-pmic-vsel_to_uv(curr_vsel);
-}
-
-/**
* omap_vp_enable() - API to enable a particular VP
* @voltdm:pointer to the VDD whose VP is to be enabled.
*
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index f78752b..d9bc4f1 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -119,7 +119,6 @@ extern struct omap_vp_instance omap4_vp_core;
void omap_vp_init(struct voltagedomain *voltdm);
void omap_vp_enable(struct voltagedomain *voltdm);
void omap_vp_disable(struct voltagedomain *voltdm);
-unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm);
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
unsigned long target_volt);
int omap_vp_update_errorgain(struct voltagedomain *voltdm,
--
1.7.6
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[PATCH 3/7] OMAP3+: voltdm: final removal of omap_vdd_info
Remove last remaining member (volt_data) from omap_vdd_info into
struct voltagedomain and removal remaining usage and reference to
omap_vdd_info.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/voltage.c | 54
arch/arm/mach-omap2/voltage.h | 16 +--
arch/arm/mach-omap2/voltagedomains3xxx_data.c | 14 ++-
arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 +-
4 files changed, 18 insertions(+), 81 deletions(-)
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 1b39e68..2ba276f 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -43,34 +43,6 @@
static LIST_HEAD(voltdm_list);
-static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
-{
- /* Generic voltage parameters */
- voltdm-scale = omap_vp_forceupdate_scale;
-
- return 0;
-}
-
-static int __init omap_vdd_data_configure(struct voltagedomain *voltdm)
-{
- int ret = -EINVAL;
-
- if (!voltdm-pmic) {
- pr_err(%s: PMIC info requried to configure vdd_%s not
- populated.Hence cannot initialize vdd_%s\n,
- __func__, voltdm-name, voltdm-name);
- goto ovdc_out;
- }
-
- if (IS_ERR_VALUE(_config_common_vdd_data(voltdm)))
- goto ovdc_out;
-
- ret = 0;
-
-ovdc_out:
- return ret;
-}
-
/* Public functions */
/**
* omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
@@ -155,18 +127,14 @@ void voltdm_reset(struct voltagedomain *voltdm)
*
*/
void omap_voltage_get_volttable(struct voltagedomain *voltdm,
- struct omap_volt_data **volt_data)
+ struct omap_volt_data **volt_data)
{
- struct omap_vdd_info *vdd;
-
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
return;
}
- vdd = voltdm-vdd;
-
- *volt_data = vdd-volt_data;
+ *volt_data = voltdm-volt_data;
}
/**
@@ -185,9 +153,8 @@ void omap_voltage_get_volttable(struct voltagedomain
*voltdm,
* domain or if there is no matching entry.
*/
struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
- unsigned long volt)
+unsigned long volt)
{
- struct omap_vdd_info *vdd;
int i;
if (!voltdm || IS_ERR(voltdm)) {
@@ -195,17 +162,15 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct
voltagedomain *voltdm,
return ERR_PTR(-EINVAL);
}
- vdd = voltdm-vdd;
-
- if (!vdd-volt_data) {
+ if (!voltdm-volt_data) {
pr_warning(%s: voltage table does not exist for vdd_%s\n,
__func__, voltdm-name);
return ERR_PTR(-ENODATA);
}
- for (i = 0; vdd-volt_data[i].volt_nominal != 0; i++) {
- if (vdd-volt_data[i].volt_nominal == volt)
- return vdd-volt_data[i];
+ for (i = 0; voltdm-volt_data[i].volt_nominal != 0; i++) {
+ if (voltdm-volt_data[i].volt_nominal == volt)
+ return voltdm-volt_data[i];
}
pr_notice(%s: Unable to match the current voltage with the voltage
@@ -304,9 +269,8 @@ int __init omap_voltage_late_init(void)
omap_vc_init_channel(voltdm);
}
- if (voltdm-vdd) {
- if (omap_vdd_data_configure(voltdm))
- continue;
+ if (voltdm-vp) {
+ voltdm-scale = omap_vp_forceupdate_scale;
omap_vp_init(voltdm);
}
}
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 3e32eda..68b1ed5 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -33,8 +33,6 @@ struct powerdomain;
#define OMAP3_VOLTOFFSET 0xff
#define OMAP3_VOLTSETUP2 0xff
-struct omap_vdd_info;
-
/**
* struct omap_vfsm_instance - per-voltage manager FSM register/bitfield
* data
@@ -85,9 +83,9 @@ struct voltagedomain {
int (*scale) (struct voltagedomain *voltdm,
unsigned long target_volt);
- u32 nominal_volt;
- struct omap_vdd_info *vdd;
+ u32 nominal_volt;
+ struct omap_volt_data *volt_data;
};
/**
@@ -141,16 +139,6 @@ struct omap_voltdm_pmic {
u8 (*uv_to_vsel) (unsigned long uV);
};
-/**
- * omap_vdd_info - Per Voltage Domain info
- *
- * @volt_data : voltage table having the distinct voltages supported
- * by the domain and other associated per voltage data.
- */
-struct omap_vdd_info {
- struct omap_volt_data *volt_data;
-};
-
void omap_voltage_get_volttable(struct voltagedomain *voltdm,
[PATCH 5/7] OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale
Currently, the nominal voltage is updated in the VC post-scale function which is common to both scaling methods. However, this has readabiliy problems as this update is not where it might be expected. Instead, move the updated into voltdm_scale() upon a successful return of voltdm-scale() Signed-off-by: Kevin Hilman khil...@ti.com --- arch/arm/mach-omap2/vc.c |2 -- arch/arm/mach-omap2/voltage.c |6 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 130df29..1c2bb9c 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -143,8 +143,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, smps_delay = ((smps_steps * voltdm-pmic-step_size) / voltdm-pmic-slew_rate) + 2; udelay(smps_delay); - - voltdm-nominal_volt = target_volt; } /* vc_bypass_scale - VC bypass method of voltage scaling */ diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 441c2d9..64070ac 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -85,7 +85,11 @@ int voltdm_scale(struct voltagedomain *voltdm, return -ENODATA; } - return voltdm-scale(voltdm, target_volt); + ret = voltdm-scale(voltdm, target_volt); + if (!ret) + voltdm-nominal_volt = target_volt; + + return ret; } /** -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/7] OMAP3+: voltage: rename omap_voltage_get_nom_volt - voltdm_get_voltage
Use preferred voltdm_ naming for getting current nominal voltage.
No functional changes.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/smartreflex-class3.c |2 +-
arch/arm/mach-omap2/voltage.c| 14 --
arch/arm/mach-omap2/voltage.h|2 +-
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c
b/arch/arm/mach-omap2/smartreflex-class3.c
index 4eac1bc..53d9d0a 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -15,7 +15,7 @@
static int sr_class3_enable(struct voltagedomain *voltdm)
{
- unsigned long volt = omap_voltage_get_nom_volt(voltdm);
+ unsigned long volt = voltdm_get_voltage(voltdm);
if (!volt) {
pr_warning(%s: Curr voltage unknown. Cannot enable sr_%s\n,
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 2ba276f..441c2d9 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -45,13 +45,13 @@ static LIST_HEAD(voltdm_list);
/* Public functions */
/**
- * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
- * @voltdm:pointer to the VDD for which current voltage info is needed
+ * voltdm_get_voltage() - Gets the current non-auto-compensated voltage
+ * @voltdm:pointer to the voltdm for which current voltage info is needed
*
- * API to get the current non-auto-compensated voltage for a VDD.
- * Returns 0 in case of error else returns the current voltage for the VDD.
+ * API to get the current non-auto-compensated voltage for a voltage domain.
+ * Returns 0 in case of error else returns the current voltage.
*/
-unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm)
{
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
@@ -72,6 +72,8 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain
*voltdm)
int voltdm_scale(struct voltagedomain *voltdm,
unsigned long target_volt)
{
+ int ret;
+
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
return -EINVAL;
@@ -104,7 +106,7 @@ void voltdm_reset(struct voltagedomain *voltdm)
return;
}
- target_volt = omap_voltage_get_nom_volt(voltdm);
+ target_volt = voltdm_get_voltage(voltdm);
if (!target_volt) {
pr_err(%s: unable to find current voltage for vdd_%s\n,
__func__, voltdm-name);
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 68b1ed5..b4c6259 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -143,7 +143,6 @@ void omap_voltage_get_volttable(struct voltagedomain
*voltdm,
struct omap_volt_data **volt_data);
struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
unsigned long volt);
-unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm);
#ifdef CONFIG_PM
int omap_voltage_register_pmic(struct voltagedomain *voltdm,
struct omap_voltdm_pmic *pmic);
@@ -178,4 +177,5 @@ int voltdm_for_each_pwrdm(struct voltagedomain *voltdm,
struct powerdomain *pwrdm));
int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
void voltdm_reset(struct voltagedomain *voltdm);
+unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
#endif
--
1.7.6
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[PATCH 6/7] OMAP2+: VC: more registers are per-channel starting with OMAP5
Starting with OMAP5, the following registers are per-channel and not
common to a all VC channels:
- SMPS I2C slave address
- SMPS voltage register address offset
- SMPS cmd/value register address offset
- VC channel configuration register
Move these from the channel-common struct into the per-channel struct
to support OMAP5.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c |8
arch/arm/mach-omap2/vc.h | 14 +++---
arch/arm/mach-omap2/vc3xxx_data.c | 12
arch/arm/mach-omap2/vc44xx_data.c | 16
4 files changed, 31 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 1c2bb9c..b87bdb8 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -85,7 +85,7 @@ static int omap_vc_config_channel(struct voltagedomain
*voltdm)
voltdm-rmw(CFG_CHANNEL_MASK vc-cfg_channel_sa_shift,
vc-cfg_channel vc-cfg_channel_sa_shift,
- vc-common-cfg_channel_reg);
+ vc-cfg_channel_reg);
return 0;
}
@@ -310,7 +310,7 @@ void __init omap_vc_init_channel(struct voltagedomain
*voltdm)
/* Configure the i2c slave address for this VC */
voltdm-rmw(vc-smps_sa_mask,
vc-i2c_slave_addr __ffs(vc-smps_sa_mask),
- vc-common-smps_sa_reg);
+ vc-smps_sa_reg);
vc-cfg_channel |= vc_cfg_bits-sa;
/*
@@ -318,13 +318,13 @@ void __init omap_vc_init_channel(struct voltagedomain
*voltdm)
*/
voltdm-rmw(vc-smps_volra_mask,
vc-volt_reg_addr __ffs(vc-smps_volra_mask),
- vc-common-smps_volra_reg);
+ vc-smps_volra_reg);
vc-cfg_channel |= vc_cfg_bits-rav;
if (vc-cmd_reg_addr) {
voltdm-rmw(vc-smps_cmdra_mask,
vc-cmd_reg_addr __ffs(vc-smps_cmdra_mask),
- vc-common-smps_cmdra_reg);
+ vc-smps_cmdra_reg);
vc-cfg_channel |= vc_cfg_bits-rac | vc_cfg_bits-racen;
}
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index ec50643..ffa5084 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -25,9 +25,6 @@ struct voltagedomain;
* struct omap_vc_common - per-VC register/bitfield data
* @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
* @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
- * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
- * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
- * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
* @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
* @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
* @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
@@ -45,9 +42,6 @@ struct voltagedomain;
struct omap_vc_common {
u32 cmd_on_mask;
u32 valid;
- u8 smps_sa_reg;
- u8 smps_volra_reg;
- u8 smps_cmdra_reg;
u8 bypass_val_reg;
u8 data_shift;
u8 slaveaddr_shift;
@@ -56,7 +50,6 @@ struct omap_vc_common {
u8 cmd_onlp_shift;
u8 cmd_ret_shift;
u8 cmd_off_shift;
- u8 cfg_channel_reg;
u8 i2c_cfg_reg;
u8 i2c_cfg_hsen_mask;
u8 i2c_mcode_mask;
@@ -72,6 +65,9 @@ struct omap_vc_common {
* @common: pointer to VC common data for this platform
* @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
* @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
+ * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
+ * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
+ * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
*/
struct omap_vc_channel {
u8 flags;
@@ -90,6 +86,10 @@ struct omap_vc_channel {
u32 smps_volra_mask;
u32 smps_cmdra_mask;
u8 cmdval_reg;
+ u8 smps_sa_reg;
+ u8 smps_volra_reg;
+ u8 smps_cmdra_reg;
+ u8 cfg_channel_reg;
u8 cfg_channel_sa_shift;
};
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c
b/arch/arm/mach-omap2/vc3xxx_data.c
index 95d7701..cfe348e 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,9 +30,6 @@
* XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
*/
static struct omap_vc_common omap3_vc_common = {
- .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET,
- .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
- .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
.data_shift = OMAP3430_DATA_SHIFT,
.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -43,7 +40,6 @@ static struct omap_vc_common omap3_vc_common = {
.cmd_onlp_shift =
[PATCH 7/7] omap: voltage: add a stub header file for external/regulator use
From: Tero Kristo t-kri...@ti.com Needed as some of the voltage layer functionality is accessed from the SMPS regulator driver. Signed-off-by: Tero Kristo t-kri...@ti.com Signed-off-by: Kevin Hilman khil...@ti.com --- arch/arm/plat-omap/include/plat/voltage.h | 20 1 files changed, 20 insertions(+), 0 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/voltage.h diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h new file mode 100644 index 000..0a6a482 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/voltage.h @@ -0,0 +1,20 @@ +/* + * OMAP Voltage Management Routines + * + * Copyright (C) 2011, Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_VOLTAGE_H +#define __ARCH_ARM_OMAP_VOLTAGE_H + +struct voltagedomain; + +struct voltagedomain *voltdm_lookup(const char *name); +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); + +#endif -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/7] OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain
Track current nominal voltage as part of struct voltagedomain instead
of omap_vdd_info, which will soon be removed.
Also renames field from curr_volt to nominal_volt.
No functional changes.
Signed-off-by: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/vc.c |5 ++---
arch/arm/mach-omap2/voltage.c |6 +-
arch/arm/mach-omap2/voltage.h |4 ++--
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 38ba13b..130df29 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -119,7 +119,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
}
*target_vsel = voltdm-pmic-uv_to_vsel(target_volt);
- *current_vsel = voltdm-pmic-uv_to_vsel(vdd-curr_volt);
+ *current_vsel = voltdm-pmic-uv_to_vsel(voltdm-nominal_volt);
/* Setting the ON voltage to the new target voltage */
vc_cmdval = voltdm-read(vc-cmdval_reg);
@@ -136,7 +136,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
unsigned long target_volt,
u8 target_vsel, u8 current_vsel)
{
- struct omap_vdd_info *vdd = voltdm-vdd;
u32 smps_steps = 0, smps_delay = 0;
smps_steps = abs(target_vsel - current_vsel);
@@ -145,7 +144,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
voltdm-pmic-slew_rate) + 2;
udelay(smps_delay);
- vdd-curr_volt = target_volt;
+ voltdm-nominal_volt = target_volt;
}
/* vc_bypass_scale - VC bypass method of voltage scaling */
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 4afb368..1b39e68 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -81,16 +81,12 @@ ovdc_out:
*/
unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
{
- struct omap_vdd_info *vdd;
-
if (!voltdm || IS_ERR(voltdm)) {
pr_warning(%s: VDD specified does not exist!\n, __func__);
return 0;
}
- vdd = voltdm-vdd;
-
- return vdd-curr_volt;
+ return voltdm-nominal_volt;
}
/**
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index e3efbf9..3e32eda 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -61,6 +61,7 @@ struct omap_vfsm_instance {
* @vdd: to be removed
* @pwrdms: powerdomains in this voltagedomain
* @scale: function used to scale the voltage of the voltagedomain
+ * @nominal_volt: current nominal voltage for this voltage domain
*/
struct voltagedomain {
char *name;
@@ -84,6 +85,7 @@ struct voltagedomain {
int (*scale) (struct voltagedomain *voltdm,
unsigned long target_volt);
+ u32 nominal_volt;
struct omap_vdd_info *vdd;
};
@@ -144,11 +146,9 @@ struct omap_voltdm_pmic {
*
* @volt_data : voltage table having the distinct voltages supported
* by the domain and other associated per voltage data.
- * @curr_volt : current voltage for this vdd.
*/
struct omap_vdd_info {
struct omap_volt_data *volt_data;
- u32 curr_volt;
};
void omap_voltage_get_volttable(struct voltagedomain *voltdm,
--
1.7.6
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[PATCH 0/7] OMAP: voltage cleanup part D: voltage domain
This series focuses on cleanup of the remaining voltage domain layer (non-VC/VP code) Available in the pm-wip/voltdm_d branch of my linux-omap-pm tree git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Applies on v3.1-rc3 + the part A, B C series. Kevin Kevin Hilman (6): OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain OMAP3+: voltdm: final removal of omap_vdd_info OMAP3+: voltage: rename omap_voltage_get_nom_volt - voltdm_get_voltage OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale OMAP2+: VC: more registers are per-channel starting with OMAP5 Tero Kristo (1): omap: voltage: add a stub header file for external/regulator use arch/arm/mach-omap2/pm.c |2 +- arch/arm/mach-omap2/smartreflex-class3.c |4 +- arch/arm/mach-omap2/vc.c | 13 +-- arch/arm/mach-omap2/vc.h | 14 ++-- arch/arm/mach-omap2/vc3xxx_data.c | 12 ++- arch/arm/mach-omap2/vc44xx_data.c | 16 +++- arch/arm/mach-omap2/voltage.c | 107 arch/arm/mach-omap2/voltage.h | 25 ++- arch/arm/mach-omap2/voltagedomains3xxx_data.c | 14 +--- arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 +--- arch/arm/plat-omap/include/plat/voltage.h | 20 + 11 files changed, 104 insertions(+), 138 deletions(-) create mode 100644 arch/arm/plat-omap/include/plat/voltage.h -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Issue with clock_gettime / clock_nanosleep APIs with high resolution timer on panda board
Hello everyone, Greetings. I have tried the following kernels and found the problem to occur on all of them with high resolution timer enabled (1) mainline stable 3.0.1 kernel but with Hemant Pedanekar's patch (http://www.spinics.net/lists/linux-omap/msg50742.html) and by disabling 32KHz Timer (System Type - TI OMAP Common Features - Use 32KHz timer) (2) Same as (1) with RT patch (3.0.1-rt11) (3) OMAP kernel version v3.1-rc2 ( http://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git ) Problem: * On panda baord, I ran the v0.74 of cyclictest (git://git.kernel.org/pub/scm/linux/kernel/git/clrkwllms/rt-tests.git) to measure the latency (./cyclictest -l40 -m -S -p99 -i70 -h60 -q -n). These arguments make the test to use TIMER_ABSTIME for clock_nanosleep and CPU affinity (using sched_setaffinity) for the 2 threads to be set to each CPU. It is expected to see large latencies without the RT patch. However, when I ran the tests overnight, I observed maximum latency of 4294967103 us (weird but it is close to unsigned int max). So, I instrumented the test to print some additional information and exit as soon as it finds such a weird latency. I was also trying to stress ethernet/network/interrupts of the system with SFTP but I think (not very sure) I could reproduce the issue without that. clock_nanosleep was called to sleep until 27608:739311172 (sec:nsec), but after clock_nanosleep returned, clock_gettime returned the time as 27608:739117429 (sec:nsec) which is roughly 193 usec earlier than the value passed to clock_nanosleep and that is the bug. I ran the test with just one thread ( remove -S and add -t1 -a1 -n ) and saw the weird latency of 4294967294 usec. Questions * (1) Is this a known bug? If so, do we already have a fix? (2) Does anyone have suggestions for narrowing this down further (timer driver issue vs scheduler/kernel issue)? (3) I am not too familiar with OMAP and Linux kernel. Which timer gets used when I use high-resolution timer and disable the 32 KHz timer? Is it part of MP core? Is this timer per CPU? Pointers to source code for the high-res timer driver? (4) If the timer is per CPU, are they synchronized in the hardware? (5) In the same process/task, if a thread (created with pthread_create) is assigned CPU affinity to a particular core (sched_setaffinity), is it a soft-request to the scheduler or is it guaranteed that the thread will not be scheduled on other CPUs at all?The reason I am asking this is to rule out the possibility of the thread jumping to different CPU and the timers are off by quite a bit for different CPUs. (6) Is it ok to call sched_setaffinity with the first argument 0 to set a the affinity for a particular pthread in the process? Or, should the value returned by gettid() should be passed instead? (7) Should I post it to any other mailing list also? Thanks, Sankara -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 0/5] OMAP: voltage cleanup part E: TWL6030 PMIC fixes
This series focuses on cleanups and fixes in support of the TWL6030 PMIC. Available in the pm-wip/voltdm_e branch of my linux-omap-pm tree git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git Applies on v3.1-rc3 + the part A, B, C D series. Kevin Nishanth Menon (3): OMAP4: PM: TWL6030: fix uv to voltage for 0x39 OMAP4: PM: TWL6030: address 0V conversions OMAP4: PM: TWL6030: add cmd register Patrick Titiano (2): OMAP4: PM: TWL6030: fix voltage conversion formula OMAP4: PM: TWL6030: fix ON/RET/OFF voltages arch/arm/mach-omap2/omap_twl.c | 55 +-- 1 files changed, 35 insertions(+), 20 deletions(-) -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 2/5] OMAP4: PM: TWL6030: fix uv to voltage for 0x39
From: Nishanth Menon n...@ti.com
using 1.35V as a check is not correct, we know that beyond 0x39,
voltages are non linear - hence use the conversion iff uV greater
than that for 0x39. For example, with 709mV as the smps offset,
the max linear is actually 1.41V(0x39vsel)!
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_twl.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index a66bf6b..5def7c2 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -134,8 +134,13 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
* hardcoding only for 1.35 V which is used for 1GH OPP for
* OMAP4430.
*/
- if (uv == 135)
+ if (uv twl6030_vsel_to_uv(0x39)) {
+ if (uv == 135)
+ return 0x3A;
+ pr_err(%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n,
+ __func__, uv, twl6030_vsel_to_uv(0x39));
return 0x3A;
+ }
if (smps_offset 0x8)
return DIV_ROUND_UP(uv - 709000, 12660) + 1;
--
1.7.6
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[PATCH 3/5] OMAP4: PM: TWL6030: address 0V conversions
From: Nishanth Menon n...@ti.com 0V conversions should be mapped to 0 as it is meant to denote off voltages. Signed-off-by: Nishanth Menon n...@ti.com --- arch/arm/mach-omap2/omap_twl.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c index 5def7c2..b30adf3 100644 --- a/arch/arm/mach-omap2/omap_twl.c +++ b/arch/arm/mach-omap2/omap_twl.c @@ -95,6 +95,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) is_offset_valid = true; } + if (!vsel) + return 0; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded @@ -127,6 +129,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) is_offset_valid = true; } + if (!uv) + return 0x00; /* * There is no specific formula for voltage to vsel * conversion above 1.3V. There are special hardcoded -- 1.7.6 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/5] OMAP4: PM: TWL6030: fix ON/RET/OFF voltages
From: Patrick Titiano p-titi...@ti.com
According to latest OMAP4430 Data Manual v0.4 dated March 2011:
- Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM.
This allows saving a little more power in retention states.
- OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM.
This allows saving a little power when CPU wakes up until Smart-Reflex is
not yet resumed.
[n...@ti.com: ported to voltdm_c]
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Patrick Titiano p-titi...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 24
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index b30adf3..4bc99fb 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -197,10 +197,10 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
static struct omap_voltdm_pmic omap4_mpu_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 135,
- .onlp_volt = 135,
- .ret_volt = 837500,
- .off_volt = 60,
+ .on_volt= 1375000,
+ .onlp_volt = 1375000,
+ .ret_volt = 83,
+ .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
@@ -218,10 +218,10 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
static struct omap_voltdm_pmic omap4_iva_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 110,
- .onlp_volt = 110,
- .ret_volt = 837500,
- .off_volt = 60,
+ .on_volt= 1188000,
+ .onlp_volt = 1188000,
+ .ret_volt = 83,
+ .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
@@ -239,10 +239,10 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
static struct omap_voltdm_pmic omap4_core_pmic = {
.slew_rate = 4000,
.step_size = 12660,
- .on_volt= 110,
- .onlp_volt = 110,
- .ret_volt = 837500,
- .off_volt = 60,
+ .on_volt= 120,
+ .onlp_volt = 120,
+ .ret_volt = 83,
+ .off_volt = 0,
.volt_setup_time= 0,
.vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
.vp_vstepmin= OMAP4_VP_VSTEPMIN_VSTEPMIN,
--
1.7.6
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[PATCH 5/5] OMAP4: PM: TWL6030: add cmd register
From: Nishanth Menon n...@ti.com
Without the command register, ON/ONLP/RET/OFF voltages are
useless. and TWL will be unable to use these
Signed-off-by: Nishanth Menon n...@ti.com
---
arch/arm/mach-omap2/omap_twl.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 4bc99fb..f515a1a 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -42,8 +42,11 @@
#define OMAP4_SRI2C_SLAVE_ADDR 0x12
#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
+#define OMAP4_VDD_MPU_SR_CMD_REG 0x56
#define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
+#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C
#define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
+#define OMAP4_VDD_CORE_SR_CMD_REG 0x62
#define OMAP4_VP_CONFIG_ERROROFFSET0x00
#define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
@@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
+ .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
@@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
+ .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG,
.i2c_high_speed = true,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
@@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = {
.vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
.i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
.volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
+ .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG,
.vsel_to_uv = twl6030_vsel_to_uv,
.uv_to_vsel = twl6030_uv_to_vsel,
};
--
1.7.6
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[PATCH 1/5] OMAP4: PM: TWL6030: fix voltage conversion formula
From: Patrick Titiano p-titi...@ti.com
omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert
voltages to TWL6030 SMPS commands (a.k.a vsel) implement incorrect conversion
formula.
It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and
voltage step:
- Voltage Step is now 12.66mV (instead of 12.5mV)
- Offset is either 607.7mV or 709mV depending on TWL6030 chip revision
(instead of 600mV)
This leads to setting voltages potentially higher than expected, and so
potentially some (limited) power overconsumption.
For reference, see formula and tables in section 8.5.2.3
Output Voltage Selection (Standard Mode / Extended Mode with or without
offset)
in TWL6030 functional specifications document.
[n...@ti.com: ported to voltdm_c]
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Patrick Titiano p-titi...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 6b247d1..a66bf6b 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -106,9 +106,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel)
return 135;
if (smps_offset 0x8)
- return vsel - 1) * 125) + 7000)) * 100;
+ return vsel - 1) * 1266) + 70900)) * 10;
else
- return vsel - 1) * 125) + 6000)) * 100;
+ return vsel - 1) * 1266) + 60770)) * 10;
}
static u8 twl6030_uv_to_vsel(unsigned long uv)
@@ -138,9 +138,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
return 0x3A;
if (smps_offset 0x8)
- return DIV_ROUND_UP(uv - 70, 12500) + 1;
+ return DIV_ROUND_UP(uv - 709000, 12660) + 1;
else
- return DIV_ROUND_UP(uv - 60, 12500) + 1;
+ return DIV_ROUND_UP(uv - 607700, 12660) + 1;
}
static struct omap_voltdm_pmic omap3_mpu_pmic = {
@@ -187,7 +187,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
static struct omap_voltdm_pmic omap4_mpu_pmic = {
.slew_rate = 4000,
- .step_size = 12500,
+ .step_size = 12660,
.on_volt= 135,
.onlp_volt = 135,
.ret_volt = 837500,
@@ -208,7 +208,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
static struct omap_voltdm_pmic omap4_iva_pmic = {
.slew_rate = 4000,
- .step_size = 12500,
+ .step_size = 12660,
.on_volt= 110,
.onlp_volt = 110,
.ret_volt = 837500,
@@ -229,7 +229,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
static struct omap_voltdm_pmic omap4_core_pmic = {
.slew_rate = 4000,
- .step_size = 12500,
+ .step_size = 12660,
.on_volt= 110,
.onlp_volt = 110,
.ret_volt = 837500,
--
1.7.6
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Re: [PATCH 03/13] ARM: gpio: omap: convert drivers to use asm/gpio.h rather than mach/gpio.h
Russell King - ARM Linux li...@arm.linux.org.uk writes: Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk Acked-by: Kevin Hilman khil...@ti.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 11/13] ARM: gpio: consolidate trivial gpiolib implementations
Russell King - ARM Linux li...@arm.linux.org.uk writes: Consolidate 24 trivial gpiolib implementions out of mach/gpio.h into asm/gpio.h. This is basically the include of asm-generic/gpio.h and the definition of gpio_get_value, gpio_set_value, and gpio_cansleep as described in Documentation/gpio.txt Signed-off-by: Russell King rmk+ker...@arm.linux.org.uk For OMAP: Tested-by: Kevin Hilman khil...@ti.com Acked-by: Kevin Hilman khil...@ti.com Also goes for patches 12 13 also. Kevin -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 5/5 v4] mfd: omap: usb: Runtime PM support
Todd Poynor toddpoy...@google.com writes:
On Fri, Aug 12, 2011 at 12:20:21PM +0530, Munegowda, Keshava wrote:
On Wed, Aug 10, 2011 at 10:01 PM, Todd Poynor toddpoy...@google.com wrote:
@@ -913,12 +598,15 @@ static int usbhs_enable(struct device *dev)
(pdata-ehci_data-reset_gpio_port[1], 1);
}
-end_count:
- omap-count++;
+ pm_runtime_put_sync(dev);
spin_unlock_irqrestore(omap-lock, flags);
Is pm_runtime_irq_safe() needed (else I think runtime PM callbacks may
re-enable IRQs... or there's the new *_suspend runtime PM calls that
may avoid this)?
pm_runtime_irq_safe() is not required; usbhs does not have a parent
and it is the parent driver of
ehci and ohci drivers.
But the above expects IRQs to be disabled during the
pm_runtime_put_sync, and synchronous calls can turn IRQs back on in
rpm_idle:
if (callback) {
spin_unlock_irq(dev-power.lock);
callback(dev);
I see other folks who know this better than me are discussing USB run
time PM and might_sleep contexts, so I'll note this concern and let
others chime in if they think there's a real problem here.
FYI... The commit below fixes this mainline (merged as of v3.1-rc4).
Kevin
commit 02b26774afebb2d62695ba3230319d70d8c6cc2d
Author: Kevin Hilman khil...@ti.com
Date: Fri Aug 5 21:45:20 2011 +0200
PM / Runtime: Allow _put_sync() from interrupts-disabled context
Currently the use of pm_runtime_put_sync() is not safe from
interrupts-disabled context because rpm_idle() will release the
spinlock and enable interrupts for the idle callbacks. This enables
interrupts during a time where interrupts were expected to be
disabled, and can have strange side effects on drivers that expected
interrupts to be disabled.
This is not a bug since the documentation clearly states that only
_put_sync_suspend() is safe in IRQ-safe mode.
However, pm_runtime_put_sync() could be made safe when in IRQ-safe
mode by releasing the spinlock but not re-enabling interrupts, which
is what this patch aims to do.
Problem was found when using some buggy drivers that set
pm_runtime_irq_safe() and used _put_sync() in interrupts-disabled
context.
Reported-by: Colin Cross ccr...@google.com
Tested-by: Nishanth Menon n...@ti.com
Signed-off-by: Kevin Hilman khil...@ti.com
Signed-off-by: Rafael J. Wysocki r...@sisk.pl
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[PATCH] mfd: Combine MFD_SUPPORT and MFD_CORE
From: Randy Dunlap rdun...@xenotime.net Combine MFD_SUPPORT (which only enabled the remainder of the MFD menu) and MFD_CORE. This allows other drivers to select MFD_CORE without needing to also select MFD_SUPPORT, which fixes some kconfig unmet dependency warnings. Modeled after I2C kconfig. [Forward-ported to 3.1-rc4. This fixes a warning when some drivers, such as RADIO_WL1273, are selected, but MFD_SUPPORT is not. -- Luca] Signed-off-by: Randy Dunlap rdun...@xenotime.net Reported-by: Johannes Berg johan...@sipsolutions.net Cc: Jean Delvare kh...@linux-fr.org Cc: Tony Lindgren t...@atomide.com Cc: Grant Likely grant.lik...@secretlab.ca Signed-off-by: Luciano Coelho coe...@ti.com --- I guess this should fix the problem. I've simple forward-ported Randy's patch to the latest mainline kernel. I don't know via which tree this should go in, though. NOTE: I have *not* tested this very thoroughly. But at least omap2plus stuff seems to work okay with this change. MFD_SUPPORT is also selected by a couple of tile platforms defconfigs, but I guess the Kconfig system should take care of it. arch/arm/mach-omap2/Kconfig |2 +- drivers/gpio/Kconfig|3 +- drivers/mfd/Kconfig | 54 +++--- 3 files changed, 6 insertions(+), 53 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 57b66d5..1046923 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -14,7 +14,7 @@ config ARCH_OMAP2PLUS_TYPICAL select SERIAL_OMAP_CONSOLE select I2C select I2C_OMAP - select MFD_SUPPORT + select MFD_CORE select MENELAUS if ARCH_OMAP2 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d539efd..fbc5fd4 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -180,7 +180,7 @@ config GPIO_SCH config GPIO_VX855 tristate VIA VX855/VX875 GPIO - depends on MFD_SUPPORT PCI + depends on PCI select MFD_CORE select MFD_VX855 help @@ -417,7 +417,6 @@ config GPIO_TIMBERDALE config GPIO_RDC321X tristate RDC R-321x GPIO support depends on PCI - select MFD_SUPPORT select MFD_CORE select MFD_RDC321X help diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 21574bd..1836cdf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2,10 +2,9 @@ # Multifunction miscellaneous devices # -menuconfig MFD_SUPPORT - bool Multifunction device drivers +menuconfig MFD_CORE + tristate Multifunction device drivers depends on HAS_IOMEM - default y help Multifunction devices embed several functions (e.g. GPIOs, touchscreens, keyboards, current regulators, power management chips, @@ -18,16 +17,11 @@ menuconfig MFD_SUPPORT This option alone does not add any kernel code. -if MFD_SUPPORT - -config MFD_CORE - tristate - default n +if MFD_CORE config MFD_88PM860X bool Support Marvell 88PM8606/88PM8607 depends on I2C=y GENERIC_HARDIRQS - select MFD_CORE help This supports for Marvell 88PM8606/88PM8607 Power Management IC. This includes the I2C driver and the core APIs _only_, you have to @@ -55,14 +49,12 @@ config MFD_SM501_GPIO config MFD_ASIC3 bool Support for Compaq ASIC3 depends on GENERIC_HARDIRQS GPIOLIB ARM - select MFD_CORE ---help--- This driver supports the ASIC3 multifunction chip found on many PDAs (mainly iPAQ and HTC based ones) config MFD_DAVINCI_VOICECODEC tristate - select MFD_CORE config MFD_DM355EVM_MSP bool DaVinci DM355 EVM microcontroller @@ -75,7 +67,6 @@ config MFD_DM355EVM_MSP config MFD_TI_SSP tristate TI Sequencer Serial Port support depends on ARCH_DAVINCI_TNETV107X - select MFD_CORE ---help--- Say Y here if you want support for the Sequencer Serial Port in a Texas Instruments TNETV107X SoC. @@ -93,7 +84,6 @@ config HTC_EGPIO config HTC_PASIC3 tristate HTC PASIC3 LED/DS1WM chip support - select MFD_CORE help This core driver provides register access for the LED/DS1WM chips labeled AIC2 and AIC3, found on HTC Blueangel and @@ -124,7 +114,6 @@ config TPS6105X tristate TPS61050/61052 Boost Converters depends on I2C select REGULATOR - select MFD_CORE select REGULATOR_FIXED_VOLTAGE help This option enables a driver for the TP61050/TPS61052 @@ -147,7 +136,6 @@ config TPS65010 config TPS6507X tristate TPS6507x Power Management / Touch Screen chips - select MFD_CORE depends on I2C help If you say yes here you get support for the TPS6507x
Re: [PATCH 5/5 v4] mfd: omap: usb: Runtime PM support
Keshava Munegowda keshava_mgo...@ti.com writes: From: Keshava Munegowda keshava_mgo...@ti.com The usbhs core driver does not enable/disable the intefrace and fucntional clocks; These clocks are handled by hwmod and runtime pm, hence insted of the clock enable/disable, the runtime pm APIS are used. however,the port clocks are handled by the usbhs core. Signed-off-by: Keshava Munegowda keshava_mgo...@ti.com General comment: all usage of pm_runtime_put_sync() can likely be replaced by the asynchronous versions. I don't currently see why the synchronous verions are needed here. Other than that, the runtime PM parts of this look OK to me. After changing to asynchonous puts, feel free to add: Reviewed-by: Kevin Hilman khil...@ti.com Also, after a quick glance, it looks like this version of the series addresses the problems seen by Jassi Brar with the TLL reset[1]. Please confirm. Speaking of which, it's helpful to Cc folks who have had comments on previous versions of your series so they are sure they're previous issues are addressed. I've Cc'd Jassi Brar. Thanks, Kevin [1] http://marc.info/?l=linux-omapm=130921260703865w=2 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mfd: Combine MFD_SUPPORT and MFD_CORE
On Mon, Aug 29, 2011 at 12:41 PM, Luciano Coelho coe...@ti.com wrote: From: Randy Dunlap rdun...@xenotime.net Combine MFD_SUPPORT (which only enabled the remainder of the MFD menu) and MFD_CORE. This allows other drivers to select MFD_CORE without needing to also select MFD_SUPPORT, which fixes some kconfig unmet dependency warnings. Modeled after I2C kconfig. [Forward-ported to 3.1-rc4. This fixes a warning when some drivers, such as RADIO_WL1273, are selected, but MFD_SUPPORT is not. -- Luca] Signed-off-by: Randy Dunlap rdun...@xenotime.net Reported-by: Johannes Berg johan...@sipsolutions.net Cc: Jean Delvare kh...@linux-fr.org Cc: Tony Lindgren t...@atomide.com Cc: Grant Likely grant.lik...@secretlab.ca Signed-off-by: Luciano Coelho coe...@ti.com okay by me. g. --- I guess this should fix the problem. I've simple forward-ported Randy's patch to the latest mainline kernel. I don't know via which tree this should go in, though. NOTE: I have *not* tested this very thoroughly. But at least omap2plus stuff seems to work okay with this change. MFD_SUPPORT is also selected by a couple of tile platforms defconfigs, but I guess the Kconfig system should take care of it. arch/arm/mach-omap2/Kconfig | 2 +- drivers/gpio/Kconfig | 3 +- drivers/mfd/Kconfig | 54 +++--- 3 files changed, 6 insertions(+), 53 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 57b66d5..1046923 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -14,7 +14,7 @@ config ARCH_OMAP2PLUS_TYPICAL select SERIAL_OMAP_CONSOLE select I2C select I2C_OMAP - select MFD_SUPPORT + select MFD_CORE select MENELAUS if ARCH_OMAP2 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d539efd..fbc5fd4 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -180,7 +180,7 @@ config GPIO_SCH config GPIO_VX855 tristate VIA VX855/VX875 GPIO - depends on MFD_SUPPORT PCI + depends on PCI select MFD_CORE select MFD_VX855 help @@ -417,7 +417,6 @@ config GPIO_TIMBERDALE config GPIO_RDC321X tristate RDC R-321x GPIO support depends on PCI - select MFD_SUPPORT select MFD_CORE select MFD_RDC321X help diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 21574bd..1836cdf 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2,10 +2,9 @@ # Multifunction miscellaneous devices # -menuconfig MFD_SUPPORT - bool Multifunction device drivers +menuconfig MFD_CORE + tristate Multifunction device drivers depends on HAS_IOMEM - default y help Multifunction devices embed several functions (e.g. GPIOs, touchscreens, keyboards, current regulators, power management chips, @@ -18,16 +17,11 @@ menuconfig MFD_SUPPORT This option alone does not add any kernel code. -if MFD_SUPPORT - -config MFD_CORE - tristate - default n +if MFD_CORE config MFD_88PM860X bool Support Marvell 88PM8606/88PM8607 depends on I2C=y GENERIC_HARDIRQS - select MFD_CORE help This supports for Marvell 88PM8606/88PM8607 Power Management IC. This includes the I2C driver and the core APIs _only_, you have to @@ -55,14 +49,12 @@ config MFD_SM501_GPIO config MFD_ASIC3 bool Support for Compaq ASIC3 depends on GENERIC_HARDIRQS GPIOLIB ARM - select MFD_CORE ---help--- This driver supports the ASIC3 multifunction chip found on many PDAs (mainly iPAQ and HTC based ones) config MFD_DAVINCI_VOICECODEC tristate - select MFD_CORE config MFD_DM355EVM_MSP bool DaVinci DM355 EVM microcontroller @@ -75,7 +67,6 @@ config MFD_DM355EVM_MSP config MFD_TI_SSP tristate TI Sequencer Serial Port support depends on ARCH_DAVINCI_TNETV107X - select MFD_CORE ---help--- Say Y here if you want support for the Sequencer Serial Port in a Texas Instruments TNETV107X SoC. @@ -93,7 +84,6 @@ config HTC_EGPIO config HTC_PASIC3 tristate HTC PASIC3 LED/DS1WM chip support - select MFD_CORE help This core driver provides register access for the LED/DS1WM chips labeled AIC2 and AIC3, found on HTC Blueangel and @@ -124,7 +114,6 @@ config TPS6105X tristate TPS61050/61052 Boost Converters depends on I2C select REGULATOR - select MFD_CORE select REGULATOR_FIXED_VOLTAGE help This option enables a driver for the TP61050/TPS61052 @@ -147,7 +136,6 @@ config TPS65010 config TPS6507X tristate TPS6507x Power
[PATCH] iommu: omap_iovmm: support non page-aligned buffers in iommu_vmap
From: Laurent Pinchart laurent.pinch...@ideasonboard.com
omap_iovmm requires page-aligned buffers, and that sometimes causes
omap3isp failures (i.e. whenever the buffer passed from userspace is not
page-aligned).
Remove this limitation by rounding the address of the first page entry
down, and adding the offset back to the device address.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
Acked-by: Hiroshi DOYU hiroshi.d...@nokia.com
[o...@wizery.com: slightly edited the commit log]
Signed-off-by: Ohad Ben-Cohen o...@wizery.com
---
A fix by Laurent that was waiting until omap's iommu lands in drivers/.
Generally we're not extending omap-iovmm anymore, but this fixes a real
breakage for omap3isp users, so there's no point in delaying it until
the generic DMA API is ready and we've migrated.
Thanks Laurent!
drivers/iommu/omap-iovmm.c | 32
1 files changed, 24 insertions(+), 8 deletions(-)
diff --git a/drivers/iommu/omap-iovmm.c b/drivers/iommu/omap-iovmm.c
index 5e7f97d..d28a256 100644
--- a/drivers/iommu/omap-iovmm.c
+++ b/drivers/iommu/omap-iovmm.c
@@ -27,6 +27,15 @@
static struct kmem_cache *iovm_area_cachep;
+/* return the offset of the first scatterlist entry in a sg table */
+static unsigned int sgtable_offset(const struct sg_table *sgt)
+{
+ if (!sgt || !sgt-nents)
+ return 0;
+
+ return sgt-sgl-offset;
+}
+
/* return total bytes of sg buffers */
static size_t sgtable_len(const struct sg_table *sgt)
{
@@ -39,11 +48,17 @@ static size_t sgtable_len(const struct sg_table *sgt)
for_each_sg(sgt-sgl, sg, sgt-nents, i) {
size_t bytes;
- bytes = sg-length;
+ bytes = sg-length + sg-offset;
if (!iopgsz_ok(bytes)) {
- pr_err(%s: sg[%d] not iommu pagesize(%x)\n,
- __func__, i, bytes);
+ pr_err(%s: sg[%d] not iommu pagesize(%u %u)\n,
+ __func__, i, bytes, sg-offset);
+ return 0;
+ }
+
+ if (i sg-offset) {
+ pr_err(%s: sg[%d] offset not allowed in internal
+ entries\n, __func__, i);
return 0;
}
@@ -164,8 +179,8 @@ static void *vmap_sg(const struct sg_table *sgt)
u32 pa;
int err;
- pa = sg_phys(sg);
- bytes = sg-length;
+ pa = sg_phys(sg) - sg-offset;
+ bytes = sg-length + sg-offset;
BUG_ON(bytes != PAGE_SIZE);
@@ -405,8 +420,8 @@ static int map_iovm_area(struct iommu_domain *domain,
struct iovm_struct *new,
u32 pa;
size_t bytes;
- pa = sg_phys(sg);
- bytes = sg-length;
+ pa = sg_phys(sg) - sg-offset;
+ bytes = sg-length + sg-offset;
flags = ~IOVMF_PGSZ_MASK;
@@ -600,7 +615,7 @@ u32 omap_iommu_vmap(struct iommu_domain *domain, struct
omap_iommu *obj, u32 da,
if (IS_ERR_VALUE(da))
vunmap_sg(va);
- return da;
+ return da + sgtable_offset(sgt);
}
EXPORT_SYMBOL_GPL(omap_iommu_vmap);
@@ -620,6 +635,7 @@ omap_iommu_vunmap(struct iommu_domain *domain, struct
omap_iommu *obj, u32 da)
* 'sgt' is allocated before 'omap_iommu_vmalloc()' is called.
* Just returns 'sgt' to the caller to free
*/
+ da = PAGE_MASK;
sgt = unmap_vm_area(domain, obj, da, vunmap_sg,
IOVMF_DISCONT | IOVMF_MMIO);
if (!sgt)
--
1.7.4.1
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