[PATCH v5 1/6] usb: musb: core: Handle Babble condition only in HOST mode

[George Cherian]

BABBLE and RESET share the same interrupt. The interrupt
is considered to be RESET if MUSB is in peripheral mode and
as a BABBLE if MUSB is in HOST mode.

Handle babble condition iff MUSB is in HOST mode.

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 61da471..eff3c5c 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -849,7 +849,7 @@ b_host:
}
 
/* handle babble condition */
-   if (int_usb  MUSB_INTR_BABBLE)
+   if (int_usb  MUSB_INTR_BABBLE  is_host_active(musb))
schedule_work(musb-recover_work);
 
 #if 0
-- 
1.8.3.1

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[PATCH v5 3/6] usb: musb: dsps: Call usb_phy(_shutdown/_init) during musb_platform_reset()

[George Cherian]

For DSPS platform usb_phy_vbus(_off/_on) are NOPs.
So during musb_platform_reset() call usb_phy(_shutdown/_init)

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_dsps.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 51beb13..74c4193 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -543,7 +543,11 @@ static void dsps_musb_reset(struct musb *musb)
const struct dsps_musb_wrapper *wrp = glue-wrp;
 
dsps_writel(musb-ctrl_base, wrp-control, (1  wrp-reset));
-   udelay(100);
+   usleep_range(100, 200);
+   usb_phy_shutdown(musb-xceiv);
+   usleep_range(100, 200);
+   usb_phy_init(musb-xceiv);
+
 }
 
 static struct musb_platform_ops dsps_ops = {
-- 
1.8.3.1

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[PATCH v5 4/6] usb: musb: core: Convert the musb_platform_reset to have a return value.

[George Cherian]

Currently musb_platform_reset() is only used by dsps.
In case of BABBLE interrupt for other platforms the  musb_platform_reset()
is a NOP. In such situations no need to re-initialize the endpoints.
Also in the latest silicon revision of AM335x, we do have a babble recovery
mechanism without resetting the IP block. In preperation to add that support
its better to have a rest_done return for  musb_platform_reset().

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_core.c | 10 ++
 drivers/usb/musb/musb_core.h | 10 ++
 drivers/usb/musb/musb_dsps.c |  3 ++-
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 8920b80..7c6836cc 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1755,9 +1755,11 @@ static void musb_irq_work(struct work_struct *data)
 static void musb_recover_work(struct work_struct *data)
 {
struct musb *musb = container_of(data, struct musb, recover_work.work);
-   int status;
+   int status, ret;
 
-   musb_platform_reset(musb);
+   ret  = musb_platform_reset(musb);
+   if (ret)
+   return;
 
usb_phy_vbus_off(musb-xceiv);
usleep_range(100, 200);
@@ -1766,8 +1768,8 @@ static void musb_recover_work(struct work_struct *data)
usleep_range(100, 200);
 
/*
-* When a babble condition occurs, the musb controller removes the
-* session bit and the endpoint config is lost.
+* When a babble condition occurs, the musb controller
+* removes the session bit and the endpoint config is lost.
 */
if (musb-dyn_fifo)
status = ep_config_from_table(musb);
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 9241025..414e57a 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -192,7 +192,7 @@ struct musb_platform_ops {
 
int (*set_mode)(struct musb *musb, u8 mode);
void(*try_idle)(struct musb *musb, unsigned long timeout);
-   void(*reset)(struct musb *musb);
+   int (*reset)(struct musb *musb);
 
int (*vbus_status)(struct musb *musb);
void(*set_vbus)(struct musb *musb, int on);
@@ -555,10 +555,12 @@ static inline void musb_platform_try_idle(struct musb 
*musb,
musb-ops-try_idle(musb, timeout);
 }
 
-static inline void musb_platform_reset(struct musb *musb)
+static inline int  musb_platform_reset(struct musb *musb)
 {
-   if (musb-ops-reset)
-   musb-ops-reset(musb);
+   if (!musb-ops-reset)
+   return -EINVAL;
+
+   return musb-ops-reset(musb);
 }
 
 static inline int musb_platform_get_vbus_status(struct musb *musb)
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 74c4193..f6f3087 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -536,7 +536,7 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode)
return 0;
 }
 
-static void dsps_musb_reset(struct musb *musb)
+static int dsps_musb_reset(struct musb *musb)
 {
struct device *dev = musb-controller;
struct dsps_glue *glue = dev_get_drvdata(dev-parent);
@@ -548,6 +548,7 @@ static void dsps_musb_reset(struct musb *musb)
usleep_range(100, 200);
usb_phy_init(musb-xceiv);
 
+   return 0;
 }
 
 static struct musb_platform_ops dsps_ops = {
-- 
1.8.3.1

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[PATCH v5 5/6] usb: musb: dsps: Add the sw_babble_control()

[George Cherian]

Add sw_babble_control() logic to differentiate between transient
babble and real babble condition. Also add the SW babble control
register definitions.

Babble control register logic is implemented in the latest
revision of AM335x.

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_dsps.c | 50 
 drivers/usb/musb/musb_regs.h |  7 +++
 2 files changed, 57 insertions(+)

diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index f6f3087..868caf8 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -536,6 +536,56 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode)
return 0;
 }
 
+static int sw_babble_control(struct musb *musb)
+{
+   int timeout = 10;
+   u8 babble_ctl, session_restart = 0;
+
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   dev_dbg(musb-controller, babble: MUSB_BABBLE_CTL value %x\n,
+   babble_ctl);
+   /*
+* check line monitor flag to check whether babble is
+* due to noise
+*/
+   dev_dbg(musb-controller, STUCK_J is %s\n,
+   babble_ctl  MUSB_BABBLE_STUCK_J ? set : reset);
+
+   if (babble_ctl  MUSB_BABBLE_STUCK_J) {
+   /*
+* babble is due to noise, then set transmit idle (d7 bit)
+* to resume normal operation
+*/
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
+   dsps_writeb(musb-mregs, MUSB_BABBLE_CTL, babble_ctl);
+
+   /* wait till line monitor flag cleared */
+   dev_dbg(musb-controller, Set TXIDLE, wait J to clear\n);
+   do {
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   udelay(1);
+   } while ((babble_ctl  MUSB_BABBLE_STUCK_J)  timeout--);
+
+   /* check whether stuck_at_j bit cleared */
+   if (babble_ctl  MUSB_BABBLE_STUCK_J) {
+   /*
+* real babble condition is occured
+* restart the controller to start the
+* session again
+*/
+   dev_dbg(musb-controller, J not cleared, misc (%x)\n,
+   babble_ctl);
+   session_restart = 1;
+   }
+
+   } else {
+   session_restart = 1;
+   }
+
+   return session_restart;
+}
+
 static int dsps_musb_reset(struct musb *musb)
 {
struct device *dev = musb-controller;
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 03f2655..b9bcda5 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -72,6 +72,12 @@
 #define MUSB_DEVCTL_HR 0x02
 #define MUSB_DEVCTL_SESSION0x01
 
+/* BABBLE_CTL */
+#define MUSB_BABBLE_FORCE_TXIDLE   0x80
+#define MUSB_BABBLE_SW_SESSION_CTRL0x40
+#define MUSB_BABBLE_STUCK_J0x20
+#define MUSB_BABBLE_RCV_DISABLE0x04
+
 /* MUSB ULPI VBUSCONTROL */
 #define MUSB_ULPI_USE_EXTVBUS  0x01
 #define MUSB_ULPI_USE_EXTVBUSIND 0x02
@@ -246,6 +252,7 @@
  */
 
 #define MUSB_DEVCTL0x60/* 8 bit */
+#define MUSB_BABBLE_CTL0x61/* 8 bit */
 
 /* These are always controlled through the INDEX register */
 #define MUSB_TXFIFOSZ  0x62/* 8-bit (see masks) */
-- 
1.8.3.1

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[PATCH v5 6/6] usb: musb: dsps: Enable sw babble control for newer silicon

[George Cherian]

Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_dsps.c | 38 --
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 868caf8..2ced061 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -136,6 +136,7 @@ struct dsps_glue {
const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
struct timer_list timer;/* otg_workaround timer */
unsigned long last_timer;/* last timer data for each instance */
+   bool sw_babble_enabled;
 
struct dsps_context context;
struct debugfs_regset32 regset;
@@ -469,6 +470,19 @@ static int dsps_musb_init(struct musb *musb)
val = ~(1  wrp-otg_disable);
dsps_writel(musb-ctrl_base, wrp-phy_utmi, val);
 
+   /*
+*  Check whether the dsps version has babble control enabled.
+* In latest silicon revision the babble control logic is enabled.
+* If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
+* logic enabled.
+*/
+   val = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   if (val == MUSB_BABBLE_RCV_DISABLE) {
+   glue-sw_babble_enabled = true;
+   val |= MUSB_BABBLE_SW_SESSION_CTRL;
+   dsps_writeb(musb-mregs, MUSB_BABBLE_CTL, val);
+   }
+
ret = dsps_musb_dbg_init(musb, glue);
if (ret)
return ret;
@@ -591,14 +605,26 @@ static int dsps_musb_reset(struct musb *musb)
struct device *dev = musb-controller;
struct dsps_glue *glue = dev_get_drvdata(dev-parent);
const struct dsps_musb_wrapper *wrp = glue-wrp;
+   int session_restart = 0;
 
-   dsps_writel(musb-ctrl_base, wrp-control, (1  wrp-reset));
-   usleep_range(100, 200);
-   usb_phy_shutdown(musb-xceiv);
-   usleep_range(100, 200);
-   usb_phy_init(musb-xceiv);
+   if (glue-sw_babble_enabled)
+   session_restart = sw_babble_control(musb);
+   /*
+* In case of new silicon version babble condition can be recovered
+* without resetting the MUSB. But for older silicon versions, MUSB
+* reset is needed
+*/
+   if (session_restart || !glue-sw_babble_enabled) {
+   dev_info(musb-controller, Restarting MUSB to recover from 
Babble\n);
+   dsps_writel(musb-ctrl_base, wrp-control, (1  wrp-reset));
+   usleep_range(100, 200);
+   usb_phy_shutdown(musb-xceiv);
+   usleep_range(100, 200);
+   usb_phy_init(musb-xceiv);
+   session_restart = 1;
+   }
 
-   return 0;
+   return !session_restart;
 }
 
 static struct musb_platform_ops dsps_ops = {
-- 
1.8.3.1

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[PATCH v5 0/6] Add support for SW babble Control

[George Cherian]

Series add support for SW babble control logic found in 
new silicon versions of AM335x. Runtime differentiation of
silicon version is done by checking the BABBLE_CTL register.
For newer silicon the register default value read is 0x4 and
for older versions its 0x0.

Patch 1 - Handle Babble only if MUSB is in HOST mode
Patch 2 - Convert recover work to delayed work.
Patch 3 - usb_phy_vbus_(off/_on) are NOPs for am335x PHY
   so use usb_phy(_shutdown/_init) in musb_platform_reset()
Patch 4 - Add return value for musb_platform_reset() in prepration
   to support SW babble_ctrl
Patch 5 - Add the sw_babble_control()
Patch 6 - Enable sw babble control for newer silicon

v4 - v5 : Added a debug print before resetting MUSB.
   changed a musb_readb to dsps_readb introduced in Patch#5 of v4.

v3 - v4 : Fixes an issue in gagdet mode - BUS RESET should not
   be handled as a BABBLE. Added a check for the same.(Patch #1)
   Enable sw babble control properly (Patch #6)

v2 - v3 : Modify musb_platform_reset() to return zero on success.

George Cherian (6):
  usb: musb: core: Handle Babble condition only in HOST mode
  usb: musb: core: Convert babble recover work to delayed work
  usb: musb: dsps: Call usb_phy(_shutdown/_init) during
musb_platform_reset()
  usb: musb: core: Convert the musb_platform_reset to have a return
value.
  usb: musb: dsps: Add the sw_babble_control()
  usb: musb: dsps: Enable sw babble control for newer silicon

 drivers/usb/musb/musb_core.c | 27 --
 drivers/usb/musb/musb_core.h | 12 +++---
 drivers/usb/musb/musb_dsps.c | 87 ++--
 drivers/usb/musb/musb_regs.h |  7 
 4 files changed, 113 insertions(+), 20 deletions(-)

-- 
1.8.3.1

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[PATCH v5 2/6] usb: musb: core: Convert babble recover work to delayed work

[George Cherian]

During babble condition both first disconnect of devices are
initiated. Make sure MUSB controller is reset and re-initialized
after all disconnects.

To acheive this schedule a delayed work for babble rrecovery.

While at that convert udelay to usleep_range.
Refer Documentation/timers/timers-howto.txt

Signed-off-by: George Cherian george.cher...@ti.com
---
 drivers/usb/musb/musb_core.c | 15 ---
 drivers/usb/musb/musb_core.h |  2 +-
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index eff3c5c..8920b80 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -850,7 +850,8 @@ b_host:
 
/* handle babble condition */
if (int_usb  MUSB_INTR_BABBLE  is_host_active(musb))
-   schedule_work(musb-recover_work);
+   schedule_delayed_work(musb-recover_work,
+ msecs_to_jiffies(100));
 
 #if 0
 /* REVISIT ... this would be for multiplexing periodic endpoints, or
@@ -1753,16 +1754,16 @@ static void musb_irq_work(struct work_struct *data)
 /* Recover from babble interrupt conditions */
 static void musb_recover_work(struct work_struct *data)
 {
-   struct musb *musb = container_of(data, struct musb, recover_work);
+   struct musb *musb = container_of(data, struct musb, recover_work.work);
int status;
 
musb_platform_reset(musb);
 
usb_phy_vbus_off(musb-xceiv);
-   udelay(100);
+   usleep_range(100, 200);
 
usb_phy_vbus_on(musb-xceiv);
-   udelay(100);
+   usleep_range(100, 200);
 
/*
 * When a babble condition occurs, the musb controller removes the
@@ -1945,7 +1946,7 @@ musb_init_controller(struct device *dev, int nIrq, void 
__iomem *ctrl)
 
/* Init IRQ workqueue before request_irq */
INIT_WORK(musb-irq_work, musb_irq_work);
-   INIT_WORK(musb-recover_work, musb_recover_work);
+   INIT_DELAYED_WORK(musb-recover_work, musb_recover_work);
INIT_DELAYED_WORK(musb-deassert_reset_work, musb_deassert_reset);
INIT_DELAYED_WORK(musb-finish_resume_work, musb_host_finish_resume);
 
@@ -2041,7 +2042,7 @@ fail4:
 
 fail3:
cancel_work_sync(musb-irq_work);
-   cancel_work_sync(musb-recover_work);
+   cancel_delayed_work_sync(musb-recover_work);
cancel_delayed_work_sync(musb-finish_resume_work);
cancel_delayed_work_sync(musb-deassert_reset_work);
if (musb-dma_controller)
@@ -2107,7 +2108,7 @@ static int musb_remove(struct platform_device *pdev)
dma_controller_destroy(musb-dma_controller);
 
cancel_work_sync(musb-irq_work);
-   cancel_work_sync(musb-recover_work);
+   cancel_delayed_work_sync(musb-recover_work);
cancel_delayed_work_sync(musb-finish_resume_work);
cancel_delayed_work_sync(musb-deassert_reset_work);
musb_free(musb);
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index d155a15..9241025 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -297,7 +297,7 @@ struct musb {
 
irqreturn_t (*isr)(int, void *);
struct work_struct  irq_work;
-   struct work_struct  recover_work;
+   struct delayed_work recover_work;
struct delayed_work deassert_reset_work;
struct delayed_work finish_resume_work;
u16 hwvers;
-- 
1.8.3.1

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Re: [RFC PATCH 00/16] OMAP: GPMC: Restructure OMAP GPMC driver (NAND) : DT binding change proposal

[Roger Quadros]

Hi Ezequiel,

On 05/21/2014 07:08 PM, Ezequiel Garcia wrote:
 Hi Roger,
 
 On 21 May 02:20 PM, Roger Quadros wrote:

 For DT boot:
 - The GPMC controller node should have a chip select (CS) node for each used
   chip select. The CS node must have a child device node for each device
   attached to that chip select. Properties for that child are GPMC agnostic.

   i.e.
  gpmc {
  cs0 {
  nand0 {
  }
  };

  cs1 {
  nor0 {
  }
  }
  ...
  };

 
 While I agree that the GPMC driver is a bit messy, I'm not sure it's possible
 to go through such a complete devicetree binding re-design (breaking backwards
 compatibility) now that the binding is already in production.

Why not? especially if the existing bindings are poorly dones. Is anyone using 
these
bindings burning the DT into ROM and can't change it when they update the 
kernel?

I wouldn't bother much about backward compatibility but just focus on not 
breaking
functionality with all GPMC users while cleaning up the existing bindings.

 
 AFAIK, TI's SDK 7.0 is released, with a v3.8.x kernel which uses this GPMC
 binding. And then you have the ISEE board too, using this binding.

How does this prevent them from not using the new bindings when they update the 
kernel?

 
 Also, what's the problem with the current devicetree binding (not that I'm fan
 of it)?
 

The existing binding uses this format

gpmc {
ranges cs-num 0 IO_partition_start IO_partition_size,
cs-num 0 IO_partition_start IO_partition_size,
...

node-name0 {
compatible = id for device on this chip select;
reg = cs-num IO_offset IO_size;

gpmc cs properties;

device specific properties;
};

node-name1 {
...
};
};

with requirements that
- chip select number (cs-num) is encoded in range id
- child's node-name is used to identify device type (NAND, Onenand, etc) and 
driver expects that.

All this results in the following issues
- No way to define entire GPMC I/O map (typically 1st 1GB), without assigning 
them to a Chip select. i.e. incomplete hardware description.
  TI SoCs variants can have different GPMC I/O sizes, some can have 512MB 
others can have 1GB. There needs to be a way to specify that.
- No clean way to specify GPMC register map for use by child nodes. NAND 
controller which can be one of the children needs to use the GPMC register map.
- Tricky to define multiple devices within a single chip select region.
- Uses node name to identify device type like nand and onenand. Doesn't use 
compatible id for them.
- GPMC CS properties are mixed with device properties, resulting in unnecessary 
binding documents like
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/gpmc-eth.txt
http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/mtd/gpmc-nor.txt

To solve these issues, I'm proposing the following format

gpmc {
ranges 0 0 IO_start IO_size/* entire GPMC I/O 
space e.g. 1GB or 512MB */
1 0 Reg_start Reg_size;/* GPMC register space 
*/

cs0 {
ranges 0 0 IO_partition_start IO_partition_size;  
/* CS0 IO partition e.g. 16MB */

gpmc,cs-num = 0;  /* pass chip select 
number explicitly */
gpmc cs properties;

dev0 {
compatible = id for device on this chip 
select;
reg = 0 IO_offset IO_size  
/* Device IO region e.g. 1KB */
1 Reg_offset Reg_size;

device specific properties;
};

dev1 {
...
};
};

cs1 {
...
};
};

All I'm doing is splitting up the CS node and the device node and removing the 
cs-num encoding from the ranges property.
This results in a much cleaner DT binding and code.

The format is similar to the one used by the ti-aemif driver.
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt

Having a unified format for all TI memory controllers will make life much 
easier for us.

cheers,
-roger
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Re: [RFC PATCH 08/16] mtd: nand: omap: Fix build warning

[Roger Quadros]

On 05/22/2014 03:54 AM, Jingoo Han wrote:
 On Wednesday, May 21, 2014 8:21 PM, Roger Quadros wrote:

 Fix the following warning when CONFIG_MTD_NAND_OMAP_BCH is disabled.
 warning: ‘erased_sector_bitflips’ defined but not used [-Wunused-function]

 Signed-off-by: Roger Quadros rog...@ti.com
 
 (+cc Christian Engelmayer)
 
 The same patch was already sent by Christian Engelmayer. [1]
 Also, it was applied to mtd tree by Brian Norris. [2]
 Thank you.
 
 [1] http://lists.infradead.org/pipermail/linux-mtd/2014-April/053330.html
 [2] 
 http://git.infradead.org/users/dedekind/l2-mtd.git/commit/9fd6c6c18c1a4a3220473c76fd447c5708b5ecf9

Great! thanks for the information.

I'll drop this patch from my series.

cheers,
-roger

 
 ---
  drivers/mtd/nand/omap2.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
 index 1ff49b8..1b800bc 100644
 --- a/drivers/mtd/nand/omap2.c
 +++ b/drivers/mtd/nand/omap2.c
 @@ -1237,6 +1237,7 @@ static int __maybe_unused 
 omap_calculate_ecc_bch(struct mtd_info *mtd,
  return 0;
  }

 +#ifdef CONFIG_MTD_NAND_OMAP_BCH
  /**
   * erased_sector_bitflips - count bit flips
   * @data:   data sector buffer
 @@ -1276,7 +1277,6 @@ static int erased_sector_bitflips(u_char *data, u_char 
 *oob,
  return flip_bits;
  }

 -#ifdef CONFIG_MTD_NAND_OMAP_BCH
  /**
   * omap_elm_correct_data - corrects page data area in case error reported
   * @mtd:MTD device structure
 --
 1.8.3.2
 

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Re: RCU stall on panda

[Alex Shi]

On 05/16/2014 09:37 PM, Santosh Shilimkar wrote:
 On Friday 16 May 2014 03:41 AM, Alex Shi wrote:
 On 05/16/2014 02:36 AM, Santosh Shilimkar wrote:
 yes.
 My board is panda ES. without this revert, it works.

 Care to specify what linux version you are testing against?

 Does it hang in idle always immediately on booting?

 Or does the serial console first hang with sysrq still
 working (ctrl-a h in minicom for help) with device
 eventually locking up hard?

 I just posted an updated patch Alex on other thread.
 Attaching here again for your reference. Please try
 it out and see if the you still get a hang.

 it does not hang this time.

 This is good news and exactly what I expected.
  
 but I am not sure it can solve my problem, since RCU stall is not easy
 to reproduce in short time.

 You may want to run the system longer if you can. I suspect the RCU stall
 was also side effect of missing interrupts.

Sure. it do remove the RCU stall on my panda board.

 
 Regards,
 Santosh
 


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[PATCH 0/2] regulator: palmas: Reemove open coded functions with helper functions

[Keerthy]

The patch series makes use of the helper functions and remove open coded
functions. The patch set also formats the palmas header file. Converts all
the offset values to hexadecimal. 

Boot Tested on omap5-uevm board.

Keerthy (2):
  regulator: palmas: Make use of helper functions and remove open coded
functions
  mfd: palmas: Format the header file

 drivers/regulator/palmas-regulator.c |  158 +--
 include/linux/mfd/palmas.h   | 2166 +-
 2 files changed, 1109 insertions(+), 1215 deletions(-)

-- 
1.7.9.5

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[PATCH 1/2] regulator: palmas: Reemove open coded functions with helper functions

[Keerthy]

Reemove open coded functions with helper functions.

Signed-off-by: Keerthy j-keer...@ti.com
---
 drivers/regulator/palmas-regulator.c |  158 ++
 1 file changed, 26 insertions(+), 132 deletions(-)

diff --git a/drivers/regulator/palmas-regulator.c 
b/drivers/regulator/palmas-regulator.c
index 9c62b1d..9602eba 100644
--- a/drivers/regulator/palmas-regulator.c
+++ b/drivers/regulator/palmas-regulator.c
@@ -36,6 +36,18 @@ struct regs_info {
int sleep_id;
 };
 
+static const struct regulator_linear_range smps_low_ranges[] = {
+   REGULATOR_LINEAR_RANGE(50, 0x1, 0x6, 0),
+   REGULATOR_LINEAR_RANGE(51, 0x7, 0x79, 1),
+   REGULATOR_LINEAR_RANGE(165, 0x7A, 0x7f, 0),
+};
+
+static const struct regulator_linear_range smps_high_ranges[] = {
+   REGULATOR_LINEAR_RANGE(100, 0x1, 0x6, 0),
+   REGULATOR_LINEAR_RANGE(102, 0x7, 0x79, 2),
+   REGULATOR_LINEAR_RANGE(330, 0x7A, 0x7f, 0),
+};
+
 static const struct regs_info palmas_regs_info[] = {
{
.name   = SMPS12,
@@ -280,54 +292,6 @@ static int palmas_ldo_write(struct palmas *palmas, 
unsigned int reg,
return regmap_write(palmas-regmap[REGULATOR_SLAVE], addr, value);
 }
 
-static int palmas_is_enabled_smps(struct regulator_dev *dev)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(dev);
-   int id = rdev_get_id(dev);
-   unsigned int reg;
-
-   palmas_smps_read(pmic-palmas, palmas_regs_info[id].ctrl_addr, reg);
-
-   reg = PALMAS_SMPS12_CTRL_STATUS_MASK;
-   reg = PALMAS_SMPS12_CTRL_STATUS_SHIFT;
-
-   return !!(reg);
-}
-
-static int palmas_enable_smps(struct regulator_dev *dev)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(dev);
-   int id = rdev_get_id(dev);
-   unsigned int reg;
-
-   palmas_smps_read(pmic-palmas, palmas_regs_info[id].ctrl_addr, reg);
-
-   reg = ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
-   if (pmic-current_reg_mode[id])
-   reg |= pmic-current_reg_mode[id];
-   else
-   reg |= SMPS_CTRL_MODE_ON;
-
-   palmas_smps_write(pmic-palmas, palmas_regs_info[id].ctrl_addr, reg);
-
-   return 0;
-}
-
-static int palmas_disable_smps(struct regulator_dev *dev)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(dev);
-   int id = rdev_get_id(dev);
-   unsigned int reg;
-
-   palmas_smps_read(pmic-palmas, palmas_regs_info[id].ctrl_addr, reg);
-
-   reg = ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
-
-   palmas_smps_write(pmic-palmas, palmas_regs_info[id].ctrl_addr, reg);
-
-   return 0;
-}
-
 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
 {
struct palmas_pmic *pmic = rdev_get_drvdata(dev);
@@ -382,81 +346,6 @@ static unsigned int palmas_get_mode_smps(struct 
regulator_dev *dev)
return 0;
 }
 
-static int palmas_list_voltage_smps(struct regulator_dev *dev,
-   unsigned selector)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(dev);
-   int id = rdev_get_id(dev);
-   int mult = 1;
-
-   /* Read the multiplier set in VSEL register to return
-* the correct voltage.
-*/
-   if (pmic-range[id])
-   mult = 2;
-
-   if (selector == 0)
-   return 0;
-   else if (selector  6)
-   return 50 * mult;
-   else
-   /* Voltage is linear mapping starting from selector 6,
-* volt = (0.49V + ((selector - 5) * 0.01V)) * RANGE
-* RANGE is either x1 or x2
-*/
-   return (49 + ((selector - 5) * 1)) * mult;
-}
-
-static int palmas_map_voltage_smps(struct regulator_dev *rdev,
-   int min_uV, int max_uV)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
-   int id = rdev_get_id(rdev);
-   int ret, voltage;
-
-   if (min_uV == 0)
-   return 0;
-
-   if (pmic-range[id]) { /* RANGE is x2 */
-   if (min_uV  100)
-   min_uV = 100;
-   ret = DIV_ROUND_UP(min_uV - 100, 2) + 6;
-   } else {/* RANGE is x1 */
-   if (min_uV  50)
-   min_uV = 50;
-   ret = DIV_ROUND_UP(min_uV - 50, 1) + 6;
-   }
-
-   /* Map back into a voltage to verify we're still in bounds */
-   voltage = palmas_list_voltage_smps(rdev, ret);
-   if (voltage  min_uV || voltage  max_uV)
-   return -EINVAL;
-
-   return ret;
-}
-
-static int palma_smps_set_voltage_smps_time_sel(struct regulator_dev *rdev,
-   unsigned int old_selector, unsigned int new_selector)
-{
-   struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
-   int id = rdev_get_id(rdev);
-   int old_uv, new_uv;
-   unsigned int ramp_delay = pmic-ramp_delay[id];
-
-   if (!ramp_delay)
-   return 0;
-
-   old_uv = 

Re: [PATCH v3 09/13] dt/bindings: ti,edma: Remove redundant properties from documentation

[Sekhar Nori]

On Monday 19 May 2014 01:45 PM, Sekhar Nori wrote:
 + DT maintainers
 
 On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
 From CCCFG register of eDMA3 we can get all the needed information for the
 driver about the IP:
 Number of channels: NUM_DMACH
 Number of regions: NUM_REGN
 Number of slots (PaRAM sets): NUM_PAENTRY
 Number of TC/EQ: NUM_EVQUE

 The ti,edma-regions; ti,edma-slots and dma-channels in DT are
 redundant since the very same information can be obtained from the HW.
 The mentioned properties are deprecated.

 Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
 
 DT maintainers,
 
 Can I get an ack on deprecation of these bindings? We are using hardware
 to detect the same properties so it should not cause any backward
 compatibility issue when moving to newer kernels while keeping the same DTB.
 
 Link to last mail on this topic as part of v2 thread:
 
 http://lkml.iu.edu/hypermail/linux/kernel/1405.1/05152.html

Ping. Sorry for being a pest, but this ack is the only thing holding
this series up. I would hate this series to miss the v3.16 deadline.

Thanks,
Sekhar

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Re: [PATCH 1/2] regulator: palmas: Reemove open coded functions with helper functions

[Mark Brown]

On Thu, May 22, 2014 at 02:48:29PM +0530, Keerthy wrote:
 Reemove open coded functions with helper functions.

Applied, thanks - nice cleanup.


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Description: Digital signature

Re: [PATCH v5 5/6] usb: musb: dsps: Add the sw_babble_control()

[Sergei Shtylyov]

Hello.

On 22-05-2014 10:29, George Cherian wrote:


Add sw_babble_control() logic to differentiate between transient
babble and real babble condition. Also add the SW babble control
register definitions.



Babble control register logic is implemented in the latest
revision of AM335x.



Signed-off-by: George Cherian george.cher...@ti.com


   Sorry for the late comments, I probably didn't pay enough attention to 
this series before...



diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index f6f3087..868caf8 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -536,6 +536,56 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode)
return 0;
  }

+static int sw_babble_control(struct musb *musb)


   Perhaps the result type should be *bool* instead of *int*?


+{
+   int timeout = 10;
+   u8 babble_ctl, session_restart = 0;
+
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   dev_dbg(musb-controller, babble: MUSB_BABBLE_CTL value %x\n,
+   babble_ctl);
+   /*
+* check line monitor flag to check whether babble is
+* due to noise
+*/
+   dev_dbg(musb-controller, STUCK_J is %s\n,
+   babble_ctl  MUSB_BABBLE_STUCK_J ? set : reset);
+
+   if (babble_ctl  MUSB_BABBLE_STUCK_J) {


   'timeout' could be declared here, local to the block using it.


+   /*
+* babble is due to noise, then set transmit idle (d7 bit)
+* to resume normal operation
+*/
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
+   dsps_writeb(musb-mregs, MUSB_BABBLE_CTL, babble_ctl);
+
+   /* wait till line monitor flag cleared */
+   dev_dbg(musb-controller, Set TXIDLE, wait J to clear\n);
+   do {
+   babble_ctl = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   udelay(1);
+   } while ((babble_ctl  MUSB_BABBLE_STUCK_J)  timeout--);
+
+   /* check whether stuck_at_j bit cleared */
+   if (babble_ctl  MUSB_BABBLE_STUCK_J) {
+   /*
+* real babble condition is occured


   s/is occured/has occurred/.


+* restart the controller to start the
+* session again
+*/
+   dev_dbg(musb-controller, J not cleared, misc (%x)\n,
+   babble_ctl);
+   session_restart = 1;
+   }
+


   Empty line not needed here.


+   } else {
+   session_restart = 1;
+   }
+
+   return session_restart;
+}


WBR, Sergei

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Re: [PATCH v5 5/6] usb: musb: dsps: Add the sw_babble_control()

[Sergei Shtylyov]

On 22-05-2014 10:29, George Cherian wrote:


Add sw_babble_control() logic to differentiate between transient
babble and real babble condition. Also add the SW babble control
register definitions.



Babble control register logic is implemented in the latest
revision of AM335x.



Signed-off-by: George Cherian george.cher...@ti.com
---
  drivers/usb/musb/musb_dsps.c | 50 
  drivers/usb/musb/musb_regs.h |  7 +++
  2 files changed, 57 insertions(+)



diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index f6f3087..868caf8 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -536,6 +536,56 @@ static int dsps_musb_set_mode(struct musb *musb, u8 mode)
return 0;
  }

+static int sw_babble_control(struct musb *musb)
+{


   Doesn't gcc complain on this function being unused? I think you should 
have added this function along with the caller, not separately.


WBR, Sergei

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Re: [PATCH v3 3/4] mfd: tps65917: Add driver for the TPS65917 PMIC

[Lee Jones]

 The TPS65917 chip is a power management IC for Portable Navigation Systems
 and Tablet Computing devices. It contains the following components:
 
   - Regulators.
   - Over Temperature warning and Shut down.
 
 This patch adds support for tps65917 mfd device. At this time only
 the regulator functionality is made available.
 
 Signed-off-by: Keerthy j-keer...@ti.com
 ---
 v3 Changes:
 
   * Header file formating
   * Changed the cache_type to REGCACHE_RBTREE
   * removed unnecessary code
   * Corrected documentation style
   * Added pm_power_off function
 
   v2 Changes:
 
   * Added volatile register check as some of the registers
 in the set are volatile.
 drivers/mfd/Kconfig  |   12 +
   drivers/mfd/Makefile |1 +
   drivers/mfd/tps65917.c   |  594 +
   include/linux/mfd/tps65917.h | 1485 
  ++
   4 files changed, 2092 insertions(+)
   create mode 100644 drivers/mfd/tps65917.c
   create mode 100644 include/linux/mfd/tps65917.h

[...]

 +   for (i = 0; i  TPS65917_NUM_CLIENTS; i++) {
 +   if (i == 0) {
 +   tps65917-i2c_clients[i] = i2c;
 This is messy.  Move this line out of the loop and change the loop
 parameters to start from 1.  Then we can reduce all of this
 unnecessary indentation.
 
 There is a common thing we do after if and else. Removing i == 0
 part out of the
 loop would mean repeating the common part. This way seems
 better.

Ah yes, good point.

 +   } else {
 +   tps65917-i2c_clients[i] =
 +   i2c_new_dummy(i2c-adapter,
 + i2c-addr + i);
 +   if (!tps65917-i2c_clients[i]) {
 +   dev_err(tps65917-dev,
 +   can't attach client %d\n, i);
 +   ret = -ENOMEM;
 +   goto err_i2c;
 +   }
 +
 +   tps65917-i2c_clients[i]-dev.of_node = 
 of_node_get(node);
 Don't forget to decrement the reference when you've finished with it.
 
 I did not get this.

Do you know what of_node_get() does?

[...]

 What happens if !node?  Then no children get registered and this has
 all been a waste of time?
 Only DT way is possible. This check is redundant. I will add a check
 at the beginning for !node.

If that's the case you should add 'depends on OF' in the Kconfig.

 +struct tps65917_reg_init {
 +   /*
 +* 0: reload default values from OTP on warm reset
 +* 1: maintain voltage from VSEL on warm reset
 +*/
 +   bool warm_reset;
 Where is this used?
 
 +   /*
 +* 0: i2c selection of voltage
 +* 1: pin selection of voltage.
 +*/
 +   bool roof_floor;
 And this?
 
 +   /*
 +* For SMPS
 +*
 +* 0: Off
 +* 1: AUTO
 +* 2: ECO
 +* 3: Forced PWM
 +*
 +* For LDO
 +*
 +* 0: Off
 +* 1: On
 +*/
 +   int mode_sleep;
 And this?
 
 +   u8 vsel;
 And this?
 
 All of the above can be used by regulator driver.

Doesn't the regulator driver have its own header file?  Why are these
in a shared file if they're not used anywhere else?

[...]

 +   if (pdata-mux_from_pdata) {
 +   reg = pdata-pad1;
 +   ret = regmap_write(tps65917-regmap[slave], addr, reg);
 +   if (ret)
 +   goto err_irq;
 +   } else {
 +   ret = regmap_read(tps65917-regmap[slave], addr, reg);
 +   if (ret)
 +   goto err_irq;
 +   }
 What does the read do?  You're not doing anything with the value.
 
 This pad1 and pad2 stuff is not needed. I will remove this.

Then why is it in here?

Did you copy this code from somewhere, if so, where? 

Okay, I just answered my own question.  There is so much common code
in between this and palmas, there is no way I'm going to accept this
driver.  Please merge it in with the palmas driver!

-- 
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Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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Re: [RFC PATCH 00/16] OMAP: GPMC: Restructure OMAP GPMC driver (NAND) : DT binding change proposal

[Javier Martinez Canillas]

Hello Roger,

On Thu, May 22, 2014 at 10:12 AM, Roger Quadros rog...@ti.com wrote:
 Hi Ezequiel,

 On 05/21/2014 07:08 PM, Ezequiel Garcia wrote:
 Hi Roger,

 On 21 May 02:20 PM, Roger Quadros wrote:

 For DT boot:
 - The GPMC controller node should have a chip select (CS) node for each used
   chip select. The CS node must have a child device node for each device
   attached to that chip select. Properties for that child are GPMC agnostic.

   i.e.
  gpmc {
  cs0 {
  nand0 {
  }
  };

  cs1 {
  nor0 {
  }
  }
  ...
  };


 While I agree that the GPMC driver is a bit messy, I'm not sure it's possible
 to go through such a complete devicetree binding re-design (breaking 
 backwards
 compatibility) now that the binding is already in production.

 Why not? especially if the existing bindings are poorly dones. Is anyone 
 using these
 bindings burning the DT into ROM and can't change it when they update the 
 kernel?


While I do agree that your DT bindings are much better than the
current ones, there is a policy that DT bindings are an external API
and once are released with a kernel are set in stone and can't be
changed.

The rationale here is that DT only describes hardware and since
hardware does not change, there is no need to change the DT on
subsequent kernel releases.

While that may be true in theory, in practice our understanding of the
hardware keeps evolving. It may be possible that the person adding
those binding didn't understand the hardware fully or did not have
access to all the documentation.

So given that the GPMC bindings are really awful maybe we can make an
exception here? I don't even know who should decide this, if Tony as
OMAP maintainer or the DT maintainers.

 I wouldn't bother much about backward compatibility but just focus on not 
 breaking
 functionality with all GPMC users while cleaning up the existing bindings.


 AFAIK, TI's SDK 7.0 is released, with a v3.8.x kernel which uses this GPMC
 binding. And then you have the ISEE board too, using this binding.

 How does this prevent them from not using the new bindings when they update 
 the kernel?


In the particular case of ISEE boards, the vendor still ships a very
old kernel that uses board files and platform data so probably is not
an issue for mainline users to update their DTB but I see that there
are many users of the GPMC binding in mainline:

$ git grep gpmc[:@_a-zA-Z0-9]* { arch/arm/boot/dts/ | wc -l
36


 Also, what's the problem with the current devicetree binding (not that I'm 
 fan
 of it)?


Like Ezequiel said, I'm not a big fan of the current binding neither
but I don't know how safe is to break backward compatibility at this
point.

Best regards,
Javier


 The existing binding uses this format

 gpmc {
 ranges cs-num 0 IO_partition_start IO_partition_size,
 cs-num 0 IO_partition_start IO_partition_size,
 ...

 node-name0 {
 compatible = id for device on this chip select;
 reg = cs-num IO_offset IO_size;

 gpmc cs properties;

 device specific properties;
 };

 node-name1 {
 ...
 };
 };

 with requirements that
 - chip select number (cs-num) is encoded in range id
 - child's node-name is used to identify device type (NAND, Onenand, etc) and 
 driver expects that.

 All this results in the following issues
 - No way to define entire GPMC I/O map (typically 1st 1GB), without assigning 
 them to a Chip select. i.e. incomplete hardware description.
   TI SoCs variants can have different GPMC I/O sizes, some can have 512MB 
 others can have 1GB. There needs to be a way to specify that.
 - No clean way to specify GPMC register map for use by child nodes. NAND 
 controller which can be one of the children needs to use the GPMC register 
 map.
 - Tricky to define multiple devices within a single chip select region.
 - Uses node name to identify device type like nand and onenand. Doesn't use 
 compatible id for them.
 - GPMC CS properties are mixed with device properties, resulting in 
 unnecessary binding documents like
 http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/net/gpmc-eth.txt
 http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/mtd/gpmc-nor.txt

 To solve these issues, I'm proposing the following format

 gpmc {
 ranges 0 0 IO_start IO_size/* entire GPMC I/O 
 space e.g. 1GB or 512MB */
 1 0 Reg_start Reg_size;/* GPMC register 
 space */

 cs0 {
 ranges 0 0 IO_partition_start IO_partition_size;
   /* CS0 IO partition e.g. 16MB */

 

Re: [PATCH v5 6/6] usb: musb: dsps: Enable sw babble control for newer silicon

[Sergei Shtylyov]

Hello.

On 22-05-2014 10:29, George Cherian wrote:


Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.



Signed-off-by: George Cherian george.cher...@ti.com
---
  drivers/usb/musb/musb_dsps.c | 38 --
  1 file changed, 32 insertions(+), 6 deletions(-)



diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 868caf8..2ced061 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c

[...]

@@ -469,6 +470,19 @@ static int dsps_musb_init(struct musb *musb)
val = ~(1  wrp-otg_disable);
dsps_writel(musb-ctrl_base, wrp-phy_utmi, val);

+   /*
+*  Check whether the dsps version has babble control enabled.


   One space too many before this sentence.


+* In latest silicon revision the babble control logic is enabled.
+* If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
+* logic enabled.
+*/
+   val = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+   if (val == MUSB_BABBLE_RCV_DISABLE) {
+   glue-sw_babble_enabled = true;
+   val |= MUSB_BABBLE_SW_SESSION_CTRL;
+   dsps_writeb(musb-mregs, MUSB_BABBLE_CTL, val);
+   }
+


   Hm, from the register offset that you declared in the previous patch, I 
got an impression that this is a new standard MUSB register? Shouldn't this 
check be done in the generic MUSB code then?


WBR, Sergei

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[PATCH] OMAPDSS: move 'compatible' converter to omapdss driver

[Tomi Valkeinen]

Move the panel/encoder driver compatible-string converter from
arch/arm/mach-omap2/display.c to omapdss driver. That is a more logical
place for it, as it's really an omapdss internal hack.

The code is rewritten to follow the video node graph, starting from
omapdss. This removes the need to have the device compatible-string
database.

Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
 arch/arm/mach-omap2/display.c |  56 --
 drivers/video/fbdev/omap2/Makefile|   2 +-
 drivers/video/fbdev/omap2/dss/Kconfig |   4 +
 drivers/video/fbdev/omap2/dss/Makefile|   1 +
 drivers/video/fbdev/omap2/dss/omapdss-boot-init.c | 229 ++
 5 files changed, 235 insertions(+), 57 deletions(-)
 create mode 100644 drivers/video/fbdev/omap2/dss/omapdss-boot-init.c

diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 16d33d831287..519a20fc0432 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -555,65 +555,9 @@ int omap_dss_reset(struct omap_hwmod *oh)
return r;
 }
 
-/* list of 'compatible' nodes to convert to omapdss specific */
-static const char * const dss_compat_conv_list[] __initconst = {
-   composite-connector,
-   dvi-connector,
-   hdmi-connector,
-   panel-dpi,
-   panel-dsi-cm,
-   sony,acx565akm,
-   svideo-connector,
-   ti,tfp410,
-   ti,tpd12s015,
-};
-
-/* prepend compatible string with omapdss, */
-static __init void omapdss_omapify_node(struct device_node *node,
-   const char *compat)
-{
-   char *new_compat;
-   struct property *prop;
-
-   new_compat = kasprintf(GFP_KERNEL, omapdss,%s, compat);
-
-   prop = kzalloc(sizeof(*prop), GFP_KERNEL);
-
-   if (!prop) {
-   pr_err(omapdss_omapify_node: kzalloc failed\n);
-   return;
-   }
-
-   prop-name = compatible;
-   prop-value = new_compat;
-   prop-length = strlen(new_compat) + 1;
-
-   of_update_property(node, prop);
-}
-
-/*
- * As omapdss panel drivers are omapdss specific, but we want to define the
- * DT-data in generic manner, we convert the compatible strings of the panel
- * nodes from panel-foo to omapdss,panel-foo. This way we can have both
- * correct DT data and omapdss specific drivers.
- *
- * When we get generic panel drivers to the kernel, this will be removed.
- */
 void __init omapdss_early_init_of(void)
 {
-   int i;
-
-   for (i = 0; i  ARRAY_SIZE(dss_compat_conv_list); ++i) {
-   const char *compat = dss_compat_conv_list[i];
-   struct device_node *node = NULL;
-
-   while ((node = of_find_compatible_node(node, NULL, compat))) {
-   if (!of_device_is_available(node))
-   continue;
 
-   omapdss_omapify_node(node, compat);
-   }
-   }
 }
 
 struct device_node * __init omapdss_find_dss_of_node(void)
diff --git a/drivers/video/fbdev/omap2/Makefile 
b/drivers/video/fbdev/omap2/Makefile
index bf8127df8c71..f8745ec369cc 100644
--- a/drivers/video/fbdev/omap2/Makefile
+++ b/drivers/video/fbdev/omap2/Makefile
@@ -1,5 +1,5 @@
 obj-$(CONFIG_OMAP2_VRFB) += vrfb.o
 
-obj-$(CONFIG_OMAP2_DSS) += dss/
+obj-y += dss/
 obj-y += displays-new/
 obj-$(CONFIG_FB_OMAP2) += omapfb/
diff --git a/drivers/video/fbdev/omap2/dss/Kconfig 
b/drivers/video/fbdev/omap2/dss/Kconfig
index dde4281663b1..a28f3a39ab1b 100644
--- a/drivers/video/fbdev/omap2/dss/Kconfig
+++ b/drivers/video/fbdev/omap2/dss/Kconfig
@@ -1,6 +1,10 @@
+config OMAP2_DSS_INIT
+   bool
+
 menuconfig OMAP2_DSS
 tristate OMAP2+ Display Subsystem support
select VIDEOMODE_HELPERS
+   select OMAP2_DSS_INIT
 help
  OMAP2+ Display Subsystem support.
 
diff --git a/drivers/video/fbdev/omap2/dss/Makefile 
b/drivers/video/fbdev/omap2/dss/Makefile
index 8aec8bda27cc..3b79ad74f2e1 100644
--- a/drivers/video/fbdev/omap2/dss/Makefile
+++ b/drivers/video/fbdev/omap2/dss/Makefile
@@ -1,3 +1,4 @@
+obj-$(CONFIG_OMAP2_DSS_INIT) += omapdss-boot-init.o
 obj-$(CONFIG_OMAP2_DSS) += omapdss.o
 # Core DSS files
 omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \
diff --git a/drivers/video/fbdev/omap2/dss/omapdss-boot-init.c 
b/drivers/video/fbdev/omap2/dss/omapdss-boot-init.c
new file mode 100644
index ..99af9e88b2d8
--- /dev/null
+++ b/drivers/video/fbdev/omap2/dss/omapdss-boot-init.c
@@ -0,0 +1,229 @@
+/*
+ * Copyright (C) 2014 Texas Instruments
+ * Author: Tomi Valkeinen tomi.valkei...@ti.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR 

Re: [PATCH v5 6/6] usb: musb: dsps: Enable sw babble control for newer silicon

[George Cherian]

On 5/22/2014 5:28 PM, Sergei Shtylyov wrote:

Hello.

On 22-05-2014 10:29, George Cherian wrote:


Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.



Signed-off-by: George Cherian george.cher...@ti.com
---
  drivers/usb/musb/musb_dsps.c | 38 
--

  1 file changed, 32 insertions(+), 6 deletions(-)



diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 868caf8..2ced061 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c

[...]

@@ -469,6 +470,19 @@ static int dsps_musb_init(struct musb *musb)
  val = ~(1  wrp-otg_disable);
  dsps_writel(musb-ctrl_base, wrp-phy_utmi, val);

+/*
+ *  Check whether the dsps version has babble control enabled.


   One space too many before this sentence.


+ * In latest silicon revision the babble control logic is enabled.
+ * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
+ * logic enabled.
+ */
+val = dsps_readb(musb-mregs, MUSB_BABBLE_CTL);
+if (val == MUSB_BABBLE_RCV_DISABLE) {
+glue-sw_babble_enabled = true;
+val |= MUSB_BABBLE_SW_SESSION_CTRL;
+dsps_writeb(musb-mregs, MUSB_BABBLE_CTL, val);
+}
+


   Hm, from the register offset that you declared in the previous 
patch, I got an impression that this is a new standard MUSB register? 

Its very AM335x MUSB specific register, not a standard one.
Unfortunately the designers put it as part of MUSB core regs.

Shouldn't this check be done in the generic MUSB code then?

WBR, Sergei




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Re: RCU stall on panda

[Santosh Shilimkar]

On Thursday 22 May 2014 04:59 AM, Alex Shi wrote:
 On 05/16/2014 09:37 PM, Santosh Shilimkar wrote:
 On Friday 16 May 2014 03:41 AM, Alex Shi wrote:
 On 05/16/2014 02:36 AM, Santosh Shilimkar wrote:
 yes.
 My board is panda ES. without this revert, it works.

 Care to specify what linux version you are testing against?

 Does it hang in idle always immediately on booting?

 Or does the serial console first hang with sysrq still
 working (ctrl-a h in minicom for help) with device
 eventually locking up hard?

 I just posted an updated patch Alex on other thread.
 Attaching here again for your reference. Please try
 it out and see if the you still get a hang.

 it does not hang this time.

 This is good news and exactly what I expected.
  
 but I am not sure it can solve my problem, since RCU stall is not easy
 to reproduce in short time.

 You may want to run the system longer if you can. I suspect the RCU stall
 was also side effect of missing interrupts.
 
 Sure. it do remove the RCU stall on my panda board.
 
Thanks for confirming. Tony already send fix upstream so it should
show up in next rc mostly

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Re: [RFC PATCH 00/16] OMAP: GPMC: Restructure OMAP GPMC driver (NAND) : DT binding change proposal

[Ezequiel Garcia]

On 22 May 01:51 PM, Javier Martinez Canillas wrote:
 On Thu, May 22, 2014 at 10:12 AM, Roger Quadros rog...@ti.com wrote:
  On 21 May 02:20 PM, Roger Quadros wrote:
 
  For DT boot:
  - The GPMC controller node should have a chip select (CS) node for each 
  used
chip select. The CS node must have a child device node for each device
attached to that chip select. Properties for that child are GPMC 
  agnostic.
 
i.e.
   gpmc {
   cs0 {
   nand0 {
   }
   };
 
   cs1 {
   nor0 {
   }
   }
   ...
   };
 
 
  While I agree that the GPMC driver is a bit messy, I'm not sure it's 
  possible
  to go through such a complete devicetree binding re-design (breaking 
  backwards
  compatibility) now that the binding is already in production.
 
  Why not? especially if the existing bindings are poorly dones. Is anyone 
  using these
  bindings burning the DT into ROM and can't change it when they update the 
  kernel?
 
 
 While I do agree that your DT bindings are much better than the
 current ones, there is a policy that DT bindings are an external API
 and once are released with a kernel are set in stone and can't be
 changed.
 

Exactly. The DT binding is considered an ABI. Thus, invariant across kernel
versions. Users can't be coherced into a DTB update after a kernel update.

That said, I don't really care if you break compatilibity in this case.
Rather, I'm suggesting that you make sure this change is going to be accepted
upstream, before doing any more work. The DT maintainers are reluctant to do
so.

On the other side, I guess you will also break bisectability while breaking
backward compatibility. Doesn't sound very nice.
-- 
Ezequiel García, Free Electrons
Embedded Linux, Kernel and Android Engineering
http://free-electrons.com
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RE: [PATCH v4 3/4] mtd: nand: omap: add support for BCH16_ECC - NAND driver updates

[Gupta, Pekon]

Hi Brian,

From: Brian Norris
On Mon, May 19, 2014 at 01:24:41PM +0530, Pekon Gupta wrote:
 --- a/drivers/mtd/nand/omap2.c
 +++ b/drivers/mtd/nand/omap2.c
 @@ -1201,6 +1219,41 @@ static int __maybe_unused 
 omap_calculate_ecc_bch(struct mtd_info
*mtd,
  *ecc_code++ = ((bch_val1  4)  0xFF);
  *ecc_code++ = ((bch_val1  0xF)  4);
  break;
 +case OMAP_ECC_BCH16_CODE_HW:
 +val = readl(gpmc_regs-gpmc_bch_result6[i]);

For all of these 'gpmc_bch_resultX' fields, couldn't you make this into
a 2-D array? So to access BCH result 6 at sector i, it would be:

   val = readl(gpmc_regs-gpmc_bch_result[6][i];

This could help you to rewrite some of this stuff as loops, instead of
giant blocks of copy-paste-modify.


Thanks for excepting the series. With this series OMAP NAND driver
comes to a stable point supporting NAND boot on all latest platforms.

I had earlier experimented with something similar to your suggestions
but these clean-ups require update in multiple drivers (GPMC, NAND, ...),
and it was becoming messy, so I dropped it. There are some practical
challenges to this type of clean-up like;

(1) GPMC register addresses here gpmc_regs are initialized in GPMC driver
 So your suggested changes will affect multiple subsystems, hence
This type of clean-up is bit deferred from sometime.


(2) The register space for gpmc_bch_results is not contiguous.
GPMC_BCH_RESULT_0   RW  0x240-0x2B0
GPMC_BCH_RESULT_1   RW  0x244-0x2B4
GPMC_BCH_RESULT_2   RW  0x248-0x2B8
GPMC_BCH_RESULT_3   RW  0x24C-0x2BC
[...]
GPMC_BCH_RESULT_4   RW  0x300-0x370
GPMC_BCH_RESULT_5   RW  0x304-0x374
GPMC_BCH_RESULT_6   RW  0x308-0x378

This is because older version of GPMC hardware IP  (like in OMAP3)
supported only till BCH8 ecc-scheme. Later same hardware IP was
extended to support BCH16. So newer platforms have extended
register-map. So it was felt that instead of having separate for..loops
lets continue with replicating all 7 GPMC_BCH_RESULT registers.


 +ecc_code[0]  = ((val   8)  0xFF);
 +ecc_code[1]  = ((val   0)  0xFF);
 +val = readl(gpmc_regs-gpmc_bch_result5[i]);
 +ecc_code[2]  = ((val  24)  0xFF);
 +ecc_code[3]  = ((val  16)  0xFF);
 +ecc_code[4]  = ((val   8)  0xFF);
 +ecc_code[5]  = ((val   0)  0xFF);

A lot of this code can be rewritten to use the endian swapping macros, I
expect. Something like this looks equivalent:

   *((uint32_t *)ecc_code[2]) = cpu_to_be32(val);

You could probably fix the types up to make this look a little nicer.


(3) BCH4 use different alignment than BCH8 and BCH16 as ECC syndrome
is not bytewise aligned (it's of 6 1/2 bytes = 13 nibbles).  So for BCH4
higher-nibble or reg1 is shifted and ORed with lower-nibble of reg2.
There is no byte-to-byte mapping. So generic implementation becomes messy.

However, Roger Quadros is planning GPMC driver clean-up, so looping him
in-case he can incorporate some of these things while re-factoring GPMC code.


with regards, pekon
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Re: [PATCH v4 1/6] usb: musb: core: Handle Babble condition only in HOST mode

[Bin Liu]

Hi George,

On Mon, May 19, 2014 at 11:32 PM, George Cherian george.cher...@ti.com wrote:
 Hi Bin,

 On 5/19/2014 9:24 PM, Bin Liu wrote:

 Hi,

 On Mon, May 19, 2014 at 8:39 AM, George Cherian george.cher...@ti.com
 wrote:

 BABBLE and RESET share the same interrupt. The interrupt
 is considered to be RESET if MUSB is in peripheral mode and
 as a BABBLE if MUSB is in HOST mode.

 Handle babble condition iff MUSB is in HOST mode.

 Signed-off-by: George Cherian george.cher...@ti.com
 ---
   drivers/usb/musb/musb_core.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
 index 61da471..eff3c5c 100644
 --- a/drivers/usb/musb/musb_core.c
 +++ b/drivers/usb/musb/musb_core.c
 @@ -849,7 +849,7 @@ b_host:
  }

  /* handle babble condition */
 -   if (int_usb  MUSB_INTR_BABBLE)
 +   if (int_usb  MUSB_INTR_BABBLE  is_host_active(musb))
  schedule_work(musb-recover_work);

 I guess my following comments are for Daniel's patch as while which
 initially added the babble work.

 Should this if statement be merged into the previous 'if(int_usb 
 MUSB_INTR_RESET)' one, which handles the same interrupt and already
 handles host and device mode respectively.


 Initially I too had the babble handling as part of  'if(int_usb 
 MUSB_INTR_RESET)'
 one. But during my tests I hit a corner case where in we hit a BABBLE
 condition
 on disconnect. In such case the babble interrupt can be handled only if we
 have a seperate
 check, else its considered as a BUS RESET.

 When all devices are disconnected  MUSB_DEVCTL_HM = 0 and the code always
 enter the
 else path. In this path it treats the BABBLE as a BUS RESET.

The code flow is a bit confusing, two if() handle the same interrupt.
The second one implied using 'handled = IRQ_HANDLED;' from the first
one.
Also does the switch() in else{} in the first if() cause any side effect?

Since this babble handing is AM335x specific, how about handle it in
dsps_interrupt() in musb_dsps.c, which already has an entry for babble
interrupt? TI 3.2 kernel does this way.

Regards,
-Bin.



 Regards,
 -Bin.

   #if 0
 --
 1.8.3.1

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 --
 -George

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[PATCH 4/5] [RFC] ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable

[Christoph Fritz]

Most dt omap3 boards configure nand-ecc-opt as bch8. Due
to lack of hardware elm support, bch8 software implementation
gets set.

Since commit 0611c41934ab35ce84dea ARM: OMAP2+: gpmc: update
gpmc_hwecc_bch_capable() for new platforms and ECC schemes,
nand support stops working.

This patch allows ecc software fallback.
---
 arch/arm/mach-omap2/gpmc-nand.c |   16 ++--
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 4349e82..52c4834 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -43,13 +43,17 @@ static struct platform_device gpmc_nand_device = {
.resource   = gpmc_nand_resource,
 };
 
-static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
+static bool gpmc_ecc_bch_capable(enum omap_ecc ecc_opt)
 {
/* platforms which support all ECC schemes */
if (soc_is_am33xx() || cpu_is_omap44xx() ||
 soc_is_omap54xx() || soc_is_dra7xx())
return 1;
 
+   if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) ||
+   (ecc_opt == OMAP_ECC_BCH8_CODE_HW_DETECTION_SW))
+   return 1;
+
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
 * which require H/W based ECC error detection */
if ((cpu_is_omap34xx() || cpu_is_omap3630()) 
@@ -57,14 +61,6 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
 (ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
return 0;
 
-   /*
-* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x=1
-* and AM33xx derivates. Other chips may be added if confirmed to work.
-*/
-   if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) 
-   (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
-   return 0;
-
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
return 1;
@@ -140,7 +136,7 @@ int gpmc_nand_init(struct omap_nand_platform_data 
*gpmc_nand_data,
 
gpmc_update_nand_reg(gpmc_nand_data-reg, gpmc_nand_data-cs);
 
-   if (!gpmc_hwecc_bch_capable(gpmc_nand_data-ecc_opt)) {
+   if (!gpmc_ecc_bch_capable(gpmc_nand_data-ecc_opt)) {
dev_err(dev, Unsupported NAND ECC scheme selected\n);
return -EINVAL;
}
-- 
1.7.10.4

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[PATCH 5/5] ARM: dts: OMAP3 a83x: fix duplicate usb pin config

[Christoph Fritz]

Node usbhshost is supporting pinctrl, so the deprecated
quirk call can be removed.

Signed-off-by: Christoph Fritz chf.fr...@googlemail.com
---
 arch/arm/boot/dts/omap3-lilly-a83x.dtsi |3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi 
b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index 2b3af90..d973088 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -176,9 +176,6 @@
 
 omap3_pmx_core2 {
pinctrl-names = default;
-   pinctrl-0 = 
-   hsusb1_2_pins
-   ;
 
hsusb1_2_pins: pinmux_hsusb1_2_pins {
pinctrl-single,pins = 
-- 
1.7.10.4

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[PATCH 3/5] ARM: dts: omap3: set mcbsp2 status

[Christoph Fritz]

This patch fixes audio support for omap3-lilly-a83x.

Signed-off-by: Christoph Fritz chf.fr...@googlemail.com
---
 arch/arm/boot/dts/omap3-lilly-a83x.dtsi |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi 
b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
index cc1dce6..2b3af90 100644
--- a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -357,6 +357,10 @@
power = 50;
 };
 
+mcbsp2 {
+   status = okay;
+};
+
 gpmc {
ranges = 0 0 0x3000 0x100,
7 0 0x1500 0x0100;
-- 
1.7.10.4

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[PATCH 1/5] [RFC-HACK] pinctrl-single: init by postcore_initcall()

[Christoph Fritz]

Init pinctrl-single as postcore, because without this patch omap_gpio is
deferring probe which results in more deferring and finally NFS-Boot
doesn't work.

Diff of bootlog with (good) and without (fail) this patch:

--- good
+++ fail
@@ -60,15 +60,22 @@
 cpuidle: using governor ladder
 cpuidle: using governor menu
 Reprogramming SDRC clock to 4 Hz
-pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
-pinctrl-single 48002030.pinmux: 282 pins at pa fa002030 size 564
-pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
+omap_gpio 4831.gpio: could not find pctldev for node 
/ocp/pinmux@480025a0/pinmux_gpio1_pins, deferring probe
+platform 4831.gpio: Driver omap_gpio requests probe deferral
 OMAP GPIO hardware version 2.5
+omap_gpio 49054000.gpio: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_gpio4_pins, deferring probe
+platform 49054000.gpio: Driver omap_gpio requests probe deferral
+omap_gpio 49056000.gpio: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_gpio5_pins, deferring probe
+platform 49056000.gpio: Driver omap_gpio requests probe deferral
+omap_gpio 49058000.gpio: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_hsusb1_pins, deferring probe
+platform 49058000.gpio: Driver omap_gpio requests probe deferral
 platform 49022000.mcbsp: alias fck already exists
 omap-gpmc 6e00.gpmc: GPMC revision 5.0
 gpmc_probe_nand_child: ti,elm-id property not found
 gpmc_read_settings_dt: page/burst-length set but not used!
 gpmc_read_settings_dt: read/write wait monitoring not enabled!
+irq: no irq domain found for /ocp/gpio@49056000 !
+irq: no irq domain found for /ocp/gpio@49054000 !
 omap3_dbb056_legacy_init: Late Reparent clkout2 to 96M_FCK
 omap3_dbb056_legacy_init: Set clkout2 to 24MHz for internal usb hub
 No ATAGs?
@@ -82,9 +89,14 @@
 usbcore: registered new interface driver usbfs
 usbcore: registered new interface driver hub
 usbcore: registered new device driver usb
-omap_i2c 4807.i2c: bus 0 rev4.4 at 2600 kHz
-omap_i2c 48072000.i2c: bus 1 rev4.4 at 2600 kHz
-omap_i2c 4806.i2c: bus 2 rev4.4 at 2600 kHz
+musb-omap2430 480ab000.usb_otg_hs: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_hsusb_otg_pins, deferring probe
+platform 480ab000.usb_otg_hs: Driver musb-omap2430 requests probe deferral
+omap_i2c 4807.i2c: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_i2c1_pins, deferring probe
+platform 4807.i2c: Driver omap_i2c requests probe deferral
+omap_i2c 48072000.i2c: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_i2c2_pins, deferring probe
+platform 48072000.i2c: Driver omap_i2c requests probe deferral
+omap_i2c 4806.i2c: could not find pctldev for node 
/ocp/pinmux@48002030/pinmux_i2c3_pins, deferring probe
+platform 4806.i2c: Driver omap_i2c requests probe deferral
 pps_core: LinuxPPS API ver. 1 registered
 pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti 
giome...@linux.it
 PTP clock support registered
@@ -103,6 +115,8 @@
 RPC: Registered udp transport module.
 RPC: Registered tcp transport module.
 RPC: Registered tcp NFSv4.1 backchannel transport module.
+usbhs_omap 48064000.usbhshost: could not find pctldev for node 
/ocp/pinmux@480025a0/pinmux_hsusb1_2_pins, deferring probe
+platform 48064000.usbhshost: Driver usbhs_omap requests probe deferral
 hw perfevents: enabled with ARMv7 Cortex-A8 PMU driver, 5 counters available
 futex hash table entries: 16 (order: -3, 704 bytes)
 VFS: Disk quotas dquot_6.5.2
@@ -116,10 +130,14 @@
 io scheduler noop registered
 io scheduler deadline registered
 io scheduler cfq registered (default)
+pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
+pinctrl-single 48002030.pinmux: 282 pins at pa fa002030 size 564
+pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
 OMAP DSS rev 2.0
-omapdss_dpi.0 supply vdds_dsi not found, using dummy regulator
-Console: switching to colour frame buffer device 80x30
-omapfb omapfb: using display 'lcd' mode 640x480
+platform panel-dpi.0: Driver panel-dpi requests probe deferral
+omapfb omapfb: no displays
+omapfb omapfb: failed to setup omapfb
+platform omapfb: Driver omapfb requests probe deferral
 Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
 omap_uart 4806a000.serial: no wakeirq for uart0
 4806a000.serial: ttyO0 at MMIO 0x4806a000 (irq = 88, base_baud = 300) is a 
OMAP UART0
@@ -130,28 +148,6 @@
 4902.serial: ttyO2 at MMIO 0x4902 (irq = 90, base_baud = 300) is a 
OMAP UART2
 brd: module loaded
 loop: module loaded
-twl 0-0048: PIH (irq 23) chaining IRQs 338..346
-twl 0-0048: power (irq 343) chaining IRQs 346..353
-VAUX1: at 3000 mV
-VAUX2_4030: 2800 mV
-VAUX3: at 2800 mV
-VAUX4: at 2800 mV
-VDD1: 600 -- 1450 mV at 1200 mV
-VDAC: 1800 mV
-VIO: at 1800 mV
-VINTANA1: 1500 mV
-VINTANA2: at 2750 mV
-VINTDIG: 1500 mV
-VMMC1: 1850 -- 3150 mV at 3000 mV
-VMMC2: 1850 -- 3150 mV at 2600 mV
-VUSB1V5: 1500 mV
-VUSB1V8: 1800 mV
-VUSB3V1: 

[PATCH 0/5] ARM: omap3-lilly-a83x: update board support

[Christoph Fritz]

This set of patches updates board support for omap3-lilly-a83x.

Christoph Fritz (5):
  [RFC-HACK] pinctrl-single: init by postcore_initcall()
  [RFC-HACK] ARM: dts: OMAP3: reorder pinmux_gpio1_pins
  ARM: dts: omap3: set mcbsp2 status
  [RFC] ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable
  ARM: dts: OMAP3 a83x: fix duplicate usb pin config

 arch/arm/boot/dts/omap3-lilly-a83x.dtsi |7 +++---
 arch/arm/boot/dts/omap34xx.dtsi |   28 --
 arch/arm/boot/dts/omap36xx.dtsi |   40 ---
 arch/arm/mach-omap2/gpmc-nand.c |   16 +
 drivers/pinctrl/pinctrl-single.c|   15 
 5 files changed, 61 insertions(+), 45 deletions(-)

-- 
1.7.10.4

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[PATCH 2/5] [RFC-HACK] ARM: dts: OMAP3: reorder pinmux_gpio1_pins

[Christoph Fritz]

pinctrl-single for omap3_pmx_core2 gets deferred which results in
some corrupt IRQs so that mmc, spi and dss stop working.

Diff of bootlog with (good) and without (fail) this patch:

--- good
+++ fail
 cpuidle: using governor ladder
 cpuidle: using governor menu
 Reprogramming SDRC clock to 4 Hz
-pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
 pinctrl-single 48002030.pinmux: 282 pins at pa fa002030 size 564
 pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
+omap_gpio 4831.gpio: could not find pctldev for node 
/ocp/pinmux@480025a0/pinmux_gpio1_pins, deferring probe
+platform 4831.gpio: Driver omap_gpio requests probe deferral
 OMAP GPIO hardware version 2.5
 platform 49022000.mcbsp: alias fck already exists
 omap-gpmc 6e00.gpmc: GPMC revision 5.0
 gpmc_probe_nand_child: ti,elm-id property not found
 gpmc_read_settings_dt: page/burst-length set but not used!
 gpmc_read_settings_dt: read/write wait monitoring not enabled!
+pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
 omap3_dbb056_legacy_init: Late Reparent clkout2 to 96M_FCK
 omap3_dbb056_legacy_init: Set clkout2 to 24MHz for internal usb hub
 No ATAGs?
@@ -130,8 +132,8 @@
 4902.serial: ttyO2 at MMIO 0x4902 (irq = 90, base_baud = 300) is a 
OMAP UART2
 brd: module loaded
 loop: module loaded
-twl 0-0048: PIH (irq 23) chaining IRQs 338..346
-twl 0-0048: power (irq 343) chaining IRQs 346..353
+twl 0-0048: PIH (irq 23) chaining IRQs 306..314
+twl 0-0048: power (irq 311) chaining IRQs 314..321
 VAUX1: at 3000 mV
 VAUX2_4030: 2800 mV
 VAUX3: at 2800 mV
@@ -150,7 +152,7 @@
 VPLL1: at 1800 mV
 VPLL2: 1800 mV
 VSIM: 1800 -- 3000 mV at 1800 mV
-twl4030_gpio twl4030-gpio: gpio (irq 338) chaining IRQs 354..371
+twl4030_gpio twl4030-gpio: gpio (irq 306) chaining IRQs 322..339
 twl4030_usb twl4030-usb.29: Initialized TWL4030 USB module
 mtdoops: mtd device (mtddev=name/number) must be supplied
 nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xba
@@ -164,11 +166,12 @@
 0x0026-0x0028 : u-boot-environment
 0x0028-0x0078 : kernel
 0x0078-0x1000 : filesystem
+irq: no irq domain found for /ocp/gpio@4831 !
 CAN device driver interface
 sja1000 CAN netdevice driver
 libphy: smsc911x-mdio: probed
 smsc911x 1500.ethernet eth0: attached PHY driver [Generic PHY] 
(mii_bus:phy_addr=1500.etherne:01, irq=-1)
@@ -208,16 +211,16 @@
 hub 3-0:1.0: USB hub found
 hub 3-0:1.0: 1 port detected
 mousedev: PS/2 mouse device common for all mice
-ads7846 spi2.0: touchscreen, irq 120
-input: ADS7846 Touchscreen as 
/devices/6800.ocp/4809a000.spi/spi_master/spi2/spi2.0/input/input0
+ads7846: probe of spi2.0 failed with error -22
 twl_rtc rtc.8: Power up reset detected.
 twl_rtc rtc.8: Enabling TWL-RTC
 twl_rtc rtc.8: rtc core: registered rtc.8 as rtc0
 i2c /dev entries driver
-usb 1-1: new high-speed USB device number 2 using ehci-omap
 omap_wdt: OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
+usb 1-1: new high-speed USB device number 2 using ehci-omap
 VMMC1: Restricting voltage, 310-195uV
 omap_hsmmc 480b4000.mmc: could not set regulator OCR (-22)
+platform leds.3: Driver leds-gpio requests probe deferral
 usbcore: registered new interface driver usbhid
 usbhid: USB HID core driver
 usb 1-1: New USB device found, idVendor=0424, idProduct=2512
@@ -239,6 +242,6 @@
 Registering SWP/SWPB emulation handler
 registered taskstats version 1
 twl_rtc rtc.8: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
-smsc911x 1500.ethernet eth0: SMSC911x/921x identified at 0xc8856000, IRQ: 
241
-smsc911x 2000.ethernet eth1: SMSC911x/921x identified at 0xc8858000, IRQ: 
210
-Sending DHCP requests ...
+smsc911x 1500.ethernet eth0: SMSC911x/921x identified at 0xc8856000, IRQ: 
209
+smsc911x 2000.ethernet eth1: SMSC911x/921x identified at 0xc8858000, IRQ: 
178
+Sending DHCP requests ..., OK
---
 arch/arm/boot/dts/omap34xx.dtsi |   28 ++-
 arch/arm/boot/dts/omap36xx.dtsi |   40 ---
 2 files changed, 36 insertions(+), 32 deletions(-)

diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 2e92360..4994cb0 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -8,6 +8,21 @@
  * kind, whether express or implied.
  */
 
+/ {
+   ocp {
+   omap3_pmx_core2: pinmux@480025d8 {
+   compatible = ti,omap3-padconf, pinctrl-single;
+   reg = 0x480025d8 0x24;
+   #address-cells = 1;
+   #size-cells = 0;
+   #interrupt-cells = 1;
+   interrupt-controller;
+   pinctrl-single,register-width = 16;
+   pinctrl-single,function-mask = 0xff1f;
+   };
+   };
+};
+
 #include omap3.dtsi
 
 / {
@@ -25,19 +40,6 @@
clock-latency 

Re: [PATCH 0/5] ARM: omap3-lilly-a83x: update board support

[Tony Lindgren]

* Christoph Fritz chf.fr...@googlemail.com [140522 16:07]:
 This set of patches updates board support for omap3-lilly-a83x.
 
 Christoph Fritz (5):
   [RFC-HACK] pinctrl-single: init by postcore_initcall()

I would prefer to start initializing other things later as
then we get proper error messages on the console. Let's first
investigate a bit more if we can just initialize other
drivers later on.

Which version of kernel are you using? With all the fixes
that have gone into this -rc cycle, v3.15-rc4 is pretty much
the first kernel that should behave for us properly for
deferred probe for irqchips that get initialized later on.

Regards,

Tony 

   [RFC-HACK] ARM: dts: OMAP3: reorder pinmux_gpio1_pins
   ARM: dts: omap3: set mcbsp2 status
   [RFC] ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable
   ARM: dts: OMAP3 a83x: fix duplicate usb pin config
 
  arch/arm/boot/dts/omap3-lilly-a83x.dtsi |7 +++---
  arch/arm/boot/dts/omap34xx.dtsi |   28 --
  arch/arm/boot/dts/omap36xx.dtsi |   40 
 ---
  arch/arm/mach-omap2/gpmc-nand.c |   16 +
  drivers/pinctrl/pinctrl-single.c|   15 
  5 files changed, 61 insertions(+), 45 deletions(-)
 
 -- 
 1.7.10.4
 
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Re: [PATCH 1/5] [RFC-HACK] pinctrl-single: init by postcore_initcall()

[Tony Lindgren]

* Christoph Fritz chf.fr...@googlemail.com [140522 16:07]:
 --- a/drivers/pinctrl/pinctrl-single.c
 +++ b/drivers/pinctrl/pinctrl-single.c
 @@ -2069,7 +2069,22 @@ static struct platform_driver pcs_driver = {
  #endif
  };
  
 +#ifdef CONFIG_USE_OF
 +static int __init pcs_driver_drv_init(void)
 +{
 +   return platform_driver_register(pcs_driver);
 +}
 +postcore_initcall(pcs_driver_drv_init);
 +
 +static void __exit pcs_driver_drv_exit(void)
 +{
 +   platform_driver_unregister(pcs_driver);
 +}
 +module_exit(pcs_driver_drv_exit);
 +#else
  module_platform_driver(pcs_driver);
 +#endif
 +

I would prefer to initialize all the drivers with module_init
and and if necessary, selected frameworks with subsys_initcall. 

In drivers/Makefile we do have painctrl before gpio, so this
too could be just module_init once the other drivers are fixed.

Regards,

Tony
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Re: [PATCH 2/5] [RFC-HACK] ARM: dts: OMAP3: reorder pinmux_gpio1_pins

[Tony Lindgren]

* Christoph Fritz chf.fr...@googlemail.com [140522 16:07]:
 pinctrl-single for omap3_pmx_core2 gets deferred which results in
 some corrupt IRQs so that mmc, spi and dss stop working.
 
 Diff of bootlog with (good) and without (fail) this patch:
 
 --- good
 +++ fail
  cpuidle: using governor ladder
  cpuidle: using governor menu
  Reprogramming SDRC clock to 4 Hz
 -pinctrl-single 480025a0.pinmux: 46 pins at pa fa0025a0 size 92
  pinctrl-single 48002030.pinmux: 282 pins at pa fa002030 size 564
  pinctrl-single 48002a00.pinmux: 46 pins at pa fa002a00 size 92
 +omap_gpio 4831.gpio: could not find pctldev for node 
 /ocp/pinmux@480025a0/pinmux_gpio1_pins, deferring probe
 +platform 4831.gpio: Driver omap_gpio requests probe deferral

I believe this issue too gets fixed because of the drivers/Makefile
order if we make them all module_init.

Regards,

Tony
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Re: [PATCH 0/5] ARM: omap3-lilly-a83x: update board support

[Christoph Fritz]

On Thu, 2014-05-22 at 16:28 -0700, Tony Lindgren wrote:
 * Christoph Fritz chf.fr...@googlemail.com [140522 16:07]:
  This set of patches updates board support for omap3-lilly-a83x.
  
  Christoph Fritz (5):
[RFC-HACK] pinctrl-single: init by postcore_initcall()
 
 I would prefer to start initializing other things later as
 then we get proper error messages on the console. Let's first
 investigate a bit more if we can just initialize other
 drivers later on.
 
 Which version of kernel are you using? With all the fixes
 that have gone into this -rc cycle, v3.15-rc4 is pretty much
 the first kernel that should behave for us properly for
 deferred probe for irqchips that get initialized later on.

It's 3.15-rc6.



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Re: [PATCH v3 3/4] mfd: tps65917: Add driver for the TPS65917 PMIC

[Keerthy]

On Thursday 22 May 2014 05:18 PM, Lee Jones wrote:

The TPS65917 chip is a power management IC for Portable Navigation Systems
and Tablet Computing devices. It contains the following components:

  - Regulators.
  - Over Temperature warning and Shut down.

This patch adds support for tps65917 mfd device. At this time only
the regulator functionality is made available.

Signed-off-by: Keerthy j-keer...@ti.com
---
v3 Changes:

  * Header file formating
  * Changed the cache_type to REGCACHE_RBTREE
  * removed unnecessary code
  * Corrected documentation style
  * Added pm_power_off function

  v2 Changes:

  * Added volatile register check as some of the registers
in the set are volatile.
drivers/mfd/Kconfig  |   12 +
  drivers/mfd/Makefile |1 +
  drivers/mfd/tps65917.c   |  594 +
  include/linux/mfd/tps65917.h | 1485 ++
  4 files changed, 2092 insertions(+)
  create mode 100644 drivers/mfd/tps65917.c
  create mode 100644 include/linux/mfd/tps65917.h

[...]


+   for (i = 0; i  TPS65917_NUM_CLIENTS; i++) {
+   if (i == 0) {
+   tps65917-i2c_clients[i] = i2c;

This is messy.  Move this line out of the loop and change the loop
parameters to start from 1.  Then we can reduce all of this
unnecessary indentation.

There is a common thing we do after if and else. Removing i == 0
part out of the
loop would mean repeating the common part. This way seems
better.

Ah yes, good point.


+   } else {
+   tps65917-i2c_clients[i] =
+   i2c_new_dummy(i2c-adapter,
+ i2c-addr + i);
+   if (!tps65917-i2c_clients[i]) {
+   dev_err(tps65917-dev,
+   can't attach client %d\n, i);
+   ret = -ENOMEM;
+   goto err_i2c;
+   }
+
+   tps65917-i2c_clients[i]-dev.of_node = 
of_node_get(node);

Don't forget to decrement the reference when you've finished with it.

I did not get this.

Do you know what of_node_get() does?

[...]


What happens if !node?  Then no children get registered and this has
all been a waste of time?

Only DT way is possible. This check is redundant. I will add a check
at the beginning for !node.

If that's the case you should add 'depends on OF' in the Kconfig.


+struct tps65917_reg_init {
+   /*
+* 0: reload default values from OTP on warm reset
+* 1: maintain voltage from VSEL on warm reset
+*/
+   bool warm_reset;

Where is this used?


+   /*
+* 0: i2c selection of voltage
+* 1: pin selection of voltage.
+*/
+   bool roof_floor;

And this?


+   /*
+* For SMPS
+*
+* 0: Off
+* 1: AUTO
+* 2: ECO
+* 3: Forced PWM
+*
+* For LDO
+*
+* 0: Off
+* 1: On
+*/
+   int mode_sleep;

And this?


+   u8 vsel;

And this?

All of the above can be used by regulator driver.

Doesn't the regulator driver have its own header file?  Why are these
in a shared file if they're not used anywhere else?

[...]


+   if (pdata-mux_from_pdata) {
+   reg = pdata-pad1;
+   ret = regmap_write(tps65917-regmap[slave], addr, reg);
+   if (ret)
+   goto err_irq;
+   } else {
+   ret = regmap_read(tps65917-regmap[slave], addr, reg);
+   if (ret)
+   goto err_irq;
+   }i

What does the read do?  You're not doing anything with the value.

This pad1 and pad2 stuff is not needed. I will remove this.

Then why is it in here?

Did you copy this code from somewhere, if so, where?

Okay, I just answered my own question.  There is so much common code
in between this and palmas, there is no way I'm going to accept this
driver.  Please merge it in with the palmas driver!


The chip is more like a subset of palmas with lot of register offset changes
and register bit field changes. Adding this would make it clumsy. There 
could

be lot of checks. That is why i chose to write a new driver.

Palmas driver already supports palmas variants and tps659038. Merging
this would mean more and more checks :-/.

Regards,
Keerthy
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