RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency during DVFS

2010-09-15 Thread Paul Walmsley
Pramod, Teerth,

On Thu, 1 Jul 2010, Paul Walmsley wrote:

> Pramod, Teerth,
> 
> On Mon, 7 Jun 2010, Gurav , Pramod wrote:
> 
> > Can you please push these patches if you don't you are OK with them?
> 
> As we discussed in Bangalore, these patches need some changes:
> 
> 1. The delay needs to be precisely characterized in terms of what the 
> hardware actually needs.  It should not be necessary to add any extra 
> timing slop, due to unknown sources, in the code.  Unknown sources of 
> delay can cause problems if, for example, a customer changes some board 
> characteristics (such as sys_clk frequency, or DPLL multipliers/dividers) 
> that the delay depends on.
> 
> Also, my understanding is that RX-51 shipped without unknown timing 
> factors in this code.  Please work with the hardware people to precisely 
> characterize the delay, assuming that it does not match what is documented 
> in the TRM.
> 
> 2. Please split out the individual components of the delay calculation to 
> the code that handles those clocks.  For example, HSDIVIDER change delay 
> should be calculated by code that handles the HSDIVIDER.  DPLL relock 
> delay should be calculated by code in the dpll*.c files.  etc.

Any updates on these patches?


- Paul
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RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency during DVFS

2010-07-01 Thread Paul Walmsley
Pramod, Teerth,

On Mon, 7 Jun 2010, Gurav , Pramod wrote:

> Can you please push these patches if you don't you are OK with them?

As we discussed in Bangalore, these patches need some changes:

1. The delay needs to be precisely characterized in terms of what the 
hardware actually needs.  It should not be necessary to add any extra 
timing slop, due to unknown sources, in the code.  Unknown sources of 
delay can cause problems if, for example, a customer changes some board 
characteristics (such as sys_clk frequency, or DPLL multipliers/dividers) 
that the delay depends on.

Also, my understanding is that RX-51 shipped without unknown timing 
factors in this code.  Please work with the hardware people to precisely 
characterize the delay, assuming that it does not match what is documented 
in the TRM.

2. Please split out the individual components of the delay calculation to 
the code that handles those clocks.  For example, HSDIVIDER change delay 
should be calculated by code that handles the HSDIVIDER.  DPLL relock 
delay should be calculated by code in the dpll*.c files.  etc.

regards

- Paul

> -
> Thanks and Best Regards
> Pramod Gurav
> 
> > -Original Message-
> > From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> > ow...@vger.kernel.org] On Behalf Of Gurav , Pramod
> > Sent: Friday, April 23, 2010 7:53 PM
> > To: linux-omap@vger.kernel.org; Paul Walmsley; Kevin Hilman
> > Cc: Sripathy, Vishwanath; K, Ambresh
> > Subject: RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall
> > latency during DVFS
> > 
> > Hi Paul,
> > 
> > Please let me know if you have any comments on the patches below.
> > The comments from Kevin, Ambresh and Sergio have been addressed in the
> > last version of the patches and few in these patches.
> > 
> > > -Original Message-
> > > From: Gurav , Pramod
> > > Sent: Thursday, April 01, 2010 10:47 PM
> > > To: linux-omap@vger.kernel.org
> > > Cc: Gurav , Pramod
> > > Subject: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency
> > > during DVFS
> > >
> > > From: Pramod Gurav 
> > >
> > > The patch has the changes to calculate the dpll3 clock stabilization
> > > delay dynamically. The SRAM delay is calibrated during bootup using the
> > > gptimers and used while calculating the stabilization delay. By using
> > > the dynamic method the dependency on the type of cache being used is
> > > removed.
> > >
> > > Formula to calculate the DVFS latency for 3430 and 3630 are different.
> > > The second patch implements the formula for later.
> > >
> > > This Version of patches adds optimisation to the formula implementation.
> > >
> > > Teerth Reddy (1):
> > >   OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
> > > Pramod Gurav (1):
> > >   OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630
> > >
> > >  arch/arm/mach-omap2/clkt34xx_dpll3m2.c |   71
> > > +++-
> > >  arch/arm/mach-omap2/clock34xx.h|2 +
> > >  arch/arm/mach-omap2/clock3xxx.c|2 +-
> > >  arch/arm/mach-omap2/clock3xxx.h|1 +
> > >  arch/arm/mach-omap2/clock3xxx_data.c   |   13 ++
> > >  arch/arm/mach-omap2/sram34xx.S |8 
> > >  arch/arm/plat-omap/include/plat/sram.h |4 ++
> > >  arch/arm/plat-omap/sram.c  |   51 +++
> > >  8 files changed, 140 insertions(+), 12 deletions(-)
> > 
> > 
> > 
> > -
> > Thanks and Best Regards
> > Pramod Gurav
> > 
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> > the body of a message to majord...@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
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RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency during DVFS

2010-06-07 Thread Gurav , Pramod
Hello Paul,
Can you please push these patches if you don't you are OK with them?

-
Thanks and Best Regards
Pramod Gurav

> -Original Message-
> From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> ow...@vger.kernel.org] On Behalf Of Gurav , Pramod
> Sent: Friday, April 23, 2010 7:53 PM
> To: linux-omap@vger.kernel.org; Paul Walmsley; Kevin Hilman
> Cc: Sripathy, Vishwanath; K, Ambresh
> Subject: RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall
> latency during DVFS
> 
> Hi Paul,
> 
> Please let me know if you have any comments on the patches below.
> The comments from Kevin, Ambresh and Sergio have been addressed in the
> last version of the patches and few in these patches.
> 
> > -Original Message-
> > From: Gurav , Pramod
> > Sent: Thursday, April 01, 2010 10:47 PM
> > To: linux-omap@vger.kernel.org
> > Cc: Gurav , Pramod
> > Subject: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency
> > during DVFS
> >
> > From: Pramod Gurav 
> >
> > The patch has the changes to calculate the dpll3 clock stabilization
> > delay dynamically. The SRAM delay is calibrated during bootup using the
> > gptimers and used while calculating the stabilization delay. By using
> > the dynamic method the dependency on the type of cache being used is
> > removed.
> >
> > Formula to calculate the DVFS latency for 3430 and 3630 are different.
> > The second patch implements the formula for later.
> >
> > This Version of patches adds optimisation to the formula implementation.
> >
> > Teerth Reddy (1):
> >   OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
> > Pramod Gurav (1):
> >   OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630
> >
> >  arch/arm/mach-omap2/clkt34xx_dpll3m2.c |   71
> > +++-
> >  arch/arm/mach-omap2/clock34xx.h|2 +
> >  arch/arm/mach-omap2/clock3xxx.c|2 +-
> >  arch/arm/mach-omap2/clock3xxx.h|1 +
> >  arch/arm/mach-omap2/clock3xxx_data.c   |   13 ++
> >  arch/arm/mach-omap2/sram34xx.S |8 
> >  arch/arm/plat-omap/include/plat/sram.h |4 ++
> >  arch/arm/plat-omap/sram.c  |   51 +++
> >  8 files changed, 140 insertions(+), 12 deletions(-)
> 
> 
> 
> -
> Thanks and Best Regards
> Pramod Gurav
> 
> --
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> the body of a message to majord...@vger.kernel.org
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RE: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency during DVFS

2010-04-23 Thread Gurav , Pramod
Hi Paul,

Please let me know if you have any comments on the patches below.
The comments from Kevin, Ambresh and Sergio have been addressed in the last 
version of the patches and few in these patches.

> -Original Message-
> From: Gurav , Pramod
> Sent: Thursday, April 01, 2010 10:47 PM
> To: linux-omap@vger.kernel.org
> Cc: Gurav , Pramod
> Subject: [PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency
> during DVFS
> 
> From: Pramod Gurav 
> 
> The patch has the changes to calculate the dpll3 clock stabilization
> delay dynamically. The SRAM delay is calibrated during bootup using the
> gptimers and used while calculating the stabilization delay. By using
> the dynamic method the dependency on the type of cache being used is
> removed.
> 
> Formula to calculate the DVFS latency for 3430 and 3630 are different.
> The second patch implements the formula for later.
> 
> This Version of patches adds optimisation to the formula implementation.
> 
> Teerth Reddy (1):
>   OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
> Pramod Gurav (1):
>   OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630
> 
>  arch/arm/mach-omap2/clkt34xx_dpll3m2.c |   71
> +++-
>  arch/arm/mach-omap2/clock34xx.h|2 +
>  arch/arm/mach-omap2/clock3xxx.c|2 +-
>  arch/arm/mach-omap2/clock3xxx.h|1 +
>  arch/arm/mach-omap2/clock3xxx_data.c   |   13 ++
>  arch/arm/mach-omap2/sram34xx.S |8 
>  arch/arm/plat-omap/include/plat/sram.h |4 ++
>  arch/arm/plat-omap/sram.c  |   51 +++
>  8 files changed, 140 insertions(+), 12 deletions(-)



-
Thanks and Best Regards
Pramod Gurav

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[PATCH V4 0/2] OMAP3: Dynamic Calculation of SDRC stall latency during DVFS

2010-04-01 Thread Pramod Gurav
From: Pramod Gurav  

The patch has the changes to calculate the dpll3 clock stabilization
delay dynamically. The SRAM delay is calibrated during bootup using the
gptimers and used while calculating the stabilization delay. By using
the dynamic method the dependency on the type of cache being used is
removed.

Formula to calculate the DVFS latency for 3430 and 3630 are different.
The second patch implements the formula for later.

This Version of patches adds optimisation to the formula implementation.

Teerth Reddy (1):
  OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
Pramod Gurav (1):
  OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630

 arch/arm/mach-omap2/clkt34xx_dpll3m2.c |   71 +++-
 arch/arm/mach-omap2/clock34xx.h|2 +
 arch/arm/mach-omap2/clock3xxx.c|2 +-
 arch/arm/mach-omap2/clock3xxx.h|1 +
 arch/arm/mach-omap2/clock3xxx_data.c   |   13 ++
 arch/arm/mach-omap2/sram34xx.S |8 
 arch/arm/plat-omap/include/plat/sram.h |4 ++
 arch/arm/plat-omap/sram.c  |   51 +++
 8 files changed, 140 insertions(+), 12 deletions(-)

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